aboutsummaryrefslogtreecommitdiff
path: root/include/axp209.h
blob: dc27d65a43fff44271b50d1b6cb24ba8e738d550 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
 */

#include <linux/bitops.h>

enum axp209_reg {
	AXP209_POWER_STATUS = 0x00,
	AXP209_CHIP_VERSION = 0x03,
	AXP209_OUTPUT_CTRL = 0x12,
	AXP209_DCDC2_VOLTAGE = 0x23,
	AXP209_DCDC3_VOLTAGE = 0x27,
	AXP209_LDO24_VOLTAGE = 0x28,
	AXP209_LDO3_VOLTAGE = 0x29,
	AXP209_IRQ_ENABLE1 = 0x40,
	AXP209_IRQ_ENABLE2 = 0x41,
	AXP209_IRQ_ENABLE3 = 0x42,
	AXP209_IRQ_ENABLE4 = 0x43,
	AXP209_IRQ_ENABLE5 = 0x44,
	AXP209_IRQ_STATUS5 = 0x4c,
	AXP209_SHUTDOWN = 0x32,
};

#define AXP209_POWER_STATUS_ON_BY_DC	BIT(0)
#define AXP209_POWER_STATUS_VBUS_USABLE	BIT(4)

#define AXP209_CHIP_VERSION_MASK	0x0f

#define AXP209_OUTPUT_CTRL_EXTEN	BIT(0)
#define AXP209_OUTPUT_CTRL_DCDC3	BIT(1)
#define AXP209_OUTPUT_CTRL_LDO2		BIT(2)
#define AXP209_OUTPUT_CTRL_LDO4		BIT(3)
#define AXP209_OUTPUT_CTRL_DCDC2	BIT(4)
#define AXP209_OUTPUT_CTRL_LDO3		BIT(6)

#define AXP209_LDO24_LDO2_MASK		0xf0
#define AXP209_LDO24_LDO4_MASK		0x0f
#define AXP209_LDO24_LDO2_SET(reg, cfg)	\
	(((reg) & ~AXP209_LDO24_LDO2_MASK) | \
	(((cfg) << 4) & AXP209_LDO24_LDO2_MASK))
#define AXP209_LDO24_LDO4_SET(reg, cfg)	\
	(((reg) & ~AXP209_LDO24_LDO4_MASK) | \
	(((cfg) << 0) & AXP209_LDO24_LDO4_MASK))

#define AXP209_LDO3_VOLTAGE_FROM_LDO3IN	BIT(7)
#define AXP209_LDO3_VOLTAGE_MASK	0x7f
#define AXP209_LDO3_VOLTAGE_SET(x)	((x) & AXP209_LDO3_VOLTAGE_MASK)

#define AXP209_IRQ5_PEK_UP		BIT(6)
#define AXP209_IRQ5_PEK_DOWN		BIT(5)

#define AXP209_POWEROFF			BIT(7)

/* For axp_gpio.c */
#define AXP_POWER_STATUS		0x00
#define AXP_POWER_STATUS_VBUS_PRESENT	BIT(5)
#define AXP_GPIO0_CTRL			0x90
#define AXP_GPIO1_CTRL			0x92
#define AXP_GPIO2_CTRL			0x93
#define AXP_GPIO_CTRL_OUTPUT_LOW	0x00 /* Drive pin low */
#define AXP_GPIO_CTRL_OUTPUT_HIGH	0x01 /* Drive pin high */
#define AXP_GPIO_CTRL_INPUT		0x02 /* Input */
#define AXP_GPIO_STATE			0x94
#define AXP_GPIO_STATE_OFFSET		4