blob: 65cd3218a051576ae3cff44732cc8ab32856aa07 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
|
/*
* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
*
* SPDX-License-Identifier: GPL-2.0
*/
#ifndef _MALTA_CONFIG_H
#define _MALTA_CONFIG_H
/*
* System configuration
*/
#define CONFIG_MALTA
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MEMSIZE_IN_BYTES
#define CONFIG_PCI_GT64120
#define CONFIG_PCI_MSC01
#define CONFIG_PCNET
#define CONFIG_PCNET_79C973
#define PCNET_HAS_PROM
#define CONFIG_MISC_INIT_R
#define CONFIG_RTC_MC146818
#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
/*
* CPU Configuration
*/
#define CONFIG_SYS_MHZ 250 /* arbitrary value */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
/*
* Memory map
*/
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#ifdef CONFIG_64BIT
# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
#else
# define CONFIG_SYS_SDRAM_BASE 0x80000000
#endif
#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000)
#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
/*
* Serial driver
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_NS16550_PORT_MAPPED
/*
* Flash configuration
*/
#ifdef CONFIG_64BIT
# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
#else
# define CONFIG_SYS_FLASH_BASE 0xbe000000
#endif
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 128
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
/*
* Environment
*/
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE 0x20000
#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
#define CONFIG_ENV_ADDR \
(CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
/*
* IDE/ATA
*/
#define CONFIG_SYS_IDE_MAXBUS 1
#define CONFIG_SYS_IDE_MAXDEVICE 2
#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
#define CONFIG_SYS_ATA_DATA_OFFSET 0
#define CONFIG_SYS_ATA_REG_OFFSET 0
/*
* Commands
*/
#define CONFIG_CMD_DATE
#define CONFIG_CMD_IDE
#define CONFIG_CMD_PCI
#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
#endif /* _MALTA_CONFIG_H */
|
