blob: d79033be3f5cf17b6733e8e5a262dafb2c6ab1ca (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Board configuration file for Actions Semi Owl SoCs.
*
* Copyright (C) 2015 Actions Semi Co., Ltd.
* Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*
*/
#ifndef _OWL_COMMON_CONFIG_H_
#define _OWL_COMMON_CONFIG_H_
/* SDRAM Definitions */
#define CONFIG_SYS_SDRAM_BASE 0x0
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY (24000000) /* 24MHz */
#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
/* Some commands use this as the default load address */
/*
* This is the initial SP which is used only briefly for relocating the u-boot
* image to the top of SDRAM. After relocation u-boot moves the stack to the
* proper place.
*/
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00)
/* Console configuration */
#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#endif
|