diff options
author | Michal Simek | 2023-09-22 12:35:35 +0200 |
---|---|---|
committer | Michal Simek | 2023-10-09 10:25:32 +0200 |
commit | 2036621a611222173ea9f9882c7e1d5e4d2b3575 (patch) | |
tree | 4cfe5a856436a699c89ff5ae6ba9bb3080463b93 | |
parent | 1b273a960a76796dbb48ef209eae6b4fd617ba20 (diff) |
arm64: zynqmp: Fix Siva's email address format
Some patches didn't have his full name and also there was one more ">" at
the end of email address. That's why correct both of these issues.
Fixes: 174d728471d5 ("arm64: zynqmp: Switch to amd.com emails")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e970cc0dfabe293c2baf6b231d34f3af0386f1eb.1695378830.git.michal.simek@amd.com
-rw-r--r-- | arch/arm/dts/versal-mini-emmc0.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/versal-mini-emmc1.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/versal-mini-ospi.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/versal-mini-qspi.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/versal-mini.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-mini-emmc0.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-mini-emmc1.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-mini-nand.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-mini-qspi.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-zc1254-revA.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-zcu1275-revA.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-zcu1275-revB.dts | 2 | ||||
-rw-r--r-- | arch/arm/dts/zynqmp-zcu1285-revA.dts | 2 | ||||
-rw-r--r-- | arch/arm/mach-versal/mp.c | 2 | ||||
-rw-r--r-- | drivers/fpga/zynqmppl.c | 2 |
16 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts index bd685ddfdb4..60b1c0e1fc4 100644 --- a/arch/arm/dts/versal-mini-emmc0.dts +++ b/arch/arm/dts/versal-mini-emmc0.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018-2019, Xilinx, Inc. * - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> * Michal Simek <michal.simek@amd.com> */ diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts index fbdcf5d77f5..751cc38ee5c 100644 --- a/arch/arm/dts/versal-mini-emmc1.dts +++ b/arch/arm/dts/versal-mini-emmc1.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018-2019, Xilinx, Inc. * - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> * Michal Simek <michal.simek@amd.com> */ diff --git a/arch/arm/dts/versal-mini-ospi.dtsi b/arch/arm/dts/versal-mini-ospi.dtsi index 5683a2306bd..1abe44f4042 100644 --- a/arch/arm/dts/versal-mini-ospi.dtsi +++ b/arch/arm/dts/versal-mini-ospi.dtsi @@ -4,7 +4,7 @@ * * (C) Copyright 2018-2019, Xilinx, Inc. * - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> * Michal Simek <michal.simek@amd.com> */ diff --git a/arch/arm/dts/versal-mini-qspi.dtsi b/arch/arm/dts/versal-mini-qspi.dtsi index 2fec92ce3ec..9347ea32c9c 100644 --- a/arch/arm/dts/versal-mini-qspi.dtsi +++ b/arch/arm/dts/versal-mini-qspi.dtsi @@ -4,7 +4,7 @@ * * (C) Copyright 2018-2019, Xilinx, Inc. * - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> * Michal Simek <michal.simek@amd.com> */ diff --git a/arch/arm/dts/versal-mini.dts b/arch/arm/dts/versal-mini.dts index a213b745bc2..844e3840ace 100644 --- a/arch/arm/dts/versal-mini.dts +++ b/arch/arm/dts/versal-mini.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2019, Xilinx, Inc. * - * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index 08ec2f7b4a9..02e80bd85e1 100644 --- a/arch/arm/dts/zynqmp-mini-emmc0.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018, Xilinx, Inc. * - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts index 905de08fdb0..ce1cdb20753 100644 --- a/arch/arm/dts/zynqmp-mini-emmc1.dts +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018, Xilinx, Inc. * - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-mini-nand.dts b/arch/arm/dts/zynqmp-mini-nand.dts index e5688fd703e..e0517cf4601 100644 --- a/arch/arm/dts/zynqmp-mini-nand.dts +++ b/arch/arm/dts/zynqmp-mini-nand.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2018, Xilinx, Inc. * - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> * Michal Simek <michal.simek@amd.com> */ diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index fc0a2e801e4..ee8be536000 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2015 - 2020, Xilinx, Inc. * - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> * Michal Simek <michal.simek@amd.com> */ diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts b/arch/arm/dts/zynqmp-zc1254-revA.dts index 5c4acd17cc5..c6a63201c1c 100644 --- a/arch/arm/dts/zynqmp-zc1254-revA.dts +++ b/arch/arm/dts/zynqmp-zc1254-revA.dts @@ -5,7 +5,7 @@ * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek <michal.simek@amd.com> - * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index 74a5b020e86..0d2ea9c09a0 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -4,7 +4,7 @@ * * (C) Copyright 2015 - 2021, Xilinx, Inc. * - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> * Michal Simek <michal.simek@amd.com> */ diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts index 9404c139a24..095c972f132 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts @@ -5,7 +5,7 @@ * (C) Copyright 2017 - 2021, Xilinx, Inc. * * Michal Simek <michal.simek@amd.com> - * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts index c06d262506d..4060dc3613a 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revB.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts @@ -5,7 +5,7 @@ * (C) Copyright 2018 - 2021, Xilinx, Inc. * * Michal Simek <michal.simek@amd.com> - * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ /dts-v1/; diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts index 99ea143c02e..4f85837e64f 100644 --- a/arch/arm/dts/zynqmp-zcu1285-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts @@ -5,7 +5,7 @@ * (C) Copyright 2018 - 2021, Xilinx, Inc. * * Michal Simek <michal.simek@amd.com> - * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ /dts-v1/; diff --git a/arch/arm/mach-versal/mp.c b/arch/arm/mach-versal/mp.c index 7bd39289fac..2487b482ddb 100644 --- a/arch/arm/mach-versal/mp.c +++ b/arch/arm/mach-versal/mp.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* * (C) Copyright 2019 Xilinx, Inc. - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ #include <common.h> diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c index b1f201fb18b..2656f5fc5ec 100644 --- a/drivers/fpga/zynqmppl.c +++ b/drivers/fpga/zynqmppl.c @@ -2,7 +2,7 @@ /* * (C) Copyright 2015 - 2016, Xilinx, Inc, * Michal Simek <michal.simek@amd.com> - * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> + * Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> */ #include <console.h> |