diff options
| author | Andreas Dannenberg | 2018-08-27 15:57:12 +0530 |
|---|---|---|
| committer | Tom Rini | 2018-09-11 08:32:55 -0400 |
| commit | c68721d93ac87afe4fd88520147015388cbe3875 (patch) | |
| tree | 0570f696a225a9bc1f3c40c9dd4f2eacb6fdec44 /arch/arm/mach-k3/am6_init.c | |
| parent | e00646099f7219328ed61882211fdb95f380028c (diff) | |
arm: K3: am654: Unlock control module registers during init
By default the device control module registers are locked,
preventing any writes to its registers.
Unlock those registers as part of the init flow.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/mach-k3/am6_init.c')
| -rw-r--r-- | arch/arm/mach-k3/am6_init.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c index 671498a99be..8a3a99f23a7 100644 --- a/arch/arm/mach-k3/am6_init.c +++ b/arch/arm/mach-k3/am6_init.c @@ -12,6 +12,41 @@ #include <asm/arch/hardware.h> #ifdef CONFIG_SPL_BUILD +static void mmr_unlock(u32 base, u32 partition) +{ + /* Translate the base address */ + phys_addr_t part_base = base + partition * CTRL_MMR0_PARTITION_SIZE; + + /* Unlock the requested partition if locked using two-step sequence */ + writel(CTRLMMR_LOCK_KICK0_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK0); + writel(CTRLMMR_LOCK_KICK1_UNLOCK_VAL, part_base + CTRLMMR_LOCK_KICK1); +} + +static void ctrl_mmr_unlock(void) +{ + /* Unlock all WKUP_CTRL_MMR0 module registers */ + mmr_unlock(WKUP_CTRL_MMR0_BASE, 0); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 1); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 2); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 3); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 6); + mmr_unlock(WKUP_CTRL_MMR0_BASE, 7); + + /* Unlock all MCU_CTRL_MMR0 module registers */ + mmr_unlock(MCU_CTRL_MMR0_BASE, 0); + mmr_unlock(MCU_CTRL_MMR0_BASE, 1); + mmr_unlock(MCU_CTRL_MMR0_BASE, 2); + mmr_unlock(MCU_CTRL_MMR0_BASE, 6); + + /* Unlock all CTRL_MMR0 module registers */ + mmr_unlock(CTRL_MMR0_BASE, 0); + mmr_unlock(CTRL_MMR0_BASE, 1); + mmr_unlock(CTRL_MMR0_BASE, 2); + mmr_unlock(CTRL_MMR0_BASE, 3); + mmr_unlock(CTRL_MMR0_BASE, 6); + mmr_unlock(CTRL_MMR0_BASE, 7); +} + static void store_boot_index_from_rom(void) { u32 *boot_index = (u32 *)K3_BOOT_PARAM_TABLE_INDEX_VAL; @@ -27,6 +62,9 @@ void board_init_f(ulong dummy) */ store_boot_index_from_rom(); + /* Make all control module registers accessible */ + ctrl_mmr_unlock(); + /* Init DM early in-order to invoke system controller */ spl_early_init(); |