diff options
| author | Pali Rohár | 2021-10-22 16:22:14 +0200 |
|---|---|---|
| committer | Stefan Roese | 2021-11-03 06:45:26 +0100 |
| commit | 2344a76f29a54d6521af0a4d3b5b9e6c407a7bfa (patch) | |
| tree | e26010c54f0f28cfe6a0d153f77a118398e681a5 /drivers/pci | |
| parent | 42ab3b30046007f000adfd67427a72593f5b3d81 (diff) | |
pci: pci_mvebu: Setup PCI controller to Root Complex mode
Root Complex should be the default mode, let's set it explicitly.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci_mvebu.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index 4c7fd8d5a99..a327a83411e 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -62,6 +62,7 @@ DECLARE_GLOBAL_DATA_PTR; #define PCIE_MASK_ENABLE_INTS (0xf << 24) #define PCIE_CTRL_OFF 0x1a00 #define PCIE_CTRL_X1_MODE BIT(0) +#define PCIE_CTRL_RC_MODE BIT(1) #define PCIE_STAT_OFF 0x1a04 #define PCIE_STAT_BUS (0xff << 8) #define PCIE_STAT_DEV (0x1f << 16) @@ -373,6 +374,11 @@ static int mvebu_pcie_probe(struct udevice *dev) struct pci_controller *hose = dev_get_uclass_priv(ctlr); u32 reg; + /* Setup PCIe controller to Root Complex mode */ + reg = readl(pcie->base + PCIE_CTRL_OFF); + reg |= PCIE_CTRL_RC_MODE; + writel(reg, pcie->base + PCIE_CTRL_OFF); + /* * Change Class Code of PCI Bridge device to PCI Bridge (0x600400) * because default value is Memory controller (0x508000) which |