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-rw-r--r--arch/arm/mach-socfpga/Makefile4
-rw-r--r--arch/arm/mach-socfpga/board.c3
-rw-r--r--arch/arm/mach-socfpga/clock_manager.c3
-rw-r--r--arch/arm/mach-socfpga/clock_manager_arria10.c3
-rw-r--r--arch/arm/mach-socfpga/clock_manager_gen5.c3
-rw-r--r--arch/arm/mach-socfpga/fpga_manager.c3
-rw-r--r--arch/arm/mach-socfpga/freeze_controller.c3
-rw-r--r--arch/arm/mach-socfpga/include/mach/base_addr_a10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/base_addr_ac5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/base_addr_s10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/boot0.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/fpga_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/freeze_controller.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/gpio.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/misc.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/nic301.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/pinmux.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/reset_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/scan_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/scu.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/sdram.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/sdram_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager_arria10.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/system_manager_gen5.h3
-rw-r--r--arch/arm/mach-socfpga/include/mach/timer.h3
-rw-r--r--arch/arm/mach-socfpga/misc.c3
-rw-r--r--arch/arm/mach-socfpga/misc_arria10.c3
-rw-r--r--arch/arm/mach-socfpga/misc_gen5.c3
-rw-r--r--arch/arm/mach-socfpga/pinmux_arria10.c3
-rwxr-xr-xarch/arm/mach-socfpga/qts-filter.sh9
-rw-r--r--arch/arm/mach-socfpga/reset_manager.c3
-rw-r--r--arch/arm/mach-socfpga/reset_manager_arria10.c3
-rw-r--r--arch/arm/mach-socfpga/reset_manager_gen5.c3
-rw-r--r--arch/arm/mach-socfpga/scan_manager.c3
-rw-r--r--arch/arm/mach-socfpga/spl.c3
-rw-r--r--arch/arm/mach-socfpga/system_manager_gen5.c3
-rw-r--r--arch/arm/mach-socfpga/timer.c3
-rw-r--r--arch/arm/mach-socfpga/wrap_iocsr_config.c3
-rw-r--r--arch/arm/mach-socfpga/wrap_pinmux_config.c3
-rw-r--r--arch/arm/mach-socfpga/wrap_pll_config.c3
-rw-r--r--arch/arm/mach-socfpga/wrap_sdram_config.c3
49 files changed, 51 insertions, 103 deletions
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile
index 286bfef8ca2..89b4fdf0f7f 100644
--- a/arch/arm/mach-socfpga/Makefile
+++ b/arch/arm/mach-socfpga/Makefile
@@ -1,11 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
#
# (C) Copyright 2000-2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
obj-y += board.o
obj-y += clock_manager.o
diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index a41d0899d77..c23ac4ead3e 100644
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Altera SoCFPGA common board code
*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c
index 43e72a8b559..bc2c0f8854a 100644
--- a/arch/arm/mach-socfpga/clock_manager.c
+++ b/arch/arm/mach-socfpga/clock_manager.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c b/arch/arm/mach-socfpga/clock_manager_arria10.c
index 4bc4acb9bfe..4ee6a82b5f7 100644
--- a/arch/arm/mach-socfpga/clock_manager_arria10.c
+++ b/arch/arm/mach-socfpga/clock_manager_arria10.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c b/arch/arm/mach-socfpga/clock_manager_gen5.c
index 1b3914ba7dc..3a646008612 100644
--- a/arch/arm/mach-socfpga/clock_manager_gen5.c
+++ b/arch/arm/mach-socfpga/clock_manager_gen5.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/fpga_manager.c b/arch/arm/mach-socfpga/fpga_manager.c
index 16e4a7821b3..18d692c6314 100644
--- a/arch/arm/mach-socfpga/fpga_manager.c
+++ b/arch/arm/mach-socfpga/fpga_manager.c
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
* All rights reserved.
*
* This file contains only support functions used also by the SoCFPGA
* platform code, the real meat is located in drivers/fpga/socfpga.c .
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c
index 62fa854082e..d48aeec3742 100644
--- a/arch/arm/mach-socfpga/freeze_controller.c
+++ b/arch/arm/mach-socfpga/freeze_controller.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
index 7818aa5c2db..929c413e039 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_a10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SOCFPGA_A10_BASE_HARDWARE_H_
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
index 6534283331a..bb9e3faa293 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SOCFPGA_BASE_ADDRS_H_
diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
index 70528049210..2c6e412f612 100644
--- a/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/base_addr_s10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _SOCFPGA_S10_BASE_HARDWARE_H_
diff --git a/arch/arm/mach-socfpga/include/mach/boot0.h b/arch/arm/mach-socfpga/include/mach/boot0.h
index d6b9435d333..60194231c74 100644
--- a/arch/arm/mach-socfpga/include/mach/boot0.h
+++ b/arch/arm/mach-socfpga/include/mach/boot0.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Specialty padding for the Altera SoCFPGA preloader image
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __BOOT0_H
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index 4c6b1f832b5..3ace040d156 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _CLOCK_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
index 1b55bb8ecfd..a3289ee2dac 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef CLOCK_MANAGER_ARRIA10
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
index 9227dfb09a0..5bedf28cf1a 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _CLOCK_MANAGER_GEN5_H_
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager.h b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
index a21c71665c1..481b66bbd86 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
* All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _FPGA_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
index 9cbf696830c..09d13f6fd3c 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2017 Intel Corporation <www.intel.com>
* All rights reserved.
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _FPGA_MANAGER_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
index 2de7a117f95..c8ec5d4c3c7 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
@@ -1,8 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
* All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _FPGA_MANAGER_GEN5_H_
diff --git a/arch/arm/mach-socfpga/include/mach/freeze_controller.h b/arch/arm/mach-socfpga/include/mach/freeze_controller.h
index f19ad87717a..80846a67f19 100644
--- a/arch/arm/mach-socfpga/include/mach/freeze_controller.h
+++ b/arch/arm/mach-socfpga/include/mach/freeze_controller.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _FREEZE_CONTROLLER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/gpio.h b/arch/arm/mach-socfpga/include/mach/gpio.h
index 6c61f188bc6..f216b803328 100644
--- a/arch/arm/mach-socfpga/include/mach/gpio.h
+++ b/arch/arm/mach-socfpga/include/mach/gpio.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Stefan Roese <sr@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SOCFPGA_GPIO_H
diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h
index 0b65783b055..197f09a57cb 100644
--- a/arch/arm/mach-socfpga/include/mach/misc.h
+++ b/arch/arm/mach-socfpga/include/mach/misc.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _MISC_H_
diff --git a/arch/arm/mach-socfpga/include/mach/nic301.h b/arch/arm/mach-socfpga/include/mach/nic301.h
index 3c8ab31ffb6..20bebb8c81c 100644
--- a/arch/arm/mach-socfpga/include/mach/nic301.h
+++ b/arch/arm/mach-socfpga/include/mach/nic301.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _NIC301_REGISTERS_H_
diff --git a/arch/arm/mach-socfpga/include/mach/pinmux.h b/arch/arm/mach-socfpga/include/mach/pinmux.h
index 563a3db110c..2de5033b1c3 100644
--- a/arch/arm/mach-socfpga/include/mach/pinmux.h
+++ b/arch/arm/mach-socfpga/include/mach/pinmux.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _PINMUX_H_
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 65917454f85..7cfed7d001a 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _RESET_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
index b6d7f4f6f96..522f714d76f 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _RESET_MANAGER_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
index 6d9cffea7b8..dd58922cecc 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _RESET_MANAGER_GEN5_H_
diff --git a/arch/arm/mach-socfpga/include/mach/scan_manager.h b/arch/arm/mach-socfpga/include/mach/scan_manager.h
index 5ca68435575..4d8d649be06 100644
--- a/arch/arm/mach-socfpga/include/mach/scan_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/scan_manager.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SCAN_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/scu.h b/arch/arm/mach-socfpga/include/mach/scu.h
index 7a5b07416d8..27224b1a87f 100644
--- a/arch/arm/mach-socfpga/include/mach/scu.h
+++ b/arch/arm/mach-socfpga/include/mach/scu.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __SOCFPGA_SCU_H__
diff --git a/arch/arm/mach-socfpga/include/mach/sdram.h b/arch/arm/mach-socfpga/include/mach/sdram.h
index b11228fd99d..a58872c3d92 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright Altera Corporation (C) 2014-2015
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SDRAM_H_
#define _SDRAM_H_
diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
index 1d7b7c119a0..8ae8d1bc962 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2015-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _SOCFPGA_SDRAM_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h
index e6d4280c5b9..fbe2a8be289 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SYSTEM_MANAGER_H_
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/system_manager_arria10.h
index f235abab0b2..14052b957ca 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_arria10.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#ifndef _SYSTEM_MANAGER_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h
index 285c1a29ad6..52e59df5132 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_gen5.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SYSTEM_MANAGER_GEN5_H_
diff --git a/arch/arm/mach-socfpga/include/mach/timer.h b/arch/arm/mach-socfpga/include/mach/timer.h
index ee6969bac8a..82596e412e3 100644
--- a/arch/arm/mach-socfpga/include/mach/timer.h
+++ b/arch/arm/mach-socfpga/include/mach/timer.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _SOCFPGA_TIMER_H_
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 692466c3e1c..5c27f1984ef 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index 475fd59a45b..f9095683124 100644
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <altera.h>
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 177b35fc4ee..b9db3aef09c 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/pinmux_arria10.c b/arch/arm/mach-socfpga/pinmux_arria10.c
index 69d6a928a04..163bf278b14 100644
--- a/arch/arm/mach-socfpga/pinmux_arria10.c
+++ b/arch/arm/mach-socfpga/pinmux_arria10.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <asm/arch/pinmux.h>
diff --git a/arch/arm/mach-socfpga/qts-filter.sh b/arch/arm/mach-socfpga/qts-filter.sh
index 785a0d5ea21..02c28be2b77 100755
--- a/arch/arm/mach-socfpga/qts-filter.sh
+++ b/arch/arm/mach-socfpga/qts-filter.sh
@@ -23,10 +23,9 @@ process_iocsr_config() {
(
cat << EOF
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA IOCSR configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_IOCSR_CONFIG_H__
@@ -67,10 +66,9 @@ process_pinmux_config() {
(
cat << EOF
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA PinMux configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_PINMUX_CONFIG_H__
@@ -104,10 +102,9 @@ process_pll_config() {
(
cat << EOF
+/* SPDX-License-Identifier: BSD-3-Clause */
/*
* Altera SoCFPGA Clock and PLL configuration
- *
- * SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef __SOCFPGA_PLL_CONFIG_H__
diff --git a/arch/arm/mach-socfpga/reset_manager.c b/arch/arm/mach-socfpga/reset_manager.c
index 484b295cd3f..1389c82169b 100644
--- a/arch/arm/mach-socfpga/reset_manager.c
+++ b/arch/arm/mach-socfpga/reset_manager.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
diff --git a/arch/arm/mach-socfpga/reset_manager_arria10.c b/arch/arm/mach-socfpga/reset_manager_arria10.c
index 54f0ddb2558..99e2b8e6e63 100644
--- a/arch/arm/mach-socfpga/reset_manager_arria10.c
+++ b/arch/arm/mach-socfpga/reset_manager_arria10.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2017 Intel Corporation
- *
- * SPDX-License-Identifier: GPL-2.0
*/
#include <asm/io.h>
diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c
index c59127456ce..b261a944868 100644
--- a/arch/arm/mach-socfpga/reset_manager_gen5.c
+++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
diff --git a/arch/arm/mach-socfpga/scan_manager.c b/arch/arm/mach-socfpga/scan_manager.c
index 8b271b1f454..52175af48b7 100644
--- a/arch/arm/mach-socfpga/scan_manager.c
+++ b/arch/arm/mach-socfpga/scan_manager.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index 9bf3b9a446a..4b86eadd815 100644
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/system_manager_gen5.c b/arch/arm/mach-socfpga/system_manager_gen5.c
index e0af7753b0e..9d04aea2a8e 100644
--- a/arch/arm/mach-socfpga/system_manager_gen5.c
+++ b/arch/arm/mach-socfpga/system_manager_gen5.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/timer.c b/arch/arm/mach-socfpga/timer.c
index 253cde39d11..f1c0262ae57 100644
--- a/arch/arm/mach-socfpga/timer.c
+++ b/arch/arm/mach-socfpga/timer.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/wrap_iocsr_config.c b/arch/arm/mach-socfpga/wrap_iocsr_config.c
index 5e3f0573555..f810fade92a 100644
--- a/arch/arm/mach-socfpga/wrap_iocsr_config.c
+++ b/arch/arm/mach-socfpga/wrap_iocsr_config.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/wrap_pinmux_config.c b/arch/arm/mach-socfpga/wrap_pinmux_config.c
index a12f0b32a4f..33ca14c9dc7 100644
--- a/arch/arm/mach-socfpga/wrap_pinmux_config.c
+++ b/arch/arm/mach-socfpga/wrap_pinmux_config.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/wrap_pll_config.c b/arch/arm/mach-socfpga/wrap_pll_config.c
index 72b5f92aaf0..bd631e0fb5f 100644
--- a/arch/arm/mach-socfpga/wrap_pll_config.c
+++ b/arch/arm/mach-socfpga/wrap_pll_config.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
diff --git a/arch/arm/mach-socfpga/wrap_sdram_config.c b/arch/arm/mach-socfpga/wrap_sdram_config.c
index 8fb808a3340..8cfacc7a139 100644
--- a/arch/arm/mach-socfpga/wrap_sdram_config.c
+++ b/arch/arm/mach-socfpga/wrap_sdram_config.c
@@ -1,7 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Marek Vasut <marex@denx.de>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>