diff options
Diffstat (limited to 'dts/upstream/Bindings/spi')
| -rw-r--r-- | dts/upstream/Bindings/spi/airoha,en7581-snand.yaml | 65 | ||||
| -rw-r--r-- | dts/upstream/Bindings/spi/cdns,qspi-nor.yaml | 8 | ||||
| -rw-r--r-- | dts/upstream/Bindings/spi/marvell,armada-3700-spi.yaml | 55 | ||||
| -rw-r--r-- | dts/upstream/Bindings/spi/renesas,sh-msiof.yaml | 1 | ||||
| -rw-r--r-- | dts/upstream/Bindings/spi/spi-armada-3700.txt | 25 | ||||
| -rw-r--r-- | dts/upstream/Bindings/spi/st,stm32-qspi.yaml | 4 | ||||
| -rw-r--r-- | dts/upstream/Bindings/spi/st,stm32-spi.yaml | 4 | ||||
| -rw-r--r-- | dts/upstream/Bindings/spi/ti,qspi.yaml | 96 | ||||
| -rw-r--r-- | dts/upstream/Bindings/spi/ti_qspi.txt | 53 |
9 files changed, 229 insertions, 82 deletions
diff --git a/dts/upstream/Bindings/spi/airoha,en7581-snand.yaml b/dts/upstream/Bindings/spi/airoha,en7581-snand.yaml new file mode 100644 index 00000000000..b820c5613dc --- /dev/null +++ b/dts/upstream/Bindings/spi/airoha,en7581-snand.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/airoha,en7581-snand.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SPI-NAND flash controller for Airoha ARM SoCs + +maintainers: + - Lorenzo Bianconi <lorenzo@kernel.org> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: airoha,en7581-snand + + reg: + items: + - description: spi base address + - description: nfi2spi base address + + clocks: + maxItems: 1 + + clock-names: + items: + - const: spi + +required: + - compatible + - reg + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/en7523-clk.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + spi@1fa10000 { + compatible = "airoha,en7581-snand"; + reg = <0x0 0x1fa10000 0x0 0x140>, + <0x0 0x1fa11000 0x0 0x160>; + + clocks = <&scuclk EN7523_CLK_SPI>; + clock-names = "spi"; + + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "spi-nand"; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <2>; + }; + }; + }; diff --git a/dts/upstream/Bindings/spi/cdns,qspi-nor.yaml b/dts/upstream/Bindings/spi/cdns,qspi-nor.yaml index cca81f89e25..d48ecd6cd5a 100644 --- a/dts/upstream/Bindings/spi/cdns,qspi-nor.yaml +++ b/dts/upstream/Bindings/spi/cdns,qspi-nor.yaml @@ -68,12 +68,13 @@ properties: - items: - enum: - amd,pensando-elba-qspi - - ti,k2g-qspi - - ti,am654-ospi - intel,lgm-qspi - - xlnx,versal-ospi-1.0 - intel,socfpga-qspi + - mobileye,eyeq5-ospi - starfive,jh7110-qspi + - ti,am654-ospi + - ti,k2g-qspi + - xlnx,versal-ospi-1.0 - const: cdns,qspi-nor - const: cdns,qspi-nor @@ -145,7 +146,6 @@ required: - reg - interrupts - clocks - - cdns,fifo-depth - cdns,fifo-width - cdns,trigger-address - '#address-cells' diff --git a/dts/upstream/Bindings/spi/marvell,armada-3700-spi.yaml b/dts/upstream/Bindings/spi/marvell,armada-3700-spi.yaml new file mode 100644 index 00000000000..61caa1d8618 --- /dev/null +++ b/dts/upstream/Bindings/spi/marvell,armada-3700-spi.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/marvell,armada-3700-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 3700 SPI Controller + +description: + The SPI controller on Marvell Armada 3700 SoC. + +maintainers: + - Kousik Sanagavarapu <five231003@gmail.com> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + const: marvell,armada-3700-spi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + num-cs: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + spi0: spi@10600 { + compatible = "marvell,armada-3700-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10600 0x5d>; + clocks = <&nb_perih_clk 7>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; + num-cs = <4>; + }; +... diff --git a/dts/upstream/Bindings/spi/renesas,sh-msiof.yaml b/dts/upstream/Bindings/spi/renesas,sh-msiof.yaml index 00acbbb0f65..49649fc3f95 100644 --- a/dts/upstream/Bindings/spi/renesas,sh-msiof.yaml +++ b/dts/upstream/Bindings/spi/renesas,sh-msiof.yaml @@ -54,6 +54,7 @@ properties: - renesas,msiof-r8a779a0 # R-Car V3U - renesas,msiof-r8a779f0 # R-Car S4-8 - renesas,msiof-r8a779g0 # R-Car V4H + - renesas,msiof-r8a779h0 # R-Car V4M - const: renesas,rcar-gen4-msiof # generic R-Car Gen4 # compatible device - items: diff --git a/dts/upstream/Bindings/spi/spi-armada-3700.txt b/dts/upstream/Bindings/spi/spi-armada-3700.txt deleted file mode 100644 index 1564aa8c02c..00000000000 --- a/dts/upstream/Bindings/spi/spi-armada-3700.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Marvell Armada 3700 SPI Controller - -Required Properties: - -- compatible: should be "marvell,armada-3700-spi" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The interrupt number. The interrupt specifier format depends on - the interrupt controller and of its driver. -- clocks: Must contain the clock source, usually from the North Bridge clocks. -- num-cs: The number of chip selects that is supported by this SPI Controller -- #address-cells: should be 1. -- #size-cells: should be 0. - -Example: - - spi0: spi@10600 { - compatible = "marvell,armada-3700-spi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x10600 0x5d>; - clocks = <&nb_perih_clk 7>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; - num-cs = <4>; - }; diff --git a/dts/upstream/Bindings/spi/st,stm32-qspi.yaml b/dts/upstream/Bindings/spi/st,stm32-qspi.yaml index 8bba965a9ae..3f1a27efff8 100644 --- a/dts/upstream/Bindings/spi/st,stm32-qspi.yaml +++ b/dts/upstream/Bindings/spi/st,stm32-qspi.yaml @@ -46,6 +46,10 @@ properties: - const: tx - const: rx + access-controllers: + minItems: 1 + maxItems: 2 + required: - compatible - reg diff --git a/dts/upstream/Bindings/spi/st,stm32-spi.yaml b/dts/upstream/Bindings/spi/st,stm32-spi.yaml index 4bd9aeb8120..a55c8633c32 100644 --- a/dts/upstream/Bindings/spi/st,stm32-spi.yaml +++ b/dts/upstream/Bindings/spi/st,stm32-spi.yaml @@ -52,6 +52,10 @@ properties: - const: rx - const: tx + access-controllers: + minItems: 1 + maxItems: 2 + required: - compatible - reg diff --git a/dts/upstream/Bindings/spi/ti,qspi.yaml b/dts/upstream/Bindings/spi/ti,qspi.yaml new file mode 100644 index 00000000000..626a915b3d7 --- /dev/null +++ b/dts/upstream/Bindings/spi/ti,qspi.yaml @@ -0,0 +1,96 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/ti,qspi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI QSPI controller + +maintainers: + - Kousik Sanagavarapu <five231003@gmail.com> + +allOf: + - $ref: spi-controller.yaml# + +properties: + compatible: + enum: + - ti,am4372-qspi + - ti,dra7xxx-qspi + + reg: + items: + - description: base registers + - description: mapped memory + + reg-names: + items: + - const: qspi_base + - const: qspi_mmap + + clocks: + maxItems: 1 + + clock-names: + items: + - const: fck + + interrupts: + maxItems: 1 + + num-cs: + minimum: 1 + maximum: 4 + default: 1 + + ti,hwmods: + description: + Name of the hwmod associated to the QSPI. This is for legacy + platforms only. + $ref: /schemas/types.yaml#/definitions/string + deprecated: true + + syscon-chipselects: + description: + Handle to system control region containing QSPI chipselect register + and offset of that register. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to system control register + - description: register offset + + spi-max-frequency: + description: Maximum SPI clocking speed of the controller in Hz. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/dra7.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + spi@4b300000 { + compatible = "ti,dra7xxx-qspi"; + reg = <0x4b300000 0x100>, + <0x5c000000 0x4000000>; + reg-names = "qspi_base", "qspi_mmap"; + syscon-chipselects = <&scm_conf 0x558>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&l4per2_clkctrl DRA7_L4PER2_QSPI_CLKCTRL 25>; + clock-names = "fck"; + num-cs = <4>; + spi-max-frequency = <48000000>; + interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>; + }; +... diff --git a/dts/upstream/Bindings/spi/ti_qspi.txt b/dts/upstream/Bindings/spi/ti_qspi.txt deleted file mode 100644 index 47b184bce41..00000000000 --- a/dts/upstream/Bindings/spi/ti_qspi.txt +++ /dev/null @@ -1,53 +0,0 @@ -TI QSPI controller. - -Required properties: -- compatible : should be "ti,dra7xxx-qspi" or "ti,am4372-qspi". -- reg: Should contain QSPI registers location and length. -- reg-names: Should contain the resource reg names. - - qspi_base: Qspi configuration register Address space - - qspi_mmap: Memory mapped Address space - - (optional) qspi_ctrlmod: Control module Address space -- interrupts: should contain the qspi interrupt number. -- #address-cells, #size-cells : Must be present if the device has sub-nodes -- ti,hwmods: Name of the hwmod associated to the QSPI - -Recommended properties: -- spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Optional properties: -- syscon-chipselects: Handle to system control region contains QSPI - chipselect register and offset of that register. - -NOTE: TI QSPI controller requires different pinmux and IODelay -parameters for Mode-0 and Mode-3 operations, which needs to be set up by -the bootloader (U-Boot). Default configuration only supports Mode-0 -operation. Hence, "spi-cpol" and "spi-cpha" DT properties cannot be -specified in the slave nodes of TI QSPI controller without appropriate -modification to bootloader. - -Example: - -For am4372: -qspi: qspi@47900000 { - compatible = "ti,am4372-qspi"; - reg = <0x47900000 0x100>, <0x30000000 0x4000000>; - reg-names = "qspi_base", "qspi_mmap"; - #address-cells = <1>; - #size-cells = <0>; - spi-max-frequency = <25000000>; - ti,hwmods = "qspi"; -}; - -For dra7xx: -qspi: qspi@4b300000 { - compatible = "ti,dra7xxx-qspi"; - reg = <0x4b300000 0x100>, - <0x5c000000 0x4000000>, - reg-names = "qspi_base", "qspi_mmap"; - syscon-chipselects = <&scm_conf 0x558>; - #address-cells = <1>; - #size-cells = <0>; - spi-max-frequency = <48000000>; - ti,hwmods = "qspi"; -}; |