aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/mach-socfpga
AgeCommit message (Expand)Author
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
2019-12-02common: Move get_ticks() function out of common.hSimon Glass
2019-11-25ARM: socfpga: Unreset NAND in SPL on Gen5Marek Vasut
2019-11-25ARM: socfpga: Add ArriaV ST/SX IDMarek Vasut
2019-11-25ARM: socfpga: Purge pending transactions upon enabling bridges on Gen5Marek Vasut
2019-11-25ARM: socfpga: Actually put bridges into reset on Gen5 in bridge disableMarek Vasut
2019-11-20socfpga: fix include guard in misc.h (arch vs. global)Simon Goldschmidt
2019-11-07arm: socfpga: gen5: fix ERR_PTR_OFFSETSimon Goldschmidt
2019-10-09ARM: socfpga: vining_fpga: Rename VINING|FPGAMarek Vasut
2019-10-08spl: Convert CONFIG_SPL_SIZE_LIMIT to hexSimon Glass
2019-10-08spl: Allow tiny printf() to be controlled in SPL and TPLSimon Glass
2019-08-15arm: socfpga: gen5: don't zero bss in board_init_f()Simon Goldschmidt
2019-08-11env: Move env_set() to env.hSimon Glass
2019-07-21sysreset: add support for socfpga sysresetSimon Goldschmidt
2019-07-21arm: socfpga: rst: add register definition for cold resetSimon Goldschmidt
2019-06-14arm: socfpga: provide default SPL_SIZE_LIMIT for gen5Simon Goldschmidt
2019-05-24ARM: socfpga: Clear PL310 early in SPLMarek Vasut
2019-05-24ARM: socfpga: Pull PL310 clearing into common codeMarek Vasut
2019-05-18CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner
2019-05-14arm: socfpga: Re-add support for Aries MCV SoM and MCVEV[KP] boardWolfgang Grandegger
2019-05-14arm: sofcpga: s10: remove unused ad-hoc reset codeSimon Goldschmidt
2019-05-14arm: socfpga: remove re-added ad-hoc reset codeSimon Goldschmidt
2019-05-10spl: socfpga: Implement fpga bitstream loading with socfpga loadfsTien Fong Chee
2019-05-10ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loadingTien Fong Chee
2019-05-07Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2019-05-06ARM: socfpga: stratix10: Probe FPGA status before bridge enableAng, Chee Hong
2019-05-06ARM: socfpga: stratix10: Disable FPGA2SOC resetAng, Chee Hong
2019-05-06arm: socfpga: Move Stratix 10 SDRAM driver to DMLey Foon Tan
2019-05-06ddr: altera: Compile ALTERA SDRAM in SPL onlyLey Foon Tan
2019-05-05ARM: socfpga: use the pl310 driver to configure the cacheDinh Nguyen
2019-04-29ARM: socfpga: Remove socfpga_sdram_apply_static_cfg()Marek Vasut
2019-04-29ARM: socfpga: Add support for selecting bridges in bridge commandMarek Vasut
2019-04-29ARM: socfpga: Fully unmap the FPGA bridges from L3 spaceMarek Vasut
2019-04-29ARM: socfpga: Disable bridges in SPL unless booting from FPGAMarek Vasut
2019-04-29ARM: socfpga: Factor out handoff register configurationMarek Vasut
2019-04-25arm: socfpga: mailbox: Fix off-by-one error on command length checkingLey Foon Tan
2019-04-25arm: socfpga: gen5: reduce SPL pre-reloc mallocSimon Goldschmidt
2019-04-25arm: socfpga: imply/default common config optionsSimon Goldschmidt
2019-04-17ddr: altera: Stratix10: Add ECC memory scrubbingLey Foon Tan
2019-04-17arm: socfpga: stratix10: Add cpu_has_been_warmreset()Ley Foon Tan
2019-04-17ddr: altera: stratix10: Move SDRAM size check to SDRAM driverLey Foon Tan
2019-04-17arm: socfpga: implement proper peripheral resetSimon Goldschmidt
2019-04-17arm: socfpga: move gen5 SDR driver to DMSimon Goldschmidt
2019-03-09ARM: socfpga: Disable D cache in SPLMarek Vasut
2019-03-09ARM: socfpga: fix data and tag latency values for pl310 cache controllerDinh Nguyen
2019-02-25ARM: socfpga: Clear PL310 early in SPLMarek Vasut
2019-02-25ARM: socfpga: Configure PL310 latenciesMarek Vasut
2019-02-18arm: socfpga: gen5: remove hacked ETH RST handlingSimon Goldschmidt
2019-02-01spl: Kconfig: Replace CONFIG_SPL_EXT_SUPPORT to CONFIG_SPL_FS_EXT4Tien Fong Chee
2019-02-01spl: Kconfig: Replace CONFIG_SPL_FAT_SUPPORT with CONFIG_SPL_FS_FATTien Fong Chee
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-10 17:50:52 +0000