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AgeCommit message (Expand)Author
2023-03-06riscv: semihosting: replace inline assembly with assembly fileAndre Przywara
2023-02-10Correct SPL uses of LMBSimon Glass
2023-02-01riscv: memcpy: check src and dst before copyRick Chen
2022-12-29efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWAREHeinrich Schuchardt
2022-12-08arch/riscv: add semihosting support for RISC-VKautuk Consul
2022-11-03riscv: Rename Andes PLIC to PLICSWYu Chien Peter Lin
2022-10-20riscv: andes_plic.c: use modified IPI schemeYu Chien Peter Lin
2022-09-29dm: core: Drop ofnode_is_available()Simon Glass
2022-09-29treewide: Drop bootm_headers_t typedefSimon Glass
2022-09-26riscv: Introduce AVAILABLE_HARTSRick Chen
2022-09-26spl: introduce SPL_XIP to configNikita Shubin
2022-07-26zynqmp: Run board_get_usable_ram_top() only on main U-BootAshok Reddy Soma
2022-07-26arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLEDMichal Simek
2022-04-06riscv: provide missing base extension functionsHeinrich Schuchardt
2022-03-10event: Convert arch_cpu_init_dm() to use eventsSimon Glass
2022-01-15efi_loader: fix SectionAlignment, FileAlignmentHeinrich Schuchardt
2022-01-15riscv: revert Complete efi header for RV32/64Heinrich Schuchardt
2021-11-08riscv: function to retrieve SBI implementation versionHeinrich Schuchardt
2021-10-13fdtdec: Support reserved-memory flagsThierry Reding
2021-10-13fdtdec: Support compatible string list for reserved memoryThierry Reding
2021-10-08image: Drop IMAGE_ENABLE_OF_LIBFDTSimon Glass
2021-10-07sysreset: provide SBI based sysreset driverHeinrich Schuchardt
2021-10-07riscv: Fix setting no-map in reserved memory nodesSamuel Holland
2021-09-23lmb: riscv: Add arch_lmb_reserve()Marek Vasut
2021-09-07riscv: lib: implement enable_caches for sifive cacheZong Li
2021-09-07common: board_r: support enable_caches for RISC-VZong Li
2021-09-07riscv: show code leading to exceptionHeinrich Schuchardt
2021-08-14efi_loader: add Linux magic to RISC-V crt0Heinrich Schuchardt
2021-07-21riscv: booti: do not force relocation if force_reloc is not setVitaly Wool
2021-06-17riscv: andes_plic: Fix riscv_get_ipi() maskBin Meng
2021-05-19riscv: Drop USE_SPL_FIT_GENERATORBin Meng
2021-05-17riscv: Fix memmove and optimise memcpy when misalignBin Meng
2021-05-17riscv: Fix arch_fixup_fdt always failing without /chosenSean Anderson
2021-05-17riscv: Split SiFive CLINT support between SPL and U-Boot properBin Meng
2021-04-20Add support for stack-protectorJoel Peshkin
2021-04-08riscv: assembler versions of memcpy, memmove, memsetHeinrich Schuchardt
2021-04-08riscv: simplify longjmpHeinrich Schuchardt
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
2021-01-05Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini
2021-01-05dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass
2020-12-14riscv: Complete efi header for RV32/64Leo Yu-Chi Liang
2020-12-14riscv: Fix efi header size for RV32Leo Yu-Chi Liang
2020-12-14riscv: Fix efi header for RV32Atish Patra
2020-12-14riscv: reset after crashHeinrich Schuchardt
2020-10-26riscv: Move timer portions of SiFive CLINT to drivers/timerSean Anderson
2020-10-26riscv: Move Andes PLMT driver to drivers/timerSean Anderson
2020-10-22timer: Return count from timer_ops.get_countSean Anderson
2020-10-05Merge branch 'next'Tom Rini
2020-09-30riscv: Ensure gp is NULL or points to valid dataSean Anderson
2020-09-30riscv: Use a valid bit to ignore already-pending IPIsSean Anderson