1071 files changed, 179989 insertions, 0 deletions

diff --git a/doc/.gitignore b/doc/.gitignore
new file mode 100644
index 00000000000..53752db253e
--- /dev/null
+++ b/doc/.gitignore
@@ -0,0 +1 @@
+output
diff --git a/doc/I2C_Edge_Conditions b/doc/I2C_Edge_Conditions
new file mode 100644
index 00000000000..f4a99687011
--- /dev/null
+++ b/doc/I2C_Edge_Conditions
@@ -0,0 +1,46 @@
+I2C Edge Conditions:
+====================
+
+    I2C devices may be left in a write state if a read was occuring
+    and the CPU was reset. This may result in EEPROM data corruption.
+
+    The edge condition is as follows:
+	1) A read operation begins.
+	2) I2C controller issues a start command.
+	3) The I2C writes the device address.
+	4) The CPU is reset at this point.
+
+    Once the CPU reinitializes and the read is tried again:
+	1) The I2C controller issues a start command.
+	2) The I2C controller writes the device address.
+	3) The I2C controller writes the offset.
+
+    The EEPROM sees:
+	1) START
+	2) device address
+	3) START "this start is ignored by most EEPROMs"
+	4) device address "EEPROM interprets this as offset"
+	5) Offset in device, "EEPROM interprets this as data to write"
+
+    The device will interpret this sequence as a WRITE command and
+    write rubbish into itself, i.e. the "offset" will be interpreted
+    as data to be written in location "device address".
+
+Notes
+-----
+!!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A AMCC 4xx BUG!!!
+
+This reset edge condition could possibly be present in every I2C
+controller and device available. For boards where a I2C bus reset
+function can be implemented a i2c_init_board() function should be
+provided and enabled by #define'ing CONFIG_SYS_I2C_INIT_BOARD in your
+board's config file. Note that this is NOT necessary when using the
+bit-banging I2C driver (common/soft_i2c.c) as this already includes
+the I2C bus reset sequence.
+
+
+Many thanks to Bill Hunter for finding this serious BUG.
+email to: <williamhunter@attbi.com>
+
+Erik Theisen <etheisen@mindspring.com>
+Tue, 5 Mar 2002 23:02:19 -0500 (Wed 05:02 MET)
diff --git a/doc/Makefile b/doc/Makefile
new file mode 100644
index 00000000000..d0904a9f990
--- /dev/null
+++ b/doc/Makefile
@@ -0,0 +1,136 @@
+# -*- makefile -*-
+# Makefile for Sphinx documentation
+#
+
+subdir-y :=
+
+# You can set these variables from the command line.
+SPHINXBUILD   = sphinx-build
+SPHINXOPTS    = -W
+SPHINXDIRS    = .
+_SPHINXDIRS   = $(patsubst $(srctree)/doc/%/conf.py,%,$(wildcard $(srctree)/doc/*/conf.py))
+SPHINX_CONF   = conf.py
+PAPER         =
+BUILDDIR      = $(obj)/output
+PDFLATEX      = xelatex
+LATEXOPTS     = -interaction=batchmode
+
+# User-friendly check for sphinx-build
+HAVE_SPHINX := $(shell if which $(SPHINXBUILD) >/dev/null 2>&1; then echo 1; else echo 0; fi)
+
+ifeq ($(HAVE_SPHINX),0)
+
+.DEFAULT:
+	$(warning The '$(SPHINXBUILD)' command was not found. Make sure you have Sphinx installed and in PATH, or set the SPHINXBUILD make variable to point to the full path of the '$(SPHINXBUILD)' executable.)
+	@echo
+	@./scripts/sphinx-pre-install
+	@echo "  SKIP    Sphinx $@ target."
+
+else # HAVE_SPHINX
+
+# User-friendly check for pdflatex
+HAVE_PDFLATEX := $(shell if which $(PDFLATEX) >/dev/null 2>&1; then echo 1; else echo 0; fi)
+
+# Internal variables.
+PAPEROPT_a4     = -D latex_paper_size=a4
+PAPEROPT_letter = -D latex_paper_size=letter
+KERNELDOC       = $(srctree)/scripts/kernel-doc
+KERNELDOC_CONF  = -D kerneldoc_srctree=$(srctree) -D kerneldoc_bin=$(KERNELDOC)
+ALLSPHINXOPTS   =  $(KERNELDOC_CONF) $(PAPEROPT_$(PAPER)) $(SPHINXOPTS)
+# the i18n builder cannot share the environment and doctrees with the others
+I18NSPHINXOPTS  = $(PAPEROPT_$(PAPER)) $(SPHINXOPTS) .
+
+# commands; the 'cmd' from scripts/Kbuild.include is not *loopable*
+loop_cmd = $(echo-cmd) $(cmd_$(1)) || exit;
+
+# $2 sphinx builder e.g. "html"
+# $3 name of the build subfolder / e.g. "media", used as:
+#    * dest folder relative to $(BUILDDIR) and
+#    * cache folder relative to $(BUILDDIR)/.doctrees
+# $4 dest subfolder e.g. "man" for man pages at media/man
+# $5 reST source folder relative to $(srctree)/$(src),
+#    e.g. "media" for the linux-tv book-set at ./doc/media
+
+quiet_cmd_sphinx = SPHINX  $@ --> file://$(abspath $(BUILDDIR)/$3/$4)
+      cmd_sphinx = $(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=doc/media $2 && \
+	PYTHONDONTWRITEBYTECODE=1 \
+	BUILDDIR=$(abspath $(BUILDDIR)) SPHINX_CONF=$(abspath $(srctree)/$(src)/$5/$(SPHINX_CONF)) \
+	$(SPHINXBUILD) \
+	-j$(shell nproc) \
+	-b $2 \
+	-j auto \
+	-c $(abspath $(srctree)/$(src)) \
+	-d $(abspath $(BUILDDIR)/.doctrees/$3) \
+	-D version=$(KERNELVERSION) -D release=$(KERNELRELEASE) \
+	$(ALLSPHINXOPTS) \
+	$(abspath $(srctree)/$(src)/$5) \
+	$(abspath $(BUILDDIR)/$3/$4)
+
+htmldocs:
+	@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var)))
+
+texinfodocs:
+	@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,texinfo,$(var),texinfo,$(var)))
+
+# Note: the 'info' Make target is generated by sphinx itself when
+# running the texinfodocs target defined above.
+infodocs: texinfodocs
+	$(MAKE) -C $(BUILDDIR)/texinfo info
+
+linkcheckdocs:
+	@$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,linkcheck,$(var),,$(var)))
+
+latexdocs:
+	@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,latex,$(var),latex,$(var)))
+
+ifeq ($(HAVE_PDFLATEX),0)
+
+pdfdocs:
+	$(warning The '$(PDFLATEX)' command was not found. Make sure you have it installed and in PATH to produce PDF output.)
+	@echo "  SKIP    Sphinx $@ target."
+
+else # HAVE_PDFLATEX
+
+pdfdocs: latexdocs
+	$(foreach var,$(SPHINXDIRS), $(MAKE) PDFLATEX=$(PDFLATEX) LATEXOPTS="$(LATEXOPTS)" -C $(BUILDDIR)/$(var)/latex || exit;)
+
+endif # HAVE_PDFLATEX
+
+epubdocs:
+	@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,epub,$(var),epub,$(var)))
+
+xmldocs:
+	@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,xml,$(var),xml,$(var)))
+
+endif # HAVE_SPHINX
+
+# The following targets are independent of HAVE_SPHINX, and the rules should
+# work or silently pass without Sphinx.
+
+refcheckdocs:
+	$(Q)cd $(srctree);scripts/documentation-file-ref-check
+
+cleandocs:
+	$(Q)rm -rf $(BUILDDIR)
+	$(Q)$(MAKE) BUILDDIR=$(abspath $(BUILDDIR)) $(build)=doc/media clean
+
+dochelp:
+	@echo  ' U-Boot documentation in different formats from ReST:'
+	@echo  '  htmldocs        - HTML'
+	@echo  '  texinfodocs     - Texinfo'
+	@echo  '  infodocs        - Info'
+	@echo  '  latexdocs       - LaTeX'
+	@echo  '  pdfdocs         - PDF'
+	@echo  '  epubdocs        - EPUB'
+	@echo  '  xmldocs         - XML'
+	@echo  '  linkcheckdocs   - check for broken external links (will connect to external hosts)'
+	@echo  '  refcheckdocs    - check for references to non-existing files under Documentation'
+	@echo  '  cleandocs       - clean all generated files'
+	@echo
+	@echo  '  make SPHINXDIRS="s1 s2" [target] Generate only docs of folder s1, s2'
+	@echo  '  valid values for SPHINXDIRS are: $(_SPHINXDIRS)'
+	@echo
+	@echo  '  make SPHINX_CONF={conf-file} [target] use *additional* sphinx-build'
+	@echo  '  configuration. This is e.g. useful to build with nit-picking config.'
+	@echo
+	@echo  '  Default location for the generated documents is doc/output'
diff --git a/doc/README.Heterogeneous-SoCs b/doc/README.Heterogeneous-SoCs
new file mode 100644
index 00000000000..9da652e459b
--- /dev/null
+++ b/doc/README.Heterogeneous-SoCs
@@ -0,0 +1,105 @@
+DSP side awareness for Freescale heterogeneous multicore chips based on
+StarCore and Power Architecture
+===============================================================
+powerpc/mpc85xx code ve APIs and function to get the number,
+configuration and frequencies of all PowerPC cores and devices
+connected to them, but it didnt have the similar code ofr HEterogeneous
+SC3900/DSP cores and such devices like CPRI, MAPLE, MAPLE-ULB etc.
+
+Code for DSP side awareness provides such functionality for Freescale
+Heterogeneous SoCs which are chasis-2 compliant like B4860 and B4420
+
+As part of this feature, following changes have been made:
+==========================================================
+
+1. Changed files:
+=================
+- arch/powerpc/cpu/mpc85xx/cpu.c
+
+Code added in this file to print the DSP cores and other device's(CPRI,
+MAPLE etc) frequencies
+
+- arch/powerpc/cpu/mpc85xx/speed.c
+
+Added Defines and code to extract the frequncy information for all
+required cores and devices from RCW and System frequency
+
+- arch/powerpc/cpu/mpc8xxx/cpu.c
+
+Added API to get the number of SC cores in running system and Their BIT
+MASK, similar to the code written for PowerPC
+
+- arch/powerpc/include/asm/config_mpc85xx.h
+
+Added top level CONFIG to identify presence of HETEROGENUOUS clusters
+in the system and CONFIGS for SC3900/DSP components
+
+- arch/powerpc/include/asm/processor.h
+- include/common.h
+
+Added newly added Functions Declaration
+
+- include/e500.h
+
+Global structure updated for dsp cores and other components
+
+2. CONFIGs ADDED
+================
+
+CONFIG_HETROGENOUS_CLUSTERS	- Define for checking the presence of
+				  DSP/SC3900 core clusters
+
+CONFIG_SYS_FSL_NUM_CC_PLLS	- Define for number of PLLs
+
+Though there are only 4 PLLs in B4, but in sequence of PLLs from PLL1 -
+PLL5, PLL3 is Reserved(as mentioned in RM), so this define contains the
+value as 5 not 4, to iterate over all PLLs while coding
+
+CONFIG_SYS_MAPLE		- Define for MAPLE Baseband Accelerator
+CONFIG_SYS_CPRI			- Define for CPRI Interface
+CONFIG_PPC_CLUSTER_START	- Start index of ppc clusters
+CONFIG_DSP_CLUSTER_START	- Start index of dsp clusters
+
+Following are the defines for PLL's index that provide the Clocking to
+CPRI, ULB and ETVE components
+
+CONFIG_SYS_CPRI_CLK		- Define PLL index for CPRI clock
+CONFIG_SYS_ULB_CLK		- Define PLL index for ULB clock
+CONFIG_SYS_ETVPE_CLK		- Define PLL index for ETVPE clock
+
+3. Changes in MPC85xx_SYS_INFO Global structure
+===============================================
+
+DSP cores and other device's components have been added in this structure.
+
+freq_processor_dsp[CONFIG_MAX_DSP_CPUS]	- Array to contain the DSP core's frequencies
+freq_cpri				- To store CPRI frequency
+freq_maple				- To store MAPLE frequency
+freq_maple_ulb				- To store MAPLE-ULB frequency
+freq_maple_etvpe			- To store MAPLE-eTVPE frequency
+
+4. U-BOOT LOGS
+==============
+4.1 B4860QDS board
+    Boot from NOR flash
+
+U-Boot 2014.07-00222-g70587a8-dirty (Aug 07 2014 - 13:15:47)
+
+CPU0:  B4860E, Version: 2.0, (0x86880020)
+Core:  e6500, Version: 2.0, (0x80400020) Clock Configuration:
+       CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz,
+       DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz,
+       DSP CPU4:1200 MHz, DSP CPU5:1200 MHz,
+       CCB:666.667 MHz,
+       DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz
+       CPRI:600  MHz
+       MAPLE:600  MHz, MAPLE-ULB:800  MHz, MAPLE-eTVPE:1000 MHz
+       FMAN1: 666.667 MHz
+       QMAN:  333.333 MHz
+
+CPUn	 -  PowerPC core
+DSP CPUn -  SC3900 core
+
+Shaveta Leekha(shaveta@freescale.com)
+Created August 7, 2014
+===========================================
diff --git a/doc/README.JFFS2_NAND b/doc/README.JFFS2_NAND
new file mode 100644
index 00000000000..92fa0f6ea86
--- /dev/null
+++ b/doc/README.JFFS2_NAND
@@ -0,0 +1,8 @@
+JFFS2 NAND support:
+
+To enable, use the following #define in the board configuration file:
+
+#define CONFIG_JFFS2_NAND
+
+Configuration of partitions is similar to how this is done in  U-Boot
+for  JFFS2  on top NOR flash.
diff --git a/doc/README.LED b/doc/README.LED
new file mode 100644
index 00000000000..c21c9d53ec3
--- /dev/null
+++ b/doc/README.LED
@@ -0,0 +1,77 @@
+Status LED
+========================================
+
+This README describes the status LED API.
+
+The API is defined by the include file include/status_led.h
+
+The first step is to enable CONFIG_LED_STATUS in menuconfig:
+> Device Drivers > LED Support.
+
+If the LED support is only for specific board, enable
+CONFIG_LED_STATUS_BOARD_SPECIFIC in the menuconfig.
+
+Status LEDS 0 to 5 are enabled by the following configurations at menuconfig:
+CONFIG_STATUS_LED0, CONFIG_STATUS_LED1, ... CONFIG_STATUS_LED5
+
+The following should be configured for each of the enabled LEDs:
+CONFIG_STATUS_LED_BIT<n>
+CONFIG_STATUS_LED_STATE<n>
+CONFIG_STATUS_LED_FREQ<n>
+Where <n> is an integer 1 through 5 (empty for 0).
+
+CONFIG_STATUS_LED_BIT is passed into the __led_* functions to identify which LED
+is being acted on. As such, the value choose must be unique with with respect to
+the other CONFIG_STATUS_LED_BIT's. Mapping the value to a physical LED is the
+reponsiblity of the __led_* function.
+
+CONFIG_STATUS_LED_STATE is the initial state of the LED. It should be set to one
+of these values: CONFIG_LED_STATUS_OFF or CONFIG_LED_STATUS_ON.
+
+CONFIG_STATUS_LED_FREQ determines the LED blink frequency.
+Values range from 2 to 10.
+
+Some other LED macros
+---------------------
+
+CONFIG_STATUS_LED_BOOT is the LED to light when the board is booting.
+This must be a valid LED number (0-5).
+
+CONFIG_STATUS_LED_RED is the red LED. It is used to signal errors. This must be
+a valid LED number (0-5). Other similar color LED's macros are
+CONFIG_STATUS_LED_GREEN, CONFIG_STATUS_LED_YELLOW and CONFIG_STATUS_LED_BLUE.
+
+General LED functions
+---------------------
+The following functions should be defined:
+
+__led_init is called once to initialize the LED to CONFIG_STATUS_LED_STATE.
+One time start up code should be placed here.
+
+__led_set is called to change the state of the LED.
+
+__led_toggle is called to toggle the current state of the LED.
+
+Colour LED
+========================================
+
+Colour LED's are at present only used by ARM.
+
+The functions names explain their purpose.
+
+coloured_LED_init
+red_LED_on
+red_LED_off
+green_LED_on
+green_LED_off
+yellow_LED_on
+yellow_LED_off
+blue_LED_on
+blue_LED_off
+
+These are weakly defined in arch/arm/lib/board.c to noops. Where applicable, define
+these functions in the board specific source.
+
+TBD : Describe older board dependent macros similar to what is done for
+
+TBD : Describe general support via asm/status_led.h
diff --git a/doc/README.OFT b/doc/README.OFT
new file mode 100644
index 00000000000..dd1c632bc92
--- /dev/null
+++ b/doc/README.OFT
@@ -0,0 +1,28 @@
+Open Firmware Flat Tree and usage.
+----------------------------------
+
+As part of the ongoing cleanup of the Linux PPC trees, the preferred
+way to pass bootloader and board setup information is the open
+firmware flat tree.
+
+Please take a look at the following email discussion for some
+background.
+
+  http://ozlabs.org/pipermail/linuxppc-dev/2005-August/019408.html
+  http://ozlabs.org/pipermail/linuxppc-dev/2005-August/019362.html
+
+The generated tree is part static and part dynamic.
+
+There is a static part which is compiled in with DTC and a dynamic
+part which is programmatically appended.
+
+You'll need a fairly recent DTC tool, which is available by git at
+
+  rsync://ozlabs.org/dtc/dtc.git
+
+The xxd binary dumper is needed too which I got from
+
+  ftp://ftp.uni-erlangen.de/pub/utilities/etc/xxd-1.10.tar.gz
+
+
+Pantelis Antoniou, 13 Oct 2005
diff --git a/doc/README.POST b/doc/README.POST
new file mode 100644
index 00000000000..c614ea44a28
--- /dev/null
+++ b/doc/README.POST
@@ -0,0 +1,727 @@
+Power-On-Self-Test support in U-Boot
+------------------------------------
+
+This project is to support Power-On-Self-Test (POST) in U-Boot.
+
+1. High-level requirements
+
+The key requirements for this project are as follows:
+
+1) The project shall develop a flexible framework for implementing
+   and running Power-On-Self-Test in U-Boot. This framework shall
+   possess the following features:
+
+   o) Extensibility
+
+      The framework shall allow adding/removing/replacing POST tests.
+      Also, standalone POST tests shall be supported.
+
+   o) Configurability
+
+      The framework shall allow run-time configuration of the lists
+      of tests running on normal/power-fail booting.
+
+   o) Controllability
+
+      The framework shall support manual running of the POST tests.
+
+2) The results of tests shall be saved so that it will be possible to
+   retrieve them from Linux.
+
+3) The following POST tests shall be developed for MPC823E-based
+   boards:
+
+   o) CPU test
+   o) Cache test
+   o) Memory test
+   o) Ethernet test
+   o) Serial channels test
+   o) Watchdog timer test
+   o) RTC test
+   o) I2C test
+   o) SPI test
+   o) USB test
+
+4) The LWMON board shall be used for reference.
+
+2. Design
+
+This section details the key points of the design for the project.
+The whole project can be divided into two independent tasks:
+enhancing U-Boot/Linux to provide a common framework for running POST
+tests and developing such tests for particular hardware.
+
+2.1. Hardware-independent POST layer
+
+A new optional module will be added to U-Boot, which will run POST
+tests and collect their results at boot time. Also, U-Boot will
+support running POST tests manually at any time by executing a
+special command from the system console.
+
+The list of available POST tests will be configured at U-Boot build
+time. The POST layer will allow the developer to add any custom POST
+tests. All POST tests will be divided into the following groups:
+
+  1) Tests running on power-on booting only
+
+     This group will contain those tests that run only once on
+     power-on reset (e.g. watchdog test)
+
+  2) Tests running on normal booting only
+
+     This group will contain those tests that do not take much
+     time and can be run on the regular basis (e.g. CPU test)
+
+  3) Tests running in special "slow test mode" only
+
+     This group will contain POST tests that consume much time
+     and cannot be run regularly (e.g. strong memory test, I2C test)
+
+  4) Manually executed tests
+
+     This group will contain those tests that can be run manually.
+
+If necessary, some tests may belong to several groups simultaneously.
+For example, SDRAM test may run in both normal and "slow test" mode.
+In normal mode, SDRAM test may perform a fast superficial memory test
+only, while running in slow test mode it may perform a full memory
+check-up.
+
+Also, all tests will be discriminated by the moment they run at.
+Specifically, the following groups will be singled out:
+
+  1) Tests running before relocating to RAM
+
+     These tests will run immediately after initializing RAM
+     as to enable modifying it without taking care of its
+     contents. Basically, this group will contain memory tests
+     only.
+
+  2) Tests running after relocating to RAM
+
+     These tests will run immediately before entering the main
+     loop as to guarantee full hardware initialization.
+
+The POST layer will also distinguish a special group of tests that
+may cause system rebooting (e.g. watchdog test). For such tests, the
+layer will automatically detect rebooting and will notify the test
+about it.
+
+2.1.1. POST layer interfaces
+
+This section details the interfaces between the POST layer and the
+rest of U-Boot.
+
+The following flags will be defined:
+
+#define POST_POWERON		0x01	/* test runs on power-on booting */
+#define POST_NORMAL		0x02	/* test runs on normal booting */
+#define POST_SLOWTEST		0x04	/* test is slow, enabled by key press */
+#define POST_POWERTEST		0x08	/* test runs after watchdog reset */
+#define POST_ROM		0x100	/* test runs in ROM */
+#define POST_RAM		0x200	/* test runs in RAM */
+#define POST_MANUAL		0x400	/* test can be executed manually */
+#define POST_REBOOT		0x800	/* test may cause rebooting */
+#define POST_PREREL             0x1000  /* test runs before relocation */
+
+The POST layer will export the following interface routines:
+
+  o) int post_run(struct bd_info *bd, char *name, int flags);
+
+     This routine will run the test (or the group of tests) specified
+     by the name and flag arguments. More specifically, if the name
+     argument is not NULL, the test with this name will be performed,
+     otherwise all tests running in ROM/RAM (depending on the flag
+     argument) will be executed. This routine will be called at least
+     twice with name set to NULL, once from board_init_f() and once
+     from board_init_r(). The flags argument will also specify the
+     mode the test is executed in (power-on, normal, power-fail,
+     manual).
+
+  o) int post_info(char *name);
+
+     This routine will print the list of all POST tests that can be
+     executed manually if name is NULL, and the description of a
+     particular test if name is not NULL.
+
+  o) int post_log(char *format, ...);
+
+     This routine will be called from POST tests to log their
+     results. Basically, this routine will print the results to
+     stderr. The format of the arguments and the return value
+     will be identical to the printf() routine.
+
+Also, the following board-specific routines will be called from the
+U-Boot common code:
+
+  o) int post_hotkeys_pressed(gd_t *gd)
+
+     This routine will scan the keyboard to detect if a magic key
+     combination has been pressed, or otherwise detect if the
+     power-on long-running tests shall be executed or not ("normal"
+     versus "slow" test mode).
+
+The list of available POST tests be kept in the post_tests array
+filled at U-Boot build time. The format of entry in this array will
+be as follows:
+
+struct post_test {
+    char *name;
+    char *cmd;
+    char *desc;
+    int flags;
+    int (*test)(struct bd_info *bd, int flags);
+};
+
+  o) name
+
+     This field will contain a short name of the test, which will be
+     used in logs and on listing POST tests (e.g. CPU test).
+
+  o) cmd
+
+     This field will keep a name for identifying the test on manual
+     testing (e.g. cpu). For more information, refer to section
+     "Command line interface".
+
+  o) desc
+
+     This field will contain a detailed description of the test,
+     which will be printed on user request. For more information, see
+     section "Command line interface".
+
+  o) flags
+
+     This field will contain a combination of the bit flags described
+     above, which will specify the mode the test is running in
+     (power-on, normal, power-fail or manual mode), the moment it
+     should be run at (before or after relocating to RAM), whether it
+     can cause system rebooting or not.
+
+  o) test
+
+     This field will contain a pointer to the routine that will
+     perform the test, which will take 2 arguments. The first
+     argument will be a pointer to the board info structure, while
+     the second will be a combination of bit flags specifying the
+     mode the test is running in (POST_POWERON, POST_NORMAL,
+     POST_SLOWTEST, POST_MANUAL) and whether the last execution of
+     the test caused system rebooting (POST_REBOOT). The routine will
+     return 0 on successful execution of the test, and 1 if the test
+     failed.
+
+The lists of the POST tests that should be run at power-on/normal/
+power-fail booting will be kept in the environment. Namely, the
+following environment variables will be used: post_poweron,
+powet_normal, post_slowtest.
+
+2.1.2. Test results
+
+The results of tests will be collected by the POST layer. The POST
+log will have the following format:
+
+...
+--------------------------------------------
+START <name>
+<test-specific output>
+[PASSED|FAILED]
+--------------------------------------------
+...
+
+Basically, the results of tests will be printed to stderr. This
+feature may be enhanced in future to spool the log to a serial line,
+save it in non-volatile RAM (NVRAM), transfer it to a dedicated
+storage server and etc.
+
+2.1.3. Integration issues
+
+All POST-related code will be #ifdef'ed with the CONFIG_POST macro.
+This macro will be defined in the config_<board>.h file for those
+boards that need POST. The CFG_POST macro will contain the list of
+POST tests for the board. The macro will have the format of array
+composed of post_test structures:
+
+#define CFG_POST \
+	{
+		"On-board peripherals test", "board", \
+		"  This test performs full check-up of the " \
+		"on-board hardware.", \
+		POST_RAM | POST_SLOWTEST, \
+		&board_post_test \
+	}
+
+A new file, post.h, will be created in the include/ directory. This
+file will contain common POST declarations and will define a set of
+macros that will be reused for defining CFG_POST. As an example,
+the following macro may be defined:
+
+#define POST_CACHE \
+	{
+		"Cache test", "cache", \
+		"  This test verifies the CPU cache operation.", \
+		POST_RAM | POST_NORMAL, \
+		&cache_post_test \
+	}
+
+A new subdirectory will be created in the U-Boot root directory. It
+will contain the source code of the POST layer and most of POST
+tests. Each POST test in this directory will be placed into a
+separate file (it will be needed for building standalone tests). Some
+POST tests (mainly those for testing peripheral devices) will be
+located in the source files of the drivers for those devices. This
+way will be used only if the test subtantially uses the driver.
+
+2.1.4. Standalone tests
+
+The POST framework will allow to develop and run standalone tests. A
+user-space library will be developed to provide the POST interface
+functions to standalone tests.
+
+2.1.5. Command line interface
+
+A new command, diag, will be added to U-Boot. This command will be
+used for listing all available hardware tests, getting detailed
+descriptions of them and running these tests.
+
+More specifically, being run without any arguments, this command will
+print the list of all available hardware tests:
+
+=> diag
+Available hardware tests:
+  cache             - cache test
+  cpu               - CPU test
+  enet              - SCC/FCC ethernet test
+Use 'diag [<test1> [<test2>]] ... ' to get more info.
+Use 'diag run [<test1> [<test2>]] ... ' to run tests.
+=>
+
+If the first argument to the diag command is not 'run', detailed
+descriptions of the specified tests will be printed:
+
+=> diag cpu cache
+cpu - CPU test
+  This test verifies the arithmetic logic unit of CPU.
+cache - cache test
+  This test verifies the CPU cache operation.
+=>
+
+If the first argument to diag is 'run', the specified tests will be
+executed. If no tests are specified, all available tests will be
+executed.
+
+It will be prohibited to execute tests running in ROM manually. The
+'diag' command will not display such tests and/or run them.
+
+2.1.6. Power failure handling
+
+The Linux kernel will be modified to detect power failures and
+automatically reboot the system in such cases. It will be assumed
+that the power failure causes a system interrupt.
+
+To perform correct system shutdown, the kernel will register a
+handler of the power-fail IRQ on booting. Being called, the handler
+will run /sbin/reboot using the call_usermodehelper() routine.
+/sbin/reboot will automatically bring the system down in a secure
+way. This feature will be configured in/out from the kernel
+configuration file.
+
+The POST layer of U-Boot will check whether the system runs in
+power-fail mode. If it does, the system will be powered off after
+executing all hardware tests.
+
+2.1.7. Hazardous tests
+
+Some tests may cause system rebooting during their execution. For
+some tests, this will indicate a failure, while for the Watchdog
+test, this means successful operation of the timer.
+
+In order to support such tests, the following scheme will be
+implemented. All the tests that may cause system rebooting will have
+the POST_REBOOT bit flag set in the flag field of the correspondent
+post_test structure. Before starting tests marked with this bit flag,
+the POST layer will store an identification number of the test in a
+location in IMMR. On booting, the POST layer will check the value of
+this variable and if it is set will skip over the tests preceding the
+failed one. On second execution of the failed test, the POST_REBOOT
+bit flag will be set in the flag argument to the test routine. This
+will allow to detect system rebooting on the previous iteration. For
+example, the watchdog timer test may have the following
+declaration/body:
+
+...
+#define POST_WATCHDOG \
+	{
+		"Watchdog timer test", "watchdog", \
+		"  This test checks the watchdog timer.", \
+		POST_RAM | POST_POWERON | POST_REBOOT, \
+		&watchdog_post_test \
+	}
+...
+
+...
+int watchdog_post_test(struct bd_info *bd, int flags)
+{
+	unsigned long start_time;
+
+	if (flags & POST_REBOOT) {
+		/* Test passed */
+		return 0;
+	} else {
+		/* disable interrupts */
+		disable_interrupts();
+		/* 10-second delay */
+		...
+		/* if we've reached this, the watchdog timer does not work */
+		enable_interrupts();
+		return 1;
+	}
+}
+...
+
+2.2. Hardware-specific details
+
+This project will also develop a set of POST tests for MPC8xx- based
+systems. This section provides technical details of how it will be
+done.
+
+2.2.1. Generic PPC tests
+
+The following generic POST tests will be developed:
+
+  o) CPU test
+
+     This test will check the arithmetic logic unit (ALU) of CPU. The
+     test will take several milliseconds and will run on normal
+     booting.
+
+  o) Cache test
+
+     This test will verify the CPU cache (L1 cache). The test will
+     run on normal booting.
+
+  o) Memory test
+
+     This test will examine RAM and check it for errors. The test
+     will always run on booting. On normal booting, only a limited
+     amount of RAM will be checked. On power-fail booting a fool
+     memory check-up will be performed.
+
+2.2.1.1. CPU test
+
+This test will verify the following ALU instructions:
+
+  o) Condition register istructions
+
+     This group will contain: mtcrf, mfcr, mcrxr, crand, crandc,
+     cror, crorc, crxor, crnand, crnor, creqv, mcrf.
+
+     The mtcrf/mfcr instructions will be tested by loading different
+     values into the condition register (mtcrf), moving its value to
+     a general-purpose register (mfcr) and comparing this value with
+     the expected one. The mcrxr instruction will be tested by
+     loading a fixed value into the XER register (mtspr), moving XER
+     value to the condition register (mcrxr), moving it to a
+     general-purpose register (mfcr) and comparing the value of this
+     register with the expected one. The rest of instructions will be
+     tested by loading a fixed value into the condition register
+     (mtcrf), executing each instruction several times to modify all
+     4-bit condition fields, moving the value of the conditional
+     register to a general-purpose register (mfcr) and comparing it
+     with the expected one.
+
+  o) Integer compare instructions
+
+     This group will contain: cmp, cmpi, cmpl, cmpli.
+
+     To verify these instructions the test will run them with
+     different combinations of operands, read the condition register
+     value and compare it with the expected one. More specifically,
+     the test will contain a pre-built table containing the
+     description of each test case: the instruction, the values of
+     the operands, the condition field to save the result in and the
+     expected result.
+
+  o) Arithmetic instructions
+
+     This group will contain: add, addc, adde, addme, addze, subf,
+     subfc, subfe, subme, subze, mullw, mulhw, mulhwu, divw, divwu,
+     extsb, extsh.
+
+     The test will contain a pre-built table of instructions,
+     operands, expected results and expected states of the condition
+     register. For each table entry, the test will cyclically use
+     different sets of operand registers and result registers. For
+     example, for instructions that use 3 registers on the first
+     iteration r0/r1 will be used as operands and r2 for result. On
+     the second iteration, r1/r2 will be used as operands and r3 as
+     for result and so on. This will enable to verify all
+     general-purpose registers.
+
+  o) Logic instructions
+
+     This group will contain: and, andc, andi, andis, or, orc, ori,
+     oris, xor, xori, xoris, nand, nor, neg, eqv, cntlzw.
+
+     The test scheme will be identical to that from the previous
+     point.
+
+  o) Shift instructions
+
+     This group will contain: slw, srw, sraw, srawi, rlwinm, rlwnm,
+     rlwimi
+
+     The test scheme will be identical to that from the previous
+     point.
+
+  o) Branch instructions
+
+     This group will contain: b, bl, bc.
+
+     The first 2 instructions (b, bl) will be verified by jumping to
+     a fixed address and checking whether control was transferred to
+     that very point. For the bl instruction the value of the link
+     register will be checked as well (using mfspr). To verify the bc
+     instruction various combinations of the BI/BO fields, the CTR
+     and the condition register values will be checked. The list of
+     such combinations will be pre-built and linked in U-Boot at
+     build time.
+
+  o) Load/store instructions
+
+     This group will contain: lbz(x)(u), lhz(x)(u), lha(x)(u),
+     lwz(x)(u), stb(x)(u), sth(x)(u), stw(x)(u).
+
+     All operations will be performed on a 16-byte array. The array
+     will be 4-byte aligned. The base register will point to offset
+     8. The immediate offset (index register) will range in [-8 ...
+     +7]. The test cases will be composed so that they will not cause
+     alignment exceptions. The test will contain a pre-built table
+     describing all test cases. For store instructions, the table
+     entry will contain: the instruction opcode, the value of the
+     index register and the value of the source register. After
+     executing the instruction, the test will verify the contents of
+     the array and the value of the base register (it must change for
+     "store with update" instructions). For load instructions, the
+     table entry will contain: the instruction opcode, the array
+     contents, the value of the index register and the expected value
+     of the destination register. After executing the instruction,
+     the test will verify the value of the destination register and
+     the value of the base register (it must change for "load with
+     update" instructions).
+
+  o) Load/store multiple/string instructions
+
+
+The CPU test will run in RAM in order to allow run-time modification
+of the code to reduce the memory footprint.
+
+2.2.1.2 Special-Purpose Registers Tests
+
+TBD.
+
+2.2.1.3. Cache test
+
+To verify the data cache operation the following test scenarios will
+be used:
+
+  1) Basic test #1
+
+    - turn on the data cache
+    - switch the data cache to write-back or write-through mode
+    - invalidate the data cache
+    - write the negative pattern to a cached area
+    - read the area
+
+    The negative pattern must be read at the last step
+
+  2) Basic test #2
+
+    - turn on the data cache
+    - switch the data cache to write-back or write-through mode
+    - invalidate the data cache
+    - write the zero pattern to a cached area
+    - turn off the data cache
+    - write the negative pattern to the area
+    - turn on the data cache
+    - read the area
+
+    The negative pattern must be read at the last step
+
+  3) Write-through mode test
+
+    - turn on the data cache
+    - switch the data cache to write-through mode
+    - invalidate the data cache
+    - write the zero pattern to a cached area
+    - flush the data cache
+    - write the negative pattern to the area
+    - turn off the data cache
+    - read the area
+
+    The negative pattern must be read at the last step
+
+  4) Write-back mode test
+
+    - turn on the data cache
+    - switch the data cache to write-back mode
+    - invalidate the data cache
+    - write the negative pattern to a cached area
+    - flush the data cache
+    - write the zero pattern to the area
+    - invalidate the data cache
+    - read the area
+
+    The negative pattern must be read at the last step
+
+To verify the instruction cache operation the following test
+scenarios will be used:
+
+  1) Basic test #1
+
+    - turn on the instruction cache
+    - unlock the entire instruction cache
+    - invalidate the instruction cache
+    - lock a branch instruction in the instruction cache
+    - replace the branch instruction with "nop"
+    - jump to the branch instruction
+    - check that the branch instruction was executed
+
+  2) Basic test #2
+
+    - turn on the instruction cache
+    - unlock the entire instruction cache
+    - invalidate the instruction cache
+    - jump to a branch instruction
+    - check that the branch instruction was executed
+    - replace the branch instruction with "nop"
+    - invalidate the instruction cache
+    - jump to the branch instruction
+    - check that the "nop" instruction was executed
+
+The CPU test will run in RAM in order to allow run-time modification
+of the code.
+
+2.2.1.4. Memory test
+
+The memory test will verify RAM using sequential writes and reads
+to/from RAM. Specifically, there will be several test cases that will
+use different patterns to verify RAM. Each test case will first fill
+a region of RAM with one pattern and then read the region back and
+compare its contents with the pattern. The following patterns will be
+used:
+
+ 1) zero pattern (0x00000000)
+ 2) negative pattern (0xffffffff)
+ 3) checkerboard pattern (0x55555555, 0xaaaaaaaa)
+ 4) bit-flip pattern ((1 << (offset % 32)), ~(1 << (offset % 32)))
+ 5) address pattern (offset, ~offset)
+
+Patterns #1, #2 will help to find unstable bits. Patterns #3, #4 will
+be used to detect adherent bits, i.e. bits whose state may randomly
+change if adjacent bits are modified. The last pattern will be used
+to detect far-located errors, i.e. situations when writing to one
+location modifies an area located far from it. Also, usage of the
+last pattern will help to detect memory controller misconfigurations
+when RAM represents a cyclically repeated portion of a smaller size.
+
+Being run in normal mode, the test will verify only small 4Kb regions
+of RAM around each 1Mb boundary. For example, for 64Mb RAM the
+following areas will be verified: 0x00000000-0x00000800,
+0x000ff800-0x00100800, 0x001ff800-0x00200800, ..., 0x03fff800-
+0x04000000. If the test is run in power-fail mode, it will verify the
+whole RAM.
+
+The memory test will run in ROM before relocating U-Boot to RAM in
+order to allow RAM modification without saving its contents.
+
+2.2.2. Common tests
+
+This section describes tests that are not based on any hardware
+peculiarities and use common U-Boot interfaces only. These tests do
+not need any modifications for porting them to another board/CPU.
+
+2.2.2.1. I2C test
+
+For verifying the I2C bus, a full I2C bus scanning will be performed
+using the i2c_probe() routine. If a board defines
+CFG_SYS_POST_I2C_ADDRS the I2C test will pass if all devices
+listed in CFG_SYS_POST_I2C_ADDRS are found, and no additional
+devices are detected.  If CFG_SYS_POST_I2C_ADDRS is not defined
+the test will pass if any I2C device is found.
+
+The CFG_SYS_POST_I2C_IGNORES define can be used to list I2C
+devices which may or may not be present when using
+CFG_SYS_POST_I2C_ADDRS.  The I2C POST test will pass regardless
+if the devices in CFG_SYS_POST_I2C_IGNORES are found or not.
+This is useful in cases when I2C devices are optional (eg on a
+daughtercard that may or may not be present) or not critical
+to board operation.
+
+2.2.2.2. Watchdog timer test
+
+To test the watchdog timer the scheme mentioned above (refer to
+section "Hazardous tests") will be used. Namely, this test will be
+marked with the POST_REBOOT bit flag. On the first iteration, the
+test routine will make a 10-second delay. If the system does not
+reboot during this delay, the watchdog timer is not operational and
+the test fails. If the system reboots, on the second iteration the
+POST_REBOOT bit will be set in the flag argument to the test routine.
+The test routine will check this bit and report a success if it is
+set.
+
+2.2.2.3. RTC test
+
+The RTC test will use the rtc_get()/rtc_set() routines. The following
+features will be verified:
+
+  o) Time uniformity
+
+     This will be verified by reading RTC in polling within a short
+     period of time (5-10 seconds).
+
+  o) Passing month boundaries
+
+     This will be checked by setting RTC to a second before a month
+     boundary and reading it after its passing the boundary. The test
+     will be performed for both leap- and nonleap-years.
+
+2.2.3. MPC8xx peripherals tests
+
+This project will develop a set of tests verifying the peripheral
+units of MPC8xx processors. Namely, the following controllers of the
+MPC8xx communication processor module (CPM) will be tested:
+
+  o) Serial Management Controllers (SMC)
+
+  o) Serial Communication Controllers (SCC)
+
+2.2.3.1. Ethernet tests (SCC)
+
+The internal (local) loopback mode will be used to test SCC. To do
+that the controllers will be configured accordingly and several
+packets will be transmitted. These tests may be enhanced in future to
+use external loopback for testing. That will need appropriate
+reconfiguration of the physical interface chip.
+
+The test routines for the SCC ethernet tests will be located in
+arch/powerpc/cpu/mpc8xx/scc.c.
+
+2.2.3.2. UART tests (SMC/SCC)
+
+To perform these tests the internal (local) loopback mode will be
+used. The SMC/SCC controllers will be configured to connect the
+transmitter output to the receiver input. After that, several bytes
+will be transmitted. These tests may be enhanced to make to perform
+"external" loopback test using a loopback cable. In this case, the
+test will be executed manually.
+
+The test routine for the SMC/SCC UART tests will be located in
+arch/powerpc/cpu/mpc8xx/serial.c.
+
+2.2.3.3. USB test
+
+TBD
+
+2.2.3.4. SPI test
+
+TBD
diff --git a/doc/README.SNTP b/doc/README.SNTP
new file mode 100644
index 00000000000..da9ec459ad4
--- /dev/null
+++ b/doc/README.SNTP
@@ -0,0 +1,17 @@
+To use SNTP support, add define CONFIG_CMD_SNTP to the
+configuration file of the board.
+
+The "sntp" command gets network time from NTP time server and
+syncronize RTC of the board. This command needs the command line
+parameter of server's IP address or environment variable
+"ntpserverip". The network time is sent as UTC. So if you want to
+set local time to RTC, set the offset in second from UTC to the
+environment variable "time offset".
+
+If the DHCP server provides time server's IP or time offset, you
+don't need to set the above environment variables yourself.
+
+Current limitations of SNTP support:
+1. The roundtrip time is ignored.
+2. Only the 1st NTP server IP, in the option ntp-servers of DHCP, will
+   be used.
diff --git a/doc/README.TPL b/doc/README.TPL
new file mode 100644
index 00000000000..95b466e4af9
--- /dev/null
+++ b/doc/README.TPL
@@ -0,0 +1,49 @@
+Generic TPL framework
+=====================
+
+Overview
+--------
+
+TPL---Third Program Loader.
+
+Due to the SPL on some boards(powerpc mpc85xx) has a size limit and cannot
+be compatible with all the external device(e.g. DDR). So add a tertiary
+program loader (TPL) to enable a loader stub loaded by the code from the
+SPL. It loads the final uboot image into DDR, then jump to it to begin
+execution. Now, only the powerpc mpc85xx has this requirement and will
+implemente it.
+
+Keep consistent with SPL, with this framework almost all source files for a
+board can be reused. No code duplication or symlinking is necessary anymore.
+
+How it works
+------------
+
+There has been a directory $(srctree)/spl which contains only a Makefile. The
+Makefile is shared by SPL and TPL.
+
+The object files are built separately for SPL/TPL and placed in the
+directory spl/tpl. The final binaries which are generated are
+u-boot-{spl|tpl}, u-boot-{spl|tpl}.bin and u-boot-{spl|tpl}.map.
+
+During the TPL build a variable named CONFIG_TPL_BUILD is exported in the
+make environment and also appended to CPPFLAGS with -DCONFIG_TPL_BUILD.
+
+The SPL options are shared by SPL and TPL, the board config file should
+determine which SPL options to choose based on whether CONFIG_TPL_BUILD
+is set. Source files can be compiled for TPL with options chosen in the
+board config file.
+
+TPL use a small device tree (u-boot-tpl.dtb), containing only the nodes with
+the pre-relocation properties: 'bootph-all' and 'bootph-pre-sram'
+(see doc/develop/spl.rst for details).
+
+For example:
+
+spl/Makefile:
+LIBS-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/libcommon.o
+
+CONFIG_SPL_LIBCOMMON_SUPPORT is defined in board config file:
+#ifdef CONFIG_TPL_BUILD
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#endif
diff --git a/doc/README.VLAN b/doc/README.VLAN
new file mode 100644
index 00000000000..4f86d55ea1f
--- /dev/null
+++ b/doc/README.VLAN
@@ -0,0 +1,15 @@
+U-Boot has networking support for VLANs (802.1q), and CDP (Cisco
+Discovery Protocol).
+
+You control the sending/receiving of VLAN tagged packets with the
+"vlan" environmental variable. When not present no tagging is
+performed.
+
+CDP is used mainly to discover your device VLAN(s) when connected to
+a Cisco switch.
+
+Note: In order to enable CDP support a small change is needed in the
+networking driver. You have to enable reception of the
+01:00:0c:cc:cc:cc MAC address which is a multicast address.
+
+Various defines control CDP; see the README section.
diff --git a/doc/README.VSC3316-3308 b/doc/README.VSC3316-3308
new file mode 100644
index 00000000000..925663ba50d
--- /dev/null
+++ b/doc/README.VSC3316-3308
@@ -0,0 +1,43 @@
+This file contains API information of the initialization code written for
+Vitesse cross-point devices, VSC3316 and VSC3308 for board B4860QDS
+
+Author: Shaveta Leekha <shaveta@freescale.com>
+
+About Device:
+=============
+VSC 3316/3308 is a low-power, low-cost asynchronous crosspoint switch capable of data rates upto 11.5Gbps.
+
+VSC3316 has 16 input and 16 output ports whereas VSC3308 has 8 input and 8 output ports. Programming of these devices are performed by two-wire or four-wire serial interface.
+
+Initialization:
+===============
+On reset, VSC devices are in low-power state with all inputs, outputs and connections in an off state.
+First thing required is to program it to interface with either two-wire or four-wire interface.
+In our case the interface is two-wire I2C serial interface. So the value in Interface mode register at address 79.h to be written is 0x02 for two-wire interface. Also for crosspoint connections to be activated, 01.h value need to be written in 75.h (core configuration register).
+
+API Overview:
+=============
+
+	vsc_if_enable(u8 vsc_addr):
+	--------------------------
+		This API programs VSC to interface with either two-wire or four-wire interface. In our case the interface is two-wire I2C serial interface. So the value in Interface mode register at address 79.h to be written is 0x02 for two-wire interface.
+	Parameters:
+		vsc_addr - Address of the VSC device on board.
+
+
+	vsc3316_config(u8 vsc_addr, int con_arr[][2], u8 num_con):
+	---------------------------------------------------------
+	This API configures the VSC3316 device for required connections. Connection through the VSC device requires the inputs and outputs to be properly configured.
+	Connection registers are on page 00. It Configures the selected input and output correctly and join them to make a connection. It also program Input state register, Global input ISE, Global input LOS, Global core control, Output mode register and core control registers etc.
+	vsc3308_config(u8 vsc_addr, int con_arr[][2], u8 num_con) does the essential configurations for VSC3308.
+
+	Parameters:
+		vsc_addr - Address of the VSC device on board.
+		con_arr - connection array
+		num_con - number of connections to be configured
+
+	vsc_wp_config(u8 vsc_addr):
+	--------------------------
+		For crosspoint connections to be activated, 01.h value need to be written in 75.h (core configuration register), which is done by this API.
+	Parameters:
+		vsc_addr - Address of the VSC device on board.
diff --git a/doc/README.arm-caches b/doc/README.arm-caches
new file mode 100644
index 00000000000..dbb6190b95c
--- /dev/null
+++ b/doc/README.arm-caches
@@ -0,0 +1,53 @@
+Disabling I-cache:
+- Set CONFIG_SYS_ICACHE_OFF
+
+Disabling D-cache:
+- Set CONFIG_SYS_DCACHE_OFF
+
+Enabling I-cache:
+- Make sure CONFIG_SYS_ICACHE_OFF is not set and call icache_enable().
+
+Enabling D-cache:
+- Make sure CONFIG_SYS_DCACHE_OFF is not set and call dcache_enable().
+
+Enabling Caches at System Startup:
+- Implement enable_caches() for your platform and enable the I-cache and
+  D-cache from this function. This function is called immediately
+  after relocation.
+
+Guidelines for Working with D-cache:
+
+Memory to Peripheral DMA:
+- Flush the buffer after the MPU writes the data and before the DMA is
+  initiated.
+
+Peripheral to Memory DMA:
+- Invalidate the buffer before starting the DMA. In case there are any dirty
+  lines from the DMA buffer in the cache, subsequent cache-line replacements
+  may corrupt the buffer in memory while the DMA is still going on. Cache-line
+  replacement can happen if the CPU tries to bring some other memory locations
+  into the cache while the DMA is going on.
+- Invalidate the buffer after the DMA is complete and before the MPU reads
+  it. This may be needed in addition to the invalidation before the DMA
+  mentioned above, because in some processors memory contents can spontaneously
+  come to the cache due to speculative memory access by the CPU. If this
+  happens with the DMA buffer while DMA is going on we have a coherency problem.
+
+Buffer Requirements:
+- Any buffer that is invalidated(that is, typically the peripheral to
+  memory DMA buffer) should be aligned to cache-line boundary both at
+  at the beginning and at the end of the buffer.
+- If the buffer is not cache-line aligned invalidation will be restricted
+  to the aligned part. That is, one cache-line at the respective boundary
+  may be left out while doing invalidation.
+- A suitable buffer can be alloced on the stack using the
+  ALLOC_CACHE_ALIGN_BUFFER macro.
+
+Cleanup Before Linux:
+- cleanup_before_linux() should flush the D-cache, invalidate I-cache, and
+  disable MMU and caches.
+- The following sequence is advisable while disabling d-cache:
+  1. dcache_disable() - flushes and disables d-cache
+  2. invalidate_dcache_all() - invalid any entry that came to the cache
+	in the short period after the cache was flushed but before the
+	cache got disabled.
diff --git a/doc/README.arm-relocation b/doc/README.arm-relocation
new file mode 100644
index 00000000000..69882a76a36
--- /dev/null
+++ b/doc/README.arm-relocation
@@ -0,0 +1,193 @@
+To make relocation on arm working, the following changes are done:
+
+At arch level: add linker flag -pie
+
+	This causes the linker to generate fixup tables .rel.dyn and .dynsym,
+	which must be applied to the relocated image before transferring
+	control to it.
+
+	These fixups are described in the ARM ELF documentation as type 23
+	(program-base-relative) and 2 (symbol-relative)
+
+At cpu level: modify linker file and add a relocation and fixup loop
+
+	the linker file must be modified to include the .rel.dyn and .dynsym
+	tables in the binary image, and to provide symbols for the relocation
+	code to access these tables
+
+	The relocation and fixup loop must be executed after executing
+	board_init_f at initial location and before executing board_init_r
+	at final location.
+
+At board level:
+
+	dram_init(): bd pointer is now at this point not accessible, so only
+	detect the real dramsize, and store it in gd->ram_size. Bst detected
+	with get_ram_size().
+
+TODO:	move also dram initialization there on boards where it is possible.
+
+	Setup of the bd_info dram bank info is done in the new function
+	dram_init_banksize() called after bd is accessible.
+
+At lib level:
+
+	Board.c code is adapted from ppc code
+
+* WARNING ** WARNING ** WARNING ** WARNING ** WARNING ** WARNING ** WARNING *
+
+Boards which are not fixed to support relocation will be REMOVED!
+
+-----------------------------------------------------------------------------
+
+For boards which boot from spl, it is possible to save one copy
+if CONFIG_TEXT_BASE == relocation address! This prevents that uboot code
+is copied again in relocate_code().
+
+example for the tx25 board booting from NAND Flash:
+
+a) cpu starts
+b) it copies the first page in nand to internal ram
+   (spl code)
+c) end executes this code
+d) this initialize CPU, RAM, ... and copy itself to RAM
+   (this bin must fit in one page, so board_init_f()
+    don;t fit in it ... )
+e) there it copy u-boot to CFG_SYS_NAND_U_BOOT_DST and
+   starts this image @ CFG_SYS_NAND_U_BOOT_START
+f) u-boot code steps through board_init_f() and calculates
+   the relocation address and copy itself to it
+
+If CONFIG_TEXT_BASE == relocation address, the copying of u-boot
+in f) could be saved.
+
+-----------------------------------------------------------------------------
+
+TODO
+
+- fill in struct bd_info infos (check)
+- adapt all boards
+
+- maybe adapt CONFIG_TEXT_BASE (this must be checked from board maintainers)
+  This *must* be done for boards, which boot from NOR flash
+
+  on other boards if CONFIG_TEXT_BASE = relocation baseaddr, this saves
+  one copying from u-boot code.
+
+- new function dram_init_banksize() is actual board specific. Maybe
+  we make a weak default function in arch/arm/lib/board.c ?
+
+-----------------------------------------------------------------------------
+
+Relocation with SPL (example for the tx25 booting from NAND Flash):
+
+- cpu copies the first page from NAND to 0xbb000000 (IMX_NFC_BASE)
+  and start with code execution on this address.
+
+- The First page contains u-boot code from drivers/mtd/nand/raw/mxc_nand_spl.c
+  which inits the dram, cpu registers, reloacte itself to CONFIG_SPL_TEXT_BASE	and loads
+  the "real" u-boot to CFG_SYS_NAND_U_BOOT_DST and starts execution
+  @CFG_SYS_NAND_U_BOOT_START
+
+- This u-boot does no RAM init, nor CPU register setup. Just look
+  where it has to copy and relocate itself to this address. If
+  relocate address = CONFIG_TEXT_BASE (not the same, as the
+  CONFIG_SPL_TEXT_BASE from the spl code), then there is no need
+  to copy, just go on with bss clear and jump to board_init_r.
+
+-----------------------------------------------------------------------------
+
+How ELF relocations 23 and 2 work.
+
+TBC
+
+-------------------------------------------------------------------------------------
+
+Debugging u-boot in RAM:
+(example on the qong board)
+
+-----------------
+
+a) start debugger
+
+arm-linux-gdb u-boot
+
+[hs@pollux u-boot]$ arm-linux-gdb u-boot
+GNU gdb Red Hat Linux (6.7-2rh)
+Copyright (C) 2007 Free Software Foundation, Inc.
+License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
+This is free software: you are free to change and redistribute it.
+There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
+and "show warranty" for details.
+This GDB was configured as "--host=i686-pc-linux-gnu --target=arm-linux".
+The target architecture is set automatically (currently arm)
+..
+(gdb)
+
+-----------------
+
+b) connect to target
+
+target remote bdi10:2001
+
+(gdb) target remote bdi10:2001
+Remote debugging using bdi10:2001
+0x8ff17f10 in ?? ()
+(gdb)
+
+-----------------
+
+c) discard symbol-file
+
+(gdb) symbol-file
+Discard symbol table from `/home/hs/celf/u-boot/u-boot'? (y or n) y
+No symbol file now.
+(gdb)
+
+-----------------
+
+d) load new symbol table:
+
+(gdb) add-symbol-file u-boot 0x8ff08000
+add symbol table from file "u-boot" at
+	.text_addr = 0x8ff08000
+(y or n) y
+Reading symbols from /home/hs/celf/u-boot/u-boot...done.
+(gdb) c
+Continuing.
+^C
+Program received signal SIGSTOP, Stopped (signal).
+0x8ff17f18 in serial_getc () at serial_mxc.c:192
+192		while (__REG(UART_PHYS + UTS) & UTS_RXEMPTY);
+(gdb)
+
+add-symbol-file u-boot 0x8ff08000
+		       ^^^^^^^^^^
+		       get this address from u-boot bdinfo command
+		       or get it from gd->relocaddr in gdb
+
+ => bdinfo
+rch_number = XXXXXXXXXX
+boot_params = XXXXXXXXXX
+DRAM bank   = XXXXXXXXXX
+-> start    = XXXXXXXXXX
+-> size     = XXXXXXXXXX
+ethaddr     = XXXXXXXXXX
+ip_addr     = XXXXXXXXXX
+baudrate    = XXXXXXXXXX
+TLB addr    = XXXXXXXXXX
+relocaddr   = 0x8ff08000
+	      ^^^^^^^^^^
+reloc off   = XXXXXXXXXX
+irq_sp	    = XXXXXXXXXX
+sp start    = XXXXXXXXXX
+FB base     = XXXXXXXXXX
+
+or interrupt execution by any means and re-load the symbols at the location
+specified by gd->relocaddr -- this is only valid after board_init_f.
+
+(gdb) set $s = gd->relocaddr
+(gdb) symbol-file
+(gdb) add-symbol-file u-boot $s
+
+Now you can use gdb as usual :-)
diff --git a/doc/README.armada-secureboot b/doc/README.armada-secureboot
new file mode 100644
index 00000000000..4ec89d5c061
--- /dev/null
+++ b/doc/README.armada-secureboot
@@ -0,0 +1,373 @@
+The trusted boot framework on Marvell Armada 38x
+================================================
+
+Contents:
+
+1. Overview of the trusted boot
+2. Terminology
+3. Boot image layout
+4. The secured header
+5. The secured boot flow
+6. Usage example
+7. Work to be done
+8. Bibliography
+
+1. Overview of the trusted boot
+-------------------------------
+
+The Armada's trusted boot framework enables the SoC to cryptographically verify
+a specially prepared boot image. This can be used to establish a chain of trust
+from the boot firmware all the way to the OS.
+
+To achieve this, the Armada SoC requires a specially prepared boot image, which
+contains the relevant cryptographic data, as well as other information
+pertaining to the boot process. Furthermore, a eFuse structure (a
+one-time-writeable memory) need to be configured in the correct way.
+
+Roughly, the secure boot process works as follows:
+
+* Load the header block of the boot image, extract a special "root" public RSA
+  key from it, and verify its SHA-256 hash against a SHA-256 stored in a eFuse
+  field.
+* Load an array of code signing public RSA keys from the header block, and
+  verify its RSA signature (contained in the header block as well) using the
+  "root" RSA key.
+* Choose a code signing key, and use it to verify the header block (excluding
+  the key array).
+* Verify the binary image's signature (contained in the header block) using the
+  code signing key.
+* If all checks pass successfully, boot the image.
+
+The chain of trust is thus as follows:
+
+* The SHA-256 value in the eFuse field verifies the "root" public key.
+* The "root" public key verifies the code signing key array.
+* The selected code signing key verifies the header block and the binary image.
+
+In the special case of building a boot image containing U-Boot as the binary
+image, which employs this trusted boot framework, the following tasks need to
+be addressed:
+
+1. Creation of the needed cryptographic key material.
+2. Creation of a conforming boot image containing the U-Boot image as binary
+   image.
+3. Burning the necessary eFuse values.
+
+(1) will be addressed later, (2) will be taken care of by U-Boot's build
+system (some user configuration is required, though), and for (3) the necessary
+data (essentially a series of U-Boot commands to be entered at the U-Boot
+command prompt) will be created by the build system as well.
+
+The documentation of the trusted boot mode is contained in part 1, chapter
+7.2.5 in the functional specification [1], and in application note [2].
+
+2. Terminology
+--------------
+
+	           CSK - Code Signing Key(s): An array of RSA key pairs, which
+                         are used to sign and verify the secured header and the
+                         boot loader image.
+	           KAK - Key Authentication Key: A RSA key pair, which is used
+                         to sign and verify the array of CSKs.
+	  Header block - The first part of the boot image, which contains the
+			 image's headers (also known as "headers block", "boot
+			 header", and "image header")
+                 eFuse - A one-time-writeable memory.
+               BootROM - The Armada's built-in boot firmware, which is
+                         responsible for verifying and starting secure images.
+	    Boot image - The complete image the SoC's boot firmware loads
+			 (contains the header block and the binary image)
+	   Main header - The header in the header block containing information
+			 and data pertaining to the boot process (used for both
+			 the regular and secured boot processes)
+	  Binary image - The binary code payload of the boot image; in this
+			 case the U-Boot's code (also known as "source image",
+			 or just "image")
+	Secured header - The specialized header in the header block that
+			 contains information and data pertaining to the
+			 trusted boot (also known as "security header")
+     Secured boot mode - A special boot mode of the Armada SoC in which secured
+                         images are verified (non-secure images won't boot);
+                         the mode is activated by setting a eFuse field.
+    Trusted debug mode - A special mode for the trusted boot that allows
+			 debugging of devices employing the trusted boot
+			 framework in a secure manner (untested in the current
+			 implementation).
+Trusted boot framework - The ARMADA SoC's implementation of a secure verified
+                         boot process.
+
+3. Boot image layout
+--------------------
+
++-- Boot image --------------------------------------------+
+|                                                          |
+| +-- Header block --------------------------------------+ |
+| | Main header                                          | |
+| +------------------------------------------------------+ |
+| | Secured header                                       | |
+| +------------------------------------------------------+ |
+| | BIN header(s)                                        | |
+| +------------------------------------------------------+ |
+| | REG header(s)                                        | |
+| +------------------------------------------------------+ |
+| | Padding                                              | |
+| +------------------------------------------------------+ |
+|                                                          |
+| +------------------------------------------------------+ |
+| | Binary image + checksum                              | |
+| +------------------------------------------------------+ |
++----------------------------------------------------------+
+
+4. The secured header
+---------------------
+
+For the trusted boot framework, a additional header is added to the boot image.
+The following data are relevant for the secure boot:
+
+		   KAK: The KAK is contained in the secured header in the form
+		        of a RSA-2048 public key in DER format with a length of
+			524 bytes.
+Header block signature: The RSA signature of the header block (excluding the
+                        CSK array), created using the selected CSK.
+Binary image signature: The RSA signature of the binary image, created using
+                        the selected CSK.
+             CSK array: The array of the 16 CSKs as RSA-2048 public keys in DER
+	                format with a length of 8384 = 16 * 524 bytes.
+   CSK block signature: The RSA signature of the CSK array, created using the
+                        KAK.
+
+NOTE: The JTAG delay, Box ID, and Flash ID header fields do play a role in the
+trusted boot process to enable and configure secure debugging, but they were
+not tested in the current implementation of the trusted boot in U-Boot.
+
+5. The secured boot flow
+------------------------
+
+The steps in the boot flow that are relevant for the trusted boot framework
+proceed as follows:
+
+1) Check if trusted boot is enabled, and perform regular boot if it is not.
+2) Load the secured header, and verify its checksum.
+3) Select the lowest valid CSK from CSK0 to CSK15.
+4) Verify the SHA-256 hash of the KAK embedded in the secured header.
+5) Verify the RSA signature of the CSK block from the secured header with the
+   KAK.
+6) Verify the header block signature (which excludes the CSK block) from the
+   secured header with the selected CSK.
+7) Load the binary image to the main memory and verify its checksum.
+8) Verify the binary image's RSA signature from the secured header with the
+   selected CSK.
+9) Continue the boot process as in the case of the regular boot.
+
+NOTE: All RSA signatures are verified according to the PKCS #1 v2.1 standard
+described in [3].
+
+NOTE: The Box ID and Flash ID are checked after step 6, and the trusted debug
+mode may be entered there, but since this mode is untested in the current
+implementation, it is not described further.
+
+6. Usage example
+----------------
+
+### Create key material
+
+To employ the trusted boot framework, cryptographic key material needs to be
+created. In the current implementation, two keys are needed to build a valid
+secured boot image: The KAK private key and a CSK private key (both have to be
+2048 bit RSA keys in PEM format). Note that the usage of more than one CSK is
+currently not supported.
+
+NOTE: Since the public key can be generated from the private key, it is
+sufficient to store the private key for each key pair.
+
+OpenSSL can be used to generate the needed files kwb_kak.key and kwb_csk.key
+(the names of these files have to be configured, see the next section on
+kwbimage.cfg settings):
+
+openssl genrsa -out kwb_kak.key 2048
+openssl genrsa -out kwb_csk.key 2048
+
+The generated files have to be placed in the U-Boot root directory.
+
+Alternatively, instead of copying the files, symlinks to the private keys can
+be placed in the U-Boot root directory.
+
+WARNING: Knowledge of the KAK or CSK private key would enable an attacker to
+generate secured boot images containing arbitrary code. Hence, the private keys
+should be carefully guarded.
+
+### Create/Modifiy kwbimage.cfg
+
+The Kirkwook architecture in U-Boot employs a special board-specific
+configuration file (kwbimage.cfg), which controls various boot image settings
+that are interpreted by the BootROM, such as the boot medium. The support the
+trusted boot framework, several new options were added to faciliate
+configuration of the secured boot.
+
+The configuration file's layout has been retained, only the following new
+options were added:
+
+		KAK - The name of the KAK RSA private key file in the U-Boot
+                      root directory, without the trailing extension of ".key".
+		CSK - The name of the (active) CSK RSA private key file in the
+		      U-Boot root directory, without the trailing extension of
+		      ".key".
+	     BOX_ID - The BoxID to be used for trusted debugging (a integer
+	              value).
+	   FLASH_ID - The FlashID to be used for trusted debugging (a integer
+	              value).
+	 JTAG_DELAY - The JTAG delay to be used for trusted debugging (a
+	              integer value).
+          CSK_INDEX - The index of the active CSK (a integer value).
+SEC_SPECIALIZED_IMG - Flag to indicate whether to include the BoxID and FlashID
+		      in the image (that is, whether to use the trusted debug
+		      mode or not); no parameters.
+       SEC_BOOT_DEV - The boot device from which the trusted boot is allowed to
+		      proceed, identified via a numeric ID. The tested values
+		      are 0x34 = NOR flash, 0x31 = SDIO/MMC card; for
+		      additional ID values, consult the documentation in [1].
+      SEC_FUSE_DUMP - Dump the "fuse prog" commands necessary for writing the
+		      correct eFuse values to a text file in the U-Boot root
+		      directory. The parameter is the architecture for which to
+		      dump the commands (currently only "a38x" is supported).
+
+The parameter values may be hardcoded into the file, but it is also possible to
+employ a dynamic approach of creating a Autoconf-like kwbimage.cfg.in, then
+reading configuration values from Kconfig options or from the board config
+file, and generating the actual kwbimage.cfg from this template using Makefile
+mechanisms (see board/gdsys/a38x/Makefile as an example for this approach).
+
+### Set config options
+
+To enable the generation of trusted boot images, the corresponding support
+needs to be activated, and a index for the active CSK needs to be selected as
+well.
+
+Furthermore, eFuse writing support has to be activated in order to burn the
+eFuse structure's values (this option is just needed for programming the eFuse
+structure; production boot images may disable it).
+
+ARM architecture
+ -> [*] Build image for trusted boot
+    (0)   Index of active CSK
+ -> [*] Enable eFuse support
+    [ ]   Fake eFuse access (dry run)
+
+### Build and test boot image
+
+The creation of the boot image is done via the usual invocation of make (with a
+suitably set CROSS_COMPILE environment variable, of course). The resulting boot
+image u-boot-with-spl.kwb can then be tested, if so desired. The hdrparser from [5]
+can be used for this purpose. To build the tool, invoke make in the
+'tools/marvell/doimage_mv' directory of [5], which builds a stand-alone
+hdrparser executable. A test can be conducted by calling hdrparser with the
+produced boot image and the following (mandatory) parameters:
+
+./hdrparser -k 0 -t u-boot-with-spl.kwb
+
+Here we assume that the CSK index is 0 and the boot image file resides in the
+same directory (adapt accordingly if needed). The tool should report that all
+checksums are valid ("GOOD"), that all signature verifications succeed
+("PASSED"), and, finally, that the overall test was successful
+("T E S T   S U C C E E D E D" in the last line of output).
+
+### Burn eFuse structure
+
++----------------------------------------------------------+
+| WARNING: Burning the eFuse structure is a irreversible   |
+| operation! Should wrong or corrupted values be used, the |
+| board won't boot anymore, and recovery is likely         |
+| impossible!                                              |
++----------------------------------------------------------+
+
+After the build process has finished, and the SEC_FUSE_DUMP option was set in
+the kwbimage.cfg was set, a text file kwb_fuses_a38x.txt should be present in
+the U-Boot top-level directory. It contains all the necessary commands to set
+the eFuse structure to the values needed for the used KAK digest, as well as
+the CSK index, Flash ID and Box ID that were selected in kwbimage.cfg.
+
+Sequentially executing the commands in this file at the U-Boot command prompt
+will write these values to the eFuse structure.
+
+If the SEC_FUSE_DUMP option was not set, the commands needed to burn the fuses
+have to be crafted by hand. The needed fuse lines can be looked up in [1]; a
+rough overview of the process is:
+
+* Burn the KAK public key hash. The hash itself can be found in the file
+  pub_kak_hash.txt in the U-Boot top-level directory; be careful to account for
+  the endianness!
+* Burn the CSK selection, BoxID, and FlashID
+* Enable trusted boot by burning the corresponding fuse (WARNING: this must be
+  the last fuse line written!)
+* Lock the unused fuse lines
+
+The command to employ is the "fuse prog" command previously enabled by setting
+the corresponding configuration option.
+
+For the trusted boot, the fuse prog command has a special syntax, since the
+ARMADA SoC demands that whole fuse lines (64 bit values) have to be written as
+a whole. The fuse prog command itself allows lists of 32 bit words to be
+written at a time, but this is translated to a series of single 32 bit write
+operations to the fuse line, where the individual 32 bit words are identified
+by a "word" counter that is increased for each write.
+
+To work around this restriction, we interpret each line to have three "words"
+(0-2): The first and second words are the values to be written to the fuse
+line, and the third is a lock flag, which is supposed to lock the fuse line
+when set to 1. Writes to the first and second words are memoized between
+function calls, and the fuse line is only really written and locked (on writing
+the third word) if both words were previously set, so that "incomplete" writes
+are prevented. An exception to this is a single write to the third word (index
+2) without previously writing neither the first nor the second word, which
+locks the fuse line without setting any value; this is needed to lock the
+unused fuse lines.
+
+As an example, to write the value 0011223344556677 to fuse line 10, we would
+use the following command:
+
+fuse prog -y 10 0 00112233 44556677 1
+
+Here 10 is the fuse line number, 0 is the index of the first word to be
+written, 00112233 and 44556677 are the values to be written to the fuse line
+(first and second word) and the trailing 1 is the value for the third word
+responsible for locking the line.
+
+A "lock-only" command would look like this:
+
+fuse prog -y 11 2 1
+
+Here 11 is the fuse number, 2 is the index of the first word to be written
+(notice that we only write to word 2 here; the third word for fuse line
+locking), and the 1 is the value for the word we are writing to.
+
+WARNING: According to application note [4], the VHV pin of the SoC must be
+connected to a 1.8V source during eFuse programming, but *must* be disconnected
+for normal operation. The AN [4] describes a software-controlled circuit (based
+on a N-channel or P-channel FET and a free GPIO pin of the SoC) to achieve
+this, but a jumper-based circuit should suffice as well. Regardless of the
+chosen circuit, the issue needs to be addressed accordingly!
+
+7. Work to be done
+------------------
+
+* Add the ability to populate more than one CSK
+* Test secure debug
+* Test on Armada XP
+
+8. Bibliography
+---------------
+
+[1] ARMADA(R) 38x Family High-Performance Single/Dual CPU System on Chip
+    Functional Specification; MV-S109094-00, Rev. C; August 2, 2015,
+    Preliminary
+[2] AN-383: ARMADA(R) 38x Families Secure Boot Mode Support; MV-S302501-00
+    Rev.  A; March 11, 2015, Preliminary
+[3] Public-Key Cryptography Standards (PKCS) #1: RSA Cryptography
+    Specifications Version 2.1; February 2003;
+    https://www.ietf.org/rfc/rfc3447.txt
+[4] AN-389: ARMADA(R) VHV Power; MV-S302545-00 Rev. B; January 28, 2016,
+    Released
+[5] Marvell Armada 38x U-Boot support; November 25, 2015;
+    https://github.com/MarvellEmbeddedProcessors/u-boot-marvell
+
+2017-01-05, Mario Six <mario.six@gdsys.cc>
diff --git a/doc/README.asn1 b/doc/README.asn1
new file mode 100644
index 00000000000..1359b93aef0
--- /dev/null
+++ b/doc/README.asn1
@@ -0,0 +1,40 @@
+ASN1
+====
+
+Abstract Syntax Notation One (or ASN1) is a standard by ITU-T and ISO/IEC
+and used as a description language for defining data structure in
+an independent manner.
+Any data described in ASN1 notation can be serialized (or encoded) and
+de-serialized (or decoded) with well-defined encoding rules.
+
+A combination of ASN1 compiler and ASN1 decoder library function will
+provide a function interface for parsing encoded binary into specific
+data structure:
+1) define data structure in a text file (*.asn1)
+2) define "action" routines for specific "tags" defined in (1)
+3) generate bytecode as a C file (*.asn1.[ch]) from *.asn1 file
+   with ASN1 compiler (tools/asn1_compiler)
+4) call a ASN1 decoder (asn1_ber_decoder()) with bytecode and data
+
+Usage of ASN1 compiler
+----------------------
+  asn1_compiler [-v] [-d] <grammar-file> <c-file> <hdr-file>
+
+  <grammar-file>:	ASN1 input file
+  <c-file>:		generated C file
+  <hdr-file>:		generated include file
+
+Usage of ASN1 decoder
+---------------------
+  int asn1_ber_decoder(const struct asn1_decoder *decoder, void *context,
+		       const unsigned char *data, size_t datalen);
+
+  @decoder:		bytecode binary
+  @context:		context for decoder
+  @data:		data to be parsed
+  @datalen:		size of data
+
+
+As of writing this, ASN1 compiler and decoder are used to implement
+X509 certificate parser, pcks7 message parser and RSA public key parser
+for UEFI secure boot.
diff --git a/doc/README.atmel_mci b/doc/README.atmel_mci
new file mode 100644
index 00000000000..0b6d2c53db7
--- /dev/null
+++ b/doc/README.atmel_mci
@@ -0,0 +1,74 @@
+How to use SD/MMC cards with Atmel SoCs having MCI hardware
+-----------------------------------------------------------
+2010-08-16 Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
+
+This is a new approach to use Atmel MCI hardware with the
+general MMC framework. Therefore it benefits from that
+framework's abilities to handle SDHC Cards and the ability
+to write blocks.
+
+- AT91SAM9XE512 (tested, will definitely work with XE128 and XE256)
+- AT91SAM9260 (not tested, but MCI is to AT91SAM9XE)
+- AT91SAM9G20 (not tested, should work)
+
+It should work with all other ATMEL devices that have MCI.
+
+The generic driver does NOT assign port pins to the MCI block
+nor does it start the MCI clock. This has to be handled in a
+board/SoC specific manner before the driver is initialized:
+
+example: this is added to at91sam9260_devices.c:
+
+#if defined(CONFIG_GENERIC_ATMEL_MCI)
+void at91_mci_hw_init(void)
+{
+	at91_set_a_periph(AT91_PIO_PORTA, 8, PUP);	/* MCCK */
+#if defined(CONFIG_ATMEL_MCI_PORTB)
+	at91_set_b_periph(AT91_PIO_PORTA, 1, PUP);	/* MCCDB */
+	at91_set_b_periph(AT91_PIO_PORTA, 0, PUP);	/* MCDB0 */
+	at91_set_b_periph(AT91_PIO_PORTA, 5, PUP);	/* MCDB1 */
+	at91_set_b_periph(AT91_PIO_PORTA, 4, PUP);	/* MCDB2 */
+	at91_set_b_periph(AT91_PIO_PORTA, 3, PUP);	/* MCDB3 */
+#else
+	at91_set_a_periph(AT91_PIO_PORTA, 7, PUP);	/* MCCDA */
+	at91_set_a_periph(AT91_PIO_PORTA, 6, PUP);	/* MCDA0 */
+	at91_set_a_periph(AT91_PIO_PORTA, 9, PUP);	/* MCDA1 */
+	at91_set_a_periph(AT91_PIO_PORTA, 10, PUP);	/* MCDA2 */
+	at91_set_a_periph(AT91_PIO_PORTA, 11, PUP);	/* MCDA3 */
+#endif
+}
+#endif
+
+the board specific file need added:
+...
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+# include <mmc.h>
+#endif
+...
+#ifdef CONFIG_GENERIC_ATMEL_MCI
+/* this is a weak define that we are overriding */
+int board_mmc_init(struct bd_info *bd)
+{
+	/* Enable clock */
+	at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_MCI);
+	at91_mci_hw_init();
+
+	/* This calls the atmel_mci_init in gen_atmel_mci.c */
+	return atmel_mci_init((void *)AT91_BASE_MCI);
+}
+
+/* this is a weak define that we are overriding */
+int board_mmc_getcd(struct mmc *mmc)
+{
+	return !at91_get_gpio_value(CFG_SYS_MMC_CD_PIN);
+}
+
+#endif
+
+and the board definition files needs:
+
+/* SD/MMC card */
+#define CONFIG_GENERIC_ATMEL_MCI	1
+#define CONFIG_ATMEL_MCI_PORTB		1	/* Atmel XE-EK uses port B */
+#define CFG_SYS_MMC_CD_PIN		AT91_PIN_PC9
+#define CONFIG_CMD_MMC			1
diff --git a/doc/README.atmel_pmecc b/doc/README.atmel_pmecc
new file mode 100644
index 00000000000..c86d0857794
--- /dev/null
+++ b/doc/README.atmel_pmecc
@@ -0,0 +1,49 @@
+How to enable PMECC(Programmable Multibit ECC) for nand on Atmel SoCs
+-----------------------------------------------------------
+2012-08-22 Josh Wu <josh.wu@atmel.com>
+
+The Programmable Multibit ECC (PMECC) controller is a programmable binary
+BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
+can be used to support both SLC and MLC NAND Flash devices. It supports to
+generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector (512 or
+1024 bytes) of data.
+
+Following Atmel AT91 products support PMECC.
+- AT91SAM9X25, X35, G25, G15, G35 (tested)
+- AT91SAM9N12 (not tested, Should work)
+
+As soon as your nand flash software ECC works, you can enable PMECC.
+
+To use PMECC in this driver, the user needs to set:
+	1. the PMECC correction error bits capability: CONFIG_PMECC_CAP.
+	   It can be 2, 4, 8, 12 or 24.
+	2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE.
+	   It only can be 512 or 1024.
+
+Take 'configs/at91sam9x5ek_nandflash_defconfig' as an example, the board
+configuration file has the following entries:
+
+	CONFIG_PMECC_CAP=2
+	CONFIG_PMECC_SECTOR_SIZE=512
+	CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
+
+How to enable PMECC header for direct programmable boot.bin
+-----------------------------------------------------------
+2014-05-19 Andreas Bießmann <andreas@biessmann.org>
+
+The usual way to program SPL into NAND flash is to use the SAM-BA Atmel tool.
+This however is often not usable when doing field updates. To be able to
+program a SPL binary into NAND flash we need to add the PMECC header to the
+binary before. Chapter '12.4.4.1 NAND Flash Boot: NAND Flash Detection' in
+sama5d3 SoC spec (as of 03. April 2014) defines how this PMECC header has to
+look like. In order to do so we have a new image type added to mkimage to
+generate this PMECC header and integrated this into the build process of SPL.
+
+To enable the generation of atmel PMECC header for SPL one needs to define
+CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER. The required parameters are taken from
+board configuration and compiled into the host tools atmel_pmecc_params. This
+tool will be called in build process to parametrize mkimage for atmelimage
+type. The mkimage tool has intentionally _not_ compiled in those parameters.
+
+The mkimage image type atmelimage also set the 6'th interrupt vector to the
+correct value. This feature can also be used to setup a boot.bin for MMC boot.
diff --git a/doc/README.autoboot b/doc/README.autoboot
new file mode 100644
index 00000000000..5e9a5e1cf7f
--- /dev/null
+++ b/doc/README.autoboot
@@ -0,0 +1,162 @@
+SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2001
+ * Dave Ellis, SIXNET, dge@sixnetio.com
+ *
+ */
+
+Using autoboot configuration options
+====================================
+
+The basic autoboot configuration options are documented in the main
+U-Boot README. See it for details. They are:
+
+  bootdelay
+  bootcmd
+  CONFIG_BOOTDELAY
+  CONFIG_BOOTCOMMAND
+
+Some additional options that make autoboot safer in a production
+product are documented here.
+
+Why use them?
+-------------
+
+The basic autoboot feature allows a system to automatically boot to
+the real application (such as Linux) without a user having to enter
+any commands. If any key is pressed before the boot delay time
+expires, U-Boot stops the autoboot process, gives a U-Boot prompt
+and waits forever for a command. That's a good thing if you pressed a
+key because you wanted to get the prompt.
+
+It's not so good if the key press was a stray character on the
+console serial port, say because a user who knows nothing about
+U-Boot pressed a key before the system had time to boot. It's even
+worse on an embedded product that doesn't have a console during
+normal use. The modem plugged into that console port sends a
+character at the wrong time and the system hangs, with no clue as to
+why it isn't working.
+
+You might want the system to autoboot to recover after an external
+configuration program stops autoboot. If the configuration program
+dies or loses its connection (modems can disconnect at the worst
+time) U-Boot will patiently wait forever for it to finish.
+
+These additional configuration options can help provide a system that
+boots when it should, but still allows access to U-Boot.
+
+What they do
+------------
+
+  CONFIG_BOOT_RETRY_TIME
+  CONFIG_BOOT_RETRY_MIN
+
+  "bootretry" environment variable
+
+	These options determine what happens after autoboot is
+	stopped and U-Boot is waiting for commands.
+
+	CONFIG_BOOT_RETRY_TIME must be defined to enable the boot
+	retry feature. If the environment variable "bootretry" is
+	found then its value is used, otherwise the retry timeout is
+	CONFIG_BOOT_RETRY_TIME. CONFIG_BOOT_RETRY_MIN is optional and
+	defaults to CONFIG_BOOT_RETRY_TIME. All times are in seconds.
+
+	If the retry timeout is negative, the U-Boot command prompt
+	never times out. Otherwise it is forced to be at least
+	CONFIG_BOOT_RETRY_MIN seconds. If no valid U-Boot command is
+	entered before the specified time the boot delay sequence is
+	restarted. Each command that U-Boot executes restarts the
+	timeout.
+
+	If CONFIG_BOOT_RETRY_TIME < 0 the feature is there, but
+	doesn't do anything unless the environment variable
+	"bootretry" is >= 0.
+
+  CONFIG_AUTOBOOT_KEYED
+  CONFIG_AUTOBOOT_KEYED_CTRLC
+  CONFIG_AUTOBOOT_PROMPT
+  CONFIG_AUTOBOOT_DELAY_STR
+  CONFIG_AUTOBOOT_STOP_STR
+
+  "bootdelaykey"  environment variable
+  "bootstopkey"	  environment variable
+
+	These options give more control over stopping autoboot. When
+	they are used a specific character or string is required to
+	stop or delay autoboot.
+
+	Define CONFIG_AUTOBOOT_KEYED (no value required) to enable
+	this group of options.	CONFIG_AUTOBOOT_DELAY_STR,
+	CONFIG_AUTOBOOT_STOP_STR or both should be specified (or
+	specified by the corresponding environment variable),
+	otherwise there is no way to stop autoboot.
+
+	CONFIG_AUTOBOOT_PROMPT is displayed before the boot delay
+	selected by CONFIG_BOOTDELAY starts. If it is not defined
+	there is no output indicating that autoboot is in progress.
+
+	Note that CONFIG_AUTOBOOT_PROMPT is used as the (only)
+	argument to a printf() call, so it may contain '%' format
+	specifications, provided that it also includes, sepearated by
+	commas exactly like in a printf statement, the required
+	arguments. It is the responsibility of the user to select only
+	such arguments that are valid in the given context. A
+	reasonable prompt could be defined as
+
+		#define CONFIG_AUTOBOOT_PROMPT \
+			"autoboot in %d seconds\n",bootdelay
+
+	If CONFIG_AUTOBOOT_DELAY_STR or "bootdelaykey" is specified
+	and this string is received from console input before
+	autoboot starts booting, U-Boot gives a command prompt. The
+	U-Boot prompt will time out if CONFIG_BOOT_RETRY_TIME is
+	used, otherwise it never times out.
+
+	If CONFIG_AUTOBOOT_STOP_STR or "bootstopkey" is specified and
+	this string is received from console input before autoboot
+	starts booting, U-Boot gives a command prompt. The U-Boot
+	prompt never times out, even if CONFIG_BOOT_RETRY_TIME is
+	used.
+
+	The string recognition is not very sophisticated. If a
+	partial match is detected, the first non-matching character
+	is checked to see if starts a new match. There is no check
+	for a shorter partial match, so it's best if the first
+	character of a key string does not appear in the rest of the
+	string.
+
+	The CONFIG_AUTOBOOT_KEYED_CTRLC #define allows for the boot
+	sequence to be interrupted by ctrl-c, in addition to the
+	"bootdelaykey" and "bootstopkey". Setting this variable
+	provides an escape sequence from the limited "password"
+	strings.
+
+  CONFIG_AUTOBOOT_ENCRYPTION
+
+  "bootstopkeysha256"	environment variable
+
+	- Hash value of the input which unlocks the device and
+	  stops autoboot.
+
+	This option allows a string to be entered into U-Boot to stop the
+	autoboot. The string itself is hashed and compared against the hash
+	in the environment variable 'bootstopkeysha256'. If it matches then
+	boot stops and a command-line prompt is presented.
+
+	This provides a way to ship a secure production device which can also
+	be accessed at the U-Boot command line.
+
+  CONFIG_RESET_TO_RETRY
+
+	(Only effective when CONFIG_BOOT_RETRY_TIME is also set)
+	After the countdown timed out, the board will be reset to restart
+	again.
+
+  CONFIG_AUTOBOOT_USE_MENUKEY
+  CONFIG_AUTOBOOT_MENUKEY
+
+	If this key is pressed to stop autoboot, then the commands in the
+	environment variable 'menucmd' will be executed before boot starts.
+	For example, 33 means "!" in ASCII, so pressing ! at boot would take
+	this action.
diff --git a/doc/README.bcmns3 b/doc/README.bcmns3
new file mode 100644
index 00000000000..c51f91471f6
--- /dev/null
+++ b/doc/README.bcmns3
@@ -0,0 +1,74 @@
+BCMNS3 QSPI memory layout
+=========================
+
+BCMNS3 has total 8MB non-volatile SPI flash memory. It is used to store
+different images like fip.bin, nitro firmware, DDR shmo value and other backup
+images.
+
+Following is the QSPI flash memory layout.
+
+/*         QSPI layout
+ * |---------------------------|->0x000000
+ * |                           |
+ * |                           |
+ * |        fip.bin            |
+ * |         2MB               |
+ * |                           |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |                           |
+ * |                           |
+ * |---------------------------|->0x200000
+ * |                           |
+ * |                           |
+ * |                           |
+ * |       fip.bin (Mirror)    |
+ * |        2MB                |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |                           |
+ * |                           |
+ * |---------------------------|->0x400000
+ * |                           |
+ * |      Nitro NS3 Config     |
+ * |          1.5M             |
+ * |                           |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|->0x580000
+ * |      Nitro NS3 Config     |
+ * |          1.5M             |
+ * |        (Mirror)           |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|->0x700000
+ * |   Nitro NS3 bspd Config   |
+ * |        64KB               |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|->0x710000
+ * |   Nitro NS3 bspd Config   |
+ * |        64KB               |
+ * ~       (Mirror)            ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|->0x720000
+ * |        SHMOO              |
+ * |        64KB               |
+ * |                           |
+ * ~                           ~
+ * ~                           ~
+ * |---------------------------|->0x730000
+ * |        Meta Data          |
+ * |        832KB              |
+ * |                           |
+ * ~                           ~
+ * ~                           ~
+ * |                           |
+ * |---------------------------|
+ */
diff --git a/doc/README.bitbangMII b/doc/README.bitbangMII
new file mode 100644
index 00000000000..0a2fa48a56f
--- /dev/null
+++ b/doc/README.bitbangMII
@@ -0,0 +1,56 @@
+This patch rewrites the miiphybb ( Bit-banged MII bus driver ) in order to
+support an arbitrary number of mii buses. This feature is useful when your
+board uses different mii buses for different phys and all (or a part) of these
+buses are implemented via bit-banging mode.
+
+The driver requires that the following macros should be defined into the board
+configuration file:
+
+CONFIG_BITBANGMII	- Enable the miiphybb driver
+CONFIG_BITBANGMII_MULTI - Enable the multi bus support
+
+If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs
+to define at least the following macros:
+
+MII_INIT      - Generic code to enable the MII bus (optional)
+MDIO_DECLARE  - Declaration needed to access to the MDIO pin (optional)
+MDIO_ACTIVE   - Activate the MDIO pin as out pin
+MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
+MDIO_READ     - Read the MDIO pin
+MDIO(v)       - Write v on the MDIO pin
+MDC_DECLARE   - Declaration needed to access to the MDC pin (optional)
+MDC(v)	      - Write v on the MDC pin
+
+The previous macros make the driver compatible with the previous version
+(that didn't support the multi-bus).
+
+When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill
+the bb_miiphy_buses[] array with a record for each required bus and declare
+the bb_miiphy_buses_num variable with the number of mii buses.
+The record (struct bb_miiphy_bus) has the following fields/callbacks (see
+miiphy.h for details):
+
+char name[]	       - The symbolic name that must be equal to the MII bus
+			 registered name
+int (*init)()	       - Initialization function called at startup time (just
+			 before the Ethernet initialization)
+int (*mdio_active)()   - Activate the MDIO pin as output
+int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
+int (*set_mdio)()      - Write the MDIO pin
+int (*get_mdio)()      - Read the MDIO pin
+int (*set_mdc)()       - Write the MDC pin
+int (*delay)()	       - Delay function
+void *priv	       - Private data used by board specific code
+
+The board code will look like:
+
+struct bb_miiphy_bus bb_miiphy_buses[] = {
+ { .name = "miibus#1", .init = b1_init, .mdio_active = b1_mdio_active, ... },
+ { .name = "miibus#2", .init = b2_init, .mdio_active = b2_mdio_active, ... },
+ ...
+};
+int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
+			  sizeof(bb_miiphy_buses[0]);
+
+2009 Industrie Dial Face S.p.A.
+     Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
diff --git a/doc/README.boston b/doc/README.boston
new file mode 100644
index 00000000000..38f6710e4ab
--- /dev/null
+++ b/doc/README.boston
@@ -0,0 +1,58 @@
+MIPS Boston Development Board
+
+---------
+  About
+---------
+
+The MIPS Boston development board is built around an FPGA & 3 PCIe controllers,
+one of which is connected to an Intel EG20T Platform Controller Hub which
+provides most connectivity to the board. It is used during the development &
+testing of both new CPUs and the software support for them. It is essentially
+the successor of the older MIPS Malta board.
+
+--------
+  QEMU
+--------
+
+U-Boot can be run on a currently out-of-tree branch of QEMU with support for
+the Boston board added. This QEMU code can currently be found in the "boston"
+branch of git://git.linux-mips.org/pub/scm/paul/qemu.git and used like so:
+
+  $ git clone git://git.linux-mips.org/pub/scm/paul/qemu.git -b boston
+  $ cd qemu
+  $ ./configure --target-list=mips64el-softmmu
+  $ make
+  $ ./mips64el-softmmu/qemu-system-mips64el -M boston -m 2G \
+      -bios u-boot.bin -serial stdio
+
+Please note that QEMU will default to emulating the I6400 CPU which implements
+the MIPS64r6 ISA, and at the time of writing doesn't implement any earlier CPUs
+with support for the CPS features the Boston board relies upon. You will
+therefore need to configure U-Boot to build for MIPSr6 in order to obtain a
+binary that will work in QEMU.
+
+-------------
+  Toolchain
+-------------
+
+If building for MIPSr6 then you will need a toolchain including GCC 5.x or
+newer, or the Codescape toolchain available for download from Imagination
+Technologies:
+
+  http://codescape-mips-sdk.imgtec.com/components/toolchain/2015.06-05/
+
+The "IMG GNU Linux Toolchain" is capable of building for all current MIPS ISAs,
+architecture revisions & both endiannesses.
+
+--------
+  TODO
+--------
+
+  - AHCI support
+  - CPU driver
+  - Exception handling (+UHI?)
+  - Flash support
+  - IOCU support
+  - L2 cache support
+  - More general LCD display driver
+  - Multi-arch-variant multi-endian fat binary
diff --git a/doc/README.cfi b/doc/README.cfi
new file mode 100644
index 00000000000..38185747028
--- /dev/null
+++ b/doc/README.cfi
@@ -0,0 +1,63 @@
+The common CFI driver provides this weak default implementation for
+flash_cmd_reset():
+
+static void __flash_cmd_reset(flash_info_t *info)
+{
+	/*
+	 * We do not yet know what kind of commandset to use, so we issue
+	 * the reset command in both Intel and AMD variants, in the hope
+	 * that AMD flash roms ignore the Intel command.
+	 */
+	flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+	udelay(1);
+	flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+}
+void flash_cmd_reset(flash_info_t *info)
+	__attribute__((weak,alias("__flash_cmd_reset")));
+
+Some flash chips seem to have trouble with this reset sequence.
+In this case, board-specific code can override this weak default
+version with a board-specific function.
+
+At the time of writing, there are two boards that define their own
+routine for this.
+
+First, the digsy_mtc board equipped with the M29W128GH from Numonyx
+needs this version to function properly:
+
+void flash_cmd_reset(flash_info_t *info)
+{
+	flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+}
+
+In addition, the t3corp board defines the routine thusly:
+
+void flash_cmd_reset(flash_info_t *info)
+{
+	/*
+	 * FLASH at address CFG_SYS_FLASH_BASE is a Spansion chip and
+	 * needs the Spansion type reset commands. The other flash chip
+	 * is located behind a FPGA (Xilinx DS617) and needs the Intel type
+	 * reset command.
+	 */
+	if (info->start[0] == CFG_SYS_FLASH_BASE)
+		flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
+	else
+		flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
+}
+
+see also:
+http://www.mail-archive.com/u-boot@lists.denx.de/msg24368.html
+
+
+Config Option
+
+  CONFIG_SYS_MAX_FLASH_SECT: Number of sectors available on Flash device
+
+  CONFIG_SYS_FLASH_CFI_WIDTH: Data-width of the flash device
+
+  CONFIG_CMD_FLASH: Enables Flash command library
+
+  CONFIG_FLASH_CFI_DRIVER: Enables CFI Flash driver
+
+  CONFIG_FLASH_CFI_MTD: Enables MTD frame work for NOR Flash devices
diff --git a/doc/README.commands.itest b/doc/README.commands.itest
new file mode 100644
index 00000000000..5e0fe86247a
--- /dev/null
+++ b/doc/README.commands.itest
@@ -0,0 +1,16 @@
+A slow day today so here is a revised itest command with provisional
+support for comparing strings as well :-))
+
+Now table driven to allow the operators
+-eq, -ne, -lt, -gt, -le, -ge, ==, !=, <>, <, >, <=, >=
+
+Uses the expected command modifier for integer compares of width 1, 2 or
+4 bytes of .b, .w, .l and the new modifer of .s for a string compare.
+String comparison is over the length of the shorter, this hopefully
+avoids missing terminators when using an indirect pointer.
+
+eg.
+if itest.l *40000 == 12345678 then; ....
+if itest.w *40000 != 1234 then; ....
+if itest.b *40000 >= 12 then; ....
+if itest.s *40000 -eq hello then; ....
diff --git a/doc/README.commands.spl b/doc/README.commands.spl
new file mode 100644
index 00000000000..ecfd3ca9ee5
--- /dev/null
+++ b/doc/README.commands.spl
@@ -0,0 +1,31 @@
+The spl command is used to export a boot parameter image to RAM. Later
+it may implement more functions connected to the SPL.
+
+SUBCOMMAND EXPORT
+To execute the command everything has to be in place as if bootm should be
+used. (kernel image, initrd-image, fdt-image etc.)
+
+export has two subcommands:
+	atags: exports the ATAGS
+	fdt: exports the FDT
+
+Call is:
+spl export <fdt|atags> [kernel_addr] [initrd_addr] [fdt_addr if fdt]
+
+
+TYPICAL CALL
+
+on OMAP3:
+nandecc hw
+nand read 0x82000000 0x280000 0x400000	/* Read kernel image from NAND*/
+spl export atags			/* export ATAGS */
+nand erase 0x680000 0x20000		/* erase - one page */
+nand write 0x80000100 0x680000 0x20000	/* write the image - one page */
+
+call with FDT:
+nandecc hw
+nand read 0x82000000 0x280000 0x400000	/* Read kernel image from NAND*/
+tftpboot 0x80000100 devkit8000.dtb /* Read fdt */
+spl export fdt 0x82000000 - 0x80000100	/* export FDT */
+nand erase 0x680000 0x20000		/* erase - one page */
+nand write <adress shown by spl export> 0x680000 0x20000
diff --git a/doc/README.console b/doc/README.console
new file mode 100644
index 00000000000..9f5812c89d1
--- /dev/null
+++ b/doc/README.console
@@ -0,0 +1,100 @@
+SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2000
+ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
+ */
+
+U-Boot console handling
+========================
+
+HOW THE CONSOLE WORKS?
+----------------------
+
+At system startup U-Boot initializes a serial console. When U-Boot
+relocates itself to RAM, all console drivers are initialized (they
+will register all detected console devices to the system for further
+use).
+
+If not defined in the environment, the first input device is assigned
+to the 'stdin' file, the first output one to 'stdout' and 'stderr'.
+
+You can use the command "coninfo" to see all registered console
+devices and their flags. You can assign a standard file (stdin,
+stdout or stderr) to any device you see in that list simply by
+assigning its name to the corresponding environment variable. For
+example:
+
+    setenv stdin serial		<- To use the serial input
+    setenv stdout video		<- To use the video console
+
+Do a simple "saveenv" to save the console settings in the environment
+and get them working on the next startup, too.
+
+HOW CAN I USE STANDARD FILE INTO THE SOURCES?
+---------------------------------------------
+
+You can use the following functions to access the console:
+
+* STDOUT:
+    putc	(to put a char to stdout)
+    puts	(to put a string to stdout)
+    printf	(to format and put a string to stdout)
+
+* STDIN:
+    tstc	(to test for the presence of a char in stdin)
+    getc	(to get a char from stdin)
+
+* STDERR:
+    eputc	(to put a char to stderr)
+    eputs	(to put a string to stderr)
+    eprintf	(to format and put a string to stderr)
+
+* FILE (can be 'stdin', 'stdout', 'stderr'):
+    fputc	(like putc but redirected to a file)
+    fputs	(like puts but redirected to a file)
+    fprintf	(like printf but redirected to a file)
+    ftstc	(like tstc but redirected to a file)
+    fgetc	(like getc but redirected to a file)
+
+Remember that all FILE-related functions CANNOT be used before
+U-Boot relocation (done in 'board_init_r' in arch/*/lib/board.c).
+
+HOW CAN I USE STANDARD FILE INTO APPLICATIONS?
+----------------------------------------------
+
+Use the 'bd_mon_fnc' field of the bd_info structure passed to the
+application to do everything you want with the console.
+
+But REMEMBER that that will work only if you have not overwritten any
+U-Boot code while loading (or uncompressing) the image of your
+application.
+
+For example, you won't get the console stuff running in the Linux
+kernel because the kernel overwrites U-Boot before running. Only
+some parameters like the framebuffer descriptors are passed to the
+kernel in the high memory area to let the applications (the kernel)
+use the framebuffers initialized by U-Boot.
+
+SUPPORTED DRIVERS
+-----------------
+
+Working drivers:
+
+    serial	(architecture dependent serial stuff)
+    video	(mpc8xx video controller)
+
+Work in progress:
+
+    wl_kbd	(Wireless 4PPM keyboard)
+
+Waiting for volounteers:
+
+    lcd	(mpc8xx lcd controller; to )
+
+TESTED CONFIGURATIONS
+---------------------
+
+The driver has been tested with the following configurations (see
+CREDITS for other contact informations):
+
+- MPC823FADS with AD7176 on a PAL TV (YCbYCr)	- arsenio@tin.it
diff --git a/doc/README.davinci b/doc/README.davinci
new file mode 100644
index 00000000000..ea81279a0f3
--- /dev/null
+++ b/doc/README.davinci
@@ -0,0 +1,82 @@
+Summary
+=======
+
+Note: this document used to be about the entire family of DaVinci SOCs but the
+support for the DM* family and DA830 has since been dropped.
+
+This README is about U-Boot support for TI's DA850 SoC. This SOC has an OMAP
+part number but is very similar to the DaVinci series.
+
+Currently the following boards are supported:
+
+* TI DA850 EVM
+
+* TI OMAP-L138 LCDK
+
+* Lego EV3
+
+Build
+=====
+
+* TI DA850 EVM:
+
+make da850evm_config
+make
+
+* TI OMAP-L138 LCDK
+
+make omapl138_lcdk_defconfig
+make
+
+* Lego EV3
+
+make legoev3_defconfig
+make
+
+Bootloaders
+===============
+
+For DA850 an SPL (secondary program loader, see doc/README.SPL) is provided
+to load U-Boot from SPI flash, MMC or NAND. The SPL takes care of the low level
+initialization.
+
+The SPL is built as u-boot.ais for all DA850 defconfigs except those booting
+from NOR flash. The resulting image file can be programmed to the SPI flash
+of the DA850 EVM/LCDK.
+
+Devices that support booting from NOR utilize execute in place (XIP) and do
+not require SPL to perform low level initialization.
+
+Environment Variables
+=====================
+
+The DA850 EVM allows the user to specify the maximum cpu clock allowed by the
+silicon, in Hz, via an environment variable "maxcpuclk".
+
+The maximum clock rate allowed depends on the silicon populated on the EVM.
+Please make sure you understand the restrictions placed on this clock in the
+device specific datasheet before setting up this variable. This information is
+passed to the Linux kernel using the ATAG_REVISION atag.
+
+If "maxcpuclk" is not defined, the configuration CFG_DA850_EVM_MAX_CPU_CLK
+is used to obtain this information.
+
+Links
+=====
+
+1) TI DA850 EVM
+http://focus.ti.com/docs/prod/folders/print/omap-l138.html
+http://www.logicpd.com/products/development-kits/zoom-omap-l138-evm-development-kit
+
+2) TI OMAP-L138 LCDK
+http://focus.ti.com/docs/prod/folders/print/omap-l138.html
+https://www.ti.com/tool/TMDXLCDK138
+
+Davinci special defines
+=======================
+
+CFG_SYS_DV_NOR_BOOT_CFG:	AM18xx based boards, booting in NOR Boot mode
+				need a "NOR Boot Configuration Word" stored
+				in the NOR Flash. This define adds this.
+				More Info about this, see:
+				spraba5a.pdf chapter 3.1
diff --git a/doc/README.davinci.nand_spl b/doc/README.davinci.nand_spl
new file mode 100644
index 00000000000..f46721a00ef
--- /dev/null
+++ b/doc/README.davinci.nand_spl
@@ -0,0 +1,141 @@
+With this approach, we don't need the UBL any more on DaVinci boards.
+A "make boardname" will compile a u-boot.ubl, with UBL Header, which is
+needed for the RBL to find the "UBL", which actually is a  UBL-compatible
+header, nand spl code and u-boot code.
+
+
+As the RBL uses another read function as the "standard" u-boot,
+we need a command, which switches between this two read/write
+functions, so we can write the UBL header and the spl
+code in a format, which the RBL can read. This is realize
+(at the moment in board specific code) in the u-boot command
+nandrbl
+
+nandrbl without arguments returns actual mode (rbl or uboot).
+with nandrbl mode (mode = "rbl" or "uboot") you can switch
+between the two NAND read/write modes.
+
+
+To set up mkimage you need a config file for mkimage, example:
+board/ait/cam_enc_4xx/ublimage.cfg
+
+For information about the configuration please see:
+doc/README.ublimage
+
+Example for the cam_enc_4xx board:
+On the cam_enc_4xx board we have a NAND flash with blocksize = 0x20000 and
+pagesize = 0x800, so the u-boot.ubl image (which you get with:
+"make cam_enc_4xx") looks like this:
+
+00000000  00 ed ac a1 20 00 00 00  06 00 00 00 05 00 00 00  |.... ...........|
+00000010  00 00 00 00 20 00 00 00  ff ff ff ff ff ff ff ff  |.... ...........|
+00000020  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
+*
+00000800  14 00 00 ea 14 f0 9f e5  10 f0 9f e5 0c f0 9f e5  |................|
+00000810  08 f0 9f e5 04 f0 9f e5  00 f0 9f e5 04 f0 1f e5  |................|
+00000820  00 01 00 00 78 56 34 12  78 56 34 12 78 56 34 12  |....xV4.xV4.xV4.|
+[...]
+*
+00001fe0  00 00 00 00 00 00 00 00  ff ff ff ff ff ff ff ff  |................|
+00001ff0  ff ff ff ff ff ff ff ff  ff ff ff ff ff ff ff ff  |................|
+*
+00003800  14 00 00 ea 14 f0 9f e5  14 f0 9f e5 14 f0 9f e5  |................|
+00003810  14 f0 9f e5 14 f0 9f e5  14 f0 9f e5 14 f0 9f e5  |................|
+00003820  80 01 08 81 e0 01 08 81  40 02 08 81 a0 02 08 81  |........@.......|
+
+In the first "page" of the image, we have the UBL Header, needed for
+the RBL to find the spl code.
+
+The spl code starts in the second "page" of the image, with a size
+defined by:
+
+#define CONFIG_SYS_NROF_PAGES_NAND_SPL	6
+
+After the spl code, there comes the "real" u-boot code
+@ (6 + 1) * pagesize = 0x3800
+
+------------------------------------------------------------------------
+Setting up spl code:
+
+/*
+ * RBL searches from Block n (n = 1..24)
+ * so we can define, how many UBL Headers
+ * we write before the real spl code
+ */
+#define CONFIG_SYS_NROF_UBL_HEADER	5
+#define CONFIG_SYS_NROF_PAGES_NAND_SPL	6
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	((CONFIG_SYS_NROF_UBL_HEADER * \
+					CONFIG_SYS_NAND_BLOCK_SIZE) + \
+					(CONFIG_SYS_NROF_PAGES_NAND_SPL) * \
+					CONFIG_SYS_NAND_PAGE_SIZE)
+------------------------------------------------------------------------
+
+Burning into NAND:
+
+step 1:
+The RBL searches from Block n ( n = 1..24) on page 0 for valid UBL
+Headers, so you have to burn the UBL header page from the u-boot.ubl
+image to the blocks, you want to have the UBL header.
+!! Don;t forget to switch to rbl nand read/write functions with
+   "nandrbl rbl"
+
+step 2:
+You need to setup in the ublimage.cfg, where the RBL can find the spl
+code, and how big it is.
+
+!! RBL always starts reading from page 0 !!
+
+For the AIT board, we have:
+PAGES		6
+START_BLOCK	5
+
+So we need to copy the spl code to block 5 page 0
+!! Don;t forget to switch to rbl nand read/write functions with
+   "nandrbl rbl"
+
+step 3:
+You need to copy the u-boot image to the block/page
+where the spl code reads it (CONFIG_SYS_NAND_U_BOOT_OFFS)
+!! Don;t forget to switch to rbl nand read/write functions with
+   "nandrbl uboot", which is default.
+
+On the cam_enc_4xx board it is:
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	(0xc0000)
+
+-> this results in following NAND usage on the cam_enc_4xx board:
+
+addr
+
+20000		possible UBL Header
+40000		possible UBL Header
+60000		possible UBL Header
+80000		possilbe UBL Header
+a0000		spl code
+c0000		u-boot code
+
+The above steps are executeed through the following environment vars:
+(using 80000 as address for the UBL header)
+
+pagesz=800
+uboot=/tftpboot/cam_enc_4xx/u-boot.ubl
+load=tftp 80000000 ${uboot}
+writeheader nandrbl rbl;nand erase 80000 ${pagesz};nand write 80000000 80000 ${pagesz};nandrbl uboot
+writenand_spl nandrbl rbl;nand erase a0000 3000;nand write 80000800 a0000 3000;nandrbl uboot
+writeuboot nandrbl uboot;nand erase c0000 5d000;nand write 80003800 c0000 5d000
+update=run load writeheader writenand_spl writeuboot
+
+If you do a "run load update" u-boot, spl + ubl header
+are magically updated ;-)
+
+Note:
+- There seem to be a bug in the RBL code (at least on my HW),
+  In the UBL block, I can set the page to values != 0, so it
+  is possible to burn step 1 and step 2 in one step into the
+  flash, but the RBL ignores the page settings, so I have to
+  burn the UBL Header to a page 0 and the spl code to
+  a page 0 ... :-(
+- If we make the nand read/write functions in the RBL equal to
+  the functions in u-boot (as I have no RBL code, it is only
+  possible in u-boot), we could burn the complete image in
+  one step ... that would be nice ...
diff --git a/doc/README.dfutftp b/doc/README.dfutftp
new file mode 100644
index 00000000000..12065079117
--- /dev/null
+++ b/doc/README.dfutftp
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+#  Copyright (C) 2015
+#
+#  Lukasz Majewski <l.majewski@majess.pl>
+
+Device Firmware Upgrade (DFU) - extension to use TFTP
+=====================================================
+
+Why?
+----
+
+* Update TFTP (CONFIG_UPDATE_TFTP) only supports writing
+code to NAND memory via TFTP.
+* DFU supports writing data to the variety of mediums (NAND,
+eMMC, SD, partitions, RAM, etc) via USB.
+
+Combination of both solves their shortcomings!
+
+
+Overview
+--------
+
+This document briefly describes how to use DFU for
+upgrading firmware (e.g. kernel, u-boot, rootfs, etc.)
+via TFTP protocol.
+
+By using Ethernet (TFTP protocol to be precise) it is
+possible to overcome the major problem of USB based DFU -
+the relatively low transfer speed for large files.
+This was caused by DFU standard, which imposed utilization
+of only EP0 for transfer. By using Ethernet we can circumvent
+this shortcoming.
+
+Beagle Bone Black rev. C (BBB) powered by TI's am335x CPU has
+been used as a demo board.
+
+To utilize this feature, one needs to first enable support
+for USB based DFU (CONFIG_DFU_*) and DFU TFTP update
+(CONFIG_DFU_TFTP) described in ./doc/README.update.
+
+The "dfu" command has been extended to support transfer via TFTP - one
+needs to type for example "dfu tftp 0 mmc 0"
+
+As of this writing (SHA1:8d77576371381ade83de475bb639949b44941e8c v2015.10-rc2)
+the update.c code is not enabled (CONFIG_UPDATE_TFTP) by any board in the
+contemporary u-boot tree.
+
+
+Environment variables
+---------------------
+
+The "dfu tftp" command can be used in the "preboot" environment variable
+(when it is enabled by defining CONFIG_PREBOOT).
+This is the preferable way of using this command in the early boot stage
+as opposed to legacy update_tftp() function invocation.
+
+
+Beagle Bone Black (BBB) setup
+-----------------------------
+
+1. Setup tftp env variables:
+   *  select desired eth device - 'ethact' variable ["ethact=cpsw"]
+      (use "bdinfo" to check current setting)
+   *  setup "serverip" and "ipaddr" variables
+   *  set "loadaddr" as a fixed buffer where incoming data is placed
+      ["loadaddr=0x81000000"]
+
+#########
+# BONUS #
+#########
+It is possible to use USB interface to emulate ETH connection by setting
+"ethact=usb_ether". In this way one can have very fast DFU transfer via USB.
+
+For 33MiB test image the transfer rate was 1MiB/s for ETH over USB and 200KiB/s
+for pure DFU USB transfer.
+
+2. Setup update_tftp variables:
+   *  set "updatefile" - the file name to be downloaded via TFTP (stored on
+      the HOST at e.g. /srv/tftp)
+
+3. If required, to update firmware on boot, put the "dfu tftp 0 mmc 0" in the
+    "preboot" env variable. Otherwise use this command from u-boot prompt.
+
+4. Inspect "dfu" specific variables:
+   * "dfu_alt_info" - information about available DFU entities
+   * "dfu_bufsiz"   - variable to set buffer size [in bytes] - when it is not
+		    possible to set large enough default buffer (8 MiB @ BBB)
+
+
+FIT image format for download
+-----------------------------
+
+To create FIT image for download one should follow the update tftp README file
+(./doc/README.update) with one notable difference:
+
+The original snippet of ./doc/uImage.FIT/update_uboot.its
+
+	images {
+		update@1 {
+			description = "U-Boot binary";
+
+should look like
+
+	images {
+		u-boot.bin@1 {
+			description = "U-Boot binary";
+
+where "u-boot.bin" is the DFU entity name to be stored.
+
+
+To do
+-----
+
+* Extend dfu-util command to support TFTP based transfers
+* Upload support (via TFTP)
diff --git a/doc/README.displaying-bmps b/doc/README.displaying-bmps
new file mode 100644
index 00000000000..331154166d9
--- /dev/null
+++ b/doc/README.displaying-bmps
@@ -0,0 +1,27 @@
+If you are experiencing hangups/data-aborts when trying to display a BMP image,
+the following might be relevant to your situation...
+
+Some architectures cannot handle unaligned memory accesses, and an attempt to
+perform one will lead to a data abort. On such architectures it is necessary to
+make sure all data is properly aligned, and in many situations simply choosing
+a 32 bit aligned address is enough to ensure proper alignment. This is not
+always the case when dealing with data that has an internal layout such as a
+BMP image:
+
+BMP images have a header that starts with 2 byte-size fields followed by mostly
+32 bit fields. The packed struct that represents this header can be seen below:
+
+typedef struct bmp_header {
+	/* Header */
+	char signature[2];
+	__u32	file_size;
+	__u32	reserved;
+	__u32	data_offset;
+	... etc
+} __attribute__ ((packed)) bmp_header_t;
+
+When placed in an aligned address such as 0x80a00000, char signature offsets
+the __u32 fields into unaligned addresses (in our example 0x80a00002,
+0x80a00006, and so on...). When these fields are accessed by U-Boot, a 32 bit
+access is generated at a non-32-bit-aligned address, causing a data abort.
+The proper alignment for BMP images is therefore: 32-bit-aligned-address + 2.
diff --git a/doc/README.dns b/doc/README.dns
new file mode 100644
index 00000000000..8dff454b1df
--- /dev/null
+++ b/doc/README.dns
@@ -0,0 +1,62 @@
+Domain Name System
+-------------------------------------------
+
+The Domain Name System (DNS) is a hierarchical naming system for computers,
+services, or any resource participating in the Internet. It associates various
+information with domain names assigned to each of the participants. Most
+importantly, it translates domain names meaningful to humans into the numerical
+(binary) identifiers associated with networking equipment for the purpose of
+locating and addressing these devices world-wide. An often used analogy to
+explain the Domain Name System is that it serves as the "phone book" for the
+Internet by translating human-friendly computer hostnames into IP addresses.
+For example, www.example.com translates to 208.77.188.166.
+
+For more information on DNS - http://en.wikipedia.org/wiki/Domain_Name_System
+
+U-Boot and DNS
+------------------------------------------
+
+CONFIG_CMD_DNS - controls if the 'dns' command is compiled in. If it is, it
+		 will send name lookups to the dns server (env var 'dnsip')
+		 Turning this option on will about abou 1k to U-Boot's size.
+
+		 Example:
+
+bfin> print dnsip
+dnsip=192.168.0.1
+
+bfin> dns www.google.com
+66.102.1.104
+
+		 By default, dns does nothing except print the IP number on
+		 the default console - which by itself, would be pretty
+		 useless. Adding a third argument to the dns command will
+		 use that as the environment variable to be set.
+
+		 Example:
+
+bfin> print googleip
+## Error: "googleip" not defined
+bfin> dns www.google.com googleip
+64.233.161.104
+bfin> print googleip
+googleip=64.233.161.104
+bfin> ping ${googleip}
+Using Blackfin EMAC device
+host 64.233.161.104 is alive
+
+		 In this way, you can lookup, and set many more meaningful
+		 things.
+
+bfin> sntp
+ntpserverip not set
+bfin> dns pool.ntp.org ntpserverip
+72.18.205.156
+bfin> sntp
+Date: 2009-07-18 Time:	4:06:57
+
+		 For some helpful things that can be related to DNS in U-Boot,
+		 look at the top level README for these config options:
+		    CONFIG_CMD_DHCP
+		    CONFIG_BOOTP_DNS
+		    CONFIG_BOOTP_DNS2
diff --git a/doc/README.enetaddr b/doc/README.enetaddr
new file mode 100644
index 00000000000..5baa9f21798
--- /dev/null
+++ b/doc/README.enetaddr
@@ -0,0 +1,118 @@
+---------------------------------
+ Ethernet Address (MAC) Handling
+---------------------------------
+
+There are a variety of places in U-Boot where the MAC address is used, parsed,
+and stored.  This document covers proper usage of each location and the moving
+of data between them.
+
+-----------
+ Locations
+-----------
+
+Here are the places where MAC addresses might be stored:
+
+ - board-specific location (eeprom, dedicated flash, ...)
+	Note: only used when mandatory due to hardware design etc...
+
+ - environment ("ethaddr", "eth1addr", ...)
+	Note: this is the preferred way to permanently store MAC addresses
+
+ - ethernet data (struct eth_device -> enetaddr)
+	Note: these are temporary copies of the MAC address which exist only
+	      after the respective init steps have run and only to make usage
+	      in other places easier (to avoid constant env lookup/parsing)
+
+ - struct bd_info and/or device tree
+	Note: these are temporary copies of the MAC address only for the
+	      purpose of passing this information to an OS kernel we are about
+	      to boot
+
+Correct flow of setting up the MAC address (summarized):
+
+1. Read from hardware in initialize() function
+2. Read from environment in net/eth.c after initialize()
+3. The environment variable will be compared to the driver initialized
+   struct eth_device->enetaddr. If they differ, a warning is printed, and the
+   environment variable will be used unchanged.
+   If the environment variable is not set, it will be initialized from
+   eth_device->enetaddr, and a warning will be printed.
+   If both are invalid and CONFIG_NET_RANDOM_ETHADDR is defined, a random,
+   locally-assigned MAC is written to eth_device->enetaddr.
+4. Program the address into hardware if the following conditions are met:
+	a) The relevant driver has a 'write_addr' function
+	b) The user hasn't set an 'ethmacskip' environment variable
+	c) The address is valid (unicast, not all-zeros)
+
+Previous behavior had the MAC address always being programmed into hardware
+in the device's init() function.
+
+-------
+ Usage
+-------
+
+If the hardware design mandates that the MAC address is stored in some special
+place (like EEPROM etc...), then the board specific init code (such as the
+board-specific misc_init_r() function) is responsible for locating the MAC
+address(es) and initializing the respective environment variable(s) from it.
+Note that this shall be done if, and only if, the environment does not already
+contain these environment variables, i.e. existing variable definitions must
+not be overwritten.
+
+During runtime, the ethernet layer will use the environment variables to sync
+the MAC addresses to the ethernet structures.  All ethernet driver code should
+then only use the enetaddr member of the eth_device structure.  This is done
+on every network command, so the ethernet copies will stay in sync.
+
+Any other code that wishes to access the MAC address should query the
+environment directly.  The helper functions documented below should make
+working with this storage much smoother.
+
+---------
+ Helpers
+---------
+
+To assist in the management of these layers, a few helper functions exist.  You
+should use these rather than attempt to do any kind of parsing/manipulation
+yourself as many common errors have arisen in the past.
+
+	* void string_to_enetaddr(const char *addr, uchar *enetaddr);
+
+Convert a string representation of a MAC address to the binary version.
+char *addr = "00:11:22:33:44:55";
+uchar enetaddr[6];
+string_to_enetaddr(addr, enetaddr);
+/* enetaddr now equals { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 } */
+
+	* int eth_env_get_enetaddr(char *name, uchar *enetaddr);
+
+Look up an environment variable and convert the stored address.  If the address
+is valid, then the function returns 1.  Otherwise, the function returns 0.  In
+all cases, the enetaddr memory is initialized.  If the env var is not found,
+then it is set to all zeros.  The common function is_valid_ethaddr() is used
+to determine address validity.
+uchar enetaddr[6];
+if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
+	/* "ethaddr" is not set in the environment */
+	... try and setup "ethaddr" in the env ...
+}
+/* enetaddr is now set to the value stored in the ethaddr env var */
+
+	* int eth_env_set_enetaddr(char *name, const uchar *enetaddr);
+
+Store the MAC address into the named environment variable.  The return value is
+the same as the env_set() function.
+uchar enetaddr[6] = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 };
+eth_env_set_enetaddr("ethaddr", enetaddr);
+/* the "ethaddr" env var should now be set to "00:11:22:33:44:55" */
+
+	* the %pM format modifier
+
+The %pM format modifier can be used with any standard printf function to format
+the binary 6 byte array representation of a MAC address.
+uchar enetaddr[6] = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 };
+printf("The MAC is %pM\n", enetaddr);
+
+char buf[20];
+sprintf(buf, "%pM", enetaddr);
+/* the buf variable is now set to "00:11:22:33:44:55" */
diff --git a/doc/README.esbc_validate b/doc/README.esbc_validate
new file mode 100644
index 00000000000..540923215e7
--- /dev/null
+++ b/doc/README.esbc_validate
@@ -0,0 +1,40 @@
+SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2015
+ */
+
+esbc_validate command
+========================================
+
+1. esbc_validate command is meant for validating header and
+    signature of images (Boot Script and ESBC uboot client).
+    SHA-256 and RSA operations are performed using SEC block in HW.
+    This command works on both PBL based and Non PBL based Freescale
+    platforms.
+   Command usage:
+    esbc_validate img_hdr_addr [pub_key_hash]
+    esbc_validate hdr_addr <hash_val>
+     Validates signature using RSA verification.
+     $hdr_addr Address of header of the image to be validated.
+     $hash_val -Optional. It provides Hash of public/srk key to be
+       used to verify signature.
+
+2. ESBC uboot client can be linux. Additionally, rootfs and device
+    tree blob can also be signed.
+3. In the event of header or signature failure in validation,
+    ITS and ITF bits determine further course of action.
+4. In case of soft failure, appropriate error is dumped on console.
+5. In case of hard failure, SoC is issued RESET REQUEST after
+    dumping error on the console.
+6. KEY REVOCATION Feature:
+    QorIQ platforms like B4/T4 have support of srk key table and key
+    revocation in ISBC code in Silicon.
+    The srk key table allows the user to have a key table with multiple
+    keys and revoke any key in case of particular key gets compromised.
+    In case the ISBC code uses the key revocation and srk key table to
+    verify the u-boot code, the subsequent chain of trust should also
+    use the same.
+6. ISBC KEY EXTENSION Feature:
+    This feature allows large number of keys to be used for esbc validation
+    of images. A set of public keys is being signed and validated by ISBC
+    which can be further used for esbc validation of images.
diff --git a/doc/README.ext4 b/doc/README.ext4
new file mode 100644
index 00000000000..8ecd21eee3b
--- /dev/null
+++ b/doc/README.ext4
@@ -0,0 +1,83 @@
+U-Boot supports access of both ext2 and ext4 filesystems, either in read-only
+mode or in read-write mode.
+
+First, to enable support for both ext4 (and, automatically, ext2 as well),
+but without selecting the corresponding commands, enable one of the following:
+
+  CONFIG_FS_EXT4	(for read-only)
+  CONFIG_EXT4_WRITE	(for read-write)
+
+Next, to select the ext2-related commands:
+
+  * ext2ls
+  * ext2load
+
+or ext4-related commands:
+
+  * ext4size
+  * ext4ls
+  * ext4load
+
+use one or both of:
+
+  CONFIG_CMD_EXT2
+  CONFIG_CMD_EXT4
+
+Selecting either of the above automatically selects CONFIG_FS_EXT4 if it
+wasn't enabled already.
+
+In addition, to get the write access command "ext4write", enable:
+
+  CONFIG_CMD_EXT4_WRITE
+
+which automatically selects CONFIG_EXT4_WRITE if it wasn't defined
+already.
+
+Also relevant are the generic filesystem commands, selected by:
+
+  CONFIG_CMD_FS_GENERIC
+
+This does not automatically enable EXT4 support for you, you still need
+to do that yourself.
+
+Some sample commands to test ext4 support:
+
+1. Check that the commands can be seen in the output of U-Boot help:
+
+	UBOOT #help
+	...
+	ext4load- load binary file from a Ext4 file system
+	ext4ls  - list files in a directory (default /)
+	ext4size - determine a file's size
+	ext4write- create a file in ext4 formatted partition
+	...
+
+2. To list the files in an ext4-formatted partition, run:
+
+	ext4ls <interface> <dev[:part]> [directory]
+
+	For example:
+	UBOOT #ext4ls mmc 0:5 /usr/lib
+
+3. To read and load a file from an ext4-formatted partition to RAM, run:
+
+	ext4load <interface> <dev[:part]> [addr] [filename] [bytes]
+
+	For example:
+	UBOOT #ext4load mmc 2:2 0x30007fc0 uImage
+
+4. To write a file to an ext4-formatted partition.
+
+	a) First load a file to RAM at a particular address for example 0x30007fc0.
+	Now execute ext4write command:
+	ext4write <interface> <dev[:part]> [filename] [Address] [sizebytes]
+
+	For example:
+	UBOOT #ext4write mmc 2:2 /boot/uImage 0x30007fc0 6183120
+	(here 6183120 is the size of the file to be written)
+	Note: Absolute path is required for the file to be written
+
+References :
+	-- ext4 implementation in Linux Kernel
+	-- Uboot existing ext2 load and ls implementation
+	-- Journaling block device JBD2 implementation in linux Kernel
diff --git a/doc/README.fec_mxc b/doc/README.fec_mxc
new file mode 100644
index 00000000000..a33f4a75742
--- /dev/null
+++ b/doc/README.fec_mxc
@@ -0,0 +1,28 @@
+U-Boot config options used in fec_mxc.c
+
+CONFIG_FEC_MXC
+	Selects fec_mxc.c to be compiled into u-boot. Can read out the
+	ethaddr from the SoC eFuses (see below).
+
+CONFIG_MII
+	Must be defined if CONFIG_FEC_MXC is defined.
+
+CFG_FEC_MXC_SWAP_PACKET
+	Forced on iff MX28.
+	Swaps the bytes order of all words(4 byte units) in the packet.
+	This should not be specified by a board file. It is cpu specific.
+
+CONFIG_PHYLIB
+	fec_mxc supports PHYLIB and should be used for new boards.
+
+CONFIG_FEC_MXC_NO_ANEG
+	Relevant only if PHYLIB not used. Skips auto-negotiation restart.
+
+CFG_FEC_MXC_PHYADDR
+	Optional, selects the exact phy address that should be connected
+	and function fecmxc_initialize will try to initialize it.
+
+Reading the ethaddr from the SoC eFuses:
+if CONFIG_FEC_MXC is defined and the U-Boot environment does not contain the
+ethaddr variable, then its value gets read from the corresponding eFuses in
+the SoC. See the README files of the specific SoC for details.
diff --git a/doc/README.fsl-ddr b/doc/README.fsl-ddr
new file mode 100644
index 00000000000..f44bb2aa25d
--- /dev/null
+++ b/doc/README.fsl-ddr
@@ -0,0 +1,439 @@
+Table of interleaving 2-4 controllers
+=====================================
+  +--------------+-----------------------------------------------------------+
+  |Configuration |                    Memory Controller                      |
+  |              |       1              2              3             4       |
+  |--------------+--------------+--------------+-----------------------------+
+  | Two memory   | Not Intlv'ed | Not Intlv'ed |                             |
+  | complexes    +--------------+--------------+                             |
+  |              |      2-way Intlv'ed         |                             |
+  |--------------+--------------+--------------+--------------+              |
+  |              | Not Intlv'ed | Not Intlv'ed | Not Intlv'ed |              |
+  | Three memory +--------------+--------------+--------------+              |
+  | complexes    |         2-way Intlv'ed      | Not Intlv'ed |              |
+  |              +-----------------------------+--------------+              |
+  |              |                  3-way Intlv'ed            |              |
+  +--------------+--------------+--------------+--------------+--------------+
+  |              | Not Intlv'ed | Not Intlv'ed | Not Intlv'ed | Not Intlv'ed |
+  | Four memory  +--------------+--------------+--------------+--------------+
+  | complexes    |       2-way Intlv'ed        |       2-way Intlv'ed        |
+  |              +-----------------------------+-----------------------------+
+  |              |                      4-way Intlv'ed                       |
+  +--------------+-----------------------------------------------------------+
+
+
+Table of 2-way interleaving modes supported in cpu/8xxx/ddr/
+======================================================
+  +-------------+---------------------------------------------------------+
+  |		|		    Rank Interleaving			  |
+  |		+--------+-----------+-----------+------------+-----------+
+  |Memory	|	 |	     |		 |    2x2     |    4x1	  |
+  |Controller	|  None  | 2x1 lower | 2x1 upper | {CS0+CS1}, | {CS0+CS1+ |
+  |Interleaving |	 | {CS0+CS1} | {CS2+CS3} | {CS2+CS3}  |  CS2+CS3} |
+  +-------------+--------+-----------+-----------+------------+-----------+
+  |None		|  Yes	 | Yes	     | Yes	 | Yes	      | Yes	  |
+  +-------------+--------+-----------+-----------+------------+-----------+
+  |Cacheline	|  Yes	 | Yes	     | No	 | No, Only(*)| Yes	  |
+  |		|CS0 Only|	     |		 | {CS0+CS1}  |		  |
+  +-------------+--------+-----------+-----------+------------+-----------+
+  |Page		|  Yes	 | Yes	     | No	 | No, Only(*)| Yes	  |
+  |		|CS0 Only|	     |		 | {CS0+CS1}  |		  |
+  +-------------+--------+-----------+-----------+------------+-----------+
+  |Bank		|  Yes	 | Yes	     | No	 | No, Only(*)| Yes	  |
+  |		|CS0 Only|	     |		 | {CS0+CS1}  |		  |
+  +-------------+--------+-----------+-----------+------------+-----------+
+  |Superbank	|  No	 | Yes	     | No	 | No, Only(*)| Yes	  |
+  |		|	 |	     |		 | {CS0+CS1}  |		  |
+  +-------------+--------+-----------+-----------+------------+-----------+
+ (*) Although the hardware can be configured with memory controller
+ interleaving using "2x2" rank interleaving, it only interleaves {CS0+CS1}
+ from each controller. {CS2+CS3} on each controller are only rank
+ interleaved on that controller.
+
+ For memory controller interleaving, identical DIMMs are suggested. Software
+ doesn't check the size or organization of interleaved DIMMs.
+
+The ways to configure the ddr interleaving mode
+==============================================
+1. In board header file(e.g.MPC8572DS.h), add default interleaving setting
+   under "CFG_EXTRA_ENV_SETTINGS", like:
+	#define CFG_EXTRA_ENV_SETTINGS				\
+	 "hwconfig=fsl_ddr:ctlr_intlv=bank"			\
+	 ......
+
+2. Run U-Boot "setenv" command to configure the memory interleaving mode.
+   Either numerical or string value is accepted.
+
+  # disable memory controller interleaving
+  setenv hwconfig "fsl_ddr:ctlr_intlv=null"
+
+  # cacheline interleaving
+  setenv hwconfig "fsl_ddr:ctlr_intlv=cacheline"
+
+  # page interleaving
+  setenv hwconfig "fsl_ddr:ctlr_intlv=page"
+
+  # bank interleaving
+  setenv hwconfig "fsl_ddr:ctlr_intlv=bank"
+
+  # superbank
+  setenv hwconfig "fsl_ddr:ctlr_intlv=superbank"
+
+  # 1KB 3-way interleaving
+  setenv hwconfig "fsl_ddr:ctlr_intlv=3way_1KB"
+
+  # 4KB 3-way interleaving
+  setenv hwconfig "fsl_ddr:ctlr_intlv=3way_4KB"
+
+  # 8KB 3-way interleaving
+  setenv hwconfig "fsl_ddr:ctlr_intlv=3way_8KB"
+
+  # disable bank (chip-select) interleaving
+  setenv hwconfig "fsl_ddr:bank_intlv=null"
+
+  # bank(chip-select) interleaving cs0+cs1
+  setenv hwconfig "fsl_ddr:bank_intlv=cs0_cs1"
+
+  # bank(chip-select) interleaving cs2+cs3
+  setenv hwconfig "fsl_ddr:bank_intlv=cs2_cs3"
+
+  # bank(chip-select) interleaving (cs0+cs1) and (cs2+cs3)  (2x2)
+  setenv hwconfig "fsl_ddr:bank_intlv=cs0_cs1_and_cs2_cs3"
+
+  # bank(chip-select) interleaving (cs0+cs1+cs2+cs3) (4x1)
+  setenv hwconfig "fsl_ddr:bank_intlv=cs0_cs1_cs2_cs3"
+
+  # bank(chip-select) interleaving (auto)
+  setenv hwconfig "fsl_ddr:bank_intlv=auto"
+  This auto mode only select from cs0_cs1_cs2_cs3, cs0_cs1, null dependings
+  on DIMMs.
+
+Memory controller address hashing
+==================================
+If the DDR controller supports address hashing, it can be enabled by hwconfig.
+
+Syntax is:
+hwconfig=fsl_ddr:addr_hash=true
+
+Memory controller ECC on/off
+============================
+If ECC is enabled in board configuratoin file, i.e. #define CONFIG_DDR_ECC,
+ECC can be turned on/off by hwconfig.
+
+Syntax is
+hwconfig=fsl_ddr:ecc=off
+
+
+Memory address parity on/off
+============================
+address parity can be turned on/off by hwconfig.
+Syntax is:
+hwconfig=fsl_ddr:parity=on
+
+
+Memory testing options for mpc85xx
+==================================
+1. Memory test can be done once U-Boot prompt comes up using mtest, or
+2. Memory test can be done with Power-On-Self-Test function, activated at
+   compile time.
+
+   In order to enable the POST memory test, CFG_POST needs to be
+   defined in board configuraiton header file. By default, POST memory test
+   performs a fast test. A slow test can be enabled by changing the flag at
+   compiling time. To test memory bigger than 2GB, 36BIT support is needed.
+   Memory is tested within a 2GB window. TLBs are used to map the virtual 2GB
+   window to physical address so that all physical memory can be tested.
+
+Combination of hwconfig
+=======================
+Hwconfig can be combined with multiple parameters, for example, on a supported
+platform
+
+hwconfig=fsl_ddr:addr_hash=true,ctlr_intlv=cacheline,bank_intlv=cs0_cs1_cs2_cs3,ecc=on
+
+
+Table for dynamic ODT for DDR3
+==============================
+For single-slot system with quad-rank DIMM and dual-slot system, dynamic ODT may
+be needed, depending on the configuration. The numbers in the following tables are
+in Ohms.
+
+* denotes dynamic ODT
+
+Two slots system
++-----------------------+----------+---------------+-----------------------------+-----------------------------+
+|     Configuration	|	   |DRAM controller|	       Slot 1		 |	      Slot 2	       |
++-----------+-----------+----------+-------+-------+--------------+--------------+--------------+--------------+
+|	    |		|	   |	   |	   |	 Rank 1   |	Rank 2	 |   Rank 1	|    Rank 2    |
++  Slot 1   |	Slot 2	|Write/Read| Write | Read  |-------+------+-------+------+-------+------+-------+------+
+|	    |		|	   |	   |	   | Write | Read | Write | Read | Write | Read | Write | Read |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	    |		|  Slot 1  |  off  | 75    | 120   | off  | off   | off  | off	 | off	| 30	| 30   |
+| Dual Rank | Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	    |		|  Slot 2  |  off  | 75    | off   | off  | 30	  | 30	 | 120	 | off	| off	| off  |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	    |		|  Slot 1  |  off  | 75    | 120   | off  | off   | off  | 20	 | 20	|	|      |
+| Dual Rank |Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	    |		|  Slot 2  |  off  | 75    | off   | off  | 20	  | 20	 | 120	*| off	|	|      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	    |		|  Slot 1  |  off  | 75    | 120  *| off  |	  |	 | off	 | off	| 20	| 20   |
+|Single Rank| Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	    |		|  Slot 2  |  off  | 75    | 20    | 20   |	  |	 | 120	 | off	| off	| off  |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	    |		|  Slot 1  |  off  | 75    | 120  *| off  |	  |	 | 30	 | 30	|	|      |
+|Single Rank|Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	    |		|  Slot 2  |  off  | 75    | 30    | 30   |	  |	 | 120	*| off	|	|      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+| Dual Rank |	Empty	|  Slot 1  |  off  | 75    | 40    | off  | off   | off  |	 |	|	|      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|   Empty   | Dual Rank |  Slot 2  |  off  | 75    |	   |	  |	  |	 | 40	 | off	| off	| off  |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|Single Rank|	Empty	|  Slot 1  |  off  | 75    | 40    | off  |	  |	 |	 |	|	|      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|   Empty   |Single Rank|  Slot 2  |  off  | 75    |	   |	  |	  |	 | 40	 | off	|	|      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+
+Single slot system
++-------------+------------+---------------+-----------------------------+-----------------------------+
+|	      |		   |DRAM controller|	 Rank 1   |    Rank 2	 |    Rank 3	|    Rank 4    |
+|Configuration| Write/Read |-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	      |		   | Write | Read  | Write | Read | Write | Read | Write | Read | Write | Read |
++-------------+------------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	      |   R1	   | off   | 75    | 120  *| off  | off   | off  | 20	 | 20	| off	| off  |
+|	      |------------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	      |   R2	   | off   | 75    | off   | 20   | 120   | off  | 20	 | 20	| off	| off  |
+|  Quad Rank  |------------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	      |   R3	   | off   | 75    | 20    | 20   | off   | off  | 120	*| off	| off	| off  |
+|	      |------------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	      |   R4	   | off   | 75    | 20    | 20   | off   | off  | off	 | 20	| 120	| off  |
++-------------+------------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|	      |   R1	   | off   | 75    | 40    | off  | off   | off  |
+|  Dual Rank  |------------+-------+-------+-------+------+-------+------+
+|	      |   R2	   | off   | 75    | 40    | off  | off   | off  |
++-------------+------------+-------+-------+-------+------+-------+------+
+| Single Rank |   R1	   | off   | 75    | 40    | off  |
++-------------+------------+-------+-------+-------+------+
+
+Reference http://www.xrosstalkmag.com/mag_issues/xrosstalk_oct08_final.pdf
+	  http://download.micron.com/pdf/technotes/ddr3/tn4108_ddr3_design_guide.pdf
+
+
+Table for ODT for DDR2
+======================
+Two slots system
++-----------------------+----------+---------------+-----------------------------+-----------------------------+
+|     Configuration     |          |DRAM controller|           Slot 1            |            Slot 2           |
++-----------+-----------+----------+-------+-------+--------------+--------------+--------------+--------------+
+|           |           |          |       |       |     Rank 1   |     Rank 2   |   Rank 1     |    Rank 2    |
++  Slot 1   |   Slot 2  |Write/Read| Write | Read  |-------+------+-------+------+-------+------+-------+------+
+|           |           |          |       |       | Write | Read | Write | Read | Write | Read | Write | Read |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|           |           |  Slot 1  |  off  | 150   | off   | off  | off   | off  | 75    | 75   | off   | off  |
+| Dual Rank | Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|           |           |  Slot 2  |  off  | 150   | 75    | 75   | off   | off  | off   | off  | off   | off  |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|           |           |  Slot 1  |  off  | 150   | off   | off  | off   | off  | 75    | 75   |       |      |
+| Dual Rank |Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|           |           |  Slot 2  |  off  | 150   | 75    | 75   | off   | off  | off   | off  |       |      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|           |           |  Slot 1  |  off  | 150   | off   | off  |       |      | 75    | 75   | off   | off  |
+|Single Rank| Dual Rank |----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|           |           |  Slot 2  |  off  | 150   | 75    | 75   |       |      | off   | off  | off   | off  |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|           |           |  Slot 1  |  off  | 150   | off   | off  |       |      | 75    | 75   |       |      |
+|Single Rank|Single Rank|----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|           |           |  Slot 2  |  off  | 150   | 75    | 75   |       |      | off   | off  |       |      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+| Dual Rank |   Empty   |  Slot 1  |  off  | 75    | 150   | off  | off   | off  |       |      |       |      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|   Empty   | Dual Rank |  Slot 2  |  off  | 75    |       |      |       |      | 150   | off  | off   | off  |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|Single Rank|   Empty   |  Slot 1  |  off  | 75    | 150   | off  |       |      |       |      |       |      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+|   Empty   |Single Rank|  Slot 2  |  off  | 75    |       |      |       |      | 150   | off  |       |      |
++-----------+-----------+----------+-------+-------+-------+------+-------+------+-------+------+-------+------+
+
+Single slot system
++-------------+------------+---------------+-----------------------------+
+|             |            |DRAM controller|     Rank 1   |    Rank 2    |
+|Configuration| Write/Read |-------+-------+-------+------+-------+------+
+|             |            | Write | Read  | Write | Read | Write | Read |
++-------------+------------+-------+-------+-------+------+-------+------+
+|             |   R1       | off   | 75    | 150   | off  | off   | off  |
+|  Dual Rank  |------------+-------+-------+-------+------+-------+------+
+|             |   R2       | off   | 75    | 150   | off  | off   | off  |
++-------------+------------+-------+-------+-------+------+-------+------+
+| Single Rank |   R1       | off   | 75    | 150   | off  |
++-------------+------------+-------+-------+-------+------+
+
+Reference http://www.samsung.com/global/business/semiconductor/products/dram/downloads/applicationnote/ddr2_odt_control_200603.pdf
+
+
+Interactive DDR debugging
+===========================
+
+For DDR parameter tuning up and debugging, the interactive DDR debugger can
+be activated by setting the environment variable "ddr_interactive" to any
+value.  (The value of ddr_interactive may have a meaning in the future, but,
+for now, the presence of the variable will cause the debugger to run.)  Once
+activated, U-Boot will show the prompt "FSL DDR>" before enabling the DDR
+controller.  The available commands are printed by typing "help".
+
+Another way to enter the interactive DDR debugger without setting the
+environment variable is to send the 'd' character early during the boot
+process.  To save booting time, no additional delay is added, so the window
+to send the key press is very short -- basically, it is the time before the
+memory controller code starts to run.  For example, when rebooting from
+within U-Boot, the user must press 'd' IMMEDIATELY after hitting enter to
+initiate a 'reset' command.  In case of power on/reset, the user can hold
+down the 'd' key while applying power or hitting the board's reset button.
+
+The example flow of using interactive debugging is
+type command "compute" to calculate the parameters from the default
+type command "print" with arguments to show SPD, options, registers
+type command "edit" with arguments to change any if desired
+type command "copy" with arguments to copy controller/dimm settings
+type command "go" to continue calculation and enable DDR controller
+
+Additional commands to restart the debugging are:
+type command "reset" to reset the board
+type command "recompute" to reload SPD and start over
+
+Note, check "next_step" to show the flow. For example, after edit opts, the
+next_step is STEP_ASSIGN_ADDRESSES. After editing registers, the next_step is
+STEP_PROGRAM_REGS.  Upon issuing command "go", the debugger will program the
+DDR controller with the current setting without further calculation and then
+exit to resume the booting of the machine.
+
+The detail syntax for each commands are
+
+print [c<n>] [d<n>] [spd] [dimmparms] [commonparms] [opts] [addresses] [regs]
+	c<n>		- the controller number, eg. c0, c1
+	d<n>		- the DIMM number, eg. d0, d1
+	spd		- print SPD data
+	dimmparms	- DIMM parameters, calculated from SPD
+	commonparms	- lowest common parameters for all DIMMs
+	opts		- options
+	addresses	- address assignment (not implemented yet)
+	regs		- controller registers
+
+edit <c#> <d#> <spd|dimmparms|commonparms|opts|addresses|regs> <element> <value>
+	c<n>		- the controller number, eg. c0, c1
+	d<n>		- the DIMM number, eg. d0, d1
+	spd		- print SPD data
+	dimmparms	- DIMM parameters, calculated from SPD
+	commonparms	- lowest common parameters for all DIMMs
+	opts		- options
+	addresses	- address assignment (not implemented yet)
+	regs		- controller registers
+	<element>	- name of the modified element
+			  byte number if the object is SPD
+	<value>		- decimal or heximal (prefixed with 0x) numbers
+
+copy <src c#> <src d#> <spd|dimmparms|commonparms|opts|addresses|regs> <dst c#> <dst d#>
+	same as for "edit" command
+	DIMM numbers ignored for commonparms, opts, and regs
+
+reset
+	no arguement	- reset the board
+
+recompute
+	no argument	- reload SPD and start over
+
+compute
+	no argument	- recompute from current next_step
+
+next_step
+	no argument	- show current next_step
+
+help
+	no argument	- print a list of all commands
+
+go
+	no argument	- program memory controller(s) and continue with U-Boot
+
+Examples of debugging flow
+
+	FSL DDR>compute
+	Detected UDIMM UG51U6400N8SU-ACF
+	FSL DDR>print
+	print [c<n>] [d<n>] [spd] [dimmparms] [commonparms] [opts] [addresses] [regs]
+	FSL DDR>print dimmparms
+	DIMM parameters:  Controller=0 DIMM=0
+	DIMM organization parameters:
+	module part name = UG51U6400N8SU-ACF
+	rank_density = 2147483648 bytes (2048 megabytes)
+	capacity = 4294967296 bytes (4096 megabytes)
+	burst_lengths_bitmask = 0C
+	base_addresss = 0 (00000000 00000000)
+	n_ranks = 2
+	data_width = 64
+	primary_sdram_width = 64
+	ec_sdram_width = 0
+	registered_dimm = 0
+	n_row_addr = 15
+	n_col_addr = 10
+	edc_config = 0
+	n_banks_per_sdram_device = 8
+	tCKmin_X_ps = 1500
+	tCKmin_X_minus_1_ps = 0
+	tCKmin_X_minus_2_ps = 0
+	tCKmax_ps = 0
+	caslat_X = 960
+	tAA_ps = 13125
+	caslat_X_minus_1 = 0
+	caslat_X_minus_2 = 0
+	caslat_lowest_derated = 0
+	tRCD_ps = 13125
+	tRP_ps = 13125
+	tRAS_ps = 36000
+	tWR_ps = 15000
+	tWTR_ps = 7500
+	tRFC_ps = 160000
+	tRRD_ps = 6000
+	tRC_ps = 49125
+	refresh_rate_ps = 7800000
+	tIS_ps = 0
+	tIH_ps = 0
+	tDS_ps = 0
+	tDH_ps = 0
+	tRTP_ps = 7500
+	tDQSQ_max_ps = 0
+	tQHS_ps = 0
+	FSL DDR>edit c0 opts ECC_mode 0
+	FSL DDR>edit c0 regs cs0_bnds 0x000000FF
+	FSL DDR>go
+	2 GiB left unmapped
+	4 GiB (DDR3, 64-bit, CL=9, ECC off)
+	       DDR Chip-Select Interleaving Mode: CS0+CS1
+	Testing 0x00000000 - 0x7fffffff
+	Testing 0x80000000 - 0xffffffff
+	Remap DDR 2 GiB left unmapped
+
+	POST memory PASSED
+	Flash: 128 MiB
+	L2:    128 KB enabled
+	Corenet Platform Cache: 1024 KB enabled
+	SERDES: timeout resetting bank 3
+	SRIO1: disabled
+	SRIO2: disabled
+	MMC:  FSL_ESDHC: 0
+	EEPROM: Invalid ID (ff ff ff ff)
+	PCIe1: disabled
+	PCIe2: Root Complex, x1, regs @ 0xfe201000
+	  01:00.0     - 8086:10d3 - Network controller
+	PCIe2: Bus 00 - 01
+	PCIe3: disabled
+	In:    serial
+	Out:   serial
+	Err:   serial
+	Net:   Initializing Fman
+	Fman1: Uploading microcode version 101.8.0
+	e1000: 00:1b:21:81:d2:e0
+	FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5, e1000#0 [PRIME]
+	Warning: e1000#0 MAC addresses don't match:
+	Address in SROM is         00:1b:21:81:d2:e0
+	Address in environment is  00:e0:0c:00:ea:05
+
+	Hit any key to stop autoboot:  0
+	=>
diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc
new file mode 100644
index 00000000000..b620625dfbd
--- /dev/null
+++ b/doc/README.fsl-esdhc
@@ -0,0 +1,8 @@
+Freescale esdhc-specific options
+
+	- CONFIG_SYS_FSL_ESDHC_LE
+		ESDHC IP is in little-endian mode. Accessing ESDHC registers can be
+		determined by ESDHC IP's endian mode or processor's endian mode.
+	- CONFIG_SYS_FSL_ESDHC_BE
+		ESDHC IP is in big-endian mode. Accessing ESDHC registers can be determined
+		by ESDHC IP's endian mode or processor's endian mode.
diff --git a/doc/README.fsl-hwconfig b/doc/README.fsl-hwconfig
new file mode 100644
index 00000000000..e752505da49
--- /dev/null
+++ b/doc/README.fsl-hwconfig
@@ -0,0 +1,46 @@
+Freescale-specific 'hwconfig' options.
+
+This file documents Freescale-specific key:value pairs for the 'hwconfig'
+option.  See README.hwconfig for general information about 'hwconfig'.
+
+audclk
+	Specific to the P1022DS reference board.
+
+	This option specifies which of the two oscillator frequencies should be
+	routed to the Wolfson WM8776 codec.  The ngPIXIS can be programmed to
+	route either a 11.2896MHz or a 12.288MHz clock.  The default is
+	12.288MHz.  This option has two effects.  First, the MUX on the board
+	will be programmed accordingly.  Second, the clock-frequency property
+	in the codec node in the device tree will be updated to the correct
+	value.
+
+	'audclk:11'
+		Select the 11.2896MHz clock
+
+	'audclk:12'
+		Select the 12.288MHz clock
+
+usb
+	Specific to boards have USB controller
+
+	This option specifies the following for a USB controller:
+
+		- which controller mode to use
+		- which USB PHY to use
+
+	This is used by generic USB device-tree fixup function to update
+	modified values of phy type and controller mode.
+
+	Also used for configuring multiple USB controllers such that
+	'usbN' (where N is 1, 2, etc. refers to controller no.)
+
+	'phy_type'
+		Select USB phy type: 'utmi' OR 'ulpi'
+
+	'dr_mode'
+		Select USB controller mode: 'host', 'peripheral' OR 'otg'
+
+	Examples:
+		usb1:dr_mode=host;usb2:dr_mode=peripheral'
+
+		usb1:dr_mode=host,phy_type=utmi;usb2:dr_mode=host'
diff --git a/doc/README.fsl-trustzone-components b/doc/README.fsl-trustzone-components
new file mode 100644
index 00000000000..e1223469e33
--- /dev/null
+++ b/doc/README.fsl-trustzone-components
@@ -0,0 +1,25 @@
+Freescale ARM64 SoCs like LS2080A have ARM TrustZone components like
+TZPC-BP147 (TrustZone Protection Controller) and TZASC-400 (TrustZone
+Address Space Controller).
+
+While most of the configuration related programming of these peripherals
+is left to a root-of-trust security software layer (running in EL3
+privilege mode), but still some configurations of these peripherals
+might be required while the bootloader is executing in EL3 privilege
+mode. The following sections define how to turn on these features for
+LS2080A like SoCs.
+
+TZPC-BP147 (TrustZone Protection Controller)
+============================================
+- Depends on CONFIG_FSL_TZPC_BP147 configuration flag.
+- Separates Secure World and Normal World on-chip RAM (OCRAM) spaces.
+- Provides a programming model to set access control policy via the TZPC
+  TZDECPROT Registers.
+
+TZASC-400 (TrustZone Address Space Controller)
+==============================================
+- Depends on CONFIG_FSL_TZASC_400 configuration flag.
+- Separates Secure World and Normal World external memory spaces for bus masters
+  such as processors and DMA-equipped peripherals.
+- Supports 8 fully programmable address regions, initially inactive at reset,
+  and one base region, always active, that covers the remaining address space.
diff --git a/doc/README.fsl_iim b/doc/README.fsl_iim
new file mode 100644
index 00000000000..78d3cb8b3ef
--- /dev/null
+++ b/doc/README.fsl_iim
@@ -0,0 +1,48 @@
+Driver implementing the fuse API for Freescale's IC Identification Module (IIM)
+
+This IP can be found on the following SoCs:
+ - MPC512x,
+ - i.MX25,
+ - i.MX27,
+ - i.MX31,
+ - i.MX35,
+ - i.MX51,
+ - i.MX53.
+
+The section numbers in this file refer to the i.MX25 Reference Manual.
+
+A fuse word contains 8 fuse bit slots, as explained in 30.4.2.2.1.
+
+A bank contains 256 fuse word slots, as shown by the memory map in 30.3.1.
+
+Some fuse bit or word slots may not have the corresponding fuses actually
+implemented in the fusebox.
+
+See the README files of the SoCs using this driver in order to know the
+conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
+addresses.
+
+Fuse operations:
+
+   Read
+      Read operations are implemented as read accesses to the shadow registers,
+      using "Word y of Bank x" from the register summary in 30.3.2. This is
+      explained in detail in 30.4.5.1.
+
+   Sense
+      Sense operations are implemented as explained in 30.4.5.2.
+
+   Program
+      Program operations are implemented as explained in 30.4.5.3. Following
+      this operation, the shadow registers are reloaded by the hardware (not
+      immediately, but this does not make any difference for a user reading
+      these registers).
+
+   Override
+      Override operations are implemented as write accesses to the shadow
+      registers, as explained in 30.4.5.4.
+
+Configuration:
+
+   CONFIG_FSL_IIM
+      Enable this to enable the fsl_iim driver.
diff --git a/doc/README.fuse b/doc/README.fuse
new file mode 100644
index 00000000000..1bc91c44a6a
--- /dev/null
+++ b/doc/README.fuse
@@ -0,0 +1,67 @@
+Fuse API functions and commands
+
+The fuse API allows to control a fusebox and how it is used by the upper
+hardware layers.
+
+A fuse corresponds to a single non-volatile memory bit that can be programmed
+(i.e. blown, set to 1) only once. The programming operation is irreversible. A
+fuse that has not been programmed reads 0.
+
+Fuses can be used by SoCs to store various permanent configuration and data,
+e.g. boot configuration, security configuration, MAC addresses, etc.
+
+A fuse word is the smallest group of fuses that can be read at once from the
+fusebox control IP registers. This is limited to 32 bits with the current API.
+
+A fuse bank is the smallest group of fuse words having a common ID, as defined
+by each SoC.
+
+Upon startup, the fusebox control IP reads the fuse values and stores them to a
+volatile shadow cache.
+
+See the README files of the drivers implementing this API in order to know the
+SoC- and implementation-specific details.
+
+Functions / commands:
+
+   int fuse_read(u32 bank, u32 word, u32 *val);
+   fuse read <bank> <word> [<cnt>]
+      Read fuse words from the shadow cache.
+
+   int fuse_sense(u32 bank, u32 word, u32 *val);
+   fuse sense <bank> <word> [<cnt>]
+      Sense - i.e. read directly from the fusebox, skipping the shadow cache -
+      fuse words. This operation does not update the shadow cache.
+
+      This is useful to know the true value of fuses if an override has been
+      performed (see below).
+
+   int fuse_prog(u32 bank, u32 word, u32 val);
+   fuse prog [-y] <bank> <word> <hexval> [<hexval>...]
+      Program fuse words. This operation directly affects the fusebox and is
+      irreversible. The shadow cache is updated accordingly or not, depending on
+      each IP.
+
+      Only the bits to be programmed should be set in the input value (i.e. for
+      fuse bits that have already been programmed and hence should be left
+      unchanged by a further programming, it is preferable to clear the
+      corresponding bits in the input value in order not to perform a new
+      hardware programming operation on these fuse bits).
+
+   int fuse_override(u32 bank, u32 word, u32 val);
+   fuse override <bank> <word> <hexval> [<hexval>...]
+      Override fuse words in the shadow cache.
+
+      The fusebox is unaffected, so following this operation, the shadow cache
+      may differ from the fusebox values. Read or sense operations can then be
+      used to get the values from the shadow cache or from the fusebox.
+
+      This is useful to change the behaviors linked to some cached fuse values,
+      either because this is needed only temporarily, or because some of the
+      fuses have already been programmed or are locked (if the SoC allows to
+      override a locked fuse).
+
+Configuration:
+
+   CONFIG_CMD_FUSE
+      Define this to enable the fuse commands.
diff --git a/doc/README.generic-board b/doc/README.generic-board
new file mode 100644
index 00000000000..bc35179fbfd
--- /dev/null
+++ b/doc/README.generic-board
@@ -0,0 +1,135 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2014 Google, Inc
+# Simon Glass <sjg@chromium.org>
+
+Background
+----------
+
+U-Boot traditionally had a board.c file for each architecture. This introduced
+quite a lot of duplication, with each architecture tending to do
+initialisation slightly differently. To address this, a new 'generic board
+init' feature was introduced in March 2013 (further motivation is
+provided in the cover letter below).
+
+All boards and architectures have moved to this as of mid 2016.
+
+
+What has changed?
+-----------------
+
+The main change is that the arch/<arch>/lib/board.c file is removed in
+favour of common/board_f.c (for pre-relocation init) and common/board_r.c
+(for post-relocation init).
+
+Related to this, the global_data and bd_info structures now have a core set of
+fields which are common to all architectures. Architecture-specific fields
+have been moved to separate structures.
+
+
+Further Background
+------------------
+
+The full text of the original generic board series is reproduced below.
+
+--8<-------------
+
+This series creates a generic board.c implementation which contains
+the essential functions of the major arch/xxx/lib/board.c files.
+
+What is the motivation for this change?
+
+1. There is a lot of repeated code in the board.c files. Any change to
+things like setting up the baud rate requires a change in 10 separate
+places.
+
+2. Since there are 10 separate files, adding a new feature which requires
+initialisation is painful since it must be independently added in 10
+places.
+
+3. As time goes by the architectures naturally diverge since there is limited
+pressure to compare features or even CONFIG options against similar things
+in other board.c files.
+
+4. New architectures must implement all the features all over again, and
+sometimes in subtle different ways. This places an unfair burden on getting
+a new architecture fully functional and running with U-Boot.
+
+5. While it is a bit of a tricky change, I believe it is worthwhile and
+achievable. There is no requirement that all code be common, only that
+the code that is common should be located in common/board.c rather than
+arch/xxx/lib/board.c.
+
+All the functions of board_init_f() and board_init_r() are broken into
+separate function calls so that they can easily be included or excluded
+for a particular architecture. It also makes it easier to adopt Graeme's
+initcall proposal when it is ready.
+
+http://lists.denx.de/pipermail/u-boot/2012-January/114499.html
+
+This series removes the dependency on generic relocation. So relocation
+happens as one big chunk and is still completely arch-specific. See the
+relocation series for a proposed solution to this for ARM:
+
+http://lists.denx.de/pipermail/u-boot/2011-December/112928.html
+
+or Graeme's recent x86 series v2:
+
+http://lists.denx.de/pipermail/u-boot/2012-January/114467.html
+
+Instead of moving over a whole architecture, this series takes the approach
+of simply enabling generic board support for an architecture. It is then up
+to each board to opt in by defining CONFIG_SYS_GENERIC_BOARD in the board
+config file. If this is not done, then the code will be generated as
+before. This allows both sets of code to co-exist until we are comfortable
+with the generic approach, and enough boards run.
+
+ARM is a relatively large board.c file and one which I can test, therefore
+I think it is a good target for this series. On the other hand, x86 is
+relatively small and simple, but different enough that it introduces a
+few issues to be solved. So I have chosen both ARM and x86 for this series.
+After a suggestion from Wolfgang I have added PPC also. This is the
+largest and most feature-full board, so hopefully we have all bases
+covered in this RFC.
+
+A generic global_data structure is also required. This might upset a few
+people. Here is my basic reasoning: most fields are the same, all
+architectures include and need it, most global_data.h files already have
+#ifdefs to select fields for a particular SOC, so it is hard to
+see why architecures are different in this area. We can perhaps add a
+way to put architecture-specific fields into a separate header file, but
+for now I have judged that to be counter-productive.
+
+Similarly we need a generic bd_info structure, since generic code will
+be accessing it. I have done this in the same way as global_data and the
+same comments apply.
+
+There was dicussion on the list about passing gd_t around as a parameter
+to pre-relocation init functions. I think this makes sense, but it can
+be done as a separate change, and this series does not require it.
+
+While this series needs to stand on its own (as with the link script
+cleanup series and the generic relocation series) the goal is the
+unification of the board init code. So I hope we can address issues with
+this in mind, rather than focusing too narrowly on particular ARM, x86 or
+PPC issues.
+
+I have run-tested ARM on Tegra Seaboard only. To try it out, define
+CONFIG_SYS_GENERIC_BOARD in your board file and rebuild. Most likely on
+x86 and PPC at least it will hang, but if you are lucky it will print
+something first :-)
+
+I have run this though MAKEALL with CONFIG_SYS_GENERIC_BOARD on for all
+ARM, PPC and x86 boards. There are a few failures due to errors in
+the board config, which I have sent patches for. The main issue is
+just the difference between __bss_end and __bss_end__.
+
+Note: the first group of commits are required for this series to build,
+but could be separated out if required. I have included them here for
+convenience.
+
+------------->8--
+
+Simon Glass, sjg@chromium.org
+March 2014
+Updated after final removal, May 2016
diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci
new file mode 100644
index 00000000000..767614cbc6d
--- /dev/null
+++ b/doc/README.generic_usb_ohci
@@ -0,0 +1,29 @@
+Notes on the the generic USB-OHCI driver
+========================================
+
+This driver (drivers/usb/usb_ohci.[ch]) is the result of the merge of
+various existing OHCI drivers that were basically identical beside
+cpu/board dependant initalization. This initalization has been moved
+into cpu/board directories and are called via the hooks below.
+
+Configuration options
+----------------------
+
+	CONFIG_USB_OHCI_NEW: enable the new OHCI driver
+
+	CFG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI
+				registers
+
+	CONFIG_SYS_USB_OHCI_SLOT_NAME: slot name
+
+Endianness issues
+------------------
+
+The USB bus operates in little endian, but unfortunately there are
+OHCI controllers that operate in big endian such as ppc4xx. For these the
+config option
+
+	CONFIG_SYS_OHCI_BE_CONTROLLER
+
+needs to be defined.
+
diff --git a/doc/README.gpio b/doc/README.gpio
new file mode 100644
index 00000000000..d253f654fad
--- /dev/null
+++ b/doc/README.gpio
@@ -0,0 +1,40 @@
+
+GPIO hog (CONFIG_GPIO_HOG)
+--------
+
+All the GPIO hog are initialized using DM_FLAG_PROBE_AFTER_BIND DM flag
+after bind().
+
+Example, for the device tree:
+
+        tca6416@20 {
+                compatible = "ti,tca6416";
+                reg = <0x20>;
+                #gpio-cells = <2>;
+                gpio-controller;
+
+                env_reset {
+                        gpio-hog;
+                        input;
+                        gpios = <6 GPIO_ACTIVE_LOW>;
+                };
+                boot_rescue {
+                        gpio-hog;
+                        input;
+                        line-name = "foo-bar-gpio";
+                        gpios = <7 GPIO_ACTIVE_LOW>;
+                };
+        };
+
+You can than access the gpio in your board code with:
+
+	struct gpio_desc *desc;
+	int ret;
+
+	ret = gpio_hog_lookup_name("boot_rescue", &desc);
+	if (ret)
+		return;
+	if (dm_gpio_get_value(desc) == 1)
+		printf("\nBooting into Rescue System\n");
+	else if (dm_gpio_get_value(desc) == 0)
+		printf("\nBoot normal\n");
diff --git a/doc/README.gpt b/doc/README.gpt
new file mode 100644
index 00000000000..386ac2e0fc8
--- /dev/null
+++ b/doc/README.gpt
@@ -0,0 +1,315 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+#  Copyright (C) 2012 Samsung Electronics
+#
+#  Lukasz Majewski <l.majewski@samsung.com>
+
+Glossary:
+========
+- UUID -(Universally Unique Identifier)
+- GUID - (Globally Unique ID)
+- EFI - (Extensible Firmware Interface)
+- UEFI - (Unified EFI) - EFI evolution
+- GPT (GUID Partition Table) - it is the EFI standard part
+- partitions - lists of available partitions (defined at u-boot):
+  ./include/configs/{target}.h
+
+Introduction:
+=============
+This document describes the GPT partition table format and usage of
+the gpt command in u-boot.
+
+UUID introduction:
+====================
+
+GPT for marking disks/partitions is using the UUID. It is supposed to be a
+globally unique value. A UUID is a 16-byte (128-bit) number. The number of
+theoretically possible UUIDs is therefore about 3 x 10^38.
+More often UUID is displayed as 32 hexadecimal digits, in 5 groups,
+separated by hyphens, in the form 8-4-4-4-12 for a total of 36 characters
+(32 digits and 4 hyphens)
+
+For instance, GUID of Basic data partition: EBD0A0A2-B9E5-4433-87C0-68B6B72699C7
+and GUID of Linux filesystem data: 0FC63DAF-8483-4772-8E79-3D69D8477DE4
+
+Historically there are 5 methods to generate this number. The oldest one is
+combining machine's MAC address and timer (epoch) value.
+
+Successive versions are using MD5 hash, random numbers and SHA-1 hash. All major
+OSes and programming languages are providing libraries to compute UUID (e.g.
+uuid command line tool).
+
+GPT brief explanation:
+======================
+
+	Layout:
+	-------
+
+	--------------------------------------------------
+	LBA 0          |Protective MBR                   |
+	----------------------------------------------------------
+	LBA 1          |Primary GPT Header               | Primary
+	-------------------------------------------------- GPT
+	LBA 2          |Entry 1|Entry 2| Entry 3| Entry 4|
+	--------------------------------------------------
+	LBA 3          |Entries 5 - 128                  |
+		       |                                 |
+		       |                                 |
+	----------------------------------------------------------
+	LBA 34         |Partition 1                      |
+		       |                                 |
+		       -----------------------------------
+		       |Partition 2                      |
+		       |                                 |
+		       -----------------------------------
+		       |Partition n                      |
+		       |                                 |
+	----------------------------------------------------------
+	LBA -34        |Entry 1|Entry 2| Entry 3| Entry 4| Backup
+	-------------------------------------------------- GPT
+	LBA -33        |Entries 5 - 128                  |
+		       |                                 |
+		       |                                 |
+	LBA -2         |                                 |
+	--------------------------------------------------
+	LBA -1         |Backup GPT Header                |
+	----------------------------------------------------------
+
+For a legacy reasons, GPT's LBA 0 sector has a MBR structure. It is called
+"protective MBR".
+Its first partition entry ID has 0xEE value, and disk software, which is not
+handling the GPT sees it as a storage device without free space.
+
+It is possible to define 128 linearly placed partition entries.
+
+"LBA -1" means the last addressable block (in the mmc subsystem:
+"dev_desc->lba - 1")
+
+Primary/Backup GPT header:
+----------------------------
+Offset  Size    Description
+
+0       8 B     Signature ("EFI PART", 45 46 49 20 50 41 52 54)
+8       4 B     Revision (For version 1.0, the value is 00 00 01 00)
+12      4 B     Header size (in bytes, usually 5C 00 00 00 meaning 92 bytes)
+16      4 B     CRC32 of header (0 to header size), with this field zeroed
+		during calculation
+20      4 B     Reserved (ZERO);
+24      8 B     Current LBA (location of this header copy)
+32      8 B     Backup LBA (location of the other header copy)
+40      8 B     First usable LBA for partitions (primary partition table last
+		LBA + 1)
+48      8 B     Last usable LBA (secondary partition table first LBA - 1)
+56      16 B    Disk GUID (also referred as UUID on UNIXes)
+72      8 B     Partition entries starting LBA (always 2 in primary copy)
+80      4 B     Number of partition entries
+84      4 B     Size of a partition entry (usually 128)
+88      4 B     CRC32 of partition array
+92      *       Reserved; must be ZERO (420 bytes for a 512-byte LBA)
+
+TOTAL: 512 B
+
+
+IMPORTANT:
+
+GPT headers and partition entries are protected by CRC32 (the POSIX CRC32).
+
+Primary GPT header and Backup GPT header have swapped values of "Current LBA"
+and "Backup LBA" and therefore different CRC32 check-sum.
+
+CRC32 for GPT headers (field "CRC of header") are calculated up till
+"Header size" (92), NOT 512 bytes.
+
+CRC32 for partition entries (field "CRC32 of partition array") is calculated for
+the whole array entry ( Number_of_partition_entries *
+sizeof(partition_entry_size (usually 128)))
+
+Observe, how Backup GPT is placed in the memory. It is NOT a mirror reflect
+of the Primary.
+
+	   Partition Entry Format:
+	   ----------------------
+	   Offset  Size    Description
+
+	   0       16 B    Partition type GUID (Big Endian)
+	   16      16 B    Unique partition GUID in (Big Endian)
+	   32      8  B    First LBA (Little Endian)
+	   40      8  B    Last LBA (inclusive)
+	   48      8  B    Attribute flags [+]
+	   56      72 B    Partition name (text)
+
+	   Attribute flags:
+	   Bit 0  - System partition
+	   Bit 1  - Hide from EFI
+	   Bit 2  - Legacy BIOS bootable
+	   Bit 48-63 - Defined and used by the individual partition type
+	   For Basic data partition :
+	   Bit 60 - Read-only
+	   Bit 62 - Hidden
+	   Bit 63 - Not mount
+
+Creating GPT partitions in U-Boot:
+==============
+
+To restore GUID partition table one needs to:
+1. Define partition layout in the environment.
+   Format of partitions layout:
+     "uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
+	name=kernel,size=60MiB,uuid=...;"
+     or
+     "uuid_disk=${uuid_gpt_disk};name=${uboot_name},
+	size=${uboot_size},uuid=${uboot_uuid};"
+
+   The fields 'name' and 'size' are mandatory for every partition.
+   The field 'start' is optional.
+
+   If field 'size' of the last partition is 0, the partition is extended
+   up to the end of the device.
+
+   The fields 'uuid' and 'uuid_disk' are optional if CONFIG_RANDOM_UUID is
+   enabled. A random uuid will be used if omitted or they point to an empty/
+   non-existent environment variable. The environment variable will be set to
+   the generated UUID.  The 'gpt guid' command reads the current value of the
+   uuid_disk from the GPT.
+
+   The field 'bootable' is optional, it is used to mark the GPT partition
+   bootable (set attribute flags "Legacy BIOS bootable").
+     "name=u-boot,size=60MiB;name=boot,size=60Mib,bootable;name=rootfs,size=0"
+   It can be used to locate bootable disks with command
+   "part list <interface> <dev> -bootable <varname>",
+   please check out doc/develop/distro.rst for use.
+
+2. Define 'CONFIG_EFI_PARTITION' and 'CONFIG_CMD_GPT'
+
+3. From u-boot prompt type:
+   gpt write mmc 0 $partitions
+
+Checking (validating) GPT partitions in U-Boot:
+===============================================
+
+Procedure is the same as above. The only change is at point 3.
+
+At u-boot prompt one needs to write:
+   gpt verify mmc 0 [$partitions]
+
+where [$partitions] is an optional parameter.
+
+When it is not provided, only basic checks based on CRC32 calculation for GPT
+header and PTEs are performed.
+When provided, additionally partition data - name, size and starting
+offset (last two in LBA) - are compared with data defined in '$partitions'
+environment variable.
+
+After running this command, return code is set to 0 if no errors found in
+on non-volatile medium stored GPT.
+
+Following line can be used to assess if GPT verification has succeed:
+
+U-BOOT> gpt verify mmc 0 $partitions
+U-BOOT> if test $? = 0; then echo "GPT OK"; else echo "GPT ERR"; fi
+
+Renaming GPT partitions from U-Boot:
+====================================
+
+GPT partition names are a mechanism via which userspace and U-Boot can
+communicate about software updates and boot failure.  The 'gpt guid',
+'gpt read', 'gpt rename' and 'gpt swap' commands facilitate
+programmatic renaming of partitions from bootscripts by generating and
+modifying the partitions layout string.  Here is an illustration of
+employing 'swap' to exchange 'primary' and 'backup' partition names:
+
+U-BOOT> gpt swap mmc 0 primary backup
+
+Afterwards, all partitions previously named 'primary' will be named
+'backup', and vice-versa.  Alternatively, single partitions may be
+renamed.  In this example, mmc0's first partition will be renamed
+'primary':
+
+U-BOOT> gpt rename mmc 0 1 primary
+
+The GPT functionality may be tested with the 'sandbox' board by
+creating a disk image as described under 'Block Device Emulation' in
+doc/arch/index.rst:
+
+=>host bind 0 ./disk.raw
+=> gpt read host 0
+[ . . . ]
+=> gpt swap host 0 name othername
+[ . . . ]
+
+Modifying GPT partition layout from U-Boot:
+===========================================
+
+The entire GPT partition layout can be exported to an environment
+variable and then modified enmasse. Users can change the partition
+numbers, offsets, names and sizes. The resulting variable can used to
+reformat the device. Here is an example of reading the GPT partitions
+into a variable and then modifying them:
+
+U-BOOT> gpt read mmc 0 current_partitions
+U-BOOT> env edit current_partitions
+edit: uuid_disk=[...];name=part1,start=0x4000,size=0x4000,uuid=[...];
+name=part2,start=0xc000,size=0xc000,uuid=[...];[ . . . ]
+
+U-BOOT> gpt write mmc 0 $current_partitions
+U-BOOT> gpt verify mmc 0 $current_partitions
+
+Partition type GUID:
+====================
+
+For created partition, the used partition type GUID is
+PARTITION_BASIC_DATA_GUID (EBD0A0A2-B9E5-4433-87C0-68B6B72699C7).
+
+If you define 'CONFIG_PARTITION_TYPE_GUID', an optional parameter 'type'
+can specify a other partition type guid:
+
+     "uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
+	name=kernel,size=60MiB,uuid=...,
+	type=0FC63DAF-8483-4772-8E79-3D69D8477DE4;"
+
+Some strings can be also used at the place of known GUID :
+	"system"          = PARTITION_SYSTEM_GUID
+	                    (C12A7328-F81F-11D2-BA4B-00A0C93EC93B)
+	"mbr"             = LEGACY_MBR_PARTITION_GUID
+	                    (024DEE41-33E7-11D3-9D69-0008C781F39F)
+	"msft"            = PARTITION_MSFT_RESERVED_GUID
+	                    (E3C9E316-0B5C-4DB8-817D-F92DF00215AE)
+	"data"            = PARTITION_BASIC_DATA_GUID
+	                     (EBD0A0A2-B9E5-4433-87C0-68B6B72699C7)
+	"linux"           = PARTITION_LINUX_FILE_SYSTEM_DATA_GUID
+	                    (0FC63DAF-8483-4772-8E79-3D69D8477DE4)
+	"raid"            = PARTITION_LINUX_RAID_GUID
+	                    (A19D880F-05FC-4D3B-A006-743F0F84911E)
+	"swap"            = PARTITION_LINUX_SWAP_GUID
+	                    (0657FD6D-A4AB-43C4-84E5-0933C84B4F4F)
+	"lvm"             = PARTITION_LINUX_LVM_GUID
+	                    (E6D6D379-F507-44C2-A23C-238F2A3DF928)
+	"u-boot-env"      = PARTITION_U_BOOT_ENVIRONMENT
+	                    (3DE21764-95BD-54BD-A5C3-4ABE786F38A8)
+
+    "uuid_disk=...;name=u-boot,size=60MiB,uuid=...;
+	name=kernel,size=60MiB,uuid=...,type=linux;"
+
+They are also used to display the type of partition in "part list" command.
+
+
+Useful info:
+============
+
+Two programs, namely: 'gdisk' and 'parted' are recommended to work with GPT
+recovery. Both are able to handle GUID partitions.
+Please, pay attention at -l switch for parted.
+
+"uuid" program is recommended to generate UUID string. Moreover it can decode
+(-d switch) passed in UUID string. It can be used to generate partitions UUID
+passed to u-boot environment variables.
+If optional CONFIG_RANDOM_UUID is defined then for any partition which environment
+uuid is unset, uuid is randomly generated and stored in correspond environment
+variable.
+
+note:
+Each string block of UUID generated by program "uuid" is in big endian and it is
+also stored in big endian in disk GPT.
+Partitions layout can be printed by typing "mmc part". Note that each partition
+GUID has different byte order than UUID generated before, this is because first
+three blocks of GUID string are in Little Endian.
diff --git a/doc/README.hwconfig b/doc/README.hwconfig
new file mode 100644
index 00000000000..5408a22bb6a
--- /dev/null
+++ b/doc/README.hwconfig
@@ -0,0 +1,47 @@
+This implements a simple hwconfig infrastructure: an
+interface for software knobs to control hardware.
+
+This a is very simple implementation, i.e. it is implemented
+via the `hwconfig' environment variable. Later we could write
+some "hwconfig <enable|disable|list>" commands, ncurses
+interface for Award BIOS-like interface, and frame-buffer
+interface for AMI GUI[1] BIOS-like interface with mouse
+support[2].
+
+Current implementation details/limitations:
+
+1. Doesn't support options dependencies and mutual exclusion.
+   We can implement this by integrating apt-get[3] into Das
+   U-Boot. But I haven't bothered yet.
+
+2. Since we don't implement a hwconfig command, i.e. we're working
+   with the environment directly, there is no way to tell that
+   toggling a particular option will need a reboot to take
+   effect. So, for now it's advised to always reboot the
+   target after modifying the hwconfig variable.
+
+3. We support hwconfig options with arguments. For example,
+
+   set hwconfig "dr_usb:mode=peripheral,phy_type=ulpi"
+
+   This selects three hwconfig options:
+   1. dr_usb - enable Dual-Role USB controller;
+   2. dr_usb_mode:peripheral - USB in Function mode;
+   3. dr_usb_phy_type:ulpi - USB should work with ULPI PHYs.
+
+The purpose of this simple implementation is to refine the
+internal API and then we can continue improving the user
+experience by adding more mature interfaces, like a hwconfig
+command with bells and whistles. Or not adding, if we feel
+that the current interface fits people's needs.
+
+[1] http://en.wikipedia.org/wiki/American_Megatrends
+[2] Regarding ncurses and GUI with mouse support -- I'm just
+    kidding.
+[3] The comment regarding apt-get is also a joke, meaning that
+    dependency tracking could be non-trivial. For example, for
+    enabling HW feature X we may need to disable Y, and turn Z
+    into reduced mode (like RMII-only interface for ethernet,
+    no MII).
+
+    It's quite trivial to implement simple cases though.
diff --git a/doc/README.i2c b/doc/README.i2c
new file mode 100644
index 00000000000..07cd8df85f5
--- /dev/null
+++ b/doc/README.i2c
@@ -0,0 +1,60 @@
+I2C Bus Arbitration
+===================
+
+While I2C supports multi-master buses this is difficult to get right.
+The implementation on the master side in software is quite complex.
+Clock-stretching and the arbitrary time that an I2C transaction can take
+make it difficult to share the bus fairly in the face of high traffic.
+When one or more masters can be reset independently part-way through a
+transaction it is hard to know the state of the bus.
+
+U-Boot provides a scheme based on two 'claim' GPIOs, one driven by the
+AP (Application Processor, meaning the main CPU) and one driven by the EC
+(Embedded Controller, a small CPU aimed at handling system tasks). With
+these they can communicate and reliably share the bus. This scheme has
+minimal overhead and involves very little code. The scheme can survive
+reboots by either side without difficulty.
+
+Since U-Boot runs on the AP, the terminology used is 'our' claim GPIO,
+meaning the AP's, and 'their' claim GPIO, meaning the EC's. This terminology
+is used by the device tree bindings in Linux also.
+
+The driver is implemented as an I2C mux, as it is in Linux. See
+i2c-arb-gpio-challenge for the implementation.
+
+GPIO lines are shared between the AP and EC to manage the bus. The AP and EC
+each have a 'bus claim' line, which is an output that the other can see.
+
+- AP_CLAIM: output from AP, signalling to the EC that the AP wants the bus
+- EC_CLAIM: output from EC, signalling to the AP that the EC wants the bus
+
+The basic algorithm is to assert your line when you want the bus, then make
+sure that the other side doesn't want it also. A detailed explanation is best
+done with an example.
+
+Let's say the AP wants to claim the bus. It:
+
+1. Asserts AP_CLAIM
+2. Waits a little bit for the other side to notice (slew time)
+3. Checks EC_CLAIM. If this is not asserted, then the AP has the bus, and we
+   are done
+4. Otherwise, wait for a few milliseconds (retry time) and see if EC_CLAIM is
+   released
+5. If not, back off, release the claim and wait for a few more milliseconds
+  (retry time again)
+6. Go back to 1 if things don't look wedged (wait time has expired)
+7. Panic. The other side is hung with the CLAIM line set.
+
+The same algorithm applies on the EC.
+
+To release the bus, just de-assert the claim line.
+
+Typical delays are:
+- slew time 10 us
+- retry time 3 ms
+- wait time - 50ms
+
+In general the traffic is fairly light, and in particular the EC wants access
+to the bus quite rarely (maybe every 10s or 30s to check the battery). This
+scheme works very nicely with very low contention. There is only a 10 us
+wait for access to the bus assuming that the other side isn't using it.
diff --git a/doc/README.iomux b/doc/README.iomux
new file mode 100644
index 00000000000..c428811ce4c
--- /dev/null
+++ b/doc/README.iomux
@@ -0,0 +1,89 @@
+SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH <garyj@denx.de>
+ */
+
+U-Boot console multiplexing
+===========================
+
+HOW CONSOLE MULTIPLEXING WORKS
+------------------------------
+
+This functionality is controlled with CONFIG_CONSOLE_MUX in the board
+configuration file.
+
+Two new files, common/iomux.c and include/iomux.h, contain the heart
+(iomux_doenv()) of the environment setting implementation.
+
+iomux_doenv() is called in common/cmd_nvedit.c to handle setenv and in
+common/console.c in console_init_r() during bootup to initialize
+stdio_devices[].
+
+A user can use a comma-separated list of devices to set stdin, stdout
+and stderr.  For example: "setenv stdin serial,nc".  NOTE: No spaces
+are allowed around the comma(s)!
+
+The length of the list is limited by malloc(), since the array used
+is allocated and freed dynamically.
+
+It should be possible to specify any device which console_assign()
+finds acceptable, but the code has only been tested with serial and
+nc.
+
+iomux_doenv() prevents multiple use of the same device, e.g. "setenv
+stdin nc,nc,serial" will discard the second nc.  iomux_doenv() is
+not able to modify the environment, however, so that "pri stdin" still
+shows "nc,nc,serial".
+
+The major change in common/console.c was to modify fgetc() to call
+the iomux_tstc() routine in a for-loop.  iomux_tstc() in turn calls
+the tstc() routine for every registered device, but exits immediately
+when one of them returns true.  fgetc() then calls iomux_getc(),
+which calls the corresponding getc() routine.  fgetc() hangs in
+the for-loop until iomux_tstc() returns true and the input can be
+retrieved.
+
+Thus, a user can type into any device registered for stdin.  No effort
+has been made to demulitplex simultaneous input from multiple stdin
+devices.
+
+fputc() and fputs() have been modified to call iomux_putc() and
+iomux_puts() respectively, which call the corresponding output
+routines for every registered device.
+
+Thus, a user can see the ouput for any device registered for stdout
+or stderr on all devices registered for stdout or stderr.  As an
+example, if stdin=serial,nc and stdout=serial,nc then all output
+for serial, e.g. echos of input on serial, will appear on serial and nc.
+
+Just as with the old console code, this statement is still true:
+If not defined in the environment, the first input device is assigned
+to the 'stdin' file, the first output one to 'stdout' and 'stderr'.
+
+If CONFIG_SYS_CONSOLE_IS_IN_ENV is defined then multiple input/output
+devices can be set at boot time if defined in the environment.
+
+CAVEATS
+-------
+
+Note that common/iomux.c calls console_assign() for every registered
+device as it is discovered.  This means that the environment settings
+for application consoles will be set to the last device in the list.
+
+On a slow machine, such as MPC852T clocked at 66MHz, the overhead associated
+with calling tstc() and then getc() means that copy&paste will normally not
+work, even when stdin=stdout=stderr=serial.
+On a faster machine, such as a sequoia, cut&paste of longer (about 80
+characters) lines works fine when serial is the only device used.
+
+Using nc as a stdin device results in even more overhead because nc_tstc()
+is quite slow.  Even on a sequoia cut&paste does not work on the serial
+interface when nc is added to stdin, although there is no character loss using
+the ethernet interface for input. In this test case stdin=serial,nc and
+stdout=serial.
+
+In addition, the overhead associated with sending to two devices, when one of
+them is nc, also causes problems.  Even on a sequoia cut&paste does not work
+on the serial interface (stdin=serial) when nc is added to stdout (stdout=
+serial,nc).
diff --git a/doc/README.kconfig b/doc/README.kconfig
new file mode 100644
index 00000000000..808cf56e59c
--- /dev/null
+++ b/doc/README.kconfig
@@ -0,0 +1,151 @@
+Kconfig in U-Boot
+=================
+
+This document describes the configuration infrastructure of U-Boot.
+
+The conventional configuration was replaced by Kconfig at v2014.10-rc1 release.
+
+
+Language Specification
+----------------------
+
+Kconfig originates in Linux Kernel.
+See the file "Documentation/kbuild/kconfig*.txt" in your Linux Kernel
+source directory for a basic specification of Kconfig.
+
+
+Difference from Linux's Kconfig
+-------------------------------
+
+Here are some worth-mentioning configuration targets.
+
+- silentoldconfig
+
+  This target updates .config, include/generated/autoconf.h and
+  include/configs/* as in Linux.  In U-Boot, it also does the following
+  for the compatibility with the old configuration system:
+
+   * create a symbolic link "arch/${ARCH}/include/asm/arch" pointing to
+     the SoC/CPU specific header directory
+   * create include/config.h
+   * create include/autoconf.mk
+   * create spl/include/autoconf.mk (SPL and TPL only)
+   * create tpl/include/autoconf.mk (TPL only)
+
+   If we could completely switch to Kconfig in a long run
+   (i.e. remove all the include/configs/*.h), those additional processings
+   above would be removed.
+
+- defconfig
+
+  In U-Boot, "make defconfig" is a shorthand of "make sandbox_defconfig"
+
+- <board>_defconfig
+
+  Now it works as in Linux.
+  The prefixes such as "+S:" in *_defconfig are deprecated.
+  You can simply remove the prefixes.  Do not add them for new boards.
+
+- <board>_config
+
+  This does not exist in Linux's Kconfig.
+  "make <board>_config" works the same as "make <board>_defconfig".
+  Prior to Kconfig, in U-Boot, "make <board>_config" was used for the
+  configuration.  It is still supported for backward compatibility, so
+  we do not need to update the distro recipes.
+
+
+The other configuration targets work as in Linux Kernel.
+
+
+Migration steps to Kconfig
+--------------------------
+
+Prior to Kconfig, the C preprocessor based board configuration had been used
+in U-Boot.
+
+Although Kconfig was introduced and some configs have been moved to Kconfig,
+many of configs are still defined in C header files.  It will take a very
+long term to move all of them to Kconfig.  In the interim, the two different
+configuration infrastructures should coexist.
+The configuration files are generated by both Kconfig and the old preprocessor
+based configuration as follows:
+
+Configuration files for use in C sources
+  - include/generated/autoconf.h     (generated by Kconfig for Normal)
+  - include/configs/<board>.h        (exists for all boards)
+
+Configuration file for use in makefiles
+  - include/config/auto.conf         (generated by Kconfig)
+  - include/autoconf.mk              (generated by the old config for Normal)
+  - spl/include/autoconfig.mk        (generated by the old config for SPL)
+  - tpl/include/autoconfig.mk        (generated by the old config for TPL)
+
+When adding a new CONFIG macro, it is highly recommended to add it to Kconfig
+rather than to a header file.
+
+
+Conversion from boards.cfg to Kconfig
+-------------------------------------
+
+Prior to Kconfig, boards.cfg was a primary database that contained Arch, CPU,
+SoC, etc. of all the supported boards.  It was deleted when switching to
+Kconfig.  Each field of boards.cfg was converted as follows:
+
+ Status      ->  "S:" entry of MAINTAINERS
+ Arch        ->  CONFIG_SYS_ARCH defined by Kconfig
+ CPU         ->  CONFIG_SYS_CPU defined by Kconfig
+ SoC         ->  CONFIG_SYS_SOC defined by Kconfig
+ Vendor      ->  CONFIG_SYS_VENDOR defined by Kconfig
+ Board       ->  CONFIG_SYS_BOARD defined by Kconfig
+ Target      ->  File name of defconfig (configs/<target>_defconfig)
+ Maintainers ->  "M:" entry of MAINTAINERS
+
+
+Tips to add/remove boards
+-------------------------
+
+When adding a new board, the following steps are generally needed:
+
+ [1] Add a header file include/configs/<target>.h
+ [2] Make sure to define necessary CONFIG_SYS_* in Kconfig:
+       Define CONFIG_SYS_CPU="cpu" to compile arch/<arch>/cpu/<cpu>
+       Define CONFIG_SYS_SOC="soc" to compile arch/<arch>/cpu/<cpu>/<soc>
+       Define CONFIG_SYS_VENDOR="vendor" to compile board/<vendor>/common/*
+         and board/<vendor>/<board>/*
+       Define CONFIG_SYS_BOARD="board" to compile board/<board>/*
+         (or board/<vendor>/<board>/* if CONFIG_SYS_VENDOR is defined)
+       Define CONFIG_SYS_CONFIG_NAME="target" to include
+         include/configs/<target>.h
+ [3] Add a new entry to the board select menu in Kconfig.
+     The board select menu is located in arch/<arch>/Kconfig or
+     arch/<arch>/*/Kconfig.
+ [4] Add a MAINTAINERS file
+     It is generally placed at board/<board>/MAINTAINERS or
+     board/<vendor>/<board>/MAINTAINERS
+ [5] Add configs/<target>_defconfig
+
+When removing an obsolete board, the following steps are generally needed:
+
+ [1] Remove configs/<target>_defconfig
+ [2] Remove include/configs/<target>.h if it is not used by any other boards
+ [3] Remove board/<vendor>/<board>/* or board/<board>/* if it is not used
+     by any other boards
+ [4] Update MAINTAINERS if necessary
+ [5] Remove the unused entry from the board select menu in Kconfig
+ [6] Add an entry to doc/README.scrapyard
+
+
+TODO
+----
+
+- In the pre-Kconfig, a single board had multiple entries in the boards.cfg
+  file with differences in the option fields.  The corresponding defconfig
+  files were auto-generated when switching to Kconfig.  Now we have too many
+  defconfig files compared with the number of the supported boards.  It is
+  recommended to have only one defconfig per board and allow users to select
+  the config options.
+
+- Move the config macros in header files to Kconfig.  When we move at least
+  macros used in makefiles, we can drop include/autoconfig.mk, which makes
+  the build scripts much simpler.
diff --git a/doc/README.kwbimage b/doc/README.kwbimage
new file mode 100644
index 00000000000..a1d247c32dd
--- /dev/null
+++ b/doc/README.kwbimage
@@ -0,0 +1,104 @@
+---------------------------------------------
+Kirkwood Boot Image generation using mkimage
+---------------------------------------------
+
+This document describes the U-Boot feature as it
+is implemented for the Kirkwood family of SoCs.
+
+The Kirkwood SoC's can boot directly from NAND FLASH,
+SPI FLASH, SATA etc. using its internal bootRom support.
+
+for more details refer section 24.2 of Kirkwood functional specifications.
+ref: www.marvell.com/products/embedded.../kirkwood/index.jsp
+
+Command syntax:
+--------------
+./tools/mkimage -l <kwboot_file>
+		to list the kwb image file details
+
+./tools/mkimage -n <board specific configuration file> \
+		-T kwbimage -a <start address> -e <execution address> \
+		-d <input_raw_binary> <output_kwboot_file>
+
+for ex.
+./tools/mkimage -n ./board/Marvell/openrd_base/kwbimage.cfg \
+		-T kwbimage -a 0x00600000 -e 0x00600000 \
+		-d u-boot.bin u-boot.kwb
+
+
+kwbimage support available with mkimage utility will generate kirkwood boot
+image that can be flashed on the board NAND/SPI flash.  The make target
+which uses mkimage to produce such an image is "u-boot.kwb".  For example:
+
+  export KBUILD_OUTPUT=/tmp/build
+  make distclean
+  make yourboard_config
+  make u-boot.kwb
+
+
+Board specific configuration file specifications:
+------------------------------------------------
+1. This file must present in the $(BOARDDIR).  The default name is
+	kwbimage.cfg.  The name can be set as part of the full path
+	to the file using CONFIG_SYS_KWD_CONFIG (probably in
+	include/configs/<yourboard>.h).   The path should look like:
+	$(CFG_BOARDDIR)/<yourkwbimagename>.cfg
+2. This file can have empty lines and lines starting with "#" as first
+	character to put comments
+3. This file can have configuration command lines as mentioned below,
+	any other information in this file is treated as invalid.
+
+Configuration command line syntax:
+---------------------------------
+1. Each command line is must have two strings, first one command or address
+	and second one data string
+2. Following are the valid command strings and associated data strings:-
+	Command string		data string
+	--------------		-----------
+	BOOT_FROM		nand/spi/sata
+	NAND_ECC_MODE		default/rs/hamming/disabled
+	NAND_PAGE_SIZE		any uint16_t hex value
+	SATA_PIO_MODE		any uint32_t hex value
+	DDR_INIT_DELAY		any uint32_t hex value
+	DATA			regaddr and regdara hex value
+	you can have maximum 55 such register programming commands
+
+3. All commands are optional to program
+
+Typical example of kwimage.cfg file:
+-----------------------------------
+
+# Boot Media configurations
+BOOT_FROM	nand
+NAND_ECC_MODE	default
+NAND_PAGE_SIZE	0x0800
+
+# Configure RGMII-0 interface pad voltage to 1.8V
+DATA 0xFFD100e0 0x1b1b1b9b
+# DRAM Configuration
+DATA 0xFFD01400 0x43000c30
+DATA 0xFFD01404 0x37543000
+DATA 0xFFD01408 0x22125451
+DATA 0xFFD0140C 0x00000a33
+DATA 0xFFD01410 0x000000cc
+DATA 0xFFD01414 0x00000000
+DATA 0xFFD01418 0x00000000
+DATA 0xFFD0141C 0x00000C52
+DATA 0xFFD01420 0x00000040
+DATA 0xFFD01424 0x0000F17F
+DATA 0xFFD01428 0x00085520
+DATA 0xFFD0147C 0x00008552
+DATA 0xFFD01504 0x0FFFFFF1
+DATA 0xFFD01508 0x10000000
+DATA 0xFFD0150C 0x0FFFFFF5
+DATA 0xFFD01514 0x00000000
+DATA 0xFFD0151C 0x00000000
+DATA 0xFFD01494 0x00030000
+DATA 0xFFD01498 0x00000000
+DATA 0xFFD0149C 0x0000E803
+DATA 0xFFD01480 0x00000001
+# End of Header extension
+DATA 0x0 0x0
+
+------------------------------------------------
+Author: Prafulla Wadaskar <prafulla@marvell.com>
diff --git a/doc/README.link-local b/doc/README.link-local
new file mode 100644
index 00000000000..ec2ef940e4c
--- /dev/null
+++ b/doc/README.link-local
@@ -0,0 +1,75 @@
+------------------------------------------
+ Link-local IP address auto-configuration
+------------------------------------------
+
+Negotiate with other link-local clients on the local network
+for an address that doesn't require explicit configuration.
+This is especially useful if a DHCP server cannot be guaranteed
+to exist in all environments that the device must operate.
+
+This is an implementation of RFC3927.
+
+----------
+ Commands
+----------
+
+When CONFIG_CMD_LINK_LOCAL is defined in the board config file,
+the "linklocal" command is available.  This running this will
+take approximately 5 seconds while the address is negotiated.
+
+------------------------
+ Environment interation
+------------------------
+
+The "llipaddr" variable is set with the most recently
+negotiated address and is preferred in future negotiations.
+
+The "ipaddr", "netmask", and "gatewayip" variables are set
+after successful negotiation to enable network access.
+
+-------------
+ Limitations
+-------------
+
+RFC3927 requires that addresses are continuously checked to
+avoid conflicts, however this can only happen when the net_loop
+is getting called.  It is possible for a conflict to go undetected
+until a command that accesses the network is executed.
+
+Using NetConsole is one way to ensure that net_loop is always
+processing packets and monitoring for conflicts.
+
+This is also not a concern if the feature is use to connect
+directly to another machine that may not be running a DHCP server.
+
+----------------
+ Example script
+----------------
+
+This script allows use of DHCP and/or Link-local controlled
+by env variables.  It depends on CONFIG_CMD_LINK_LOCAL, CONFIG_CMD_DHCP,
+and CONFIG_BOOTP_MAY_FAIL.
+If both fail or are disabled, static settings are used.
+
+#define CFG_EXTRA_ENV_SETTINGS \
+	"ipconfigcmd=if test \\\"$dhcpenabled\\\" -ne 0;"		\
+		"then "							\
+			"dhcpfail=0;dhcp || dhcpfail=1;"		\
+		"else "							\
+			"dhcpfail=-1;"					\
+		"fi;"							\
+		"if test \\\"$linklocalenabled\\\" -ne 0 -a "		\
+			"\\\"$dhcpfail\\\" -ne 0;"			\
+		"then "							\
+			"linklocal;"					\
+			"llfail=0;"					\
+		"else "							\
+			"llfail=-1;"					\
+		"fi;"							\
+		"if test \\\"$llfail\\\" -ne 0 -a "			\
+			"\\\"$dhcpfail\\\" -ne 0; "			\
+		"then "							\
+			"setenv ipaddr $sipaddr; "			\
+			"setenv netmask $snetmask; "			\
+			"setenv gatewayip $sgatewayip; "		\
+		"fi;\0"							\
diff --git a/doc/README.malta b/doc/README.malta
new file mode 100644
index 00000000000..8614696a574
--- /dev/null
+++ b/doc/README.malta
@@ -0,0 +1,16 @@
+MIPS Malta board
+
+How to flash using a MIPS Navigator Probe:
+
+  - Ensure that your Malta has jumper JP1 fitted. Without this jumper you will
+    be unable to flash your Malta using a Navigator Probe.
+
+  - Connect Navigator Console to your probe and Malta as usual.
+
+  - Within Navigator Console run the following commands:
+
+      source /path/to/u-boot/board/imgtec/malta/flash-malta-boot.tcl
+      reset
+      flash-boot /path/to/u-boot/u-boot.bin
+
+  - You should now be able to reboot your Malta to a U-Boot shell.
diff --git a/doc/README.marvell b/doc/README.marvell
new file mode 100644
index 00000000000..6fc5ac8a409
--- /dev/null
+++ b/doc/README.marvell
@@ -0,0 +1,98 @@
+Marvell U-Boot Build Instructions
+=================================
+
+This document describes how to compile the U-Boot and how to change U-Boot configuration
+
+Build Procedure
+----------------
+1. Install required packages:
+
+		# sudo apt-get install libssl-dev
+		# sudo apt-get install device-tree-compiler
+		# sudo apt-get install swig libpython-dev
+
+2. Set the cross compiler:
+
+		# sudo apt-get install gcc-aarch64-linux-gnu
+		# export CROSS_COMPILE=aarch64-linux-gnu-
+
+3. Clean-up old residuals:
+
+		# make mrproper
+
+4. Configure the U-Boot:
+
+		# make <defconfig_file>
+
+	- For the Armada-70x0/80x0 DB board use "mvebu_db_armada8k_defconfig"
+	- For the Armada-80x0 MacchiatoBin use "make mvebu_mcbin-88f8040_defconfig"
+	- For the Armada-3700 DB board use "make mvebu_db-88f3720_defconfig"
+	- For the Armada-3700 EspressoBin use "make mvebu_espressobin-88f3720_defconfig"
+
+5. Configure the device-tree and build the U-Boot image:
+
+	For the Armada-70x0/80x0 DB board compile u-boot and set the required device-tree using:
+
+		# make DEVICE_TREE=<name>
+
+	NOTE:
+	Compilation with "mvebu_db_armada8k_defconfig" requires explicitly exporting DEVICE_TREE
+	for the requested board.
+	By default, u-boot is compiled with armada-8040-db device-tree.
+        Using A80x0 device-tree on A70x0 might break the device.
+        In order to prevent this, the required device-tree MUST be set during compilation.
+        All device-tree files are located in ./arch/arm/dts/ folder.
+
+	For other DB boards (MacchiatoBin, EspressoBin and 3700 DB board) compile u-boot with
+	just default device-tree from defconfig using:
+
+		# make
+
+	NOTE:
+	The u-boot.bin should not be used as a stand-alone image.
+	The ARM Trusted Firmware (ATF) build process uses this image to generate the
+	flash image. See TF-A Build Instructions for Marvell Platforms for more details at:
+	https://trustedfirmware-a.readthedocs.io/en/latest/plat/marvell/armada/build.html
+
+Configuration update
+---------------------
+	To update the U-Boot configuration, please refer to doc/README.kconfig
+
+
+Permanent ethernet MAC address
+-------------------------------
+	Prior flashing new U-Boot version (as part of ATF image) it is suggested to backup
+	permanent ethernet MAC addresses as they are stored only in U-Boot env storage (SPI or eMMC).
+	Some boards like EspressoBin have MAC addresses printed on sticker. Some boards got assigned
+	only one address other may also more than one. To print current MAC addresses run:
+
+		# echo $ethaddr
+		# echo $eth1addr
+		# echo $eth2addr
+		# echo $eth3addr
+		# ...
+
+	MAC addresses 00:51:82:11:22:00, 00:51:82:11:22:01, 00:51:82:11:22:02, 00:51:82:11:22:03
+	and F0:AD:4E:03:64:7F are default hardcoded values found in Marvell's and Armbian U-Boot
+	forks and therefore *not* unique. Usage of static hardcoded MAC addresses should be avoided.
+	When original address is lost (e.g. erased by Armbian boot scripts for EspressoBin) it is
+	suggested to generate new random one.
+
+	After flashing new U-Boot version it is suggested to reset U-Boot env variables to default
+	and then set correct permanent ethernet MAC addresses.
+
+		# env default -a
+		# setenv ethaddr XX:XX:XX:XX:XX:XX
+		# setenv eth1addr XX:XX:XX:XX:XX:XX
+		# setenv eth2addr YY:YY:YY:YY:YY:YY
+		# setenv eth3addr ZZ:ZZ:ZZ:ZZ:ZZ:ZZ
+		# ...
+		# saveenv
+
+	Where value for ethaddr is required permanent ethernet MAC address and values for ethNaddr
+	are optional per-port MAC addresses. When optional ethNaddr variables are not defined then
+	they are inherited from required ethaddr variable. eth1addr contains MAC address for the
+	wan port, other for particular lan ports.
+
+	Recent Linux kernel versions use correct permanent ethernet MAC address from U-Boot env as
+	U-Boot will inject it into kernel's device-tree.
diff --git a/doc/README.mediatek b/doc/README.mediatek
new file mode 100644
index 00000000000..246579d4be2
--- /dev/null
+++ b/doc/README.mediatek
@@ -0,0 +1,221 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018 MediaTek Inc.
+# Ryder Lee <ryder.lee@kernel.org>
+
+
+This document describes how to compile the U-Boot and how to change U-Boot
+configuration about the MediaTek SoCs.
+
+
+Build Procedure
+===============
+	-Set the cross compiler:
+
+		# export CROSS_COMPILE=/path/to/toolchain/arm-linux-gnueabi-
+
+	-Clean-up old residuals:
+
+		# make mrproper
+
+	-Configure the U-Boot:
+
+		# make <defconfig_file>
+		# make
+
+		- For the MT7623n bananapi R2 board use "mt7623n_bpir2_defconfig"
+		- For the MT7629 reference board use "mt7629_rfb_defconfig"
+
+
+Boot sequence
+=============
+	-Bootrom -> MTK preloader -> U-Boot
+
+		- MT7623n
+
+	This version of U-Boot doesn't implement SPL. So, MTK preloader binary
+	is needed to boot up:
+
+	https://github.com/BPI-SINOVOIP/BPI-R2-bsp/tree/master/mt-pack/mtk/bpi-r2/bin
+
+
+	-Bootrom -> SPL -> U-Boot
+
+		- MT7629
+
+
+Configuration update
+====================
+	To update the U-Boot configuration, please refer to doc/README.kconfig
+
+
+MediaTek image header
+=====================
+Currently there are two image headers used for MediaTek chips:
+
+	- BootROM image header. This header is used by the first stage bootloader. It records
+	  the desired compatible boot device, integrity information and its load address.
+
+	  The on-chip BootROM will firstly verify integrity and compatibility of the bootloader.
+
+	  If verification passed, the BootROM will then load the bootloader into on-chip SRAM,
+	  and pass control to it.
+
+	  Note that this header is actually a combination of three independent headers:
+	  Device header, BRLYT header and GFH header.
+
+	  Used by U-Boot SPL of MT7629 and preloader of MT7623.
+
+
+	- MediaTek legacy image header. This header was originally used by the legacy image. It
+	  basically records the load address, image size and image name.
+
+	  After all low level initializations passed, the preloader will locate the LK image and
+	  load it into DRAM, and pass control to it.
+
+	  Now this header is used by U-Boot of MT7623.
+
+
+To generate these two headers with mkimage:
+
+	# mkimage -T mtk_image -a <load_addr> -n <option_string> -d <input_file> <image_file>
+
+	- mtk_image means using MediaTek's header generation method.
+
+
+	- load_addr is the load address of this image.
+	  For first stage bootloader like U-Boot SPL or preloader, it usually points to the
+	  on-chip SRAM.
+
+	  For second stage bootloader like U-Boot, it usually points to the DRAM.
+
+
+	- option_string contains options to generate the header.
+
+	  The option string is using the follow format:
+		key1=value1;key2=value2;...
+
+	  The following key names are valid:
+		lk: If lk=1, LK image header is used. Otherwise BootROM image header is used.
+
+		lkname: The name of the LK image header. The maximum length is 32.
+			The default value is "U-Boot".
+
+		media: Desired boot device. The valid values are:
+		nand : Parallel NAND
+		snand: Serial NAND
+		nor  : Serial NOR
+		emmc : eMMC
+		sdmmc: SD
+
+	   nandinfo: Desired NAND device type, a combination of page size, oob size and
+		     optional device capacity. Valid types are:
+		2k+64    : for Serial NAND, 2KiB page size + 64B oob size
+		2k+120   : for Serial NAND, 2KiB page size + 120B oob size
+		2k+128   : for Serial NAND, 2KiB page size + 128B oob size
+		4k+256   : for Serial NAND, 4KiB page size + 256B oob size
+		1g:2k+64 : for Parallel NAND, 2KiB page size + 64B oob size, total 1Gbit size
+		2g:2k+64 : for Parallel NAND, 2KiB page size + 64B oob size, total 2Gbit size
+		4g:2k+64 : for Parallel NAND, 2KiB page size + 64B oob size, total 4Gbit size
+		2g:2k+128: for Parallel NAND, 2KiB page size + 128B oob size, total 2Gbit size
+		4g:2k+128: for Parallel NAND, 2KiB page size + 128B oob size, total 4Gbit size
+
+
+MT7629 partitions on Serial NOR
+===============================
+
+	Start      End       Size       Description
+	00000000 - 0000ffff: 64KiB      U-Boot SPL
+	00010000 - 0005ffff: 320KiB     U-Boot
+	00060000 - 0006ffff: 64KiB      U-Boot env / MediaTek NVRAM
+	00070000 - 000affff: 256KiB     RF calibration data
+	000b0000 - xxxxxxxx: all left   Firmware image
+
+
+BPi-R2 (MT7623N) partitions on SD
+=================================
+	Please note that the last two partitions can vary from different Linux distributions
+	depending on the MBR partition table.
+
+	Start      End       Size       Description
+	00000000 - 000001ff: 512B       Device header (with MBR partition table)
+	00000200 - 000007ff: 1536B      BRLYT header
+	00000800 - 0004ffff: 318KiB     Preloader (with GFH header)
+	00050000 - 000fffff: 704KiB     U-Boot
+	00100000 - 063fffff: 99MiB      Reserved
+	06400000 - 163fffff: 256MiB     Partition 1 (FAT32)
+	16400000 - xxxxxxxx: all left   Partition 2 (ext4)
+
+
+Upgrading notice on Serial NOR
+==============================
+Example: MT7629
+
+	The command sf is used to operate the Serial NOR device:
+
+	- To probe current NOR flash:
+
+		# sf probe
+
+	- To erase a region:
+
+		# sf erase <offset> <len>
+
+	- To write data to an offset:
+
+		# sf write <data_addr> <offset> <len>
+
+	- To boot kernel:
+
+		# bootm 0x300b0000
+
+	The memory address range 0x30000000 - 0x3fffffff is mapped to the NOR flash.
+	The DRAM starts at 0x40000000.
+
+	Please note that the output binary u-boot-mtk.bin is a combination of SPL and U-Boot,
+	and it should be write to beginning of the flash.
+
+	Otherwise you should use standalone files:
+
+		spl/u-boot-spl-mtk.bin for SPL,
+		u-boot.img for U-Boot.
+
+
+Upgrading notice on SD / eMMC
+=============================
+Example: MT7623
+
+	Normally only Preloader and U-Boot can be upgraded within U-Boot, and other partitions
+	should be written in PC.
+
+	- To probe current SD card / eMMC:
+
+		# mmc dev 0 for eMMC
+		# mmc dev 1 for SD
+
+	- To erase a region:
+
+		# mmc erase <blk_offset> <blk_num>
+
+	- To write data to a block offset:
+
+		# mmc write <data_addr> <blk_offset> <blk_num>
+
+	- To load kernel image from partition 1:
+
+		# fatload mmc 0:1 <load_address> <path_to_kernel_uImage> for eMMC
+		# fatload mmc 1:1 <load_address> <path_to_kernel_uImage> for SD
+
+	- To boot kernel:
+
+		# bootm <load_address>
+
+	The DRAM starts at 0x80000000.
+
+	Please note that we use block offset and block count for SD card, not the byte offset.
+	The block size is always 512 bytes for SD card.
+
+
+Documentation
+=============
+	http://wiki.banana-pi.org/Banana_Pi_BPI-R2
diff --git a/doc/README.memory-test b/doc/README.memory-test
new file mode 100644
index 00000000000..eb60e8d83e7
--- /dev/null
+++ b/doc/README.memory-test
@@ -0,0 +1,98 @@
+The most frequent cause of problems when porting U-Boot to new
+hardware, or when using a sloppy port on some board, is memory errors.
+In most cases these are not caused by failing hardware, but by
+incorrect initialization of the memory controller.  So it appears to
+be a good idea to always test if the memory is working correctly,
+before looking for any other potential causes of any problems.
+
+U-Boot implements 3 different approaches to perform memory tests:
+
+1. The get_ram_size() function (see "common/memsize.c").
+
+   This function is supposed to be used in each and every U-Boot port
+   determine the presence and actual size of each of the potential
+   memory banks on this piece of hardware.  The code is supposed to be
+   very fast, so running it for each reboot does not hurt.  It is a
+   little known and generally underrated fact that this code will also
+   catch 99% of hardware related (i. e. reliably reproducible) memory
+   errors.  It is strongly recommended to always use this function, in
+   each and every port of U-Boot.
+
+2. The "mtest" command.
+
+   This is probably the best known memory test utility in U-Boot.
+   Unfortunately, it is also the most problematic, and the most
+   useless one.
+
+   There are a number of serious problems with this command:
+
+   - It is terribly slow.  Running "mtest" on the whole system RAM
+     takes a _long_ time before there is any significance in the fact
+     that no errors have been found so far.
+
+   - It is difficult to configure, and to use.  And any errors here
+     will reliably crash or hang your system.  "mtest" is dumb and has
+     no knowledge about memory ranges that may be in use for other
+     purposes, like exception code, U-Boot code and data, stack,
+     malloc arena, video buffer, log buffer, etc.  If you let it, it
+     will happily "test" all such areas, which of course will cause
+     some problems.
+
+   - It is not easy to configure and use, and a large number of
+     systems are seriously misconfigured.  The original idea was to
+     test basically the whole system RAM, with only exempting the
+     areas used by U-Boot itself - on most systems these are the areas
+     used for the exception vectors (usually at the very lower end of
+     system memory) and for U-Boot (code, data, etc. - see above;
+     these are usually at the very upper end of system memory).  But
+     experience has shown that a very large number of ports use
+     pretty much bogus settings of CONFIG_SYS_MEMTEST_START and
+     CONFIG_SYS_MEMTEST_END; this results in useless tests (because
+     the ranges is too small and/or badly located) or in critical
+     failures (system crashes).
+
+   Because of these issues, the "mtest" command is considered depre-
+   cated.  It should not be enabled in most normal ports of U-Boot,
+   especially not in production.  If you really need a memory test,
+   then see 1. and 3. above resp. below.
+
+3. The most thorough memory test facility is available as part of the
+   POST (Power-On Self Test) sub-system, see "post/drivers/memory.c".
+
+   If you really need to perform memory tests (for example, because
+   it is mandatory part of your requirement specification), then
+   enable this test which is generic and should work on all archi-
+   tectures.
+
+WARNING:
+
+It should pointed out that _all_ these memory tests have one
+fundamental, unfixable design flaw:  they are based on the assumption
+that memory errors can be found by writing to and reading from memory.
+Unfortunately, this is only true for the relatively harmless, usually
+static errors like shorts between data or address lines, unconnected
+pins, etc.  All the really nasty errors which will first turn your
+hair gray, only to make you tear it out later, are dynamical errors,
+which usually happen not with simple read or write cycles on the bus,
+but when performing back-to-back data transfers in burst mode.  Such
+accesses usually happen only for certain DMA operations, or for heavy
+cache use (instruction fetching, cache flushing).  So far I am not
+aware of any freely available code that implements a generic, and
+efficient, memory test like that.  The best known test case to stress
+a system like that is to boot Linux with root file system mounted over
+NFS, and then build some larger software package natively (say,
+compile a Linux kernel on the system) - this will cause enough context
+switches, network traffic (and thus DMA transfers from the network
+controller), varying RAM use, etc. to trigger any weak spots in this
+area.
+
+Note: An attempt was made once to implement such a test to catch
+memory problems on a specific board.  The code is pretty much board
+specific (for example, it includes setting specific GPIO signals to
+provide triggers for an attached logic analyzer), but you can get an
+idea how it works: see "examples/standalone/test_burst*".
+
+Note 2: Ironically enough, the "test_burst" did not catch any RAM
+errors, not a single one ever.  The problems this code was supposed
+to catch did not happen when accessing the RAM, but when reading from
+NOR flash.
diff --git a/doc/README.mpc83xx.ddrecc b/doc/README.mpc83xx.ddrecc
new file mode 100644
index 00000000000..0029f08759d
--- /dev/null
+++ b/doc/README.mpc83xx.ddrecc
@@ -0,0 +1,154 @@
+Overview
+========
+
+The overall usage pattern for ECC diagnostic commands is the following:
+
+  * (injecting errors is initially disabled)
+
+  * define inject mask (which tells the DDR controller what type of errors
+    we'll be injecting: single/multiple bit etc.)
+
+  * enable injecting errors - from now on the controller injects errors as
+    indicated in the inject mask
+
+IMPORTANT NOTICE: enabling injecting multiple-bit errors is potentially
+dangerous as such errors are NOT corrected by the controller. Therefore caution
+should be taken when enabling the injection of multiple-bit errors: it is only
+safe when used on a carefully selected memory area and used under control of
+the 'ecc testdw' 'ecc testword' command (see example 'Injecting Multiple-Bit
+Errors' below). In particular, when you simply set the multiple-bit errors in
+inject mask and enable injection, U-Boot is very likely to hang quickly as the
+errors will be injected when it accesses its code, data etc.
+
+
+Use cases for DDR 'ecc' command:
+================================
+
+Before executing particular tests reset target board or clear status registers:
+
+=> ecc captureclear
+=> ecc errdetectclr all
+=> ecc sbecnt 0
+
+
+Injecting Single-Bit Errors
+---------------------------
+
+1. Set 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+
+2. Run test over some memory region
+
+=> ecc testdw 200000 10
+
+3. Check ECC status
+
+=> ecc status
+...
+Memory Data Path Error Injection Mask High/Low: 00000001 00000000
+...
+Memory Single-Bit Error Management (0..255):
+  Single-Bit Error Threshold: 255
+  Single Bit Error Counter: 16
+...
+Memory Error Detect:
+  Multiple Memory Errors: 0
+  Multiple-Bit Error: 0
+  Single-Bit Error: 0
+...
+
+16 errors were generated, Single-Bit Error flag was not set as Single Bit Error
+Counter did not reach  Single-Bit Error Threshold.
+
+4. Make sure used memory region got re-initialized with 0x0123456789abcdef
+
+=> md 200000
+00200000: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200010: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200020: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200030: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200040: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200050: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200060: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200070: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200080: deadbeef deadbeef deadbeef deadbeef    ................
+00200090: deadbeef deadbeef deadbeef deadbeef    ................
+
+Injecting Multiple-Bit Errors
+-----------------------------
+
+1. Set more than 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+=> ecc injectdatalo 1
+
+2. Run test over some memory region
+
+=> ecc testword 200000 1
+
+3. Check ECC status
+
+=> ecc status
+...
+Memory Data Path Error Injection Mask High/Low: 00000001 00000001
+...
+Memory Error Detect:
+  Multiple Memory Errors: 0
+  Multiple-Bit Error: 1
+  Single-Bit Error: 0
+...
+
+The Multiple Memory Errors flags not set and Multiple-Bit Error flags are set.
+
+4. Make sure used memory region got re-initialized with 0x0123456789abcdef
+
+=> md 200000
+00200000: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200010: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200020: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200030: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200040: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200050: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200060: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200070: 01234567 89abcdef 01234567 89abcdef    .#Eg.....#Eg....
+00200080: deadbeef deadbeef deadbeef deadbeef    ................
+00200090: deadbeef deadbeef deadbeef deadbeef    ................
+
+
+Test Single-Bit Error Counter and Threshold
+-------------------------------------------
+
+1. Set 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+
+2. Enable error injection
+
+=> ecc inject en
+
+3. Let u-boot run for a with Single-Bit error injection enabled
+
+4. Disable error injection
+
+=> ecc inject dis
+
+4. Check status
+
+=> ecc status
+
+...
+Memory Single-Bit Error Management (0..255):
+  Single-Bit Error Threshold: 255
+  Single Bit Error Counter: 199
+
+Memory Error Detect:
+  Multiple Memory Errors: 1
+  Multiple-Bit Error: 0
+  Single-Bit Error: 1
+...
+
+Observe that Single-Bit Error is 'on' which means that Single-Bit Error Counter
+reached Single-Bit Error Threshold. Multiple Memory Errors bit is also 'on', that
+is Counter reached Threshold more than one time (it wraps back after reaching
+Threshold).
diff --git a/doc/README.mpc83xxads b/doc/README.mpc83xxads
new file mode 100644
index 00000000000..372fdd9ce85
--- /dev/null
+++ b/doc/README.mpc83xxads
@@ -0,0 +1,97 @@
+Freescale MPC83xx ADS Boards
+-----------------------------------------
+
+0. Toolchain / Building
+
+    $ PATH=$PATH:/usr/powerpc/bin
+    $ CROSS_COMPILE=powerpc-linux-
+    $ export PATH CROSS_COMPILE
+
+    $ powerpc-linux-gcc -v
+    Reading specs from /usr/powerpc/lib/gcc/powerpc-linux/3.4.3/specs
+    Configured with: ../configure --prefix=/usr/powerpc
+    --exec-prefix=/usr/powerpc --target=powerpc-linux --enable-shared
+    --disable-nls --disable-multilib --enable-languages=c,c++,ada,f77,objc
+    Thread model: posix
+    gcc version 3.4.3 (Debian)
+
+    $ powerpc-linux-as -v
+    GNU assembler version 2.15 (powerpc-linux) using BFD version 2.15
+
+
+    $ make MPC8349ADS_config
+    Configuring for MPC8349ADS board...
+
+    $ make
+
+
+1. Board Switches and Jumpers
+
+
+2. Memory Map
+
+2.1. The memory map should look pretty much like this:
+
+     0x0000_0000     0x7fff_ffff     DDR		     2G
+     0x8000_0000     0x9fff_ffff     PCI MEM		     512M
+     0xc000_0000     0xdfff_ffff     Rapid IO		     512M
+     0xe000_0000     0xe00f_ffff     CCSR		     1M
+     0xe200_0000     0xe2ff_ffff     PCI IO		     16M
+     0xf000_0000     0xf7ff_ffff     SDRAM		     128M
+     0xf800_0000     0xf80f_ffff     BCSR		     1M
+     0xfe00_0000     0xffff_ffff     FLASH (boot bank)	     16M
+
+
+3. Definitions
+
+3.1 Explanation of NEW definitions in:
+
+	include/configs/MPC8349ADS.h
+
+    CONFIG_MPC83xx	    MPC83xx family
+    CONFIG_MPC8349	    MPC8349 specific
+    CONFIG_TSEC_ENET	    Use on-chip 10/100/1000 ethernet
+
+
+4. Compilation
+
+    Assuming you're using BASH shell:
+
+	export CROSS_COMPILE=your-cross-compile-prefix
+	cd u-boot
+	make distclean
+	make MPC8349ADS_config
+	make
+
+5. Downloading and Flashing Images
+
+5.0 Download over serial line using Kermit:
+
+	loadb
+	[Drop to kermit:
+	    ^\c
+	    send <u-boot-bin-image>
+	    c
+	]
+
+
+    Or via tftp:
+
+	tftp 10000 u-boot.bin
+
+5.1 Reflash U-Boot Image using U-Boot
+
+    tftp 10000 u-boot.bin
+    protect off fe000000 fe09ffff
+    erase fe000000 fe09ffff
+
+    cp.b 10000 fe000000 xxxx
+or
+    cp.b 10000 fe000000 a0000
+
+You might have to supply the correct byte count for 'xxxx' from
+the TFTP.  Maybe a0000 will work too, that corresponds to the
+erased sectors.
+
+
+6. Notes
diff --git a/doc/README.mpc85xx b/doc/README.mpc85xx
new file mode 100644
index 00000000000..bafffe6dc51
--- /dev/null
+++ b/doc/README.mpc85xx
@@ -0,0 +1,166 @@
+External Debug Support
+----------------------
+
+Freescale's e500v1 and e500v2 cores (used in mpc85xx chips) have some
+restrictions on external debugging (JTAG).  In particular, for the debugger to
+be able to receive control after a single step or breakpoint:
+	- MSR[DE] must be set
+	- A valid opcode must be fetchable, through the MMU, from the debug
+	  exception vector (IVPR + IVOR15).
+
+To maximize the time during which this requirement is met, U-Boot sets MSR[DE]
+immediately on entry and keeps it set. It also uses a temporary TLB to keep a
+mapping to a valid opcode at the debug exception vector, even if we normally
+don't support exception vectors being used that early, and that's not the area
+where U-Boot currently executes from.
+
+Note that there may still be some small windows where debugging will not work,
+such as in between updating IVPR and IVOR15.
+
+Config Switches:
+----------------
+
+Please refer README section "MPC85xx External Debug Support"
+
+Major Config Switches during various boot Modes
+----------------------------------------------
+
+NOR boot
+		!defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SPL)
+NOR boot Secure
+		!defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC)
+RAMBOOT(SD, SPI & NAND boot)
+		 defined(CONFIG_SYS_RAMBOOT)
+RAMBOOT Secure (SD, SPI & NAND)
+		 defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC)
+NAND SPL BOOT
+		 defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NAND_SPL)
+
+
+TLB Entries during u-boot execution
+-----------------------------------
+
+Note: Sequence number is in order of execution
+
+A) defined(CONFIG_SYS_RAMBOOT) i.e. SD, SPI, NAND RAMBOOT & NAND_SPL boot
+
+   1) TLB entry to overcome e500 v1/v2 debug restriction
+       Location	  : Label "_start"
+       TLB Entry  : CONFIG_SYS_PPC_E500_DEBUG_TLB
+       EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_MONITOR_BASE
+       Properties : 256K, AS0, I, IPROT
+
+   2) TLB entry for working in AS1
+       Location	  : Label "create_init_ram_area"
+       TLB Entry  : 15
+       EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_MONITOR_BASE
+       Properties : 1M, AS1, I, G, IPROT
+
+   3) TLB entry for the stack during AS1
+       Location	  : Lable "create_init_ram_area"
+       TLB Entry  : 14
+       EPN -->RPN : CFG_SYS_INIT_RAM_ADDR --> CFG_SYS_INIT_RAM_ADDR
+       Properties : 16K, AS1, IPROT
+
+   4) TLB entry for CCSRBAR during AS1 execution
+       Location	  : cpu_init_early_f
+       TLB Entry  : 13
+       EPN -->RPN : CFG_SYS_CCSRBAR --> CFG_SYS_CCSRBAR
+       Properties : 1M, AS1, I, G
+
+   5) Invalidate unproctected TLB Entries
+       Location	  : cpu_init_early_f
+       Invalidated: 13
+
+   6) Create TLB entries as per boards/freescale/<board>/tlb.c
+       Location	  : cpu_init_early_f --> init_tlbs()
+       Properties : ..., AS0, ...
+      Please note It can overwrites previous TLB Entries.
+
+   7) Disable TLB Entries of AS1
+       Location	  : cpu_init_f --> disable_tlb()
+       Disable	  : 15, 14
+
+   8) Update Flash's TLB entry
+       Location	  : Board_init_r
+       TLB entry  : Search from TLB entries
+       EPN -->RPN : CFG_SYS_FLASH_BASE --> CFG_SYS_FLASH_BASE_PHYS
+       Properties : Board specific size, AS0, I, G, IPROT
+
+
+B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot
+
+   1) TLB entry to overcome e500 v1/v2 debug restriction
+       Location	  : Label "_start"
+       TLB Entry  : CONFIG_SYS_PPC_E500_DEBUG_TLB
+#if defined(CONFIG_NXP_ESBC)
+       EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CFG_SYS_PBI_FLASH_WINDOW
+       Properties : 1M, AS1, I, G, IPROT
+#else
+       EPN -->RPN : CONFIG_SYS_MONITOR_BASE & 0xffc00000 --> 0xffc00000
+       Properties : 4M, AS0, I, G, IPROT
+#endif
+
+   2) TLB entry for working in AS1
+       Location	  : Label "create_init_ram_area"
+       TLB Entry  : 15
+#if defined(CONFIG_NXP_ESBC)
+       EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CFG_SYS_PBI_FLASH_WINDOW
+       Properties : 1M, AS1, I, G, IPROT
+#else
+       EPN -->RPN : CONFIG_SYS_MONITOR_BASE & 0xffc00000 --> 0xffc00000
+       Properties : 4M, AS1, I, G, IPROT
+#endif
+
+   3) TLB entry for the stack during AS1
+       Location	  : Lable "create_init_ram_area"
+       TLB Entry  : 14
+       EPN -->RPN : CFG_SYS_INIT_RAM_ADDR --> CFG_SYS_INIT_RAM_ADDR
+       Properties : 16K, AS1, IPROT
+
+   4) TLB entry for CCSRBAR during AS1 execution
+       Location	  : cpu_init_early_f
+       TLB Entry  : 13
+       EPN -->RPN : CFG_SYS_CCSRBAR --> CFG_SYS_CCSRBAR
+       Properties : 1M, AS1, I, G
+
+   5) TLB entry for Errata workaround CONFIG_SYS_FSL_ERRATUM_IFC_A003399
+       Location	  : cpu_init_early_f
+       TLB Entry  : 9
+       EPN -->RPN : SRAM_BASE_ADDR --> SRAM_BASE_ADDR
+       Properties : 1M, AS1, I
+
+   6) CONFIG_SYS_FSL_ERRATUM_IFC_A003399 Adjust flash's phys addr
+       Location	  : cpu_init_early_f --> setup_ifc
+       TLB Entry  : Get Flash TLB
+       EPN -->RPN : Adjusted flash_phys --> Adjusted flash_phys
+       Properties : 4M, AS1, I, G, IPROT
+
+   7) CONFIG_SYS_FSL_ERRATUM_IFC_A003399: E500 v1,v2 debug restriction
+       Location	  : cpu_init_early_f --> setup_ifc
+       TLB Entry  : CONFIG_SYS_PPC_E500_DEBUG_TLB
+       EPN -->RPN : Adjusted flash_phys --> Adjusted flash_phys
+       Properties : 4M, AS0, I, G, IPROT
+
+   8) Invalidate unproctected TLB Entries
+       Location	  : cpu_init_early_f
+       Invalidated: 13, 9
+
+   9) Create TLB entries as per boards/freescale/<board>/tlb.c
+       Location	  : cpu_init_early_f --> init_tlbs()
+       Properties : ..., AS0, ...
+      Note: It can overwrites previous TLB Entries
+
+   10) Disable TLB Entries of AS1
+       Location	  : cpu_init_f --> disable_tlb()
+       Disable	  : 15, 14
+
+   11) Create DDR's TLB entriy
+       Location	  : Board_init_f -> dram_init
+       TLB entry  : Search free TLB entry
+
+   12) Update Flash's TLB entry
+       Location	  : Board_init_r
+       TLB entry  : Search from TLB entries
+       EPN -->RPN : CFG_SYS_FLASH_BASE --> CFG_SYS_FLASH_BASE_PHYS
+       Properties : Board specific size, AS0, I, G, IPROT
diff --git a/doc/README.mpc85xx-sd-spi-boot b/doc/README.mpc85xx-sd-spi-boot
new file mode 100644
index 00000000000..7608fc3aacb
--- /dev/null
+++ b/doc/README.mpc85xx-sd-spi-boot
@@ -0,0 +1,75 @@
+----------------------------------------
+Booting from On-Chip ROM (eSDHC or eSPI)
+----------------------------------------
+
+boot_format is a tool to write SD bootable images to a filesystem and build
+SD/SPI images to a binary file for writing later.
+
+When booting from an SD card/MMC, boot_format puts the configuration file and
+the RAM-based U-Boot image on the card.
+When booting from an EEPROM, boot_format generates a binary image that is used
+to boot from this EEPROM.
+
+Where to get boot_format:
+========================
+
+you can browse it online at:
+https://github.com/nxp-qoriq-yocto-sdk/boot-format
+
+Building
+========
+
+Run the following to build this project
+
+	$ make
+
+Execution
+=========
+
+boot_format runs under a regular Linux machine and requires a super user mode
+to run. Execute boot_format as follows.
+
+For building SD images by writing directly to a file system on SD media:
+
+	$ boot_format $config u-boot.bin -sd $device
+
+Where $config is the included config.dat file for your platform and $device
+is the target block device for the SD media on your computer.
+
+For build binary images directly a local file:
+
+	$ boot_format $config u-boot.bin -spi $file
+
+Where $file is the target file. Also keep in mind the u-boot.bin file needs
+to be the u-boot built for your particular platform and target media.
+
+Example: To generate a u-boot.bin for a P1022DS booting from SD, run the
+following in the u-boot repository:
+
+	$ make P1022DS_SDCARD
+
+Configuration Files
+===================
+
+Below are the configuration files to be used with a particular platform. Keep
+in mind that some of these config files are tied to the platforms DDR speed.
+Please see the SoC reference manual for more documentation.
+
+P1022DS		config_sram_p1022ds.dat
+P2020DS		config_sram_p2020ds.dat
+P1020RDB	config_ddr2_1g_p1020rdb_533M.dat
+P1020RDB	config_ddr2_1g_p1020rdb_667M.dat
+P2020RDB	config_ddr2_1g_p2020rdb_800M.dat
+P2020RDB	config_ddr2_1g_p2020rdb_667M.dat
+P2020RDB	config_ddr3_1gb_64bit_p2020rdb_pc.dat
+P1020RDB	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+P1011RDB	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+P1010RDB	config_ddr3_1gb_p1010rdb_800M.dat
+P1021RDB	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+P1022DS		config_ddr3_2gb_p1022ds.dat
+P1024RDB	config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
+P1025RDB	config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
+P1016RDB	config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
+P1020UTM	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+P1020MBG	config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
+MPC8536DS	config_ddr2_512m_mpc8536ds_667M.dat
diff --git a/doc/README.mpc85xx-spin-table b/doc/README.mpc85xx-spin-table
new file mode 100644
index 00000000000..72c7bd7b5d7
--- /dev/null
+++ b/doc/README.mpc85xx-spin-table
@@ -0,0 +1,26 @@
+Spin table in cache
+=====================================
+As specified by ePAPR v1.1, the spin table needs to be in cached memory. After
+DDR is initialized and U-Boot relocates itself into DDR, the spin table is
+accessible for core 0. It is part of release.S, within 4KB range after
+__secondary_start_page. For other cores to use the spin table, the booting
+process is described below:
+
+Core 0 sets up the reset page on the top 4K of memory (or 4GB if total memory
+is more than 4GB), and creates a TLB to map it to 0xffff_f000, regardless of
+the physical address of this page, with WIMGE=0b01010. Core 0 also enables boot
+page translation for secondary cores to use this page of memory. Then 4KB
+memory is copied from __secondary_start_page to the boot page, after flusing
+cache because this page is mapped as normal DDR. Before copying the reset page,
+core 0 puts the physical address of the spin table (which is in release.S and
+relocated to the top of mapped memory) into a variable __spin_table_addr so
+that secondary cores can see it.
+
+When secondary cores boot up from 0xffff_f000 page, they only have one default
+TLB. While booting, they set up another TLB in AS=1 space and jump into
+the new space. The new TLB covers the physical address of the spin table page,
+with WIMGE =0b00100. Now secondary cores can keep polling the spin table
+without stress DDR bus because both the code and the spin table is in cache.
+
+For the above to work, DDR has to set the 'M' bit of WIMGE, in order to keep
+cache coherence.
diff --git a/doc/README.mpc85xxcds b/doc/README.mpc85xxcds
new file mode 100644
index 00000000000..79d71cb37f6
--- /dev/null
+++ b/doc/README.mpc85xxcds
@@ -0,0 +1,225 @@
+Motorola MPC85xxCDS boards
+--------------------------
+
+The CDS family of boards consists of a PCI backplane called the
+"Arcadia", a PCI-form-factor carrier card that plugs into a PCI slot,
+and a CPU daughter card that bolts onto the daughter card.
+
+Much of the content of the README.mpc85xxads for the 85xx ADS boards
+applies to the 85xx CDS boards as well.	 In particular the toolchain,
+the switch nomenclature, and the basis for the memory map.  There are
+some differences, though.
+
+
+Building U-Boot
+---------------
+
+The Binutils in current ELDK toolchain will not support MPC85xx
+chip.  You need to use binutils-2.14.tar.bz2 (or newer) from
+    http://ftp.gnu.org/gnu/binutils.
+
+The 85xx CDS code base is known to compile using:
+    gcc (GCC) 3.2.2 20030217 (Yellow Dog Linux 3.0 3.2.2-2a)
+
+
+Memory Map
+----------
+
+The memory map for U-Boot and linux has been extended w.r.t. the ADS
+platform to allow for utilization of all 85xx CDS devices.  The memory
+map is setup for linux to operate properly.  The linux source when
+configured for MPC85xx CDS has been updated to reflect the new memory
+map.
+
+The mapping is:
+
+   0x0000_0000	   0x7fff_ffff	   DDR			   2G
+   0x8000_0000	   0x9fff_ffff	   PCI1 MEM		   512M
+   0xa000_0000	   0xbfff_ffff	   PCI2 MEM		   512M
+   0xe000_0000	   0xe00f_ffff	   CCSR			   1M
+   0xe200_0000	   0xe2ff_ffff	   PCI1 IO		   16M
+   0xe300_0000	   0xe3ff_ffff	   PCI2 IO		   16M
+   0xf000_0000	   0xf7ff_ffff	   SDRAM		   128M
+   0xf800_0000	   0xf80f_ffff	   NVRAM/CADMUS (*)	   1M
+   0xff00_0000	   0xff7f_ffff	   FLASH (2nd bank)	   8M
+   0xff80_0000	   0xffff_ffff	   FLASH (boot bank)	   8M
+
+   (*) The system control registers (CADMUS) start at offset 0xfdb0_4000
+   within the NVRAM/CADMUS region of memory.
+
+
+Using Flash
+-----------
+
+The CDS board  has two flash banks, each 8MB in size (2^23 = 0x00800000).
+There is a switch which allows the boot-bank to be selected.  The switch
+settings for updating flash are given below.
+
+The U-Boot commands for copying the boot-bank into the secondary bank are
+as follows:
+
+     erase ff780000 ff7fffff
+     cp.b fff80000 ff780000 80000
+
+
+U-Boot/kermit commands for downloading an image, then copying
+it into the secondary bank:
+
+     loadb
+     [Drop to kermit:
+	^\c
+	send <u-boot-bin-image>
+	c
+     ]
+
+     erase ff780000 ff7fffff
+     cp.b $loadaddr ff780000 80000
+
+
+U-Boot commands for downloading an image via tftp and flashing
+it into the second bank:
+
+     tftp 10000 <u-boot.bin.image>
+     erase ff780000 ff7fffff
+     cp.b 10000 ff780000 80000
+
+
+After copying the image into the second bank of flash, be sure to toggle
+SW2[2] on the carrier card before resetting the board in order to set the
+secondary bank as the boot-bank.
+
+
+Carrier Board Switches
+----------------------
+
+As a reminder, you should read the README.mpc85xxads too.
+
+Most switches on the carrier board should not be changed.  The only
+user-settable switches on the carrier board are used to configure
+the flash banks and determining the PCI slot.
+
+The first two bits of SW2 control how flash is used on the board:
+
+      12345678
+      --------
+  SW2=00XXXXXX	   FLASH:  Boot bank 1, bank 2 available.
+      01XXXXXX	   FLASH:  Boot bank 2, bank 1 available (swapped).
+      10XXXXXX	   FLASH:  Boot promjet, bank 1 available
+      11XXXXXX	   FLASH:  Boot promjet, bank 2 available
+
+The boot bank is always mapped to FF80_0000 and listed first by
+the "flinfo" command.  The secondary bank is always FF00_0000.
+
+When using PCI, linux needs to know to which slot the CDS carrier is
+connected..  By convention, the user-specific bits of SW2 are used to
+convey this information:
+
+      12345678
+      --------
+  SW2=xxxxxx00	   PCI SLOT INFORM: The CDS carrier is in slot0 of the Arcadia
+      xxxxxx01	   PCI SLOT INFORM: The CDS carrier is in slot1 of the Arcadia
+      xxxxxx10	   PCI SLOT INFORM: The CDS carrier is in slot2 of the Arcadia
+      xxxxxx11	   PCI SLOT INFORM: The CDS carrier is in slot3 of the Arcadia
+
+These are cleverly, er, clearly silkscreened as Slot 1 through 4,
+respectively, on the Arcadia near the support posts.
+
+
+The default setting of all switches on the carrier board is:
+
+      12345678
+      --------
+  SW1=01101100
+  SW2=0x1111yy	   x=Flash bank, yy=PCI slot
+  SW3=11101111
+  SW4=10001000
+
+
+8555/41 CPU Card Switches
+-------------------------
+
+Most switches on the CPU Card should not be changed.  However, the
+frequency can be changed by setting SW3:
+
+      12345678
+      --------
+  SW3=XX00XXXX == CORE:CCB 2:1
+      XX01XXXX == CORE:CCB 5:2
+      XX10XXXX == CORE:CCB 3:1
+      XX11XXXX == CORE:CCB 7:2
+      XXXX1000 == CCB:SYSCLK 8:1
+      XXXX1010 == CCB:SYSCLK 10:1
+
+A safe default setting for all switches on the CPU board is:
+
+      12345678
+      --------
+  SW1=10001111
+  SW2=01000111
+  SW3=00001000
+  SW4=11111110
+
+
+8548 CPU Card Switches
+----------------------
+And, just to be confusing, in this set of switches:
+
+    ON  = 1
+    OFF = 0
+
+Default
+  SW1=11111101
+  SW2=10011111
+  SW3=11001000    (8X) (2:1)
+  SW4=11110011
+
+  SW3=X000XXXX  == CORE:CCB    4:1
+      X001XXXX  == CORE:CCB    9:2
+      X010XXXX  == CORE:CCB    1:1
+      X011XXXX  == CORE:CCB    3:2
+      X100XXXX  == CORE:CCB    2:1
+      X101XXXX  == CORE:CCB    5:2
+      X110XXXX  == CORE:CCB    3:1
+      X111XXXX  == CORE:CCB    7:2
+      XXXX0000  == CCB:SYSCLK 16:1
+      XXXX0001  == RESERVED
+      XXXX0010  == CCB:SYSCLK  2:1
+      XXXX0011  == CCB:SYSCLK  3:1
+      XXXX0100  == CCB:SYSCLK  4:1
+      XXXX0101  == CCB:SYSCLK  5:1
+      XXXX0110  == CCB:SYSCLK  6:1
+      XXXX0111  == RESERVED
+      XXXX1000  == CCB:SYSCLK  8:1
+      XXXX1001  == CCB:SYSCLK  9:1
+      XXXX1010  == CCB:SYSCLK 10:1
+      XXXX1011  == RESERVED
+      XXXX1100  == CCB:SYSCLK 12:1
+      XXXX1101  == CCB:SYSCLK 20:1
+      XXXX1110  == RESERVED
+      XXXX1111  == RESERVED
+
+
+eDINK Info
+----------
+
+One bank of flash may contain an eDINK image.
+
+Memory Map:
+
+   CCSRBAR @ 0xe0000000
+   Flash Bank 1 @ 0xfe000000
+   Flash Bank 2 @ 0xff000000
+   Ram @ 0
+
+Commands for downloading a U-Boot image to memory from edink:
+
+   env -c
+   time -s 4/8/2004 4:30p
+   dl -k -b -o 100000
+   [Drop to kermit:
+	^\c
+	transmit /binary <u-boot-bin-image>
+	c
+   ]
+
+   fu -l 100000 fe780000 80000
diff --git a/doc/README.multi-dtb-fit b/doc/README.multi-dtb-fit
new file mode 100644
index 00000000000..f48450efcc4
--- /dev/null
+++ b/doc/README.multi-dtb-fit
@@ -0,0 +1,65 @@
+MULTI DTB FIT and SPL_MULTI_DTB_FIT
+
+The purpose of this feature is to enable U-Boot or the SPL to select its DTB
+from a FIT appended at the end of the binary.
+It comes in two flavors: U-Boot (CONFIG_MULTI_DTB_FIT) and SPL
+(CONFIG_SPL_MULTI_DTB_FIT).
+
+U-Boot flavor:
+Usually the DTB is selected by the SPL and passed down to U-Boot. But some
+platforms don't use the SPL. In this case MULTI_DTB_FIT can used to provide
+U-Boot with a choice of DTBs.
+The relevant DTBs are packed into a FIT (list provided by CONFIG_OF_LIST). The
+FIT is automatically generated at the end of the compilation and appended to
+u-boot.bin so that U-Boot can locate it and select the correct DTB from inside
+the FIT.
+The selection is done using board_fit_config_name_match() (same as what the SPL
+uses to select the DTB for U-Boot). The selection happens during fdtdec_setup()
+which is called during before relocation by board_init_f().
+
+SPL flavor:
+the SPL uses only a small subset of the DTB and it usually depends more
+on the SOC than on the board. So it's usually fine to include a DTB in the
+SPL that doesn't exactly match the board. There are howerver some cases
+where it's not possible. In the later case, in order to support multiple
+boards (or board revisions) with the same SPL binary, SPL_MULTI_DTB_FIT
+can be used.
+The relevant DTBs are packed into a FIT. This FIT is automatically generated
+at the end of the compilation, compressed and appended to u-boot-spl.bin, so
+that SPL can locate it and select the correct DTB from inside the FIT.
+CONFIG_SPL_OF_LIST is used to list the relevant DTBs.
+The compression stage is optional but reduces the impact on the size of the
+SPL. LZO and GZIP compressions are supported. By default, the area where the
+FIT is uncompressed is dynamicaly allocated but this behaviour can be changed
+for platforms that don't provide a HEAP big enough to contain the uncompressed
+FIT.
+The SPL uses board_fit_config_name_match() to find the correct DTB within the
+FIT (same as what the SPL uses to select the DTB for U-Boot).
+Uncompression and selection stages happen in fdtdec_setup() which is called
+during the early initialization stage of the SPL (spl_early_init() or
+spl_init())
+
+Impacts and performances (SPL flavor):
+The impact of this option is relatively small. Here are some numbers measured
+for a TI DRA72 platform:
+
+                            +----------+------------+-----------+------------+
+                            |  size    | size delta | SPL boot  | boot time  |
+                            |  (bytes) | (bytes)    | time (s)  | delta (s)  |
++---------------------------+----------+------------+-----------+------------+
+| 1 DTB                     |          |            |           |            |
++---------------------------+----------+------------+-----------+------------+
+| reference                 |   125305 |          0 |     1.389 |          0 |
+| LZO (dynamic allocation)  |   125391 |         86 |     1.381 |     -0.008 |
++---------------------------+----------+------------+-----------+------------+
+| 4 DTBs (DRA7, DRA71,      |          |            |           |            |
+| DRA72, DRA72 revC)        |          |            |           |            |
++---------------------------+----------+------------+-----------+------------+
+| LZO (dynamic allocation)  |   125991 |        686 |      1.39 |      0.001 |
+| LZO (user defined area)   |   125927 |        622 |     1.403 |      0.014 |
+| GZIP (user defined area)  |   133880 |       8575 |     1.421 |      0.032 |
+| No compression (in place) |   137472 |      12167 |     1.412 |      0.023 |
++---------------------------+----------+------------+-----------+------------+
+
+Note: SPL boot time is the time elapsed between the 'reset' command is entered
+and the time when the first U-Boot (not SPL) version string is displayed.
diff --git a/doc/README.mxc_ocotp b/doc/README.mxc_ocotp
new file mode 100644
index 00000000000..7a2863cfd2f
--- /dev/null
+++ b/doc/README.mxc_ocotp
@@ -0,0 +1,51 @@
+Driver implementing the fuse API for Freescale's On-Chip OTP Controller (OCOTP)
+on MXC
+
+This IP can be found on the following SoCs:
+ - Vybrid VF610,
+ - i.MX6.
+
+Note that this IP is different from albeit similar to the IPs of the same name
+that can be found on the following SoCs:
+ - i.MX23,
+ - i.MX28,
+ - i.MX50.
+
+The section numbers in this file refer to the i.MX6 Reference Manual.
+
+A fuse word contains 32 fuse bit slots, as explained in 46.2.1.
+
+A bank contains 8 fuse word slots, as explained in 46.2.1 and shown by the
+memory map in 46.4.
+
+Some fuse bit or word slots may not have the corresponding fuses actually
+implemented in the fusebox.
+
+See the README files of the SoCs using this driver in order to know the
+conventions used by U-Boot to store some specific data in the fuses, e.g. MAC
+addresses.
+
+Fuse operations:
+
+   Read
+      Read operations are implemented as read accesses to the shadow registers,
+      using "Bankx Wordy" from the memory map in 46.4. This is explained in
+      detail by the first two paragraphs in 46.2.1.2.
+
+   Sense
+      Sense operations are implemented as the direct fusebox read explained by
+      the steps in 46.2.1.2.
+
+   Program
+      Program operations are implemented as explained by the steps in 46.2.1.3.
+      Following this operation, the shadow registers are not reloaded by the
+      hardware.
+
+   Override
+      Override operations are implemented as write accesses to the shadow
+      registers, as explained by the first paragraph in 46.2.1.3.
+
+Configuration:
+
+   CONFIG_MXC_OCOTP
+      Define this to enable the mxc_ocotp driver.
diff --git a/doc/README.nand b/doc/README.nand
new file mode 100644
index 00000000000..37657512533
--- /dev/null
+++ b/doc/README.nand
@@ -0,0 +1,261 @@
+# SPDX-License-Identifier: GPL-2.0+
+NAND FLASH commands and notes
+
+See NOTE below!!!
+
+# (C) Copyright 2003
+# Dave Ellis, SIXNET, dge@sixnetio.com
+#
+
+Commands:
+
+   nand bad
+      Print a list of all of the bad blocks in the current device.
+
+   nand device
+      Print information about the current NAND device.
+
+   nand device num
+      Make device `num' the current device and print information about it.
+
+   nand erase off|partition size
+   nand erase clean [off|partition size]
+      Erase `size' bytes starting at offset `off'. Alternatively partition
+      name can be specified, in this case size will be eventually limited
+      to not exceed partition size (this behaviour applies also to read
+      and write commands). Only complete erase blocks can be erased.
+
+      If `erase' is specified without an offset or size, the entire flash
+      is erased. If `erase' is specified with partition but without an
+      size, the entire partition is erased.
+
+      If `clean' is specified, a JFFS2-style clean marker is written to
+      each block after it is erased.
+
+      This command will not erase blocks that are marked bad. There is
+      a debug option in cmd_nand.c to allow bad blocks to be erased.
+      Please read the warning there before using it, as blocks marked
+      bad by the manufacturer must _NEVER_ be erased.
+
+   nand info
+      Print information about all of the NAND devices found.
+
+   nand read addr ofs|partition size
+      Read `size' bytes from `ofs' in NAND flash to `addr'.  Blocks that
+      are marked bad are skipped.  If a page cannot be read because an
+      uncorrectable data error is found, the command stops with an error.
+
+   nand read.oob addr ofs|partition size
+      Read `size' bytes from the out-of-band data area corresponding to
+      `ofs' in NAND flash to `addr'. This is limited to the 16 bytes of
+      data for one 512-byte page or 2 256-byte pages. There is no check
+      for bad blocks or ECC errors.
+
+   nand write addr ofs|partition size
+      Write `size' bytes from `addr' to `ofs' in NAND flash.  Blocks that
+      are marked bad are skipped.  If a page cannot be read because an
+      uncorrectable data error is found, the command stops with an error.
+
+      As JFFS2 skips blocks similarly, this allows writing a JFFS2 image,
+      as long as the image is short enough to fit even after skipping the
+      bad blocks.  Compact images, such as those produced by mkfs.jffs2
+      should work well, but loading an image copied from another flash is
+      going to be trouble if there are any bad blocks.
+
+   nand write.trimffs addr ofs|partition size
+      Enabled by the CONFIG_CMD_NAND_TRIMFFS macro. This command will write to
+      the NAND flash in a manner identical to the 'nand write' command
+      described above -- with the additional check that all pages at the end
+      of eraseblocks which contain only 0xff data will not be written to the
+      NAND flash. This behaviour is required when flashing UBI images
+      containing UBIFS volumes as per the UBI FAQ[1].
+
+      [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo
+
+   nand write.oob addr ofs|partition size
+      Write `size' bytes from `addr' to the out-of-band data area
+      corresponding to `ofs' in NAND flash. This is limited to the 16 bytes
+      of data for one 512-byte page or 2 256-byte pages. There is no check
+      for bad blocks.
+
+   nand read.raw addr ofs|partition [count]
+   nand write.raw addr ofs|partition [count]
+      Read or write one or more pages at "ofs" in NAND flash, from or to
+      "addr" in memory.  This is a raw access, so ECC is avoided and the
+      OOB area is transferred as well.  If count is absent, it is assumed
+      to be one page.  As with .yaffs2 accesses, the data is formatted as
+      a packed sequence of "data, oob, data, oob, ..." -- no alignment of
+      individual pages is maintained.
+
+Configuration Options:
+
+   CONFIG_SYS_NAND_U_BOOT_OFFS
+	NAND Offset from where SPL will read u-boot image. This is the starting
+	address of u-boot MTD partition in NAND.
+
+   CONFIG_CMD_NAND
+      Enables NAND support and commands.
+
+   CONFIG_CMD_NAND_TORTURE
+      Enables the torture command (see description of this command below).
+
+   CONFIG_SYS_NAND_MAX_CHIPS
+      The maximum number of NAND chips per device to be supported.
+
+   CONFIG_SYS_NAND_SELF_INIT
+      Traditionally, glue code in drivers/mtd/nand/raw/nand.c has driven
+      the initialization process -- it provides the mtd and nand
+      structs, calls a board init function for a specific device,
+      calls nand_scan(), and registers with mtd.
+
+      This arrangement does not provide drivers with the flexibility to
+      run code between nand_scan_ident() and nand_scan_tail(), or other
+      deviations from the "normal" flow.
+
+      If a board defines CONFIG_SYS_NAND_SELF_INIT, drivers/mtd/nand/raw/nand.c
+      will make one call to board_nand_init(), with no arguments.  That
+      function is responsible for calling a driver init function for
+      each NAND device on the board, that performs all initialization
+      tasks except setting mtd->name, and registering with the rest of
+      U-Boot.  Those last tasks are accomplished by calling  nand_register()
+      on the new mtd device.
+
+      Example of new init to be added to the end of an existing driver
+      init:
+
+	/* chip is struct nand_chip, and is now provided by the driver. */
+	mtd = nand_to_mtd(&chip);
+
+	/*
+	 * Fill in appropriate values if this driver uses these fields,
+	 * or uses the standard read_byte/write_buf/etc. functions from
+	 * nand_base.c that use these fields.
+	 */
+	chip.IO_ADDR_R = ...;
+	chip.IO_ADDR_W = ...;
+
+	if (nand_scan_ident(mtd, CFG_SYS_MAX_NAND_CHIPS, NULL))
+		error out
+
+	/*
+	 * Insert here any code you wish to run after the chip has been
+	 * identified, but before any other I/O is done.
+	 */
+
+	if (nand_scan_tail(mtd))
+		error out
+
+	/*
+	 * devnum is the device number to be used in nand commands
+	 * and in mtd->name.  Must be less than CONFIG_SYS_MAX_NAND_DEVICE.
+	 */
+	if (nand_register(devnum, mtd))
+		error out
+
+      In addition to providing more flexibility to the driver, it reduces
+      the difference between a U-Boot driver and its Linux counterpart.
+      nand_init() is now reduced to calling board_nand_init() once, and
+      printing a size summary.  This should also make it easier to
+      transition to delayed NAND initialization.
+
+      Please convert your driver even if you don't need the extra
+      flexibility, so that one day we can eliminate the old mechanism.
+
+
+Platform specific options
+=========================
+   CONFIG_NAND_OMAP_GPMC
+	Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
+	GPMC controller is used for parallel NAND flash devices, and can
+	do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
+	and BCH16 ECC algorithms.
+
+   CONFIG_NAND_OMAP_ELM
+	Enables omap_elm.c driver for OMAPx and AMxxxx platforms.
+	ELM controller is used for ECC error detection (not ECC calculation)
+	of BCH4, BCH8 and BCH16 ECC algorithms.
+	Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+	thus such SoC platforms need to depend on software library for ECC error
+	detection. However ECC calculation on such plaforms would still be
+	done by GPMC controller.
+
+   CONFIG_SPL_NAND_AM33XX_BCH
+	Enables SPL-NAND driver (am335x_spl_bch.c) which supports ELM based
+        hardware ECC correction. This is useful for platforms which have ELM
+	hardware engine and use NAND boot mode.
+	Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
+	so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
+        SPL-NAND driver with software ECC correction support.
+
+    CONFIG_NAND_OMAP_GPMC_PREFETCH
+	On OMAP platforms that use the GPMC controller
+	(CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
+	uses the prefetch mode to speed up read operations.
+
+NOTE:
+=====
+
+The Disk On Chip driver is currently broken and has been for some time.
+There is a driver in drivers/mtd/nand/raw, taken from Linux, that works with
+the current NAND system but has not yet been adapted to the u-boot
+environment.
+
+Additional improvements to the NAND subsystem by Guido Classen, 10-10-2006
+
+JFFS2 related commands:
+
+  implement "nand erase clean" and old "nand erase"
+  using both the new code which is able to skip bad blocks
+  "nand erase clean" additionally writes JFFS2-cleanmarkers in the oob.
+
+Miscellaneous and testing commands:
+  "markbad [offset]"
+  create an artificial bad block (for testing bad block handling)
+
+  "scrub [offset length]"
+  like "erase" but don't skip bad block. Instead erase them.
+  DANGEROUS!!! Factory set bad blocks will be lost. Use only
+  to remove artificial bad blocks created with the "markbad" command.
+
+  "torture offset [size]"
+  Torture block to determine if it is still reliable.
+  Enabled by the CONFIG_CMD_NAND_TORTURE configuration option.
+  This command returns 0 if the block is still reliable, else 1.
+  If the block is detected as unreliable, it is up to the user to decide to
+  mark this block as bad.
+  The analyzed block is put through 3 erase / write cycles (or less if the block
+  is detected as unreliable earlier).
+  This command can be used in scripts, e.g. together with the markbad command to
+  automate retries and handling of possibly newly detected bad blocks if the
+  nand write command fails.
+  It can also be used manually by users having seen some NAND errors in logs to
+  search the root cause of these errors.
+  The underlying nand_torture() function is also useful for code willing to
+  automate actions following a nand->write() error. This would e.g. be required
+  in order to program or update safely firmware to NAND, especially for the UBI
+  part of such firmware.
+  Optionally, a second parameter size can be given to test multiple blocks with
+  one call. If size is not a multiple of the NAND's erase size, then the block
+  that contains offset + size will be tested in full. If used with size, this
+  command returns 0 if all tested blocks have been found reliable, else 1.
+
+
+NAND locking command (for chips with active LOCKPRE pin)
+
+  "nand lock"
+  set NAND chip to lock state (all pages locked)
+
+  "nand lock tight"
+  set NAND chip to lock tight state (software can't change locking anymore)
+
+  "nand lock status"
+  displays current locking status of all pages
+
+  "nand unlock [offset] [size]"
+  unlock consecutive area (can be called multiple times for different areas)
+
+  "nand unlock.allexcept [offset] [size]"
+  unlock all except specified consecutive area
+
+I have tested the code with board containing 128MiB NAND large page chips
+and 32MiB small page chips.
diff --git a/doc/README.odroid b/doc/README.odroid
new file mode 100644
index 00000000000..1090a0ea141
--- /dev/null
+++ b/doc/README.odroid
@@ -0,0 +1,332 @@
+ U-Boot for Odroid X2/U3/XU3/XU4/HC1
+========================
+
+1. Summary
+==========
+This is a quick instruction for setup Odroid boards.
+Board config: odroid_config for X2/U3
+Board config: odroid-xu3_config for XU3/XU4/HC1
+
+2. Supported devices
+====================
+This U-BOOT config can be used on three boards:
+- Odroid U3
+- Odroid X2
+with CPU Exynos 4412 rev 2.0 and 2GB of RAM
+- Odroid XU3
+- Odroid XU4
+- Odroid HC1
+with CPU Exynos5422 and 2GB of RAM
+
+3. Boot sequence
+================
+iROM->BL1->(BL2 + TrustZone)->U-BOOT
+
+This version of U-BOOT doesn't implement SPL. So, BL1, BL2, and TrustZone
+binaries are needed to boot up.
+
+<< X2/U3 >>
+It can be found in "boot.tar.gz" from here:
+http://dev.odroid.com/projects/4412boot/wiki/FrontPage?action=download&value=boot.tar.gz
+or here:
+http://odroid.in/guides/ubuntu-lfs/boot.tar.gz
+
+<< XU3/XU4 >>
+It can be downloaded from:
+https://github.com/hardkernel/u-boot/tree/odroidxu3-v2012.07/sd_fuse/hardkernel_1mb_uboot
+
+
+4. Boot media layout
+====================
+The table below shows SD/eMMC cards layout for U-Boot.
+The block offset is starting from 0 and the block size is 512B.
+ -------------------------------------
+|  Binary   | Block offset| part type |
+|   name    | SD   | eMMC |(eMMC only)|
+ -------------------------------------
+| Bl1       | 1    | 0    |  1 (boot) |
+| Bl2       | 31   | 30   |  1 (boot) |
+| U-Boot    | 63   | 62   |  1 (boot) |
+| Tzsw      | 2111 | 2110 |  1 (boot) |
+| Uboot Env | 2560 | 2560 |  0 (user) |
+ -------------------------------------
+
+5. Prepare the SD boot card - with SD card reader
+=================================================
+To prepare bootable media you need boot binaries provided by hardkernel.
+From the downloaded files, You can find:
+- bl1.bin
+- tzsw.bin
+- bl2.bin
+- sd_fusing.sh
+- u-boot.bin
+(The file names can be slightly different, but you can distinguish what they are
+without problem)
+
+This is all you need to boot this board. But if you want to use your custom
+U-Boot then you need to change u-boot.bin with your own U-Boot binary*
+and run the script "sd_fusing.sh" - this script is valid only for SD card.
+
+*note:
+The proper binary file of current U-Boot is u-boot-dtb.bin.
+
+quick steps for Linux:
+- Download all files from the link at point 3 and extract it if needed.
+- put any SD card into the SD reader
+- check the device with "dmesg"
+- run ./sd_fusing.sh /dev/sdX - where X is SD card device (but not a partition)
+Check if Hardkernel U-Boot is booting, and next do the same with your U-Boot.
+
+6. Prepare the eMMC boot card
+   with a eMMC card reader (boot from eMMC card slot)
+=====================================================
+To boot the device from the eMMC slot you should use a special card reader
+which supports eMMC partition switch. All of the boot binaries are stored
+on the eMMC boot partition which is normally hidden.
+
+The "sd_fusing.sh" script can be used after updating offsets of binaries
+according to the table from point 4. Be sure that you are working on the right
+eMMC partition - its size is usually very small, about 1-4 MiB.
+
+7. Prepare the eMMC boot card
+   with a SD card reader (boot from SD card slot)
+=================================================
+If you have an eMMC->microSD adapter you can prepare the card as in point 5.
+But then the device can boot only from the SD card slot.
+
+8. Prepare the boot media using Hardkernel U-Boot
+=================================================
+You can update the U-Boot to the custom one if you have a working bootloader
+delivered with the board on the eMMC/SD card. Then follow the steps:
+- install the android fastboot tool
+- connect a micro usb cable to the board
+- on the U-Boot prompt, run command: fastboot (as a root)
+- on the host, run command: "fastboot flash bootloader u-boot-dtb.bin"
+- the custom U-Boot should start after the board resets.
+
+9. Partition layout
+====================
+Default U-Boot environment is setup for fixed partition layout.
+
+Partition table: MSDOS. Disk layout and files as listed in the table below.
+ ----- ------ ------ ------ -------- ---------------------------------
+| Num | Name |  FS  | Size | Offset |         Reguired files          |
+|     |      | Type |  MiB |  MiB   |                                 |
+ ----- ------ ------ ------ -------- ---------------------------------
+|  1  | BOOT | fat  |  100 |   2    |  kernel, fdt**                  |
+|  2  | ROOT | ext4 |   -  |        |  any Linux system               |
+ ----- ------ ------ ------ -------- ---------------------------------
+
+**note:
+Supported fdt files are:
+- exynos4412-odroidx2.dtb
+- exynos4412-odroidu3.dtb
+- exynos5422-odroidxu3.dtb
+- exynos5422-odroidxu3-lite.dtb
+- exynos5422-odroidxu4.dtb
+- exynos5422-odroidhc1.dtb
+
+Supported kernel files are:
+- Image.itb
+- zImage
+- uImage
+
+The default environmental variable "dfu_alt_info" is set* for above layout.
+Each partition size is just an example, dfu_alt_info tries init two partitions.
+The size of each is not important.
+
+*note:
+$dfu_alt_info is set on a boot time and it is concatenated using two variables:
+- $dfu_alt_boot(set dynamically)
+- $dfu_alt_system(from current env).
+
+To add any changes to dfu_alt_info - please modify $dfu_alt_system only.
+Changes are visible after board reset.
+
+10. The environment and booting the kernel
+==========================================
+There are three macros defined in config for various boot options:
+Two for both, kernel with device tree support and also without it:
+- boot_uimg - load uImage
+- boot_zimg - load zImage
+If proper fdt file exists then it will be automatically loaded,
+so for old kernel types, please remove fdt file from boot partition.
+
+The third boot option for multi image support (more info: doc/uImage.FIT/)
+- boot_fit - for binary file: "Image.itb"
+
+Default boot command: "autoboot"
+And the boot sequence is:
+- boot_fit - if "Image.itb" exists
+- boot_zimg - if "zImage" exists
+- boot_uimg - if "uImage" exists
+
+11. USB host support
+====================
+NOTE: This section is only for Odroid X2/U3.
+
+The ethernet can be accessed after starting the USB subsystem in U-Boot.
+The adapter does not come with a preconfigured MAC address, and hence it needs
+to be set before starting USB.
+setenv usbethaddr 02:DE:AD:BE:EF:FF
+
+Note that in this example a locally managed MAC address is chosen. Care should
+be taken to make these MAC addresses unique within the same subnet.
+
+Start the USB subsystem:
+Odroid # setenv usbethaddr 02:DE:AD:BE:EF:FF
+Odroid # usb start
+(Re)start USB...
+USB0:   USB EHCI 1.00
+scanning bus 0 for devices... 4 USB Device(s) found
+       scanning usb for storage devices... 1 Storage Device(s) found
+       scanning usb for ethernet devices... 1 Ethernet Device(s) found
+Odroid #
+
+Automatic IP assignment:
+------------------------
+If the ethernet is connected to a DHCP server (router maybe with DHCP enabled),
+then the below will automatically assign an ip address through DHCP.
+setenv autoload no
+dhcp
+
+Odroid # setenv autoload no
+Odroid # dhcp
+Waiting for Ethernet connection... done.
+BOOTP broadcast 1
+DHCP client bound to address 192.168.1.10 (524 ms)
+Odroid #
+
+Note that this automatically sets the many IP address related variables in
+U-Boot that is obtained from the DHCP server.
+
+Odroid # printenv ipaddr netmask gatewayip dnsip
+ipaddr=192.168.1.10
+netmask=255.255.255.0
+gatewayip=192.168.1.1
+dnsip=192.168.1.1
+
+Ping example:
+The ping command can be used a test to check connectivity. In this example,
+192.168.1.27 is a pingable server in the network.
+Odroid # ping 192.168.1.27
+Waiting for Ethernet connection... done.
+Using sms0 device
+host 192.168.1.27 is alive
+Odroid #
+
+Static IP assignment:
+---------------------
+In the case where there are no DHCP servers in the network, or you want to
+set the IP address statically, it can be done by:
+Odroid # setenv ipaddr 192.168.1.10
+Odroid # ping 192.168.1.27
+Waiting for Ethernet connection... done.
+Using sms0 device
+host 192.168.1.27 is alive
+
+TFTP booting:
+-------------
+Say there exists a tftp server in the network with address 192.168.1.27 and
+it serves a kernel image (zImage.3.17) and a DTB blob (exynos4412-odroidu3.dtb)
+that needs to be loaded and booted. It can be accomplished as below:
+(Assumes that you have setenv usbethaddr, and have not set autoload to no)
+
+Odroid # setenv serverip 192.168.1.27
+Odroid # tftpboot 0x40080000 zImage.3.17
+Waiting for Ethernet connection... done.
+Using sms0 device
+TFTP from server 192.168.1.27; our IP address is 192.168.1.10
+Filename 'zImage.3.17'.
+Load address: 0x40080000
+Loading: #################################################################
+	 #################################################################
+	 #################################################################
+	 #######################
+	 52.7 KiB/s
+done
+Bytes transferred = 3194200 (30bd58 hex)
+Odroid # tftpboot 0x42000000 exynos4412-odroidu3.dtb
+Waiting for Ethernet connection... done.
+Using sms0 device
+TFTP from server 192.168.1.27; our IP address is 192.168.1.10
+Filename 'exynos4412-odroidu3.dtb'.
+Load address: 0x42000000
+Loading: ####
+	 40 KiB/s
+done
+Bytes transferred = 46935 (b757 hex)
+Odroid # printenv bootargs
+bootargs=Please use defined boot
+Odroid # setenv bootargs console=ttySAC1,115200n8 root=/dev/mmcblk0p2 rootwait
+Odroid # bootz 40080000 - 42000000
+Kernel image @ 0x40080000 [ 0x000000 - 0x30bd58 ]
+## Flattened Device Tree blob at 42000000
+   Booting using the fdt blob at 0x42000000
+   Loading Device Tree to 4fff1000, end 4ffff756 ... OK
+
+Starting kernel ...
+
+[    0.000000] Booting Linux on physical CPU 0xa00
+... etc ...
+
+In the above example you can substitute 'dhcp' for 'tftpboot' as well.
+
+USB Storage booting:
+--------------------
+Similarly we can use the USB storage to load the kernel image/initrd/fdt etc
+and boot. For this example, there is a USB drive plugged in. It has a FAT
+1st partition and an EXT 2nd partition. Using the generic FS (ls/load) makes
+it even easier to work with FAT/EXT file systems.
+For this example the second EXT partition is used for booting and as rootfs.
+The boot files - kernel and the dtb are present in the /boot directory of the
+second partition.
+
+Odroid # usb start
+(Re)start USB...
+USB0:   USB EHCI 1.00
+scanning bus 0 for devices... 4 USB Device(s) found
+       scanning usb for storage devices... 1 Storage Device(s) found
+       scanning usb for ethernet devices...
+Error: sms0 address not set.		<----- Note the error as usbethaddr
+Warning: failed to set MAC address	<----- is not set.
+1 Ethernet Device(s) found
+Odroid # usb part 0
+
+Partition Map for USB device 0  --   Partition Type: DOS
+
+Part	Start Sector	Num Sectors	UUID		Type
+  1	3072		263168		000c4046-01	06
+  2	266240		13457408	000c4046-02	83
+
+Odroid # ls usb 0:2 /boot
+<DIR>       4096 .
+<DIR>       4096 ..
+             353 boot.scr
+             281 boot.txt
+          101420 config-3.8.13.23
+         2127254 initrd.img-3.8.13.23
+         2194825 uInitrd
+         2194825 uInitrd-3.8.13.23
+         2453112 zImage
+          101448 config-3.8.13.26
+         2127670 uInitrd-3.8.13.26
+         2127606 initrd.img-3.8.13.26
+         3194200 zImage.3.17                    <--- Kernel
+           46935 exynos4412-odroidu3.dtb        <--- DTB
+Odroid # load usb 0:2 40080000 /boot/zImage.3.17
+3194200 bytes read in 471 ms (6.5 MiB/s)
+Odroid # load usb 0:2 42000000 /boot/exynos4412-odroidu3.dtb
+46935 bytes read in 233 ms (196.3 KiB/s)
+Odroid # setenv bootargs console=ttySAC1,115200n8 root=/dev/sda2 rootwait
+Odroid # bootz 40080000 - 42000000
+Kernel image @ 0x40080000 [ 0x000000 - 0x30bd58 ]
+## Flattened Device Tree blob at 42000000
+   Booting using the fdt blob at 0x42000000
+   Loading Device Tree to 4fff1000, end 4ffff756 ... OK
+
+Starting kernel ...
+
+[    0.000000] Booting Linux on physical CPU 0xa00
+
+Please refer to README.usb for additional information.
diff --git a/doc/README.omap-ulpi-viewport b/doc/README.omap-ulpi-viewport
new file mode 100644
index 00000000000..a5240b9e295
--- /dev/null
+++ b/doc/README.omap-ulpi-viewport
@@ -0,0 +1,27 @@
+Reference code ""drivers/usb/ulpi/omap-ulpi-viewport.c"
+
+Contains the ulpi read write api's to perform
+any ulpi phy port access on omap platform.
+
+On omap ehci reg map contains INSNREG05_ULPI
+register which offers the ulpi phy access so
+any ulpi phy commands should be passsed using this
+register.
+
+omap-ulpi-viewport.c is a low level function
+implementation of "drivers/usb/ulpi/ulpi.c"
+
+To enable and use omap-ulpi-viewport.c
+we require CONFIG_USB_ULPI_VIEWPORT_OMAP and
+CONFIG_USB_ULPI be enabled in config file.
+
+Any ulpi ops request can be done with ulpi.c
+and soc specific binding and usage is done with
+omap-ulpi-viewport implementation.
+
+Ex: scenario:
+omap-ehci driver code requests for ulpi phy reset if
+ehci is used in phy mode, which will call ulpi phy reset
+the ulpi phy reset does ulpi_read/write from viewport
+implementation which will do ulpi reset using the
+INSNREG05_ULPI register.
diff --git a/doc/README.omap3 b/doc/README.omap3
new file mode 100644
index 00000000000..d1e6be94a11
--- /dev/null
+++ b/doc/README.omap3
@@ -0,0 +1,199 @@
+
+Summary
+=======
+
+This README is about U-Boot support for TI's ARM Cortex-A8 based OMAP3 [1]
+family of SoCs. TI's OMAP3 SoC family contains an ARM Cortex-A8. Additionally,
+some family members contain a TMS320C64x+ DSP and/or an Imagination SGX 2D/3D
+graphics processor and various other standard peripherals.
+
+Currently the following boards are supported:
+
+* OMAP3530 BeagleBoard [2]
+
+* Gumstix Overo [3]
+
+* TI EVM [4]
+
+* OpenPandora Ltd. Pandora [5]
+
+* TI/Logic PD Zoom MDK [6]
+
+* TI/Logic PD Zoom 2 [7]
+
+* CompuLab Ltd. CM-T35 [8]
+
+Build
+=====
+
+* BeagleBoard:
+
+make omap3_beagle_config
+make
+
+* Gumstix Overo:
+
+make omap3_overo_config
+make
+
+* TI EVM:
+
+make omap3_evm_config
+make
+
+* Zoom 2:
+
+make omap3_zoom2_config
+make
+
+* CM-T35:
+
+make cm_t35_config
+make
+
+
+Custom commands
+===============
+
+To make U-Boot for OMAP3 support NAND device SW or HW ECC calculation, U-Boot
+for OMAP3 supports custom user command
+
+nandecc hw/sw
+
+To be compatible with NAND drivers using SW ECC (e.g. kernel code)
+
+nandecc sw
+
+enables SW ECC calculation. HW ECC enabled with
+
+nandecc hw
+
+is typically used to write 2nd stage bootloader (known as 'x-loader') which is
+executed by OMAP3's boot rom and therefore has to be written with HW ECC.
+
+For all other commands see
+
+help
+
+Interfaces
+==========
+
+gpio
+----
+
+To set a bit :
+
+	if (!gpio_request(N, "")) {
+		gpio_direction_output(N, 0);
+		gpio_set_value(N, 1);
+	}
+
+To clear a bit :
+
+	if (!gpio_request(N, "")) {
+		gpio_direction_output(N, 0);
+		gpio_set_value(N, 0);
+	}
+
+To read a bit :
+
+	if (!gpio_request(N, "")) {
+		gpio_direction_input(N);
+		val = gpio_get_value(N);
+		gpio_free(N);
+	}
+	if (val)
+		printf("GPIO N is set\n");
+	else
+		printf("GPIO N is clear\n");
+
+dma
+---
+void omap3_dma_init(void)
+	Init the DMA module
+int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config);
+	Read config of the channel
+int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config);
+	Write config to the channel
+int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
+		uint32_t sze)
+	Config source, destination and size of a transfer
+int omap3_dma_wait_for_transfer(uint32_t chan)
+	Wait for a transfer to end - this hast to be called before a channel
+	or the data the channel transferd are used.
+int omap3_dma_get_revision(uint32_t *minor, uint32_t *major)
+	Read silicon Revision of the DMA module
+
+NAND
+====
+
+There are some OMAP3 devices out there with NAND attached. Due to the fact that
+OMAP3 ROM code can only handle 1-bit hamming ECC for accessing first page
+(place where SPL lives) we require this setup for u-boot at least when reading
+the second progam within SPL.  A lot of newer NAND chips however require more
+than 1-bit ECC for the pages, some can live with 1-bit for the first page. To
+handle this we can switch to another ECC algorithm after reading the payload
+within SPL.
+
+BCH8
+----
+
+To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on
+OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH
+and set CONFIG_NAND_OMAP_ECCSCHEME=5 (refer README.nand) for selecting BCH8_SW.
+The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8
+implementation for OMAP3 works for you so the u-boot version should also.
+When you require the SPL to read with BCH8 there are two more configs to
+change:
+
+ * CFG_SYS_NAND_ECCPOS (must be the same as .eccpos in
+   GPMC_NAND_HW_BCH8_ECC_LAYOUT defined in
+   arch/arm/include/asm/arch-omap3/omap_gpmc.h)
+ * CFG_SYS_NAND_ECCSIZE must be 512
+ * CFG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
+
+Acknowledgements
+================
+
+OMAP3 U-Boot is based on U-Boot tar ball [9] for BeagleBoard and EVM done by
+several TI employees.
+
+Links
+=====
+
+[1] OMAP3:
+
+https://www.ti.com/omap3 (high volume) and
+https://www.ti.com/omap35x (broad market)
+
+[2] OMAP3530 BeagleBoard:
+
+http://beagleboard.org/
+
+[3] Gumstix Overo:
+
+http://www.gumstix.net/Overo/
+
+[4] TI EVM:
+
+http://focus.ti.com/docs/toolsw/folders/print/tmdxevm3503.html
+
+[5] OpenPandora Ltd. Pandora:
+
+http://openpandora.org/
+
+[6] TI/Logic PD Zoom MDK:
+
+http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit
+
+[7] TI/Logic PD Zoom 2
+
+http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
+
+[8] CompuLab Ltd. CM-T35:
+
+http://www.compulab.co.il/t3530/html/t3530-cm-datasheet.htm
+
+[9] TI OMAP3 U-Boot:
+
+http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz
diff --git a/doc/README.pblimage b/doc/README.pblimage
new file mode 100644
index 00000000000..58202c14a28
--- /dev/null
+++ b/doc/README.pblimage
@@ -0,0 +1,111 @@
+------------------------------------------------------------------
+Freescale PBL(pre-boot loader) Boot Image generation using mkimage
+------------------------------------------------------------------
+
+The CoreNet SoC's can boot directly from eSPI FLASH, SD/MMC and
+NAND, etc. These SoCs use PBL to load RCW and/or pre-initialization
+instructions. For more details refer section 5 Pre-boot loader
+specifications of reference manual P3041RM/P4080RM/P5020RM at link:
+http://www.freescale.com/webapp/search/Serp.jsp?Reference+Manuals
+
+Building PBL Boot Image and boot steps
+--------------------------------------
+
+1. Building PBL Boot Image.
+   The default Image is u-boot.pbl.
+
+   For eSPI boot(available on P2041/P3041/P4080/P5020/P5040/T4240):
+	To build the eSPI boot image:
+	make <board_name>_SPIFLASH
+
+   For SD boot(available on P2041/P3041/P4080/P5020/P5040/T4240):
+	To build the SD boot image:
+	make <board_name>_SDCARD
+
+   For Nand boot(available on P2041/P3041/P5020/P5040):
+	To build the NAND boot image:
+	make <board_name>_NAND
+
+
+2. pblimage support available with mkimage utility will generate Freescale PBL
+boot image that can be flashed on the board eSPI flash, SD/MMC and NAND.
+Following steps describe it in detail.
+
+	1). Boot from eSPI flash
+	Write u-boot.pbl to eSPI flash from offset 0x0.
+	for ex in u-boot:
+	=>tftp 100000 u-boot.pbl
+	=>sf probe 0
+	=>sf erase 0 100000
+	=>sf write 100000 0 $filesize
+	Change SW1[1:5] = off off on off on.
+
+	2). Boot from SD/MMC
+	Write u-boot.pbl to SD/MMC from offset 0x1000.
+	for ex in u-boot:
+	=>tftp 100000 u-boot.pbl
+	=>mmcinfo
+	=>mmc write 100000 8 441
+	Change SW1[1:5] = off off on on off.
+
+	3). Boot from Nand
+	Write u-boot.pbl to Nand from offset 0x0.
+	for ex in u-boot:
+	=>tftp 100000 u-boot.pbl
+	=>nand info
+	=>nand erase 0 100000
+	=>nand write 100000 0 $filesize
+	Change SW1[1:5] = off on off off on
+	Change SW7[1:4] = on off off on
+
+Board specific configuration file specifications:
+------------------------------------------------
+1. Configuration files rcw.cfg and pbi.cfg must present in the
+board/freescale/<BOARD>/ directory, rcw.cfg is for RCW, pbi.cfg is for
+PBI instructions. File name must not be changed since they are used
+in Makefile.
+2. These files can have empty lines and lines starting with "#" as first
+character to put comments
+
+Typical example of rcw.cfg file:
+-----------------------------------
+
+#PBL preamble and RCW header
+aa55aa55 010e0100
+#64 bytes RCW data
+4c580000 00000000 18185218 0000cccc
+40464000 3c3c2000 58000000 61000000
+00000000 00000000 00000000 008b6000
+00000000 00000000 00000000 00000000
+
+Typical example of pbi.cfg file:
+-----------------------------------
+
+#PBI commands
+#Initialize CPC1
+09010000 00200400
+09138000 00000000
+091380c0 00000100
+09010100 00000000
+09010104 fff0000b
+09010f00 08000000
+09010000 80000000
+#Configure LAW for CPC1
+09000d00 00000000
+09000d04 fff00000
+09000d08 81000013
+09000010 00000000
+09000014 ff000000
+09000018 81000000
+#Initialize eSPI controller
+09110000 80000403
+09110020 2d170008
+09110024 00100008
+09110028 00100008
+0911002c 00100008
+#Flush PBL data
+09138000 00000000
+091380c0 00000000
+
+------------------------------------------------
+Author: Shaohui Xie<Shaohui.Xie@freescale.com>
diff --git a/doc/README.pcap b/doc/README.pcap
new file mode 100644
index 00000000000..10318ef0a9e
--- /dev/null
+++ b/doc/README.pcap
@@ -0,0 +1,61 @@
+PCAP:
+
+U-Boot supports live Ethernet packet capture in PCAP(2.4) format.
+This is enabled by CONFIG_CMD_PCAP.
+
+The capture is stored on physical memory, and should be copied to
+a machine capable of parsing and displaying PCAP files (IE. wireshark)
+If networking works properly one can copy the capture file from physical memory
+using tftpput, or save it to local storage with (sf write, mmc write, fatwrite, etc)
+
+the pcap capturing requires maximum buffer size.
+when the buffer is full an error message will be displayed and then packets
+will silently drop.
+the actual capture file size is populate in the environment variable "pcapsize".
+
+Usage example:
+
+# Initialize pcap capture to physical address (0x100000) with maximum size of
+# 100000 bytes.
+
+# Start capture
+pcap start
+
+# Initialize network activity
+env set ipaddr 10.0.2.15; env set serverip 10.0.2.2; tftp uImage64
+
+# Stop capture
+pcap stop
+
+# pcap init 0x100000 100000
+PCAP capture initialized: addr: 0xffffffff80100000 max length: 100000
+
+# pcap start
+# env set ipaddr 10.0.2.15; env set serverip 10.0.2.2; tftp uImage64
+eth0@10000000: PHY present at 0
+eth0@10000000: link up, 1000Mbps full-duplex (lpa: 0x7c00)
+Using eth0@10000000 device
+TFTP from server 10.0.2.2; our IP address is 10.0.2.15
+Filename 'uImage64'.
+Load address: 0xffffffff88000000
+Loading: #################################################################
+         #################################################################
+         #################################################################
+         #################################################################
+!!! Buffer is full, consider increasing buffer size !!!
+         #################################################################
+         #################################################################
+         #################################################################
+         #################################################################
+         #################################################################
+         #
+         18.2 MiB/s
+done
+Bytes transferred = 8359376 (7f8dd0 hex)
+PCAP status:
+        Initialized addr: 0xffffffff80100000    max length: 100000
+        Status: Active.  file size: 99991
+        Incoming packets: 66 Outgoing packets: 67
+
+# pcap stop
+# tftpput 0xffffffff80100000 $pcapsize 10.0.2.2:capture.pcap
diff --git a/doc/README.power-framework b/doc/README.power-framework
new file mode 100644
index 00000000000..1f6fd432031
--- /dev/null
+++ b/doc/README.power-framework
@@ -0,0 +1,166 @@
+#
+# (C) Copyright 2014 Samsung Electronics
+# Lukasz Majewski <l.majewski@samsung.com>
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+Introduction
+------------
+
+This document describes the second version of the u-boot's PMIC (Power
+Management IC) framework. As a reference boards please consider Samsungs' Trats
+and Trats2.
+
+Background
+----------
+
+Boards supported by u-boot are getting increasingly complex. Developers and
+designers strive to cut down power consumption. Hence several different types of
+devices are now available on the board - namely power managers (PMIC), fuel
+gauges (FG), micro USB interface controllers (MUIC), batteries, multi-function
+devices (MFD).
+
+Explanation of key design decisions
+-----------------------------------
+
+One package can integrate PMIC and MUIC with different addresses on the I2C bus.
+The same device - e.g. MAX8997 uses two different I2C busses and addresses.
+
+Power devices use not only I2C for communication, but SPI as well. Additionally
+different ICs use different endianess. For this reason struct pmic holds
+information about I2C/SPI transmission, which is used with generic
+pmic_req_write() function.
+
+The "flat" hierarchy for power devices works well when each device performs only
+one operation - e.g. PMIC enables LDO.
+
+The problem emerges when we have a device (battery) which conceptually shall be
+the master and uses methods exported by other devices. We need to control MUIC
+to start charging the battery, use PMIC to reduce board's overall power
+consumption (by disabling not needed LDOs, BUCKs) and get current state of
+energy on the battery from FG.
+Up till now u-boot doesn't support device model, so a simple one had to be
+added.
+
+The directory hierarchy has following structure:
+./include/power/<device_name>_<device_function>.h
+e.g. ./include/power/max8997_pmic.h
+
+./drivers/power/pmic/power_{core files}.c
+e.g. ./drivers/power/pmic/power_core.c
+
+./drivers/power/pmic/<device_function>/<device_function>_<device_name>.c
+e.g. ./drivers/power/pmic/pmic_max8997.c
+e.g. ./drivers/power/battery/trats/bat_trats.c
+e.g. ./drivers/power/fuel_gauge/fg_max17042.c
+
+The framework classifies devices by their function - separate directories should
+be maintained for different classes of devices.
+
+Current design
+--------------
+
+Everything is a power device described by struct pmic. Even battery is
+considered as a valid power device. This helps for better management of those
+devices.
+
+- Block diagram of the hierarchy:
+			-----------------
+		--------| BAT           |------------
+		|       |               |           |
+		|       -----------------           |
+		|               |                   |
+	       \|/             \|/                 \|/
+	-----------     -----------------       ---------
+	|FG       |     |MUIC           |       |CHRG   |
+	|         |     |               |       |       |
+	-----------     -----------------       ---------
+
+
+1. When hierarchy is not needed (no complex battery charge):
+
+Definition of the struct pmic is only required with proper name and parameters
+for communication. This is enough to use the "pmic" command in the u-boot
+prompt to change values of device's register (enable/disable LDO, BUCK).
+
+The PG, MUIC and CHRG above are regarded to be in the same level in the
+hierarchy.
+
+2. Complex battery charging.
+
+To charge a battery, information from several "abstract" power devices is
+needed (defined at ./include/power/pmic.h):
+- FG device (struct power_fg):
+	     -- *fg_battery_check - check if battery is not above its limits
+	     -- *fg_battery_update - update the pmic framework with current
+				     battery state(voltage and current capacity)
+
+- Charger device (struct power_chrq):
+	     -- *chrg_type - type/capacity of the charger (including information
+			     about USB cable disconnection)
+	     -- *chrg_bat_present - detection if battery to be charged is
+				    present
+	     -- *chrg_state - status of the charger - if it is enabled or
+			      disabled
+
+- Battery device (struct power_battery):
+	     -- *battery_init - assign proper callbacks to be used by top
+				hierarchy battery device
+	     -- *battery_charge - called from "pmic" command, responsible
+				  for performing the charging
+
+Now two batteries are supported; trats and trats2 [*]. Those differ in the way
+how they handle the exact charging. Trats uses polling (MAX8997) and trats2
+relies on the PMIC/MUIC HW completely (MAX77693).
+
+__Example for trats (this can be very different for other board):__
+	     -- *fg_battery_check       -> FG device (fg_max17042.c)
+	     -- *fg_battery_update      -> FG device (fg_max17042.c)
+	     -- *chrg_type              -> MUIC device (muic_max8997.c)
+	     -- *chrg_bat_present       -> PMIC device (pmic_max8997.c)
+	     -- *chrg_state             -> PMIC device (pmic_max8997.c)
+	     -- *battery_init           -> BAT device (bat_trats.c)
+	     -- *battery_charge         -> BAT device (bat_trats.c)
+
+Also the struct pmic holds method (*low_power_mode) for reducing board's
+power consumption when one calls "pmic BAT_TRATS bat charge" command.
+
+How to add a new power device
+-----------------------------
+
+1. Simple device should be added with creation of file
+<pmic_function>_<pmic_name>.c, <pmic_name>_<pmic_function>.h  according to the
+proposed and described above scheme.
+
+Then "pmic" command supports reading/writing/dump of device's internal
+registers.
+
+2. Charging battery with hierarchy
+Define devices as listed at 1.
+
+Define battery file (bat_<board>.c). Please also note that one might need a
+corresponding battery model description for FG.
+
+For points 1 and 2 use a generic function power_init_board() to initialise the
+power framework on your board.
+
+For reference, please look into the trats/trats2 boards.
+
+TO DO list (for PMICv3) - up till v2014.04
+------------------------------------------
+
+1. Description of the devices related to power via device tree is not available.
+This is the main problem when a developer tries to build a multi-boot u-boot
+binary. The best would be to parse the DTS from Linux kernel.
+
+2. To support many instances of the same IC, like two MAX8997, one needs to
+copy the corresponding pmic_max8997.c file with changed name to "MAX8997_PMICX",
+where X is the device number. This problem will be addressed when extended
+pmic_core.c will support storing available devices in a list.
+
+3. Definition of batteries [*] (for trats/trats2) should be excluded from the
+code responsible for charging them and since it in fact describes the charging
+profile it should be put to a separate file.
+
+4. Adjust the framework to work with the device model.
diff --git a/doc/README.pxe b/doc/README.pxe
new file mode 100644
index 00000000000..172201093d0
--- /dev/null
+++ b/doc/README.pxe
@@ -0,0 +1,286 @@
+SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2010-2011 Calxeda, Inc.
+ */
+
+The 'pxe' commands provide a near subset of the functionality provided by
+the PXELINUX boot loader. This allows U-Boot based systems to be controlled
+remotely using the same PXE based techniques that many non U-Boot based servers
+use.
+
+Commands
+========
+
+pxe get
+-------
+     syntax: pxe get
+
+     follows PXELINUX's rules for retrieving configuration files from a tftp
+     server, and supports a subset of PXELINUX's config file syntax.
+
+     Environment
+     -----------
+     'pxe get' requires two environment variables to be set:
+
+     pxefile_addr_r - should be set to a location in RAM large enough to hold
+     pxe files while they're being processed. Up to 16 config files may be
+     held in memory at once. The exact number and size of the files varies with
+     how the system is being used. A typical config file is a few hundred bytes
+     long.
+
+     bootfile,serverip - these two are typically set in the DHCP response
+     handler, and correspond to fields in the DHCP response.
+
+     'pxe get' optionally supports these two environment variables being set:
+
+     ethaddr - this is the standard MAC address for the ethernet adapter in use.
+     'pxe get' uses it to look for a configuration file specific to a system's
+     MAC address.
+
+     pxeuuid - this is a UUID in standard form using lower case hexadecimal
+     digits, for example, 550e8400-e29b-41d4-a716-446655440000. 'pxe get' uses
+     it to look for a configuration file based on the system's UUID.
+
+     File Paths
+     ----------
+     'pxe get' repeatedly tries to download config files until it either
+     successfully downloads one or runs out of paths to try. The order and
+     contents of paths it tries mirrors exactly that of PXELINUX - you can
+     read in more detail about it at:
+
+     http://syslinux.zytor.com/wiki/index.php/Doc/pxelinux
+
+pxe boot
+--------
+     syntax: pxe boot [pxefile_addr_r]
+
+     Interprets a pxe file stored in memory.
+
+     pxefile_addr_r is an optional argument giving the location of the pxe file.
+     The file must be terminated with a NUL byte.
+
+     Environment
+     -----------
+     There are some environment variables that may need to be set, depending
+     on conditions.
+
+     pxefile_addr_r - if the optional argument pxefile_addr_r is not supplied,
+     an environment variable named pxefile_addr_r must be supplied. This is
+     typically the same value as is used for the 'pxe get' command.
+
+     bootfile - typically set in the DHCP response handler based on the
+     same field in the DHCP respone, this path is used to generate the base
+     directory that all other paths to files retrieved by 'pxe boot' will use.
+     If no bootfile is specified, paths used in pxe files will be used as is.
+
+     serverip - typically set in the DHCP response handler, this is the IP
+     address of the tftp server from which other files will be retrieved.
+
+     kernel_addr_r, initrd_addr_r - locations in RAM at which 'pxe boot' will
+     store the kernel(or FIT image) and initrd it retrieves from tftp. These
+     locations will be passed to the bootm command to boot the kernel. These
+     environment variables are required to be set.
+
+     fdt_addr_r - location in RAM at which 'pxe boot' will store the fdt blob it
+     retrieves from tftp. The retrieval is possible if 'fdt' label is defined in
+     pxe file and 'fdt_addr_r' is set. If retrieval is possible, 'fdt_addr_r'
+     will be passed to bootm command to boot the kernel.
+
+     fdt_addr - the location of a fdt blob. 'fdt_addr' will be passed to bootm
+     command if it is set and 'fdt_addr_r' is not passed to bootm command.
+
+     fdtoverlay_addr_r - location in RAM at which 'pxe boot' will temporarily store
+     fdt overlay(s) before applying them to the fdt blob stored at 'fdt_addr_r'.
+
+     pxe_label_override - override label to be used, if exists, instead of the
+     default label. This will allow consumers to choose a pxe label at
+     runtime instead of having to prompt the user. If "pxe_label_override" is set
+     but does not exist in the pxe menu, pxe would fallback to the default label if
+     given, and no failure is returned but rather a warning message.
+
+pxe file format
+===============
+The pxe file format is nearly a subset of the PXELINUX file format; see
+http://syslinux.zytor.com/wiki/index.php/PXELINUX. It's composed of one line
+commands - global commands, and commands specific to labels. Lines begining
+with # are treated as comments. White space between and at the beginning of
+lines is ignored.
+
+The size of pxe files and the number of labels is only limited by the amount
+of RAM available to U-Boot. Memory for labels is dynamically allocated as
+they're parsed, and memory for pxe files is statically allocated, and its
+location is given by the pxefile_addr_r environment variable. The pxe code is
+not aware of the size of the pxefile memory and will outgrow it if pxe files
+are too large.
+
+Supported global commands
+-------------------------
+Unrecognized commands are ignored.
+
+default <label>	    - the label named here is treated as the default and is
+		      the first label 'pxe boot' attempts to boot.
+
+menu title <string> - sets a title for the menu of labels being displayed.
+
+menu include <path> - use tftp to retrieve the pxe file at <path>, which
+		      is then immediately parsed as if the start of its
+		      contents were the next line in the current file. nesting
+		      of include up to 16 files deep is supported.
+
+prompt <flag>	    - if 1, always prompt the user to enter a label to boot
+		      from. if 0, only prompt the user if timeout expires.
+
+timeout <num>	    - wait for user input for <num>/10 seconds before
+		      auto-booting a node.
+
+label <name>	    - begin a label definition. labels continue until
+		      a command not recognized as a label command is seen,
+		      or EOF is reached.
+
+Supported label commands
+------------------------
+labels end when a command not recognized as a label command is reached, or EOF.
+
+menu default	    - set this label as the default label to boot; this is
+		      the same behavior as the global default command but
+		      specified in a different way
+
+kernel <path>	    - if this label is chosen, use tftp to retrieve the kernel
+		      (or FIT image) at <path>. it will be stored at the address
+		      indicated in the kernel_addr_r environment variable, and
+		      that address will be passed to bootm to boot this kernel.
+		      For FIT image, The configuration specification can be
+		      appended to the file name, with the format:
+		        <path>#<conf>[#<extra-conf[#...]]
+		      It will passed to bootm with that address.
+		      (see: doc/uImage.FIT/command_syntax_extensions.txt)
+		      It useful for overlay selection in pxe file
+		      (see: doc/uImage.FIT/overlay-fdt-boot.txt)
+
+fdtoverlays <path> [...] - if this label is chosen, use tftp to retrieve the DT
+                      overlay(s) at <path>. it will be temporarily stored at the
+                      address indicated in the fdtoverlay_addr_r environment variable,
+                      and then applied in the load order to the fdt blob stored at the
+                      address indicated in the fdt_addr_r environment variable.
+
+devicetree-overlay <path> [...] - if this label is chosen, use tftp to retrieve the DT
+                      overlay(s) at <path>. it will be temporarily stored at the
+                      address indicated in the fdtoverlay_addr_r environment variable,
+                      and then applied in the load order to the fdt blob stored at the
+                      address indicated in the fdt_addr_r environment variable.
+                      Alias for fdtoverlays.
+
+kaslrseed           - set this label to request random number from hwrng as kaslr seed.
+
+append <string>	    - use <string> as the kernel command line when booting this
+		      label.
+
+initrd <path>	    - if this label is chosen, use tftp to retrieve the initrd
+		      at <path>. it will be stored at the address indicated in
+		      the initrd_addr_r environment variable, and that address
+		      will be passed to bootm.
+		      For FIT image, the initrd can be provided with the same value than
+		      kernel, including configuration:
+		        <path>#<conf>[#<extra-conf[#...]]
+		      In this case, kernel_addr_r is passed to bootm.
+
+fdt <path>	    - if this label is chosen, use tftp to retrieve the fdt blob
+		      at <path>. it will be stored at the address indicated in
+		      the fdt_addr_r environment variable, and that address will
+		      be passed to bootm.
+		      For FIT image, the device tree can be provided with the same value
+		      than kernel, including configuration:
+		        <path>#<conf>[#<extra-conf[#...]]
+		      In this case, kernel_addr_r is passed to bootm.
+
+devicetree <path>   - if this label is chosen, use tftp to retrieve the fdt blob
+		      at <path>. it will be stored at the address indicated in
+		      the fdt_addr_r environment variable, and that address will
+		      be passed to bootm. Alias for fdt.
+
+fdtdir <path>	    - if this label is chosen, use tftp to retrieve a fdt blob
+		      relative to <path>. If the fdtfile environment variable
+		      is set, <path>/<fdtfile> is retrieved. Otherwise, the
+		      filename is generated from the soc and board environment
+		      variables, i.e. <path>/<soc>-<board>.dtb is retrieved.
+		      If the fdt command is specified, fdtdir is ignored.
+
+localboot <flag>    - Run the command defined by "localcmd" in the environment.
+		      <flag> is ignored and is only here to match the syntax of
+		      PXELINUX config files.
+
+Example
+-------
+Here's a couple of example files to show how this works.
+
+------------/tftpboot/pxelinux.cfg/menus/base.menu-----------
+menu title Linux selections
+
+# This is the default label
+label install
+	menu label Default Install Image
+	kernel kernels/install.bin
+	append console=ttyAMA0,38400 debug earlyprintk
+	initrd initrds/uzInitrdDebInstall
+
+# Just another label
+label linux-2.6.38
+	kernel kernels/linux-2.6.38.bin
+	append root=/dev/sdb1
+
+# The locally installed kernel
+label local
+	menu label Locally installed kernel
+	append root=/dev/sdb1
+	localboot 1
+-------------------------------------------------------------
+
+------------/tftpboot/pxelinux.cfg/default-------------------
+menu include pxelinux.cfg/menus/base.menu
+timeout 500
+
+default linux-2.6.38
+-------------------------------------------------------------
+
+When a pxe client retrieves and boots the default pxe file,
+'pxe boot' will wait for user input for 5 seconds before booting
+the linux-2.6.38 label, which will cause /tftpboot/kernels/linux-2.6.38.bin
+to be downloaded, and boot with the command line "root=/dev/sdb1"
+
+Differences with PXELINUX
+=========================
+The biggest difference between U-Boot's pxe and PXELINUX is that since
+U-Boot's pxe support is written entirely in C, it can run on any platform
+with network support in U-Boot. Here are some other differences between
+PXELINUX and U-Boot's pxe support.
+
+- U-Boot's pxe does not support the PXELINUX DHCP option codes specified
+  in RFC 5071, but could be extended to do so.
+
+- when U-Boot's pxe fails to boot, it will return control to U-Boot,
+  allowing another command to run, other U-Boot command, instead of resetting
+  the machine like PXELINUX.
+
+- U-Boot's pxe doesn't rely on or provide an UNDI/PXE stack in memory, it
+  only uses U-Boot.
+
+- U-Boot's pxe doesn't provide the full menu implementation that PXELINUX
+  does, only a simple text based menu using the commands described in
+  this README.	With PXELINUX, it's possible to have a graphical boot
+  menu, submenus, passwords, etc. U-Boot's pxe could be extended to support
+  a more robust menuing system like that of PXELINUX's.
+
+- U-Boot's pxe expects U-Boot uimg's as kernels.  Anything that would work
+  with the 'bootm' command in U-Boot could work with the 'pxe boot' command.
+
+- U-Boot's pxe only recognizes a single file on the initrd command line.  It
+  could be extended to support multiple.
+
+- in U-Boot's pxe, the localboot command doesn't necessarily cause a local
+  disk boot - it will do whatever is defined in the 'localcmd' env
+  variable. And since it doesn't support a full UNDI/PXE stack, the
+  type field is ignored.
+
+- the interactive prompt in U-Boot's pxe only allows you to choose a label
+  from the menu.  If you want to boot something not listed, you can ctrl+c
+  out of 'pxe boot' and use existing U-Boot commands to accomplish it.
diff --git a/doc/README.ramboot-ppc85xx b/doc/README.ramboot-ppc85xx
new file mode 100644
index 00000000000..c9fef533a5c
--- /dev/null
+++ b/doc/README.ramboot-ppc85xx
@@ -0,0 +1,102 @@
+			RAMBOOT for MPC85xx Platforms
+			==============================
+
+RAMBOOT literally means boot from DDR. But since DDR is volatile memory some
+pre-mechanism is required to load the DDR with the bootloader binary.
+- In case of SD and SPI boot this is done by BootROM code inside the chip
+  itself.
+- In case of NAND boot FCM supports loading initial 4K code from NAND flash
+  which can initialize the DDR and get the complete bootloader copied to DDR.
+
+In addition to the above there could be some more methods to initialize the DDR
+and load it manually.
+Two of them are described below.There is also an explanation as to where these
+methods could be handy.
+1. Load the RAM based bootloader onto DDR via JTAG/BDI interface. And then
+   execute the bootloader from DDR.
+   This may be handy in the following cases:
+     - In very early stage of platform bringup where other boot options are not
+       functional because of various reasons.
+     - In case the support to program the flashes on the board is not available.
+
+2. Load the RAM based bootloader onto DDR using already existing bootloader on
+   the board.And then execute the bootloader from DDR.
+   Some usecases where this may be used:
+      - While developing some new feature of u-boot, for example USB driver or
+	SPI driver.
+	Suppose the board already has a working bootloader on it. And you would
+	prefer to keep it intact, at the same time want to test your bootloader.
+	In this case you can get your test bootloader binary into DDR via tftp
+	for example. Then execute the test bootloader.
+     - Suppose a platform already has a propreitery bootloader which does not
+       support for example AMP boot. In this case also RAM boot loader can be
+       utilized.
+
+   So basically when the original bootloader is required to be kept intact
+   RAM based bootloader can offer an updated bootloader on the system.
+
+Both the above Bootloaders are slight variants of SDcard or SPI Flash
+bootloader or for that matter even NAND bootloader.
+All of them define CONFIG_SYS_RAMBOOT.
+The main difference among all of them is the way the pre-environment is getting
+configured and who is doing that.
+- In case of SD card and SPI flash bootloader this is done by On Chip BootROM inside the Si itself.
+- In case of NAND boot SPL/TPL code does it with some support from Si itself.
+- In case of the pure RAM based bootloaders we have to do it by JTAG manually or already existing bootloader.
+
+How to use them:
+1. Using JTAG
+   Boot up in core hold off mode or stop the core after reset using JTAG
+   interface.
+   Preconfigure DDR/L2SRAM through JTAG interface.
+	- setup DDR controller registers.
+	- setup DDR LAWs
+	- setup DDR TLB
+   Load the RAM based boot loader to the proper location in DDR/L2SRAM.
+   set up IAR (Instruction counter properly)
+   Enable the core to execute.
+
+2. Using already existing bootloader.
+   get the rambased boot loader binary into DDR/L2SRAM via tftp.
+   execute the RAM based bootloader.
+      => tftp 11000000 u-boot-ram.bin
+      => go 1107f000
+
+Please note that L2SRAM can also be used instead of DDR if the SOC has
+sufficient size of L2SRAM.
+
+Necessary Code changes Required:
+=====================================
+Please note that below mentioned changes are for 85xx platforms.
+They have been tested on P1020/P2020/P1010 RDB.
+
+The main difference between the above two methods from technical perspective is
+that in 1st case SOC is just out of reset so it is in default configuration.
+(CCSRBAR is at 0xff700000).
+In the 2nd case bootloader has already re-located CCSRBAR to 0xffe00000
+
+1. File name-> boards.cfg
+   There can be added specific Make options for RAMBoot. We can keep different
+   options for the two cases mentioned above.
+   for example
+   P1020RDB_JTAG_RAMBOOT and P1020RDB_GO_RAMBOOT.
+
+2. platform config file
+   for example include/configs/P1_P2_RDB.h
+
+   #ifdef CONFIG_RAMBOOT
+   #define CONFIG_SDCARD
+   #endif
+
+   This will finally use the CONFIG_SYS_RAMBOOT.
+
+3. Change CONFIG_SYS_CCSRBAR_DEFAULT in menuconfig accordingly.
+   In the section of the particular SOC, for example P1020, pseudo code
+
+   #if defined(CONFIG_GO)
+   #define CONFIG_SYS_CCSRBAR_DEFAULT	0xffe00000
+   #else
+   #define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000
+   #endif
+
+For JTAG  RAMBOOT this is not required because CCSRBAR is at ff700000.
diff --git a/doc/README.rockchip b/doc/README.rockchip
new file mode 100644
index 00000000000..84caff8a24d
--- /dev/null
+++ b/doc/README.rockchip
@@ -0,0 +1,684 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2015 Google. Inc
+# Written by Simon Glass <sjg@chromium.org>
+
+U-Boot on Rockchip
+==================
+
+A wide range of Rockchip SoCs are supported in mainline U-Boot
+
+Warning
+=======
+This document is being moved to doc/board/rockchip, so information on it
+might be incomplete or outdated.
+
+Prerequisites
+=============
+
+You will need:
+
+   - Firefly RK3288 board or something else with a supported RockChip SoC
+   - Power connection to 5V using the supplied micro-USB power cable
+   - Separate USB serial cable attached to your computer and the Firefly
+        (connect to the micro-USB connector below the logo)
+   - rkflashtool [3]
+   - openssl (sudo apt-get install openssl)
+   - Serial UART connection [4]
+   - Suitable ARM cross compiler, e.g.:
+        sudo apt-get install gcc-4.7-arm-linux-gnueabi
+
+Building
+========
+
+1. To build RK3288 board:
+
+   CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
+
+    (or you can use another cross compiler if you prefer)
+
+2. To build RK3308 board:
+
+   See doc/board/rockchip/rockchip.rst
+
+3. To build RK3399 board:
+
+   Option 1: Package the image with Rockchip miniloader:
+
+   - Compile U-Boot
+
+     => cd /path/to/u-boot
+     => make nanopi-neo4-rk3399_defconfig
+     => make
+
+   - Get the rkbin
+
+     => git clone https://github.com/rockchip-linux/rkbin.git
+
+   - Create trust.img
+
+     => cd /path/to/rkbin
+     => ./tools/trust_merger RKTRUST/RK3399TRUST.ini
+
+   - Create uboot.img
+
+     => cd /path/to/rkbin
+     => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img
+
+     (Get trust.img and uboot.img)
+
+   Option 2: Package the image with SPL:
+
+   - Export cross compiler path for aarch64
+
+   - Compile ATF
+
+     => git clone https://github.com/ARM-software/arm-trusted-firmware.git
+     => cd arm-trusted-firmware
+
+     (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-)
+     => make realclean
+     => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399
+
+    (export bl31.elf)
+    => export BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf
+
+   - Compile PMU M0 firmware
+
+     This is optional for most of the rk3399 boards.
+
+     => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git
+     => cd rk3399-cortex-m0
+
+     (export cross compiler path for Cortex-M0 PMU)
+     => make CROSS_COMPILE=arm-cortex_m0-eabi-
+
+     (export rk3399m0.bin)
+     => export PMUM0=/path/to/rk3399-cortex-m0/rk3399m0.bin
+
+   - Compile U-Boot
+
+     => cd /path/to/u-boot
+     => make orangepi-rk3399_defconfig
+     => make
+
+     (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get
+      spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL
+
+      If TPL enabled on the target, get tpl/u-boot-tpl-dtb.bin or tpl/u-boot-tpl.bin
+      if CONFIG_TPL_OF_CONTROL not enabled)
+
+Writing to the board with USB
+=============================
+
+For USB to work you must get your board into ROM boot mode, either by erasing
+your MMC or (perhaps) holding the recovery button when you boot the board.
+To erase your MMC, you can boot into Linux and type (as root)
+
+   dd if=/dev/zero of=/dev/mmcblk0 bs=1M
+
+Connect your board's OTG port to your computer.
+
+To create a suitable image and write it to the board:
+
+   ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
+	./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
+   cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
+
+If all goes well you should something like:
+
+   U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
+   Card did not respond to voltage select!
+   spl: mmc init failed with error: -17
+   ### ERROR ### Please RESET the board ###
+
+You will need to reset the board before each time you try. Yes, that's all
+it does so far. If support for the Rockchip USB protocol or DFU were added
+in SPL then we could in principle load U-Boot and boot to a prompt from USB
+as several other platforms do. However it does not seem to be possible to
+use the existing boot ROM code from SPL.
+
+
+Writing to the eMMC with USB on ROC-RK3308-CC
+=============================================
+For USB to work you must get your board into Bootrom mode,
+either by erasing the eMMC or short circuit the GND and D0
+on core board.
+
+Connect the board to your computer via tyepc.
+=> rkdeveloptool db rk3308_loader_v1.26.117.bin
+=> rkdeveloptool wl 0x40 idbloader.img
+=> rkdeveloptool wl 0x4000 u-boot.itb
+=> rkdeveloptool rd
+
+Then you will see the boot log from Debug UART at baud rate 1500000:
+DDR Version V1.26
+REGFB: 0x00000032, 0x00000032
+In
+589MHz
+DDR3
+ Col=10 Bank=8 Row=14 Size=256MB
+msch:1
+Returning to boot ROM...
+
+U-Boot SPL 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:04 +0800)
+Trying to boot from MMC1
+INFO:    Preloader serial: 2
+NOTICE:  BL31: v1.3(release):30f1405
+NOTICE:  BL31: Built : 17:08:28, Sep 23 2019
+INFO:    Lastlog: last=0x100000, realtime=0x102000, size=0x2000
+INFO:    ARM GICv2 driver initialized
+INFO:    Using opteed sec cpu_context!
+INFO:    boot cpu mask: 1
+INFO:    plat_rockchip_pmu_init: pd status 0xe b
+INFO:    BL31: Initializing runtime services
+WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will rK
+ERROR:   Error initializing runtime service opteed_fast
+INFO:    BL31: Preparing for EL3 exit to normal world
+INFO:    Entry point address = 0x600000
+INFO:    SPSR = 0x3c9
+
+
+U-Boot 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:47 +0800)
+
+Model: Firefly ROC-RK3308-CC board
+DRAM:  254 MiB
+MMC:   dwmmc@ff480000: 0, dwmmc@ff490000: 1
+rockchip_dnl_key_pressed read adc key val failed
+Net:   No ethernet found.
+Hit any key to stop autoboot:  0
+Card did not respond to voltage select!
+switch to partitions #0, OK
+mmc1(part 0) is current device
+Scanning mmc 1:4...
+Found /extlinux/extlinux.conf
+Retrieving file: /extlinux/extlinux.conf
+151 bytes read in 3 ms (48.8 KiB/s)
+1:      kernel-mainline
+Retrieving file: /Image
+14737920 bytes read in 377 ms (37.3 MiB/s)
+append: earlycon=uart8250,mmio32,0xff0c0000 console=ttyS2,1500000n8
+Retrieving file: /rk3308-roc-cc.dtb
+28954 bytes read in 4 ms (6.9 MiB/s)
+Flattened Device Tree blob at 01f00000
+Booting using the fdt blob at 0x1f00000
+## Loading Device Tree to 000000000df3a000, end 000000000df44119 ... OK
+
+Starting kernel ...
+[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd042]
+[    0.000000] Linux version 5.4.0-rc1-00040-g4dc2d508fa47-dirty (andy@B150) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-209
+[    0.000000] Machine model: Firefly ROC-RK3308-CC board
+[    0.000000] earlycon: uart8250 at MMIO32 0x00000000ff0c0000 (options '')
+[    0.000000] printk: bootconsole [uart8250] enabled
+
+Booting from an SD card
+=======================
+
+To write an image that boots from an SD card (assumed to be /dev/sdc):
+
+   ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
+	firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
+   sudo dd if=out of=/dev/sdc seek=64 && \
+   sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
+
+This puts the Rockchip header and SPL image first and then places the U-Boot
+image at block 16384 (i.e. 8MB from the start of the SD card). This
+corresponds with this setting in U-Boot:
+
+   #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x4000
+
+Put this SD (or micro-SD) card into your board and reset it. You should see
+something like:
+
+   U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
+
+   Model: Radxa Rock 2 Square
+   DRAM:  2 GiB
+   MMC:   dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
+   *** Warning - bad CRC, using default environment
+
+   In:    serial
+   Out:   vop@ff940000.vidconsole
+   Err:   serial
+   Net:   Net Initialization Skipped
+   No ethernet found.
+   Hit any key to stop autoboot:  0
+   =>
+
+The rockchip bootrom can load and boot an initial spl, then continue to
+load a second-stage bootloader (ie. U-Boot) as soon as the control is returned
+to the bootrom. Both the RK3288 and the RK3036 use this special boot sequence.
+The configuration option enabling this is:
+
+	CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
+
+You can create the image via the following operations:
+
+   ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
+	firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
+   cat firefly-rk3288/u-boot-dtb.bin >> out && \
+   sudo dd if=out of=/dev/sdc seek=64
+
+Or:
+   ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
+	firefly-rk3288/spl/u-boot-spl-dtb.bin:firefly-rk3288/u-boot-dtb.bin \
+	out && \
+   sudo dd if=out of=/dev/sdc seek=64
+
+If you have an HDMI cable attached you should see a video console.
+
+For evb_rk3036 board:
+	./evb-rk3036/tools/mkimage -n rk3036 -T rksd  -d evb-rk3036/spl/u-boot-spl.bin out && \
+	cat evb-rk3036/u-boot-dtb.bin >> out && \
+	sudo dd if=out of=/dev/sdc seek=64
+
+Or:
+	./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d \
+		evb-rk3036/spl/u-boot-spl.bin:evb-rk3036/u-boot-dtb.bin out && \
+	sudo dd if=out of=/dev/sdc seek=64
+
+Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
+      debug uart must be disabled
+
+
+Booting from an SD card on RK3288 with TPL
+==========================================
+
+Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add
+new SPL features like Falcon mode or etc.
+
+So introduce TPL so-that adding new features to SPL is possible because now TPL should
+run minimal with code like DDR, clock etc and rest of new features in SPL.
+
+As of now TPL is added on Vyasa-RK3288 board.
+
+To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
+
+    sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64 &&
+    sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384
+
+Booting from an SD card on RK3188
+=================================
+
+For rk3188 boards the general storage onto the card stays the same as
+described above, but the image creation needs a bit more care.
+
+The bootrom of rk3188 expects to find a small 1kb loader which returns
+control to the bootrom, after which it will load the real loader, which
+can then be up to 29kb in size and does the regular ddr init.  This is
+handled by a single image (built as the SPL stage) that tests whether
+it is handled for the first or second time via code executed from the
+boot0-hook.
+
+Additionally the rk3188 requires everything the bootrom loads to be
+rc4-encrypted. Except for the very first stage the bootrom always reads
+and decodes 2kb pages, so files should be sized accordingly.
+
+# copy tpl, pad to 1020 bytes and append spl
+tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out
+
+# truncate, encode and append u-boot.bin
+truncate -s %2048 u-boot.bin
+cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out
+
+Booting from an SD card on Pine64 Rock64 (RK3328)
+=================================================
+
+For Rock64 rk3328 board the following three parts are required:
+TPL, SPL, and the u-boot image tree blob.
+
+  - Write TPL/SPL image at 64 sector
+
+    => sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64
+
+  - Write u-boot image tree blob at 16384 sector
+
+    => sudo dd if=u-boot.itb of=/dev/mmcblk0 seek=16384
+
+Booting from an SD card on RK3399
+=================================
+
+To write an image that boots from an SD card (assumed to be /dev/sdc):
+
+Option 1: Package the image with Rockchip miniloader:
+
+  - Create idbloader.img
+
+    => cd /path/to/u-boot
+    => ./tools/mkimage  -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img
+    => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img
+
+  - Write idbloader.img at 64 sector
+
+    => sudo dd if=idbloader.img of=/dev/sdc seek=64
+
+  - Write trust.img at 24576
+
+    => sudo dd if=trust.img of=/dev/sdc seek=24576
+
+  - Write uboot.img at 16384 sector
+
+    => sudo dd if=uboot.img of=/dev/sdc seek=16384
+    => sync
+
+Put this SD (or micro-SD) card into your board and reset it. You should see
+something like:
+
+DDR Version 1.20 20190314
+In
+Channel 0: DDR3, 933MHz
+Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
+no stride
+ch 0 ddrconfig = 0x101, ddrsize = 0x20
+pmugrf_os_reg[2] = 0x10006281, stride = 0x17
+OUT
+Boot1: 2019-03-14, version: 1.19
+CPUId = 0x0
+ChipType = 0x10, 239
+mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
+mmc: ERROR: Card did not respond to voltage select!
+emmc reinit
+mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
+mmc: ERROR: Card did not respond to voltage select!
+emmc reinit
+mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
+mmc: ERROR: Card did not respond to voltage select!
+SdmmcInit=2 1
+mmc0:cmd5,20
+SdmmcInit=0 0
+BootCapSize=0
+UserCapSize=60543MB
+FwPartOffset=2000 , 0
+StorageInit ok = 45266
+SecureMode = 0
+SecureInit read PBA: 0x4
+SecureInit read PBA: 0x404
+SecureInit read PBA: 0x804
+SecureInit read PBA: 0xc04
+SecureInit read PBA: 0x1004
+SecureInit read PBA: 0x1404
+SecureInit read PBA: 0x1804
+SecureInit read PBA: 0x1c04
+SecureInit ret = 0, SecureMode = 0
+atags_set_bootdev: ret:(0)
+GPT 0x3380ec0 signature is wrong
+recovery gpt...
+GPT 0x3380ec0 signature is wrong
+recovery gpt fail!
+LoadTrust Addr:0x4000
+No find bl30.bin
+Load uboot, ReadLba = 2000
+hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35,
+
+Load OK, addr=0x200000, size=0x9c9c0
+RunBL31 0x10000
+NOTICE:  BL31: v1.3(debug):370ab80
+NOTICE:  BL31: Built : 09:23:41, Mar  4 2019
+NOTICE:  BL31: Rockchip release version: v1.1
+INFO:    GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
+INFO:    Using opteed sec cpu_context!
+INFO:    boot cpu mask: 0
+INFO:    plat_rockchip_pmu_init(1181): pd status 3e
+INFO:    BL31: Initializing runtime services
+INFO:    BL31: Initializing BL32
+INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec  7 06:11:20 UTC 2018 aarch64)
+
+INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
+
+INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
+INFO:    BL31: Preparing for EL3 exit to normal world
+INFO:    Entry point address = 0x200000
+INFO:    SPSR = 0x3c9
+
+
+U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530)
+
+Model: FriendlyARM NanoPi NEO4
+DRAM:  1022 MiB
+MMC:   dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
+Loading Environment from MMC... *** Warning - bad CRC, using default environment
+
+In:    serial@ff1a0000
+Out:   serial@ff1a0000
+Err:   serial@ff1a0000
+Model: FriendlyARM NanoPi NEO4
+Net:   eth0: ethernet@fe300000
+Hit any key to stop autoboot:  0
+=>
+
+Option 2: Package the image with SPL:
+
+  - Prefix rk3399 header to SPL image
+
+    => cd /path/to/u-boot
+    => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out
+
+  - Write prefixed SPL at 64th sector
+
+    => sudo dd if=out of=/dev/sdc seek=64
+
+  - Write U-Boot proper at 16384 sector
+
+    => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
+    => sync
+
+Put this SD (or micro-SD) card into your board and reset it. You should see
+something like:
+
+U-Boot SPL board init
+Trying to boot from MMC1
+
+
+U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530)
+
+Model: Orange Pi RK3399 Board
+DRAM:  2 GiB
+MMC:   dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
+Loading Environment from MMC... OK
+In:    serial@ff1a0000
+Out:   serial@ff1a0000
+Err:   serial@ff1a0000
+Model: Orange Pi RK3399 Board
+Net:   eth0: ethernet@fe300000
+Hit any key to stop autoboot:  0
+=>
+
+Option 3: Package the image with TPL:
+
+  - Write tpl+spl at 64th sector
+
+    => sudo dd if=idbloader.img of=/dev/sdc seek=64
+
+  - Write U-Boot proper at 16384 sector
+
+    => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
+    => sync
+
+Put this SD (or micro-SD) card into your board and reset it. You should see
+something like:
+
+U-Boot TPL board init
+Trying to boot from BOOTROM
+Returning to boot ROM...
+
+U-Boot SPL board init
+Trying to boot from MMC1
+
+
+U-Boot 2019.07-rc1-00241-g5b3244767a (May 08 2019 - 10:51:06 +0530)
+
+Model: Orange Pi RK3399 Board
+DRAM:  2 GiB
+MMC:   dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
+Loading Environment from MMC... OK
+In:    serial@ff1a0000
+Out:   serial@ff1a0000
+Err:   serial@ff1a0000
+Model: Orange Pi RK3399 Board
+Net:   eth0: ethernet@fe300000
+Hit any key to stop autoboot:  0
+=>
+
+Using fastboot on rk3288
+========================
+- Write GPT partition layout to mmc device which fastboot want to use it to
+store the image
+
+        => gpt write mmc 1 $partitions
+
+- Invoke fastboot command to prepare
+
+        => fastboot 1
+
+- Start fastboot request on PC
+
+        fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
+
+You should see something like:
+
+        => fastboot 1
+        WARNING: unknown variable: partition-type:loader
+        Starting download of 357796 bytes
+        ..
+        downloading of 357796 bytes finished
+        Flashing Raw Image
+        ........ wrote 357888 bytes to 'loader'
+
+Booting from SPI
+================
+
+To write an image that boots from SPI flash (e.g. for the Haier Chromebook or
+Bob):
+
+   ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
+	-d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
+   dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
+   cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
+   dd if=out.bin of=out.bin.pad bs=4M conv=sync
+
+This converts the SPL image to the required SPI format by adding the Rockchip
+header and skipping every second 2KB block. Then the U-Boot image is written at
+offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
+The position of U-Boot is controlled with this setting in U-Boot:
+
+   #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x20000
+
+If you have a Dediprog em100pro connected then you can write the image with:
+
+      sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
+
+When booting you should see something like:
+
+   U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
+
+
+   U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
+
+   Model: Google Jerry
+   DRAM:  2 GiB
+   MMC:
+   Using default environment
+
+   In:    serial@ff690000
+   Out:   serial@ff690000
+   Err:   serial@ff690000
+   =>
+
+Future work
+===========
+
+Immediate priorities are:
+
+- USB host
+- USB device
+- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
+- NAND flash
+- Boot U-Boot proper over USB OTG (at present only SPL works)
+
+
+Development Notes
+=================
+
+There are plenty of patches in the links below to help with this work.
+
+[1] https://github.com/rkchrome/uboot.git
+[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
+[3] https://github.com/linux-rockchip/rkflashtool.git
+[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
+
+rkimage
+-------
+
+rkimage.c produces an SPL image suitable for sending directly to the boot ROM
+over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
+followed by u-boot-spl-dtb.bin.
+
+The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
+starts at 0xff700000 and extends to 0xff718000 where we put the stack.
+
+rksd
+----
+
+rksd.c produces an image consisting of 32KB of empty space, a header and
+u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
+most of the fields are unused by U-Boot. We just need to specify the
+signature, a flag and the block offset and size of the SPL image.
+
+The header occupies a single block but we pad it out to 4 blocks. The header
+is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
+image can be encoded too but we don't do that.
+
+The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
+or 0x40 blocks. This is a severe and annoying limitation. There may be a way
+around this limitation, since there is plenty of SRAM, but at present the
+board refuses to boot if this limit is exceeded.
+
+The image produced is padded up to a block boundary (512 bytes). It should be
+written to the start of an SD card using dd.
+
+Since this image is set to load U-Boot from the SD card at block offset,
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
+u-boot-dtb.img to the SD card at that offset. See above for instructions.
+
+rkspi
+-----
+
+rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
+resulting image is then spread out so that only the first 2KB of each 4KB
+sector is used. The header is the same as with rksd and the maximum size is
+also 32KB (before spreading). The image should be written to the start of
+SPI flash.
+
+See above for instructions on how to write a SPI image.
+
+rkmux.py
+--------
+
+You can use this script to create #defines for SoC register access. See the
+script for usage.
+
+
+Device tree and driver model
+----------------------------
+
+Where possible driver model is used to provide a structure to the
+functionality. Device tree is used for configuration. However these have an
+overhead and in SPL with a 32KB size limit some shortcuts have been taken.
+In general all Rockchip drivers should use these features, with SPL-specific
+modifications where required.
+
+GPT partition layout
+----------------------------
+
+Rockchip use a unified GPT partition layout  in open source support.
+With this GPT partition layout, uboot can be compatilbe with other components,
+like miniloader, trusted-os, arm-trust-firmware.
+
+There are some documents about partitions in the links below.
+http://rockchip.wikidot.com/partitions
+
+--
+Jagan Teki <jagan@amarulasolutions.com>
+27 Mar 2019
+Simon Glass <sjg@chromium.org>
+24 June 2015
diff --git a/doc/README.rockusb b/doc/README.rockusb
new file mode 100644
index 00000000000..66437e17e46
--- /dev/null
+++ b/doc/README.rockusb
@@ -0,0 +1,56 @@
+Rockusb (Rockchip USB protocol)
+=====================================================
+
+Overview
+--------
+
+Rockusb protocol is widely used by Rockchip SoC based devices. It can
+read/write info, image to/from devices. This document briefly describes how to
+use Rockusb for upgrading firmware (e.g. kernel, u-boot, rootfs, etc.).
+
+Tools
+--------
+There are many tools can support Rockusb protocol. rkdeveloptool
+(https://github.com/rockchip-linux/rkdeveloptool) is open source,
+It is maintained by Rockchip. People don't want to build from source
+can download from here
+(https://github.com/rockchip-linux/rkbin/blob/master/tools/rkdeveloptool)
+
+Usage
+--------
+The Usage of Rockusb command is:
+
+rockusb <USB_controller> <devtype> <dev[:part]>
+
+e.g. rockusb 0 mmc 0
+
+On your U-Boot console, type this command to enter rockusb mode.
+On your host PC. use lsusb command. you should see a usb device
+using 0x2207 as its USB verdor id.
+
+for more detail about the rkdeveloptool. please read the usage.
+
+rkdeveloptool -h
+
+use rkdeveloptool wl command to write lba. BeginSec is the lba on device
+you want to write.
+
+sudo rkdeveloptool wl  <BeginSec> <File>
+
+to flash U-Boot image use below command. U-Boot binary is made by mkimage.
+see doc/README.rockchip for more detail about how to get U-Boot binary.
+
+sudo rkdeveloptool wl  64 <U-Boot binary>
+
+Current set of rkdeveloptool commands supported:
+- rci: Read Chip Info
+- rfi: Read Flash Id
+- rd : Reset Device
+- td : Test Device Ready
+- rl : Read blocks using LBA
+- wl : Write blocks using LBA
+- wlx: Write partition
+
+To do
+-----
+* Fully support Rockusb protocol
diff --git a/doc/README.s5p4418 b/doc/README.s5p4418
new file mode 100644
index 00000000000..8ec7b05fd26
--- /dev/null
+++ b/doc/README.s5p4418
@@ -0,0 +1,63 @@
+
+Summary
+=======
+
+This README is about U-Boot support for SAMSUNG's/NEXELL's ARM Cortex-A9 based
+S5P4418 SoC. It is based on FriendlyARM's U-Boot v2016.01 for the NanoPi2
+(and other) boards [1].
+
+Currently the following boards are supported:
+
+* FriendlyArm NanoPi2   [2]
+* FriendlyArm NanoPC-T2 [3]
+
+
+Build
+=====
+
+* NanoPi2 and NanoPC-T2
+
+make s5p4418_nanopi2_defconfig
+make
+
+
+Installation
+============
+
+- Download Official-ROMs-SDCard-20190718.7z from [4] (images files for android,
+  friendlyCore and LUbuntu)
+- Use s5p4418-sd-lubuntu-desktop-xenial-4.4-armhf-20190718.img to make a SD-card
+- Use dd in the directory where U-Boot has been built to update U-Boot:
+  (replace <SD-card> with the device used for the SD-card, e.g. sdc)
+  sudo dd seek=3841 if=u-boot.bin of=/dev/<SD-card>
+- Boot the board from this SD-card
+
+The source code for (the used?) LUbuntu 16.04 can be found at [5].
+
+
+Links
+=====
+
+[1] FriendlyArm U-Boot v2016.01:
+
+https://github.com/friendlyarm/u-boot/tree/nanopi2-v2016.01
+
+
+[2] NanoPi2:
+
+http://wiki.friendlyarm.com/wiki/index.php/NanoPi_2
+
+
+[3] NanoPC-T2:
+
+http://wiki.friendlyarm.com/wiki/index.php/NanoPC-T2
+
+
+[4] FriendlyArm image files for NanoPi2:
+
+http://download.friendlyarm.com//NanoPi2
+
+
+[5] FriendlyArm LUbuntu 16.04 Source Code for NanoPi2:
+
+https://github.com/friendlyarm/linux/tree/nanopi2-v4.4.y
diff --git a/doc/README.s5pc1xx b/doc/README.s5pc1xx
new file mode 100644
index 00000000000..ab1f02469c5
--- /dev/null
+++ b/doc/README.s5pc1xx
@@ -0,0 +1,72 @@
+
+Summary
+=======
+
+This README is about U-Boot support for SAMSUNG's ARM Cortex-A8 based S5PC1xx
+family of SoCs (S5PC100 [1] and S5PC110).
+
+Currently the following board is supported:
+
+* SMDKC100 [2]
+
+Toolchain
+=========
+
+While ARM Cortex-A8 support ARM v7 instruction set (-march=armv7a) we compile
+with -march=armv5 to allow more compilers to work. For U-Boot code this has
+no performance impact.
+
+Build
+=====
+
+* SMDKC100
+
+make smdkc100_config
+make
+
+
+Interfaces
+==========
+
+cpu
+
+To check SoC:
+
+	if (cpu_is_s5pc100())
+		printf("cpu is s5pc100\n");
+
+	or
+
+	if (cpu_is_s5pc110())
+		printf("cpu is s5pc110\n");
+
+gpio
+
+	struct s5pc100_gpio *gpio = (struct s5pc100_gpio*)S5PC100_GPIO_BASE;
+
+	/* GPA[0] pin set to irq */
+	gpio_cfg_pin(&gpio->gpio_a, 0, GPIO_IRQ);
+
+	/* GPA[0] pin set to input */
+	gpio_direction_input(&gpio->gpio_a, 0);
+
+	/* GPA[0] pin set to output/high */
+	gpio_direction_output(&gpio->gpio_a, 0, 1);
+
+	/* GPA[0] value set to low */
+	gpio_set_value(&gpio->gpio_a, 0, 0);
+
+	/* get GPA[0] value */
+	value = gpio_get_value(&gpio->gpio_a, 0);
+
+Links
+=====
+
+[1] S5PC100:
+
+http://www.samsung.com/global/business/semiconductor/productInfo.do?
+fmly_id=229&partnum=S5PC100
+
+[2] SMDKC100:
+
+http://meritech.co.kr/eng/products/product_view.php?num=28
diff --git a/doc/README.sata b/doc/README.sata
new file mode 100644
index 00000000000..b1104bbd3b9
--- /dev/null
+++ b/doc/README.sata
@@ -0,0 +1,68 @@
+1. SATA usage in U-Boot
+
+	There are two ways to operate the hard disk
+
+	* Read/write raw blocks from/to SATA hard disk
+	* ext2load to read a file from ext2 file system
+
+1.0 How to read the SATA hard disk's information?
+
+	=> sata info
+
+SATA device 0: Model: ST3320620AS Firm: 3.AAD Ser#:		4QF01ZTN
+	    Type: Hard Disk
+	    Supports 48-bit addressing
+	    Capacity: 305245.3 MB = 298.0 GB (625142448 x 512)
+
+1.1 How to raw write the kernel, file system, dtb to a SATA hard disk?
+
+	Notes: Hard disk sectors are normally 512 bytes, so
+		0x1000 sectors = 2 MBytes
+
+	write kernel
+	=> tftp 40000 /tftpboot/uImage.837x
+	=> sata write 40000 0 2000
+
+	write ramdisk
+	=> tftp 40000 /tftpboot/ramdisk.837x
+	=> sata write 40000 2000 8000
+
+	write dtb
+	=> tftp 40000 /tftpboot/mpc837xemds.dtb
+	=> sata write 40000 a000 1000
+
+1.2 How to raw read the kernel, file system, dtb from a SATA hard disk?
+
+	load kernel
+	=> sata read 200000 0 2000
+
+	load ramdisk
+	=> sata read 1000000 2000 8000
+
+	load dtb
+	=> sata read 2000000 a000 1000
+
+	boot
+	=> bootm 200000 1000000 2000000
+
+1.3 How to load an image from an ext2 file system in U-Boot?
+
+	U-Boot doesn't support writing to an ext2 file system, so the
+	files must be written by other means (e.g. linux).
+
+	=> ext2ls sata 0:1 /
+	<DIR>	    4096 .
+	<DIR>	    4096 ..
+	<DIR>	   16384 lost+found
+		 1352023 uImage.837x
+		 3646377 ramdisk.837x
+		   12288 mpc837xemds.dtb
+		      12 hello.txt
+
+	=> ext2load sata 0:1 200000 /uImage.837x
+
+	=> ext2load sata 0:1 1000000 /ramdisk.837x
+
+	=> ext2load sata 0:1 2000000 /mpc837xemds.dtb
+
+	=> bootm 200000 1000000 2000000
diff --git a/doc/README.sched b/doc/README.sched
new file mode 100644
index 00000000000..3aa89e6d392
--- /dev/null
+++ b/doc/README.sched
@@ -0,0 +1,53 @@
+Notes on the scheduler in sched.c:
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+  'sched.c' provides an very simplistic multi-threading scheduler.
+   See the example, function 'sched(...)', in the same file for its
+   API usage.
+
+   Until an exhaustive testing can be done, the implementation cannot
+   qualify as that of production quality. It works with the example
+   in 'sched.c', it may or may not work in other cases.
+
+
+Limitations:
+~~~~~~~~~~~~
+
+  - There are NO primitives for thread synchronization (locking,
+    notify etc).
+
+  - Only the GPRs and FPRs context is saved during a thread context
+    switch. Other registers on the PowerPC processor (60x, 7xx, 7xxx
+    etc) are NOT saved.
+
+  - The scheduler is NOT transparent to the user. The user
+    applications must invoke thread_yield() to allow other threads to
+    scheduler.
+
+  - There are NO priorities, and the scheduling policy is round-robin
+    based.
+
+  - There are NO capabilities to collect thread CPU usage, scheduler
+    stats, thread status etc.
+
+  - The semantics are somewhat based on those of pthreads, but NOT
+    the same.
+
+  - Only seven threads are allowed. These can be easily increased by
+    changing "#define MAX_THREADS" depending on the available memory.
+
+  - The stack size of each thread is 8KBytes. This can be easily
+    increased depending on the requirement and the available memory,
+    by increasing "#define STK_SIZE".
+
+  - Only one master/parent thread is allowed, and it cannot be
+    stopped or deleted. Any given thread is NOT allowed to stop or
+    delete itself.
+
+  - There NOT enough safety checks as are probably in the other
+    threads implementations.
+
+  - There is no parent-child relationship between threads. Only one
+    thread may thread_join, preferably the master/parent thread.
+
+(C) 2003 Arun Dharankar <ADharankar@ATTBI.Com>
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
new file mode 100644
index 00000000000..24a6c1be12e
--- /dev/null
+++ b/doc/README.scrapyard
@@ -0,0 +1,11 @@
+Over time, support for more and more boards gets added to U-Boot -
+while other board support code dies a silent death caused by
+negligence in combination with ordinary bitrot.  Sometimes this goes
+by unnoticed, but often build errors will result.  If nobody cares any
+more to resolve such problems, then the code is really dead and will
+be removed from the U-Boot source tree.  The remainders rest in peace
+in the imperishable depths of the git history.  Please use the tools
+git provides to read through this history.  A common example would be:
+$ git log -p --follow -- board/technexion/twister
+to see the history and changes made to the Technexion "twister" board
+from introduction to removal.
diff --git a/doc/README.serial_dt_baud b/doc/README.serial_dt_baud
new file mode 100644
index 00000000000..f8768d0e1bc
--- /dev/null
+++ b/doc/README.serial_dt_baud
@@ -0,0 +1,41 @@
+Fetch serial baudrate from DT
+-----------------------------
+
+To support fetching of baudrate from DT, the following is done:-
+
+The baudrate configured in Kconfig symbol CONFIG_BAUDRATE is taken by default by serial.
+If change of baudrate is required then the Kconfig symbol CONFIG_BAUDRATE needs to
+changed and U-Boot recompilation is required or the U-Boot environment needs to be updated.
+
+To avoid this, add support to fetch the baudrate directly from the device tree file and
+update the environment.
+
+The default environment stores the default baudrate value. When default baudrate and dtb
+baudrate are not same glitches are seen on the serial.
+So, the environment also needs to be updated with the dtb baudrate to avoid the glitches on
+the serial which is enabled by OF_SERIAL_BAUD.
+
+The Kconfig SPL_ENV_SUPPORT needs to be enabled to allow patching in SPL.
+
+The Kconfig DEFAULT_ENV_IS_RW which is enabled by OF_SERIAL_BAUD with making the environment
+writable.
+
+The ofnode_read_baud() function parses and fetches the baudrate value from the DT. This value
+is validated and updated to baudrate during serial init. Padding is added at the end of the
+default environment and the dt baudrate is updated with the latest value.
+
+Example:-
+
+The serial port options are of the form "bbbbpnf", where "bbbb" is the baud rate, "p" is parity ("n", "o", or "e"),
+"n" is number of bits, and "f" is flow control ("r" for RTS or omit it). Default is "115200n8".
+
+chosen {
+		bootargs = "earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/ram0 rw init_fatal_sh=1";
+		stdout-path = "serial0:115200n8";
+	};
+
+From the chosen node, stdout-path property is obtained as string.
+
+	stdout-path = "serial0:115200n8";
+
+The string is parsed to get the baudrate 115200. This string is converted to integer and updated to the environment.
diff --git a/doc/README.serial_multi b/doc/README.serial_multi
new file mode 100644
index 00000000000..0446fe95937
--- /dev/null
+++ b/doc/README.serial_multi
@@ -0,0 +1,54 @@
+The support for multiple serial interfaces as implemented is mainly
+intended to allow for modem dial-in / dial-out while still being able
+to use a serial console on a (different) serial port.
+
+MPC8XX Specific
+===============
+At the moment, the ports must be split on a SMC and a SCC port  on  a
+8xx processor; other configurations are not (yet) supported.
+
+Support for hardware handshake has not been implemented yet (but is
+in the works).
+
+*) The default console depends on the keys pressed:
+	- SMC if keys not pressed (modem not enabled)
+	- SCC if keys pressed (modem enabled)
+
+*) The console can be switched to SCC by any of the following commands:
+
+	setenv stdout serial_scc
+	setenv stdin serial_scc
+	setenv stderr serial_scc
+
+*) The console can be switched to SMC by any of the following commands:
+
+	setenv stdout serial_smc
+	setenv stdin serial_smc
+	setenv stderr serial_smc
+
+*) If a file descriptor is set to "serial" then the current serial device
+will be used which, in turn, can be switched by above commands.
+
+*) The baudrate is the same for all serial devices. But it can be switched
+just after switching the console:
+
+	setenv sout serial_scc; setenv baudrate 38400
+
+After that press 'enter' at the SCC console. Note that baudrates <38400
+are not allowed on LWMON with watchdog enabled (see CFG_SYS_BAUDRATE_TABLE in
+include/configs/lwmon.h).
+
+
+PPC4XX Specific
+===============
+*) The default console is UART0
+
+*) The console can be switched to UART1 by any of the following commands:
+	setenv stdout serial1
+	setenv stderr serial1
+	setenv stdin serial1
+
+*) The console can be switched to UART0 by any of the following commands:
+	setenv stdout serial0
+	setenv stderr serial0
+	setenv stdin serial0
diff --git a/doc/README.silent b/doc/README.silent
new file mode 100644
index 00000000000..00288e03b01
--- /dev/null
+++ b/doc/README.silent
@@ -0,0 +1,28 @@
+The config option CONFIG_SILENT_CONSOLE can be used to quiet messages
+on the console.  If the option has been enabled, the output can be
+silenced by setting the environment variable "silent".
+
+- CONFIG_SILENT_CONSOLE_UPDATE_ON_SET
+	When the "silent" variable is changed with env set, the change
+	will take effect immediately.
+
+- CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC
+	Some environments are not available until relocation (e.g. NAND)
+	so this will make the value in the flash env take effect at
+	relocation.
+
+The following actions are taken if "silent" is set at boot time:
+
+ - Until the console devices have been initialized, output has to be
+   suppressed by testing for the flag "GD_FLG_SILENT" in "gd->flags".
+
+ - When the console devices have been initialized, "stdout" and
+   "stderr" are set to "nulldev", so subsequent messages are
+   suppressed automatically. Make sure to enable "nulldev" by
+   enabling CONFIG_SYS_DEVICE_NULLDEV in your board defconfig file.
+
+ - When booting a linux kernel, the "bootargs" are fixed up so that
+   the argument "console=" will be in the command line, no matter how
+   it was set in "bootargs" before. If you don't want the linux command
+   line to be affected, define CONFIG_SILENT_U_BOOT_ONLY in your board
+   config file as well, and this part of the feature will be disabled.
diff --git a/doc/README.socfpga b/doc/README.socfpga
new file mode 100644
index 00000000000..e5adb62102b
--- /dev/null
+++ b/doc/README.socfpga
@@ -0,0 +1,168 @@
+----------------------------------------
+SOCFPGA Documentation for U-Boot and SPL
+----------------------------------------
+
+This README is about U-Boot and SPL support for Altera's ARM Cortex-A9MPCore
+based SOCFPGA. To know more about the hardware itself, please refer to
+www.altera.com.
+
+---------------------------------------------------------------------
+Cyclone 5 / Arria 5 generating the handoff header files for U-Boot SPL
+---------------------------------------------------------------------
+
+This text is assuming quartus 16.1, but newer versions will probably work just fine too;
+verified with DE1_SOC_Linux_FB demo project (https://github.com/VCTLabs/DE1_SOC_Linux_FB).
+Updated/working projects should build using either process below.
+
+Note: it *should* work from Quartus 14.0.200 onwards, however, the current vendor demo
+projects must have the IP cores updated as shown below.
+
+Rebuilding your Quartus project
+-------------------------------
+
+Choose one of the follwing methods, either command line or GUI.
+
+Using the command line
+~~~~~~~~~~~~~~~~~~~~~~
+
+First run the embedded command shell, using your path to the Quartus install:
+
+  $ /path/to/intelFPGA/16.1/embedded/embedded_command_shell.sh
+
+Then (if necessary) update the IP cores in the project, generate HDL code, and
+build the project:
+
+  $ cd path/to/project/dir
+  $ qsys-generate soc_system.qsys --upgrade-ip-cores
+  $ qsys-generate soc_system.qsys --synthesis=[VERILOG|VHDL]
+  $ quartus_sh --flow compile <project name>
+
+Convert the resulting .sof file (SRAM object file) to .rbf file (Raw bit file):
+
+  $ quartus_cpf -c <project_name>.sof soc_system.rbf
+
+
+Generate BSP handoff files
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+You can run the bsp editor GUI below, or run the following command from the
+project directory:
+
+  $ /path/to/bsb/tools/bsp-create-settings --type spl --bsp-dir build \
+      --preloader-settings-dir hps_isw_handoff/soc_system_hps_0/ \
+      --settings build/settings.bsp
+
+You should use the bsp "build" directory above (ie, where the settings.bsp file is)
+in the following u-boot command to update the board headers.  Once these headers
+are updated for a given project build, u-boot should be configured for the
+project board (eg, de0-nano-sockit) and then build the normal spl build.
+
+Now you can skip the GUI section.
+
+
+Using the Qsys GUI
+~~~~~~~~~~~~~~~~~~
+
+1. Navigate to your project directory
+2. Run Quartus II
+3. Open Project (Ctrl+J), select <project_name>.qpf
+4. Run QSys [Tools->QSys]
+  4.1 In the Open dialog, select '<project_name>.qsys'
+  4.2 In the Open System dialog, wait until completion and press 'Close'
+  4.3 In the Qsys window, click on 'Generate HDL...' in bottom right corner
+     4.3.1 In the 'Generation' window, click 'Generate'
+     4.3.2 In the 'Generate' dialog, wait until completion and click 'Close'
+  4.4 In the QSys window, click 'Finish'
+     4.4.1 In the 'Quartus II' pop up window, click 'OK'
+5. Back in Quartus II main window, do the following
+  5.1 Use Processing -> Start -> Start Analysis & Synthesis (Ctrl+K)
+  5.2 Use Processing -> Start Compilation (Ctrl+L)
+
+    ... this may take some time, have patience ...
+
+6. Start the embedded command shell as shown in the previous section
+  6.1 Change directory to 'software/spl_bsp'
+  6.2 Prepare BSP by launching the BSP editor from ECS
+       => bsp-editor
+  6.3 In BSP editor
+      6.3.1 Use File -> Open
+      6.3.2 Select 'settings.bsp' file
+      6.3.3 Click Generate
+      6.3.4 Click Exit
+
+
+Post handoff generation
+~~~~~~~~~~~~~~~~~~~~~~~
+
+Now that the handoff files are generated, U-Boot can be used to process
+the handoff files generated by the bsp-editor. For this, please use the
+following script from the u-boot source tree:
+
+  $ ./arch/arm/mach-socfpga/qts-filter.sh \
+        <soc_type> \
+        <input_qts_dir> \
+        <input_bsp_dir> \
+        <output_dir>
+
+Process QTS-generated files into U-Boot compatible ones.
+
+    soc_type      - Type of SoC, either 'cyclone5' or 'arria5'.
+    input_qts_dir - Directory with compiled Quartus project
+                    and containing the Quartus project file (QPF).
+    input_bsp_dir - Directory with generated bsp containing
+                    the settings.bsp file.
+    output_dir    - Directory to store the U-Boot compatible
+                    headers.
+
+This will generate (or update) the following 4 files:
+
+  iocsr_config.h
+  pinmux_config.h
+  pll_config.h
+  sdram_config.h
+
+These files should be copied into "qts" directory in the board directory
+(see output argument of qts-filter.sh command above).
+
+Here is an example for the DE-0 Nano SoC after the above rebuild process:
+
+  $ ll board/terasic/de0-nano-soc/qts/
+  total 36
+  -rw-r--r-- 1 sarnold sarnold 8826 Mar 21 18:11 iocsr_config.h
+  -rw-r--r-- 1 sarnold sarnold 4398 Mar 21 18:11 pinmux_config.h
+  -rw-r--r-- 1 sarnold sarnold 3190 Mar 21 18:11 pll_config.h
+  -rw-r--r-- 1 sarnold sarnold 9022 Mar 21 18:11 sdram_config.h
+
+Note: file sizes will differ slightly depending on the selected board.
+
+Now your board is ready for full mainline support including U-Boot SPL.
+The Preloader will not be needed any more.
+
+----------------------------------------------------------
+Arria 10 generating the handoff header files for U-Boot SPL
+----------------------------------------------------------
+
+A header file for inclusion in a devicetree for Arria10 can be generated
+by the qts-filter-a10.sh script directly from the hps_isw_handoff/hps.xml
+file generated during the FPGA project compilation.  The header contains
+all PLL, clock, pinmux, and bridge configurations required.
+
+Please look at the socfpga_arria10_socdk_sdmmc-u-boot.dtsi for an example
+that includes use of the generated handoff header.
+
+Devicetree header generation
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The qts-filter-a10.sh script can process the compile time genetated hps.xml
+to create the appropriate devicetree header.
+
+
+  $ ./arch/arm/mach-socfpga/qts-filter-a10.sh \
+        <hps_xml> \
+        <output_file>
+
+    hps_xml      - hps_isw_handoff/hps.xml from Quartus project
+    output_file  - Output filename and location for header file
+
+The script generates a single header file names <output_file> that should
+be placed in arch/arm/dts.
diff --git a/doc/README.splashprepare b/doc/README.splashprepare
new file mode 100644
index 00000000000..3cb5b5aeb48
--- /dev/null
+++ b/doc/README.splashprepare
@@ -0,0 +1,34 @@
+---------------------------------------------------------------------
+Splash Screen
+---------------------------------------------------------------------
+The splash_screen_prepare() function is a weak function defined in
+common/splash.c. It is called as part of the splash screen display
+sequence. It gives the board an opportunity to prepare the splash
+image data before it is processed and sent to the frame buffer by
+U-Boot. Define your own version to use this feature.
+
+CONFIG_SPLASH_SOURCE
+
+Use the splash_source.c library. This library provides facilities to declare
+board specific splash image locations, routines for loading splash image from
+supported locations, and a way of controlling the selected splash location
+using the "splashsource" environment variable.
+
+splashsource works as follows:
+- If splashsource is set to a supported location name as defined by board code,
+  use that splash location.
+- If splashsource is undefined, use the first splash location as default.
+- If splashsource is set to an unsupported value, do not load a splash screen.
+
+A splash source location can describe either storage with raw data, a storage
+formatted with a file system or a FIT image. In case of a filesystem, the splash
+screen data is loaded as a file. The name of the splash screen file can be
+controlled with the environment variable "splashfile".
+
+To enable loading the splash image from a FIT image, CONFIG_FIT must be
+enabled. The FIT image has to start at the 'offset' field address in the
+selected splash location. The name of splash image within the FIT shall be
+specified by the environment variable "splashfile".
+
+In case the environment variable "splashfile" is not defined the default name
+'splash.bmp' will be used.
diff --git a/doc/README.srio-pcie-boot-corenet b/doc/README.srio-pcie-boot-corenet
new file mode 100644
index 00000000000..2b1f76b8d02
--- /dev/null
+++ b/doc/README.srio-pcie-boot-corenet
@@ -0,0 +1,118 @@
+---------------------------------------
+SRIO and PCIE Boot on Corenet Platforms
+---------------------------------------
+
+For some PowerPC processors with SRIO or PCIE interface, boot location can be
+configured to SRIO or PCIE by RCW. The processor booting from SRIO or PCIE can
+do without flash for u-boot image, ucode and ENV. All the images can be fetched
+from another processor's memory space by SRIO or PCIE link connected between
+them.
+
+This document describes the processes based on an example implemented on P4080DS
+platforms and a RCW example with boot from SRIO or PCIE configuration.
+
+Environment of the SRIO or PCIE boot:
+	a) Master and slave can be SOCs in one board or SOCs in separate boards.
+	b) They are connected with SRIO or PCIE links, whether 1x, 2x or 4x, and
+	   directly or through switch system.
+	c) Only Master has NorFlash for booting, and all the Master's and Slave's
+	   U-Boot images, UCodes will be stored in this flash.
+	d) Slave has its own EEPROM for RCW and PBI.
+	e) Slave's RCW should configure the SerDes for SRIO or PCIE boot port, set
+	   the boot location to SRIO or PCIE, and holdoff all the cores.
+
+	-----------       -----------             -----------
+	|         |       |         |             |         |
+	|         |       |         |             |         |
+	| NorFlash|<----->| Master  |SRIO or PCIE |  Slave  |<---->[EEPROM]
+	|         |       |         |<===========>|         |
+	|         |       |         |             |         |
+	-----------       -----------             -----------
+
+The example based on P4080DS platform:
+	Two P4080DS platforms can be used to implement the boot from SRIO or PCIE.
+	Their SRIO or PCIE ports 1 will be connected directly and will be used for
+	the boot from SRIO or PCIE.
+
+	1. Slave's RCW example for boot from SRIO port 1 and all cores in holdoff.
+		00000000: aa55 aa55 010e 0100 0c58 0000 0000 0000
+		00000010: 1818 1818 0000 8888 7440 4000 0000 2000
+		00000020: f440 0000 0100 0000 0000 0000 0000 0000
+		00000030: 0000 0000 0083 0000 0000 0000 0000 0000
+		00000040: 0000 0000 0000 0000 0813 8040 063c 778f
+
+	2. Slave's RCW example for boot from PCIE port 1 and all cores in holdoff.
+		00000000: aa55 aa55 010e 0100 0c58 0000 0000 0000
+		00000010: 1818 1818 0000 8888 1440 4000 0000 2000
+		00000020: f040 0000 0100 0000 0020 0000 0000 0000
+		00000030: 0000 0000 0083 0000 0000 0000 0000 0000
+		00000040: 0000 0000 0000 0000 0813 8040 547e ffc9
+
+	3. Sequence in Step by Step.
+		a) Update RCW for slave with boot from SRIO or PCIE port 1 configuration.
+		b) Program slave's U-Boot image, UCode, and ENV parameters into master's
+		   NorFlash.
+		c) Set environment variable "bootmaster" to "SRIO1" or "PCIE1" and save
+		   environment for master.
+					setenv bootmaster SRIO1
+				or
+					setenv bootmaster PCIE1
+					saveenv
+		d) Restart up master and it will boot up normally from its NorFlash.
+		   Then, it will finish necessary configurations for slave's boot from
+		   SRIO or PCIE port 1.
+		e) Master will set inbound SRIO or PCIE windows covered slave's U-Boot
+		   image stored in master's NorFlash.
+		f) Master will set an inbound SRIO or PCIE window covered slave's UCode
+		   and ENV stored in master's NorFlash.
+		g) Master will set outbound SRIO or PCIE  windows in order to configure
+		   slave's registers for the core's releasing.
+		h) Since all cores of slave in holdoff, slave should be powered on before
+		   all the above master's steps, and wait to be released by master. In the
+		   startup phase of the slave from SRIO or PCIE, it will finish some
+		   necessary configurations.
+		i) Slave will set a specific TLB entry for the boot process.
+		j) Slave will set a LAW entry with the TargetID SRIO or PCIE port 1 for
+		   the boot.
+		k) Slave will set a specific TLB entry in order to fetch UCode and ENV
+		   from master.
+		l) Slave will set a LAW entry with the TargetID SRIO or PCIE port 1 for
+		   UCode and ENV.
+
+How to use this feature:
+	To use this feature, you need to focus those points.
+
+	1. Slave's RCW with SRIO or PCIE boot configurations, and all cores in holdoff
+	   configurations.
+	   Please refer to the examples given above.
+
+	2. U-Boot image's compilation.
+	   For master, U-Boot image should be generated normally.
+
+	   For example, master U-Boot image used on P4080DS should be compiled with
+
+				make P4080DS_config.
+
+	   For slave, U-Boot image should be generated specifically by
+
+				make xxxx_SRIO_PCIE_BOOT_config.
+
+	   For example, slave U-Boot image used on P4080DS should be compiled with
+
+				make P4080DS_SRIO_PCIE_BOOT_config.
+
+	3. Necessary modifications based on a specific environment.
+	   For a specific environment, the addresses of the slave's U-Boot image,
+	   UCode, ENV stored in master's NorFlash, and any other configurations
+	   can be modified in the file:
+				include/configs/corenet_ds.h.
+
+	4. Set and save the environment variable "bootmaster" with "SRIO1", "SRIO2"
+	   or "PCIE1", "PCIE2", "PCIE3" for master, and then restart it in order to
+	   perform the role as a master for boot from SRIO or PCIE.
+
+NOTE: When the Slave's ENV parameters are stored in Master's NorFlash,
+      it can fetch them through PCIE or SRIO interface. But the ENV
+      parameters can not be modified by "saveenv" or other commands under
+      the Slave's u-boot environment, because the Slave can not erase,
+      write Master's NorFlash by PCIE or SRIO link.
diff --git a/doc/README.standalone b/doc/README.standalone
new file mode 100644
index 00000000000..3306c300cf9
--- /dev/null
+++ b/doc/README.standalone
@@ -0,0 +1,119 @@
+Design Notes on Exporting U-Boot Functions to Standalone Applications:
+======================================================================
+
+1. The functions are exported by U-Boot via a jump table. The jump
+   table is allocated and initialized in the jumptable_init() routine
+   (common/exports.c). Other routines may also modify the jump table,
+   however. The jump table can be accessed as the 'jt' field of the
+   'global_data' structure. The struct members for the jump table are
+   defined in the <include/exports.h> header. E.g., to substitute the
+   malloc() and free() functions that will be available to standalone
+   applications, one should do the following:
+
+	DECLARE_GLOBAL_DATA_PTR;
+
+	gd->jt->malloc	= my_malloc;
+	gd->jt->free = my_free;
+
+   Note that the pointers to the functions are real function pointers
+   so the compiler can perform type checks on these assignments.
+
+2. The pointer to the jump table is passed to the application in a
+   machine-dependent way. PowerPC, ARM, MIPS, Blackfin and Nios II
+   architectures use a dedicated register to hold the pointer to the
+   'global_data' structure: r2 on PowerPC, r9 on ARM, k0 on MIPS,
+   P3 on Blackfin and gp on Nios II. The x86 architecture does not
+   use such a register; instead, the pointer to the 'global_data'
+   structure is passed as 'argv[-1]' pointer.
+
+   The application can access the 'global_data' structure in the same
+   way as U-Boot does:
+
+	DECLARE_GLOBAL_DATA_PTR;
+
+	printf("U-Boot relocation offset: %x\n", gd->reloc_off);
+
+3. The application should call the app_startup() function before any
+   call to the exported functions. Also, implementor of the
+   application may want to check the version of the ABI provided by
+   U-Boot. To facilitate this, a get_version() function is exported
+   that returns the ABI version of the running U-Boot. I.e., a
+   typical application startup may look like this:
+
+	int my_app (int argc, char *const argv[])
+	{
+		app_startup (argv);
+		if (get_version () != XF_VERSION)
+			return 1;
+	}
+
+4. The default load and start addresses of the applications are as
+   follows:
+
+			Load address	Start address
+	x86		0x00040000	0x00040000
+	PowerPC		0x00040000	0x00040004
+	ARM		0x0c100000	0x0c100000
+	MIPS		0x80200000	0x80200000
+	Blackfin	0x00001000	0x00001000
+	Nios II		0x02000000	0x02000000
+	RISC-V		0x00600000	0x00600000
+
+   For example, the "hello world" application may be loaded and
+   executed on a PowerPC board with the following commands:
+
+   => tftp 0x40000 hello_world.bin
+   => go 0x40004
+
+5. To export some additional function long foobar(int i,char c), the following steps
+   should be undertaken:
+
+   - Append the following line at the end of the include/_exports.h
+     file:
+
+	EXPORT_FUNC(foobar, long, foobar, int, char)
+
+	Parameters to EXPORT_FUNC:
+	 - the first parameter is the function that is exported (default implementation)
+	 - the second parameter is the return value type
+	 - the third  parameter is the name of the member in struct jt_funcs
+	   this is also the name that the standalone application will used.
+	   the rest of the parameters are the function arguments
+
+   - Add the prototype for this function to the include/exports.h
+     file:
+
+	long foobar(int i, char c);
+
+	Initialization with the default implementation is done in jumptable_init()
+
+	You can override the default implementation using:
+
+	gd->jt->foobar = another_foobar;
+
+	The signature of another_foobar must then match the declaration of foobar.
+
+   - Increase the XF_VERSION value by one in the include/exports.h
+     file
+
+   - If you want to export a function which depends on a CONFIG_XXX
+	use 2 lines like this:
+	#ifdef CONFIG_FOOBAR
+		EXPORT_FUNC(foobar, long, foobar, int, char)
+	#else
+		EXPORT_FUNC(dummy, void, foobar, void)
+	#endif
+
+
+6. The code for exporting the U-Boot functions to applications is
+   mostly machine-independent. The only places written in assembly
+   language are stub functions that perform the jump through the jump
+   table. That said, to port this code to a new architecture, the
+   only thing to be provided is the code in the examples/stubs.c
+   file. If this architecture, however, uses some uncommon method of
+   passing the 'global_data' pointer (like x86 does), one should add
+   the respective code to the app_startup() function in that file.
+
+   Note that these functions may only use call-clobbered registers;
+   those registers that are used to pass the function's arguments,
+   the stack contents and the return address should be left intact.
diff --git a/doc/README.t1040-l2switch b/doc/README.t1040-l2switch
new file mode 100644
index 00000000000..6f03de239e6
--- /dev/null
+++ b/doc/README.t1040-l2switch
@@ -0,0 +1,63 @@
+This file contains information for VSC9953, a Vitesse L2 Switch IP
+which is integrated in the T1040/T1020 Freescale SoCs.
+
+About Device:
+=============
+VSC9953 is an 8-port Gigabit Ethernet switch supports the following features:
+	-	8192 MAC addresses
+	-	Static Address provisioning
+	-	Dynamic learning of MAC addresses and aging
+	-	4096 VLANs
+	-	Independent and shared VLAN learning (IVL, SVL)
+	-	Policing with storm control and MC/BC protection
+	-	IPv4 and IPv6 multicast
+	-	Jumbo frames (9.6 KB)
+	-	Access Control List
+	-	VLAN editing, translation and remarking
+	-	RMON counters per port
+
+Switch interfaces:
+	-	8 Gigabit switch ports (ports 0 to 7) are external and are connected to external PHYs
+	-	2 switch ports (ports 8 and 9) of 2.5 G are connected (fixed links)
+		to FMan ports (FM1@DTSEC1 and FM1@DTSEC2)
+
+Commands Overview:
+=============
+Commands supported
+	- enable/disable a port or show its configuration (speed, duplexity, status, etc.)
+	- port statistics
+	- MAC learning
+	- add/remove FDB entries
+	- Port-based VLAN
+	- Private/Shared VLAN learning
+	- VLAN ingress filtering
+	- Port LAG
+
+Commands syntax
+ethsw [port <port_no>] { enable | disable | show } - enable/disable a port; show a port's configuration
+ethsw [port <port_no>] statistics { [help] | [clear] } - show an l2 switch port's statistics
+ethsw [port <port_no>] learning { [help] | show | auto | disable } - enable/disable/show learning configuration on a port
+ethsw [port <port_no>] [vlan <vid>] fdb { [help] | show | flush | { add | del } <mac> } - add/delete a mac entry in FDB; use show to see FDB entries;
+											  if [vlan <vid>] is missing, VID 1 will be used
+ethsw [port <port_no>] pvid { [help] | show | <pvid> } - set/show PVID (ingress and egress VLAN tagging) for a port
+ethsw [port <port_no>] vlan { [help] | show | add <vid> | del <vid> } - add a VLAN to a port (VLAN members)
+ethsw [port <port_no>] untagged { [help] | show | all | none | pvid } - set egress tagging mode for a port
+ethsw [port <port_no>] egress tag { [help] | show | pvid | classified } - configure VID source for egress tag.
+									  Tag's VID could be the frame's classified VID or the PVID of the port
+ethsw vlan fdb { [help] | show | shared | private } - make VLAN learning shared or private
+ethsw [port <port_no>] ingress filtering { [help] | show | enable | disable } - enable/disable VLAN ingress filtering on port
+ethsw [port <port_no>] aggr { [help] | show | <lag_group_no> } - get/set LAG group for a port
+
+=> ethsw show
+    Port   Status     Link    Speed   Duplex
+       0  enabled     down       10     half
+       1  enabled     down       10     half
+       2  enabled     down       10     half
+       3  enabled       up     1000     full
+       4 disabled     down        -     half
+       5 disabled     down        -     half
+       6 disabled     down        -     half
+       7 disabled     down        -     half
+       8  enabled       up     2500     full
+       9  enabled       up     2500     full
+=>
diff --git a/doc/README.tee b/doc/README.tee
new file mode 100644
index 00000000000..79e7996a6f5
--- /dev/null
+++ b/doc/README.tee
@@ -0,0 +1,112 @@
+=============
+TEE uclass
+=============
+
+This document describes the TEE uclass in U-Boot
+
+A TEE (Trusted Execution Environment) is a trusted OS running in some
+secure environment, for example, TrustZone on ARM CPUs, or a separate
+secure co-processor etc. A TEE driver handles the details needed to
+communicate with the TEE.
+
+This uclass deals with:
+
+- Registration of TEE drivers
+
+- Managing shared memory between U-Boot and the TEE
+
+- Providing a generic API to the TEE
+
+The TEE interface
+=================
+
+include/tee.h defines the generic interface to a TEE.
+
+A client finds the TEE device via tee_find_device(). Other important functions
+when interfacing with a TEE are:
+
+- tee_shm_alloc(), tee_shm_register() and tee_shm_free() to manage shared
+  memory objects often needed when communicating with the TEE.
+
+- tee_get_version() lets the client know which the capabilities of the TEE
+  device.
+
+- tee_open_session() opens a session to a Trusted Application
+
+- tee_invoke_func() invokes a function in a Trusted Application
+
+- tee_close_session() closes a session to a Trusted Application
+
+Much of the communication between clients and the TEE is opaque to the
+driver. The main job for the driver is to receive requests from the
+clients, forward them to the TEE and send back the results.
+
+OP-TEE driver
+=============
+
+The OP-TEE driver handles OP-TEE [1] based TEEs. Currently it is only the ARM
+TrustZone based OP-TEE solution that is supported.
+
+Lowest level of communication with OP-TEE builds on ARM SMC Calling
+Convention (SMCCC) [2], which is the foundation for OP-TEE's SMC interface
+[3] used internally by the driver. Stacked on top of that is OP-TEE Message
+Protocol [4].
+
+OP-TEE SMC interface provides the basic functions required by SMCCC and some
+additional functions specific for OP-TEE. The most interesting functions are:
+
+- OPTEE_SMC_FUNCID_CALLS_UID (part of SMCCC) returns the version information
+  which is then returned by TEE_IOC_VERSION
+
+- OPTEE_SMC_CALL_GET_OS_UUID returns the particular OP-TEE implementation, used
+  to tell, for instance, a TrustZone OP-TEE apart from an OP-TEE running on a
+  separate secure co-processor.
+
+- OPTEE_SMC_CALL_WITH_ARG drives the OP-TEE message protocol
+
+- OPTEE_SMC_GET_SHM_CONFIG lets the driver and OP-TEE agree on which memory
+  range to used for shared memory between Linux and OP-TEE.
+
+The GlobalPlatform TEE Client API [5] is implemented on top of the generic
+TEE API.
+
+Picture of the relationship between the different components in the
+OP-TEE architecture:
+
+                   U-Boot                  Secure world
+                   ~~~~~~                  ~~~~~~~~~~~~
+                 +------------+           +-------------+
+                 | Client     |           | Trusted     |
+                 |            |           | Application |
+                 +------------+           +-------------+
+                       /\                       /\
+                       ||                       ||
+                       \/                       \/
+                 +------------+           +-------------+
+                 | TEE        |           | TEE Internal|
+                 | uclass     |           | API         |
+                 +------------+           +-------------+
+                 | OP-TEE     |           | OP-TEE      |
+                 | driver     |           | Trusted OS  |
+                 +------------+-----------+-------------+
+                 |             OP-TEE MSG               |
+                 |      SMCCC (OPTEE_SMC_CALL_*)        |
+                 +--------------------------------------+
+
+RPC (Remote Procedure Call) are requests from secure world to the driver.
+An RPC is identified by a special range of SMCCC return values from
+OPTEE_SMC_CALL_WITH_ARG.
+
+References
+==========
+
+[1] https://github.com/OP-TEE/optee_os
+
+[2] http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html
+
+[3] drivers/tee/optee/optee_smc.h
+
+[4] drivers/tee/optee/optee_msg.h
+
+[5] http://www.globalplatform.org/specificationsdevice.asp look for
+    "TEE Client API Specification v1.0" and click download.
diff --git a/doc/README.ubi b/doc/README.ubi
new file mode 100644
index 00000000000..c78a81795b9
--- /dev/null
+++ b/doc/README.ubi
@@ -0,0 +1,258 @@
+-------------------
+UBI usage in U-Boot
+-------------------
+
+UBI support in U-Boot is broken down into five separate commands.
+The first is the ubi command, which has six subcommands:
+
+=> help ubi
+ubi - ubi commands
+
+Usage:
+ubi part [part] [offset]
+ - Show or set current partition (with optional VID header offset)
+ubi info [l[ayout]] - Display volume and ubi layout information
+ubi create[vol] volume [size] [type] - create volume name with size
+ubi write[vol] address volume size - Write volume from address with size
+ubi write.part address volume size [fullsize]
+ - Write part of a volume from address
+ubi read[vol] address volume [size] - Read volume to address with size
+ubi remove[vol] volume - Remove volume
+[Legends]
+ volume: character name
+ size: specified in bytes
+ type: s[tatic] or d[ynamic] (default=dynamic)
+
+
+The first command that is needed to be issues is "ubi part" to connect
+one mtd partition to the UBI subsystem. This command will either create
+a new UBI device on the requested MTD partition. Or it will attach a
+previously created UBI device. The other UBI commands will only work
+when such a UBI device is attached (via "ubi part"). Here an example:
+
+=> mtdparts
+
+device nor0 <1fc000000.nor_flash>, # parts = 6
+ #: name                size            offset          mask_flags
+ 0: kernel              0x00200000      0x00000000      0
+ 1: dtb                 0x00040000      0x00200000      0
+ 2: root                0x00200000      0x00240000      0
+ 3: user                0x01ac0000      0x00440000      0
+ 4: env                 0x00080000      0x01f00000      0
+ 5: u-boot              0x00080000      0x01f80000      0
+
+active partition: nor0,0 - (kernel) 0x00200000 @ 0x00000000
+
+defaults:
+mtdids  : nor0=1fc000000.nor_flash
+mtdparts: mtdparts=1fc000000.nor_flash:2m(kernel),256k(dtb),2m(root),27392k(user),512k(env),512k(u-boot)
+
+=> ubi part root
+Creating 1 MTD partitions on "nor0":
+0x000000240000-0x000000440000 : "mtd=2"
+UBI: attaching mtd1 to ubi0
+UBI: physical eraseblock size:   262144 bytes (256 KiB)
+UBI: logical eraseblock size:    262016 bytes
+UBI: smallest flash I/O unit:    1
+UBI: VID header offset:          64 (aligned 64)
+UBI: data offset:                128
+UBI: attached mtd1 to ubi0
+UBI: MTD device name:            "mtd=2"
+UBI: MTD device size:            2 MiB
+UBI: number of good PEBs:        8
+UBI: number of bad PEBs:         0
+UBI: max. allowed volumes:       128
+UBI: wear-leveling threshold:    4096
+UBI: number of internal volumes: 1
+UBI: number of user volumes:     1
+UBI: available PEBs:             0
+UBI: total number of reserved PEBs: 8
+UBI: number of PEBs reserved for bad PEB handling: 0
+UBI: max/mean erase counter: 2/1
+
+
+Now that the UBI device is attached, this device can be modified
+using the following commands:
+
+ubi info	Display volume and ubi layout information
+ubi createvol	Create UBI volume on UBI device
+ubi removevol	Remove UBI volume from UBI device
+ubi read	Read data from UBI volume to memory
+ubi write	Write data from memory to UBI volume
+ubi write.part	Write data from memory to UBI volume, in parts
+
+
+Here a few examples on the usage:
+
+=> ubi create testvol
+Creating dynamic volume testvol of size 1048064
+
+=> ubi info l
+UBI: volume information dump:
+UBI: vol_id          0
+UBI: reserved_pebs   4
+UBI: alignment       1
+UBI: data_pad        0
+UBI: vol_type        3
+UBI: name_len        7
+UBI: usable_leb_size 262016
+UBI: used_ebs        4
+UBI: used_bytes      1048064
+UBI: last_eb_bytes   262016
+UBI: corrupted       0
+UBI: upd_marker      0
+UBI: name            testvol
+
+UBI: volume information dump:
+UBI: vol_id          2147479551
+UBI: reserved_pebs   2
+UBI: alignment       1
+UBI: data_pad        0
+UBI: vol_type        3
+UBI: name_len        13
+UBI: usable_leb_size 262016
+UBI: used_ebs        2
+UBI: used_bytes      524032
+UBI: last_eb_bytes   2
+UBI: corrupted       0
+UBI: upd_marker      0
+UBI: name            layout volume
+
+=> ubi info
+UBI: MTD device name:            "mtd=2"
+UBI: MTD device size:            2 MiB
+UBI: physical eraseblock size:   262144 bytes (256 KiB)
+UBI: logical eraseblock size:    262016 bytes
+UBI: number of good PEBs:        8
+UBI: number of bad PEBs:         0
+UBI: smallest flash I/O unit:    1
+UBI: VID header offset:          64 (aligned 64)
+UBI: data offset:                128
+UBI: max. allowed volumes:       128
+UBI: wear-leveling threshold:    4096
+UBI: number of internal volumes: 1
+UBI: number of user volumes:     1
+UBI: available PEBs:             0
+UBI: total number of reserved PEBs: 8
+UBI: number of PEBs reserved for bad PEB handling: 0
+UBI: max/mean erase counter: 4/1
+
+=> ubi write 800000 testvol 80000
+Volume "testvol" found at volume id 0
+
+=> ubi read 900000 testvol 80000
+Volume testvol found at volume id 0
+read 524288 bytes from volume 0 to 900000(buf address)
+
+=> cmp.b 800000 900000 80000
+Total of 524288 bytes were the same
+
+
+Next, the ubifsmount command allows you to access filesystems on the
+UBI partition which has been attached with the ubi part command:
+
+=> help ubifsmount
+ubifsmount - mount UBIFS volume
+
+Usage:
+ubifsmount <volume-name>
+    - mount 'volume-name' volume
+
+For example:
+
+=> ubifsmount ubi0:recovery
+UBIFS: mounted UBI device 0, volume 0, name "recovery"
+UBIFS: mounted read-only
+UBIFS: file system size:   46473216 bytes (45384 KiB, 44 MiB, 366 LEBs)
+UBIFS: journal size:       6348800 bytes (6200 KiB, 6 MiB, 50 LEBs)
+UBIFS: media format:       w4/r0 (latest is w4/r0)
+UBIFS: default compressor: LZO
+UBIFS: reserved for root:  0 bytes (0 KiB)
+
+Note that unlike Linux, U-Boot can only have one active UBI partition
+at a time, which can be referred to as ubi0, and must be supplied along
+with the name of the filesystem you are mounting.
+
+
+Once a UBI filesystem has been mounted, the ubifsls command allows you
+to list the contents of a directory in the filesystem:
+
+
+=> help ubifsls
+ubifsls - list files in a directory
+
+Usage:
+ubifsls [directory]
+    - list files in a 'directory' (default '/')
+
+For example:
+
+=> ubifsls
+	    17442  Thu Jan 01 02:57:38 1970  imx28-evk.dtb
+	  2998146  Thu Jan 01 02:57:43 1970  zImage
+
+
+And the ubifsload command allows you to load a file from a UBI
+filesystem:
+
+
+=> help ubifsload
+ubifsload - load file from an UBIFS filesystem
+
+Usage:
+ubifsload <addr> <filename> [bytes]
+    - load file 'filename' to address 'addr'
+
+For example:
+
+=> ubifsload ${loadaddr} zImage
+Loading file 'zImage' to addr 0x42000000 with size 2998146 (0x002dbf82)...
+Done
+
+
+Finally, you can unmount the UBI filesystem with the ubifsumount
+command:
+
+=> help ubifsumount
+ubifsumount - unmount UBIFS volume
+
+Usage:
+ubifsumount     - unmount current volume
+
+For example:
+
+=> ubifsumount
+Unmounting UBIFS volume recovery!
+
+
+Usage of the UBI CRC skip-check flag of static volumes:
+-------------------------------------------------------
+Some users of static UBI volumes implement their own integrity check,
+thus making the volume CRC check done at open time useless. For
+instance, this is the case when one use the ubiblock + dm-verity +
+squashfs combination, where dm-verity already checks integrity of the
+block device but this time at the block granularity instead of verifying
+the whole volume.
+
+Skipping this test drastically improves the boot-time.
+
+U-Boot now supports the "skip_check" flag to optionally skip the CRC
+check at open time.
+
+Usage: Case A - Upon UBI volume creation:
+You can optionally add "--skipcheck" to the "ubi create" command:
+
+ubi create[vol] volume [size] [type] [id] [--skipcheck]
+ - create volume name with size ('-' for maximum available size)
+
+Usage: Case B - With an already existing UBI volume:
+Use the "ubi skipcheck" command:
+
+ubi skipcheck volume on/off - Set or clear skip_check flag in volume header
+
+Example:
+=> ubi skipcheck rootfs0 on
+Setting skip_check on volume rootfs0
+
+BTW: This saves approx. 10 seconds Linux bootup time on a MT7688 based
+target with 128MiB of SPI NAND.
diff --git a/doc/README.ubispl b/doc/README.ubispl
new file mode 100644
index 00000000000..ff008bc3118
--- /dev/null
+++ b/doc/README.ubispl
@@ -0,0 +1,141 @@
+Lightweight UBI and UBI fastmap support
+
+# Copyright (C) Thomas Gleixner <tglx@linutronix.de>
+#
+# SPDX-License-Identifier: GPL 2.0+ BSD-3-Clause
+
+Scans the UBI information and loads the requested static volumes into
+memory.
+
+Configuration Options:
+
+   CONFIG_SPL_UBI
+     Enables the SPL UBI support
+
+   CONFIG_SPL_UBI_MAX_VOL_LEBS
+     The maximum number of logical eraseblocks which a static volume
+     to load can contain. Used for sizing the scan data structure
+
+   CONFIG_SPL_UBI_MAX_PEB_SIZE
+     The maximum physical erase block size. Either a compile time
+     constant or runtime detection. Used for sizing the scan data
+     structure
+
+   CONFIG_SPL_UBI_MAX_PEBS
+     The maximum physical erase block count. Either a compile time
+     constant or runtime detection. Used for sizing the scan data
+     structure
+
+   CONFIG_SPL_UBI_VOL_IDS
+     The maximum volume ids which can be loaded. Used for sizing the
+     scan data structure.
+
+Usage notes:
+
+In the board config file define for example:
+
+#define CONFIG_SPL_UBI
+#define CONFIG_SPL_UBI_MAX_VOL_LEBS	256
+#define CONFIG_SPL_UBI_MAX_PEB_SIZE	(256*1024)
+#define CONFIG_SPL_UBI_MAX_PEBS		4096
+#define CONFIG_SPL_UBI_VOL_IDS		8
+
+The size requirement is roughly as follows:
+
+    2k for the basic data structure
+  + CONFIG_SPL_UBI_VOL_IDS * CONFIG_SPL_UBI_MAX_VOL_LEBS * 8
+  + CONFIG_SPL_UBI_MAX_PEBS * 64
+  + CONFIG_SPL_UBI_MAX_PEB_SIZE * UBI_FM_MAX_BLOCKS
+
+The last one is big, but I really don't care in that stage. Real world
+implementations only use the first couple of blocks, but the code
+handles up to UBI_FM_MAX_BLOCKS.
+
+Given the above configuration example the requirement is about 5M
+which is usually not a problem to reserve in the RAM along with the
+other areas like the kernel/dts load address.
+
+So something like this will do the trick:
+
+#define SPL_FINFO_ADDR			0x80800000
+#define SPL_DTB_LOAD_ADDR		0x81800000
+#define SPL_KERNEL_LOAD_ADDR		0x82000000
+
+In the board file, implement the following:
+
+static struct ubispl_load myvolumes[] = {
+	{
+		.vol_id		= 0,	/* kernel volume */
+		.load_addr	= (void *)SPL_KERNEL_LOAD_ADDR,
+	},
+	{
+		.vol_id		= 1,	/* DT blob */
+		.load_addr	= (void *)SPL_DTB_LOAD_ADDR,
+	}
+};
+
+int spl_start_uboot(void)
+{
+	struct ubispl_info info;
+
+	info.ubi = (struct ubi_scan_info *) SPL_FINFO_ADDR;
+	info.fastmap = 1;
+	info.read = nand_spl_read_flash;
+
+#if COMPILE_TIME_DEFINED
+	/*
+	 * MY_NAND_NR_SPL_PEBS is the number of physical erase blocks
+	 * in the FLASH which are reserved for the SPL. Think about
+	 * mtd partitions:
+	 *
+	 * part_spl { .start = 0, .end = 4 }
+	 * part_ubi { .start = 4, .end = NR_PEBS }
+	 */
+	info.peb_offset = MY_NAND_NR_SPL_PEBS;
+	info.peb_size = CONFIG_SYS_NAND_BLOCK_SIZE;
+	info.vid_offset = MY_NAND_UBI_VID_OFFS;
+	info.leb_start = MY_NAND_UBI_DATA_OFFS;
+	info.peb_count = MY_NAND_UBI_NUM_PEBS;
+#else
+	get_flash_info(&flash_info);
+	info.peb_offset = MY_NAND_NR_SPL_PEBS;
+	info.peb_size = flash_info.peb_size;
+
+	/*
+	 * The VID and Data offset depend on the capability of the
+	 * FLASH chip to do subpage writes.
+	 *
+	 * If the flash chip supports subpage writes, then the VID
+	 * header starts at the second subpage. So for 2k pages size
+	 * with 4 subpages the VID offset is 512. The DATA offset is 2k.
+	 *
+	 * If the flash chip does not support subpage writes then the
+	 * VID offset is FLASH_PAGE_SIZE and the DATA offset
+	 * 2 * FLASH_PAGE_SIZE
+	 */
+	info.vid_offset = flash_info.vid_offset;
+	info.leb_start = flash_info.data_offset;
+
+	/*
+	 * The flash reports the total number of erase blocks, so
+	 * we need to subtract the number of blocks which are reserved
+	 * for the SPL itself and not managed by UBI.
+	 */
+	info.peb_count = flash_info.peb_count - MY_NAND_NR_SPL_PEBS;
+#endif
+
+	ret = ubispl_load_volumes(&info, myvolumes, ARRAY_SIZE(myvolumes);
+
+	....
+
+}
+
+Note: you can load any payload that way. You can even load u-boot from
+UBI, so the only non UBI managed FLASH area is the one which is
+reserved for the SPL itself and read from the SoC ROM.
+
+And you can do fallback scenarios:
+
+    if (ubispl_load_volumes(&info, volumes0, ARRAY_SIZE(volumes0)))
+        if (ubispl_load_volumes(&info, volumes1, ARRAY_SIZE(volumes1)))
+	    ubispl_load_volumes(&info, vol_uboot, ARRAY_SIZE(vol_uboot));
diff --git a/doc/README.ublimage b/doc/README.ublimage
new file mode 100644
index 00000000000..ab25b2615e5
--- /dev/null
+++ b/doc/README.ublimage
@@ -0,0 +1,141 @@
+---------------------------------------------
+UBL image Boot Image generation using mkimage
+---------------------------------------------
+
+This document describes how to set up an U-Boot image that can be directly
+booted by a DaVinci processor via NAND boot mode, using an UBL header,
+but without need for UBL.
+
+For more details see section 11.2 "ARM ROM Boot Modes" of
+http://focus.ti.com/lit/ug/sprufg5a/sprufg5a.pdf
+
+Command syntax:
+--------------
+./tools/mkimage -l <u-boot_file>
+		to list the UBL image file details
+
+./tools/mkimage -T ublimage \
+		-n <board specific configuration file> \
+		-d <u-boot binary>  <output image file>
+
+For example, for the davinci dm365evm board:
+./tools/mkimage -n ./board/davinci/dm365evm/ublimage.cfg \
+		-T ublimage \
+		-d u-boot-nand.bin u-boot.ubl
+
+You can generate the image directly when you compile u-boot with:
+
+$ make u-boot.ubl
+
+The output image can be flashed into the NAND.
+
+Please check the DaVinci documentation for further details.
+
+Board specific configuration file specifications:
+-------------------------------------------------
+1. This file must present in the $(BOARDDIR) and the name should be
+	ublimage.cfg (since this is used in Makefile).
+2. This file can have empty lines and lines starting with "#" as first
+	character to put comments.
+3. This file can have configuration command lines as mentioned below,
+	any other information in this file is treated as invalid.
+
+Configuration command line syntax:
+---------------------------------
+1. Each command line must have two strings, first one command or address
+	and second one data string
+2. Following are the valid command strings and associated data strings:-
+	Command string		data string
+	--------------		-----------
+	MODE			UBL special mode, on of:
+				safe
+				Example:
+				MODE	safe
+
+	ENTRY			Entry point address for the user
+				bootloader (absolute address) = TEXT_BASE
+				nand_spl loader.
+				Example:
+				ENTRY	0x00000020
+
+	PAGES			Number of pages (size of user bootloader
+				in number of pages)
+				Example:
+				PAGES	27
+
+	START_BLOCK		Block number where user bootloader is present
+				Example:
+				START_BLOCK	5
+
+	START_PAGE		Page number where user bootloader is present
+				(for RBL always 0)
+				Example:
+				START_PAGE	0
+
+------------------------------------------------
+
+Structure of the u-boot.ubl binary:
+
+compile steps:
+
+1) nand_spl code compile, with pad_to = (TEXT_BASE +
+   (CONFIG_SYS_NROF_PAGES_NAND_SPL * pagesize))
+   Example: cam_enc_4xx pad_to = 0x20 + (6 * 0x800) = 0x3020 = 12320
+   -> u-boot-spl-16k.bin
+
+   !! TEXT_BASE = 0x20, as the RBL starts at 0x20
+
+2) compile u-boot.bin ("normal" u-boot)
+   -> u-boot.bin
+
+3) create u-boot-nand.bin = u-boot-spl-16k.bin + u-boot.bin
+
+4) create u-boot.ubl, size = 1 page size NAND
+   create UBL header and paste it before u-boot.bin
+
+This steps are done automagically if you do a "make all"
+
+-> You get an u-boot.ubl binary, which you can flash
+   into your NAND.
+
+Structure of this binary (Example for the cam_enc_4xx board with a NAND
+page size = 0x800):
+
+offset :    0x00000 | 0x800	  | 0x3800
+content:    UBL     | nand_spl	  | u-boot code
+	    Header  | code	  |
+
+The NAND layout looks for example like this:
+
+(Example for the cam_enc_4xx board with a NAND page size = 0x800, block
+size = 0x20000 and CONFIG_SYS_NROF_UBL_HEADER 5):
+
+offset :    0x80000 | 0xa0000	  | 0xa3000
+content:    UBL     | nand_spl	  | u-boot code
+	    Header  | code	  |
+	    ^	      ^
+	    ^	      0xa0000 = CONFIG_SYS_NROF_UBL_HEADER * 0x20000
+	    ^
+	    0x80000 = Block 4 * 0x20000
+
+If the cpu starts in NAND boot mode, it checks the UBL descriptor
+starting with block 1 (page 0).  When a valid UBL signature is found,
+the corresponding block number (from 1 to 24) is written to the last 32
+bits of ARM internal memory (0x7ffc-0x8000).  This feature is provided
+as a basic debug mechanism.  If not found, it continues with block 2
+... last possible block is 24
+
+If a valid UBL descriptor is found, the UBL descriptor is read and
+processed.  The descriptor gives the information required for loading
+and control transfer to the nand_spl code.  The nand_spl code is then
+read and processed.
+
+Once the user-specified start-up conditions are set, the RBL copies the
+nand_spl into ARM internal RAM, starting at address 0x0000: 0020.
+							    ^^^^
+
+The nand_spl code itself now does necessary intializations, and at least,
+copies the u-boot code from NAND into RAM, and jumps to it ...
+
+------------------------------------------------
+Author: Heiko Schocher <hs@denx.de>
diff --git a/doc/README.udp b/doc/README.udp
new file mode 100644
index 00000000000..da0725719dc
--- /dev/null
+++ b/doc/README.udp
@@ -0,0 +1,35 @@
+Udp framework
+
+The udp framework is build on top of network framework and is designed
+to define new protocol or new command based on udp without modifying
+the network framework.
+
+The udp framework define a function udp_loop that take as argument
+a structure udp_ops (defined in include/net/udp.h) :
+
+struct udp_ops {
+	int (*prereq)(void *data);
+	int (*start)(void *data);
+	void *data;
+};
+
+The callback prereq define if all the requirements are
+valid before running the network/udp loop.
+
+The callback start define the first step in the network/udp loop,
+and it may also be used to configure a timemout and udp handler.
+
+The pointer data is used to store private data that
+could be used by both callback.
+
+A simple example to use this framework:
+
+static struct udp_ops udp_ops = {
+	.prereq = wmp_prereq,
+	.start = wmp_start,
+	.data = NULL,
+};
+
+...
+
+err = udp_loop(&udp_ops);
diff --git a/doc/README.unaligned-memory-access.txt b/doc/README.unaligned-memory-access.txt
new file mode 100644
index 00000000000..70a85f9cfe0
--- /dev/null
+++ b/doc/README.unaligned-memory-access.txt
@@ -0,0 +1,240 @@
+Editors note: This document is _heavily_ cribbed from the Linux Kernel, with
+really only the section about "Alignment vs. Networking" removed.
+
+UNALIGNED MEMORY ACCESSES
+=========================
+
+Linux runs on a wide variety of architectures which have varying behaviour
+when it comes to memory access. This document presents some details about
+unaligned accesses, why you need to write code that doesn't cause them,
+and how to write such code!
+
+
+The definition of an unaligned access
+=====================================
+
+Unaligned memory accesses occur when you try to read N bytes of data starting
+from an address that is not evenly divisible by N (i.e. addr % N != 0).
+For example, reading 4 bytes of data from address 0x10004 is fine, but
+reading 4 bytes of data from address 0x10005 would be an unaligned memory
+access.
+
+The above may seem a little vague, as memory access can happen in different
+ways. The context here is at the machine code level: certain instructions read
+or write a number of bytes to or from memory (e.g. movb, movw, movl in x86
+assembly). As will become clear, it is relatively easy to spot C statements
+which will compile to multiple-byte memory access instructions, namely when
+dealing with types such as u16, u32 and u64.
+
+
+Natural alignment
+=================
+
+The rule mentioned above forms what we refer to as natural alignment:
+When accessing N bytes of memory, the base memory address must be evenly
+divisible by N, i.e. addr % N == 0.
+
+When writing code, assume the target architecture has natural alignment
+requirements.
+
+In reality, only a few architectures require natural alignment on all sizes
+of memory access. However, we must consider ALL supported architectures;
+writing code that satisfies natural alignment requirements is the easiest way
+to achieve full portability.
+
+
+Why unaligned access is bad
+===========================
+
+The effects of performing an unaligned memory access vary from architecture
+to architecture. It would be easy to write a whole document on the differences
+here; a summary of the common scenarios is presented below:
+
+ - Some architectures are able to perform unaligned memory accesses
+   transparently, but there is usually a significant performance cost.
+ - Some architectures raise processor exceptions when unaligned accesses
+   happen. The exception handler is able to correct the unaligned access,
+   at significant cost to performance.
+ - Some architectures raise processor exceptions when unaligned accesses
+   happen, but the exceptions do not contain enough information for the
+   unaligned access to be corrected.
+ - Some architectures are not capable of unaligned memory access, but will
+   silently perform a different memory access to the one that was requested,
+   resulting in a subtle code bug that is hard to detect!
+
+It should be obvious from the above that if your code causes unaligned
+memory accesses to happen, your code will not work correctly on certain
+platforms and will cause performance problems on others.
+
+
+Code that does not cause unaligned access
+=========================================
+
+At first, the concepts above may seem a little hard to relate to actual
+coding practice. After all, you don't have a great deal of control over
+memory addresses of certain variables, etc.
+
+Fortunately things are not too complex, as in most cases, the compiler
+ensures that things will work for you. For example, take the following
+structure:
+
+	struct foo {
+		u16 field1;
+		u32 field2;
+		u8 field3;
+	};
+
+Let us assume that an instance of the above structure resides in memory
+starting at address 0x10000. With a basic level of understanding, it would
+not be unreasonable to expect that accessing field2 would cause an unaligned
+access. You'd be expecting field2 to be located at offset 2 bytes into the
+structure, i.e. address 0x10002, but that address is not evenly divisible
+by 4 (remember, we're reading a 4 byte value here).
+
+Fortunately, the compiler understands the alignment constraints, so in the
+above case it would insert 2 bytes of padding in between field1 and field2.
+Therefore, for standard structure types you can always rely on the compiler
+to pad structures so that accesses to fields are suitably aligned (assuming
+you do not cast the field to a type of different length).
+
+Similarly, you can also rely on the compiler to align variables and function
+parameters to a naturally aligned scheme, based on the size of the type of
+the variable.
+
+At this point, it should be clear that accessing a single byte (u8 or char)
+will never cause an unaligned access, because all memory addresses are evenly
+divisible by one.
+
+On a related topic, with the above considerations in mind you may observe
+that you could reorder the fields in the structure in order to place fields
+where padding would otherwise be inserted, and hence reduce the overall
+resident memory size of structure instances. The optimal layout of the
+above example is:
+
+	struct foo {
+		u32 field2;
+		u16 field1;
+		u8 field3;
+	};
+
+For a natural alignment scheme, the compiler would only have to add a single
+byte of padding at the end of the structure. This padding is added in order
+to satisfy alignment constraints for arrays of these structures.
+
+Another point worth mentioning is the use of __attribute__((packed)) on a
+structure type. This GCC-specific attribute tells the compiler never to
+insert any padding within structures, useful when you want to use a C struct
+to represent some data that comes in a fixed arrangement 'off the wire'.
+
+You might be inclined to believe that usage of this attribute can easily
+lead to unaligned accesses when accessing fields that do not satisfy
+architectural alignment requirements. However, again, the compiler is aware
+of the alignment constraints and will generate extra instructions to perform
+the memory access in a way that does not cause unaligned access. Of course,
+the extra instructions obviously cause a loss in performance compared to the
+non-packed case, so the packed attribute should only be used when avoiding
+structure padding is of importance.
+
+
+Code that causes unaligned access
+=================================
+
+With the above in mind, let's move onto a real life example of a function
+that can cause an unaligned memory access. The following function taken
+from the Linux Kernel's include/linux/etherdevice.h is an optimized routine
+to compare two ethernet MAC addresses for equality.
+
+bool ether_addr_equal(const u8 *addr1, const u8 *addr2)
+{
+#ifdef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
+	u32 fold = ((*(const u32 *)addr1) ^ (*(const u32 *)addr2)) |
+		   ((*(const u16 *)(addr1 + 4)) ^ (*(const u16 *)(addr2 + 4)));
+
+	return fold == 0;
+#else
+	const u16 *a = (const u16 *)addr1;
+	const u16 *b = (const u16 *)addr2;
+	return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) == 0;
+#endif
+}
+
+In the above function, when the hardware has efficient unaligned access
+capability, there is no issue with this code.  But when the hardware isn't
+able to access memory on arbitrary boundaries, the reference to a[0] causes
+2 bytes (16 bits) to be read from memory starting at address addr1.
+
+Think about what would happen if addr1 was an odd address such as 0x10003.
+(Hint: it'd be an unaligned access.)
+
+Despite the potential unaligned access problems with the above function, it
+is included in the kernel anyway but is understood to only work normally on
+16-bit-aligned addresses. It is up to the caller to ensure this alignment or
+not use this function at all. This alignment-unsafe function is still useful
+as it is a decent optimization for the cases when you can ensure alignment,
+which is true almost all of the time in ethernet networking context.
+
+
+Here is another example of some code that could cause unaligned accesses:
+	void myfunc(u8 *data, u32 value)
+	{
+		[...]
+		*((u32 *) data) = cpu_to_le32(value);
+		[...]
+	}
+
+This code will cause unaligned accesses every time the data parameter points
+to an address that is not evenly divisible by 4.
+
+In summary, the 2 main scenarios where you may run into unaligned access
+problems involve:
+ 1. Casting variables to types of different lengths
+ 2. Pointer arithmetic followed by access to at least 2 bytes of data
+
+
+Avoiding unaligned accesses
+===========================
+
+The easiest way to avoid unaligned access is to use the get_unaligned() and
+put_unaligned() macros provided by the <asm/unaligned.h> header file.
+
+Going back to an earlier example of code that potentially causes unaligned
+access:
+
+	void myfunc(u8 *data, u32 value)
+	{
+		[...]
+		*((u32 *) data) = cpu_to_le32(value);
+		[...]
+	}
+
+To avoid the unaligned memory access, you would rewrite it as follows:
+
+	void myfunc(u8 *data, u32 value)
+	{
+		[...]
+		value = cpu_to_le32(value);
+		put_unaligned(value, (u32 *) data);
+		[...]
+	}
+
+The get_unaligned() macro works similarly. Assuming 'data' is a pointer to
+memory and you wish to avoid unaligned access, its usage is as follows:
+
+	u32 value = get_unaligned((u32 *) data);
+
+These macros work for memory accesses of any length (not just 32 bits as
+in the examples above). Be aware that when compared to standard access of
+aligned memory, using these macros to access unaligned memory can be costly in
+terms of performance.
+
+If use of such macros is not convenient, another option is to use memcpy(),
+where the source or destination (or both) are of type u8* or unsigned char*.
+Due to the byte-wise nature of this operation, unaligned accesses are avoided.
+
+--
+In the Linux Kernel,
+Authors: Daniel Drake <dsd@gentoo.org>,
+         Johannes Berg <johannes@sipsolutions.net>
+With help from: Alan Cox, Avuton Olrich, Heikki Orsila, Jan Engelhardt,
+Kyle McMartin, Kyle Moffett, Randy Dunlap, Robert Hancock, Uli Kunitz,
+Vadim Lobanov
diff --git a/doc/README.uniphier b/doc/README.uniphier
new file mode 100644
index 00000000000..af746f6c316
--- /dev/null
+++ b/doc/README.uniphier
@@ -0,0 +1,462 @@
+U-Boot for UniPhier SoC family
+==============================
+
+
+Recommended toolchains
+----------------------
+
+The UniPhier platform is well tested with Linaro toolchains.
+You can download pre-built toolchains from:
+
+    http://www.linaro.org/downloads/
+
+
+Compile the source
+------------------
+
+The source can be configured and built with the following commands:
+
+    $ make <defconfig>
+    $ make CROSS_COMPILE=<toolchain-prefix> DEVICE_TREE=<device-tree>
+
+The recommended <toolchain-prefix> is `arm-linux-gnueabihf-` for 32bit SoCs,
+`aarch64-linux-gnu-` for 64bit SoCs, but you may wish to change it to use your
+favorite compiler.
+
+The following tables show <defconfig> and <device-tree> for each board.
+
+32bit SoC boards:
+
+ Board         | <defconfig>                 | <device-tree>
+---------------|-----------------------------|------------------------------
+LD4 reference  | uniphier_ld4_sld8_defconfig | uniphier-ld4-ref (default)
+sld8 reference | uniphier_ld4_sld8_defconfig | uniphier-sld8-def
+Pro4 reference | uniphier_v7_defconfig       | uniphier-pro4-ref
+Pro4 Ace       | uniphier_v7_defconfig       | uniphier-pro4-ace
+Pro4 Sanji     | uniphier_v7_defconfig       | uniphier-pro4-sanji
+Pro5 4KBOX     | uniphier_v7_defconfig       | uniphier-pro5-4kbox
+PXs2 Gentil    | uniphier_v7_defconfig       | uniphier-pxs2-gentil
+PXs2 Vodka     | uniphier_v7_defconfig       | uniphier-pxs2-vodka (default)
+LD6b reference | uniphier_v7_defconfig       | uniphier-ld6b-ref
+
+64bit SoC boards:
+
+ Board         | <defconfig>           | <device-tree>
+---------------|-----------------------|----------------------------
+LD11 reference | uniphier_v8_defconfig | uniphier-ld11-ref
+LD11 Global    | uniphier_v8_defconfig | uniphier-ld11-global
+LD20 reference | uniphier_v8_defconfig | uniphier-ld20-ref (default)
+LD20 Global    | uniphier_v8_defconfig | uniphier-ld20-global
+PXs3 reference | uniphier_v8_defconfig | uniphier-pxs3-ref
+
+For example, to compile the source for PXs2 Vodka board, run the following:
+
+    $ make uniphier_v7_defconfig
+    $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pxs2-vodka
+
+The device tree marked as (default) can be omitted.  `uniphier-pxs2-vodka` is
+the default device tree for the configuration `uniphier_v7_defconfig`, so the
+following gives the same result.
+
+    $ make uniphier_v7_defconfig
+    $ make CROSS_COMPILE=arm-linux-gnueabihf-
+
+
+Booting 32bit SoC boards
+------------------------
+
+The build command will generate the following:
+- u-boot.bin
+- spl/u-boot.bin
+
+U-Boot can boot UniPhier 32bit SoC boards by itself.  Flash the generated images
+to the storage device (NAND or eMMC) on your board.
+
+ - spl/u-boot-spl.bin at the offset address 0x00000000
+ - u-boot.bin         at the offset address 0x00020000
+
+The `u-boot-with-spl.bin` is the concatenation of the two (with appropriate
+padding), so you can also do:
+
+ - u-boot-with-spl.bin at the offset address 0x00000000
+
+If a TFTP server is available, the images can be easily updated.
+Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory,
+and run the following command at the U-Boot command line:
+
+To update the images in NAND:
+
+    => run nandupdate
+
+To update the images in eMMC:
+
+    => run emmcupdate
+
+
+Booting 64bit SoC boards
+------------------------
+
+The build command will generate the following:
+- u-boot.bin
+
+However, U-Boot is not the first stage loader for UniPhier 64bit SoC boards.
+U-Boot serves as a non-secure boot loader loaded by [ARM Trusted Firmware],
+so you need to provide the `u-boot.bin` to the build command of ARM Trusted
+Firmware.
+
+[ARM Trusted Firmware]: https://github.com/ARM-software/arm-trusted-firmware
+
+
+Verified Boot
+-------------
+
+U-Boot supports an image verification method called "Verified Boot".
+This is a brief tutorial to utilize this feature for the UniPhier platform.
+You will find details documents in the doc/uImage.FIT directory.
+
+Here, we take LD20 reference board for example, but it should work for any
+other boards including 32 bit SoCs.
+
+1. Generate key to sign with
+
+  $ mkdir keys
+  $ openssl genpkey -algorithm RSA -out keys/dev.key \
+    -pkeyopt rsa_keygen_bits:2048 -pkeyopt rsa_keygen_pubexp:65537
+  $ openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
+
+Two files "dev.key" and "dev.crt" will be created.  The base name is arbitrary,
+but need to match to the "key-name-hint" property described below.
+
+2. Describe FIT source
+
+You need to write an FIT (Flattened Image Tree) source file to describe the
+structure of the image container.
+
+The following is an example for a simple usecase:
+
+---------------------------------------->8----------------------------------------
+/dts-v1/;
+
+/ {
+	description = "Kernel, DTB and Ramdisk for UniPhier LD20 Reference Board";
+	#address-cells = <1>;
+
+	images {
+		kernel {
+			description = "linux";
+			data = /incbin/("PATH/TO/YOUR/LINUX/DIR/arch/arm64/boot/Image.gz");
+			type = "kernel";
+			arch = "arm64";
+			os = "linux";
+			compression = "gzip";
+			load = <0x82080000>;
+			entry = <0x82080000>;
+			hash-1 {
+				algo = "sha256";
+			};
+		};
+
+		fdt-1 {
+			description = "fdt";
+			data = /incbin/("PATH/TO/YOUR/LINUX/DIR/arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dtb");
+			type = "flat_dt";
+			arch = "arm64";
+			compression = "none";
+			hash-1 {
+				algo = "sha256";
+			};
+		};
+
+		ramdisk {
+			description = "ramdisk";
+			data = /incbin/("PATH/TO/YOUR/ROOTFS/DIR/rootfs.cpio");
+			type = "ramdisk";
+			arch = "arm64";
+			os = "linux";
+			compression = "none";
+			hash-1 {
+				algo = "sha256";
+			};
+		};
+	};
+
+	configurations {
+		default = "config-1";
+
+		config-1 {
+			description = "Configuration0";
+			kernel = "kernel";
+			fdt = "fdt-1";
+			ramdisk = "ramdisk";
+			signature-1 {
+				algo = "sha256,rsa2048";
+				key-name-hint = "dev";
+				sign-images = "kernel", "fdt", "ramdisk";
+			};
+		};
+	};
+};
+---------------------------------------->8----------------------------------------
+
+You need to change the three '/incbin/' lines, depending on the location of
+your kernel image, device tree blob, and init ramdisk.  The "load" and "entry"
+properties also need to be adjusted if you want to change the physical placement
+of the kernel.
+
+The "key-name-hint" must specify the key name you have created in the step 1.
+
+The FIT file name is arbitrary.  Let's say you saved it into "fit.its".
+
+3. Compile U-Boot with FIT and signature enabled
+
+To use the Verified Boot, you need to enable the following two options:
+  CONFIG_FIT
+  CONFIG_FIT_SIGNATURE
+
+They are disabled by default for UniPhier defconfig files.  So, you need to
+tweak the configuration from "make menuconfig" or friends.
+
+  $ make uniphier_v8_defconfig
+  $ make menuconfig
+      [ enable CONFIG_FIT and CONFIG_FIT_SIGNATURE ]
+  $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+4. Build the image tree blob
+
+After building U-Boot, you will see tools/mkimage.  With this tool, you can
+create an image tree blob as follows:
+
+  $ tools/mkimage -f fit.its -k keys -K dts/dt.dtb -r -F fitImage
+
+The -k option must specify the key directory you have created in step 1.
+
+A file "fitImage" will be created.  This includes kernel, DTB, Init-ramdisk,
+hash data for each of the three, and signature data.
+
+The public key needed for the run-time verification is stored in "dts/dt.dtb".
+
+5. Compile U-Boot again
+
+Since the "dt.dtb" has been updated in step 4, you need to re-compile the
+U-Boot.
+
+  $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+The re-compiled "u-boot.bin" is appended with DTB that contains the public key.
+
+6. Flash the image
+
+Flash the "fitImage" to a storage device (NAND, eMMC, or whatever) on your
+board.
+
+Please note the "u-boot.bin" must be signed, and verified by someone when it is
+loaded.  For ARMv8 SoCs, the "someone" is generally ARM Trusted Firmware BL2.
+ARM Trusted Firmware supports an image authentication mechanism called Trusted
+Board Boot (TBB).  The verification process must be chained from the moment of
+the system reset.  If the Chain of Trust has a breakage somewhere, the verified
+boot process is entirely pointless.
+
+7. Boot verified kernel
+
+Load the fitImage to memory and run the following from the U-Boot command line.
+
+  > bootm <addr>
+
+Here, <addr> is the base address of the fitImage.
+
+If it is successful, you will see messages like follows:
+
+---------------------------------------->8----------------------------------------
+## Loading kernel from FIT Image at 84100000 ...
+   Using 'config-1' configuration
+   Verifying Hash Integrity ... sha256,rsa2048:dev+ OK
+   Trying 'kernel' kernel subimage
+     Description:  linux
+     Created:      2017-10-20  14:32:29 UTC
+     Type:         Kernel Image
+     Compression:  gzip compressed
+     Data Start:   0x841000c8
+     Data Size:    6957818 Bytes = 6.6 MiB
+     Architecture: AArch64
+     OS:           Linux
+     Load Address: 0x82080000
+     Entry Point:  0x82080000
+     Hash algo:    sha256
+     Hash value:   82a37b7f11ae55f4e07aa25bf77e4067cb9dc1014d52d6cd4d588f92eee3aaad
+   Verifying Hash Integrity ... sha256+ OK
+## Loading ramdisk from FIT Image at 84100000 ...
+   Using 'config-1' configuration
+   Trying 'ramdisk' ramdisk subimage
+     Description:  ramdisk
+     Created:      2017-10-20  14:32:29 UTC
+     Type:         RAMDisk Image
+     Compression:  uncompressed
+     Data Start:   0x847a5cc0
+     Data Size:    5264365 Bytes = 5 MiB
+     Architecture: AArch64
+     OS:           Linux
+     Load Address: unavailable
+     Entry Point:  unavailable
+     Hash algo:    sha256
+     Hash value:   44980a2874154a2e31ed59222c9f8ea968867637f35c81e4107a984de7014deb
+   Verifying Hash Integrity ... sha256+ OK
+## Loading fdt from FIT Image at 84100000 ...
+   Using 'config-1' configuration
+   Trying 'fdt-1' fdt subimage
+     Description:  fdt
+     Created:      2017-10-20  14:32:29 UTC
+     Type:         Flat Device Tree
+     Compression:  uncompressed
+     Data Start:   0x847a2cb0
+     Data Size:    12111 Bytes = 11.8 KiB
+     Architecture: AArch64
+     Hash algo:    sha256
+     Hash value:   c517099db537f6d325e6be46b25c871a41331ad5af0283883fd29d40bfc14e1d
+   Verifying Hash Integrity ... sha256+ OK
+   Booting using the fdt blob at 0x847a2cb0
+   Uncompressing Kernel Image ... OK
+   reserving fdt memory region: addr=80000000 size=2000000
+   Loading Device Tree to 000000009fffa000, end 000000009fffff4e ... OK
+
+Starting kernel ...
+---------------------------------------->8----------------------------------------
+
+Please pay attention to the lines that start with "Verifying Hash Integrity".
+
+"Verifying Hash Integrity ... sha256,rsa2048:dev+ OK" means the signature check
+passed.
+
+"Verifying Hash Integrity ... sha256+ OK" (3 times) means the hash check passed
+for kernel, DTB, and Init ramdisk.
+
+If they are not displayed, the Verified Boot is not working.
+
+
+Deployment for Distro Boot
+--------------------------
+
+UniPhier SoC family boot the kernel in a generic manner as described in
+doc/develop/distro.rst.
+
+To boot the kernel, you need to deploy necesssary components to a file
+system on one of your block devices (eMMC, NAND, USB drive, etc.).
+
+The components depend on the kernel image format.
+
+[1] Bare images
+
+  - kernel
+  - init ramdisk
+  - device tree blob
+  - boot configuration file (extlinux.conf)
+
+Here is an exmple of the configuration file.
+
+-------------------->8--------------------
+menu title UniPhier Boot Options.
+
+timeout 50
+default UniPhier
+
+label UniPhier
+      kernel ../Image
+      initrd ../rootfs.cpio.gz
+      fdtdir ..
+-------------------->8--------------------
+
+Then, write 'Image', 'rootfs.cpio.gz', 'uniphier-ld20-ref.dtb' (DTB depends on
+your board), and 'extlinux/extlinux.conf' to the file system.
+
+[2] FIT
+
+  - FIT blob
+  - boot configuration file (extlinux.conf)
+
+-------------------->8--------------------
+menu title UniPhier Boot Options.
+
+timeout 50
+default UniPhier
+
+label UniPhier
+      kernel ../fitImage
+-------------------->8--------------------
+
+Since the init ramdisk and DTB are contained in the FIT blob,
+you do not need to describe them in the configuration file.
+Write 'fitImage' and 'extlinux/extlinux.conf' to the file system.
+
+
+UniPhier specific commands
+--------------------------
+
+ - pinmon (enabled by CONFIG_CMD_PINMON)
+     shows the boot mode pins that has been latched at the power-on reset
+
+ - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP)
+     shows the DDR PHY parameters set by the PHY training
+
+ - ddrmphy (enabled by CONFIG_CMD_DDRMPHY_DUMP)
+     shows the DDR Multi PHY parameters set by the PHY training
+
+
+Supported devices
+-----------------
+
+ - UART (on-chip)
+ - NAND
+ - SD/eMMC
+ - USB 2.0 (EHCI)
+ - USB 3.0 (xHCI)
+ - GPIO
+ - LAN (on-board SMSC9118)
+ - I2C
+ - EEPROM (connected to the on-board I2C bus)
+ - Support card (SRAM, NOR flash, some peripherals)
+
+
+Micro Support Card
+------------------
+
+The recommended bit switch settings are as follows:
+
+ SW2    OFF(1)/ON(0)   Description
+ ------------------------------------------
+ bit 1   <----         BKSZ[0]
+ bit 2   ---->         BKSZ[1]
+ bit 3   <----         SoC Bus Width 16/32
+ bit 4   <----         SERIAL_SEL[0]
+ bit 5   ---->         SERIAL_SEL[1]
+ bit 6   ---->         BOOTSWAP_EN
+ bit 7   <----         CS1/CS5
+ bit 8   <----         SOC_SERIAL_DISABLE
+
+ SW8    OFF(1)/ON(0)   Description
+ ------------------------------------------
+ bit 1    <----        CS1_SPLIT
+ bit 2    <----        CASE9_ON
+ bit 3    <----        CASE10_ON
+ bit 4  Don't Care     Reserve
+ bit 5  Don't Care     Reserve
+ bit 6  Don't Care     Reserve
+ bit 7    ---->        BURST_EN
+ bit 8    ---->        FLASHBUS32_16
+
+The BKSZ[1:0] specifies the address range of memory slot and peripherals
+as follows:
+
+ BKSZ    Description              RAM slot            Peripherals
+ --------------------------------------------------------------------
+ 0b00   15MB RAM / 1MB Peri    00000000-00efffff    00f00000-00ffffff
+ 0b01   31MB RAM / 1MB Peri    00000000-01efffff    01f00000-01ffffff
+ 0b10   64MB RAM / 1MB Peri    00000000-03efffff    03f00000-03ffffff
+ 0b11  127MB RAM / 1MB Peri    00000000-07efffff    07f00000-07ffffff
+
+Set BSKZ[1:0] to 0b01 for U-Boot.
+This mode is the most handy because EA[24] is always supported by the save pin
+mode of the system bus.  On the other hand, EA[25] is not supported for some
+newer SoCs.  Even if it is, EA[25] is not connected on most of the boards.
+
+--
+Masahiro Yamada <yamada.masahiro@socionext.com>
+Oct. 2017
diff --git a/doc/README.update b/doc/README.update
new file mode 100644
index 00000000000..bf4379279e2
--- /dev/null
+++ b/doc/README.update
@@ -0,0 +1,97 @@
+Automatic software update from a TFTP server
+============================================
+
+Overview
+--------
+
+This feature allows to automatically store software updates present on a TFTP
+server in NOR Flash. In more detail: a TFTP transfer of a file given in
+environment variable 'updatefile' from server 'serverip' is attempted during
+boot. The update file should be a FIT file, and can contain one or more
+updates. Each update in the update file has an address in NOR Flash where it
+should be placed, updates are also protected with a SHA-1 checksum. If the
+TFTP transfer is successful, the hash of each update is verified, and if the
+verification is positive, the update is stored in Flash.
+
+The auto-update feature is enabled by the CONFIG_UPDATE_TFTP macro:
+
+#define CONFIG_UPDATE_TFTP		1
+
+
+Note that when enabling auto-update, Flash support must be turned on.  Also,
+one must enable FIT and LIBFDT support:
+
+#define CONFIG_FIT		1
+#define CONFIG_OF_LIBFDT	1
+
+The auto-update feature uses the following configuration knobs:
+
+- CONFIG_UPDATE_LOAD_ADDR
+
+  Normally, TFTP transfer of the update file is done to the address specified
+  in environment variable 'loadaddr'. If this variable is not present, the
+  transfer is made to the address given in CONFIG_UPDATE_LOAD_ADDR (0x100000
+  by default).
+
+- CONFIG_UPDATE_TFTP_CNT_MAX
+  CONFIG_UPDATE_TFTP_MSEC_MAX
+
+  These knobs control the timeouts during initial connection to the TFTP
+  server. Since a transfer is attempted during each boot, it is undesirable to
+  have a long delay when a TFTP server is not present.
+  CONFIG_UPDATE_TFTP_MSEC_MAX specifies the number of milliseconds to wait for
+  the server to respond to initial connection, and CONFIG_UPDATE_TFTP_CNT_MAX
+  gives the number of such connection retries. CONFIG_UPDATE_TFTP_CNT_MAX must
+  be non-negative and is 0 by default, CONFIG_UPDATE_TFTP_MSEC_MAX must be
+  positive and is 100 by default.
+
+Since the update file is in FIT format, it is created from an *.its file using
+the mkimage tool. dtc tool with support for binary includes, e.g. in version
+1.2.0 or later, must also be available on the system where the update file is
+to be prepared. Refer to the doc/uImage.FIT/ directory for more details on FIT
+images.
+
+
+Example .its files
+------------------
+
+- doc/uImage.FIT/update_uboot.its
+
+  A simple example that can be used to create an update file for automatically
+  replacing U-Boot image on a system.
+
+  Assuming that an U-Boot image u-boot.bin is present in the current working
+  directory, and that the address given in the 'load' property in the
+  'update_uboot.its' file is where the U-Boot is stored in Flash, the
+  following command will create the actual update file 'update_uboot.itb':
+
+  mkimage -f update_uboot.its update_uboot.itb
+
+  Place 'update_uboot.itb' on a TFTP server, for example as
+  '/tftpboot/update_uboot.itb', and set the 'updatefile' variable
+  appropriately, for example in the U-Boot prompt:
+
+  setenv updatefile /tftpboot/update_uboot.itb
+  saveenv
+
+  Now, when the system boots up and the update TFTP server specified in the
+  'serverip' environment variable is accessible, the new U-Boot image will be
+  automatically stored in Flash.
+
+  NOTE: do make sure that the 'u-boot.bin' image used to create the update
+  file is a good, working image. Also make sure that the address in Flash
+  where the update will be placed is correct. Making mistake here and
+  attempting the auto-update can render the system unusable.
+
+- doc/uImage.FIT/update3.its
+
+  An example containing three updates. It can be used to update Linux kernel,
+  ramdisk and FDT blob stored in Flash. The procedure for preparing the update
+  file is similar to the example above.
+
+TFTP update via DFU
+-------------------
+
+- It is now possible to update firmware (bootloader, kernel, rootfs, etc.) via
+  TFTP by using DFU (Device Firmware Upgrade). More information can be found in
+  ./doc/README.dfutftp documentation entry.
diff --git a/doc/README.usb b/doc/README.usb
new file mode 100644
index 00000000000..650a6daae0a
--- /dev/null
+++ b/doc/README.usb
@@ -0,0 +1,230 @@
+SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2001
+ * Denis Peter, MPL AG Switzerland
+ */
+
+USB Support
+===========
+
+The USB support is implemented on the base of the UHCI Host
+controller.
+
+Currently supported are USB Hubs, USB Keyboards, USB Floppys, USB
+flash sticks and USB network adaptors.
+Tested with a TEAC Floppy TEAC FD-05PUB and Chicony KU-8933 Keyboard.
+
+How it works:
+-------------
+
+The USB (at least the USB UHCI) needs a frame list (4k), transfer
+descriptor and queue headers which are all located in the main memory.
+The UHCI allocates every millisecond the PCI bus and reads the current
+frame pointer. This may cause to crash the OS during boot. So the USB
+_MUST_ be stopped during OS boot. This is the reason, why the USB is
+NOT automatically started during start-up. If someone needs the USB
+he has to start it and should therefore be aware that he had to stop
+it before booting the OS.
+
+For USB keyboards this can be done by a script which is automatically
+started after the U-Boot is up and running. To boot an OS with a
+USB keyboard another script is necessary, which first disables the
+USB and then executes the boot command. If the boot command fails,
+the script can re-enable the USB keyboard.
+
+Common USB Commands:
+- usb start:
+- usb reset:	    (re)starts the USB. All USB devices will be
+		    initialized and a device tree is build for them.
+- usb tree:	    shows all USB devices in a tree like display
+- usb info [dev]:   shows all USB infos of the device dev, or of all
+		    the devices
+- usb stop [f]:	    stops the USB. If f==1 the USB will also stop if
+		    a USB keyboard is assigned as stdin. The stdin
+		    is then switched to serial input.
+Storage USB Commands:
+- usb scan:	    scans the USB for storage devices. The USB must be
+		    running for this command (usb start)
+- usb device [dev]: show or set current USB storage device
+- usb part [dev]:   print partition table of one or all USB storage
+		    devices
+- usb read addr blk# cnt:
+		    read `cnt' blocks starting at block `blk#'to
+		    memory address `addr'
+- usbboot addr dev:part:
+		    boot from USB device
+
+Config Switches:
+----------------
+CONFIG_CMD_USB	    enables basic USB support and the usb command
+CONFIG_USB_UHCI	    defines the lowlevel part. A lowlevel part must be defined
+		    if using CONFIG_CMD_USB
+CONFIG_USB_KEYBOARD enables the USB Keyboard
+CONFIG_USB_STORAGE  enables the USB storage devices
+CONFIG_USB_HOST_ETHER	enables USB ethernet adapter support
+
+
+USB Host Networking
+===================
+
+If you have a supported USB Ethernet adapter you can use it in U-Boot
+to obtain an IP address and load a kernel from a network server.
+
+Note: USB Host Networking is not the same as making your board act as a USB
+client. In that case your board is pretending to be an Ethernet adapter
+and will appear as a network interface to an attached computer. In that
+case the connection is via a USB cable with the computer acting as the host.
+
+With USB Host Networking, your board is the USB host. It controls the
+Ethernet adapter to which it is directly connected and the connection to
+the outside world is your adapter's Ethernet cable. Your board becomes an
+independent network device, able to connect and perform network operations
+independently of your computer.
+
+
+Device support
+--------------
+
+Currently supported devices are listed in the drivers according to
+their vendor and product IDs. You can check your device by connecting it
+to a Linux machine and typing 'lsusb'. The drivers are in
+drivers/usb/eth.
+
+For example this lsusb output line shows a device with Vendor ID 0x0x95
+and product ID 0x7720:
+
+Bus 002 Device 010: ID 0b95:7720 ASIX Electronics Corp. AX88772
+
+If you look at drivers/usb/eth/asix.c you will see this line within the
+supported device list, so we know this adapter is supported.
+
+	{ 0x0b95, 0x7720 },	/* Trendnet TU2-ET100 V3.0R */
+
+If your adapter is not listed there is a still a chance that it will
+work. Try looking up the manufacturer of the chip inside your adapter.
+or take the adapter apart and look for chip markings. Then add a line
+for your vendor/product ID into the table of the appropriate driver,
+build U-Boot and see if it works. If not then there might be differences
+between the chip in your adapter and the driver. You could try to get a
+datasheet for your device and add support for it to U-Boot. This is not
+particularly difficult - you only need to provide support for four basic
+functions: init, halt, send and recv.
+
+
+Enabling USB Host Networking
+----------------------------
+
+The normal U-Boot commands are used with USB networking, but you must
+start USB first. For example:
+
+usb start
+setenv bootfile /tftpboot/uImage
+bootp
+
+
+To enable USB Host Ethernet in U-Boot, your platform must of course
+support USB with CONFIG_CMD_USB enabled and working. You will need to
+add some settings to your board configuration:
+
+CONFIG_CMD_USB=y		/* the 'usb' interactive command */
+CONFIG_USB_HOST_ETHER=y		/* Enable USB Ethernet adapters */
+
+and one or more of the following for individual adapter hardware:
+
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_LAN75XX=y
+CONFIG_USB_ETHER_LAN78XX=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+
+As with built-in networking, you will also want to enable some network
+commands, for example:
+
+CONFIG_CMD_NET=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_DHCP=y
+
+and some bootp options, which tell your board to obtain its subnet,
+gateway IP, host name and boot path from the bootp/dhcp server. These
+settings should start you off:
+
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+You can also set the default IP address of your board and the server
+as well as the default file to load when a 'bootp' command is issued.
+However note that encoding these individual network settings into a
+common executable is discouraged, as it leads to potential conflicts,
+and all the parameters can either get stored in the board's external
+environment, or get obtained from the bootp server if not set.
+
+#define CONFIG_IPADDR		10.0.0.2  (replace with your value)
+#define CONFIG_SERVERIP		10.0.0.1  (replace with your value)
+#define CONFIG_BOOTFILE		"uImage"
+
+The 'usb start' command should identify the adapter something like this:
+
+CrOS> usb start
+(Re)start USB...
+USB EHCI 1.00
+scanning bus for devices... 3 USB Device(s) found
+       scanning bus for storage devices... 0 Storage Device(s) found
+       scanning bus for ethernet devices... 1 Ethernet Device(s) found
+CrOS> print ethact
+ethact=asx0
+
+You can see that it found an ethernet device and we can print out the
+device name (asx0 in this case).
+
+Then 'bootp' or 'dhcp' should use it to obtain an IP address from DHCP,
+perhaps something like this:
+
+CrOS> bootp
+Waiting for Ethernet connection... done.
+BOOTP broadcast 1
+BOOTP broadcast 2
+DHCP client bound to address 172.22.73.81
+Using asx0 device
+TFTP from server 172.22.72.144; our IP address is 172.22.73.81
+Filename '/tftpboot/uImage-sjg-seaboard-261347'.
+Load address: 0x40c000
+Loading: #################################################################
+	 #################################################################
+	 #################################################################
+	 ################################################
+done
+Bytes transferred = 3557464 (364858 hex)
+CrOS>
+
+
+Another way of doing this is to issue a tftp command, which will cause the
+bootp to happen automatically.
+
+
+MAC Addresses
+-------------
+
+Most Ethernet dongles have a built-in MAC address which is unique in the
+world. This is important so that devices on the network can be
+distinguished from each other. MAC address conflicts are evil and
+generally result in strange and erratic behaviour.
+
+Some boards have USB Ethernet chips on-board, and these sometimes do not
+have an assigned MAC address. In this case it is up to you to assign
+one which is unique. You should obtain a valid MAC address from a range
+assigned to you before you ship the product.
+
+Built-in Ethernet adapters support setting the MAC address by means of
+an ethaddr environment variable for each interface (ethaddr, eth1addr,
+eth2addr). There is similar support on the USB network side, using the
+names usbethaddr, usbeth1addr, etc. They are kept separate since we
+don't want a USB device taking the MAC address of a built-in device or
+vice versa.
+
+So if your USB Ethernet chip doesn't have a MAC address available then
+you must set usbethaddr to a suitable MAC address. At the time of
+writing this functionality is only supported by the SMSC driver.
diff --git a/doc/README.vf610 b/doc/README.vf610
new file mode 100644
index 00000000000..38cf5cfd202
--- /dev/null
+++ b/doc/README.vf610
@@ -0,0 +1,10 @@
+U-Boot for Freescale Vybrid VF610
+
+This file contains information for the port of U-Boot to the Freescale Vybrid
+VF610 SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in fuse bank 4, with the 16 msbs in word 2 and the
+    32 lsbs in word 3.
diff --git a/doc/README.video b/doc/README.video
new file mode 100644
index 00000000000..ced35bd2db5
--- /dev/null
+++ b/doc/README.video
@@ -0,0 +1,97 @@
+SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2000
+ * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
+ */
+
+"video-mode" environment variable
+=================================
+
+The 'video-mode' environment variable can be used to enable and configure
+some video drivers.  The format matches the video= command-line option used
+for Linux:
+
+	video-mode=<driver>:<xres>x<yres>-<depth>@<freq><,option=string>
+
+	<driver>	The video driver name, ignored by U-Boot
+	<xres>		The X resolution (in pixels) to use.
+	<yres>		The Y resolution (in pixels) to use.
+	<depth>		The color depth (in bits) to use.
+	<freq>		The frequency (in Hz) to use.
+	<options>	A comma-separated list of device-specific options
+
+
+U-Boot MPC8xx video controller driver
+=====================================
+
+The driver has been tested with the following configurations:
+
+- MPC823FADS with AD7176 on a PAL TV (YCbYCr)	- arsenio@tin.it
+
+Example: video-mode=fslfb:1280x1024-32@60,monitor=dvi
+
+
+U-Boot sunxi video controller driver
+====================================
+
+U-Boot supports hdmi and lcd output on Allwinner sunxi SoCs, lcd output
+requires the CONFIG_VIDEO_LCD_MODE Kconfig value to be set.
+
+The sunxi U-Boot driver supports the following video-mode options:
+
+- monitor=[none|dvi|hdmi|lcd|vga|composite-*] - Select the video output to use
+ none:     Disable video output.
+ dvi/hdmi: Selects output over the hdmi connector with dvi resp. hdmi output
+           format, if edid is used the format is automatically selected.
+ lcd:      Selects video output to a LCD screen.
+ vga:      Selects video output over the VGA connector.
+ composite-pal/composite-ntsc/composite-pal-m/composite-pal-nc:
+           Selects composite video output, note the specified resolution is
+           ignored with composite video output.
+ Defaults to monitor=dvi.
+
+- hpd=[0|1] - Enable use of the hdmi HotPlug Detect feature
+ 0: Disabled. Configure dvi/hdmi output even if no cable is detected
+ 1: Enabled.  Fallback to the lcd / vga / none in that order (if available)
+ Defaults to hpd=1.
+
+- hpd_delay=<int> - How long to wait for the hdmi HPD signal in milliseconds
+ When the monitor and the board power up at the same time, it may take some
+ time for the monitor to assert the HPD signal. This configures how long to
+ wait for the HPD signal before assuming no cable is connected.
+ Defaults to hpd_delay=500.
+
+- edid=[0|1] - Enable use of DDC + EDID to get monitor info
+ 0: Disabled.
+ 1: Enabled. If valid EDID info was read from the monitor the EDID info will
+    overrides the xres, yres and refresh from the video-mode env. variable.
+ Defaults to edid=1.
+
+- overscan_x/overscan_y=<int> - Set x/y overscan value
+ This configures a black border on the left and right resp. top and bottom
+ to deal with overscanning displays. Defaults to overscan_x=32 and
+ overscan_y=20 for composite monitors, 0 for other monitors.
+
+For example to always use the hdmi connector, even if no cable is inserted,
+using edid info when available and otherwise initalizing it at 1024x768@60Hz,
+use: "setenv video-mode sunxi:1024x768-24@60,monitor=dvi,hpd=0,edid=1".
+
+
+TrueType fonts
+--------------
+
+U-Boot supports the use of antialiased TrueType fonts on some platforms. This
+has been tested in x86, ARMv7 and sandbox.
+
+To enable this, select CONFIG_CONSOLE_TRUETYPE. You can choose between several
+fonts, with CONSOLE_TRUETYPE_NIMBUS being the default.
+
+TrueType support requires floating point at present. On ARMv7 platforms you
+need to disable use of the private libgcc. You can do this by disabling
+CONFIG_USE_PRIVATE_LIBGCC. See chromebook_jerry for an example. Note that this
+increases U-Boot's size by about 70KB at present.
+
+On ARM you should also make sure your toolchain supports hardfp. This is
+normally given in the name of your toolchain, e.g. arm-linux-gnueabihf (hf
+means hardware floating point). You can also run gcc with -v to see if it has
+this option.
diff --git a/doc/README.watchdog b/doc/README.watchdog
new file mode 100644
index 00000000000..c50dc79e15e
--- /dev/null
+++ b/doc/README.watchdog
@@ -0,0 +1,27 @@
+Watchdog driver general info
+
+CONFIG_HW_WATCHDOG
+	This enables hw_watchdog_reset to be called during various loops,
+	including waiting for a character on a serial port. But it
+	does not also call hw_watchdog_init. Boards which want this
+	enabled must call this function in their board file. This split
+	is useful because some rom's enable the watchdog when downloading
+	new code, so it must be serviced, but the board would rather it
+	was off. And, it cannot always be turned off once on.
+
+CONFIG_WATCHDOG_TIMEOUT_MSECS
+	Can be used to change the timeout for i.mx31/35/5x/6x.
+	If not given, will default to maximum timeout. This would
+	be 128000 msec for i.mx31/35/5x/6x.
+
+CONFIG_WDT_AT91
+	Available for AT91SAM9 to service the watchdog.
+
+CONFIG_IMX_WATCHDOG
+	Available for i.mx31/35/5x/6x to service the watchdog. This is not
+	automatically set because some boards (vision2) still need to define
+	their own hw_watchdog_reset routine.
+	TODO: vision2 is removed now, so perhaps this can be changed.
+
+CONFIG_XILINX_TB_WATCHDOG
+	Available for Xilinx Axi platforms to service timebase watchdog timer.
diff --git a/doc/README.zfs b/doc/README.zfs
new file mode 100644
index 00000000000..7f237c4076f
--- /dev/null
+++ b/doc/README.zfs
@@ -0,0 +1,29 @@
+This patch series adds support for ZFS listing and load to u-boot.
+
+To Enable zfs ls and load commands, modify the board specific config file with
+#define CONFIG_CMD_ZFS
+
+Steps to test:
+
+1. After applying the patch, zfs specific commands can be seen
+   in the boot loader prompt using
+	UBOOT #help
+
+	zfsload- load binary file from a ZFS file system
+	zfsls  - list files in a directory (default /)
+
+2. To list the files in zfs pool, device or partition, execute
+	zfsls <interface> <dev[:part]> [POOL/@/dir/file]
+	For example:
+	UBOOT #zfsls mmc 0:5 /rpool/@/usr/bin/
+
+3. To read and load a file from an ZFS formatted partition to RAM, execute
+	zfsload <interface> <dev[:part]> [addr] [filename] [bytes]
+	For example:
+	UBOOT #zfsload mmc 2:2 0x30007fc0 /rpool/@/boot/uImage
+
+References :
+	-- ZFS GRUB sources from Solaris GRUB-0.97
+	-- GRUB Bazaar repository
+
+Jorgen Lundman <lundman at lundman.net> 2012.
diff --git a/doc/SPI/README.altera_spi b/doc/SPI/README.altera_spi
new file mode 100644
index 00000000000..b07449f80d6
--- /dev/null
+++ b/doc/SPI/README.altera_spi
@@ -0,0 +1,6 @@
+SoCFPGA EPCS/EPCQx1 mini howto:
+- Instantiate EPCS/EPCQx1 Serial flash controller in QSys and rebuild
+- The controller base address is the "Base" in QSys + 0x400
+- Set MSEL[4:0]=10010 (AS Standard)
+- Load the bitstream into FPGA, enable bridges
+- Only then will the driver work
diff --git a/doc/SPI/README.ftssp010_spi_test b/doc/SPI/README.ftssp010_spi_test
new file mode 100644
index 00000000000..1d86f3623f9
--- /dev/null
+++ b/doc/SPI/README.ftssp010_spi_test
@@ -0,0 +1,41 @@
+SPI Flash test on Faraday A369 EVB:
+==================================
+
+U-Boot 2014.01-rc2-g3444b6f (Dec 20 2013 - 10:58:40)
+
+CPU:   FA626TE 528 MHz
+AHB:   132 MHz
+APB:   66 MHz
+I2C:   ready
+DRAM:  256 MiB
+MMU:   on
+NAND:  512 MiB
+MMC:   ftsdc010: 0
+*** Warning - bad CRC, using default environment
+
+In:    serial
+Out:   serial
+Err:   serial
+Net:   FTGMAC100#0
+Hit any key to stop autoboot:  0
+=> sf probe 0:0
+SF: Detected MX25L1605D with page size 256 Bytes, erase size 64 KiB, total 2 MiB
+=> sf read 0x10800000 0 0x400
+SF: 1024 bytes @ 0x0 Read: OK
+=> md 0x10800000
+10800000: ea000013 e59ff014 e59ff014 e59ff014    ................
+10800010: e59ff014 e59ff014 e59ff014 e59ff014    ................
+10800020: 1ff7b0c0 1ff7b120 1ff7b180 1ff7b1e0    .... ...........
+10800030: 1ff7b240 1ff7b2a0 1ff7b300 deadbeef    @...............
+10800040: 10800000 0002c1f0 0007409c 00032048    .........@..H ..
+10800050: 1fd6af40 e10f0000 e3c0001f e38000d3    @...............
+10800060: e129f000 eb000001 eb000223 e12fff1e    ..).....#...../.
+10800070: e3a00000 ee070f1e ee080f17 ee070f15    ................
+10800080: ee070f9a ee110f10 e3c00c03 e3c00087    ................
+10800090: e3c00a02 e3800002 e3800a01 ee010f10    ................
+108000a0: e1a0c00e eb007a68 e1a0e00c e1a0f00e    ....hz..........
+108000b0: e1a00000 e1a00000 e1a00000 e1a00000    ................
+108000c0: e51fd078 e58de000 e14fe000 e58de004    x.........O.....
+108000d0: e3a0d013 e169f00d e1a0e00f e1b0f00e    ......i.........
+108000e0: e24dd048 e88d1fff e51f20a0 e892000c    H.M...... ......
+108000f0: e28d0048 e28d5034 e1a0100e e885000f    H...4P..........
diff --git a/doc/SPI/README.sandbox-spi b/doc/SPI/README.sandbox-spi
new file mode 100644
index 00000000000..f6a55fe7800
--- /dev/null
+++ b/doc/SPI/README.sandbox-spi
@@ -0,0 +1,42 @@
+Sandbox SPI/SPI Flash Implementation
+====================================
+
+U-Boot supports SPI and SPI flash emulation in sandbox. This must be enabled
+via a device tree.
+
+For example:
+
+	spi@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0 1>;
+		compatible = "sandbox,spi";
+		cs-gpios = <0>, <&gpio_a 0>;
+		spi.bin@0 {
+			reg = <0>;
+			compatible = "spansion,m25p16", "jedec,spi-nor";
+			spi-max-frequency = <40000000>;
+			sandbox,filename = "spi.bin";
+		};
+	};
+
+Supported chips are W25Q16 (2MB), W25Q32 (4MB) and W25Q128 (16MB). Once
+U-Boot it started you can use 'sf' commands as normal. For example:
+
+$ dd if=/dev/zero of=spi.bin bs=1M count=2
+$ u-boot -T
+
+Since the SPI bus is fully implemented as well as the SPI flash connected to
+it, you can also use low-level SPI commands to access the flash. For example
+this reads the device ID from the emulated chip:
+
+=> sspi 0 32 9f
+SF: Detected m25p16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB
+FF202015
+
+
+Simon Glass
+sjg@chromium.org
+7/11/2013
+Note that the sandbox SPI implementation was written by Mike Frysinger
+<vapier@gentoo.org>.
diff --git a/doc/SPI/README.sh_qspi_test b/doc/SPI/README.sh_qspi_test
new file mode 100644
index 00000000000..8a33fec32fd
--- /dev/null
+++ b/doc/SPI/README.sh_qspi_test
@@ -0,0 +1,38 @@
+-------------------------------------------------
+   Simple steps used to test the SH-QSPI at U-Boot
+-------------------------------------------------
+
+#0, Currently, SH-QSPI is used by lager board (Renesas ARM SoC R8A7790)
+    and koelsch board (Renesas ARM SoC R8A7791). These boot from SPI ROM
+    basically. Thus, U-Boot start, SH-QSPI will is operating normally.
+
+#1, build U-Boot and load u-boot.bin
+
+  => tftpboot 40000000 u-boot.bin
+  sh_eth Waiting for PHY auto negotiation to complete.. done
+  sh_eth: 100Base/Half
+  Using sh_eth device
+  TFTP from server 192.168.169.1; our IP address is 192.168.169.79
+  Filename 'u-boot.bin'.
+  Load address: 0x40000000
+  Loading: ############
+    2.5 MiB/s
+  done
+  Bytes transferred = 175364 (2ad04 hex)
+
+#2, Commands to erase/write u-boot to flash device
+
+  Note: This method is description of the lager board. If you want to use the
+  other boards, please change the value according to each environment.
+
+  =>  sf probe 0
+  SF: Detected S25FL512S_256K with page size 512 Bytes, erase size 64 KiB, total 64 MiB
+  => sf erase 80000 40000
+  SF: 262144 bytes @ 0x80000 Erased: OK
+  => sf write 40000000 80000 175364
+  SF: 1528676 bytes @ 0x80000 Written: OK
+  =>
+
+#3, Push reset button.
+
+  If you're written correctly and driver works properly, U-Boot starts.
diff --git a/doc/SPI/status.txt b/doc/SPI/status.txt
new file mode 100644
index 00000000000..13889f54557
--- /dev/null
+++ b/doc/SPI/status.txt
@@ -0,0 +1,32 @@
+Status on SPI subsystem:
+=======================
+
+SPI COMMAND (common/cmd_sf, cmd_spi):
+-
+
+SPI FLASH (drivers/mtd/spi):
+- sf_probe.c: SPI flash probing code.
+- sf_ops.c: SPI flash operations code.
+- sf.c: SPI flash interface, which interacts controller driver.
+- Bank Address Register (Accessing flashes > 16Mbytes in 3-byte addressing)
+- Added memory_mapped support for read operations.
+- Common probe support for all supported flash vendors except, ramtron.
+- Extended read commands support(dual read, dual IO read)
+- Quad Page Program support.
+- Quad Read support(quad fast read, quad IO read)
+- Dual flash connection topology support(accessing two spi flash memories with single cs)
+- Banking support on dual flash connection topology.
+
+SPI DRIVERS (drivers/spi):
+-
+
+TODO:
+- Runtime detection of spi_flash params, SFDP(if possible)
+- Add support for multibus build/accessing.
+- Need proper cleanups on spi_flash and drivers.
+
+--
+Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
+18-09-2013.
+07-10-2013.
+08-01-2014.
diff --git a/doc/SPL/README.am335x-network b/doc/SPL/README.am335x-network
new file mode 100644
index 00000000000..9599729d8f9
--- /dev/null
+++ b/doc/SPL/README.am335x-network
@@ -0,0 +1,96 @@
+USING AM335x NETBOOT FEATURE
+
+ Some boards (like TI AM335x based ones) have quite big on-chip RAM and
+have support for booting via network in ROM. The following describes
+how to setup network booting and then optionally use this support to flash
+NAND and bricked (empty) board with only a network cable.
+
+ I. Building the required images
+  1. You have to enable generic SPL configuration options (see
+doc/README.SPL) as well as CONFIG_SPL_NET,
+CONFIG_SPL_ETH, CONFIG_SPL_LIBGENERIC_SUPPORT and
+CONFIG_SPL_LIBCOMMON_SUPPORT in your board configuration file to build
+SPL with support for booting over the network. Also you have to enable
+the driver for the NIC used and CONFIG_SPL_BOARD_INIT option if your
+board needs some board-specific initialization (TI AM335x EVM does).
+If you want SPL to use some Vendor Class Identifier (VCI) you can set
+one with CONFIG_SPL_NET_VCI_STRING option. am335x_evm configuration
+comes with support for network booting preconfigured.
+ 2. Define CONFIG_BOOTCOMMAND for your board to load and run debrick
+script after boot:
+#define CONFIG_BOOTCOMMAND					\
+	"setenv autoload no; "					\
+	"bootp; "						\
+	"if tftp 80000000 debrick.scr; then "			\
+		"source 80000000; "				\
+	"fi"
+(Or create additional board configuration with such option).
+ 3. Build U-Boot as usual
+  $ make <your_board_name>
+    You will need u-boot.img and spl/u-boot.bin images to perform
+network boot. Copy them to u-boot-restore.img and
+u-boot-spl-restore.bin respectively to distinguish this version
+(with automatic restore running) from the main one.
+
+ II. Host configuration.
+  1. Setup DHCP server (recommended server is ISC DHCPd).
+   - Install DHCP server and setup it to listen on the interface you
+chose to connect to the board (usually configured in
+/etc/default/dhcpd or /etc/default/isc-dhcp-server). Make sure there
+are no other active DHCP servers in the same network segment.
+   - Edit your dhcpd.conf and subnet declaration matching the address
+on the interface. Specify the range of assigned addresses and bootfile
+to use. IMPORTANT! Both RBL and SPL use the image filename provided
+in the BOOTP reply but obviously they need different images (RBL needs
+raw SPL image -- u-boot-spl-restore.bin while SPL needs main U-Boot
+image -- u-boot-restore.img). So you have to configure DHCP server to
+provide different image filenames to RBL and SPL (and possibly another
+one to main U-Boot). This can be done by checking Vendor Class
+Identifier (VCI) set by BOOTP client (RBL sets VCI to "DM814x ROM v1.0"
+and you can set VCI used by SPL with CONFIG_SPL_NET_VCI_STRING option,
+see above).
+   - If you plan to use TFTP server on another machine you have to set
+server-name option to point to it.
+   - Here is sample configuration for ISC DHCPd, assuming the interface
+used to connect to the board is eth0, and it has address 192.168.8.1:
+
+subnet 192.168.8.0 netmask 255.255.255.0 {
+  range dynamic-bootp 192.168.8.100 192.168.8.199;
+
+  if substring (option vendor-class-identifier, 0, 10) = "DM814x ROM" {
+    filename "u-boot-spl-restore.bin";
+  } elsif substring (option vendor-class-identifier, 0, 17) = "AM335x U-Boot SPL" {
+    filename "u-boot-restore.img";
+  } else {
+    filename "uImage";
+  }
+}
+
+  May the ROM bootloader sends another "vendor-class-identifier"
+  on the shc board with an AM335X it is:
+  "AM335x ROM"
+
+  2. Setup TFTP server.
+     Install TFTP server and put image files to it's root directory
+(likely /tftpboot or /var/lib/tftpboot or /srv/tftp). You will need
+u-boot.img and spl/u-boot-spl-bin files from U-Boot build directory.
+
+ III. Reflashing (debricking) the board.
+  1. Write debrick script. You will need to write a script that will
+be executed after network boot to perform actual rescue actions. You
+can use usual U-Boot commands from this script: tftp to load additional
+files, nand erase/nand write to erase/write the NAND flash.
+
+  2. Create script image from your script. From U-Boot build directory:
+
+$ ./tools/mkimage -A arm -O U-Boot -C none -T script -d <your script> debrick.scr
+
+This will create debrick.scr file with your script inside.
+
+  3. Copy debrick.scr to TFTP root directory. You also need to copy
+there all the files your script tries to load via TFTP. Example script
+loads u-boot.img and MLO. You have to create these files doing regular
+(not restore_flash) build and copy them to tftpboot directory.
+
+  4. Boot the board from the network, U-Boot will load debrick script
+and run it after boot.
diff --git a/doc/SPL/README.omap3 b/doc/SPL/README.omap3
new file mode 100644
index 00000000000..c0f4bab29b3
--- /dev/null
+++ b/doc/SPL/README.omap3
@@ -0,0 +1,52 @@
+Overview of SPL on OMAP3 devices
+================================
+
+Introduction
+------------
+
+This document provides an overview of how SPL functions on OMAP3 (and related
+such as am35x and am37x) processors.
+
+Methodology
+-----------
+
+On these platforms the ROM supports trying a sequence of boot devices.  Once
+one has been used successfully to load SPL this information is stored in memory
+and the location stored in a register.  We will read this to determine where to
+read U-Boot from in turn.
+
+Memory Map
+----------
+
+This is an example of a typical setup.  See top-level README for documentation
+of which CONFIG variables control these values.  For a given board and the
+amount of DRAM available to it different values may need to be used.
+Note that the size of the SPL text rodata and data is enforced with a CONFIG
+option and growing over that size results in a link error.  The SPL stack
+starts at the top of SRAM (which is configurable) and grows downward.  The
+space between the top of SRAM and the enforced upper bound on the size of the
+SPL text, data and rodata is considered the safe stack area.  Details on
+confirming this behavior are shown below.
+
+A portion of the system memory map looks as follows:
+SRAM: 0x40200000 - 0x4020FFFF
+DDR1: 0x80000000 - 0xBFFFFFFF
+
+Option 1 (SPL only):
+0x40200800 - 0x4020BBFF: Area for SPL text, data and rodata
+0x4020E000 - 0x4020FFFC: Area for the SPL stack.
+0x80000000 - 0x8007FFFF: Area for the SPL BSS.
+0x80100000: CONFIG_TEXT_BASE of U-Boot
+0x80208000 - 0x80307FFF: malloc() pool available to SPL.
+
+Option 2 (SPL or X-Loader):
+0x40200800 - 0x4020BBFF: Area for SPL text, data and rodata
+0x4020E000 - 0x4020FFFC: Area for the SPL stack.
+0x80008000: CONFIG_TEXT_BASE of U-Boot
+0x87000000 - 0x8707FFFF: Area for the SPL BSS.
+0x87080000 - 0x870FFFFF: malloc() pool available to SPL.
+
+For the areas that reside within DDR1 they must not be used prior to s_init()
+completing.  Note that CONFIG_TEXT_BASE must be clear of the areas that SPL
+uses while running.  This is why we have two versions of the memory map that
+only vary in where the BSS and malloc pool reside.
diff --git a/doc/SPL/README.spl-secure-boot b/doc/SPL/README.spl-secure-boot
new file mode 100644
index 00000000000..982fbec654d
--- /dev/null
+++ b/doc/SPL/README.spl-secure-boot
@@ -0,0 +1,18 @@
+Overview of SPL verified boot on powerpc/mpc85xx & arm/layerscape platforms
+===========================================================================
+
+Introduction
+------------
+
+This document provides an overview of how SPL verified boot works on powerpc/
+mpc85xx & arm/layerscape platforms.
+
+Methodology
+-----------
+
+The SPL image is responsible for loading the next stage boot loader, which is
+the main u-boot image. For secure boot process on these platforms ROM verifies
+SPL image, so to continue chain of trust SPL image verifies U-Boot image using
+spl_validate_uboot(). This function uses QorIQ Trust Architecture header
+(appended to U-Boot image) to validate the U-Boot binary just before passing
+control to it.
diff --git a/doc/android/ab.rst b/doc/android/ab.rst
new file mode 100644
index 00000000000..2adf88781d6
--- /dev/null
+++ b/doc/android/ab.rst
@@ -0,0 +1,78 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Android A/B updates
+===================
+
+Overview
+--------
+
+A/B system updates ensures modern approach for system update. This feature
+allows one to use two sets (or more) of partitions referred to as slots
+(normally slot A and slot B). The system runs from the current slot while the
+partitions in the unused slot can be updated [1]_.
+
+A/B enablement
+--------------
+
+The A/B updates support can be activated by specifying next options in
+your board configuration file::
+
+    CONFIG_ANDROID_AB=y
+    CONFIG_CMD_AB_SELECT=y
+
+The disk space on target device must be partitioned in a way so that each
+partition which needs to be updated has two or more instances. The name of
+each instance must be formed by adding suffixes: ``_a``, ``_b``, ``_c``, etc.
+For example: ``boot_a``, ``boot_b``, ``system_a``, ``system_b``, ``vendor_a``,
+``vendor_b``.
+
+As a result you can use ``ab_select`` command to ensure A/B boot process in your
+boot script. This command analyzes and processes A/B metadata stored on a
+special partition (e.g. ``misc``) and determines which slot should be used for
+booting up.
+
+If the A/B metadata partition has a backup bootloader_message block that is used
+to ensure one is always valid even in the event of interruption when writing, it
+can be enabled in your board configuration file::
+
+    CONFIG_ANDROID_AB_BACKUP_OFFSET=0x1000
+
+Command usage
+-------------
+
+.. code-block:: none
+
+    ab_select <slot_var_name> <interface> <dev[:part_number|#part_name]>
+
+for example::
+
+    => ab_select slot_name mmc 1:4
+
+or::
+
+    => ab_select slot_name mmc 1#misc
+
+Result::
+
+    => printenv slot_name
+    slot_name=a
+
+Based on this slot information, the current boot partition should be defined,
+and next kernel command line parameters should be generated:
+
+* ``androidboot.slot_suffix=``
+* ``root=``
+
+For example::
+
+    androidboot.slot_suffix=_a root=/dev/mmcblk1p12
+
+A/B metadata is organized according to AOSP reference [2]_. On the first system
+start with A/B enabled, when ``misc`` partition doesn't contain required data,
+the default A/B metadata will be created and written to ``misc`` partition.
+
+References
+----------
+
+.. [1] https://source.android.com/devices/tech/ota/ab
+.. [2] https://android.googlesource.com/platform/bootable/recovery/+/refs/tags/android-10.0.0_r25/bootloader_message/include/bootloader_message/bootloader_message.h
diff --git a/doc/android/avb2.rst b/doc/android/avb2.rst
new file mode 100644
index 00000000000..4aca7a5c660
--- /dev/null
+++ b/doc/android/avb2.rst
@@ -0,0 +1,139 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Android Verified Boot 2.0
+=========================
+
+This file contains information about the current support of Android Verified
+Boot 2.0 in U-Boot.
+
+Overview
+--------
+
+Verified Boot establishes a chain of trust from the bootloader to system images:
+
+* Provides integrity checking for:
+
+  * Android Boot image: Linux kernel + ramdisk. RAW hashing of the whole
+    partition is done and the hash is compared with the one stored in
+    the VBMeta image
+  * ``system``/``vendor`` partitions: verifying root hash of dm-verity hashtrees
+
+* Provides capabilities for rollback protection
+
+Integrity of the bootloader (U-Boot BLOB and environment) is out of scope.
+
+For additional details check [1]_.
+
+AVB using OP-TEE (optional)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+If AVB is configured to use OP-TEE (see `Enable on your board`_) rollback
+indexes and device lock state are stored in RPMB. The RPMB partition is managed
+by OP-TEE (see [2]_ for details) which is a secure OS leveraging ARM
+TrustZone.
+
+AVB 2.0 U-Boot shell commands
+-----------------------------
+
+Provides CLI interface to invoke AVB 2.0 verification + misc. commands for
+different testing purposes::
+
+    avb init <dev> - initialize avb 2 for <dev>
+    avb read_rb <num> - read rollback index at location <num>
+    avb write_rb <num> <rb> - write rollback index <rb> to <num>
+    avb is_unlocked - returns unlock status of the device
+    avb get_uuid <partname> - read and print uuid of partition <part>
+    avb read_part <partname> <offset> <num> <addr> - read <num> bytes from
+        partition <partname> to buffer <addr>
+    avb read_part_hex <partname> <offset> <num> - read <num> bytes from
+        partition <partname> and print to stdout
+    avb write_part <partname> <offset> <num> <addr> - write <num> bytes to
+        <partname> by <offset> using data from <addr>
+    avb read_pvalue <name> <bytes> - read a persistent value <name>
+    avb write_pvalue <name> <value> - write a persistent value <name>
+    avb verify [slot_suffix] - run verification process using hash data
+        from vbmeta structure
+        [slot_suffix] - _a, _b, etc (if vbmeta partition is slotted)
+
+Partitions tampering (example)
+------------------------------
+
+Boot or system/vendor (dm-verity metadata section) is tampered::
+
+   => avb init 1
+   => avb verify
+   avb_slot_verify.c:175: ERROR: boot: Hash of data does not match digest in
+   descriptor.
+   Slot verification result: ERROR_IO
+
+Vbmeta partition is tampered::
+
+   => avb init 1
+   => avb verify
+   avb_vbmeta_image.c:206: ERROR: Hash does not match!
+   avb_slot_verify.c:388: ERROR: vbmeta: Error verifying vbmeta image:
+   HASH_MISMATCH
+   Slot verification result: ERROR_IO
+
+Enable on your board
+--------------------
+
+The following options must be enabled::
+
+   CONFIG_LIBAVB=y
+   CONFIG_AVB_VERIFY=y
+   CONFIG_CMD_AVB=y
+
+In addtion optionally if storing rollback indexes in RPMB with help of
+OP-TEE::
+
+   CONFIG_TEE=y
+   CONFIG_OPTEE=y
+   CONFIG_OPTEE_TA_AVB=y
+   CONFIG_SUPPORT_EMMC_RPMB=y
+
+Then add ``avb verify`` invocation to your android boot sequence of commands,
+e.g.::
+
+   => avb_verify=avb init $mmcdev; avb verify;
+   => if run avb_verify; then                       \
+           echo AVB verification OK. Continue boot; \
+           set bootargs $bootargs $avb_bootargs;    \
+      else                                          \
+           echo AVB verification failed;            \
+           exit;                                    \
+      fi;                                           \
+
+   => emmc_android_boot=                                   \
+          echo Trying to boot Android from eMMC ...;       \
+          ...                                              \
+          run avb_verify;                                  \
+          mmc read ${fdtaddr} ${fdt_start} ${fdt_size};    \
+          mmc read ${loadaddr} ${boot_start} ${boot_size}; \
+               bootm $loadaddr $loadaddr $fdtaddr;         \
+
+If partitions you want to verify are slotted (have A/B suffixes), then current
+slot suffix should be passed to ``avb verify`` sub-command, e.g.::
+
+   => avb verify _a
+
+To switch on automatic generation of vbmeta partition in AOSP build, add these
+lines to device configuration mk file::
+
+   BOARD_AVB_ENABLE := true
+   BOARD_AVB_ALGORITHM := SHA512_RSA4096
+   BOARD_BOOTIMAGE_PARTITION_SIZE := <boot partition size>
+
+After flashing U-Boot don't forget to update environment and write new
+partition table::
+
+   => env default -f -a
+   => setenv partitions $partitions_android
+   => env save
+   => gpt write mmc 1 $partitions_android
+
+References
+----------
+
+.. [1] https://android.googlesource.com/platform/external/avb/+/master/README.md
+.. [2] https://www.op-tee.org/
diff --git a/doc/android/bcb.rst b/doc/android/bcb.rst
new file mode 100644
index 00000000000..2226517d39f
--- /dev/null
+++ b/doc/android/bcb.rst
@@ -0,0 +1,102 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Android Bootloader Control Block (BCB)
+======================================
+
+The purpose behind this file is to:
+
+* give an overview of BCB w/o duplicating public documentation
+* describe the main BCB use-cases which concern U-Boot
+* reflect current support status in U-Boot
+* mention any relevant U-Boot build-time tunables
+* precisely exemplify one or more use-cases
+
+Additions and fixes are welcome!
+
+Overview
+--------
+
+Bootloader Control Block (BCB) is a well established term/acronym in
+the Android namespace which refers to a location in a dedicated raw
+(i.e. FS-unaware) flash (e.g. eMMC) partition, usually called ``misc``,
+which is used as media for exchanging messages between Android userspace
+(particularly recovery [1]_) and an Android-capable bootloader.
+
+On higher level, BCB provides a way to implement a subset of Android
+Bootloader Requirements [2]_, amongst which are:
+
+* Android-specific bootloader flow [3]_
+* Get the "reboot reason" (and act accordingly) [4]_
+* Get/pass a list of commands from/to recovery [1]_
+* TODO
+
+
+'bcb'. Shell command overview
+-----------------------------
+
+The ``bcb`` command provides a CLI to facilitate the development of the
+requirements enumerated above. Below is the command's help message::
+
+   => bcb
+   bcb - Load/set/clear/test/dump/store Android BCB fields
+
+   Usage:
+   bcb load <interface> <dev> <part>  - load  BCB from <interface> <dev>:<part>
+   load <dev> <part>              - load  BCB from mmc <dev>:<part>
+   bcb set   <field> <val>        - set   BCB <field> to <val>
+   bcb clear [<field>]            - clear BCB <field> or all fields
+   bcb test  <field> <op> <val>   - test  BCB <field> against <val>
+   bcb dump  <field>              - dump  BCB <field>
+   bcb store                      - store BCB back to <interface>
+
+   Legend:
+   <interface> - storage device interface (virtio, mmc, etc)
+   <dev>       - storage device index containing the BCB partition
+   <part>      - partition index or name containing the BCB
+   <field>     - one of {command,status,recovery,stage,reserved}
+   <op>        - the binary operator used in 'bcb test':
+                 '=' returns true if <val> matches the string stored in <field>
+                 '~' returns true if <val> matches a subset of <field>'s string
+   <val>       - string/text provided as input to bcb {set,test}
+                 NOTE: any ':' character in <val> will be replaced by line feed
+                 during 'bcb set' and used as separator by upper layers
+
+
+'bcb'. Example of getting reboot reason
+---------------------------------------
+
+.. code-block:: bash
+
+   if bcb load 1 misc; then
+       # valid BCB found
+       if bcb test command = bootonce-bootloader; then
+           bcb clear command; bcb store;
+           # do the equivalent of AOSP ${fastbootcmd}
+           # i.e. call fastboot
+       else if bcb test command = boot-recovery; then
+           bcb clear command; bcb store;
+           # do the equivalent of AOSP ${recoverycmd}
+           # i.e. do anything required for booting into recovery
+       else
+           # boot Android OS normally
+       fi
+   else
+       # corrupted/non-existent BCB
+       # report error or boot non-Android OS (platform-specific)
+   fi
+
+
+Enable on your board
+--------------------
+
+The following Kconfig options must be enabled::
+
+   CONFIG_PARTITIONS=y
+   CONFIG_MMC=y
+   CONFIG_CMD_BCB=y
+
+.. [1] https://android.googlesource.com/platform/bootable/recovery
+.. [2] https://source.android.com/devices/bootloader
+.. [3] https://patchwork.ozlabs.org/patch/746835/
+       ("[U-Boot,5/6] Initial support for the Android Bootloader flow")
+.. [4] https://source.android.com/devices/bootloader/boot-reason
diff --git a/doc/android/boot-image.rst b/doc/android/boot-image.rst
new file mode 100644
index 00000000000..8f247c70933
--- /dev/null
+++ b/doc/android/boot-image.rst
@@ -0,0 +1,166 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Sam Protsenko <joe.skb7@gmail.com>
+
+Android Boot Image
+==================
+
+Overview
+--------
+
+Android Boot Image is used to boot Android OS. It usually contains kernel image
+(like ``zImage`` file) and ramdisk. Sometimes it can contain additional
+binaries. This image is built as a part of AOSP (called ``boot.img``), and being
+flashed into ``boot`` partition on eMMC. Bootloader then reads that image from
+``boot`` partition to RAM and boots the kernel from it. Kernel then starts
+``init`` process from the ramdisk. It should be mentioned that recovery image
+(``recovery.img``) also has Android Boot Image format.
+
+Android Boot Image format is described at [1]_. At the moment it can have one of
+next image headers:
+
+* v0: it's called *legacy* boot image header; used in devices launched before
+  Android 9; contains kernel image, ramdisk and second stage bootloader
+  (usually unused)
+* v1: used in devices launched with Android 9; adds ``recovery_dtbo`` field,
+  which should be used for non-A/B devices in ``recovery.img`` (see [2]_ for
+  details)
+* v2: used in devices launched with Android 10; adds ``dtb`` field, which
+  references payload containing DTB blobs (either concatenated one after the
+  other, or in Android DTBO image format)
+* v3: used in devices launched with Android 11; adds ``vendor_boot`` partition
+  and removes the second-stage bootloader and recovery image support. The new
+  ``vendor_boot`` partition holds the device tree blob (DTB) and a vendor ramdisk.
+  The generic ramdisk in ``boot`` partition is loaded immediately following
+  the vendor ramdisk.
+* v4: used in devices launched with Android 12; provides a boot signature in boot
+  image header, supports multiple vendor ramdisk fragments in ``vendor_boot``
+  partition. This version also adds a bootconfig section at the end of the vendor
+  boot image, this section contains boot configuration parameters known at build time
+  (see [9]_ for details).
+
+v2, v1 and v0 formats are backward compatible.
+
+The Android Boot Image format is represented by
+:c:type:`struct andr_image_data <andr_image_data>` in U-Boot, and can be seen in
+``include/android_image.h``. U-Boot supports booting Android Boot Image and also
+has associated command
+
+Booting
+-------
+
+U-Boot is able to boot the Android OS from Android Boot Image using ``bootm``
+command. In order to use Android Boot Image format support, next option should
+be enabled::
+
+    CONFIG_ANDROID_BOOT_IMAGE=y
+
+Then one can use next ``bootm`` command call to run Android:
+
+.. code-block:: bash
+
+    => bootm $loadaddr $loadaddr $fdtaddr
+
+where ``$loadaddr`` - address in RAM where boot image was loaded; ``$fdtaddr`` -
+address in RAM where DTB blob was loaded.
+
+And parameters are, correspondingly:
+
+  1. Where kernel image is located in RAM
+  2. Where ramdisk is located in RAM (can be ``"-"`` if not applicable)
+  3. Where DTB blob is located in RAM
+
+``bootm`` command will figure out that image located in ``$loadaddr`` has
+Android Boot Image format, will parse that and boot the kernel from it,
+providing DTB blob to kernel (from 3rd parameter), passing info about ramdisk to
+kernel via DTB.
+
+DTB and DTBO blobs
+------------------
+
+``bootm`` command can't just use DTB blob from Android Boot Image (``dtb``
+field), because:
+
+* there is no DTB area in Android Boot Image before v2
+* there may be several DTB blobs in DTB area (e.g. for different SoCs)
+* some DTBO blobs may have to be merged in DTB blobs before booting
+  (e.g. for different boards)
+
+So user has to prepare DTB blob manually and provide it in a 3rd parameter
+of ``bootm`` command. Next commands can be used to do so:
+
+1. ``abootimg``: manipulates Anroid Boot Image, allows one to extract
+   meta-information and payloads from it
+2. ``adtimg``: manipulates Android DTB/DTBO image [3]_, allows one to extract
+   DTB/DTBO blobs from it
+
+In order to use those, please enable next config options::
+
+    CONFIG_CMD_ABOOTIMG=y
+    CONFIG_CMD_ADTIMG=y
+
+For example, let's assume we have next Android partitions on eMMC:
+
+* ``boot``: contains Android Boot Image v2 (including DTB blobs)
+* ``dtbo``: contains DTBO blobs
+
+Then next command sequence can be used to boot Android:
+
+.. code-block:: bash
+
+    => mmc dev 1
+
+       # Read boot image to RAM (into $loadaddr)
+    => part start mmc 1 boot boot_start
+    => part size mmc 1 boot boot_size
+    => mmc read $loadaddr $boot_start $boot_size
+
+       # Read DTBO image to RAM (into $dtboaddr)
+    => part start mmc 1 dtbo dtbo_start
+    => part size mmc 1 dtbo dtbo_size
+    => mmc read $dtboaddr $dtbo_start $dtbo_size
+
+       # Copy required DTB blob (into $fdtaddr)
+    => abootimg get dtb --index=0 dtb0_start dtb0_size
+    => cp.b $dtb0_start $fdtaddr $dtb0_size
+
+       # Merge required DTBO blobs into DTB blob
+    => fdt addr $fdtaddr 0x100000
+    => adtimg addr $dtboaddr
+    => adtimg get dt --index=0 $dtbo0_addr
+    => fdt apply $dtbo0_addr
+
+       # Boot Android
+    => bootm $loadaddr $loadaddr $fdtaddr
+
+This sequence should be used for Android 10 boot. Of course, the whole Android
+boot procedure includes much more actions, like:
+
+* obtaining reboot reason from BCB (see [4]_)
+* implementing recovery boot
+* implementing fastboot boot
+* implementing A/B slotting (see [5]_)
+* implementing AVB2.0 (see [6]_)
+
+But Android Boot Image booting is the most crucial part in Android boot scheme.
+
+All Android bootloader requirements documentation is available at [7]_. Some
+overview on the whole Android 10 boot process can be found at [8]_.
+
+C API for working with Android Boot Image format
+------------------------------------------------
+
+.. kernel-doc:: boot/image-android.c
+   :internal:
+
+References
+----------
+
+.. [1] https://source.android.com/devices/bootloader/boot-image-header
+.. [2] https://source.android.com/devices/bootloader/recovery-image
+.. [3] https://source.android.com/devices/architecture/dto/partitions
+.. [4] :doc:`bcb`
+.. [5] :doc:`ab`
+.. [6] :doc:`avb2`
+.. [7] https://source.android.com/devices/bootloader
+.. [8] https://connect.linaro.org/resources/san19/san19-217/
+.. [9] https://source.android.com/docs/core/architecture/bootloader/implementing-bootconfig
diff --git a/doc/android/fastboot-protocol.rst b/doc/android/fastboot-protocol.rst
new file mode 100644
index 00000000000..8bd6d7168f1
--- /dev/null
+++ b/doc/android/fastboot-protocol.rst
@@ -0,0 +1,181 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+FastBoot Version 0.4
+====================
+
+The fastboot protocol is a mechanism for communicating with bootloaders
+over USB.  It is designed to be very straightforward to implement, to
+allow it to be used across a wide range of devices and from hosts running
+Linux, Windows, or OSX.
+
+Basic Requirements
+------------------
+
+* Two bulk endpoints (in, out) are required
+* Max packet size must be 64 bytes for full-speed and 512 bytes for
+  high-speed USB
+* The protocol is entirely host-driven and synchronous (unlike the
+  multi-channel, bi-directional, asynchronous ADB protocol)
+
+
+Transport and Framing
+---------------------
+
+1. Host sends a command, which is an ascii string in a single
+   packet no greater than 64 bytes.
+
+2. Client response with a single packet no greater than 64 bytes.
+   The first four bytes of the response are "OKAY", "FAIL", "DATA",
+   or "INFO".  Additional bytes may contain an (ascii) informative
+   message.
+
+   a. INFO -> the remaining 60 bytes are an informative message
+      (providing progress or diagnostic messages).  They should
+      be displayed and then step #2 repeats
+
+   b. FAIL -> the requested command failed.  The remaining 60 bytes
+      of the response (if present) provide a textual failure message
+      to present to the user.  Stop.
+
+   c. OKAY -> the requested command completed successfully.  Go to #5
+
+   d. DATA -> the requested command is ready for the data phase.
+      A DATA response packet will be 12 bytes long, in the form of
+      DATA00000000 where the 8 digit hexidecimal number represents
+      the total data size to transfer.
+
+3. Data phase.  Depending on the command, the host or client will
+   send the indicated amount of data.  Short packets are always
+   acceptable and zero-length packets are ignored.  This phase continues
+   until the client has sent or received the number of bytes indicated
+   in the "DATA" response above.
+
+4. Client responds with a single packet no greater than 64 bytes.
+   The first four bytes of the response are "OKAY", "FAIL", or "INFO".
+   Similar to #2:
+
+   a. INFO -> display the remaining 60 bytes and return to #4
+
+   b. FAIL -> display the remaining 60 bytes (if present) as a failure
+      reason and consider the command failed.  Stop.
+
+   c. OKAY -> success.  Go to #5
+
+5. Success.  Stop.
+
+
+Example Session
+---------------
+
+.. code-block:: none
+
+    Host:    "getvar:version"        request version variable
+
+    Client:  "OKAY0.4"               return version "0.4"
+
+    Host:    "getvar:nonexistant"    request some undefined variable
+
+    Client:  "OKAY"                  return value ""
+
+    Host:    "download:00001234"     request to send 0x1234 bytes of data
+
+    Client:  "DATA00001234"          ready to accept data
+
+    Host:    < 0x1234 bytes >        send data
+
+    Client:  "OKAY"                  success
+
+    Host:    "flash:bootloader"      request to flash the data to the bootloader
+
+    Client:  "INFOerasing flash"     indicate status / progress
+             "INFOwriting flash"
+             "OKAY"                  indicate success
+
+    Host:    "powerdown"             send a command
+
+    Client:  "FAILunknown command"   indicate failure
+
+
+Command Reference
+-----------------
+
+* Command parameters are indicated by printf-style escape sequences.
+
+* Commands are ascii strings and sent without the quotes (which are
+  for illustration only here) and without a trailing 0 byte.
+
+* Commands that begin with a lowercase letter are reserved for this
+  specification.  OEM-specific commands should not begin with a
+  lowercase letter, to prevent incompatibilities with future specs.
+
+.. code-block:: none
+
+ "getvar:%s"           Read a config/version variable from the bootloader.
+                       The variable contents will be returned after the
+                       OKAY response.
+
+ "download:%08x"       Write data to memory which will be later used
+                       by "boot", "ramdisk", "flash", etc.  The client
+                       will reply with "DATA%08x" if it has enough
+                       space in RAM or "FAIL" if not.  The size of
+                       the download is remembered.
+
+  "verify:%08x"        Send a digital signature to verify the downloaded
+                       data.  Required if the bootloader is "secure"
+                       otherwise "flash" and "boot" will be ignored.
+
+  "flash:%s"           Write the previously downloaded image to the
+                       named partition (if possible).
+
+  "erase:%s"           Erase the indicated partition (clear to 0xFFs)
+
+  "boot"               The previously downloaded data is a boot.img
+                       and should be booted according to the normal
+                       procedure for a boot.img
+
+  "continue"           Continue booting as normal (if possible)
+
+  "reboot"             Reboot the device.
+
+  "reboot-bootloader"  Reboot back into the bootloader.
+                       Useful for upgrade processes that require upgrading
+                       the bootloader and then upgrading other partitions
+                       using the new bootloader.
+
+  "powerdown"          Power off the device.
+
+  "ucmd"               execute any bootloader command and wait until it
+                       finishs.
+
+  "acmd"               execute any bootloader command, do not wait.
+
+Client Variables
+----------------
+
+The ``getvar:%s`` command is used to read client variables which
+represent various information about the device and the software
+on it.
+
+The various currently defined names are::
+
+  version             Version of FastBoot protocol supported.
+                      It should be "0.3" for this document.
+
+  version-bootloader  Version string for the Bootloader.
+
+  version-baseband    Version string of the Baseband Software
+
+  product             Name of the product
+
+  serialno            Product serial number
+
+  secure              If the value is "yes", this is a secure
+                      bootloader requiring a signature before
+                      it will install or boot images.
+
+  all                 Provides all info from commands above as
+                      they were called one by one
+
+Names starting with a lowercase character are reserved by this
+specification.  OEM-specific names should not start with lowercase
+characters.
diff --git a/doc/android/fastboot.rst b/doc/android/fastboot.rst
new file mode 100644
index 00000000000..6f92cd28eb1
--- /dev/null
+++ b/doc/android/fastboot.rst
@@ -0,0 +1,271 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Android Fastboot
+================
+
+Overview
+--------
+
+The protocol that is used over USB and UDP is described in [1]_.
+
+The current implementation supports the following standard commands:
+
+- ``boot``
+- ``continue``
+- ``download``
+- ``erase`` (if enabled)
+- ``flash`` (if enabled)
+- ``getvar``
+- ``reboot``
+- ``reboot-bootloader``
+- ``set_active`` (only a stub implementation which always succeeds)
+- ``ucmd`` (if enabled)
+- ``acmd`` (if enabled)
+
+The following OEM commands are supported (if enabled):
+
+- ``oem format`` - this executes ``gpt write mmc %x $partitions``
+- ``oem partconf`` - this executes ``mmc partconf %x <arg> 0`` to configure eMMC
+  with <arg> = boot_ack boot_partition
+- ``oem bootbus``  - this executes ``mmc bootbus %x %s`` to configure eMMC
+- ``oem run`` - this executes an arbitrary U-Boot command
+- ``oem console`` - this dumps U-Boot console record buffer
+- ``oem board`` - this executes a custom board function which is defined by the vendor
+
+Support for both eMMC and NAND devices is included.
+
+Client installation
+-------------------
+
+The counterpart to this is the fastboot client which can be found in
+Android's ``platform/system/core`` repository in the fastboot
+folder. It runs on Windows, Linux and OSX. The fastboot client is
+part of the Android SDK Platform-Tools and can be downloaded from [2]_.
+
+Board specific
+--------------
+
+USB configuration
+^^^^^^^^^^^^^^^^^
+
+The fastboot gadget relies on the USB download gadget, so the following
+options must be configured:
+
+::
+
+   CONFIG_USB_GADGET_DOWNLOAD
+   CONFIG_USB_GADGET_VENDOR_NUM
+   CONFIG_USB_GADGET_PRODUCT_NUM
+   CONFIG_USB_GADGET_MANUFACTURER
+
+NOTE: The ``CONFIG_USB_GADGET_VENDOR_NUM`` must be one of the numbers
+supported by the fastboot client. The list of vendor IDs supported can
+be found in the fastboot client source code.
+
+General configuration
+^^^^^^^^^^^^^^^^^^^^^
+
+The fastboot protocol requires a large memory buffer for
+downloads. This buffer should be as large as possible for a
+platform. The location of the buffer and size are set with
+``CONFIG_FASTBOOT_BUF_ADDR`` and ``CONFIG_FASTBOOT_BUF_SIZE``. These
+may be overridden on the fastboot command line using ``-l`` and
+``-s``.
+
+Fastboot environment variables
+------------------------------
+
+Partition aliases
+^^^^^^^^^^^^^^^^^
+
+Fastboot partition aliases can also be defined for devices where GPT
+limitations prevent user-friendly partition names such as ``boot``, ``system``
+and ``cache``.  Or, where the actual partition name doesn't match a standard
+partition name used commonly with fastboot.
+
+The current implementation checks aliases when accessing partitions by
+name (flash_write and erase functions).  To define a partition alias
+add an environment variable similar to::
+
+    fastboot_partition_alias_<alias partition name>=<actual partition name>
+
+for example::
+
+    fastboot_partition_alias_boot=LNX
+
+Raw partition descriptors
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+In cases where no partition table is present, a raw partition descriptor can be
+defined, specifying the offset, size, and optionally the MMC hardware partition
+number for a given partition name.
+
+This is useful when using fastboot to flash files (e.g. SPL or U-Boot) to a
+specific offset in the eMMC boot partition, without having to update the entire
+boot partition.
+
+To define a raw partition descriptor, add an environment variable similar to::
+
+    fastboot_raw_partition_<raw partition name>=<offset> <size> [mmcpart <num>]
+
+for example::
+
+    fastboot_raw_partition_boot=0x100 0x1f00 mmcpart 1
+
+Variable overrides
+^^^^^^^^^^^^^^^^^^
+
+Variables retrived through ``getvar`` can be overridden by defining
+environment variables of the form ``fastboot.<variable>``. These are
+looked up first so can be used to override values which would
+otherwise be returned. Using this mechanism you can also return types
+for NAND filesystems, as the fully parameterised variable is looked
+up, e.g.::
+
+    fastboot.partition-type:boot=jffs2
+
+Boot command
+^^^^^^^^^^^^
+
+When executing the fastboot ``boot`` command, if ``fastboot_bootcmd`` is set
+then that will be executed in place of ``bootm <CONFIG_FASTBOOT_BUF_ADDR>``.
+
+Partition Names
+---------------
+
+The Fastboot implementation in U-Boot allows to write images into disk
+partitions. Target partitions are referred on the host computer by
+their names.
+
+For GPT/EFI the respective partition name is used.
+
+For MBR the partitions are referred by generic names according to the
+following schema::
+
+    <device type><device index letter><partition index>
+
+Example: ``hda3``, ``sdb1``, ``usbda1``.
+
+The device type is as follows:
+
+  * IDE, ATAPI and SATA disks: ``hd``
+  * SCSI disks: ``sd``
+  * USB media: ``usbd``
+  * MMC and SD cards: ``mmcsd``
+  * Disk on chip: ``docd``
+  * other: ``xx``
+
+The device index starts from ``a`` and refers to the interface (e.g. USB
+controller, SD/MMC controller) or disk index. The partition index starts
+from ``1`` and describes the partition number on the particular device.
+
+Alternatively, partition types may be specified using :ref:`U-Boot's partition
+syntax <partitions>`. This allows specifying partitions like ``0.1``,
+``0#boot``, or ``:3``. The interface is always ``mmc``.
+
+Writing Partition Table
+-----------------------
+
+Fastboot also allows to write the partition table to the media. This can be
+done by writing the respective partition table image to a special target
+"gpt" or "mbr". These names can be customized by defining the following
+configuration options:
+
+::
+
+   CONFIG_FASTBOOT_GPT_NAME
+   CONFIG_FASTBOOT_MBR_NAME
+
+In Action
+---------
+
+Enter into fastboot by executing the fastboot command in U-Boot for either USB::
+
+   => fastboot usb 0
+
+or UDP::
+
+   => fastboot udp
+   link up on port 0, speed 100, full duplex
+   Using ethernet@4a100000 device
+   Listening for fastboot command on 192.168.0.102
+
+On the client side you can fetch the bootloader version for instance::
+
+   $ fastboot getvar version-bootloader
+   version-bootloader: U-Boot 2019.07-rc4-00240-g00c9f2a2ec
+   Finished. Total time: 0.005s
+
+or initiate a reboot::
+
+   $ fastboot reboot
+
+and once the client comes back, the board should reset.
+
+You can also specify a kernel image to boot. You have to either specify
+the an image in Android format *or* pass a binary kernel and let the
+fastboot client wrap the Android suite around it. On OMAP for instance you
+take zImage kernel and pass it to the fastboot client::
+
+   $ fastboot -b 0x80000000 -c "console=ttyO2 earlyprintk root=/dev/ram0 mem=128M" boot zImage
+   creating boot image...
+   creating boot image - 1847296 bytes
+   downloading 'boot.img'...
+   OKAY [  2.766s]
+   booting...
+   OKAY [ -0.000s]
+   finished. total time: 2.766s
+
+and on the U-Boot side you should see::
+
+   Starting download of 1847296 bytes
+   ........................................................
+   downloading of 1847296 bytes finished
+   Booting kernel..
+   ## Booting Android Image at 0x81000000 ...
+   Kernel load addr 0x80008000 size 1801 KiB
+   Kernel command line: console=ttyO2 earlyprintk root=/dev/ram0 mem=128M
+      Loading Kernel Image ... OK
+   OK
+
+   Starting kernel ...
+
+Running Shell Commands
+^^^^^^^^^^^^^^^^^^^^^^
+
+Normally, arbitrary U-Boot command execution is not enabled. This is so
+fastboot can be used to update systems using verified boot. However, such
+functionality can be useful for production or when verified boot is not in use.
+Enable ``CONFIG_FASTBOOT_OEM_RUN`` to use this functionality. This will enable
+``oem run`` command, which can be used with the fastboot client. For example,
+to print "Hello at 115200 baud" (or whatever ``CONFIG_BAUDRATE`` is), run::
+
+    $ fastboot oem run:'echo Hello at $baudrate baud'
+
+You can run any command you would normally run on the U-Boot command line,
+including multiple commands (using e.g. ``;`` or ``&&``) and control structures
+(``if``, ``while``, etc.). The exit code of ``fastboot`` will reflect the exit
+code of the command you ran.
+
+Running Custom Vendor Code
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+U-Boot allows you to execute custom fastboot logic, which can be defined
+in board/ files. It can still be used for production devices with verified
+boot, because the vendor defines logic at compile time by implementing
+fastboot_oem_board() function. The attacker will not be able to execute
+custom commands / code. For example, this can be useful for custom flashing
+or erasing protocols::
+
+    $ fastboot stage bootloader.img
+    $ fastboot oem board:write_bootloader
+
+In this case, ``cmd_parameter`` argument of the function ``fastboot_oem_board()``
+will contain string "write_bootloader" and ``data`` argument is a pointer to
+fastboot input buffer, which contains the contents of bootloader.img file.
+
+References
+----------
+
+.. [1] :doc:`fastboot-protocol`
+.. [2] https://developer.android.com/studio/releases/platform-tools
diff --git a/doc/android/index.rst b/doc/android/index.rst
new file mode 100644
index 00000000000..225d6f125a9
--- /dev/null
+++ b/doc/android/index.rst
@@ -0,0 +1,14 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Android-specific doc
+====================
+
+.. toctree::
+   :maxdepth: 2
+
+   ab
+   avb2
+   bcb
+   boot-image
+   fastboot-protocol
+   fastboot
diff --git a/doc/api/bootcount.rst b/doc/api/bootcount.rst
new file mode 100644
index 00000000000..968c679c3c6
--- /dev/null
+++ b/doc/api/bootcount.rst
@@ -0,0 +1,58 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Boot Count Limit
+================
+
+This is enabled by CONFIG_BOOTCOUNT_LIMIT.
+
+This allows to detect multiple failed attempts to boot Linux.
+
+After a power-on reset, the ``bootcount`` variable will be initialized to 1, and
+each reboot will increment the value by 1.
+
+If, after a reboot, the new value of ``bootcount`` exceeds the value of
+``bootlimit``, then instead of the standard boot action (executing the contents
+of ``bootcmd``), an alternate boot action will be performed, and the contents of
+``altbootcmd`` will be executed.
+
+If the variable ``bootlimit`` is not defined in the environment, the Boot Count
+Limit feature is disabled. If it is enabled, but ``altbootcmd`` is not defined,
+then U-Boot will drop into interactive mode and remain there.
+
+It is the responsibility of some application code (typically a Linux
+application) to reset the variable ``bootcount`` to 0 when the system booted
+successfully, thus allowing for more boot cycles.
+
+CONFIG_BOOTCOUNT_FS
+--------------------
+
+This adds support for maintaining boot count in a file on a filesystem.
+Tested filesystems are FAT and EXT. The file to use is defined by:
+
+CONFIG_SYS_BOOTCOUNT_FS_INTERFACE
+CONFIG_SYS_BOOTCOUNT_FS_DEVPART
+CONFIG_SYS_BOOTCOUNT_FS_NAME
+
+The format of the file is:
+
+.. list-table::
+   :header-rows: 1
+
+   * - type
+     - entry
+   * - u8
+     - magic
+   * - u8
+     - version
+   * - u8
+     - bootcount
+   * - u8
+     - upgrade_available
+
+To prevent unintended usage of ``altbootcmd``, the ``upgrade_available``
+variable is used.
+If ``upgrade_available`` is 0, ``bootcount`` is not saved.
+If ``upgrade_available`` is 1, ``bootcount`` is saved.
+So a userspace application should take care of setting the ``upgrade_available``
+and ``bootcount`` variables to 0, if the system boots successfully.
+This also avoids writing the ``bootcount`` information on all reboots.
diff --git a/doc/api/clk.rst b/doc/api/clk.rst
new file mode 100644
index 00000000000..7c27066928e
--- /dev/null
+++ b/doc/api/clk.rst
@@ -0,0 +1,19 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Clock API
+=========
+
+.. kernel-doc:: include/clk.h
+   :doc: Overview
+
+Client API
+----------
+
+.. kernel-doc:: include/clk.h
+   :internal:
+
+Driver API
+----------
+
+.. kernel-doc:: include/clk-uclass.h
+   :internal:
diff --git a/doc/api/dfu.rst b/doc/api/dfu.rst
new file mode 100644
index 00000000000..5bd9e292a57
--- /dev/null
+++ b/doc/api/dfu.rst
@@ -0,0 +1,7 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Device firmware update
+======================
+
+.. kernel-doc:: include/dfu.h
+   :internal:
diff --git a/doc/api/dm.rst b/doc/api/dm.rst
new file mode 100644
index 00000000000..df605dae9d6
--- /dev/null
+++ b/doc/api/dm.rst
@@ -0,0 +1,29 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Driver Model
+============
+
+Uclass and Driver
+-----------------
+
+.. kernel-doc:: include/dm/uclass.h
+.. kernel-doc:: include/dm/root.h
+.. kernel-doc:: include/dm/lists.h
+.. kernel-doc:: include/dm/platdata.h
+
+Device
+------
+
+.. kernel-doc:: include/dm/device.h
+.. kernel-doc:: include/dm/devres.h
+.. kernel-doc:: include/dm/read.h
+
+Device tree
+-----------
+
+.. kernel-doc:: include/dm/of.h
+.. kernel-doc:: include/dm/ofnode.h
+.. kernel-doc:: include/dm/of_extra.h
+.. kernel-doc:: include/dm/of_access.h
+.. kernel-doc:: include/dm/of_addr.h
+.. kernel-doc:: include/dm/fdtaddr.h
diff --git a/doc/api/efi.rst b/doc/api/efi.rst
new file mode 100644
index 00000000000..43d6f936fb0
--- /dev/null
+++ b/doc/api/efi.rst
@@ -0,0 +1,188 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+UEFI subsystem
+==============
+
+Lauching UEFI images
+--------------------
+
+Bootefi command
+~~~~~~~~~~~~~~~
+
+The bootefi command is used to start UEFI applications or to install UEFI
+drivers. It takes two parameters
+
+    bootefi <image address> [fdt address]
+
+* image address - the memory address of the UEFI binary
+* fdt address - the memory address of the flattened device tree
+
+The environment variable 'bootargs' is passed as load options in the UEFI system
+table. The Linux kernel EFI stub uses the load options as command line
+arguments.
+
+.. kernel-doc:: cmd/bootefi.c
+   :internal:
+
+Boot manager
+~~~~~~~~~~~~
+
+The UEFI specification foresees to define boot entries and boot sequence via UEFI
+variables. Booting according to these variables is possible via
+
+    bootefi bootmgr [fdt address]
+
+* fdt address - the memory address of the flattened device tree
+
+The relevant variables are:
+
+* Boot0000-BootFFFF define boot entries
+* BootNext specifies next boot option to be booted
+* BootOrder specifies in which sequence the boot options shall be tried if
+  BootNext is not defined or booting via BootNext fails
+
+.. kernel-doc:: lib/efi_loader/efi_bootmgr.c
+   :internal:
+
+Efidebug command
+~~~~~~~~~~~~~~~~
+
+The efidebug command is used to set and display boot options as well as to
+display information about internal data of the UEFI subsystem (devices,
+drivers, handles, loaded images, and the memory map).
+
+.. kernel-doc:: cmd/efidebug.c
+   :internal:
+
+Initialization of the UEFI sub-system
+-------------------------------------
+
+.. kernel-doc:: lib/efi_loader/efi_setup.c
+   :internal:
+
+Boot services
+-------------
+
+.. kernel-doc:: lib/efi_loader/efi_boottime.c
+   :internal:
+
+Image relocation
+~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_image_loader.c
+   :internal:
+
+Memory services
+~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_memory.c
+   :internal:
+
+SetWatchdogTimer service
+~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_watchdog.c
+   :internal:
+
+Runtime services
+----------------
+
+.. kernel-doc:: lib/efi_loader/efi_runtime.c
+   :internal:
+
+Variable services
+~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: include/efi_variable.h
+   :internal:
+.. kernel-doc:: lib/efi_loader/efi_variable.c
+   :internal:
+
+UEFI drivers
+------------
+
+UEFI driver uclass
+~~~~~~~~~~~~~~~~~~
+.. kernel-doc:: lib/efi_driver/efi_uclass.c
+   :internal:
+
+Block device driver
+~~~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_driver/efi_block_device.c
+   :internal:
+
+Protocols
+---------
+
+Block IO protocol
+~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_disk.c
+   :internal:
+
+File protocol
+~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_file.c
+   :internal:
+
+Graphical output protocol
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_gop.c
+   :internal:
+
+Load file 2 protocol
+~~~~~~~~~~~~~~~~~~~~
+
+The load file 2 protocol can be used by the Linux kernel to load the initial
+RAM disk. U-Boot can be configured to provide an implementation.
+
+.. kernel-doc:: lib/efi_loader/efi_load_initrd.c
+   :internal:
+
+Network protocols
+~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_net.c
+   :internal:
+
+Random number generator protocol
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_rng.c
+   :internal:
+
+Text IO protocols
+~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_console.c
+   :internal:
+
+Unicode Collation protocol
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_unicode_collation.c
+   :internal:
+
+Firmware management protocol
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: lib/efi_loader/efi_firmware.c
+   :internal:
+
+Driver binding protocol
+~~~~~~~~~~~~~~~~~~~~~~~
+
+.. kernel-doc:: include/efi_driver.h
+   :internal:
+
+Unit testing
+------------
+
+The following library functions are provided to support writing UEFI unit tests.
+The should not be used elsewhere.
+
+.. kernel-doc:: include/efi_selftest.h
+   :internal:
diff --git a/doc/api/event.rst b/doc/api/event.rst
new file mode 100644
index 00000000000..8a57d438322
--- /dev/null
+++ b/doc/api/event.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Events
+======
+
+The concept of events is decribed :doc:`here <../develop/event>`.
+
+.. kernel-doc:: include/event.h
+   :internal:
diff --git a/doc/api/getopt.rst b/doc/api/getopt.rst
new file mode 100644
index 00000000000..773f79aeb63
--- /dev/null
+++ b/doc/api/getopt.rst
@@ -0,0 +1,8 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
+
+Option Parsing
+==============
+
+.. kernel-doc:: include/getopt.h
+   :internal:
diff --git a/doc/api/index.rst b/doc/api/index.rst
new file mode 100644
index 00000000000..ec0b8adb2cf
--- /dev/null
+++ b/doc/api/index.rst
@@ -0,0 +1,28 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot API documentation
+========================
+
+.. toctree::
+   :maxdepth: 2
+
+   bootcount
+   clk
+   dfu
+   dm
+   efi
+   event
+   getopt
+   interrupt
+   linker_lists
+   lmb
+   logging
+   nvmem
+   part
+   pinctrl
+   rng
+   sandbox
+   serial
+   sysreset
+   timer
+   unicode
diff --git a/doc/api/interrupt.rst b/doc/api/interrupt.rst
new file mode 100644
index 00000000000..5721231d919
--- /dev/null
+++ b/doc/api/interrupt.rst
@@ -0,0 +1,6 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Interrupt API
+=============
+
+.. kernel-doc:: include/interrupt.h
diff --git a/doc/api/linker_lists.rst b/doc/api/linker_lists.rst
new file mode 100644
index 00000000000..3cd447f187d
--- /dev/null
+++ b/doc/api/linker_lists.rst
@@ -0,0 +1,159 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Linker-Generated Arrays
+=======================
+
+A linker list is constructed by grouping together linker input
+sections, each containing one entry of the list. Each input section
+contains a constant initialized variable which holds the entry's
+content. Linker list input sections are constructed from the list
+and entry names, plus a prefix which allows grouping all lists
+together. Assuming _list and _entry are the list and entry names,
+then the corresponding input section name is
+
+::
+
+  __u_boot_list_ + 2_ + @_list + _2_ + @_entry
+
+and the C variable name is
+
+::
+
+  _u_boot_list + _2_ + @_list + _2_ + @_entry
+
+This ensures uniqueness for both input section and C variable name.
+
+Note that the names differ only in the characters, "__" for the
+section and "_" for the variable, so that the linker cannot confuse
+section and symbol names. From now on, both names will be referred
+to as
+
+::
+
+  %u_boot_list_ + 2_ + @_list + _2_ + @_entry
+
+Entry variables need never be referred to directly.
+
+The naming scheme for input sections allows grouping all linker lists
+into a single linker output section and grouping all entries for a
+single list.
+
+Note the two '_2_' constant components in the names: their presence
+allows putting a start and end symbols around a list, by mapping
+these symbols to sections names with components "1" (before) and
+"3" (after) instead of "2" (within).
+Start and end symbols for a list can generally be defined as
+
+::
+
+  %u_boot_list_2_ + @_list + _1_...
+  %u_boot_list_2_ + @_list + _3_...
+
+Start and end symbols for the whole of the linker lists area can be
+defined as
+
+::
+
+  %u_boot_list_1_...
+  %u_boot_list_3_...
+
+Here is an example of the sorted sections which result from a list
+"array" made up of three entries : "first", "second" and "third",
+iterated at least once.
+
+::
+
+  __u_boot_list_2_array_1
+  __u_boot_list_2_array_2_first
+  __u_boot_list_2_array_2_second
+  __u_boot_list_2_array_2_third
+  __u_boot_list_2_array_3
+
+If lists must be divided into sublists (e.g. for iterating only on
+part of a list), one can simply give the list a name of the form
+'outer_2_inner', where 'outer' is the global list name and 'inner'
+is the sub-list name. Iterators for the whole list should use the
+global list name ("outer"); iterators for only a sub-list should use
+the full sub-list name ("outer_2_inner").
+
+Here is an example of the sections generated from a global list
+named "drivers", two sub-lists named "i2c" and "pci", and iterators
+defined for the whole list and each sub-list:
+
+::
+
+  %u_boot_list_2_drivers_1
+  %u_boot_list_2_drivers_2_i2c_1
+  %u_boot_list_2_drivers_2_i2c_2_first
+  %u_boot_list_2_drivers_2_i2c_2_first
+  %u_boot_list_2_drivers_2_i2c_2_second
+  %u_boot_list_2_drivers_2_i2c_2_third
+  %u_boot_list_2_drivers_2_i2c_3
+  %u_boot_list_2_drivers_2_pci_1
+  %u_boot_list_2_drivers_2_pci_2_first
+  %u_boot_list_2_drivers_2_pci_2_second
+  %u_boot_list_2_drivers_2_pci_2_third
+  %u_boot_list_2_drivers_2_pci_3
+  %u_boot_list_2_drivers_3
+
+Alignment issues
+----------------
+
+The linker script uses alphabetic sorting to group the different linker
+lists together. Each group has its own struct and potentially its own
+alignment. But when the linker packs the structs together it cannot ensure
+that a linker list starts on the expected alignment boundary.
+
+For example, if the first list has a struct size of 8 and we place 3 of
+them in the image, that means that the next struct will start at offset
+0x18 from the start of the linker_list section. If the next struct has
+a size of 16 then it will start at an 8-byte aligned offset, but not a
+16-byte aligned offset.
+
+With sandbox on x86_64, a reference to a linker list item using
+ll_entry_get() can force alignment of that particular linker_list item,
+if it is in the same file as the linker_list item is declared.
+
+Consider this example, where struct driver is 0x80 bytes::
+
+    ll_entry_declare(struct driver, fred, driver)
+
+    ...
+
+    void *p = ll_entry_get(struct driver, fred, driver)
+
+If these two lines of code are in the same file, then the entry is forced
+to be aligned at the 'struct driver' alignment, which is 16 bytes. If the
+second line of code is in a different file, then no action is taken, since
+the compiler cannot update the alignment of the linker_list item.
+
+In the first case, an 8-byte 'fill' region is added::
+
+   __u_boot_list_2_driver_2_testbus_drv
+               0x0000000000270018       0x80 test/built-in.o
+               0x0000000000270018                _u_boot_list_2_driver_2_testbus_drv
+   __u_boot_list_2_driver_2_testfdt1_drv
+               0x0000000000270098       0x80 test/built-in.o
+               0x0000000000270098                _u_boot_list_2_driver_2_testfdt1_drv
+   *fill*         0x0000000000270118        0x8
+   __u_boot_list_2_driver_2_testfdt_drv
+               0x0000000000270120       0x80 test/built-in.o
+               0x0000000000270120                _u_boot_list_2_driver_2_testfdt_drv
+   __u_boot_list_2_driver_2_testprobe_drv
+               0x00000000002701a0       0x80 test/built-in.o
+               0x00000000002701a0                _u_boot_list_2_driver_2_testprobe_drv
+
+With this, the linker_list no-longer works since items after testfdt1_drv
+are not at the expected address.
+
+Ideally we would have a way to tell gcc not to align structs in this way.
+It is not clear how we could do this, and in any case it would require us
+to adjust every struct used by the linker_list feature.
+
+The simplest fix seems to be to force each separate linker_list to start
+on the largest possible boundary that can be required by the compiler. This
+is the purpose of CONFIG_LINKER_LIST_ALIGN
+
+
+.. kernel-doc:: include/linker_lists.h
+   :internal:
diff --git a/doc/api/lmb.rst b/doc/api/lmb.rst
new file mode 100644
index 00000000000..2095bfa1618
--- /dev/null
+++ b/doc/api/lmb.rst
@@ -0,0 +1,7 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Logical memory blocks
+=====================
+
+.. kernel-doc:: include/lmb.h
+   :internal:
diff --git a/doc/api/logging.rst b/doc/api/logging.rst
new file mode 100644
index 00000000000..1e6cbc4931c
--- /dev/null
+++ b/doc/api/logging.rst
@@ -0,0 +1,6 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Logging API
+===========
+
+.. kernel-doc:: include/log.h
diff --git a/doc/api/nvmem.rst b/doc/api/nvmem.rst
new file mode 100644
index 00000000000..d9237846524
--- /dev/null
+++ b/doc/api/nvmem.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+NVMEM API
+=========
+
+.. kernel-doc:: include/nvmem.h
+   :doc: Design
+
+.. kernel-doc:: include/nvmem.h
+   :internal:
diff --git a/doc/api/part.rst b/doc/api/part.rst
new file mode 100644
index 00000000000..d1df1d84945
--- /dev/null
+++ b/doc/api/part.rst
@@ -0,0 +1,6 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Partition API
+=============
+
+.. kernel-doc:: include/part.h
diff --git a/doc/api/pinctrl.rst b/doc/api/pinctrl.rst
new file mode 100644
index 00000000000..043bd57efab
--- /dev/null
+++ b/doc/api/pinctrl.rst
@@ -0,0 +1,7 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Pinctrl and Pinmux
+==================
+
+.. kernel-doc:: include/dm/pinctrl.h
+   :internal:
diff --git a/doc/api/rng.rst b/doc/api/rng.rst
new file mode 100644
index 00000000000..b826d4fd4a5
--- /dev/null
+++ b/doc/api/rng.rst
@@ -0,0 +1,17 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2018 Heinrich Schuchardt
+
+Random number generation
+========================
+
+Hardware random number generation
+---------------------------------
+
+.. kernel-doc:: include/rng.h
+   :internal:
+
+Pseudo random number generation
+-------------------------------
+
+.. kernel-doc:: include/rand.h
+   :internal:
diff --git a/doc/api/sandbox.rst b/doc/api/sandbox.rst
new file mode 100644
index 00000000000..724776399be
--- /dev/null
+++ b/doc/api/sandbox.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sandbox
+=======
+
+The following API routines are used to implement the U-Boot sandbox.
+
+.. kernel-doc:: include/os.h
+   :internal:
diff --git a/doc/api/serial.rst b/doc/api/serial.rst
new file mode 100644
index 00000000000..ed34e592a44
--- /dev/null
+++ b/doc/api/serial.rst
@@ -0,0 +1,7 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Serial system
+=============
+
+.. kernel-doc:: drivers/serial/serial.c
+   :internal:
diff --git a/doc/api/sysreset.rst b/doc/api/sysreset.rst
new file mode 100644
index 00000000000..a51b06c3870
--- /dev/null
+++ b/doc/api/sysreset.rst
@@ -0,0 +1,7 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+System reset
+============
+
+.. kernel-doc:: include/sysreset.h
+   :internal:
diff --git a/doc/api/timer.rst b/doc/api/timer.rst
new file mode 100644
index 00000000000..b0695174d7d
--- /dev/null
+++ b/doc/api/timer.rst
@@ -0,0 +1,8 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
+
+Timer Subsystem
+===============
+
+.. kernel-doc:: include/timer.h
+   :internal:
diff --git a/doc/api/unicode.rst b/doc/api/unicode.rst
new file mode 100644
index 00000000000..3fb6745f847
--- /dev/null
+++ b/doc/api/unicode.rst
@@ -0,0 +1,7 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Unicode support
+===============
+
+.. kernel-doc:: include/charset.h
+   :internal:
diff --git a/doc/arch/arc.rst b/doc/arch/arc.rst
new file mode 100644
index 00000000000..f8e04a34f14
--- /dev/null
+++ b/doc/arch/arc.rst
@@ -0,0 +1,32 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+ARC
+===
+
+Synopsys' DesignWare(r) ARC(r) Processors are a family of 32-bit CPUs
+that SoC designers can optimize for a wide range of uses, from deeply embedded
+to high-performance host applications.
+
+More information on ARC cores avaialble here:
+http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx
+
+Designers can differentiate their products by using patented configuration
+technology to tailor each ARC processor instance to meet specific performance,
+power and area requirements.
+
+The DesignWare ARC processors are also extendable, allowing designers to add
+their own custom instructions that dramatically increase performance.
+
+Synopsys' ARC processors have been used by over 170 customers worldwide who
+collectively ship more than 1 billion ARC-based chips annually.
+
+All DesignWare ARC processors utilize a 16-/32-bit ISA that provides excellent
+performance and code density for embedded and host SoC applications.
+
+The RISC microprocessors are synthesizable and can be implemented in any foundry
+or process, and are supported by a complete suite of development tools.
+
+The ARC GNU toolchain with support for all ARC Processors can be downloaded
+from here (available pre-built toolchains as well):
+
+https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases
diff --git a/doc/arch/arm64.ffa.rst b/doc/arch/arm64.ffa.rst
new file mode 100644
index 00000000000..f966f8ba6af
--- /dev/null
+++ b/doc/arch/arm64.ffa.rst
@@ -0,0 +1,261 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Arm FF-A Support
+================
+
+Summary
+-------
+
+FF-A stands for Firmware Framework for Arm A-profile processors.
+
+FF-A specifies interfaces that enable a pair of software execution environments aka partitions to
+communicate with each other. A partition could be a VM in the Normal or Secure world, an
+application in S-EL0, or a Trusted OS in S-EL1.
+
+The U-Boot FF-A support (the bus) implements the interfaces to communicate
+with partitions in the Secure world aka Secure partitions (SPs).
+
+The FF-A support specifically focuses on communicating with SPs that
+isolate portions of EFI runtime services that must run in a protected
+environment which is inaccessible by the Host OS or Hypervisor.
+Examples of such services are set/get variables.
+
+The FF-A support uses the SMC ABIs defined by the FF-A specification to:
+
+- Discover the presence of SPs of interest
+- Access an SP's service through communication protocols
+  e.g. EFI MM communication protocol
+
+At this stage of development only EFI boot-time services are supported.
+Runtime support will be added in future developments.
+
+The U-Boot FF-A support provides the following parts:
+
+- A Uclass driver providing generic FF-A methods.
+- An Arm FF-A device driver providing Arm-specific methods and reusing the Uclass methods.
+- A sandbox emulator for Arm FF-A, emulates the FF-A side of the Secure World and provides
+  FF-A ABIs inspection methods.
+- An FF-A sandbox device driver for FF-A communication with the emulated Secure World.
+  The driver leverages the FF-A Uclass to establish FF-A communication.
+- Sandbox FF-A test cases.
+
+FF-A and SMC specifications
+---------------------------
+
+The current implementation of the U-Boot FF-A support relies on
+`FF-A v1.0 specification`_ and uses SMC32 calling convention which
+means using the first 32-bit data of the Xn registers.
+
+At this stage we only need the FF-A v1.0 features.
+
+The FF-A support has been tested with OP-TEE which supports SMC32 calling
+convention.
+
+Hypervisors are supported if they are configured to trap SMC calls.
+
+The FF-A support uses 64-bit registers as per `SMC Calling Convention v1.2 specification`_.
+
+Supported hardware
+------------------
+
+Aarch64 plaforms
+
+Configuration
+-------------
+
+CONFIG_ARM_FFA_TRANSPORT
+    Enables the FF-A support. Turn this on if you want to use FF-A
+    communication.
+    When using an Arm 64-bit platform, the Arm FF-A driver will be used.
+    When using sandbox, the sandbox FF-A emulator and FF-A sandbox driver will be used.
+
+FF-A ABIs under the hood
+------------------------
+
+Invoking an FF-A ABI involves providing to the secure world/hypervisor the
+expected arguments from the ABI.
+
+On an Arm 64-bit platform, the ABI arguments are stored in x0 to x7 registers.
+Then, an SMC instruction is executed.
+
+At the secure side level or hypervisor the ABI is handled at a higher exception
+level and the arguments are read and processed.
+
+The response is put back through x0 to x7 registers and control is given back
+to the U-Boot Arm FF-A driver (non-secure world).
+
+The driver reads the response and processes it accordingly.
+
+This methodology applies to all the FF-A ABIs.
+
+FF-A bus discovery on Arm 64-bit platforms
+------------------------------------------
+
+When CONFIG_ARM_FFA_TRANSPORT is enabled, the FF-A bus is considered as
+an architecture feature and discovered using ARM_SMCCC_FEATURES mechanism.
+This discovery mechanism is performed by the PSCI driver.
+
+The PSCI driver comes with a PSCI device tree node which is the root node for all
+architecture features including FF-A bus.
+
+::
+
+   => dm tree
+
+    Class     Index  Probed  Driver                Name
+   -----------------------------------------------------------
+    firmware      0  [ + ]   psci                      |-- psci
+    ffa                   0  [   ]   arm_ffa               |   `-- arm_ffa
+
+The PSCI driver is bound to the PSCI device and when probed it tries to discover
+the architecture features by calling a callback the features drivers provide.
+
+In case of FF-A, the callback is arm_ffa_is_supported() which tries to discover the
+FF-A framework by querying the FF-A framework version from secure world using
+FFA_VERSION ABI. When discovery is successful, the ARM_SMCCC_FEATURES
+mechanism creates a U-Boot device for the FF-A bus and binds the Arm FF-A driver
+with the device using device_bind_driver().
+
+At this stage the FF-A bus is registered with the DM and can be interacted with using
+the DM APIs.
+
+Clients are able to probe then use the FF-A bus by calling uclass_first_device().
+Please refer to the armffa command implementation as an example of how to probe
+and interact with the FF-A bus.
+
+When calling uclass_first_device(), the FF-A driver is probed and ends up calling
+ffa_do_probe() provided by the Uclass which does the following:
+
+    - saving the FF-A framework version in uc_priv
+    - querying from secure world the u-boot endpoint ID
+    - querying from secure world the supported features of FFA_RXTX_MAP
+    - mapping the RX/TX buffers
+    - querying from secure world all the partitions information
+
+When one of the above actions fails, probing fails and the driver stays not active
+and can be probed again if needed.
+
+Requirements for clients
+------------------------
+
+When using the FF-A bus with EFI, clients must query the SPs they are looking for
+during EFI boot-time mode using the service UUID.
+
+The RX/TX buffers are only available at EFI boot-time. Querying partitions is
+done at boot time and data is cached for future use.
+
+RX/TX buffers should be unmapped before EFI runtime mode starts.
+The driver provides a bus operation for that called ffa_rxtx_unmap().
+
+The user should call ffa_rxtx_unmap() to unmap the RX/TX buffers when required
+(e.g: at efi_exit_boot_services()).
+
+The Linux kernel allocates its own RX/TX buffers. To be able to register these kernel buffers
+with secure world, the U-Boot's RX/TX buffers should be unmapped before EFI runtime starts.
+
+When invoking FF-A direct messaging, clients should specify which ABI protocol
+they want to use (32-bit vs 64-bit). Selecting the protocol means using
+the 32-bit or 64-bit version of FFA_MSG_SEND_DIRECT_{REQ, RESP}.
+The calling convention between U-Boot and the secure world stays the same: SMC32.
+
+Requirements for user drivers
+-----------------------------
+
+Users who want to implement their custom FF-A device driver while reusing the FF-A Uclass can do so
+by implementing their own invoke_ffa_fn() in the user driver.
+
+The bus driver layer
+--------------------
+
+FF-A support comes on top of the SMCCC layer and is implemented by the FF-A Uclass drivers/firmware/arm-ffa/arm-ffa-uclass.c
+
+The following features are provided:
+
+- Support for the 32-bit version of the following ABIs:
+
+    - FFA_VERSION
+    - FFA_ID_GET
+    - FFA_FEATURES
+    - FFA_PARTITION_INFO_GET
+    - FFA_RXTX_UNMAP
+    - FFA_RX_RELEASE
+    - FFA_RUN
+    - FFA_ERROR
+    - FFA_SUCCESS
+    - FFA_INTERRUPT
+    - FFA_MSG_SEND_DIRECT_REQ
+    - FFA_MSG_SEND_DIRECT_RESP
+
+- Support for the 64-bit version of the following ABIs:
+
+    - FFA_RXTX_MAP
+    - FFA_MSG_SEND_DIRECT_REQ
+    - FFA_MSG_SEND_DIRECT_RESP
+
+- Processing the received data from the secure world/hypervisor and caching it
+
+- Hiding from upper layers the FF-A protocol and registers details. Upper
+  layers focus on exchanged data, FF-A support takes care of how to transport
+  that to the secure world/hypervisor using FF-A
+
+- FF-A support provides driver operations to be used by upper layers:
+
+    - ffa_partition_info_get
+    - ffa_sync_send_receive
+    - ffa_rxtx_unmap
+
+- FF-A bus discovery makes sure FF-A framework is responsive and compatible
+  with the driver
+
+- FF-A bus can be compiled and used without EFI
+
+Relationship between the sandbox emulator and the FF-A device
+-------------------------------------------------------------
+
+::
+
+   => dm tree
+
+    Class     Index  Probed  Driver                Name
+   -----------------------------------------------------------
+   ffa_emul      0  [ + ]   sandbox_ffa_emul      `-- arm-ffa-emul
+    ffa                  0  [    ]   sandbox_arm_ffa               `-- sandbox-arm-ffa
+
+The armffa command
+------------------
+
+armffa is a command showcasing how to use the FF-A bus and how to invoke the driver operations.
+
+Please refer the command documentation at :doc:`../usage/cmd/armffa`
+
+Example of boot logs with FF-A enabled
+--------------------------------------
+
+For example, when using FF-A with Corstone-1000, debug logs enabled, the output is as follows:
+
+::
+
+   U-Boot 2023.01 (May 10 2023 - 11:08:07 +0000) corstone1000 aarch64
+
+   DRAM:  2 GiB
+   Arm FF-A framework discovery
+   FF-A driver 1.0
+   FF-A framework 1.0
+   FF-A versions are compatible
+   ...
+   FF-A driver 1.0
+   FF-A framework 1.0
+   FF-A versions are compatible
+   EFI: MM partition ID 0x8003
+   ...
+   EFI stub: Booting Linux Kernel...
+   ...
+   Linux version 6.1.9-yocto-standard (oe-user@oe-host) (aarch64-poky-linux-musl-gcc (GCC) 12.2.0, GNU ld (GNU Binutils) 2.40.202301193
+   Machine model: ARM Corstone1000 FPGA MPS3 board
+
+Contributors
+------------
+   * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
+
+.. _`FF-A v1.0 specification`: https://documentation-service.arm.com/static/5fb7e8a6ca04df4095c1d65e
+.. _`SMC Calling Convention v1.2 specification`: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6
diff --git a/doc/arch/arm64.rst b/doc/arch/arm64.rst
new file mode 100644
index 00000000000..19662be6fc6
--- /dev/null
+++ b/doc/arch/arm64.rst
@@ -0,0 +1,109 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+ARM64
+=====
+
+Summary
+-------
+The initial arm64 U-Boot port was developed before hardware was available,
+so the first supported platforms were the Foundation and Fast Model for ARMv8.
+These days U-Boot runs on a variety of 64-bit capable ARM hardware, from
+embedded development boards to servers.
+
+Notes
+-----
+
+1. U-Boot can run at any exception level it is entered in, it is
+   recommened to enter it in EL3 if U-Boot takes some responsibilities of a
+   classical firmware (like initial hardware setup, CPU errata workarounds
+   or SMP bringup). U-Boot can be entered in EL2 when its main purpose is
+   that of a boot loader. It can drop to lower exception levels before
+   entering the OS. For ARMv8-R it is recommened to enter at S-EL1, as for this
+   architecture there is no S-EL3.
+
+2. U-Boot for arm64 is compiled with AArch64-gcc. AArch64-gcc
+   use rela relocation format, a tool(tools/relocate-rela) by Scott Wood
+   is used to encode the initial addend of rela to u-boot.bin. After running,
+   the U-Boot will be relocated to destination again.
+
+3. Earlier Linux kernel versions required the FDT to be placed at a
+   2 MB boundary and within the same 512 MB section as the kernel image,
+   resulting in fdt_high to be defined specially.
+   Since kernel version 4.2 Linux is more relaxed about the DT location, so it
+   can be placed anywhere in memory.
+   Please reference linux/Documentation/arm64/booting.txt for detail.
+
+4. Spin-table is used to wake up secondary processors. One location
+   (or per processor location) is defined to hold the kernel entry point
+   for secondary processors. It must be ensured that the location is
+   accessible and zero immediately after secondary processor
+   enter slave_cpu branch execution in start.S. The location address
+   is encoded in cpu node of DTS. Linux kernel store the entry point
+   of secondary processors to it and send event to wakeup secondary
+   processors.
+   Please reference linux/Documentation/arm64/booting.txt for detail.
+
+5. Generic board is supported.
+
+6. CONFIG_ARM64 instead of CONFIG_ARMV8 is used to distinguish aarch64 and
+   aarch32 specific codes.
+
+MMU
+---
+
+U-Boot uses a simple page table for MMU setup. It uses the smallest number of bits
+possible for the virtual address based on the maximum memory address (see the logic
+in ``get_tcr()``). If this is less than 39 bits, the MMU will use only 3 levels for
+address translation.
+
+As with all platforms, U-Boot on ARM64 uses a 1:1 mapping of virtual to physical addresses.
+In general, the memory map is expected to remain static once the MMU is enabled.
+
+Software pagetable walker
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+It is possible to debug the pagetable generated by U-Boot with the built in
+``dump_pagetable()`` and ``walk_pagetable()`` functions (the former being a simple
+wrapper for the latter). For example the following can be added to ``setup_all_pgtables()``
+after the first call to ``setup_pgtables()``:
+
+.. code-block:: c
+
+    dump_pagetable(gd->arch.tlb_addr, get_tcr(NULL, NULL));
+
+.. kernel-doc:: arch/arm/cpu/armv8/cache_v8.c
+   :identifiers: __pagetable_walk pagetable_print_entry
+
+The pagetable walker can be used as follows:
+
+.. kernel-doc:: arch/arm/include/asm/armv8/mmu.h
+   :identifiers: pte_walker_cb_t walk_pagetable dump_pagetable
+
+This will result in a print like the following:
+
+.. code-block:: text
+
+    Walking pagetable at 000000017df90000, va_bits: 36. Using 3 levels
+    [0x17df91000]                   |  Table |               |
+      [0x17df92000]                 |  Table |               |
+        [0x000001000 - 0x000200000] |  Pages | Device-nGnRnE | Non-shareable
+      [0x000200000 - 0x040000000]   |  Block | Device-nGnRnE | Non-shareable
+    [0x040000000 - 0x080000000]     |  Block | Device-nGnRnE | Non-shareable
+    [0x080000000 - 0x140000000]     |  Block | Normal        | Inner-shareable
+    [0x17df93000]                   |  Table |               |
+      [0x140000000 - 0x17de00000]   |  Block | Normal        | Inner-shareable
+      [0x17df94000]                 |  Table |               |
+        [0x17de00000 - 0x17dfa0000] |  Pages | Normal        | Inner-shareable
+
+For more information, please refer to the additional function documentation in
+``arch/arm/include/asm/armv8/mmu.h``.
+
+Contributors
+------------
+   * Tom Rini            <trini@ti.com>
+   * Scott Wood          <scottwood@freescale.com>
+   * York Sun            <yorksun@freescale.com>
+   * Simon Glass         <sjg@chromium.org>
+   * Sharma Bhupesh      <bhupesh.sharma@freescale.com>
+   * Rob Herring         <robherring2@gmail.com>
+   * Sergey Temerkhanov  <s.temerkhanov@gmail.com>
diff --git a/doc/arch/index.rst b/doc/arch/index.rst
new file mode 100644
index 00000000000..60c93b3b664
--- /dev/null
+++ b/doc/arch/index.rst
@@ -0,0 +1,19 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Architecture-specific doc
+=========================
+
+.. toctree::
+   :maxdepth: 2
+
+   arc
+   arm64
+   arm64.ffa
+   m68k
+   mips
+   nios2
+   riscv
+   sandbox/index
+   sh
+   x86/index
+   xtensa
diff --git a/doc/arch/m68k.rst b/doc/arch/m68k.rst
new file mode 100644
index 00000000000..8474ece62c7
--- /dev/null
+++ b/doc/arch/m68k.rst
@@ -0,0 +1,168 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+M68K / ColdFire
+===============
+
+History
+-------
+* November 02, 2017	Angelo Dureghello <angelo@kernel-space.org>
+* August   08, 2005	Jens Scharsig <esw@bus-elektronik.de>
+  MCF5282 implementation without preloader
+* January  12, 2004	<josef.baumgartner@telex.de>
+
+This file contains status information for the port of U-Boot to the
+Motorola ColdFire series of CPUs.
+
+Overview
+--------
+
+The ColdFire instruction set is "assembly source" compatible but an evolution
+of the original 68000 instruction set. Some not much used instructions has
+been removed. The instructions are only 16, 32, or 48 bits long, a
+simplification compared to the 68000 series.
+
+Bernhard Kuhn ported U-Boot 0.4.0 to the Motorola ColdFire architecture.
+The patches of Bernhard support the MCF5272 and MCF5282. A great disadvantage
+of these patches was that they needed a pre-bootloader to start U-Boot.
+Because of this, a new port was created which no longer needs a first stage
+booter.
+
+Thanks mainly to Freescale but also to several other contributors, U-Boot now
+supports nearly the entire range of ColdFire processors and their related
+development boards.
+
+
+Supported CPU families
+----------------------
+
+Please "make menuconfig" and select "m68k" or check arch/m68k/cpu to see the
+currently supported processor and families.
+
+
+Supported boards
+----------------
+
+U-Boot supports actually more than 40 ColdFire based boards.
+Board configuration can be done trough include/configs/<boardname>.h but the
+current recommended method is to use the new and more friendly approach as
+the "make menuconfig" way, very similar to the Linux way.
+
+To know details as memory map, build targets, default setup, etc, of a
+specific board please check:
+
+* include/configs/<boardname>.h
+
+and/or
+
+* configs/<boardname>_defconfig
+
+It is possible to build all ColdFire boards in a single command-line command,
+from u-boot root directory, as::
+
+   ./tools/buildman/buildman m68k
+
+Build U-Boot for a specific board
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+A bash script similar to the one below may be used:
+
+.. code-block:: shell
+
+   #!/bin/bash
+
+   export CROSS_COMPILE=/opt/toolchains/m68k/gcc-4.9.0-nolibc/bin/m68k-linux-
+
+   board=M5249EVB
+
+   make distclean
+   make ${board}_defconfig
+   make KBUILD_VERBOSE=1
+
+
+Adopted toolchains
+------------------
+
+Please check:
+https://www.denx.de/wiki/U-Boot/ColdFireNotes
+
+
+ColdFire specific configuration options/settings
+------------------------------------------------
+
+Configuration to use a pre-loader
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+If U-Boot should be loaded to RAM and started by a pre-loader
+CONFIG_MONITOR_IS_IN_RAM must be enabled. If it is enabled the
+initial vector table and basic processor initialization will not
+be compiled in. The start address of U-Boot must be adjusted in
+the boards defconfig file (CONFIG_SYS_MONITOR_BASE) and Makefile
+(CONFIG_TEXT_BASE) to the load address.
+
+ColdFire CPU specific options/settings
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+To specify a CPU model, some defines shoudl be used, i.e.:
+
+CONFIG_MCF52x2:
+  defined for all MCF52x2 CPUs
+CONFIG_M5272:
+  defined for all Motorola MCF5272 CPUs
+
+Other options, generally set inside include/configs/<boardname>.h, they may
+apply to one or more cpu for the ColdFire family:
+
+CFG_SYS_MBAR:
+  defines the base address of the MCF5272 configuration registers
+CFG_SYS_SCR:
+  defines the contents of the System Configuration Register
+CFG_SYS_SPR:
+  defines the contents of the System Protection Register
+CFG_SYS_MFD:
+  defines the PLL Multiplication Factor Divider
+  (see table 9-4 of MCF user manual)
+CFG_SYS_RFD:
+  defines the PLL Reduce Frequency Devider
+  (see table 9-4 of MCF user manual)
+CONFIG_SYS_CSx_BASE:
+  defines the base address of chip select x
+CONFIG_SYS_CSx_SIZE:
+  defines the memory size (address range) of chip select x
+CONFIG_SYS_CSx_WIDTH:
+  defines the bus with of chip select x
+CONFIG_SYS_CSx_MASK:
+  defines the mask for the related chip select x
+CONFIG_SYS_CSx_RO:
+  if set to 0 chip select x is read/write else chip select is read only
+CONFIG_SYS_CSx_WS:
+  defines the number of wait states  of chip select x
+CFG_SYS_CACHE_ICACR:
+  cache-related registers config
+CFG_SYS_CACHE_DCACR:
+  cache-related registers config
+CONFIG_SYS_CACHE_ACRX:
+  cache-related registers config
+CFG_SYS_SDRAM_BASE:
+  SDRAM config for SDRAM controller-specific registers
+CFG_SYS_SDRAM_SIZE:
+  SDRAM config for SDRAM controller-specific registers
+CFG_SYS_SDRAM_BASEX:
+  SDRAM config for SDRAM controller-specific registers
+CFG_SYS_SDRAM_CFG1:
+  SDRAM config for SDRAM controller-specific registers
+CFG_SYS_SDRAM_CFG2:
+  SDRAM config for SDRAM controller-specific registers
+CFG_SYS_SDRAM_CTRL:
+  SDRAM config for SDRAM controller-specific registers
+CFG_SYS_SDRAM_MODE:
+  SDRAM config for SDRAM controller-specific registers
+CFG_SYS_SDRAM_EMOD:
+  SDRAM config for SDRAM controller-specific registers, please
+  see arch/m68k/cpu/<specific_cpu>/start.S files to see how
+  these options are used.
+CONFIG_MCFUART:
+  defines enabling of ColdFire UART driver
+CFG_SYS_UART_PORT:
+  defines the UART port to be used (only a single UART can be actually enabled)
+CFG_SYS_SBFHDR_SIZE:
+  size of the prepended SBF header, if any
diff --git a/doc/arch/mips.rst b/doc/arch/mips.rst
new file mode 100644
index 00000000000..b8166087ddf
--- /dev/null
+++ b/doc/arch/mips.rst
@@ -0,0 +1,46 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+MIPS
+====
+
+Notes for the MIPS architecture port of U-Boot
+
+Toolchains
+----------
+
+  * `ELDK < DULG < DENX <http://www.denx.de/wiki/DULG/ELDK>`_
+  * `Embedded Debian -- Cross-development toolchains <http://www.emdebian.org/crosstools.html>`_
+  * `Buildroot <http://buildroot.uclibc.org/>`_
+
+Known Issues
+------------
+
+  * Cache incoherency issue caused by do_bootelf_exec() at cmd_elf.c
+
+    Cache will be disabled before entering the loaded ELF image without
+    writing back and invalidating cache lines. This leads to cache
+    incoherency in most cases, unless the code gets loaded after U-Boot
+    re-initializes the cache. The more common uImage 'bootm' command does
+    not suffer this problem.
+
+    [workaround] To avoid this cache incoherency:
+       - insert flush_cache(all) before calling dcache_disable(), or
+       - fix dcache_disable() to do both flushing and disabling cache.
+
+  * Note that Linux users need to kill dcache_disable() in do_bootelf_exec()
+    or override do_bootelf_exec() not to disable I-/D-caches, because most
+    Linux/MIPS ports don't re-enable caches after entering kernel_entry.
+
+TODOs
+-----
+
+  * Probe CPU types, I-/D-cache and TLB size etc. automatically
+  * Secondary cache support missing
+  * Initialize TLB entries redardless of their use
+  * R2000/R3000 class parts are not supported
+  * Limited testing across different MIPS variants
+  * Due to cache initialization issues, the DRAM on board must be
+    initialized in board specific assembler language before the cache init
+    code is run -- that is, initialize the DRAM in lowlevel_init().
+  * centralize/share more CPU code of MIPS32, MIPS64 and XBurst
+  * support Qemu Malta
diff --git a/doc/arch/nios2.rst b/doc/arch/nios2.rst
new file mode 100644
index 00000000000..34a75e7fb00
--- /dev/null
+++ b/doc/arch/nios2.rst
@@ -0,0 +1,111 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Nios II
+=======
+
+Nios II is a 32-bit embedded-processor architecture designed
+specifically for the Altera family of FPGAs.
+
+Please refer to the link for more information on Nios II:
+https://www.altera.com/products/processors/overview.html
+
+Please refer to the link for Linux port and toolchains:
+http://rocketboards.org/foswiki/view/Documentation/NiosIILinuxUserManual
+
+The Nios II port of u-boot is controlled by device tree. Please check
+out doc/README.fdt-control.
+
+To add a new board/configuration (eg, mysystem) to u-boot, you will need
+three files.
+
+1. The device tree source which describes the hardware, dts file:
+   arch/nios2/dts/mysystem.dts
+
+2. Default configuration of Kconfig, defconfig file:
+   configs/mysystem_defconfig
+
+3. The legacy board header file:
+   include/configs/mysystem.h
+
+The device tree source must be generated from your qsys/sopc design
+using the sopc2dts tool. Then modified to fit your configuration.
+
+Please find the sopc2dts download and usage at the wiki:
+http://www.alterawiki.com/wiki/Sopc2dts
+
+.. code-block:: none
+
+   $ java -jar sopc2dts.jar --force-altr -i mysystem.sopcinfo -o mysystem.dts
+
+You will need to add additional properties to the dts. Please find an
+example at, arch/nios2/dts/10m50_devboard.dts.
+
+1. Add "stdout-path=..." property with your serial path to the chosen
+   node, like this::
+
+	chosen {
+		stdout-path = &uart_0;
+	};
+
+2. If you use SPI/EPCS or I2C, you will need to add aliases to number
+   the sequence of these devices, like this::
+
+	aliases {
+		spi0 = &epcs_controller;
+	};
+
+Next, you will need a default config file. You may start with
+10m50_defconfig, modify the options and save it.
+
+.. code-block:: none
+
+   $ make 10m50_defconfig
+   $ make menuconfig
+   $ make savedefconfig
+   $ cp defconfig configs/mysystem_defconfig
+
+You will need to change the names of board header file and device tree,
+and select the drivers with menuconfig.
+
+.. code-block:: none
+
+   Nios II architecture  --->
+     (mysystem) Board header file
+   Device Tree Control  --->
+     (mysystem) Default Device Tree for DT control
+
+There is a selection of "Provider of DTB for DT control" in the Device
+Tree Control menu.
+
+   * Separate DTB for DT control, will cat the dtb to end of u-boot
+     binary, output u-boot-dtb.bin. This should be used for production.
+     If you use boot copier, like EPCS boot copier, make sure the copier
+     copies all the u-boot-dtb.bin, not just u-boot.bin.
+
+   * Embedded DTB for DT control, will include the dtb inside the u-boot
+     binary. This is handy for development, eg, using gdb or nios2-download.
+
+The last thing, legacy board header file describes those config options
+not covered in Kconfig yet. You may copy it from 10m50_devboard.h::
+
+   $ cp include/configs/10m50_devboard.h include/configs/mysystem.h
+
+Please change the SDRAM base and size to match your board. The base
+should be cached virtual address, for Nios II with MMU it is 0xCxxx_xxxx
+to 0xDxxx_xxxx.
+
+.. code-block:: c
+
+   #define CFG_SYS_SDRAM_BASE		0xc8000000
+   #define CFG_SYS_SDRAM_SIZE		0x08000000
+
+You will need to change the environment variables location and setting,
+too. You may change other configs to fit your board.
+
+After all these changes, you may build and test::
+
+   $ export CROSS_COMPILE=nios2-elf-  (or nios2-linux-gnu-)
+   $ make mysystem_defconfig
+   $ make
+
+Enjoy!
diff --git a/doc/arch/riscv.rst b/doc/arch/riscv.rst
new file mode 100644
index 00000000000..af0c48b8982
--- /dev/null
+++ b/doc/arch/riscv.rst
@@ -0,0 +1,81 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2023, Yu Chien Peter Lin <peterlin@andestech.com>
+
+RISC-V
+======
+
+Overview
+--------
+
+This document outlines the U-Boot boot process for the RISC-V architecture.
+RISC-V is an open-source instruction set architecture (ISA) based on the
+principles of reduced instruction set computing (RISC). It has been designed
+to be flexible and customizable, allowing it to be adapted to different use
+cases, from embedded systems to high performance servers.
+
+Typical Boot Process
+--------------------
+
+U-Boot can run in either M-mode or S-mode, depending on whether it runs before
+the initialization of the firmware providing SBI (Supervisor Binary Interface).
+The firmware is necessary in the RISC-V boot process as it serves as a SEE
+(Supervisor Execution Environment) to handle exceptions for the S-mode U-Boot
+or Operating System.
+
+In between the boot phases, the hartid is passed through the a0 register, and
+the start address of the devicetree is passed through the a1 register.
+
+As a reference, OpenSBI is an SBI implementation that can be used with U-Boot
+in different modes, see the
+`OpenSBI firmware document <https://github.com/riscv-software-src/opensbi/tree/master/docs/firmware>`_
+for more details.
+
+M-mode U-Boot
+^^^^^^^^^^^^^
+
+When running in M-mode U-Boot, it will load the payload image (e.g.
+`fw_payload <https://github.com/riscv-software-src/opensbi/blob/master/docs/firmware/fw_payload.md>`_)
+which contains the firmware and the S-mode Operating System; in this case, you
+can use mkimage to package the payload image into an uImage format, and boot it
+using the bootm command.
+
+The following diagram illustrates the boot process::
+
+	<-----------( M-mode )----------><--( S-mode )-->
+	+----------+   +--------------+    +------------+
+	|  U-Boot  |-->| SBI firmware |--->|     OS     |
+	+----------+   +--------------+    +------------+
+
+To examine the boot process with the QEMU virt machine, you can follow the
+steps in the "Building U-Boot" section of the following document:
+:doc:`../board/emulation/qemu-riscv`.
+
+S-mode U-Boot
+^^^^^^^^^^^^^
+
+RISC-V production boot images may include a U-Boot SPL for platform-specific
+initialization. The U-Boot SPL then loads a FIT image (u-boot.itb), which
+contains a firmware (e.g.
+`fw_dynamic <https://github.com/riscv-software-src/opensbi/blob/master/docs/firmware/fw_dynamic.md>`_)
+providing the SBI, as well as a regular U-Boot (or U-Boot proper) running in
+S-mode. Finally, the S-mode Operating
+System is loaded.
+
+The following diagram illustrates the boot process::
+
+	<-------------( M-mode )----------><----------( S-mode )------->
+	+------------+   +--------------+    +----------+   +----------+
+	| U-Boot SPL |-->| SBI firmware |--->|  U-Boot  |-->|    OS    |
+	+------------+   +--------------+    +----------+   +----------+
+
+To examine the boot process with the QEMU virt machine, you can follow the
+steps in the "Running U-Boot SPL" section of the following document:
+:doc:`../board/emulation/qemu-riscv`.
+
+Toolchain
+---------
+
+You can build the
+`RISC-V GNU toolchain <https://github.com/riscv-collab/riscv-gnu-toolchain>`_
+from scratch, or download a pre-built toolchain from the
+`releases page <https://github.com/riscv-collab/riscv-gnu-toolchain/releases>`_.
diff --git a/doc/arch/sandbox/block_impl.rst b/doc/arch/sandbox/block_impl.rst
new file mode 100644
index 00000000000..344c74f718b
--- /dev/null
+++ b/doc/arch/sandbox/block_impl.rst
@@ -0,0 +1,39 @@
+.. SPDX-License-Identifier: GPL-2.0+ */
+.. Copyright (c) 2014 The Chromium OS Authors.
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Sandbox block devices (implementation)
+======================================
+
+(See :ref:`sandbox_blk` for operation)
+
+Sandbox block devices are implemented using the `UCLASS_HOST` uclass. Only one
+driver is provided (`host_sb_drv`) so all devices in the uclass use the same
+driver.
+
+The uclass has a simple API allowing files to be attached and detached.
+Attaching a file results in it appearing as a block device in sandbox. This
+allows filesystems and whole disk images to be accessed from U-Boot. This is
+particularly useful for tests.
+
+Devices are created using `host_create_device()`. This sets up a new
+`UCLASS_HOST`.
+
+The device can then be attached to a file with `host_attach_file()`. This
+creates the child block device (and bootdev device).
+
+The host device's block device must be probed before use, as normal.
+
+To destroy a device, call host_destroy_device(). This removes the device (and
+its children of course), then closes any attached file, then unbinds the device.
+
+There is no arbitrary limit to the number of host devices that can be created.
+
+
+Uclass API
+----------
+
+This is incomplete as it isn't clear how to make Sphinx do the right thing for
+struct host_ops. See `include/sandbox_host.h` for full details.
+
+.. kernel-doc:: include/sandbox_host.h
diff --git a/doc/arch/sandbox/index.rst b/doc/arch/sandbox/index.rst
new file mode 100644
index 00000000000..1f1f5de4b03
--- /dev/null
+++ b/doc/arch/sandbox/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0+ */
+.. Copyright 2022 Google LLC
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Sandbox
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   sandbox
+   block_impl
diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst
new file mode 100644
index 00000000000..5f8db126657
--- /dev/null
+++ b/doc/arch/sandbox/sandbox.rst
@@ -0,0 +1,668 @@
+.. SPDX-License-Identifier: GPL-2.0+ */
+.. Copyright (c) 2014 The Chromium OS Authors.
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Sandbox
+=======
+
+Native Execution of U-Boot
+--------------------------
+
+The 'sandbox' architecture is designed to allow U-Boot to run under Linux on
+almost any hardware. To achieve this it builds U-Boot (so far as possible)
+as a normal C application with a main() and normal C libraries.
+
+All of U-Boot's architecture-specific code therefore cannot be built as part
+of the sandbox U-Boot. The purpose of running U-Boot under Linux is to test
+all the generic code, not specific to any one architecture. The idea is to
+create unit tests which we can run to test this upper level code.
+
+Sandbox allows development of many types of new features in a traditional way,
+rather than needing to test each iteration on real hardware. Many U-Boot
+features were developed on sandbox, including the core driver model, most
+uclasses, verified boot, bloblist, logging and dozens of others. Sandbox has
+enabled many large-scale code refactors as well.
+
+CONFIG_SANDBOX is defined when building a native board.
+
+The board name is 'sandbox' but the vendor name is unset, so there is a
+single board in board/sandbox.
+
+CONFIG_SANDBOX_BIG_ENDIAN should be defined when running on big-endian
+machines.
+
+There are two versions of the sandbox: One using 32-bit-wide integers, and one
+using 64-bit-wide integers. The 32-bit version can be build and run on either
+32 or 64-bit hosts by either selecting or deselecting CONFIG_SANDBOX_32BIT; by
+default, the sandbox it built for a 32-bit host. The sandbox using 64-bit-wide
+integers can only be built on 64-bit hosts.
+
+Note that standalone/API support is not available at present.
+
+
+Prerequisites
+-------------
+
+Install the dependencies noted in :doc:`../../build/gcc`.
+
+
+Basic Operation
+---------------
+
+To run sandbox U-Boot use something like::
+
+   make sandbox_defconfig all
+   ./u-boot
+
+Note: If you get errors about 'sdl-config: Command not found' you may need to
+install libsdl2.0-dev or similar to get SDL support. Alternatively you can
+build sandbox without SDL (i.e. no display/keyboard support) by disabling
+CONFIG_SANDBOX_SDL in the .config file.
+
+U-Boot will start on your computer, showing a sandbox emulation of the serial
+console::
+
+   U-Boot 2014.04 (Mar 20 2014 - 19:06:00)
+
+   DRAM:  128 MiB
+   Using default environment
+
+   In:    serial
+   Out:   lcd
+   Err:   lcd
+   =>
+
+You can issue commands as your would normally. If the command you want is
+not supported you can add it to include/configs/sandbox.h.
+
+To exit, type 'poweroff' or press Ctrl-C.
+
+
+Console / LCD support
+---------------------
+
+Assuming that CONFIG_SANDBOX_SDL is enabled when building, you can run the
+sandbox with LCD and keyboard emulation, using something like::
+
+   ./u-boot -d u-boot.dtb -l
+
+This will start U-Boot with a window showing the contents of the LCD. If
+that window has the focus then you will be able to type commands as you
+would on the console. You can adjust the display settings in the device
+tree file - see arch/sandbox/dts/sandbox.dts.
+
+
+Command-line Options
+--------------------
+
+Various options are available, mostly for test purposes. Use -h to see
+available options. Some of these are described below:
+
+-t, --terminal <arg>
+  The terminal is normally in what is called 'raw-with-sigs' mode. This means
+  that you can use arrow keys for command editing and history, but if you
+  press Ctrl-C, U-Boot will exit instead of handling this as a keypress.
+  Other options are 'raw' (so Ctrl-C is handled within U-Boot) and 'cooked'
+  (where the terminal is in cooked mode and cursor keys will not work, Ctrl-C
+  will exit).
+
+-l
+  Show the LCD emulation window.
+
+-d <device_tree>
+  A device tree binary file can be provided with -d. If you edit the source
+  (it is stored at arch/sandbox/dts/sandbox.dts) you must rebuild U-Boot to
+  recreate the binary file.
+
+-D
+  To use the default device tree, use -D.
+
+-T
+  To use the test device tree, use -T.
+
+-c [<cmd>;]<cmd>
+  To execute commands directly, use the -c option. You can specify a single
+  command, or multiple commands separated by a semicolon, as is normal in
+  U-Boot. Be careful with quoting as the shell will normally process and
+  swallow quotes. When -c is used, U-Boot exits after the command is complete,
+  but you can force it to go to interactive mode instead with -i.
+
+-i
+  Go to interactive mode after executing the commands specified by -c.
+
+Environment Variables
+---------------------
+
+UBOOT_SB_TIME_OFFSET
+    This environment variable stores the offset of the emulated real time clock
+    to the host's real time clock in seconds. The offset defaults to zero.
+
+Memory Emulation
+----------------
+
+Memory emulation is supported, with the size set by CONFIG_SANDBOX_RAM_SIZE_MB.
+The -m option can be used to read memory from a file on start-up and write
+it when shutting down. This allows preserving of memory contents across
+test runs. You can tell U-Boot to remove the memory file after it is read
+(on start-up) with the --rm_memory option.
+
+To access U-Boot's emulated memory within the code, use map_sysmem(). This
+function is used throughout U-Boot to ensure that emulated memory is used
+rather than the U-Boot application memory. This provides memory starting
+at 0 and extending to the size of the emulation.
+
+
+Storing State
+-------------
+
+With sandbox you can write drivers which emulate the operation of drivers on
+real devices. Some of these drivers may want to record state which is
+preserved across U-Boot runs. This is particularly useful for testing. For
+example, the contents of a SPI flash chip should not disappear just because
+U-Boot exits.
+
+State is stored in a device tree file in a simple format which is driver-
+specific. You then use the -s option to specify the state file. Use -r to
+make U-Boot read the state on start-up (otherwise it starts empty) and -w
+to write it on exit (otherwise the stored state is left unchanged and any
+changes U-Boot made will be lost). You can also use -n to tell U-Boot to
+ignore any problems with missing state. This is useful when first running
+since the state file will be empty.
+
+The device tree file has one node for each driver - the driver can store
+whatever properties it likes in there. See 'Writing Sandbox Drivers' below
+for more details on how to get drivers to read and write their state.
+
+
+Running and Booting
+-------------------
+
+Since there is no machine architecture, sandbox U-Boot cannot actually boot
+a kernel, but it does support the bootm command. Filesystems, memory
+commands, hashing, FIT images, verified boot and many other features are
+supported.
+
+When 'bootm' runs a kernel, sandbox will exit, as U-Boot does on a real
+machine. Of course in this case, no kernel is run.
+
+It is also possible to tell U-Boot that it has jumped from a temporary
+previous U-Boot binary, with the -j option. That binary is automatically
+removed by the U-Boot that gets the -j option. This allows you to write
+tests which emulate the action of chain-loading U-Boot, typically used in
+a situation where a second 'updatable' U-Boot is stored on your board. It
+is very risky to overwrite or upgrade the only U-Boot on a board, since a
+power or other failure will brick the board and require return to the
+manufacturer in the case of a consumer device.
+
+
+Supported Drivers
+-----------------
+
+U-Boot sandbox supports these emulations:
+
+- Arm FF-A
+- Block devices
+- Chrome OS EC
+- GPIO
+- Host filesystem (access files on the host from within U-Boot)
+- I2C
+- Keyboard (Chrome OS)
+- LCD
+- Network
+- Serial (for console only)
+- Sound (incomplete - see sandbox_sdl_sound_init() for details)
+- SPI
+- SPI flash
+- TPM (Trusted Platform Module)
+
+A wide range of commands are implemented. Filesystems which use a block
+device are supported.
+
+Also sandbox supports driver model (CONFIG_DM) and associated commands.
+
+
+Sandbox Variants
+----------------
+
+There are unfortunately quite a few variants at present:
+
+sandbox:
+  should be used for most tests
+sandbox64:
+  special build that forces a 64-bit host
+sandbox_flattree:
+  builds with dev_read\_...() functions defined as inline.
+  We need this build so that we can test those inline functions, and we
+  cannot build with both the inline functions and the non-inline functions
+  since they are named the same.
+sandbox_spl:
+  builds sandbox with SPL support, so you can run spl/u-boot-spl
+  and it will start up and then load ./u-boot. It is also possible to
+  run ./u-boot directly.
+
+Of these sandbox_spl can probably be removed since it is a superset of sandbox.
+
+Most of the config options should be identical between these variants.
+
+
+Linux RAW Networking Bridge
+---------------------------
+
+The sandbox_eth_raw driver bridges traffic between the bottom of the network
+stack and the RAW sockets API in Linux. This allows much of the U-Boot network
+functionality to be tested in sandbox against real network traffic.
+
+For Ethernet network adapters, the bridge utilizes the RAW AF_PACKET API.  This
+is needed to get access to the lowest level of the network stack in Linux. This
+means that all of the Ethernet frame is included. This allows the U-Boot network
+stack to be fully used. In other words, nothing about the Linux network stack is
+involved in forming the packets that end up on the wire. To receive the
+responses to packets sent from U-Boot the network interface has to be set to
+promiscuous mode so that the network card won't filter out packets not destined
+for its configured (on Linux) MAC address.
+
+The RAW sockets Ethernet API requires elevated privileges in Linux. You can
+either run as root, or you can add the capability needed like so::
+
+   sudo /sbin/setcap "CAP_NET_RAW+ep" /path/to/u-boot
+
+The default device tree for sandbox includes an entry for eth0 on the sandbox
+host machine whose alias is "eth1". The following are a few examples of network
+operations being tested on the eth0 interface.
+
+.. code-block:: none
+
+   sudo /path/to/u-boot -D
+
+   DHCP
+   ....
+
+   setenv autoload no
+   setenv ethrotate no
+   setenv ethact eth1
+   dhcp
+
+   PING
+   ....
+
+   setenv autoload no
+   setenv ethrotate no
+   setenv ethact eth1
+   dhcp
+   ping $gatewayip
+
+   TFTP
+   ....
+
+   setenv autoload no
+   setenv ethrotate no
+   setenv ethact eth1
+   dhcp
+   setenv serverip WWW.XXX.YYY.ZZZ
+   tftpboot u-boot.bin
+
+The bridge also supports (to a lesser extent) the localhost interface, 'lo'.
+
+The 'lo' interface cannot use the RAW AF_PACKET API because the lo interface
+doesn't support Ethernet-level traffic. It is a higher-level interface that is
+expected only to be used at the AF_INET level of the API. As such, the most raw
+we can get on that interface is the RAW AF_INET API on UDP. This allows us to
+set the IP_HDRINCL option to include everything except the Ethernet header in
+the packets we send and receive.
+
+Because only UDP is supported, ICMP traffic will not work, so expect that ping
+commands will time out.
+
+The default device tree for sandbox includes an entry for lo on the sandbox
+host machine whose alias is "eth5". The following is an example of a network
+operation being tested on the lo interface.
+
+.. code-block:: none
+
+   TFTP
+   ....
+
+   setenv ethrotate no
+   setenv ethact eth5
+   tftpboot u-boot.bin
+
+
+SPI Emulation
+-------------
+
+Sandbox supports SPI and SPI flash emulation.
+
+The device can be enabled via a device tree, for example::
+
+    spi@0 {
+            #address-cells = <1>;
+            #size-cells = <0>;
+            reg = <0 1>;
+            compatible = "sandbox,spi";
+            cs-gpios = <0>, <&gpio_a 0>;
+            spi.bin@0 {
+                    reg = <0>;
+                    compatible = "spansion,m25p16", "jedec,spi-nor";
+                    spi-max-frequency = <40000000>;
+                    sandbox,filename = "spi.bin";
+            };
+    };
+
+The file must be created in advance::
+
+   $ dd if=/dev/zero of=spi.bin bs=1M count=2
+   $ u-boot -T
+
+Here, you can use "-T" or "-D" option to specify test.dtb or u-boot.dtb,
+respectively, or "-d <file>" for your own dtb.
+
+With this setup you can issue SPI flash commands as normal::
+
+   =>sf probe
+   SF: Detected M25P16 with page size 64 KiB, total 2 MiB
+   =>sf read 0 0 10000
+   SF: 65536 bytes @ 0x0 Read: OK
+
+Since this is a full SPI emulation (rather than just flash), you can
+also use low-level SPI commands::
+
+   =>sspi 0:0 32 9f
+   FF202015
+
+This is issuing a READ_ID command and getting back 20 (ST Micro) part
+0x2015 (the M25P16).
+
+.. _sandbox_blk:
+
+Block Device Emulation
+----------------------
+
+U-Boot can use raw disk images for block device emulation. To e.g. list
+the contents of the root directory on the second partion of the image
+"disk.raw", you can use the following commands::
+
+   =>host bind 0 ./disk.raw
+   =>ls host 0:2
+
+The device can be marked removeable with 'host bind -r'.
+
+A disk image can be created using the following commands::
+
+   $> truncate -s 1200M ./disk.raw
+   $> /usr/sbin/sgdisk --new=1:0:+64M --typecode=1:EF00 --new=2:0:0 --typecode=2:8300 disk.raw
+   $> lodev=`sudo losetup -P -f --show ./disk.raw`
+   $> sudo mkfs.vfat -n EFI -v ${lodev}p1
+   $> sudo mkfs.ext4 -L ROOT -v ${lodev}p2
+
+or utilize the device described in test/py/make_test_disk.py::
+
+   #!/usr/bin/python
+   import make_test_disk
+   make_test_disk.makeDisk()
+
+For more technical details, see :doc:`block_impl`.
+
+Writing Sandbox Drivers
+-----------------------
+
+Generally you should put your driver in a file containing the word 'sandbox'
+and put it in the same directory as other drivers of its type. You can then
+implement the same hooks as the other drivers.
+
+To access U-Boot's emulated memory, use map_sysmem() as mentioned above.
+
+If your driver needs to store configuration or state (such as SPI flash
+contents or emulated chip registers), you can use the device tree as
+described above. Define handlers for this with the SANDBOX_STATE_IO macro.
+See arch/sandbox/include/asm/state.h for documentation. In short you provide
+a node name, compatible string and functions to read and write the state.
+Since writing the state can expand the device tree, you may need to use
+state_setprop() which does this automatically and avoids running out of
+space. See existing code for examples.
+
+
+VPL (Verifying Program Loader)
+------------------------------
+
+Sandbox provides an example build of vpl called `sandbox_vpl`. To build it:
+
+.. code-block:: bash
+
+   make sandbox_vpl_defconfig all
+
+This can be run using:
+
+.. code-block:: bash
+
+   ./tpl/u-boot-tpl -d u-boot.dtb
+
+It starts up TPL (first-stage init), then VPL, then runs SPL and finally U-Boot
+proper, following the normal flow for a verified boot. At present, no
+verification is actually implemented.
+
+Here is an example trace::
+
+   U-Boot TPL 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700)
+   Trying to boot from sandbox_image
+   Trying to boot from sandbox_file
+
+   U-Boot VPL 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700)
+   Trying to boot from vbe_simple
+   Trying to boot from sandbox_image
+   Trying to boot from sandbox_file
+
+   U-Boot SPL 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700)
+   Trying to boot from vbe_simple
+   Trying to boot from sandbox_image
+   Trying to boot from sandbox_file
+
+
+   U-Boot 2024.01-rc2-00129 (Nov 19 2023 - 08:10:12 -0700)
+
+   Reset Status: COLD
+   Model: sandbox
+   DRAM:  256 MiB
+   using memory 0x1b576000-0x1f578000 for malloc()
+
+   Warning: host_lo MAC addresses don't match:
+   Address in ROM is		96:cd:ef:82:78:51
+   Address in environment is	02:00:11:22:33:44
+   Core:  103 devices, 51 uclasses, devicetree: board
+   MMC:
+   Loading Environment from nowhere... OK
+   In:    serial,cros-ec-keyb,usbkbd
+   Out:   serial,vidconsole
+   Err:   serial,vidconsole
+   Model: sandbox
+   Net:   eth0: host_lo, eth1: host_enp14s0, eth2: host_eth6, eth3: host_wlp15s0, eth4: host_virbr0, eth5: host_docker0, eth6: eth@10002000
+   Hit any key to stop autoboot:  1
+
+
+Debugging the init sequence
+---------------------------
+
+If you get a failure in the initcall sequence, like this::
+
+   initcall sequence 0000560775957c80 failed at call 0000000000048134 (err=-96)
+
+Then you use can use grep to see which init call failed, e.g.::
+
+   $ grep 0000000000048134 u-boot.map
+   stdio_add_devices
+
+Of course another option is to run it with a debugger such as gdb::
+
+   $ gdb u-boot
+   ...
+   (gdb) br initcall.h:41
+   Breakpoint 1 at 0x4db9d: initcall.h:41. (2 locations)
+
+Note that two locations are reported, since this function is used in both
+board_init_f() and board_init_r().
+
+.. code-block:: none
+
+   (gdb) r
+   Starting program: /tmp/b/sandbox/u-boot
+   [Thread debugging using libthread_db enabled]
+   Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".
+
+   U-Boot 2018.09-00264-ge0c2ba9814-dirty (Sep 22 2018 - 12:21:46 -0600)
+
+   DRAM:  128 MiB
+   MMC:
+
+   Breakpoint 1, initcall_run_list (init_sequence=0x5555559619e0 <init_sequence_f>)
+       at /scratch/sglass/cosarm/src/third_party/u-boot/files/include/initcall.h:41
+   41                              printf("initcall sequence %p failed at call %p (err=%d)\n",
+   (gdb) print *init_fnc_ptr
+   $1 = (const init_fnc_t) 0x55555559c114 <stdio_add_devices>
+   (gdb)
+
+
+This approach can be used on normal boards as well as sandbox.
+
+For debugging with GDB or LLDB, it is preferable to reduce the compiler
+optimization level (CONFIG_CC_OPTIMIZE_FOR_DEBUG=y) and to disable Link Time
+Optimization (CONFIG_LTO=n).
+
+SDL_CONFIG
+----------
+
+If sdl-config is on a different path from the default, set the SDL_CONFIG
+environment variable to the correct pathname before building U-Boot.
+
+
+Using valgrind / memcheck
+-------------------------
+
+It is possible to run U-Boot under valgrind to check memory allocations::
+
+    valgrind ./u-boot
+
+However, this does not give very useful results. The sandbox allocates a memory
+pool via mmap(). U-Boot's internal malloc() and free() work on this memory pool.
+Custom allocators and deallocators are invisible to valgrind by default. To
+expose U-Boot's malloc() and free() to valgrind, enable ``CONFIG_VALGRIND``.
+Enabling this option will inject placeholder assembler code which valgrind
+interprets. This is used to annotate sections of memory as safe or unsafe, and
+to inform valgrind about malloc()s and free()s. There are currently no standard
+placeholder assembly sequences for RISC-V, so this option cannot be enabled on
+that architecture.
+
+Malloc's bookkeeping information is marked as unsafe by default. However, this
+will generate many false positives when malloc itself accesses this information.
+These warnings can be suppressed with::
+
+    valgrind --suppressions=scripts/u-boot.supp ./u-boot
+
+Additionally, you may experience false positives if U-Boot is using a smaller
+pointer size than your host architecture. This is because the pointers used by
+U-Boot will only contain 32 bits of addressing information. When interpreted as
+64-bit pointers, valgrind will think that they are not initialized properly. To
+fix this, enable ``CONFIG_SANDBOX64`` (such as via ``sandbox64_defconfig``)
+when running on a 64-bit host.
+
+Additional options
+^^^^^^^^^^^^^^^^^^
+
+The following valgrind options are useful in addition to the above examples:
+
+``--trace-childen=yes``
+    tells valgrind to keep tracking subprocesses, such
+    as when U-Boot jumps from TPL to SPL, or from SPL to U-Boot proper.
+
+``--track-origins=yes``
+    will (for a small overhead) tell valgrind to keep
+    track of who allocated some troublesome memory.
+
+``--error-limit``
+    will enable printing more than 1000 errors in a single session.
+
+``--vgdb=yes --vgdb-error=0``
+    will let you use GDB to attach like::
+
+        gdb -ex "target remote | vgdb" u-boot
+
+    This is very helpful for inspecting the program state when there is
+    an error.
+
+The following U-Boot option are also helpful:
+
+``-Tc 'ut all'``
+    lets U-Boot run unit tests automatically. Note
+    that not all unit tests will succeed in the default configuration.
+
+``-t cooked``
+    will keep the console in a sane state if you
+    terminate it early (instead of having to run tset).
+
+Future work
+^^^^^^^^^^^
+
+The biggest limitation to the current approach is that supressions don't
+"un-taint" uninitialized memory accesses. Currently, dlmalloc's bookkeeping
+information is marked as a "red zone." This means that all reads to that zone
+are marked as illegal by valgrind. This is fine for regular code, but dlmalloc
+really does need to access this area, so we suppress its violations. However, if
+dlmalloc then passes a result calculated from a "tainted" access, that result is
+still tainted. So the first accessor will raise a warning. This means that every
+construct like
+
+.. code-block::
+
+    foo = malloc(sizeof(*foo));
+    if (!foo)
+        return -ENOMEM;
+
+will raise a warning when we check the result of malloc. Whoops.
+
+There are at least four possible ways to address this:
+
+* Don't mark dlmalloc bookkeeping information as a red zone. This is the
+  simplest solution, but reduces the power of valgrind immensely, since we can
+  no longer determine that (e.g.) access past the end of an array is undefined.
+* Implement red zones properly. This would involve growing every allocation by a
+  fixed amount (16 bytes or so) and then using that extra space for a real red
+  zone that neither regular code nor dlmalloc needs to access. Unfortunately,
+  this would probably some fairly intensive surgery to dlmalloc to add/remove
+  the offset appropriately.
+* Mark bookkeeping information as valid before we use it in dlmalloc, and then
+  mark it invalid before returning. This would be the most correct, but it would
+  be very tricky to implement since there are so many code paths to mark. I
+  think it would be the most effort out of the three options here.
+* Use the host malloc and free instead of U-Boot's custom allocator. This will
+  eliminate the need to annotate dlmalloc. However, using a different allocator
+  for sandbox will mean that bugs in dlmalloc will only be tested when running
+  on read (or emulated) hardware.
+
+Until one of the above options are implemented, it will remain difficult
+to sift through the massive amount of spurious warnings.
+
+Testing
+-------
+
+U-Boot sandbox can be used to run various tests, mostly in the test/
+directory.
+
+See :doc:`../../develop/tests_sandbox` for more information and
+:doc:`../../develop/testing` for information about testing generally.
+
+
+Memory Map
+----------
+
+Sandbox has its own emulated memory starting at 0. Here are some of the things
+that are mapped into that memory:
+
+=======   ========================   ===============================
+Addr      Config                     Usage
+=======   ========================   ===============================
+    100   CONFIG_SYS_FDT_LOAD_ADDR   Device tree
+   b000   CONFIG_BLOBLIST_ADDR       Blob list
+  10000   CFG_MALLOC_F_ADDR          Early memory allocation
+  f0000   CONFIG_PRE_CON_BUF_ADDR    Pre-console buffer
+ 100000   CONFIG_TRACE_EARLY_ADDR    Early trace buffer (if enabled). Also used
+                                     as the SPL load buffer in spl_test_load().
+ 200000   CONFIG_TEXT_BASE           Load buffer for U-Boot (sandbox_spl only)
+=======   ========================   ===============================
diff --git a/doc/arch/sh.rst b/doc/arch/sh.rst
new file mode 100644
index 00000000000..3e3759d68b2
--- /dev/null
+++ b/doc/arch/sh.rst
@@ -0,0 +1,88 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigaur.org>
+
+SuperH
+======
+
+What's this?
+------------
+This file contains status information for the port of U-Boot to the
+Renesas SuperH series of CPUs.
+
+Overview
+--------
+SuperH has an original boot loader. However, source code is dirty, and
+maintenance is not done. To improve sharing and the maintenance of the code,
+Nobuhiro Iwamatsu started the porting to U-Boot in 2007.
+
+Supported CPUs
+--------------
+
+Renesas SH7750/SH7750R
+^^^^^^^^^^^^^^^^^^^^^^
+This CPU has the SH4 core.
+
+Renesas SH7722
+^^^^^^^^^^^^^^
+This CPU has the SH4AL-DSP core.
+
+Supported Boards
+----------------
+
+Hitachi UL MS7750SE01/MS7750RSE01
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+Board specific code is in board/ms7750se
+To use this board, type "make ms7750se_config".
+Support devices are:
+
+   - SCIF
+   - SDRAM
+   - NOR Flash
+   - Marubun PCMCIA
+
+Hitachi UL MS7722SE01
+^^^^^^^^^^^^^^^^^^^^^
+Board specific code is in board/ms7722se
+To use this board, type "make ms7722se_config".
+Support devices are:
+
+   - SCIF
+   - SDRAM
+   - NOR Flash
+   - Marubun PCMCIA
+   - SMC91x ethernet
+
+Hitachi UL MS7720ERP01
+^^^^^^^^^^^^^^^^^^^^^^
+Board specific code is in board/ms7720se
+To use this board, type "make ms7720se_config".
+Support devices are:
+
+   - SCIF
+   - SDRAM
+   - NOR Flash
+   - Marubun PCMCIA
+
+In SuperH, S-record and binary of made u-boot work on the memory.
+When u-boot is written in the flash, it is necessary to change the
+address by using 'objcopy'::
+
+   ex) shX-linux-objcopy -Ibinary -Osrec u-boot.bin u-boot.flash.srec
+
+Compiler
+--------
+You can use the following of u-boot to compile.
+   - `SuperH Linux Open site <http://www.superh-linux.org/>`_
+   - `KPIT GNU tools <http://www.kpitgnutools.com/>`_
+
+Future
+------
+I plan to support the following CPUs and boards.
+
+CPUs
+^^^^
+- SH7751R(SH4)
+
+Boards
+^^^^^^
+Many boards ;-)
diff --git a/doc/arch/x86/index.rst b/doc/arch/x86/index.rst
new file mode 100644
index 00000000000..69db0a5d648
--- /dev/null
+++ b/doc/arch/x86/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0+ */
+.. Copyright 2023 Google LLC
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+x86
+===
+
+.. toctree::
+   :maxdepth: 2
+
+   x86
+   manual_boot
diff --git a/doc/arch/x86/manual_boot.rst b/doc/arch/x86/manual_boot.rst
new file mode 100644
index 00000000000..ec069f2c397
--- /dev/null
+++ b/doc/arch/x86/manual_boot.rst
@@ -0,0 +1,276 @@
+Booting Ubuntu Manually
+-----------------------
+
+This shows a manual approach to booting Ubuntu without standard boot or the EFI
+interface.
+
+As an example of how to set up your boot flow with U-Boot, here are
+instructions for starting Ubuntu from U-Boot. These instructions have been
+tested on Minnowboard MAX with a SATA drive but are equally applicable on
+other platforms and other media. There are really only four steps and it's a
+very simple script, but a more detailed explanation is provided here for
+completeness.
+
+Note: It is possible to set up U-Boot to boot automatically using syslinux.
+It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the
+GUID. If you figure these out, please post patches to this README.
+
+Firstly, you will need Ubuntu installed on an available disk. It should be
+possible to make U-Boot start a USB start-up disk but for now let's assume
+that you used another boot loader to install Ubuntu.
+
+Use the U-Boot command line to find the UUID of the partition you want to
+boot. For example our disk is SCSI device 0::
+
+   => part list scsi 0
+
+   Partition Map for SCSI device 0  --   Partition Type: EFI
+
+      Part	Start LBA	End LBA		Name
+        Attributes
+        Type GUID
+        Partition GUID
+      1	0x00000800	0x001007ff	""
+        attrs:	0x0000000000000000
+        type:	c12a7328-f81f-11d2-ba4b-00a0c93ec93b
+        guid:	9d02e8e4-4d59-408f-a9b0-fd497bc9291c
+      2	0x00100800	0x037d8fff	""
+        attrs:	0x0000000000000000
+        type:	0fc63daf-8483-4772-8e79-3d69d8477de4
+        guid:	965c59ee-1822-4326-90d2-b02446050059
+      3	0x037d9000	0x03ba27ff	""
+        attrs:	0x0000000000000000
+        type:	0657fd6d-a4ab-43c4-84e5-0933c84b4f4f
+        guid:	2c4282bd-1e82-4bcf-a5ff-51dedbf39f17
+      =>
+
+This shows that your SCSI disk has three partitions. The really long hex
+strings are called Globally Unique Identifiers (GUIDs). You can look up the
+'type' ones `here`_. On this disk the first partition is for EFI and is in
+VFAT format (DOS/Windows)::
+
+   => fatls scsi 0:1
+               efi/
+
+   0 file(s), 1 dir(s)
+
+
+Partition 2 is 'Linux filesystem data' so that will be our root disk. It is
+in ext2 format::
+
+   => ext2ls scsi 0:2
+   <DIR>       4096 .
+   <DIR>       4096 ..
+   <DIR>      16384 lost+found
+   <DIR>       4096 boot
+   <DIR>      12288 etc
+   <DIR>       4096 media
+   <DIR>       4096 bin
+   <DIR>       4096 dev
+   <DIR>       4096 home
+   <DIR>       4096 lib
+   <DIR>       4096 lib64
+   <DIR>       4096 mnt
+   <DIR>       4096 opt
+   <DIR>       4096 proc
+   <DIR>       4096 root
+   <DIR>       4096 run
+   <DIR>      12288 sbin
+   <DIR>       4096 srv
+   <DIR>       4096 sys
+   <DIR>       4096 tmp
+   <DIR>       4096 usr
+   <DIR>       4096 var
+   <SYM>         33 initrd.img
+   <SYM>         30 vmlinuz
+   <DIR>       4096 cdrom
+   <SYM>         33 initrd.img.old
+   =>
+
+and if you look in the /boot directory you will see the kernel::
+
+   => ext2ls scsi 0:2 /boot
+   <DIR>       4096 .
+   <DIR>       4096 ..
+   <DIR>       4096 efi
+   <DIR>       4096 grub
+            3381262 System.map-3.13.0-32-generic
+            1162712 abi-3.13.0-32-generic
+             165611 config-3.13.0-32-generic
+             176500 memtest86+.bin
+             178176 memtest86+.elf
+             178680 memtest86+_multiboot.bin
+            5798112 vmlinuz-3.13.0-32-generic
+             165762 config-3.13.0-58-generic
+            1165129 abi-3.13.0-58-generic
+            5823136 vmlinuz-3.13.0-58-generic
+           19215259 initrd.img-3.13.0-58-generic
+            3391763 System.map-3.13.0-58-generic
+            5825048 vmlinuz-3.13.0-58-generic.efi.signed
+           28304443 initrd.img-3.13.0-32-generic
+   =>
+
+The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of
+self-extracting compressed file mixed with some 'setup' configuration data.
+Despite its size (uncompressed it is >10MB) this only includes a basic set of
+device drivers, enough to boot on most hardware types.
+
+The 'initrd' files contain a RAM disk. This is something that can be loaded
+into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots
+of drivers for whatever hardware you might have. It is loaded before the
+real root disk is accessed.
+
+The numbers after the end of each file are the version. Here it is Linux
+version 3.13. You can find the source code for this in the Linux tree with
+the tag v3.13. The '.0' allows for additional Linux releases to fix problems,
+but normally this is not needed. The '-58' is used by Ubuntu. Each time they
+release a new kernel they increment this number. New Ubuntu versions might
+include kernel patches to fix reported bugs. Stable kernels can exist for
+some years so this number can get quite high.
+
+The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own
+secure boot mechanism - see `this`_ & `that`_. It cannot read .efi files
+at present.
+
+To boot Ubuntu from U-Boot the steps are as follows:
+
+1. Set up the boot arguments. Use the GUID for the partition you want to boot::
+
+   => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
+
+Here root= tells Linux the location of its root disk. The disk is specified
+by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory'
+containing all the GUIDs Linux has found. When it starts up, there will be a
+file in that directory with this name in it. It is also possible to use a
+device name here, see later.
+
+2. Load the kernel. Since it is an ext2/4 filesystem we can do::
+
+   => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic
+
+The address 30000000 is arbitrary, but there seem to be problems with using
+small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into
+the start of RAM (which is at 0 on x86).
+
+3. Load the ramdisk (to 64MB)::
+
+   => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic
+
+4. Start up the kernel. We need to know the size of the ramdisk, but can use
+   a variable for that. U-Boot sets 'filesize' to the size of the last file it
+   loaded::
+
+   => zboot 03000000 0 04000000 ${filesize}
+
+Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is
+quite verbose when it boots a kernel. You should see these messages from
+U-Boot::
+
+   Valid Boot Flag
+   Setup Size = 0x00004400
+   Magic signature found
+   Using boot protocol version 2.0c
+   Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015
+   Building boot_params at 0x00090000
+   Loading bzImage at address 100000 (5805728 bytes)
+   Magic signature found
+   Initial RAM disk at linear address 0x04000000, size 19215259 bytes
+   Kernel command line: "root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
+
+   Starting kernel ...
+
+U-Boot prints out some bootstage timing. This is more useful if you put the
+above commands into a script since then it will be faster::
+
+   Timer summary in microseconds:
+          Mark    Elapsed  Stage
+             0          0  reset
+       241,535    241,535  board_init_r
+     2,421,611  2,180,076  id=64
+     2,421,790        179  id=65
+     2,428,215      6,425  main_loop
+    48,860,584 46,432,369  start_kernel
+
+   Accumulated time:
+                  240,329  ahci
+                1,422,704  vesa display
+
+Now the kernel actually starts (if you want to examine kernel boot up message on
+the serial console, append "console=ttyS0,115200" to the kernel command line)::
+
+   [    0.000000] Initializing cgroup subsys cpuset
+   [    0.000000] Initializing cgroup subsys cpu
+   [    0.000000] Initializing cgroup subsys cpuacct
+   [    0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22)
+   [    0.000000] Command line: root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro console=ttyS0,115200
+
+It continues for a long time. Along the way you will see it pick up your
+ramdisk::
+
+   [    0.000000] RAMDISK: [mem 0x04000000-0x05253fff]
+   ...
+   [    0.788540] Trying to unpack rootfs image as initramfs...
+   [    1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000)
+   ...
+
+Later it actually starts using it::
+
+   Begin: Running /scripts/local-premount ... done.
+
+You should also see your boot disk turn up::
+
+   [    4.357243] scsi 1:0:0:0: Direct-Access     ATA      ADATA SP310      5.2  PQ: 0 ANSI: 5
+   [    4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB)
+   [    4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0
+   [    4.381859] sd 1:0:0:0: [sda] Write Protect is off
+   [    4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
+   [    4.399535]  sda: sda1 sda2 sda3
+
+Linux has found the three partitions (sda1-3). Mercifully it doesn't print out
+the GUIDs. In step 1 above we could have used::
+
+   setenv bootargs root=/dev/sda2 ro
+
+instead of the GUID. However if you add another drive to your board the
+numbering may change whereas the GUIDs will not. So if your boot partition
+becomes sdb2, it will still boot. For embedded systems where you just want to
+boot the first disk, you have that option.
+
+The last thing you will see on the console is mention of plymouth (which
+displays the Ubuntu start-up screen) and a lot of 'Starting' messages::
+
+   * Starting Mount filesystems on boot                                   [ OK ]
+
+After a pause you should see a login screen on your display and you are done.
+
+If you want to put this in a script you can use something like this::
+
+   setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro
+   setenv boot zboot 03000000 0 04000000 \${filesize}
+   setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot"
+   saveenv
+
+The \ is to tell the shell not to evaluate ${filesize} as part of the setenv
+command.
+
+You can also bake this behaviour into your build by hard-coding the
+environment variables if you add this to minnowmax.h:
+
+.. code-block:: c
+
+	#undef CONFIG_BOOTCOMMAND
+	#define CONFIG_BOOTCOMMAND	\
+		"ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \
+		"ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \
+		"run boot"
+
+	#undef CFG_EXTRA_ENV_SETTINGS
+	#define CFG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
+
+and change CONFIG_BOOTARGS value in configs/minnowmax_defconfig to::
+
+   CONFIG_BOOTARGS="root=/dev/sda2 ro"
+
+.. _here: https://en.wikipedia.org/wiki/GUID_Partition_Table
+.. _this: http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf
+.. _that: http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
diff --git a/doc/arch/x86/x86.rst b/doc/arch/x86/x86.rst
new file mode 100644
index 00000000000..f67216d6ce0
--- /dev/null
+++ b/doc/arch/x86/x86.rst
@@ -0,0 +1,489 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2014, Simon Glass <sjg@chromium.org>
+.. Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+
+x86
+===
+
+This document describes the information about U-Boot running on x86 targets,
+including supported boards, build instructions, todo list, etc.
+
+Status
+------
+U-Boot supports running as a `coreboot`_ payload on x86. So far only Link
+(Chromebook Pixel), Brya (Alder Lake Chromebook) and `QEMU`_ x86 targets have
+been tested, but it should work with minimal adjustments on other x86 boards
+since coreboot deals with most of the low-level details.
+
+U-Boot is a main bootloader on Intel Edison board.
+
+U-Boot also supports booting directly from x86 reset vector, without coreboot.
+In this case, known as bare mode, from the fact that it runs on the
+'bare metal', U-Boot acts like a BIOS replacement. The following platforms
+are supported:
+
+   - Bayley Bay CRB
+   - Cherry Hill CRB
+   - Congatec QEVAL 2.0 & conga-QA3/E3845
+   - Coral (Apollo Lake - Chromebook 2017)
+   - Cougar Canyon 2 CRB
+   - Crown Bay CRB
+   - Galileo
+   - Link (Ivy Bridge - Chromebook Pixel)
+   - Minnowboard MAX
+   - Samus (Broadwell - Chromebook Pixel 2015)
+   - Coral (Apollo Lake Chromebooks circa 2017)
+   - QEMU x86 (32-bit & 64-bit)
+
+As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
+Linux kernel as part of a FIT image. It also supports a compressed zImage.
+U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks
+for more details. Finally, U-Boot can boot Linux distributions with a UEFI
+interface.
+
+Build Instructions for U-Boot as BIOS replacement (bare mode)
+-------------------------------------------------------------
+Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
+little bit tricky, as generally it requires several binary blobs which are not
+shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build may
+print some warnings if required binary blobs (e.g.: FSP) are not present.
+
+CPU Microcode
+-------------
+Modern CPUs usually require a special bit stream called `microcode`_ to be
+loaded on the processor after power up in order to function properly. U-Boot
+has already integrated these as hex dumps in the source tree.
+
+SMP Support
+-----------
+On a multicore system, U-Boot is executed on the bootstrap processor (BSP).
+Additional application processors (AP) can be brought up by U-Boot. In order to
+have an SMP kernel to discover all of the available processors, U-Boot needs to
+prepare configuration tables which contain the multi-CPUs information before
+loading the OS kernel. Currently U-Boot supports generating two types of tables
+for SMP, called Simple Firmware Interface (`SFI`_) and Multi-Processor (`MP`_)
+tables. The writing of these two tables are controlled by two Kconfig
+options GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
+
+Driver Model
+------------
+x86 has been converted to use driver model for serial, GPIO, SPI, SPI flash,
+keyboard, real-time clock, USB. Video is in progress.
+
+Device Tree
+-----------
+x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to
+be turned on. Not every device on the board is configured via device tree, but
+more and more devices will be added as time goes by. Check out the directory
+arch/x86/dts/ for these device tree source files.
+
+Useful Commands
+---------------
+In keeping with the U-Boot philosophy of providing functions to check and
+adjust internal settings, there are several x86-specific commands that may be
+useful:
+
+fsp
+  Display information about Intel Firmware Support Package (FSP).
+  This is only available on platforms which use FSP, mostly Atom.
+iod
+  Display I/O memory
+iow
+  Write I/O memory
+mtrr
+  List and set the Memory Type Range Registers (MTRR). These are used to
+  tell the CPU whether memory is cacheable and if so the cache write
+  mode to use. U-Boot sets up some reasonable values but you can
+  adjust then with this command.
+
+Booting Ubuntu
+--------------
+Typically U-Boot boots distributions automatically so long an `CONFIG_BOOTSTD`,
+`CONFIG_BOOTSTD_DEFAULTS` and `CONFIG_EFI_LOADER` are enabled. See
+:doc:`manual_boot` for how to do this manually.
+
+Test with SeaBIOS
+-----------------
+`SeaBIOS`_ is an open source implementation of a 16-bit x86 BIOS. It can run
+in an emulator or natively on x86 hardware with the use of U-Boot. With its
+help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS.
+
+As U-Boot, we have to manually create a table where SeaBIOS gets various system
+information (eg: E820) from. The table unfortunately has to follow the coreboot
+table format as SeaBIOS currently supports booting as a coreboot payload.
+
+To support loading SeaBIOS, U-Boot should be built with CONFIG_SEABIOS on.
+Booting SeaBIOS is done via U-Boot's bootelf command, like below::
+
+   => tftp bios.bin.elf;bootelf
+   Using e1000#0 device
+   TFTP from server 10.10.0.100; our IP address is 10.10.0.108
+   ...
+   Bytes transferred = 128748 (1f6ec hex)
+   ## Starting application at 0x000fd269 ...
+   SeaBIOS (version rel-1.14.0-0-g155821a)
+   ...
+
+bios.bin.elf is the SeaBIOS image built from SeaBIOS source tree. At the time
+being, SeaBIOS release 1.14.0 has been tested. To build the SeaBIOS image::
+
+   $ echo -e 'CONFIG_COREBOOT=y\nCONFIG_COREBOOT_FLASH=n\nCONFIG_DEBUG_SERIAL=y\nCONFIG_DEBUG_COREBOOT=n' > .config
+   $ make olddefconfig
+   $ make
+   ...
+   Total size: 128512  Fixed: 69216  Free: 2560 (used 98.0% of 128KiB rom)
+   Creating out/bios.bin.elf
+
+Currently this is tested on QEMU x86 target with U-Boot chain-loading SeaBIOS
+to install/boot a Windows XP OS (below for example command to install Windows).
+
+.. code-block:: none
+
+   # Create a 10G disk.img as the virtual hard disk
+   $ qemu-img create -f qcow2 disk.img 10G
+
+   # Install a Windows XP OS from an ISO image 'winxp.iso'
+   $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -cdrom winxp.iso -smp 2 -m 512
+
+   # Boot a Windows XP OS installed on the virutal hard disk
+   $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -smp 2 -m 512
+
+This is also tested on Intel Crown Bay board with a PCIe graphics card, booting
+SeaBIOS then chain-loading a GRUB on a USB drive, then Linux kernel finally.
+
+If you are using Intel Integrated Graphics Device (IGD) as the primary display
+device on your board, SeaBIOS needs to be patched manually to get its VGA ROM
+loaded and run by SeaBIOS. SeaBIOS locates VGA ROM via the PCI expansion ROM
+register, but IGD device does not have its VGA ROM mapped by this register.
+Its VGA ROM is packaged as part of u-boot.rom at a configurable flash address
+which is unknown to SeaBIOS. An example patch is needed for SeaBIOS below:
+
+.. code-block:: none
+
+   diff --git a/src/optionroms.c b/src/optionroms.c
+   index 65f7fe0..c7b6f5e 100644
+   --- a/src/optionroms.c
+   +++ b/src/optionroms.c
+   @@ -324,6 +324,8 @@ init_pcirom(struct pci_device *pci, int isvga, u64 *sources)
+            rom = deploy_romfile(file);
+        else if (RunPCIroms > 1 || (RunPCIroms == 1 && isvga))
+            rom = map_pcirom(pci);
+   +    if (pci->bdf == pci_to_bdf(0, 2, 0))
+   +        rom = (struct rom_header *)0xfff90000;
+        if (! rom)
+            // No ROM present.
+            return;
+
+Note: the patch above expects IGD device is at PCI b.d.f 0.2.0 and its VGA ROM
+is at 0xfff90000 which corresponds to CONFIG_VGA_BIOS_ADDR on Minnowboard MAX.
+Change these two accordingly if this is not the case on your board.
+
+Development Flow
+----------------
+These notes are for those who want to port U-Boot to a new x86 platform.
+
+Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment.
+The Dediprog em100 can be used on Linux.
+
+The em100 tool is available here: http://review.coreboot.org/p/em100.git
+
+On Minnowboard Max the following command line can be used::
+
+   sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r
+
+A suitable clip for connecting over the SPI flash chip is here:
+http://www.dediprog.com/pd/programmer-accessories/EM-TC-8.
+
+This allows you to override the SPI flash contents for development purposes.
+Typically you can write to the em100 in around 1200ms, considerably faster
+than programming the real flash device each time. The only important
+limitation of the em100 is that it only supports SPI bus speeds up to 20MHz.
+This means that images must be set to boot with that speed. This is an
+Intel-specific feature - e.g. tools/ifttool has an option to set the SPI
+speed in the SPI descriptor region.
+
+If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly
+easy to fit it in. You can follow the Minnowboard Max implementation, for
+example. Hopefully you will just need to create new files similar to those
+in arch/x86/cpu/baytrail which provide Bay Trail support.
+
+If you are not using an FSP you have more freedom and more responsibility.
+The ivybridge support works this way, although it still uses a ROM for
+graphics and still has binary blobs containing Intel code. You should aim to
+support all important peripherals on your platform including video and storage.
+Use the device tree for configuration where possible.
+
+For the microcode you can create a suitable device tree file using the
+microcode tool::
+
+   ./tools/microcode-tool -d microcode.dat -m <model> create
+
+or if you only have header files and not the full Intel microcode.dat database::
+
+   ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \
+    -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h -m all create
+
+These are written to arch/x86/dts/microcode/ by default.
+
+Note that it is possible to just add the micrcode for your CPU if you know its
+model. U-Boot prints this information when it starts::
+
+   CPU: x86_64, vendor Intel, device 30673h
+
+so here we can use the M0130673322 file.
+
+If you platform can display POST codes on two little 7-segment displays on
+the board, then you can use post_code() calls from C or assembler to monitor
+boot progress. This can be good for debugging.
+
+If not, you can try to get serial working as early as possible. The early
+debug serial port may be useful here. See setup_internal_uart() for an example.
+
+During the U-Boot porting, one of the important steps is to write correct PIRQ
+routing information in the board device tree. Without it, device drivers in the
+Linux kernel won't function correctly due to interrupt is not working. Please
+refer to U-Boot `doc <doc/device-tree-bindings/misc/intel,irq-router.txt>`_ for
+the device tree bindings of Intel interrupt router. Here we have more details
+on the intel,pirq-routing property below.
+
+.. code-block:: none
+
+	intel,pirq-routing = <
+		PCI_BDF(0, 2, 0) INTA PIRQA
+		...
+	>;
+
+As you see each entry has 3 cells. For the first one, we need describe all pci
+devices mounted on the board. For SoC devices, normally there is a chapter on
+the chipset datasheet which lists all the available PCI devices. For example on
+Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we
+can get the interrupt pin either from datasheet or hardware via U-Boot shell.
+The reliable source is the hardware as sometimes chipset datasheet is not 100%
+up-to-date. Type 'pci header' plus the device's pci bus/device/function number
+from U-Boot shell below::
+
+  => pci header 0.1e.1
+    vendor ID =			0x8086
+    device ID =			0x0f08
+    ...
+    interrupt line =		0x09
+    interrupt pin =		0x04
+    ...
+
+It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin
+register. Repeat this until you get interrupt pins for all the devices. The last
+cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel
+chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This
+can be changed by registers in LPC bridge. So far Intel FSP does not touch those
+registers so we can write down the PIRQ according to the default mapping rule.
+
+Once we get the PIRQ routing information in the device tree, the interrupt
+allocation and assignment will be done by U-Boot automatically. Now you can
+enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and
+CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC.
+
+This script might be useful. If you feed it the output of 'pci long' from
+U-Boot then it will generate a device tree fragment with the interrupt
+configuration for each device (note it needs gawk 4.0.0)::
+
+   $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \
+	/interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \
+	{patsplit(device, bdf, "[0-9a-f]+"); \
+	printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \
+	strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}'
+
+Example output::
+
+   PCI_BDF(0, 2, 0) INTA PIRQA
+   PCI_BDF(0, 3, 0) INTA PIRQA
+   ...
+
+Porting Hints
+-------------
+
+Quark-specific considerations
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+To port U-Boot to other boards based on the Intel Quark SoC, a few things need
+to be taken care of. The first important part is the Memory Reference Code (MRC)
+parameters. Quark MRC supports memory-down configuration only. All these MRC
+parameters are supplied via the board device tree. To get started, first copy
+the MRC section of arch/x86/dts/galileo.dts to your board's device tree, then
+change these values by consulting board manuals or your hardware vendor.
+Available MRC parameter values are listed in include/dt-bindings/mrc/quark.h.
+The other tricky part is with PCIe. Quark SoC integrates two PCIe root ports,
+but by default they are held in reset after power on. In U-Boot, PCIe
+initialization is properly handled as per Quark's firmware writer guide.
+In your board support codes, you need provide two routines to aid PCIe
+initialization, which are board_assert_perst() and board_deassert_perst().
+The two routines need implement a board-specific mechanism to assert/deassert
+PCIe PERST# pin. Care must be taken that in those routines that any APIs that
+may trigger PCI enumeration process are strictly forbidden, as any access to
+PCIe root port's configuration registers will cause system hang while it is
+held in reset. For more details, check how they are implemented by the Intel
+Galileo board support codes in board/intel/galileo/galileo.c.
+
+coreboot
+^^^^^^^^
+
+See scripts/coreboot.sed which can assist with porting coreboot code into
+U-Boot drivers. It will not resolve all build errors, but will perform common
+transformations. Remember to add attribution to coreboot for new files added
+to U-Boot. This should go at the top of each file and list the coreboot
+filename where the code originated.
+
+Debugging ACPI issues with Windows
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Windows might cache system information and only detect ACPI changes if you
+modify the ACPI table versions. So tweak them liberally when debugging ACPI
+issues with Windows.
+
+ACPI Support Status
+-------------------
+Advanced Configuration and Power Interface (`ACPI`_) aims to establish
+industry-standard interfaces enabling OS-directed configuration, power
+management, and thermal management of mobile, desktop, and server platforms.
+
+Linux can boot without ACPI with "acpi=off" command line parameter, but
+with ACPI the kernel gains the capabilities to handle power management.
+For Windows, ACPI is a must-have firmware feature since Windows Vista.
+CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
+U-Boot. This requires Intel ACPI compiler to be installed on your host to
+compile ACPI DSDT table written in ASL format to AML format. You can get
+the compiler via "apt-get install iasl" if you are on Ubuntu or download
+the source from https://www.acpica.org/downloads to compile one by yourself.
+
+Current ACPI support in U-Boot is basically complete. More optional features
+can be added in the future. The status as of today is:
+
+ * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
+ * Support one static DSDT table only, compiled by Intel ACPI compiler.
+ * Support S0/S3/S4/S5, reboot and shutdown from OS.
+ * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
+ * Support installing and booting Ubuntu 14.04 (or above) from U-Boot with
+   the help of SeaBIOS using legacy interface (non-UEFI mode).
+ * Support installing and booting Windows 8.1/10 from U-Boot with the help
+   of SeaBIOS using legacy interface (non-UEFI mode).
+ * Support ACPI interrupts with SCI only.
+
+Features that are optional:
+
+ * Dynamic AML bytecodes insertion at run-time. We may need this to support
+   SSDT table generation and DSDT fix up.
+ * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
+   those legacy stuff into U-Boot. ACPI spec allows a system that does not
+   support SMI (a legacy-free system).
+
+ACPI was initially enabled on BayTrail based boards. Testing was done by booting
+a pre-installed Ubuntu 14.04 from a SATA drive. Installing Ubuntu 14.04 and
+Windows 8.1/10 to a SATA drive and booting from there is also tested. Most
+devices seem to work correctly and the board can respond a reboot/shutdown
+command from the OS.
+
+For other platform boards, ACPI support status can be checked by examining their
+board defconfig files to see if CONFIG_GENERATE_ACPI_TABLE is set to y.
+
+The S3 sleeping state is a low wake latency sleeping state defined by ACPI
+spec where all system context is lost except system memory. To test S3 resume
+with a Linux kernel, simply run "echo mem > /sys/power/state" and kernel will
+put the board to S3 state where the power is off. So when the power button is
+pressed again, U-Boot runs as it does in cold boot and detects the sleeping
+state via ACPI register to see if it is S3, if yes it means we are waking up.
+U-Boot is responsible for restoring the machine state as it is before sleep.
+When everything is done, U-Boot finds out the wakeup vector provided by OSes
+and jump there. To determine whether ACPI S3 resume is supported, check to
+see if CONFIG_HAVE_ACPI_RESUME is set for that specific board.
+
+Note for testing S3 resume with Windows, correct graphics driver must be
+installed for your platform, otherwise you won't find "Sleep" option in
+the "Power" submenu from the Windows start menu.
+
+EFI Support
+-----------
+U-Boot supports booting as a 32-bit or 64-bit EFI payload, e.g. with UEFI.
+This is enabled with CONFIG_EFI_STUB to boot from both 32-bit and 64-bit
+UEFI BIOS. U-Boot can also run as an EFI application, with CONFIG_EFI_APP.
+The CONFIG_EFI_LOADER option, where U-Boot provides an EFI environment to
+the kernel (i.e. replaces UEFI completely but provides the same EFI run-time
+services) is supported too. For example, we can even use 'bootefi' command
+to load a 'u-boot-payload.efi', see below test logs on QEMU.
+
+.. code-block:: none
+
+  => load ide 0 3000000 u-boot-payload.efi
+  489787 bytes read in 138 ms (3.4 MiB/s)
+  => bootefi 3000000
+  Scanning disk ide.blk#0...
+  Found 2 disks
+  WARNING: booting without device tree
+  ## Starting EFI application at 03000000 ...
+  U-Boot EFI Payload
+
+
+  U-Boot 2018.07-rc2 (Jun 23 2018 - 17:12:58 +0800)
+
+  CPU: x86_64, vendor AMD, device 663h
+  DRAM:  2 GiB
+  MMC:
+  Video: 1024x768x32
+  Model: EFI x86 Payload
+  Net:   e1000: 52:54:00:12:34:56
+
+  Warning: e1000#0 using MAC address from ROM
+  eth0: e1000#0
+  No controllers found
+  Hit any key to stop autoboot:  0
+
+See :doc:`../../develop/uefi/u-boot_on_efi` and :doc:`../../develop/uefi/uefi`
+for details of EFI support in U-Boot.
+
+Chain-loading
+-------------
+U-Boot can be chain-loaded from another bootloader, such as
+:doc:`../../board/coreboot/index` coreboot or
+:doc:`../../board/intel/slimbootloader`. Typically this is done by building for
+targets 'coreboot' or 'slimbootloader'.
+
+For example, at present we have a 'coreboot' target but this runs very
+different code from the bare-metal targets, such as coral. There is very little
+in common between them.
+
+It is useful to be able to boot the same U-Boot on a device, with or without a
+first-stage bootloader. For example, with chromebook_coral, it is helpful for
+testing to be able to boot the same U-Boot (complete with FSP) on bare metal
+and from coreboot. It allows checking of things like CPU speed, comparing
+registers, ACPI tables and the like.
+
+To do this you can use ll_boot_init() in appropriate places to skip init that
+has already been done by the previous stage. This works by setting a
+GD_FLG_NO_LL_INIT flag when U-Boot detects that it is running from another
+bootloader.
+
+With this feature, you can build a bare-metal target and boot it from
+coreboot, for example.
+
+Note that this is a development feature only. It is not intended for use in
+production environments. Also it is not currently part of the automated tests
+so may break in the future.
+
+SMBIOS tables
+-------------
+
+To generate SMBIOS tables in U-Boot, for use by the OS, enable the
+CONFIG_GENERATE_SMBIOS_TABLE option. The easiest way to provide the values to
+use is via the device tree. For details see
+:download:`smbios.txt <../../device-tree-bindings/sysinfo/smbios.txt>`.
+
+TODO List
+---------
+- Audio
+- Chrome OS verified boot
+
+.. _coreboot: http://www.coreboot.org
+.. _QEMU: http://www.qemu.org
+.. _microcode: http://en.wikipedia.org/wiki/Microcode
+.. _SFI: http://simplefirmware.org
+.. _MP: http://www.intel.com/design/archives/processors/pro/docs/242016.htm
+.. _SeaBIOS: http://www.seabios.org/SeaBIOS
+.. _ACPI: http://www.acpi.info
diff --git a/doc/arch/xtensa.rst b/doc/arch/xtensa.rst
new file mode 100644
index 00000000000..176410d96b9
--- /dev/null
+++ b/doc/arch/xtensa.rst
@@ -0,0 +1,99 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Xtensa
+======
+
+Xtensa Architecture and Diamond Cores
+-------------------------------------
+
+Xtensa is a configurable processor architecture from Tensilica, Inc.
+Diamond Cores are pre-configured instances available for license and
+SoC cores in the same manner as ARM, MIPS, etc.
+
+Xtensa licensees create their own Xtensa cores with selected features
+and custom instructions, registers and co-processors. The custom core
+is configured with Tensilica tools and built with Tensilica's Xtensa
+Processor Generator.
+
+There are an effectively infinite number of CPUs in the Xtensa
+architecture family. It is, however, not feasible to support individual
+Xtensa CPUs in U-Boot. Therefore, there is only a single 'xtensa' CPU
+in the cpu tree of U-Boot.
+
+In the same manner as the Linux port to Xtensa, U-Boot adapts to an
+individual Xtensa core configuration using a set of macros provided with
+the particular core. This is part of what is known as the hardware
+abstraction layer (HAL). For the purpose of U-Boot, the HAL consists only
+of a few header files. These provide CPP macros that customize sources,
+Makefiles, and the linker script.
+
+
+Adding support for an additional processor configuration
+--------------------------------------------------------
+
+The header files for one particular processor configuration are inside
+a variant-specific directory located in the arch/xtensa/include/asm
+directory. The name of that directory starts with 'arch-' followed by
+the name for the processor configuration, for example, arch-dc233c for
+the Diamond DC233 processor.
+
+core.h:
+  Definitions for the core itself.
+
+The following files are part of the overlay but not used by U-Boot.
+
+tie.h:
+  Co-processors and custom extensions defined in the Tensilica Instruction
+  Extension (TIE) language.
+tie-asm.h:
+  Assembly macros to access custom-defined registers and states.
+
+
+Global Data Pointer, Exported Function Stubs, and the ABI
+---------------------------------------------------------
+
+To support standalone applications launched with the "go" command,
+U-Boot provides a jump table of entrypoints to exported functions
+(grep for EXPORT_FUNC). The implementation for Xtensa depends on
+which ABI (or function calling convention) is used.
+
+Windowed ABI presents unique difficulties with the approach based on
+keeping global data pointer in dedicated register. Because the register
+window rotates during a call, there is no register that is constantly
+available for the gd pointer. Therefore, on xtensa gd is a simple
+global variable. Another difficulty arises from the requirement to have
+an 'entry' at the beginning of a function, which rotates the register
+file and reserves a stack frame. This is an integral part of the
+windowed ABI implemented in hardware. It makes using a jump table to an
+arbitrary (separately compiled) function a bit tricky. Use of a simple
+wrapper is also very tedious due to the need to move all possible
+register arguments and adjust the stack to handle arguments that cannot
+be passed in registers. The most efficient approach is to have the jump
+table perform the 'entry' so as to pretend it's the start of the real
+function. This requires decoding the target function's 'entry'
+instruction to determine the stack frame size, and adjusting the stack
+pointer accordingly, then jumping into the target function just after
+the 'entry'. Decoding depends on the processor's endianness so uses the
+HAL. The implementation (12 instructions) is in examples/stubs.c.
+
+
+Access to Invalid Memory Addresses
+----------------------------------
+
+U-Boot does not check if memory addresses given as arguments to commands
+such as "md" are valid. There are two possible types of invalid
+addresses: an area of physical address space may not be mapped to RAM
+or peripherals, or in the presence of MMU an area of virtual address
+space may not be mapped to physical addresses.
+
+Accessing first type of invalid addresses may result in hardware lockup,
+reading of meaningless data, written data being ignored or an exception,
+depending on the CPU wiring to the system. Accessing second type of
+invalid addresses always ends with an exception.
+
+U-Boot for Xtensa provides a special memory exception handler that
+reports such access attempts and resets the board.
+
+
+.. Chris Zankel
+.. Ross Morley
diff --git a/doc/board/actions/cubieboard7.rst b/doc/board/actions/cubieboard7.rst
new file mode 100644
index 00000000000..1f73fc40f8c
--- /dev/null
+++ b/doc/board/actions/cubieboard7.rst
@@ -0,0 +1,114 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2020 Amit Singh Tomar <amittomer25@gmail.com>
+
+CUBIEBOARD7
+===========
+
+About this
+----------
+
+This document describes build and flash steps for Actions S700 SoC based Cubieboard7
+board.
+
+Cubieboard7 initial configuration
+---------------------------------
+
+Default Cubieboard7 comes with pre-installed Android where U-Boot is configured with
+a bootdelay of 0, entering a prompt by pressing keys does not seem to work.
+
+Though, one can enter ADFU mode and flash debian image(from host machine) where
+getting into u-boot prompt is easy.
+
+Enter ADFU Mode
+---------------
+
+Before write the firmware, let the development board entering the ADFU mode: insert
+one end of the USB cable to the PC, press and hold the ADFU button, and then connect
+the other end of the USB cable to the Mini USB port of the development board, release
+the ADFU button, after connecting it will enter the ADFU mode.
+
+Check whether entered ADFU Mode
+-------------------------------
+
+The user needs to run the following command on the PC side to check if the ADFU
+device is detected. ID realted to "Actions Semiconductor Co., Ltd"  means that
+the PC side has been correctly detected ADFU device, the development board
+also enter into the ADFU mode.
+
+.. code-block:: none
+
+   $ lsusb
+   Bus 001 Device 005: ID 04f2:b2eb Chicony Electronics Co., Ltd
+   Bus 001 Device 004: ID 0a5c:21e6 Broadcom Corp. BCM20702 Bluetooth 4.0 [ThinkPad]
+   Bus 001 Device 003: ID 046d:c534 Logitech, Inc. Unifying Receiver
+   Bus 001 Device 002: ID 8087:0024 Intel Corp. Integrated Rate Matching Hub
+   Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
+   Bus 004 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub
+   Bus 003 Device 013: ID 10d6:10d6 Actions Semiconductor Co., Ltd
+   Bus 003 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub
+
+Flashing debian image
+---------------------
+
+.. code-block:: none
+
+   $ sudo ./ActionsFWU.py --fw=debian-stretch-desktop-cb7-emmc-v2.0.fw
+   ActionsFWU.py	: 1.0.150828.0830
+   libScript.so    : 2.3.150825.0951
+   libFileSystem.so: 2.3.150825.0952
+   libProduction.so: 2.3.150915.1527
+   =====burn all partition====
+   FW_VER: 3.10.37.180608
+   3% DOWNLOAD ADFUDEC ...
+   5% DOWNLOAD BOOT PARA ...
+   7% SWITCH ADFUDEC ...
+   12% DOWNLOAD BL31 ...
+   13% DOWNLOAD BL32 ...
+   15% DOWNLOAD VMLINUX ...
+   20% DOWNLOAD INITRD ...
+   24% DOWNLOAD FDT ...
+   27% DOWNLOAD ADFUS ...
+   30% SWITCH ADFUS ...
+   32% DOWNLOAD MBR ...
+   35% DOWNLOAD PARTITIONS ...
+   WRITE_MBRC_PARTITION
+   35% write p0 size = 2048 : ok
+   WRITE_BOOT_PARTITION
+   35% write p1 size = 2048 : ok
+   WRITE_MISC_PARTITION
+   36% write p2 size = 98304 : ok
+   WRITE_SYSTEM_PARTITION
+   94% write p3 size = 4608000 : ok
+   FORMAT_SWAP_PARTITION
+   94% write p4 size = 20480 : ok
+   95% TRANSFER OVER ...
+   Firmware upgrade successfully!
+
+Debian image can be downloaded from here[1].
+
+Once debian image is flashed, one can get into u-boot prompt by pressing any key and from
+there run ums command(make sure, usb cable is connected between host and target):
+
+.. code-block:: none
+
+   owl> ums 0 mmc 1
+
+Above command would mount debian image partition on host machine.
+
+Building U-BOOT proper image
+----------------------------
+
+.. code-block:: none
+
+   $ make clean
+   $ export CROSS_COMPILE=aarch64-linux-gnu-
+   $ make cubieboard7_defconfig
+   $ make u-boot-dtb.img -j16
+
+u-boot-dtb.img can now be flashed to debian image partition mounted on host machine.
+
+.. code-block:: none
+
+   $ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1024 seek=3072
+
+[1]: https://pan.baidu.com/s/1uawPr0Jao2HgWFLZCLzHAg#list/path=%2FCubieBoard_Download%2FBoard%2FCubieBoard7%2F%E6%96%B9%E7%B3%96%E6%96%B9%E6%A1%88%E5%BC%80%E5%8F%91%E8%B5%84%E6%96%99%2FImage%2FDebian%2FV2.1-test&parentPath=%2F
diff --git a/doc/board/actions/index.rst b/doc/board/actions/index.rst
new file mode 100644
index 00000000000..e925fcd0f68
--- /dev/null
+++ b/doc/board/actions/index.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2020 Amit Singh Tomar <amittomer25@gmail.com>
+
+Actions
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   cubieboard7
diff --git a/doc/board/advantech/imx8qm-dmsse20-a1.rst b/doc/board/advantech/imx8qm-dmsse20-a1.rst
new file mode 100644
index 00000000000..b83e678cd9a
--- /dev/null
+++ b/doc/board/advantech/imx8qm-dmsse20-a1.rst
@@ -0,0 +1,58 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+NXP i.MX8QM DMSSE20-a1 board
+============================
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Get imx-mkimage
+- Build U-Boot
+- Flash the binary into the SD card
+- Boot
+
+Get and Build the ARM Trusted Firmware
+--------------------------------------
+
+.. code-block:: bash
+
+     $ git clone https://github.com/nxp-imx/imx-atf
+     $ cd imx-atf/
+     $ git checkout lf-5.10.72-2.2.0 -b lf-5.10.72-2.2.0
+     $ make PLAT=imx8qm bl31
+     $ cp build/imx8qm/release/bl31.bin $(builddir)
+
+Get scfw_tcm.bin and ahab-container.img
+---------------------------------------
+
+.. code-block:: bash
+
+     $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-1.11.0.bin
+     $ chmod +x imx-sc-firmware-1.11.0.bin
+     $ ./imx-sc-firmware-1.11.0.bin
+     $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-3.8.5.bin
+     $ chmod +x imx-seco-3.8.5.bin
+     $ ./imx-seco-3.8.5.bin
+
+Or use this to avoid running random scripts from the internet,
+but note that you must agree to the license the script displays:
+
+.. code-block:: bash
+
+     $ dd if=imx-sc-firmware-1.11.0.bin of=imx-sc-firmware-1.11.0.tar.bz2 bs=42757 skip=1
+     $ tar -xf imx-sc-firmware-1.11.0.tar.bz2
+     $ cp imx-sc-firmware-1.11.0/mx8qm-val-scfw-tcm.bin $(builddir)
+     $ dd if=imx-seco-3.8.5.bin of=imx-seco-3.8.5.tar.bz2 bs=43978 skip=1
+     $ tar -xf imx-seco-3.8.5.tar.bz2
+     $ cp imx-seco-3.8.5/firmware/seco/mx8qmb0-ahab-container.img $(builddir)
+
+Build U-Boot
+------------
+.. code-block:: bash
+
+     $ export ATF_LOAD_ADDR=0x80000000
+     $ export BL33_LOAD_ADDR=0x80020000
+     $ make imx8qm_dmsse20a1_defconfig
+     $ make
diff --git a/doc/board/advantech/imx8qm-rom7720-a1.rst b/doc/board/advantech/imx8qm-rom7720-a1.rst
new file mode 100644
index 00000000000..13ea2eb19e4
--- /dev/null
+++ b/doc/board/advantech/imx8qm-rom7720-a1.rst
@@ -0,0 +1,74 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the NXP i.MX8QM ROM 7720a1 board
+===========================================
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Get imx-mkimage
+- Build U-Boot
+- Build imx-mkimage
+- Flash the binary into the SD card
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+     $ git clone https://github.com/nxp-imx/imx-atf
+     $ cd imx-atf/
+     $ git checkout origin/imx_4.14.78_1.0.0_ga -b imx_4.14.78_1.0.0_ga
+     $ make PLAT=imx8qm bl31
+
+Get scfw_tcm.bin and ahab-container.img
+---------------------------------------
+
+.. code-block:: bash
+
+     $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-1.1.bin
+     $ chmod +x imx-sc-firmware-1.1.bin
+     $ ./imx-sc-firmware-1.1.bin
+     $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
+     $ chmod +x firmware-imx-8.0.bin
+     $ ./firmware-imx-8.0.bin
+
+Or use this to avoid running random scripts from the internet,
+but note that you must agree to the license the script displays:
+
+.. code-block:: bash
+
+     $ dd if=imx-sc-firmware-1.1.bin of=imx-sc-firmware-1.1.tar.bz2 bs=37185 skip=1
+     $ tar -xf imx-sc-firmware-1.1.tar.bz2
+     $ cp imx-sc-firmware-1.1/mx8qm-val-scfw-tcm.bin $(builddir)
+
+     $ dd if=firmware-imx-8.0.bin of=firmware-imx-8.0.tar.bz2 bs=37180 skip=1
+     $ tar -xf firmware-imx-8.0.tar.bz2
+     $ cp firmware-imx-8.0/firmware/seco/mx8qm-ahab-container.img $(builddir)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+     $ export ATF_LOAD_ADDR=0x80000000
+     $ export BL33_LOAD_ADDR=0x80020000
+     $ make imx8qm_rom7720_a1_4G_defconfig
+     $ make
+
+Flash the binary into the SD card
+---------------------------------
+
+Burn the flash.bin binary to SD card offset 32KB:
+
+.. code-block:: bash
+
+    $ sudo dd if=flash.bin of=/dev/sd[x] bs=1k seek=32 conv=fsync
+
+Boot
+----
+
+Set Boot switch SW2: 1100.
diff --git a/doc/board/advantech/index.rst b/doc/board/advantech/index.rst
new file mode 100644
index 00000000000..125b98c1f76
--- /dev/null
+++ b/doc/board/advantech/index.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Advantech
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   imx8qm-rom7720-a1.rst
+   imx8qm-dmsse20-a1.rst
diff --git a/doc/board/allwinner/index.rst b/doc/board/allwinner/index.rst
new file mode 100644
index 00000000000..7352ccd5c0a
--- /dev/null
+++ b/doc/board/allwinner/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Allwinner (sunxi) boards
+========================
+
+.. toctree::
+   :maxdepth: 2
+
+   sunxi
diff --git a/doc/board/allwinner/sunxi.rst b/doc/board/allwinner/sunxi.rst
new file mode 100644
index 00000000000..d0c89b956b1
--- /dev/null
+++ b/doc/board/allwinner/sunxi.rst
@@ -0,0 +1,318 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2021 Arm Ltd.
+
+Allwinner SoC based boards
+==========================
+For boards using an Allwinner ARM based SoC ("sunxi"), the U-Boot build
+system generates a single integrated image file: ``u-boot-sunxi-with-spl.bin.``
+This file can be used on SD cards, eMMC devices, SPI flash and for the
+USB-OTG based boot method (FEL). To build this file:
+
+* For 64-bit SoCs, build Trusted Firmware (TF-A, formerly known as ATF) first,
+  you will need its ``bl31.bin``. See below for more details.
+* Optionally on 64-bit SoCs, build the `crust`_ management processor firmware,
+  you will need its ``scp.bin``. See below for more details.
+* Build U-Boot::
+
+  $ export BL31=/path/to/bl31.bin		# required for 64-bit SoCs
+  $ export SCP=/path/to/scp.bin			# optional for some 64-bit SoCs
+  $ make <yourboardname>_defconfig
+  $ make
+* Transfer to an (micro)SD card (see below for more details)::
+
+  $ sudo dd if=u-boot-sunxi-with-spl.bin of=/dev/sdX bs=8k seek=1
+* Boot and enjoy!
+
+.. note::
+  The traditional SD card location the Allwinner BootROM loads from is 8KB
+  (sector 16). This works fine with the old MBR partitioning scheme, which most
+  SD cards come formatted with. However this is in the middle of a potential
+  GPT partition table, which will become invalid in this step. Newer SoCs
+  (starting with the H3 from late 2014) also support booting from 128KB, which
+  is beyond even a GPT and thus a safer location.
+
+For more details, and alternative boot locations or installations, see below.
+
+Building Arm Trusted Firmware (TF-A)
+------------------------------------
+Boards using a 64-bit Soc (A64, H5, H6, H616, R329) require the BL31 stage of
+the `Arm Trusted Firmware-A`_ firmware. This provides the reference
+implementation of secure software for Armv8-A, offering PSCI and SMCCC
+services. Allwinner support is fully mainlined. To build bl31.bin::
+
+  $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+  $ cd trusted-firmware-a
+  $ make CROSS_COMPILE=aarch64-linux-gnu- PLAT=sun50i_a64 DEBUG=1
+  $ export BL31=$(pwd)/build/sun50i_a64/debug/bl31.bin
+
+The target platform (``PLAT=``) for A64 and H5 SoCs is sun50i_a64, for the H6
+sun50i_h6, for the H616 sun50i_h616, and for the R329 sun50i_r329. Use::
+
+  $ find plat/allwinner -name platform.mk
+
+to find all supported platforms. TF-A's `docs/plat/allwinner.rst`_ contains
+more information and lists some build options.
+
+Building the Crust management processor firmware
+------------------------------------------------
+For some SoCs and boards, the integrated OpenRISC management controller can
+be used to provide power management services, foremost suspend to RAM.
+There is a community supported Open Source implementation called `crust`_,
+which runs on most SoCs featuring a management controller.
+
+This firmware part is optional, setting the SCP environment variable to
+/dev/null avoids the warning message when building without one.
+
+To build crust's scp.bin, you need an OpenRISC (or1k) cross compiler, then::
+
+  $ git clone https://github.com/crust-firmware/crust.git
+  $ cd crust
+  $ make <yourboard>_defconfig
+  $ make CROSS_COMPILE=or1k-none-elf- scp
+  $ export SCP=$(pwd)/build/scp/scp.bin
+
+Find a list of supported board configurations in the `configs/`_ directory.
+The `crust README`_ has more information about the building process, including
+information about where to get OpenRISC cross compilers.
+
+Building the U-Boot image
+-------------------------
+Find the U-Boot defconfig file for your board first. Those files live in
+the ``configs/`` directory; you can grep for the stub name of the devicetree
+file, if you know that, or for the SoC name to find the right version::
+
+    $ git grep -l MACH_SUN8I_H3 configs
+    $ git grep -l sun50i-h6-orangepi-3 configs
+
+The `linux-sunxi`_ wiki also lists the name of the defconfig file in the
+respective board page. Then use this defconfig file to create the .config
+file, and build the image::
+
+    $ make <yourboard>_defconfig
+    $ make
+
+For 64-bit boards, this requires either the BL31 environment variable to be
+set (as shown above in the TF-A build example), or it to be supplied on the
+build command line::
+
+    $ make BL31=/src/tf-a.git/build/sun50i_h616/debug/bl31.bin
+
+The same applies to the (optional) SCP firmware.
+
+The file containing everything you need is called ``u-boot-sunxi-with-spl.bin``,
+you will find it in the root folder of your U-Boot (build) tree. Except for
+raw NAND flash devices this very same file can be used for any boot source.
+It will contain the SPL image, fitted with the proper signature recognised by
+the BROM, and the required checksum. Also it will contain at least U-Boot
+proper, either wrapped in the legacy U-Boot image format, or in a FIT image.
+The board's devicetree is also included, either appended to the U-Boot proper
+image, or contained in the FIT image. If required by the SoC, this FIT file will
+also include the other firmware images.
+
+Installing U-Boot
+-----------------
+
+Installing on a (micro-) SD card
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+All Allwinner SoCs will try to find a boot image at sector 16 (8KB) of
+an SD card, connected to the first MMC controller. To transfer the generated
+image to an SD card, from any Linux device (including the board itself) with
+an (micro-)SD card reader, type::
+
+    $ sudo dd if=u-boot-sunxi-with-spl.bin of=/dev/sdX bs=1k seek=8
+
+``/dev/sdx`` needs to be replaced with the block device name of the SD card
+reader. On some machines this could be ``/dev/mmcblkX``.
+Newer SoCs (starting from the H3 from 2014, and including all ARM64 SoCs),
+also look at sector 256 (128KB) for the signature (after having checked the
+8KB location). Installing the firmware there has the advantage of not
+overlapping with a GPT partition table. Simply replace the "``seek=8``" above
+with "``seek=128``".
+
+You can also use an existing (mainline) U-Boot to write to the SD card. Load
+the generated U-Boot image somewhere into DRAM (via ``ext4load``, ``fatload``,
+or ``tftpboot``), then write to MMC device 0::
+
+    => fatload mmc 0:1 $kernel_addr_r u-boot-sunxi-with-spl.bin
+    => mmc dev 0
+    => mmc write $kernel_addr_r 0x10 0x7f0
+
+To use the alternative boot location on newer SoCs::
+
+    => mmc write $kernel_addr_r 0x100 0x700
+
+Installing on eMMC (on-board flash memory)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+Some boards have a soldered eMMC chip, some other boards have an eMMC socket
+to receive an optional eMMC module. U-Boot can be installed to those chips,
+to boot without an SD card inserted. The Boot-ROM can boot either from the
+regular user data partition, or from one of the separate eMMC boot partitions.
+U-Boot can be installed either from a running Linux instance on the device,
+from a running (mainline) U-Boot, or via an adapter for the (removable)
+eMMC module.
+
+Installing on an eMMC user data partition from Linux
+````````````````````````````````````````````````````
+If you have a running Linux instance on the device, and have somehow copied
+over the image file to that device, you can write the image directly into the
+eMMC device from there.
+Find the name of the block device file first, it is one of the
+``/dev/mmcblk<X>`` devices. eMMC devices typically also list a
+``/dev/mmcblk<X>boot0`` partition (see below), this helps you to tell it apart
+from the SD card device.
+To install onto the user data partition::
+
+    $ sudo dd if=u-boot-sunxi-with-spl.bin of=/dev/dev/mmcblkX bs=1k seek=8
+
+Similar to SD cards, the BROM in newer SoCs (H3 and above) also checks
+sector 256 of an eMMC, so you can use "``seek=128``" as well. Having a GPT
+on an eMMC device is much more likely than on an SD card, so you should
+probably stick to the alternative location, or use one of the boot partitions.
+
+Installing on an eMMC boot partition from Linux
+```````````````````````````````````````````````
+In the following examples, ``/dev/mmcblkX`` needs to be replaced with the block
+device name of the eMMC device. The eMMC device can be recognised by also
+listing the boot partitions (``/dev/mmcblkXboot0``) in ``/proc/partitions``.
+
+To allow booting from one of the eMMC boot partitions, this one needs to be
+enabled first. This only needs to be done once, as this setting is
+persistent, even though the boot partition can be disabled or changed again
+any time later::
+
+    # apt-get install mmc-utils
+    # mmc bootbus set single_hs x1 x4 /dev/mmcblkX
+    # mmc bootpart enable 1 1 /dev/mmcblkX
+
+The first "1" in the last command points to the boot partition number to be
+used, typically devices offer two boot partitions.
+
+By default Linux disables write access to the boot partitions, to prevent
+accidental overwrites. You need to disable the write protection (until the
+next reboot), then can write the U-Boot image to the *first* sector of the
+selected boot partition::
+
+    # echo 0 > /sys/block/mmcblkXboot0/force_ro
+    # dd if=u-boot-sunxi-with-spl.bin of=/dev/mmcblkXboot0 bs=1k
+
+Installing on an eMMC user data partition from U-Boot
+`````````````````````````````````````````````````````
+You can also write the generated image file to an SD card, boot the device
+from there, and burn the very same image to the eMMC device from U-Boot.
+The following commands copy the image from the SD card to the eMMC device::
+
+    => mmc dev 0
+    => mmc read $kernel_addr_r 0x10 0x7f0
+    => mmc dev 1
+    => mmc write $kernel_addr_r 0x10 0x7f0
+
+You can also copy an image from the 8K offset of an SD card to the 128K
+offset of the eMMC (or any combination), just change the "``0x10 0x7f0``" above
+to "``0x100 0x700``", respectively. Of course the image file can be loaded via
+any other loading method, including ``fatload``, ``ext4load``, ``tftpboot``.
+
+Installing on an eMMC boot partition from U-Boot
+````````````````````````````````````````````````
+The selected eMMC boot partition needs to be initially enabled first (same
+as in Linux above), you can do this from U-Boot with::
+
+    => mmc dev 1
+    => mmc bootbus 1 1 0 0
+    => mmc partconf 1 1 1 1
+
+The first "1" in both commands denotes the MMC device number. The second "1"
+in the partconf command sets the required ``BOOT_ACK`` option, the last two "1"s
+selects the active boot partition and the target for the next data access,
+respectively. So for the next "``mmc write``" command to address one of the boot
+partitions, the last number must either be "1" or "2", "0" would switch (back)
+to the normal user data partition.
+
+Then load the ``u-boot-sunxi-with-spl.bin`` image file into DRAM, either by
+reading directly from an SD card or eMMC user data partition, or from a
+file system or TFTP (see above), and transfer it to the boot partition::
+
+    => tftpboot $kernel_addr_r u-boot-sunxi-with-spl.bin
+    => mmc write $kernel_addr_r 0 0x7f0
+
+After that the device should boot from the selected boot partition, which takes
+precedence over booting from the user data partition.
+
+Installing on SPI flash
+^^^^^^^^^^^^^^^^^^^^^^^
+Some devices have a SPI NOR flash chip soldered on the board. If it is
+connected to the SPI0 pins on PortC, the BROM can also boot from there.
+Typically the SPI flash has the lowest boot priority, so SD card and eMMC
+devices will be considered first.
+
+Installing on SPI flash from Linux
+``````````````````````````````````
+If the devicetree enables and describes the SPI flash device, you can access
+the SPI flash content from Linux, using the `MTD utils`_::
+
+    # apt-get install mtd-utils
+    # mtdinfo
+    # flashcp -v u-boot-sunxi-with-spl.bin /dev/mtdX
+
+``/dev/mtdX`` needs to be replaced with the respective device name, as listed
+in the output of ``mtdinfo``.
+
+Installing on SPI flash from U-Boot
+```````````````````````````````````
+If SPI flash driver and command support (``CONFIG_CMD_SF``) is enabled in the
+U-Boot configuration, the image file can be installed via U-Boot as well::
+
+    => tftpboot $kernel_addr_r u-boot-sunxi-with-spl.bin
+    => sf probe
+    => sf erase 0 +0xf0000
+    => sf write $kernel_addr_r 0 $filesize
+
+Installing on SPI flash via USB in FEL mode
+```````````````````````````````````````````
+If the device is in FEL mode (see below), the SPI flash can also be written to
+with the sunxi-fel utility, via an USB(-OTG) cable from any USB host machine::
+
+    $ sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin
+
+Booting via the USB(-OTG) FEL mode
+----------------------------------
+If none of the boot locations checked by the BROM contains a medium or valid
+signature, the BROM will enter the so-called FEL mode, in which it will
+listen to commands from a host on the SoC's USB-OTG interface. Those commands
+allow to read from and write to arbitrary memory locations, also to start
+execution at any address, which allows to bootstrap a board solely via an
+USB cable. Some boards feature a "FEL" or "U-Boot" button, which forces
+FEL mode despite a valid boot location being present. The same can be achieved
+via a `magic binary`_ on an SD card, which allows to enter FEL mode on any
+board.
+
+To use FEL booting, let the board enter FEL mode, via any of the mentioned
+methods (no boot media, FEL button, SD card with FEL binary), then connect
+a USB cable to the board's USB OTG port. Some boards (Pine64, TV boxes) don't
+have a separate OTG port. In this case mostly one of the USB-A ports is
+connected to USB0, and can be used via a non-standard USB-A to USB-A cable.
+
+Typically there is no on-board indication of FEL mode, other than a new USB
+device appearing on the connected host computer. The USB vendor/device ID
+is 1f3a:efe8. Mostly this will identify as "sunxi SoC OTG connector in
+FEL/flashing mode", but older distributions might still report "Onda
+(unverified) V972 tablet in flashing mode".
+
+The `sunxi_fel`_ tool implements the proprietary BROM protocol, and allows to
+bootstrap U-Boot by just providing our venerable u-boot-sunxi-with-spl.bin::
+
+    $ sudo apt-get install sunxi-tools
+    $ sunxi-fel uboot u-boot-sunxi-with-spl.bin
+
+Additional binaries like a kernel, an initial ramdisk or a boot script, can
+also be uploaded via FEL, check the Wiki's `FEL page`_ for more details.
+
+.. _`Arm Trusted Firmware-A`:  https://www.trustedfirmware.org/projects/tf-a/
+.. _`docs/plat/allwinner.rst`: https://trustedfirmware-a.readthedocs.io/en/latest/plat/allwinner.html
+.. _`crust`: https://github.com/crust-firmware/crust
+.. _`configs/`: https://github.com/crust-firmware/crust/tree/master/configs
+.. _`crust README`: https://github.com/crust-firmware/crust/blob/master/README.md#building-the-firmware
+.. _`linux-sunxi`: https://linux-sunxi.org
+.. _`MTD utils`: http://www.linux-mtd.infradead.org/
+.. _`magic binary`: https://github.com/linux-sunxi/sunxi-tools/raw/master/bin/fel-sdboot.sunxi
+.. _`sunxi_fel`: https://github.com/linux-sunxi/sunxi-tools
+.. _`FEL page`: https://linux-sunxi.org/FEL/USBBoot
diff --git a/doc/board/amlogic/bananapi-cm4io.rst b/doc/board/amlogic/bananapi-cm4io.rst
new file mode 100644
index 00000000000..672cbee7d8e
--- /dev/null
+++ b/doc/board/amlogic/bananapi-cm4io.rst
@@ -0,0 +1,153 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for BananaPi CM4 with CM4IO (A311D)
+==========================================
+
+BPI-CM4 is a system-on-module board manufactured by Sinovoip. It follows the Raspberry Pi
+CM4 interface specification but with a single HDMI port and a single DSI output:
+
+ - Amlogic A311D Arm Cortex-A53 dual-core + Cortex-A73 quad-core SoC 
+ - 4GB DDR4 SDRAM
+ - 16GB eMMC
+ - NPU
+ - HDMI 2.1 display
+ - Gigabit Ethernet
+ - RTL8822CS WiFi (a/b/g/n/ac) + BT 5.0
+
+BPI-CM4IO is a carrier board for the BPI-CM4 module with the following specification:
+
+ - CM4 interface
+ - HDMI interface
+ - MIPI CSI interface
+ - MIPI DSI interface
+ - Ethernet interface
+ - PCIe interface
+ - SD (micro)
+ - SIM (micro)
+ - 26-pin GPIO
+ - UART serial
+ - 1x USB-C (power)
+ - 2x USB 2.0
+
+Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-CM4
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make bananapi-cm4io_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh bananapi-cm4io /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=bananapi-cm4io
+    $ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b khadas-g12b-v2015.01-m2s $DIR
+
+    $ cd $DIR
+    $ make bananapi_cm4_defconfig
+    $ make
+    $ export UBDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBDIR/build/board/bananapi/bananpi_cm4/firmware/acs.bin fip/
+    $ cp $UBDIR/fip/g12a/bl2.bin fip/
+    $ cp $UBDIR/fip/g12a/bl30.bin fip/
+    $ cp $UBDIR/fip/g12a/bl31.img fip/
+    $ cp $UBDIR/fip/g12a/ddr3_1d.fw fip/
+    $ cp $UBDIR/fip/g12a/ddr4_1d.fw fip/
+    $ cp $UBDIR/fip/g12a/ddr4_2d.fw fip/
+    $ cp $UBDIR/fip/g12a/diag_lpddr4.fw fip/
+    $ cp $UBDIR/fip/g12a/lpddr3_1d.fw fip/
+    $ cp $UBDIR/fip/g12a/lpddr4_1d.fw fip/
+    $ cp $UBDIR/fip/g12a/lpddr4_2d.fw fip/
+    $ cp $UBDIR/fip/g12a/piei.fw fip/
+    $ cp $UBDIR/fip/g12a/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
+                                       --output fip/bl30_new.bin.g12a.enc \
+                                       --level v3
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                       --output fip/bl30_new.bin.enc \
+                                       --level v3 --type bl30
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
+                                       --output fip/bl31.img.enc \
+                                       --level v3 --type bl31
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
+                                       --output fip/bl33.bin.enc \
+                                       --level v3 --type bl33 --compress lz4
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
+                                       --output fip/bl2.n.bin.sig
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bootmk \
+                                       --output fip/u-boot.bin \
+                                       --bl2 fip/bl2.n.bin.sig \
+                                       --bl30 fip/bl30_new.bin.enc \
+                                       --bl31 fip/bl31.img.enc \
+                                       --bl33 fip/bl33.bin.enc \
+                                       --ddrfw1 fip/ddr4_1d.fw \
+                                       --ddrfw2 fip/ddr4_2d.fw \
+                                       --ddrfw3 fip/ddr3_1d.fw \
+                                       --ddrfw4 fip/piei.fw \
+                                       --ddrfw5 fip/lpddr4_1d.fw \
+                                       --ddrfw6 fip/lpddr4_2d.fw \
+                                       --ddrfw7 fip/diag_lpddr4.fw \
+                                       --ddrfw8 fip/aml_ddr.fw \
+                                       --ddrfw9 fip/lpddr3_1d.fw \
+                                       --level v3
+
+Then write the image to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/bananapi-m2pro.rst b/doc/board/amlogic/bananapi-m2pro.rst
new file mode 100644
index 00000000000..6c35943bac8
--- /dev/null
+++ b/doc/board/amlogic/bananapi-m2pro.rst
@@ -0,0 +1,143 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for BananaPi BPI-M2-PRO (S905X3)
+=======================================
+
+BananaPi BPI-M2-PRO is a Single Board Computer manufactured by Sinovoip with the
+following specification:
+
+ - Amlogic S905X3 Arm Cortex-A55 quad-core SoC
+ - 2GB DDR4 SDRAM
+ - 16GB eMMC
+ - Gigabit Ethernet
+ - RTL8821CU USB WiFi (a/b/g/n/ac) + BT 5.0
+ - HDMI 2.1 display
+ - 40-pin GPIO header
+ - 2x USB 3.0 Host
+ - 1x DC Jack (power)
+ - microSD
+ - UART serial
+ - Infrared receiver
+
+Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M2_Pro
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make bananapi-m2pro_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh bananapi-m2pro /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=bananapi-m2pro
+    $ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b odroidg12-v2015.01-c4-m5 $DIR
+
+    $ cd $DIR
+    $ make bananapi_m2pro_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/bananapi/bananpi_m5/firmware/acs.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl2.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl30.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl31.img fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/piei.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
+                                          --output fip/bl30_new.bin.g12a.enc \
+                                          --level v3
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                          --output fip/bl30_new.bin.enc \
+                                          --level v3 --type bl30
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
+                                          --output fip/bl31.img.enc \
+                                          --level v3 --type bl31
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
+                                          --output fip/bl33.bin.enc \
+                                          --level v3 --type bl33 --compress lz4
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
+                                          --output fip/bl2.n.bin.sig
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
+                                          --output fip/u-boot.bin \
+                                          --bl2 fip/bl2.n.bin.sig \
+                                          --bl30 fip/bl30_new.bin.enc \
+                                          --bl31 fip/bl31.img.enc \
+                                          --bl33 fip/bl33.bin.enc \
+                                          --ddrfw1 fip/ddr4_1d.fw \
+                                          --ddrfw2 fip/ddr4_2d.fw \
+                                          --ddrfw3 fip/ddr3_1d.fw \
+                                          --ddrfw4 fip/piei.fw \
+                                          --ddrfw5 fip/lpddr4_1d.fw \
+                                          --ddrfw6 fip/lpddr4_2d.fw \
+                                          --ddrfw7 fip/diag_lpddr4.fw \
+                                          --ddrfw8 fip/aml_ddr.fw \
+                                          --ddrfw9 fip/lpddr3_1d.fw \
+                                          --level v3
+
+Then write the image to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/bananapi-m2s.rst b/doc/board/amlogic/bananapi-m2s.rst
new file mode 100644
index 00000000000..4a1be47b350
--- /dev/null
+++ b/doc/board/amlogic/bananapi-m2s.rst
@@ -0,0 +1,153 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for BananaPi M2S (A311D & S922X)
+=======================================
+
+BananaPi BPI-M2S ships is a Single Board Computer manufactured by Sinovoip that ships in
+two variants with Amlogic S922X or A311D SoC and the following common specification:
+
+- 16GB eMMC
+- HDMI 2.1a video
+- 2x 10/100/1000 Base-T Ethernet (1x RTL8211F, 1x RTL811H)
+- 2x USB 2.0 ports
+- 2x Status LED's (green/blue)
+- 1x Power/Reset button
+- 1x micro SD card slot
+- 40-pin GPIO header
+- PWM fan header
+- UART header
+
+The S992X variant has:
+- 2GB LPDDR4 RAM
+
+The A311D variant has:
+
+- 4GB LPDDR4 RAM
+- NPU (5.0 TOPS)
+- MIPI DSI header
+- MIPI CSI header
+
+An optional RTL8822CS SDIO WiFi/BT mezzanine is available for both board variants.
+
+Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M2S
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make bananapi-m2s_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh bananapi-m2s /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=bananapi-m2s
+    $ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b khadas-g12b-v2015.01-m2s $DIR
+
+    $ cd $DIR
+    $ make bananapi_m2s_defconfig
+    $ make
+    $ export UBDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBDIR/build/board/bananapi/bananpi_m2s/firmware/acs.bin fip/
+    $ cp $UBDIR/fip/g12a/bl2.bin fip/
+    $ cp $UBDIR/fip/g12a/bl30.bin fip/
+    $ cp $UBDIR/fip/g12a/bl31.img fip/
+    $ cp $UBDIR/fip/g12a/ddr3_1d.fw fip/
+    $ cp $UBDIR/fip/g12a/ddr4_1d.fw fip/
+    $ cp $UBDIR/fip/g12a/ddr4_2d.fw fip/
+    $ cp $UBDIR/fip/g12a/diag_lpddr4.fw fip/
+    $ cp $UBDIR/fip/g12a/lpddr3_1d.fw fip/
+    $ cp $UBDIR/fip/g12a/lpddr4_1d.fw fip/
+    $ cp $UBDIR/fip/g12a/lpddr4_2d.fw fip/
+    $ cp $UBDIR/fip/g12a/piei.fw fip/
+    $ cp $UBDIR/fip/g12a/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
+                                       --output fip/bl30_new.bin.g12a.enc \
+                                       --level v3
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                       --output fip/bl30_new.bin.enc \
+                                       --level v3 --type bl30
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
+                                       --output fip/bl31.img.enc \
+                                       --level v3 --type bl31
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
+                                       --output fip/bl33.bin.enc \
+                                       --level v3 --type bl33 --compress lz4
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
+                                       --output fip/bl2.n.bin.sig
+    $ $UBDIR/fip/g12b/aml_encrypt_g12b --bootmk \
+                                       --output fip/u-boot.bin \
+                                       --bl2 fip/bl2.n.bin.sig \
+                                       --bl30 fip/bl30_new.bin.enc \
+                                       --bl31 fip/bl31.img.enc \
+                                       --bl33 fip/bl33.bin.enc \
+                                       --ddrfw1 fip/ddr4_1d.fw \
+                                       --ddrfw2 fip/ddr4_2d.fw \
+                                       --ddrfw3 fip/ddr3_1d.fw \
+                                       --ddrfw4 fip/piei.fw \
+                                       --ddrfw5 fip/lpddr4_1d.fw \
+                                       --ddrfw6 fip/lpddr4_2d.fw \
+                                       --ddrfw7 fip/diag_lpddr4.fw \
+                                       --ddrfw8 fip/aml_ddr.fw \
+                                       --ddrfw9 fip/lpddr3_1d.fw \
+                                       --level v3
+
+Then write the image to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/bananapi-m5.rst b/doc/board/amlogic/bananapi-m5.rst
new file mode 100644
index 00000000000..009ea0ba947
--- /dev/null
+++ b/doc/board/amlogic/bananapi-m5.rst
@@ -0,0 +1,142 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for BananaPi BPI-M5 (S905X3)
+===================================
+
+BananaPi BPI-M5 is a Single Board Computer manufactured by Sinovoip with the following
+specification:
+
+ - Amlogic S905X3 Arm Cortex-A55 quad-core SoC
+ - 4GB DDR4 SDRAM
+ - 16GB eMMC
+ - Gigabit Ethernet
+ - HDMI 2.1 display
+ - 40-pin GPIO header
+ - 4x USB 3.0 Host
+ - 1x USB-C (power)
+ - microSD
+ - UART serial
+ - Infrared receiver
+
+Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M5
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make bananapi-m5_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh bananapi-m5 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=bananapi-m5
+    $ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b odroidg12-v2015.01-c4-m5 $DIR
+
+    $ cd $DIR
+    $ make bananapi_m5_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/bananapi/bananpi_m5/firmware/acs.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl2.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl30.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl31.img fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/piei.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
+                                          --output fip/bl30_new.bin.g12a.enc \
+                                          --level v3
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                          --output fip/bl30_new.bin.enc \
+                                          --level v3 --type bl30
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
+                                          --output fip/bl31.img.enc \
+                                          --level v3 --type bl31
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
+                                          --output fip/bl33.bin.enc \
+                                          --level v3 --type bl33 --compress lz4
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
+                                          --output fip/bl2.n.bin.sig
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
+                                          --output fip/u-boot.bin \
+                                          --bl2 fip/bl2.n.bin.sig \
+                                          --bl30 fip/bl30_new.bin.enc \
+                                          --bl31 fip/bl31.img.enc \
+                                          --bl33 fip/bl33.bin.enc \
+                                          --ddrfw1 fip/ddr4_1d.fw \
+                                          --ddrfw2 fip/ddr4_2d.fw \
+                                          --ddrfw3 fip/ddr3_1d.fw \
+                                          --ddrfw4 fip/piei.fw \
+                                          --ddrfw5 fip/lpddr4_1d.fw \
+                                          --ddrfw6 fip/lpddr4_2d.fw \
+                                          --ddrfw7 fip/diag_lpddr4.fw \
+                                          --ddrfw8 fip/aml_ddr.fw \
+                                          --ddrfw9 fip/lpddr3_1d.fw \
+                                          --level v3
+
+Then write the image to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/beelink-gskingx.rst b/doc/board/amlogic/beelink-gskingx.rst
new file mode 100644
index 00000000000..8a8296e8630
--- /dev/null
+++ b/doc/board/amlogic/beelink-gskingx.rst
@@ -0,0 +1,122 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Beelink GS-King-X (S922X)
+====================================
+
+The Shenzen AZW (Beelink) GS-King-X is based on the Amlogic W400 reference board with an
+S922X-H chip and the following specifications:
+
+- 4GB LPDDR4 RAM
+- 64GB eMMC storage
+- 10/100/1000 Base-T Ethernet
+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
+- HDMI 2.1 video
+- S/PDIF optical output
+- 2x ESS9018 audio DACs
+- 4x Ricor RT6862 audio amps
+- Analogue headphone output
+- 1x USB 2.0 OTG port
+- 3x USB 3.0 ports
+- IR receiver
+- 1x micro SD card slot (internal)
+- USB SATA controller with 2x 3.5" drive bays
+- 1x Power on/off button
+
+Beelink do not provide public schematics, but have been willing to share them with known
+distro developers to assist with development.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make beelink-gsking-x_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh beelink-s922x /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Beelink released an Amlogic "SDK" dump in their forums but the U-Boot sources included
+result in 2GB RAM detected. The following FIPs were generated with newer sources and
+detect 4GB RAM: https://github.com/LibreELEC/amlogic-boot-fip/tree/master/beelink-s922x
+
+.. code-block:: bash
+
+    $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip
+    $ unzip master.zip
+    $ export FIPDIR=$PWD/amlogic-boot-fip/beelink-s922x
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+    $ cp $FIPDIR/* fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ fip/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
+                           --output fip/bl30_new.bin.g12a.enc \
+                           --level v3
+    $ fip/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                           --output fip/bl30_new.bin.enc \
+                           --level v3 --type bl30
+    $ fip/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
+                           --output fip/bl31.img.enc \
+                           --level v3 --type bl31
+    $ fip/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
+                           --output fip/bl33.bin.enc \
+                           --level v3 --type bl33
+    $ fip/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
+                           --output fip/bl2.n.bin.sig
+    $ fip/aml_encrypt_g12b --bootmk \
+                           --output fip/u-boot.bin \
+                           --bl2 fip/bl2.n.bin.sig \
+                           --bl30 fip/bl30_new.bin.enc \
+                           --bl31 fip/bl31.img.enc \
+                           --bl33 fip/bl33.bin.enc \
+                           --ddrfw1 fip/ddr4_1d.fw \
+                           --ddrfw2 fip/ddr4_2d.fw \
+                           --ddrfw3 fip/ddr3_1d.fw \
+                           --ddrfw4 fip/piei.fw \
+                           --ddrfw5 fip/lpddr4_1d.fw \
+                           --ddrfw6 fip/lpddr4_2d.fw \
+                           --ddrfw7 fip/diag_lpddr4.fw \
+                           --ddrfw8 fip/aml_ddr.fw \
+                           --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/beelink-gt1-ultimate.rst b/doc/board/amlogic/beelink-gt1-ultimate.rst
new file mode 100644
index 00000000000..a78a1a2ff25
--- /dev/null
+++ b/doc/board/amlogic/beelink-gt1-ultimate.rst
@@ -0,0 +1,110 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Beelink GT1 Ultimate (S912)
+======================================
+
+Beelink GT1 Ultimate is an Android STB manufactured by Shenzen AZW (Beelink) with the
+following specification:
+
+- 2GB or 3GB DDR3 RAM
+- 32GB eMMC
+- HDMI 2.1 video
+- S/PDIF optical output
+- 10/100/1000 Ethernet
+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.2)
+- 3x USB 2.0 ports
+- IR receiver
+- 1x micro SD card slot
+- 1x Power LED (white)
+- 1x Reset button (internal)
+
+The GT1 (non-ultimate) board has QCA9377 WiFi/BT but is otherwise identical and should
+be capable of booting images prepared for the Ultimate box (NB: there are known clones
+of both boxes which may differ in specifications).
+
+Beelink do not provide public schematics, but have been willing to share them with known
+distro developers on request.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make beelink-gt1-ultimate_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh beelink-gt1 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide firmware sources or tools needed to create the bootloader image
+and Beelink has not publicly shared the U-Boot sources needed to build the FIP binaries
+for signing. However you can download them from the amlogic-fip-repo.
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip/beelink-gt1
+    $ export FIPDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+    $ cp $FIPDIR/bl2.bin fip/
+    $ cp $FIPDIR/acs.bin fip/
+    $ cp $FIPDIR/bl21.bin fip/
+    $ cp $FIPDIR/bl30.bin fip/
+    $ cp $FIPDIR/bl301.bin fip/
+    $ cp $FIPDIR/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ $FIPDIR/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+    $ $FIPDIR/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+    $ $FIPDIR/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+    $ $FIPDIR/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+    $ $FIPDIR/aml_encrypt_gxl --bootmk \
+                              --output fip/u-boot.bin \
+                              --bl2 fip/bl2.n.bin.sig \
+                              --bl30 fip/bl30_new.bin.enc \
+                              --bl31 fip/bl31.img.enc \
+                              --bl33 fip/bl33.bin.enc
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/beelink-gtking.rst b/doc/board/amlogic/beelink-gtking.rst
new file mode 100644
index 00000000000..8171b698c76
--- /dev/null
+++ b/doc/board/amlogic/beelink-gtking.rst
@@ -0,0 +1,118 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Beelink GT-King (S922X)
+==================================
+
+The Shenzen AZW (Beelink) GT-King is based on the Amlogic W400 reference board with an
+S922X-H chip and the following specifications:
+
+- 4GB LPDDR4 RAM
+- 64GB eMMC storage
+- 10/100/1000 Base-T Ethernet
+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
+- HDMI 2.1 video
+- S/PDIF optical output
+- Analogue audio output
+- 1x USB 2.0 port
+- 2x USB 3.0 ports
+- IR receiver
+- 1x micro SD card slot
+
+Beelink do not provide public schematics, but have been willing to share them with known
+distro developers to assist with development.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make beelink-gtking_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh beelink-s922x /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Beelink released an Amlogic "SDK" dump in their forums, but the U-Boot sources included
+result in 2GB RAM detected. The following FIPs were generated with newer sources and
+detect 4GB RAM: https://github.com/LibreELEC/amlogic-boot-fip/tree/master/beelink-s922x
+
+.. code-block:: bash
+
+    $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip
+    $ unzip master.zip
+    $ export FIPDIR=$PWD/amlogic-boot-fip/beelink-s922x
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+    $ cp $FIPDIR/* fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ fip/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
+                           --output fip/bl30_new.bin.g12a.enc \
+                           --level v3
+    $ fip/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                           --output fip/bl30_new.bin.enc \
+                           --level v3 --type bl30
+    $ fip/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
+                           --output fip/bl31.img.enc \
+                           --level v3 --type bl31
+    $ fip/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
+                           --output fip/bl33.bin.enc \
+                           --level v3 --type bl33
+    $ fip/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
+                           --output fip/bl2.n.bin.sig
+    $ fip/aml_encrypt_g12b --bootmk \
+                           --output fip/u-boot.bin \
+                           --bl2 fip/bl2.n.bin.sig \
+                           --bl30 fip/bl30_new.bin.enc \
+                           --bl31 fip/bl31.img.enc \
+                           --bl33 fip/bl33.bin.enc \
+                           --ddrfw1 fip/ddr4_1d.fw \
+                           --ddrfw2 fip/ddr4_2d.fw \
+                           --ddrfw3 fip/ddr3_1d.fw \
+                           --ddrfw4 fip/piei.fw \
+                           --ddrfw5 fip/lpddr4_1d.fw \
+                           --ddrfw6 fip/lpddr4_2d.fw \
+                           --ddrfw7 fip/diag_lpddr4.fw \
+                           --ddrfw8 fip/aml_ddr.fw \
+                           --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/beelink-gtkingpro.rst b/doc/board/amlogic/beelink-gtkingpro.rst
new file mode 100644
index 00000000000..eb0b7d4fd1f
--- /dev/null
+++ b/doc/board/amlogic/beelink-gtkingpro.rst
@@ -0,0 +1,119 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Beelink GT-King Pro (S922X)
+======================================
+
+The Shenzen AZW (Beelink) GT-King Pro is based on the Amlogic W400 reference board with
+an S922X-H chip and the following specifications:
+
+- 4GB LPDDR4 RAM
+- 64GB eMMC storage
+- 10/100/1000 Base-T Ethernet
+- AP6356S Wireless (802.11 a/b/g/n/ac, BT 4.1)
+- HDMI 2.1 video
+- Analogue audio output
+- 1x RS232 port
+- 2x USB 2.0 port
+- 2x USB 3.0 ports
+- IR receiver
+- 1x SD card slot
+- 1x Power on/off button
+
+Beelink do not provide public schematics, but have been willing to share them with known  
+distro developers to assist with development.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make beelink-gtkingpro_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh beelink-s922x /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Beelink released an Amlogic "SDK" dump in their forums, but the U-Boot sources included
+result in 2GB RAM detected. The following FIPs were generated with newer sources and
+detect 4GB RAM: https://github.com/LibreELEC/amlogic-boot-fip/tree/master/beelink-s922x
+
+.. code-block:: bash
+
+    $ wget https://github.com/LibreELEC/amlogic-boot-fip/archive/master.zip
+    $ unzip master.zip
+    $ export FIPDIR=$PWD/amlogic-boot-fip/beelink-s922x
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+    $ cp $FIPDIR/* fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ fip/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
+                           --output fip/bl30_new.bin.g12a.enc \
+                           --level v3
+    $ fip/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                           --output fip/bl30_new.bin.enc \
+                           --level v3 --type bl30
+    $ fip/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
+                           --output fip/bl31.img.enc \
+                           --level v3 --type bl31
+    $ fip/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
+                           --output fip/bl33.bin.enc \
+                           --level v3 --type bl33
+    $ fip/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
+                           --output fip/bl2.n.bin.sig
+    $ fip/aml_encrypt_g12b --bootmk \
+                           --output fip/u-boot.bin \
+                           --bl2 fip/bl2.n.bin.sig \
+                           --bl30 fip/bl30_new.bin.enc \
+                           --bl31 fip/bl31.img.enc \
+                           --bl33 fip/bl33.bin.enc \
+                           --ddrfw1 fip/ddr4_1d.fw \
+                           --ddrfw2 fip/ddr4_2d.fw \
+                           --ddrfw3 fip/ddr3_1d.fw \
+                           --ddrfw4 fip/piei.fw \
+                           --ddrfw5 fip/lpddr4_1d.fw \
+                           --ddrfw6 fip/lpddr4_2d.fw \
+                           --ddrfw7 fip/diag_lpddr4.fw \
+                           --ddrfw8 fip/aml_ddr.fw \
+                           --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/boot-flow.rst b/doc/board/amlogic/boot-flow.rst
new file mode 100644
index 00000000000..041297c512c
--- /dev/null
+++ b/doc/board/amlogic/boot-flow.rst
@@ -0,0 +1,136 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Amlogic SoC Boot Flow
+=====================
+
+Amlogic SoCs follow a pre-defined boot sequence stored in SoC ROM code. The possible boot
+sequences of the different SoC families are:
+
+GX* & AXG Family
+----------------
+
++----------+-------------------+---------+---------+---------+---------+
+|          |   1               | 2       | 3       | 4       | 5       |
++==========+===================+=========+=========+=========+=========+
+| S905     | POC=0: SPI NOR    | eMMC    | NAND    | SD      | USB     |
+| S905D    |                   |         |         |         |         |
+| S905L    |                   |         |         |         |         |
+| S905W    |                   |         |         |         |         |
+| S905X    |                   |         |         |         |         |
+| S905Y    |                   |         |         |         |         |
+| S912     |                   |         |         |         |         |
++----------+-------------------+---------+---------+---------+---------+
+| S805X    | POC=0: SPI NOR    | eMMC    | NAND    | USB     | -       |
+| A113D    |                   |         |         |         |         |
+| A113X    |                   |         |         |         |         |
++----------+-------------------+---------+---------+---------+---------+
+
+POC pin: `NAND_CLE`
+
+Some boards provide a button to force USB boot by disabling the eMMC clock signal and
+allowing the eMMC step to be bypassed. Others have removable eMMC modules; removing an
+eMMC module and SD card will allow boot from USB.
+
+An exception is the Libre Computer AML-S805X-XX (LaFrite) board which has no SD card
+slot and boots from SPI. Booting a LaFrite board from USB requires either:
+
+ - Erasing the first sectors of SPI NOR flash
+ - Inserting an HDMI boot plug forcing boot over USB
+
+The VIM1 and initial VIM2 boards provide a test point on the eMMC signals to block the
+storage from answering, allowing boot to continue with the next boot step.
+
+USB boot uses the first USB interface. On some boards this port is only available on a
+USB-A type connector and requires a special Type-A to Type-A cable to communicate with
+the BootROM.
+
+G12* & SM1 Family
+-----------------
+
++-------+-------+-------+------------+------------+------------+-----------+
+| POC0  | POC1  | POC2  | 1          | 2          | 3          | 4         |
++=======+=======+=======+============+============+============+===========+
+| 0     | 0     | 0     | USB        | SPI-NOR    | NAND/eMMC  | SD        |
++-------+-------+-------+------------+------------+-------------+----------+
+| 0     | 0     | 1     | USB        | NAND/eMMC  | SD         | -         |
++-------+-------+-------+------------+------------+------------+-----------+
+| 0     | 1     | 0     | SPI-NOR    | NAND/eMMC  | SD         | USB       |
++-------+-------+-------+------------+------------+------------+-----------+
+| 0     | 1     | 1     | SPI-NAND   | NAND/eMMC  | USB        | -         |
++-------+-------+-------+------------+------------+------------+-----------+
+| 1     | 0     | 0     | USB        | SPI-NOR    | NAND/eMMC  | SD        |
++-------+-------+-------+------------+------------+------------+-----------+
+| 1     | 0     | 1     | USB        | NAND/eMMC  | SD         | -         |
++-------+-------+-------+------------+------------+------------+-----------+
+| 1     | 1     | 0     | SPI-NOR    | NAND/eMMC  | SD         | USB       |
++-------+-------+-------+------------+------------+------------+-----------+
+| 1     | 1     | 1     | NAND/eMMC  | SD         | USB        | -         |
++-------+-------+-------+------------+------------+------------+-----------+
+
+The last option (1/1/1) is the normal default seen on production devices:
+
+ * POC0 pin: `BOOT_4` (0 and all other 1 means SPI NAND boot first)
+ * POC1 pin: `BOOT_5` (0 and all other 1 means USB Device boot first
+ * POC2 pin: `BOOT_6` (0 and all other 1 means SPI NOR boot first)
+
+Most boards provide a button to force USB BOOT which lowers `BOOT_5` to 0. Some boards
+provide a test point on eMMC or SPI NOR clock signals to block storage from answering
+and allowing boot to continue from the next boot step.
+
+The Khadas VIM3/3L boards embed a microcontroller which sets POC signals according to
+its configuration or a specific key press sequence to either boot from SPI NOR or eMMC
+then SD card, or boot as a USB device.
+
+The Odroid N2/N2+ has a hardware switch to select between SPI NOR or eMMC boot. The
+Odroid HC4 has a button to disable SPI-NOR allowing boot from SD card.
+
+Boot Modes
+----------
+
+ * SD
+
+The BootROM fetches the first SD card sectors in one sequence then checks the content of
+the data. It expects to find the FIP binary in sector 1, 512 bytes offset from the start.
+
+ * eMMC
+
+The BootROM fetches the first sectors of the main partition in one sequence then checks
+the content of the data. On GXL and newer boards it expects to find the FIP binary in
+sector 1, 512 bytes offset from the start. If not found it checks the boot0 partition,
+then the boot1 partition. On GXBB it expects to find the FIP binary at an offset that
+conflicts with MBR partition tables, but this has been worked around (thus avoiding the
+need for a partition scheme that relocates the MBR). For a more detailed explanation
+please see: https://github.com/LibreELEC/amlogic-boot-fip/pull/8
+
+ * SPI-NOR
+
+The BootROM fetches the first SPI NOR sectors in one sequence then checks the content of
+the data. It expects to find the FIP binary in sector 1, 512 bytes offset from the start.
+
+ * NAND & SPI-NAND
+
+These modes are rarely used in open platforms and no details are available.
+
+ * USB
+
+The BootROM supports a custom USB protocol and sets the USB Gadget interface to use the
+USB ID 1b8e:c003. The Amlogic `update` utility uses this protocol. It is also supported
+in the Amlogic vendor U-Boot sources.
+
+The `pyamlboot` utility https://github.com/superna9999/pyamlboot is open-source and also
+implements the USB protocol. It can load U-Boot into memory to start the SoC without the
+storage being attached, or to recover the device from a failed/incorrect image flash.
+
+HDMI Recovery Dongle
+--------------------
+
+The BootROM also reads 8 bytes at address I2C 0x52 offset 0xf8 (248) on the HDMI DDC bus
+during startup. The content `boot@USB` forces USB boot. The content `boot@SDC` forces SD
+card boot. The content `boot@SPI` forces SPI-NOT boot. If an SD card or USB device does
+not enumerate the BootROM continues with the normal boot sequence.
+
+HDMI boot dongles can be created by connecting a 256bytes EEPROM set to answer on address
+0x52, with `boot@USB` or `boot@SDC` or `boot@SPI` programmed at offset 0xf8 (248).
+
+If the SoC is booted with USB Device forced at first step, it will retain the forced boot
+order on warm reboot. Only cold reboot (removing power) will reset the boot order.
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
new file mode 100644
index 00000000000..46f44bf34ec
--- /dev/null
+++ b/doc/board/amlogic/index.rst
@@ -0,0 +1,125 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Amlogic
+=======
+
+Hardware Support Matrix
+-----------------------
+
+An up-do-date matrix is also available on: http://linux-meson.com
+
+This matrix concerns the actual source code version.
+
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| SoCs              | S905      | S805X    | S912     | A113X    | S905X2   | S922X    | S905X3   |
+|                   |           | S905X    | S905D    |          | S905D2   | A311D    | S905D3   |
+|                   |           | S905W    |          |          | S905Y2   |          |          |
++===================+===========+==========+==========+==========+==========+==========+==========+
+| UART              | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| Pinctrl/GPIO      | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| Clock Control     | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| PWM               | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| Reset Control     | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| Infrared Decoder  | No        | No       | No       | No       | No       | No       | No       |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| Ethernet          | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| Multi-core        | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| Fuse access       | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| SPI (FC)          | **Yes**   | **Yes**  | **Yes**  | **Yes**  |**Yes**   | **Yes**  | No       |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| SPI (CC)          | No        | No       | No       | No       | No       | No       | No       |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| I2C               | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| USB               | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| USB OTG           | No        | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| eMMC              | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| SDCard            | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| NAND              | No        | No       | No       | No       | No       | No       | No       |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| ADC               | **Yes**   | **Yes**  | **Yes**  | **Yes**  | No       | No       | No       |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| CVBS Output       | **Yes**   | **Yes**  | **Yes**  | *N/A*    | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| HDMI Output       | **Yes**   | **Yes**  | **Yes**  | *N/A*    | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| CEC               | No        | No       | No       | *N/A*    | No       | No       | No       |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| Thermal Sensor    | No        | No       | No       | No       | No       | No       | No       |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| LCD/LVDS Output   | No        | *N/A*    | No       | No       | No       | No       | No       |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| MIPI DSI Output   | *N/A*     | *N/A*    | *N/A*    | No       | No       | No       | No       |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| SoC Rev/Info      | **Yes**   | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| PCIe (+NVMe)      | *N/A*     | *N/A*    | *N/A*    | **Yes**  | **Yes**  | **Yes**  | **Yes**  |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+| Watchdog          | *N/A*     | **Yes**  | *N/A*    | *N/A*    | *N/A*    | *N/A*    | *N/A*    |
++-------------------+-----------+----------+----------+----------+----------+----------+----------+
+
+Boot Documentation
+------------------
+
+.. toctree::
+   :maxdepth: 1
+
+   boot-flow
+   pre-generated-fip
+
+Board Documentation
+-------------------
+
+.. toctree::
+   :maxdepth: 1
+
+   bananapi-cm4io
+   bananapi-m2pro
+   bananapi-m2s
+   bananapi-m5
+   beelink-gskingx
+   beelink-gt1-ultimate
+   beelink-gtking
+   beelink-gtkingpro
+   jethub-j80
+   jethub-j100
+   khadas-vim
+   khadas-vim2
+   khadas-vim3
+   khadas-vim3l
+   libretech-ac
+   libretech-cc
+   nanopi-k2
+   odroid-c2
+   odroid-c4
+   odroid-hc4
+   odroid-n2
+   odroid-n2l
+   odroid-go-ultra
+   p200
+   p201
+   p212
+   q200
+   radxa-zero
+   radxa-zero2
+   sei510
+   sei610
+   s400
+   u200
+   videostrong-kii-pro
+   wetek-core2
+   wetek-hub
+   wetek-play2
+   w400
diff --git a/doc/board/amlogic/jethub-j100.rst b/doc/board/amlogic/jethub-j100.rst
new file mode 100644
index 00000000000..cbf1ea76107
--- /dev/null
+++ b/doc/board/amlogic/jethub-j100.rst
@@ -0,0 +1,124 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for JetHub J100/J110 (A113X)
+===================================
+
+JetHome Jethub D1/D1+ (http://jethome.ru/jethub-d1p) is a home automation controller device
+manufactured by JetHome with the following specifications:
+
+ - Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz
+ - no video out
+ - 512MB/1GB DDR3 or 2GB DDR4 SDRAM
+ - 8/16/32GB eMMC flash
+ - 1 x USB 2.0
+ - 1 x 10/100Mbps ethernet
+ - WiFi / Bluetooth one from:
+   - AMPAK AP6255 (Broadcom BCM43455) IEEE 802.11a/b/g/n/ac, Bluetooth 4.2
+   - RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0
+   - Amlogic W155S1 WiFi5 IEEE 802.11a/b/g/n/ac, Bluetooth 5.2
+ - 2 x gpio LEDS
+ - GPIO user Button
+ - DC source with a voltage of 9 to 56 V / Passive POE
+ - DIN Rail Mounting case
+
+The basic version also has:
+
+ - Zigbee module one from:
+   - TI CC2538 + CC2592 Zigbee 3.0 Wireless
+   - TI CC2652P1 Zigbee 3.0 Wireless
+   - Silicon Labs EFT32MG21 Zigbee 3.0/Thread Wireless
+ - 1 x 1-Wire
+ - 2 x RS-485
+ - 4 x dry contact digital GPIO inputs
+ - 3 x relay GPIO outputs
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make jethub_j100_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh jethub-j100 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ git clone https://github.com/jethome-ru/jethub-aml-tools jethub-u-boot
+    $ cd jethub-u-boot
+    $ export FIPDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/j100/bl2.bin fip/
+    $ cp $FIPDIR/j100/acs.bin fip/
+    $ cp $FIPDIR/j100/bl21.bin fip/
+    $ cp $FIPDIR/j100/bl30.bin fip/
+    $ cp $FIPDIR/j100/bl301.bin fip/
+    $ cp $FIPDIR/j100/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+        fip/bl30.bin \
+        fip/zero_tmp \
+        fip/bl30_zero.bin \
+        fip/bl301.bin \
+        fip/bl301_zero.bin \
+        fip/bl30_new.bin \
+        bl30
+
+    $ $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+        fip/bl2_acs.bin \
+        fip/zero_tmp \
+        fip/bl2_zero.bin \
+        fip/bl21.bin \
+        fip/bl21_zero.bin \
+        fip/bl2_new.bin \
+        bl2
+
+    $ $FIPDIR/j100/aml_encrypt_axg --bl3sig --input fip/bl30_new.bin \
+                                   --output fip/bl30_new.bin.enc \
+                                   --level v3 --type bl30
+    $ $FIPDIR/j100/aml_encrypt_axg --bl3sig --input fip/bl31.img \
+                                   --output fip/bl31.img.enc \
+                                   --level v3 --type bl31
+    $ $FIPDIR/j100/aml_encrypt_axg --bl3sig --input fip/bl33.bin --compress lz4 \
+                                   --output fip/bl33.bin.enc \
+                                   --level v3 --type bl33
+    $ $FIPDIR/j100/aml_encrypt_axg --bl2sig --input fip/bl2_new.bin \
+                                   --output fip/bl2.n.bin.sig
+    $ $FIPDIR/j100/aml_encrypt_axg --bootmk \
+                                   --output fip/u-boot.bin \
+                                   --bl2 fip/bl2.n.bin.sig \
+                                   --bl30 fip/bl30_new.bin.enc \
+                                   --bl31 fip/bl31.img.enc \
+                                   --bl33 fip/bl33.bin.enc --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/jethub-j80.rst b/doc/board/amlogic/jethub-j80.rst
new file mode 100644
index 00000000000..9195df69050
--- /dev/null
+++ b/doc/board/amlogic/jethub-j80.rst
@@ -0,0 +1,106 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for JetHub J80 (S905W)
+=============================
+
+JetHome Jethub H1 (http://jethome.ru/jethub-h1) is a home automation controller device
+manufactured by JetHome with the following specifications:
+
+ - Amlogic S905W (ARM Cortex-A53) quad-core up to 1.5GHz
+ - No video out
+ - 1GB DDR3
+ - 8/16GB eMMC flash
+ - 2 x USB 2.0
+ - 1 x 10/100Mbps ethernet
+ - SDIO WiFi / Bluetooth RTL8822CS IEEE 802.11a/b/g/n/ac, Bluetooth 5.0.
+ - TI CC2538 + CC2592 Zigbee Wireless Module with up to 20dBm output
+   power and Zigbee 3.0 support.
+ - MicroSD 2.x/3.x/4.x DS/HS cards.
+ - 1 x gpio LED
+ - ADC user Button
+ - DC source 5V microUSB
+ - Square plastic case
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make jethub_j80_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh jethub-j80 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ git clone https://github.com/jethome-ru/jethub-aml-tools jethub-u-boot
+    $ cd jethub-u-boot
+    $ export FIPDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/j80/bl2.bin fip/
+    $ cp $FIPDIR/j80/acs.bin fip/
+    $ cp $FIPDIR/j80/bl21.bin fip/
+    $ cp $FIPDIR/j80/bl30.bin fip/
+    $ cp $FIPDIR/j80/bl301.bin fip/
+    $ cp $FIPDIR/j80/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+        fip/bl30.bin \
+        fip/zero_tmp \
+        fip/bl30_zero.bin \
+        fip/bl301.bin \
+        fip/bl301_zero.bin \
+        fip/bl30_new.bin \
+        bl30
+
+    $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+        fip/bl2_acs.bin \
+        fip/zero_tmp \
+        fip/bl2_zero.bin \
+        fip/bl21.bin \
+        fip/bl21_zero.bin \
+        fip/bl2_new.bin \
+        bl2
+
+    $ $FIPDIR/j80/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+    $ $FIPDIR/j80/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+    $ $FIPDIR/j80/aml_encrypt_gxl --bl3enc --input fip/bl33.bin --compress lz4
+    $ $FIPDIR/j80/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+    $ $FIPDIR/j80/aml_encrypt_gxl --bootmk \
+                                  --output fip/u-boot.bin \
+                                  --bl2 fip/bl2.n.bin.sig \
+                                  --bl30 fip/bl30_new.bin.enc \
+                                  --bl31 fip/bl31.img.enc \
+                                  --bl33 fip/bl33.bin.enc
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/khadas-vim.rst b/doc/board/amlogic/khadas-vim.rst
new file mode 100644
index 00000000000..20370ed49a8
--- /dev/null
+++ b/doc/board/amlogic/khadas-vim.rst
@@ -0,0 +1,110 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Khadas VIM (S905X)
+=============================
+
+Khadas VIM is a Single Board Computer manufactured by Shenzhen Wesion Technology Co. Ltd
+with the following specifications:
+
+ - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - 8GB/16GB eMMC
+ - 10/100 Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
+ - microSD
+ - SDIO Wifi Module, Bluetooth
+ - Two channel IR receiver
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make khadas-vim_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh khadas-vim /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/khadas/u-boot -b Vim vim-u-boot
+    $ cd vim-u-boot
+    $ make kvim_defconfig
+    $ make CROSS_COMPILE=aarch64-none-elf-
+    $ export FIPDIR=$PWD/fip
+
+Go back to mainline U-Boot source tree then :
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/gxl/bl2.bin fip/
+    $ cp $FIPDIR/gxl/acs.bin fip/
+    $ cp $FIPDIR/gxl/bl21.bin fip/
+    $ cp $FIPDIR/gxl/bl30.bin fip/
+    $ cp $FIPDIR/gxl/bl301.bin fip/
+    $ cp $FIPDIR/gxl/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+                                  --output fip/u-boot.bin \
+                                  --bl2 fip/bl2.n.bin.sig \
+                                  --bl30 fip/bl30_new.bin.enc \
+                                  --bl31 fip/bl31.img.enc \
+                                  --bl33 fip/bl33.bin.enc
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/khadas-vim2.rst b/doc/board/amlogic/khadas-vim2.rst
new file mode 100644
index 00000000000..58f18701f7c
--- /dev/null
+++ b/doc/board/amlogic/khadas-vim2.rst
@@ -0,0 +1,111 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Khadas VIM2 (S912)
+=============================
+
+Khadas VIM2 is a Single Board Computer manufactured by Shenzhen Wesion Technology Co. Ltd
+with the following specifications:
+
+ - Amlogic S912 ARM Cortex-A53 octo-core SoC @ 1.5GHz
+ - ARM Mali T860 GPU
+ - 2GB/3GB DDR4 SDRAM
+ - 16GB/32GB/64GB eMMC
+ - 10/100/1000 Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 2 x USB 2.0 Host, 1 x USB 2.0 Type-C OTG
+ - 2MB SPI Flash
+ - microSD
+ - SDIO Wifi Module, Bluetooth
+ - Two channels IR receiver
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make khadas-vim2_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh khadas-vim2 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/khadas/u-boot -b khadas-vim-v2015.01 vim-u-boot
+    $ cd vim-u-boot
+    $ make kvim2_defconfig
+    $ make
+    $ export FIPDIR=$PWD/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/gxl/bl2.bin fip/
+    $ cp $FIPDIR/gxl/acs.bin fip/
+    $ cp $FIPDIR/gxl/bl21.bin fip/
+    $ cp $FIPDIR/gxl/bl30.bin fip/
+    $ cp $FIPDIR/gxl/bl301.bin fip/
+    $ cp $FIPDIR/gxl/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+                                  --output fip/u-boot.bin \
+                                  --bl2 fip/bl2.n.bin.sig \
+                                  --bl30 fip/bl30_new.bin.enc \
+                                  --bl31 fip/bl31.img.enc \
+                                  --bl33 fip/bl33.bin.enc
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/your_sd_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/khadas-vim3.rst b/doc/board/amlogic/khadas-vim3.rst
new file mode 100644
index 00000000000..4959590b8b3
--- /dev/null
+++ b/doc/board/amlogic/khadas-vim3.rst
@@ -0,0 +1,162 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Khadas VIM3 (A311D)
+==============================
+
+Khadas VIM3 is a Single Board Computer manufactured by Shenzhen Wesion Technology Co. Ltd
+with the following specifications:
+
+ - Amlogic A311D Arm Cortex-A53 dual-core + Cortex-A73 quad-core SoC
+ - 4GB LPDDR4 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.1 display
+ - 40-pin GPIO header
+ - 1 x USB 3.0 Host, 1 x USB 2.0 Host
+ - eMMC, microSD
+ - M.2
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+PCIe Setup
+----------
+
+The on-board MCU can mux the PCIe/USB3.0 shared differential lines using a FUSB340TMX USB
+3.1 SuperSpeed Data Switch between a USB3.0 Type-A connector and an M.2 Key M slot. The
+PHY driving these differential lines is shared between the USB3.0 controller and the PCIe
+Controller, thus only a single controller can use it.
+
+To setup for PCIe run the following commands from U-Boot then power-cycle the board:
+
+.. code-block:: none
+
+    i2c dev i2c@5000
+    i2c mw 0x18 0x33 1
+
+To revert to USB3.0 run the following commands from U-Boot then power-cycle the board:
+
+.. code-block:: none
+
+    i2c dev i2c@5000
+    i2c mw 0x18 0x33 0
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make khadas-vim3_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh khadas-vim3 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=vim3-u-boot
+    $ git clone --depth 1 https://github.com/khadas/u-boot.git -b khadas-vims-v2015.01 $DIR
+
+    $ cd vim3-u-boot
+    $ make kvim3_defconfig
+    $ make CROSS_COMPILE=aarch64-none-elf-
+    $ export UBOOTDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/khadas/kvim3/firmware/acs.bin fip/
+    $ cp $UBOOTDIR/fip/g12b/bl2.bin fip/
+    $ cp $UBOOTDIR/fip/g12b/bl30.bin fip/
+    $ cp $UBOOTDIR/fip/g12b/bl31.img fip/
+    $ cp $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/lpddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/piei.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ bash fip/blx_fix.sh \
+           fip/bl30.bin \
+           fip/zero_tmp \
+           fip/bl30_zero.bin \
+           fip/bl301.bin \
+           fip/bl301_zero.bin \
+           fip/bl30_new.bin \
+           bl30
+
+    $ bash fip/blx_fix.sh \
+           fip/bl2.bin \
+           fip/zero_tmp \
+           fip/bl2_zero.bin \
+           fip/acs.bin \
+           fip/bl21_zero.bin \
+           fip/bl2_new.bin \
+           bl2
+
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
+                                          --output fip/bl30_new.bin.g12a.enc \
+                                          --level v3
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                          --output fip/bl30_new.bin.enc \
+                                          --level v3 --type bl30
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
+                                          --output fip/bl31.img.enc \
+                                          --level v3 --type bl31
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
+                                          --output fip/bl33.bin.enc \
+                                          --level v3 --type bl33 --compress lz4
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
+                                          --output fip/bl2.n.bin.sig
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bootmk \
+                                          --output fip/u-boot.bin \
+                                          --bl2 fip/bl2.n.bin.sig \
+                                          --bl30 fip/bl30_new.bin.enc \
+                                          --bl31 fip/bl31.img.enc \
+                                          --bl33 fip/bl33.bin.enc \
+                                          --ddrfw1 fip/ddr4_1d.fw \
+                                          --ddrfw2 fip/ddr4_2d.fw \
+                                          --ddrfw3 fip/ddr3_1d.fw \
+                                          --ddrfw4 fip/piei.fw \
+                                          --ddrfw5 fip/lpddr4_1d.fw \
+                                          --ddrfw6 fip/lpddr4_2d.fw \
+                                          --ddrfw7 fip/diag_lpddr4.fw \
+                                          --ddrfw8 fip/aml_ddr.fw \
+                                          --ddrfw9 fip/lpddr3_1d.fw \
+                                          --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/khadas-vim3l.rst b/doc/board/amlogic/khadas-vim3l.rst
new file mode 100644
index 00000000000..cd21466f70b
--- /dev/null
+++ b/doc/board/amlogic/khadas-vim3l.rst
@@ -0,0 +1,162 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Khadas VIM3L (S905D3)
+================================
+
+Khadas VIM3L is a Single Board Computer manufactured by Shenzhen Wesion Technology Co. Ltd
+with the following specifications:
+
+ - Amlogic S905D3 Arm Cortex-A55 quad-core SoC
+ - 2GB LPDDR4 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.1 display
+ - 40-pin GPIO header
+ - 1 x USB 3.0 Host, 1 x USB 2.0 Host
+ - eMMC, microSD
+ - M.2
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+PCIe Setup
+----------
+
+The on-board MCU can mux the PCIe/USB3.0 shared differential lines using a FUSB340TMX USB
+3.1 SuperSpeed Data Switch between a USB3.0 Type-A connector and an M.2 Key-M slot. The
+PHY driving these differential lines is shared between the USB3.0 controller and the PCIe
+Controller, thus only a single controller can use it.
+
+To setup for PCIe run the following commands from U-Boot then power-cycle the board:
+
+.. code-block:: none
+
+    i2c dev i2c@5000
+    i2c mw 0x18 0x33 1
+
+To revert to USB3.0 run the following commands from U-Boot then power-cycle the board:
+
+.. code-block:: none
+
+    i2c dev i2c@5000
+    i2c mw 0x18 0x33 0
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make khadas-vim3l_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh khadas-vim3l /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=vim3l-u-boot
+    $ git clone --depth 1 https://github.com/khadas/u-boot.git -b khadas-vims-v2015.01 $DIR
+
+    $ cd vim3l-u-boot
+    $ make kvim3l_defconfig
+    $ make CROSS_COMPILE=aarch64-none-elf-
+    $ export UBOOTDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/khadas/kvim3l/firmware/acs.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl2.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl30.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl31.img fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/piei.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ bash fip/blx_fix.sh \
+           fip/bl30.bin \
+           fip/zero_tmp \
+           fip/bl30_zero.bin \
+           fip/bl301.bin \
+           fip/bl301_zero.bin \
+           fip/bl30_new.bin \
+           bl30
+
+    $ bash fip/blx_fix.sh \
+           fip/bl2.bin \
+           fip/zero_tmp \
+           fip/bl2_zero.bin \
+           fip/acs.bin \
+           fip/bl21_zero.bin \
+           fip/bl2_new.bin \
+           bl2
+
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
+                                          --output fip/bl30_new.bin.g12a.enc \
+                                          --level v3
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                          --output fip/bl30_new.bin.enc \
+                                          --level v3 --type bl30
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
+                                          --output fip/bl31.img.enc \
+                                          --level v3 --type bl31
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
+                                          --output fip/bl33.bin.enc \
+                                          --level v3 --type bl33 --compress lz4
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
+                                          --output fip/bl2.n.bin.sig
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
+                                          --output fip/u-boot.bin \
+                                          --bl2 fip/bl2.n.bin.sig \
+                                          --bl30 fip/bl30_new.bin.enc \
+                                          --bl31 fip/bl31.img.enc \
+                                          --bl33 fip/bl33.bin.enc \
+                                          --ddrfw1 fip/ddr4_1d.fw \
+                                          --ddrfw2 fip/ddr4_2d.fw \
+                                          --ddrfw3 fip/ddr3_1d.fw \
+                                          --ddrfw4 fip/piei.fw \
+                                          --ddrfw5 fip/lpddr4_1d.fw \
+                                          --ddrfw6 fip/lpddr4_2d.fw \
+                                          --ddrfw7 fip/diag_lpddr4.fw \
+                                          --ddrfw8 fip/aml_ddr.fw \
+                                          --ddrfw9 fip/lpddr3_1d.fw \
+                                          --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/libretech-ac.rst b/doc/board/amlogic/libretech-ac.rst
new file mode 100644
index 00000000000..fa151c0d008
--- /dev/null
+++ b/doc/board/amlogic/libretech-ac.rst
@@ -0,0 +1,120 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for LibreTech-AC 'LaFrite' (S805X)
+=========================================
+
+LibreTech-AC aka 'LaFrite' is a Single Board Computer manufactured by Libre Computer
+with the following specifications:
+
+ - Amlogic S805X ARM Cortex-A53 quad-core SoC @ 1.2GHz
+ - ARM Mali 450 GPU
+ - 512MiB DDR4 SDRAM
+ - 10/100 Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 4 x USB 2.0 Host
+ - SPI NOR Flash
+ - Removable eMMC module
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make libretech-ac_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh lafrite /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b libretech-ac amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ wget https://raw.githubusercontent.com/BayLibre/u-boot/libretech-cc/fip/blx_fix.sh
+    $ make libretech_ac_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Download the latest Amlogic buildroot package and extract it:
+
+.. code-block:: bash
+
+    $ wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180418.tar.gz
+    $ tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180418.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180418/bootloader
+    $ export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180418
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/amlogic/libretech_ac/firmware/bl21.bin fip/
+    $ cp $UBOOTDIR/build/board/amlogic/libretech_ac/firmware/acs.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl2/bin/gxl/bl2.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl30/bin/gxl/bl30.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl31/bin/gxl/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh $UBOOTDIR/blx_fix.sh \
+                   fip/bl30.bin \
+                   fip/zero_tmp \
+                   fip/bl30_zero.bin \
+                   fip/bl301.bin \
+                   fip/bl301_zero.bin \
+                   fip/bl30_new.bin \
+                   bl30
+
+    $ $BRDIR/bootloader/uboot-repo/fip/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ sh $UBOOTDIR/blx_fix.sh \
+                   fip/bl2_acs.bin \
+                   fip/zero_tmp \
+                   fip/bl2_zero.bin \
+                   fip/bl21.bin \
+                   fip/bl21_zero.bin \
+                   fip/bl2_new.bin \
+                   bl2
+
+    $ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+    $ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+    $ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+    $ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+    $ $BRDIR/bootloader/uboot-repo/fip/gxl/aml_encrypt_gxl --bootmk \
+                   --output fip/u-boot.bin \
+                   --bl2 fip/bl2.n.bin.sig \
+                   --bl30 fip/bl30_new.bin.enc \
+                   --bl31 fip/bl31.img.enc \
+                   --bl33 fip/bl33.bin.enc
+
+Then write U-Boot to USB or SPI-NOR with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/libretech-cc.rst b/doc/board/amlogic/libretech-cc.rst
new file mode 100644
index 00000000000..08a84a41c06
--- /dev/null
+++ b/doc/board/amlogic/libretech-cc.rst
@@ -0,0 +1,120 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for LibreTech CC 'LePotato' (S905X)
+==========================================
+
+LibreTech CC is a Single Board Computer manufactured by Libre Computer Technology with
+the following specifications:
+
+v1:
+
+ - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - 10/100 Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 4 x USB 2.0 Host
+ - eMMC, microSD
+ - Infrared receiver
+ - Jack for CVBS and Audio
+
+v2:
+
+ - Added SPI NOR
+ - Removed Jack
+
+Schematics are available on the manufacturer website.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make libretech-cc_defconfig
+    $ make
+
+Use libretech-cc_v2_defconfig for v2.
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh lepotato /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b libretech-cc amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make libretech_cc_defconfig
+    $ make
+    $ export FIPDIR=$PWD/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/gxl/bl2.bin fip/
+    $ cp $FIPDIR/gxl/acs.bin fip/
+    $ cp $FIPDIR/gxl/bl21.bin fip/
+    $ cp $FIPDIR/gxl/bl30.bin fip/
+    $ cp $FIPDIR/gxl/bl301.bin fip/
+    $ cp $FIPDIR/gxl/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+                                  --output fip/u-boot.bin \
+                                  --bl2 fip/bl2.n.bin.sig \
+                                  --bl30 fip/bl30_new.bin.enc \
+                                  --bl31 fip/bl31.img.enc \
+                                  --bl33 fip/bl33.bin.enc
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/nanopi-k2.rst b/doc/board/amlogic/nanopi-k2.rst
new file mode 100644
index 00000000000..53a0a41c889
--- /dev/null
+++ b/doc/board/amlogic/nanopi-k2.rst
@@ -0,0 +1,122 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for NanoPi-K2 (S905)
+===========================
+
+NanoPi-K2 is a single board computer manufactured by FriendlyElec with the following
+specifications:
+
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 4 x USB 2.0 Host, 1 x USB OTG
+ - eMMC, microSD
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make nanopi-k2_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh nanopi-k2 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/friendlyarm/u-boot.git -b nanopi-k2-v2015.01 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ sed -i 's/aarch64-linux-gnu-/aarch64-none-elf-/' Makefile
+    $ sed -i 's/arm-linux-/arm-none-eabi-/' arch/arm/cpu/armv8/gxb/firmware/scp_task/Makefile
+    $ make nanopi-k2_defconfig
+    $ make
+    $ export FIPDIR=$PWD/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/gxb/bl2.bin fip/
+    $ cp $FIPDIR/gxb/acs.bin fip/
+    $ cp $FIPDIR/gxb/bl21.bin fip/
+    $ cp $FIPDIR/gxb/bl30.bin fip/
+    $ cp $FIPDIR/gxb/bl301.bin fip/
+    $ cp $FIPDIR/gxb/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+    $ wget https://github.com/LibreELEC/amlogic-boot-fip/raw/master/nanopi-k2/bl1.bin.hardkernel fip/bl1.bin.hardkernel
+    $ chmod +x fip/bl1.bin.hardkernel
+    $ wget https://github.com/LibreELEC/amlogic-boot-fip/raw/master/nanopi-k2/aml_chksum fip/aml_chksum
+    $ chmod +x fip/aml_chksum
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \
+                         --bl31 fip/bl31.img \
+                         --bl33 fip/bl33.bin \
+                         fip/fip.bin
+
+    $ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin
+    $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin
+
+    $ $FIPDIR/gxb/aml_encrypt_gxb --bootsig \
+                                  --input fip/boot_new.bin
+                                  --output fip/u-boot.bin
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc
+    $ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc
+    $ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc
+    $ ./aml_chksum fip/u-boot.bin.gxbb
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/odroid-c2.rst b/doc/board/amlogic/odroid-c2.rst
new file mode 100644
index 00000000000..922ab0c0b40
--- /dev/null
+++ b/doc/board/amlogic/odroid-c2.rst
@@ -0,0 +1,72 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for ODROID-C2 (S905)
+===========================
+
+ODROID-C2 is a single board computer manufactured by Hardkernel with the following
+specifications:
+
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 40-pin GPIO header
+ - 4 x USB 2.0 Host, 1 x USB OTG
+ - eMMC, microSD
+ - Infrared receiver
+
+Schematics are available on the manufacturer website: https://wiki.odroid.com
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make odroid-c2_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh odroid-c2 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ DIR=odroid-c2
+    $ git clone --depth 1 https://github.com/hardkernel/u-boot.git -b odroidc2-v2015.01 $DIR
+
+    $ $DIR/fip/fip_create --bl30  $DIR/fip/gxb/bl30.bin \
+                          --bl301 $DIR/fip/gxb/bl301.bin \
+                          --bl31  $DIR/fip/gxb/bl31.bin \
+                          --bl33  u-boot.bin \
+                          $DIR/fip.bin
+
+    $ $DIR/fip/fip_create --dump $DIR/fip.bin
+    $ cat $DIR/fip/gxb/bl2.package $DIR/fip.bin > $DIR/boot_new.bin
+    $ $DIR/fip/gxb/aml_encrypt_gxb --bootsig \
+                                   --input $DIR/boot_new.bin \
+                                   --output $DIR/u-boot.img
+    $ dd if=$DIR/u-boot.img of=$DIR/u-boot.gxbb bs=512 skip=96
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/your_boot_device
+    $ BL1=$DIR/sd_fuse/bl1.bin.hardkernel
+    $ dd if=$BL1 of=$DEV conv=fsync bs=1 count=442
+    $ dd if=$BL1 of=$DEV conv=fsync bs=512 skip=1 seek=1
+    $ dd if=$DIR/u-boot.gxbb of=$DEV conv=fsync bs=512 seek=97
diff --git a/doc/board/amlogic/odroid-c4.rst b/doc/board/amlogic/odroid-c4.rst
new file mode 100644
index 00000000000..6994b958cf8
--- /dev/null
+++ b/doc/board/amlogic/odroid-c4.rst
@@ -0,0 +1,143 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for ODROID-C4 (S905X3)
+=============================
+
+ODROID-C4 is a Single Board Computer manufactured by Hardkernel with the following
+specifications:
+
+ - Amlogic S905X3 Arm Cortex-A55 quad-core SoC
+ - 4GB DDR4 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.1 display
+ - 40-pin GPIO header
+ - 4x USB 3.0 Host
+ - 1x USB 2.0 Host/OTG (micro)
+ - eMMC, microSD
+ - UART serial
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make odroid-c4_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh odroid-c4 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=odroid-c4
+    $ git clone --depth 1 \
+       https://github.com/hardkernel/u-boot.git -b odroidg12-v2015.01 \
+       $DIR
+
+    $ cd odroid-c4
+    $ make odroidc4_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/hardkernel/odroidc4/firmware/acs.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl2.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl30.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl31.img fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/piei.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
+                                          --output fip/bl30_new.bin.g12a.enc \
+                                          --level v3
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                          --output fip/bl30_new.bin.enc \
+                                          --level v3 --type bl30
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
+                                          --output fip/bl31.img.enc \
+                                          --level v3 --type bl31
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
+                                          --output fip/bl33.bin.enc \
+                                          --level v3 --type bl33 --compress lz4
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
+                                          --output fip/bl2.n.bin.sig
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
+                                          --output fip/u-boot.bin \
+                                          --bl2 fip/bl2.n.bin.sig \
+                                          --bl30 fip/bl30_new.bin.enc \
+                                          --bl31 fip/bl31.img.enc \
+                                          --bl33 fip/bl33.bin.enc \
+                                          --ddrfw1 fip/ddr4_1d.fw \
+                                          --ddrfw2 fip/ddr4_2d.fw \
+                                          --ddrfw3 fip/ddr3_1d.fw \
+                                          --ddrfw4 fip/piei.fw \
+                                          --ddrfw5 fip/lpddr4_1d.fw \
+                                          --ddrfw6 fip/lpddr4_2d.fw \
+                                          --ddrfw7 fip/diag_lpddr4.fw \
+                                          --ddrfw8 fip/aml_ddr.fw \
+                                          --ddrfw9 fip/lpddr3_1d.fw \
+                                          --level v3
+
+Then write the image to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/odroid-go-ultra.rst b/doc/board/amlogic/odroid-go-ultra.rst
new file mode 100644
index 00000000000..caf0e38dee6
--- /dev/null
+++ b/doc/board/amlogic/odroid-go-ultra.rst
@@ -0,0 +1,46 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for ODROID-GO-ULTRA (S922X)
+==================================
+
+The ODROID GO ULTRA is a portable gaming device with the following characteristics:
+
+ - Amlogic S922X SoC
+ - RK817 & RK818 PMICs
+ - 2GiB LPDDR4
+ - On board 16GiB eMMC
+ - Micro SD Card slot
+ - 5inch 854×480 MIPI-DSI TFT LCD
+ - Earphone stereo jack, 0.5Watt 8Ω Mono speaker
+ - Li-Polymer 3.7V/4000mAh Battery
+ - USB-A 2.0 Host Connector
+ - x16 GPIO Input Buttons
+ - 2x ADC Analog Joysticks
+ - USB-C Port for USB2 Device and Charging
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make odroid-go-ultra_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh odroid-go-ultra /path/to/u-boot/u-boot.bin my-output-dir
+
+Then write the image to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/odroid-hc4.rst b/doc/board/amlogic/odroid-hc4.rst
new file mode 100644
index 00000000000..1d37be2d80e
--- /dev/null
+++ b/doc/board/amlogic/odroid-hc4.rst
@@ -0,0 +1,142 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for ODROID-HC4 (S905X3)
+==============================
+
+ODROID-HC4 is a variant of the ODROID-C4 single board computer manufactured by Hardkernel
+with the following specification:
+
+ - Amlogic S905X3 Arm Cortex-A55 quad-core SoC
+ - 4GB DDR4 SDRAM
+ - 16MB XT25F128B SPI-NOR flash
+ - Gigabit Ethernet
+ - HDMI 2.1 display
+ - 7-pin GPIO header for OLED display and RTC
+ - 1x USB 2.0 host (micro)
+ - 2x SATA ports via ASM1061 PCIe to SATA controller
+ - microSD
+ - UART serial
+ - Infrared receiver
+
+Schematics are available on the manufacturer website.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make odroid-hc4_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh odroid-hc4 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=odroid-hc4
+    $ git clone --depth 1 https://github.com/hardkernel/u-boot.git -b odroidg12-v2015.01 $DIR
+
+    $ cd odroid-hc4
+    $ make odroidc4_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Go back to mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/hardkernel/odroidc4/firmware/acs.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl2.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl30.bin fip/
+    $ cp $UBOOTDIR/fip/g12a/bl31.img fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/piei.fw fip/
+    $ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
+                                                    --output fip/bl30_new.bin.g12a.enc \
+                                                    --level v3
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                                   --output fip/bl30_new.bin.enc \
+                                                   --level v3 --type bl30
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
+                                                   --output fip/bl31.img.enc \
+                                                   --level v3 --type bl31
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
+                                                   --output fip/bl33.bin.enc \
+                                                   --level v3 --type bl33 --compress lz4
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
+                                                   --output fip/bl2.n.bin.sig
+    $ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
+                                          --output fip/u-boot.bin \
+                                          --bl2 fip/bl2.n.bin.sig \
+                                          --bl30 fip/bl30_new.bin.enc \
+                                          --bl31 fip/bl31.img.enc \
+                                          --bl33 fip/bl33.bin.enc \
+                                          --ddrfw1 fip/ddr4_1d.fw \
+                                          --ddrfw2 fip/ddr4_2d.fw \
+                                          --ddrfw3 fip/ddr3_1d.fw \
+                                          --ddrfw4 fip/piei.fw \
+                                          --ddrfw5 fip/lpddr4_1d.fw \
+                                          --ddrfw6 fip/lpddr4_2d.fw \
+                                          --ddrfw7 fip/diag_lpddr4.fw \
+                                          --ddrfw8 fip/aml_ddr.fw \
+                                          --ddrfw9 fip/lpddr3_1d.fw \
+                                          --level v3
+
+Then write U-Boot to SD or SPI-NOR with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/odroid-n2.rst b/doc/board/amlogic/odroid-n2.rst
new file mode 100644
index 00000000000..883720f8fbf
--- /dev/null
+++ b/doc/board/amlogic/odroid-n2.rst
@@ -0,0 +1,141 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for ODROID-N2/N2+ (S922X)
+================================
+
+ODROID-N2 and ODROID-N2+ are a Single Board Computers manufactured by Hardkernel with the
+following specifications:
+
+ - Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
+ - 4GB DDR4 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.1 4K/60Hz display
+ - 40-pin GPIO header
+ - 4 x USB 3.0 Host, 1 x USB OTG
+ - eMMC, microSD
+ - Infrared receiver
+
+ODROID-N2+ uses Rev-C silicon allowing higher CPU opp-points. U-Boot contains logic to
+read the model detail from SARADC and select the correct device-tree file if FDTDIR is
+used instead of an FDT reference to a specfic device-tree.
+
+Schematics are available on the manufacturer website: https://wiki.odroid.com
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make odroid-n2_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh odroid-n2 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+
+    $ DIR=odroid-n2
+    $ git clone --depth 1 https://github.com/hardkernel/u-boot.git -b odroidn2-v2015.01 $DIR
+
+    $ cd odroid-n2
+    $ make odroidn2_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/hardkernel/odroidn2/firmware/acs.bin fip/
+    $ cp $UBOOTDIR/fip/g12b/bl2.bin fip/
+    $ cp $UBOOTDIR/fip/g12b/bl30.bin fip/
+    $ cp $UBOOTDIR/fip/g12b/bl31.img fip/
+    $ cp $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/piei.fw fip/
+    $ cp $UBOOTDIR/fip/g12b/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
+                                          --output fip/bl30_new.bin.g12a.enc \
+                                          --level v3
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                          --output fip/bl30_new.bin.enc \
+                                          --level v3 --type bl30
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
+                                          --output fip/bl31.img.enc \
+                                          --level v3 --type bl31
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
+                                          --output fip/bl33.bin.enc \
+                                          --level v3 --type bl33 --compress lz4
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
+                                          --output fip/bl2.n.bin.sig
+    $ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bootmk \
+                                          --output fip/u-boot.bin \
+                                          --bl2 fip/bl2.n.bin.sig \
+                                          --bl30 fip/bl30_new.bin.enc \
+                                          --bl31 fip/bl31.img.enc \
+                                          --bl33 fip/bl33.bin.enc \
+                                          --ddrfw1 fip/ddr4_1d.fw \
+                                          --ddrfw2 fip/ddr4_2d.fw \
+                                          --ddrfw3 fip/ddr3_1d.fw \
+                                          --ddrfw4 fip/piei.fw \
+                                          --ddrfw5 fip/lpddr4_1d.fw \
+                                          --ddrfw6 fip/lpddr4_2d.fw \
+                                          --ddrfw7 fip/diag_lpddr4.fw \
+                                          --ddrfw8 fip/aml_ddr.fw \
+                                          --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/odroid-n2l.rst b/doc/board/amlogic/odroid-n2l.rst
new file mode 100644
index 00000000000..6d581759741
--- /dev/null
+++ b/doc/board/amlogic/odroid-n2l.rst
@@ -0,0 +1,45 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for ODROID-N2L (S922X)
+=============================
+
+ODROID-N2L is a Single Board Computer manufactured by Hardkernel with the following
+specifications:
+
+ - Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
+ - 4GB DDR4 SDRAM
+ - HDMI 2.1 4K/60Hz display
+ - 40-pin GPIO header
+ - 1x USB 3.0 Host
+ - 1x USB 2.0 Host
+ - eMMC, microSD
+ - MIPI DSI Port
+
+Schematics are available on the manufacturer website: https://wiki.odroid.com
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make odroid-n2l_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh odroid-n2l /path/to/u-boot/u-boot.bin my-output-dir
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/p200.rst b/doc/board/amlogic/p200.rst
new file mode 100644
index 00000000000..e223897a19f
--- /dev/null
+++ b/doc/board/amlogic/p200.rst
@@ -0,0 +1,119 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Amlogic P200 (S905)
+==============================
+
+P200 is a reference board manufactured by Amlogic with the following specification:
+
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - Gigabit Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 2x USB 2.0 Host
+ - eMMC, microSD
+ - Infrared receiver
+ - SDIO WiFi Module
+ - CVBS + Stereo Audio Jack
+
+Schematics are available from Amlogic on demand.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make p200_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh p200 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image but sources have been shared by Linux development contractor, Baylibre:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make gxb_p200_v1_defconfig
+    $ make
+    $ export FIPDIR=$PWD/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/gxb/bl2.bin fip/
+    $ cp $FIPDIR/gxb/acs.bin fip/
+    $ cp $FIPDIR/gxb/bl21.bin fip/
+    $ cp $FIPDIR/gxb/bl30.bin fip/
+    $ cp $FIPDIR/gxb/bl301.bin fip/
+    $ cp $FIPDIR/gxb/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+    $ wget https://github.com/LibreELEC/amlogic-boot-fip/raw/master/nanopi-k2/bl1.bin.hardkernel fip/bl1.bin.hardkernel
+    $ chmod +x fip/bl1.bin.hardkernel
+    $ wget https://github.com/LibreELEC/amlogic-boot-fip/raw/master/nanopi-k2/aml_chksum fip/aml_chksum
+    $ chmod +x fip/aml_chksum
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \
+                         --bl31 fip/bl31.img \
+                         --bl33 fip/bl33.bin \
+                         fip/fip.bin
+
+    $ cat fip/bl2_new.bin fip/fip.bin >fip/boot_new.bin
+
+    $ $FIPDIR/gxb/aml_encrypt_gxb --bootsig \
+                                  --input fip/boot_new.bin \
+                                  --output fip/u-boot.bin
+
+and then write the image to SD with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc
+    $ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc
+    $ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc
+    $ ./aml_chksum fip/u-boot.bin.gxbb
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/p201.rst b/doc/board/amlogic/p201.rst
new file mode 100644
index 00000000000..13b732fc7e4
--- /dev/null
+++ b/doc/board/amlogic/p201.rst
@@ -0,0 +1,119 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Amlogic P201 (S905)
+==============================
+
+P201 is a reference board manufactured by Amlogic with the following specifications:
+
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - 10/100 Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 2x USB 2.0 Host
+ - eMMC, microSD
+ - Infrared receiver
+ - SDIO WiFi Module
+ - CVBS + Stereo Audio Jack
+
+Schematics are available from Amlogic on demand.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make p201_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh p201 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image but sources have been shared by Linux development contractor, Baylibre:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make gxb_p201_v1_defconfig
+    $ make
+    $ export FIPDIR=$PWD/fip
+
+Go back to mainline U-Boot source tree then :
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/gxb/bl2.bin fip/
+    $ cp $FIPDIR/gxb/acs.bin fip/
+    $ cp $FIPDIR/gxb/bl21.bin fip/
+    $ cp $FIPDIR/gxb/bl30.bin fip/
+    $ cp $FIPDIR/gxb/bl301.bin fip/
+    $ cp $FIPDIR/gxb/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+    $ wget https://github.com/LibreELEC/amlogic-boot-fip/raw/master/nanopi-k2/bl1.bin.hardkernel fip/bl1.bin.hardkernel
+    $ chmod +x fip/bl1.bin.hardkernel
+    $ wget https://github.com/LibreELEC/amlogic-boot-fip/raw/master/nanopi-k2/aml_chksum fip/aml_chksum
+    $ chmod +x fip/aml_chksum
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \
+                         --bl31 fip/bl31.img \
+                         --bl33 fip/bl33.bin \
+                         fip/fip.bin
+
+    $ cat fip/bl2_new.bin fip/fip.bin >fip/boot_new.bin
+
+    $ $FIPDIR/gxb/aml_encrypt_gxb --bootsig \
+                                  --input fip/boot_new.bin \
+                                  --output fip/u-boot.bin
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc
+    $ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc
+    $ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc
+    $ ./aml_chksum fip/u-boot.bin.gxbb
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/p212.rst b/doc/board/amlogic/p212.rst
new file mode 100644
index 00000000000..a872f32f0f4
--- /dev/null
+++ b/doc/board/amlogic/p212.rst
@@ -0,0 +1,104 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Amlogic P212
+=======================
+
+P212 is a reference board manufactured by Amlogic with the following
+specifications:
+
+ - Amlogic S905X ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - 10/100 Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 2 x USB 2.0 Host
+ - eMMC, microSD
+ - Infrared receiver
+ - SDIO WiFi Module
+ - CVBS+Stereo Audio Jack
+
+Schematics are available from Amlogic on demand.
+
+U-Boot compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make p212_defconfig
+    $ make
+
+Image creation
+--------------
+
+For simplified usage, pleaser refer to :doc:`pre-generated-fip` with codename `p212`
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+the git tree published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make gxl_p212_v1_defconfig
+    $ make
+    $ export FIPDIR=$PWD/fip
+
+Go back to mainline U-Boot source tree then :
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/gxl/bl2.bin fip/
+    $ cp $FIPDIR/gxl/acs.bin fip/
+    $ cp $FIPDIR/gxl/bl21.bin fip/
+    $ cp $FIPDIR/gxl/bl30.bin fip/
+    $ cp $FIPDIR/gxl/bl301.bin fip/
+    $ cp $FIPDIR/gxl/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+    	fip/bl30.bin \
+    	fip/zero_tmp \
+    	fip/bl30_zero.bin \
+    	fip/bl301.bin \
+    	fip/bl301_zero.bin \
+    	fip/bl30_new.bin \
+    	bl30
+
+    $ $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+    	fip/bl2_acs.bin \
+    	fip/zero_tmp \
+    	fip/bl2_zero.bin \
+    	fip/bl21.bin \
+    	fip/bl21_zero.bin \
+    	fip/bl2_new.bin \
+    	bl2
+
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+    		--output fip/u-boot.bin \
+    		--bl2 fip/bl2.n.bin.sig \
+    		--bl30 fip/bl30_new.bin.enc \
+    		--bl31 fip/bl31.img.enc \
+    		--bl33 fip/bl33.bin.enc
+
+and then write the image to SD with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/your_sd_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444
diff --git a/doc/board/amlogic/pre-generated-fip.rst b/doc/board/amlogic/pre-generated-fip.rst
new file mode 100644
index 00000000000..6a43d776d43
--- /dev/null
+++ b/doc/board/amlogic/pre-generated-fip.rst
@@ -0,0 +1,131 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Pre-Generated FIP File Repo
+===========================
+
+Pre-built Flattened Image Package (FIP) sources and Amlogic signing binaries for many
+commercially available boards and some Android STB devices are collected for use with
+distro build-systems here: https://github.com/LibreELEC/amlogic-boot-fip
+
+Using the pre-built FIP sources to sign U-Boot is simple, e.g. for LePotato:
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh lepotato /path/to/u-boot/u-boot.bin my-output-dir
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
+
+Files Included
+--------------
+
+Amlogic ARMv8 SoCs use a vendor modified variant of the ARM Trusted Firmware-A boot
+architecture. See documentation here: https://www.trustedfirmware.org/projects/tf-a/
+
+Trusted Firmware-A uses the following boot elements (simplified):
+
+- BL1: First boot step implemented in ROM on Amlogic SoCs
+
+- BL2: Second boot step used to initialize the SoC main clocks & DDR interface. BL21
+  and ACS board-specific binaries must be "inserted" into the BL2 binary before signing
+  and packaging in order to be flashed on the platform
+
+- BL30: Amlogic Secure Co-Processor (SCP) firmware used to handle all system management
+  operations (DVFS, suspend/resume, ..)
+
+- BL301: Amlogic Secure Co-Processor (SCP) board-specific firmware "plug-in" to handle
+  custom DVFS & suspend-resume parameters
+
+- BL31: Initializes the interrupt controller and the system management interface (PSCI)
+
+- BL32 (Optional): Is the Trusted Environment Execution (TEE) Operating System used to
+  run secure Trusted Apps, e.g. OP-TEE
+
+- BL33: Is the last non-secure step, usually U-Boot which loads Linux
+
+Amlogic sources provide the following binaries:
+
+- bl2.bin
+- bl30.bin
+- bl30.bin
+- bl31.img
+- bl32.bin
+
+For G12A/B and SM1 Amlogic also provides DDR drivers used by the BL2 binary:
+
+- ddr4_1d.fw
+- ddr4_2d.fw
+- ddr3_1d.fw
+- piei.fw
+- lpddr4_1d.fw
+- lpddr4_2d.fw
+- diag_lpddr4.fw
+- aml_ddr.fw
+
+The following files are generated from the Amlogic U-Boot fork:
+
+- acs.bin: Contains the PLL & DDR parameters for the board
+- bl301.bin: Contains the DVFS & suspend-resume handling code for the board
+- bl33.bin: U-boot binary image
+
+The acs.bin and bl301.bin files use U-Boot GPL-2.0+ headers and U-Boot build system and
+are thus considered to be issued from GPL-2.0+ source code.
+
+Amlogic alo provides pre-compiled x86_64 and Python2 binaries:
+
+- aml_encrypt_gxb
+- aml_encrypt_gxl
+- aml_encrypt_g12a
+- aml_encrypt_g12b
+- acs_tool.pyc
+
+The repo replaces the pre-compiled acs_tool.pyc with a Python3 acs_tool.py that can be
+used with modern build hosts.
+
+The repo also provides the following files used with GXBB boards:
+
+- bl1.bin.hardkernel
+- aml_chksum
+
+The repo also supports the open-source 'gxlimg' signing tool that can be used to sign
+U-Boot binaries for GXL/GXM/G12A/G12B/SM1 boards: https://github.com/repk/gxlimg
+
+Licensing
+---------
+
+The licence of Amlogic provided binaries was not historically clear but has now been
+clarified. The current Amlogic distribution licence is below:
+
+.. code-block:: C
+
+    // Copyright (C) 2018 Amlogic, Inc. All rights reserved.
+    //
+    // All information contained herein is Amlogic confidential.
+    //
+    // This software is provided to you pursuant to Software License
+    // Agreement (SLA) with Amlogic Inc ("Amlogic"). This software may be
+    // used only in accordance with the terms of this agreement.
+    //
+    // Redistribution and use in source and binary forms, with or without
+    // modification is strictly prohibited without prior written permission
+    // from Amlogic.
+    //
+    // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+    // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+    // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+    // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+    // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+    // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+    // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+    // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+    // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+    // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+    // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/doc/board/amlogic/q200.rst b/doc/board/amlogic/q200.rst
new file mode 100644
index 00000000000..32ea4722e40
--- /dev/null
+++ b/doc/board/amlogic/q200.rst
@@ -0,0 +1,110 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Amlogic Q200 (S912)
+==============================
+
+Q200 is a reference board manufactured by Amlogic with the following specifications:
+
+ - Amlogic S912 ARM Cortex-A53 octo-core SoC @ 1.5GHz
+ - ARM Mali T860 GPU
+ - 2/3GB DDR4 SDRAM
+ - 10/100/1000 Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 2x USB 2.0 Host
+ - 1x USB 2.0 Device
+ - 16GB/32GB/64GB eMMC
+ - 2MB SPI Flash
+ - microSD
+ - SDIO Wifi Module, Bluetooth
+ - IR receiver
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make khadas-vim2_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh q200 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image but sources have been shared by Linux development contractor, Baylibre:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make gxm_q200_v1_defconfig
+    $ make
+    $ export FIPDIR=$PWD/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/gxl/bl2.bin fip/
+    $ cp $FIPDIR/gxl/acs.bin fip/
+    $ cp $FIPDIR/gxl/bl21.bin fip/
+    $ cp $FIPDIR/gxl/bl30.bin fip/
+    $ cp $FIPDIR/gxl/bl301.bin fip/
+    $ cp $FIPDIR/gxl/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+                                  --output fip/u-boot.bin \
+                                  --bl2 fip/bl2.n.bin.sig \
+                                  --bl30 fip/bl30_new.bin.enc \
+                                  --bl31 fip/bl31.img.enc \
+                                  --bl33 fip/bl33.bin.enc
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/radxa-zero.rst b/doc/board/amlogic/radxa-zero.rst
new file mode 100644
index 00000000000..14ce3cfd492
--- /dev/null
+++ b/doc/board/amlogic/radxa-zero.rst
@@ -0,0 +1,80 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Radxa Zero (S905Y2)
+==============================
+
+Radxa Zero is a small form factor SBC based on the Amlogic S905Y2 chipset that ships in
+a number of RAM/eMMC configurations:
+
+512MB/1GB LPDDR4 RAM boards have no eMMC and BCM43436 wireless (2.4GHz b/g/n) while the
+2GB/4GB boards have 8/16/32/64/128GB eMMC and BCM4345 wireless (2.4/5GHz a/b/g/n/ac).
+
+- Amlogic S905Y2 quad-core Cortex-A53
+- Mali G31-MP2 GPU
+- HDMI 2.1 output (micro)
+- 1x USB 2.0 port - Type C (OTG)
+- 1x USB 3.0 port - Type C (Host)
+- 1x micro SD Card slot
+- 40 Pin GPIO header
+
+Schematics are available on the manufacturer website: https://dl.radxa.com/zero/docs/hw
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make radxa-zero_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh radxa-zero /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git
+    $ git clone https://github.com/radxa/fip.git
+
+    $ sudo apt-get install -y gcc-aarch64-linux-gnu device-tree-compiler libncurses5 libncurses5-dev
+    $ sudo apt-get install -y bc python dosfstools flex build-essential libssl-dev mtools
+
+    $ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz
+    $ sudo tar xvf gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz -C /opt
+
+    $ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf-
+    $ export ARCH=arm
+    $ cd u-boot
+    $ make radxa-zero_defconfig
+    $ make
+
+    $ cp u-boot.bin ../fip/radxa-zero/bl33.bin
+    $ cd ../fip/radxa-zero
+    $ make
+
+This will generate the signed U-Boot binaries:
+
+.. code-block:: bash
+
+    $ u-boot.bin u-boot.bin.sd.bin u-boot.bin.usb.bl2 u-boot.bin.usb.tpl
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/radxa-zero2.rst b/doc/board/amlogic/radxa-zero2.rst
new file mode 100644
index 00000000000..dccf5924597
--- /dev/null
+++ b/doc/board/amlogic/radxa-zero2.rst
@@ -0,0 +1,80 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Radxa Zero2 (A311D)
+==============================
+
+Radxa Zero2 is a small form factor SBC based on the Amlogic A311D chipset with the
+following specification:
+
+- Amlogic A311D (Quad A73 + Dual A53) CPU
+- 4GB LPDDR4 RAM
+- 32/64/128GB eMMC
+- Mali G52-MP4 GPU
+- HDMI 2.1 output (micro)
+- BCM4345 WiFi (2.4/5GHz a/b/g/n/ac) and BT 5.0
+- 1x USB 2.0 port - Type C (OTG)
+- 1x USB 3.0 port - Type C (Host)
+- 1x micro SD Card slot
+- 40 Pin GPIO header
+
+Schematics are available on request from Radxa.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make radxa-zero2_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh radxa-zero2 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git
+    $ git clone https://github.com/radxa/fip.git
+
+    $ sudo apt-get install -y gcc-aarch64-linux-gnu device-tree-compiler libncurses5 libncurses5-dev
+    $ sudo apt-get install -y bc python dosfstools flex build-essential libssl-dev mtools
+
+    $ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz
+    $ sudo tar xvf gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz -C /opt
+
+    $ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf-
+    $ export ARCH=arm
+    $ cd u-boot
+    $ make radxa-zero2_defconfig
+    $ make
+
+    $ cp u-boot.bin ../fip/radxa-zero2/bl33.bin
+    $ cd ../fip/radxa-zero2
+    $ make
+
+This will generate the signed U-Boot binaries:
+
+.. code-block:: bash
+
+    $ u-boot.bin u-boot.bin.sd.bin u-boot.bin.usb.bl2 u-boot.bin.usb.tpl
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/s400.rst b/doc/board/amlogic/s400.rst
new file mode 100644
index 00000000000..205e7c38fa3
--- /dev/null
+++ b/doc/board/amlogic/s400.rst
@@ -0,0 +1,117 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Amlogic S400 (A113X)
+===============================
+
+S400 is a reference board manufactured by Amlogic with the following specifications:
+
+ - Amlogic A113X ARM Cortex-A53 quad-core SoC @ 1.2GHz
+ - 1GB DDR4 SDRAM
+ - 10/100 Ethernet
+ - 2x USB 2.0 Host
+ - eMMC
+ - Infrared receiver
+ - SDIO WiFi Module
+ - MIPI DSI Connector
+ - Audio HAT Connector
+ - PCI-E M.2 Connectors
+
+Schematics are available from Amlogic on demand.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make s400_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh s400 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image but sources have been shared by Linux development contractor, Baylibre:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b n-amlogic-openlinux-20170606 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make axg_s400_v1_defconfig
+    $ make
+    $ export FIPDIR=$PWD/fip
+
+Go back to mainline U-Boot source tree then :
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/axg/bl2.bin fip/
+    $ cp $FIPDIR/axg/acs.bin fip/
+    $ cp $FIPDIR/axg/bl21.bin fip/
+    $ cp $FIPDIR/axg/bl30.bin fip/
+    $ cp $FIPDIR/axg/bl301.bin fip/
+    $ cp $FIPDIR/axg/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl30_new.bin \
+                                           --output fip/bl30_new.bin.enc \
+                                           --level v3 --type bl30
+    $ $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl31.img \
+                                           --output fip/bl31.img.enc \
+                                           --level v3 --type bl31
+    $ $FIPDIR/axg/aml_encrypt_axg --bl3sig --input fip/bl33.bin --compress lz4 \
+                                           --output fip/bl33.bin.enc \
+                                           --level v3 --type bl33
+    $ $FIPDIR/axg/aml_encrypt_axg --bl2sig --input fip/bl2_new.bin \
+                                           --output fip/bl2.n.bin.sig
+    $ $FIPDIR/axg/aml_encrypt_axg --bootmk \
+                                  --output fip/u-boot.bin \
+                                  --bl2 fip/bl2.n.bin.sig \
+                                  --bl30 fip/bl30_new.bin.enc \
+                                  --bl31 fip/bl31.img.enc \
+                                  --bl33 fip/bl33.bin.enc --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/sei510.rst b/doc/board/amlogic/sei510.rst
new file mode 100644
index 00000000000..87cb701a086
--- /dev/null
+++ b/doc/board/amlogic/sei510.rst
@@ -0,0 +1,138 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Amlogic SEI510 (S905X2)
+==================================
+
+SEI510 is a customer board manufactured by SEI Robotics with the following specification:
+
+ - Amlogic S905X2 ARM Cortex-A53 quad-core SoC
+ - 2GB DDR4 SDRAM
+ - 10/100 Ethernet (Internal PHY)
+ - 1x USB 3.0 Host
+ - eMMC
+ - SDcard
+ - Infrared receiver
+ - SDIO WiFi Module
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make sei510_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh sei510 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-20180418 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make g12a_u200_v1_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Download the latest Amlogic Buildroot package and extract it:
+
+.. code-block:: bash
+
+    $ wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz
+    $ tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180706/bootloader
+    $ export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180706
+    $ export FIPDIR=$BRDIR/bootloader/uboot-repo/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/amlogic/g12a_u200_v1/firmware/acs.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12a/bl2.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12a/bl30.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12a/bl31.img fip/
+    $ cp $FIPDIR/g12a/ddr3_1d.fw fip/
+    $ cp $FIPDIR/g12a/ddr4_1d.fw fip/
+    $ cp $FIPDIR/g12a/ddr4_2d.fw fip/
+    $ cp $FIPDIR/g12a/diag_lpddr4.fw fip/
+    $ cp $FIPDIR/g12a/lpddr4_1d.fw fip/
+    $ cp $FIPDIR/g12a/lpddr4_2d.fw fip/
+    $ cp $FIPDIR/g12a/piei.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
+                                              --output fip/bl30_new.bin.g12a.enc \
+                                              --level v3
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                             --output fip/bl30_new.bin.enc \
+                                             --level v3 --type bl30
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
+                                             --output fip/bl31.img.enc \
+                                             --level v3 --type bl31
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
+                                             --output fip/bl33.bin.enc \
+                                             --level v3 --type bl33
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
+                                             --output fip/bl2.n.bin.sig
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bootmk \
+                                    --output fip/u-boot.bin \
+                                    --bl2 fip/bl2.n.bin.sig \
+                                    --bl30 fip/bl30_new.bin.enc \
+                                    --bl31 fip/bl31.img.enc \
+                                    --bl33 fip/bl33.bin.enc \
+                                    --ddrfw1 fip/ddr4_1d.fw \
+                                    --ddrfw2 fip/ddr4_2d.fw \
+                                    --ddrfw3 fip/ddr3_1d.fw \
+                                    --ddrfw4 fip/piei.fw \
+                                    --ddrfw5 fip/lpddr4_1d.fw \
+                                    --ddrfw6 fip/lpddr4_2d.fw \
+                                    --ddrfw7 fip/diag_lpddr4.fw \
+                                    --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/sei610.rst b/doc/board/amlogic/sei610.rst
new file mode 100644
index 00000000000..64f62575e2c
--- /dev/null
+++ b/doc/board/amlogic/sei610.rst
@@ -0,0 +1,140 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Amlogic SEI610 (S905X3)
+==================================
+
+SEI610 is a customer board manufactured by SEI Robotics with the following specification:
+
+ - Amlogic S905X3 ARM Cortex-A55 quad-core SoC
+ - 2GB DDR4 SDRAM
+ - 10/100 Ethernet (Internal PHY)
+ - 1x USB 3.0 Host
+ - 1x USB Type-C DRD
+ - 1x FTDI USB Serial Debug Interface
+ - eMMC
+ - SDcard
+ - Infrared receiver
+ - SDIO WiFi Module
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make sei610_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh sei610 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-4.9-g12a-201904 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make sm1_ac200_v1_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Download the latest Amlogic buildroot package and extract it:
+
+.. code-block:: bash
+
+    $ wget http://openlinux2.amlogic.com:8000/ARM/filesystem/buildroot-openlinux-A113-201901.tgz
+    $ tar xfz buildroot-openlinux-A113-201901.tgz buildroot-openlinux-A113-201901/bootloader
+    $ export BRDIR=$PWD/buildroot-openlinux-A113-201901
+    $ export FIPDIR=$BRDIR/bootloader/uboot-repo/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/amlogic/g12a_u200_v1/firmware/acs.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12a/bl2.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12a/bl30.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12a/bl31.img fip/
+    $ cp $FIPDIR/g12a/ddr3_1d.fw fip/
+    $ cp $FIPDIR/g12a/ddr4_1d.fw fip/
+    $ cp $FIPDIR/g12a/ddr4_2d.fw fip/
+    $ cp $FIPDIR/g12a/diag_lpddr4.fw fip/
+    $ cp $FIPDIR/g12a/lpddr4_1d.fw fip/
+    $ cp $FIPDIR/g12a/lpddr4_2d.fw fip/
+    $ cp $FIPDIR/g12a/piei.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
+                                              --output fip/bl30_new.bin.g12a.enc \
+                                              --level v3
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                             --output fip/bl30_new.bin.enc \
+                                             --level v3 --type bl30
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
+                                             --output fip/bl31.img.enc \
+                                             --level v3 --type bl31
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
+                                             --output fip/bl33.bin.enc \
+                                             --level v3 --type bl33
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
+                                             --output fip/bl2.n.bin.sig
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bootmk \
+                                    --output fip/u-boot.bin \
+                                    --bl2 fip/bl2.n.bin.sig \
+                                    --bl30 fip/bl30_new.bin.enc \
+                                    --bl31 fip/bl31.img.enc \
+                                    --bl33 fip/bl33.bin.enc \
+                                    --ddrfw1 fip/ddr4_1d.fw \
+                                    --ddrfw2 fip/ddr4_2d.fw \
+                                    --ddrfw3 fip/ddr3_1d.fw \
+                                    --ddrfw4 fip/piei.fw \
+                                    --ddrfw5 fip/lpddr4_1d.fw \
+                                    --ddrfw6 fip/lpddr4_2d.fw \
+                                    --ddrfw7 fip/diag_lpddr4.fw \
+                                    --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/u200.rst b/doc/board/amlogic/u200.rst
new file mode 100644
index 00000000000..8254d4dfdb5
--- /dev/null
+++ b/doc/board/amlogic/u200.rst
@@ -0,0 +1,143 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Amlogic U200 (S905X2)
+================================
+
+U200 is a reference board manufactured by Amlogic with the following specification:
+
+ - Amlogic S905D2 ARM Cortex-A53 quad-core SoC
+ - 2GB DDR4 SDRAM
+ - 10/100 Ethernet (Internal PHY)
+ - 1x USB 3.0 Host
+ - eMMC
+ - SDcard
+ - Infrared receiver
+ - SDIO WiFi Module
+ - MIPI DSI Connector
+ - Audio HAT Connector
+ - PCI-E M.2 Connector
+
+Schematics are available from Amlogic on demand.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make u200_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh u200 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-20180418 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make g12a_u200_v1_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Download the latest Amlogic buildroot package and extract it:
+
+.. code-block:: bash
+
+    $ wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz
+    $ tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180706/bootloader
+    $ export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180706
+    $ export FIPDIR=$BRDIR/bootloader/uboot-repo/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/amlogic/g12a_u200_v1/firmware/acs.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12a/bl2.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12a/bl30.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12a/bl31.img fip/
+    $ cp $FIPDIR/g12a/ddr3_1d.fw fip/
+    $ cp $FIPDIR/g12a/ddr4_1d.fw fip/
+    $ cp $FIPDIR/g12a/ddr4_2d.fw fip/
+    $ cp $FIPDIR/g12a/diag_lpddr4.fw fip/
+    $ cp $FIPDIR/g12a/lpddr4_1d.fw fip/
+    $ cp $FIPDIR/g12a/lpddr4_2d.fw fip/
+    $ cp $FIPDIR/g12a/piei.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \
+                                              --output fip/bl30_new.bin.g12a.enc \
+                                              --level v3
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                             --output fip/bl30_new.bin.enc \
+                                             --level v3 --type bl30
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \
+                                             --output fip/bl31.img.enc \
+                                             --level v3 --type bl31
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \
+                                             --output fip/bl33.bin.enc \
+                                             --level v3 --type bl33
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \
+                                             --output fip/bl2.n.bin.sig
+    $ $FIPDIR/g12a/aml_encrypt_g12a --bootmk \
+                                    --output fip/u-boot.bin \
+                                    --bl2 fip/bl2.n.bin.sig \
+                                    --bl30 fip/bl30_new.bin.enc \
+                                    --bl31 fip/bl31.img.enc \
+                                    --bl33 fip/bl33.bin.enc \
+                                    --ddrfw1 fip/ddr4_1d.fw \
+                                    --ddrfw2 fip/ddr4_2d.fw \
+                                    --ddrfw3 fip/ddr3_1d.fw \
+                                    --ddrfw4 fip/piei.fw \
+                                    --ddrfw5 fip/lpddr4_1d.fw \
+                                    --ddrfw6 fip/lpddr4_2d.fw \
+                                    --ddrfw7 fip/diag_lpddr4.fw \
+                                    --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/videostrong-kii-pro.rst b/doc/board/amlogic/videostrong-kii-pro.rst
new file mode 100644
index 00000000000..1c6adac996c
--- /dev/null
+++ b/doc/board/amlogic/videostrong-kii-pro.rst
@@ -0,0 +1,112 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Videostrong KII Pro (S905)
+=====================================
+
+Videostrong KII Pro is an Android STB manufactured by Videostrong and 
+based on the Amlogic p201 reference board, with the following specification:
+
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - 16GB eMMC
+ - Gigabit Ethernet
+ - Boardcom BCM4335 WiFi and BT 4.0
+ - HDMI 2.0 4K/60Hz display
+ - 3x USB 2.0 host
+ - 1x USB 2.0 otg
+ - microSD
+ - Infrared receiver
+ - Blue LED
+ - Red LED
+ - Power button (case, front)
+ - Reset button (underside)
+ - DVB Card: DVB-S and DVB-T/C
+
+Schematics are not publicly available.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make videostrong-kii-pro_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh wetek-play2 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create 
+a bootloader image and Videostrong has not publicly shared the U-Boot sources 
+needed to build FIP binaries for signing. However you can use the WeTek 
+Play2 binaries from the amlogic-boot-fip repo as the WeTek Play2 and the 
+Videostrong KII Pro share the same RAM chips.
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip/wetek-play2
+    $ export FIPDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+    $ cp $FIPDIR/bl2.bin fip/
+    $ cp $FIPDIR/acs.bin fip/
+    $ cp $FIPDIR/bl21.bin fip/
+    $ cp $FIPDIR/bl30.bin fip/
+    $ cp $FIPDIR/bl301.bin fip/
+    $ cp $FIPDIR/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+    $ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \
+                         --bl31 fip/bl31.img \
+                         --bl33 fip/bl33.bin \
+                         fip/fip.bin
+    $ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin
+    $ python3 $FIPDIR/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+    $ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin
+    $ $FIPDIR/aml_encrypt_gxb --bootsig \
+                              --input fip/boot_new.bin
+                              --output fip/u-boot.bin
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc
+    $ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc
+    $ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc
+    $ ./aml_chksum fip/u-boot.bin.gxbb
+    $ dd if=fip/u-boot.bin.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/w400.rst b/doc/board/amlogic/w400.rst
new file mode 100644
index 00000000000..d2a8107b58c
--- /dev/null
+++ b/doc/board/amlogic/w400.rst
@@ -0,0 +1,145 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Amlogic W400 (S922X)
+===============================
+
+W400 is a reference board manufactured by Amlogic with the following specification:
+
+ - Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
+ - 2GB DDR4 SDRAM
+ - 10/100 Ethernet (Internal PHY)
+ - 1x USB 3.0 Host
+ - eMMC
+ - SDcard
+ - Infrared receiver
+ - SDIO WiFi Module
+ - MIPI DSI Connector
+ - Audio HAT Connector
+ - PCI-E M.2 Connector
+
+Schematics are available from Amlogic on demand.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make w400_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh jethub-j100 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image so it is necessary to obtain binaries from sources published by the board vendor:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-20180418 amlogic-u-boot
+    $ cd amlogic-u-boot
+    $ make g12b_w400_v1_defconfig
+    $ make
+    $ export UBOOTDIR=$PWD
+
+Download the latest Amlogic buildroot package and extract it:
+
+.. code-block:: bash
+
+    $ wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz
+    $ tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180706/bootloader
+    $ export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180706
+    $ export FIPDIR=$BRDIR/bootloader/uboot-repo/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh
+    $ cp $UBOOTDIR/build/scp_task/bl301.bin fip/
+    $ cp $UBOOTDIR/build/board/amlogic/g12b_w400_v1/firmware/acs.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12b/bl2.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12b/bl30.bin fip/
+    $ cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12b/bl31.img fip/
+    $ cp $FIPDIR/g12b/ddr3_1d.fw fip/
+    $ cp $FIPDIR/g12b/ddr4_1d.fw fip/
+    $ cp $FIPDIR/g12b/ddr4_2d.fw fip/
+    $ cp $FIPDIR/g12b/diag_lpddr4.fw fip/
+    $ cp $FIPDIR/g12b/lpddr4_1d.fw fip/
+    $ cp $FIPDIR/g12b/lpddr4_2d.fw fip/
+    $ cp $FIPDIR/g12b/piei.fw fip/
+    $ cp $FIPDIR/g12b/aml_ddr.fw fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ sh fip/blx_fix.sh \
+         fip/bl30.bin \
+         fip/zero_tmp \
+         fip/bl30_zero.bin \
+         fip/bl301.bin \
+         fip/bl301_zero.bin \
+         fip/bl30_new.bin \
+         bl30
+
+    $ sh fip/blx_fix.sh \
+         fip/bl2.bin \
+         fip/zero_tmp \
+         fip/bl2_zero.bin \
+         fip/acs.bin \
+         fip/bl21_zero.bin \
+         fip/bl2_new.bin \
+         bl2
+
+    $ $FIPDIR/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \
+                                              --output fip/bl30_new.bin.g12a.enc \
+                                              --level v3
+    $ $FIPDIR/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \
+                                             --output fip/bl30_new.bin.enc \
+                                             --level v3 --type bl30
+    $ $FIPDIR/g12b/aml_encrypt_g12b --bl3sig --input fip/bl31.img \
+                                             --output fip/bl31.img.enc \
+                                             --level v3 --type bl31
+    $ $FIPDIR/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
+                                             --output fip/bl33.bin.enc \
+                                             --level v3 --type bl33
+    $ $FIPDIR/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
+                                             --output fip/bl2.n.bin.sig
+    $ $FIPDIR/g12b/aml_encrypt_g12b --bootmk \
+                                    --output fip/u-boot.bin \
+                                    --bl2 fip/bl2.n.bin.sig \
+                                    --bl30 fip/bl30_new.bin.enc \
+                                    --bl31 fip/bl31.img.enc \
+                                    --bl33 fip/bl33.bin.enc \
+                                    --ddrfw1 fip/ddr4_1d.fw \
+                                    --ddrfw2 fip/ddr4_2d.fw \
+                                    --ddrfw3 fip/ddr3_1d.fw \
+                                    --ddrfw4 fip/piei.fw \
+                                    --ddrfw5 fip/lpddr4_1d.fw \
+                                    --ddrfw6 fip/lpddr4_2d.fw \
+                                    --ddrfw7 fip/diag_lpddr4.fw \
+                                    --ddrfw8 fip/aml_ddr.fw \
+                                    --level v3
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/wetek-core2.rst b/doc/board/amlogic/wetek-core2.rst
new file mode 100644
index 00000000000..137262ec307
--- /dev/null
+++ b/doc/board/amlogic/wetek-core2.rst
@@ -0,0 +1,110 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for WeTek Core2 (S912)
+=============================
+
+WeTek Core2 is an Android STB based on the Q200 reference design with the following
+specifications:
+
+ - Amlogic S912 ARM Cortex-A53 octo-core SoC @ 1.5GHz
+ - ARM Mali T820 GPU
+ - 3GB DDR4 SDRAM
+ - 10/100 Realtek RTL8152 Ethernet (internal USB)
+ - HDMI 2.0 4K/60Hz display
+ - 2x USB 2.0 Host
+ - 1x USB 2.0 OTG (internal)
+ - 32GB eMMC
+ - microSD
+ - SDIO Wifi Module, Bluetooth
+ - Two channel IR receiver
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make wetek-core2_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh wetek-core2 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide firmware sources or tools needed to create the bootloader image
+and WeTek has not publicly shared the precompiled FIP binaries. However the Khadas VIM2
+sources also work with the Core2 box so we can use the Khadas git tree:
+
+.. code-block:: bash
+
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+    $ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
+    $ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
+    $ git clone https://github.com/khadas/u-boot -b khadas-vim-v2015.01 vim-u-boot
+    $ cd vim-u-boot
+    $ make kvim2_defconfig
+    $ make
+    $ export FIPDIR=$PWD/fip
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+    $ cp $FIPDIR/gxl/bl2.bin fip/
+    $ cp $FIPDIR/gxl/acs.bin fip/
+    $ cp $FIPDIR/gxl/bl21.bin fip/
+    $ cp $FIPDIR/gxl/bl30.bin fip/
+    $ cp $FIPDIR/gxl/bl301.bin fip/
+    $ cp $FIPDIR/gxl/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ python $FIPDIR/acs_tool.pyc fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl30_new.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl31.img
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl3enc --input fip/bl33.bin
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bl2sig --input fip/bl2_new.bin --output fip/bl2.n.bin.sig
+    $ $FIPDIR/gxl/aml_encrypt_gxl --bootmk \
+                                  --output fip/u-boot.bin \
+                                  --bl2 fip/bl2.n.bin.sig \
+                                  --bl30 fip/bl30_new.bin.enc \
+                                  --bl31 fip/bl31.img.enc \
+                                  --bl33 fip/bl33.bin.enc
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/wetek-hub.rst b/doc/board/amlogic/wetek-hub.rst
new file mode 100644
index 00000000000..212f0447815
--- /dev/null
+++ b/doc/board/amlogic/wetek-hub.rst
@@ -0,0 +1,111 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for WeTek Hub (S905)
+===========================
+
+WeTek Hub is a small form-factor Android STB manufactured by WeTek with the following
+specification:
+
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 1GB DDR3 SDRAM
+ - 8GB eMMC
+ - Gigabit Ethernet
+ - HDMI 2.0 4K/60Hz display
+ - 1x USB otg
+ - microSD
+ - UART jack
+ - Infrared receiver
+
+Schematics are not publicly available but have been shared privately to maintainers.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make wetek-hub_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh wetek-hub /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image and WeTek has not publicly shared the U-Boot sources needed to build FIP binaries
+for signing. However you can download them from the amlogic-fip-repo.
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip/wetek-hub
+    $ export FIPDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/bl2.bin fip/
+    $ cp $FIPDIR/acs.bin fip/
+    $ cp $FIPDIR/bl21.bin fip/
+    $ cp $FIPDIR/bl30.bin fip/
+    $ cp $FIPDIR/bl301.bin fip/
+    $ cp $FIPDIR/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \
+                         --bl31 fip/bl31.img \
+                         --bl33 fip/bl33.bin \
+                         fip/fip.bin
+
+    $ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin
+    $ python3 $FIPDIR/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin
+
+    $ $FIPDIR/aml_encrypt_gxb --bootsig \
+                              --input fip/boot_new.bin
+                              --output fip/u-boot.bin
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc
+    $ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc
+    $ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc
+    $ ./aml_chksum fip/u-boot.bin.gxbb
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/amlogic/wetek-play2.rst b/doc/board/amlogic/wetek-play2.rst
new file mode 100644
index 00000000000..74580b9d959
--- /dev/null
+++ b/doc/board/amlogic/wetek-play2.rst
@@ -0,0 +1,116 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for WeTek Play2 (S905)
+=============================
+
+WeTek Play2 is an Android STB manufactured by WeTek with the following specification:
+
+ - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz
+ - ARM Mali 450 GPU
+ - 2GB DDR3 SDRAM
+ - 8GB eMMC
+ - Gigabit Ethernet
+ - AP6335 (v1) or AP6255 (v2) WiFi (b/g/n) and BT 4.0
+ - HDMI 2.0 4K/60Hz display
+ - 2x USB 2.0 host
+ - 1x USB 2.0 otg
+ - microSD
+ - UART jack
+ - Infrared receiver
+ - Power LED (blue)
+ - Power button (case, front)
+ - Reset button (underside)
+ - DVB Card: DVB-S or DVB-T/C or ATSC
+
+Schematics are not publicly available but have been shared privately to maintainers.
+
+U-Boot Compilation
+------------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make wetek-play2_defconfig
+    $ make
+
+U-Boot Signing with Pre-Built FIP repo
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip
+    $ mkdir my-output-dir
+    $ ./build-fip.sh wetek-play2 /path/to/u-boot/u-boot.bin my-output-dir
+
+U-Boot Manual Signing
+---------------------
+
+Amlogic does not provide sources for the firmware and tools needed to create a bootloader
+image and WeTek has not publicly shared the U-Boot sources needed to build FIP binaries
+for signing. However you can download them from the amlogic-fip-repo.
+
+.. code-block:: bash
+
+    $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1
+    $ cd amlogic-boot-fip/wetek-play2
+    $ export FIPDIR=$PWD
+
+Go back to the mainline U-Boot source tree then:
+
+.. code-block:: bash
+
+    $ mkdir fip
+
+    $ cp $FIPDIR/bl2.bin fip/
+    $ cp $FIPDIR/acs.bin fip/
+    $ cp $FIPDIR/bl21.bin fip/
+    $ cp $FIPDIR/bl30.bin fip/
+    $ cp $FIPDIR/bl301.bin fip/
+    $ cp $FIPDIR/bl31.img fip/
+    $ cp u-boot.bin fip/bl33.bin
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl30.bin \
+              fip/zero_tmp \
+              fip/bl30_zero.bin \
+              fip/bl301.bin \
+              fip/bl301_zero.bin \
+              fip/bl30_new.bin \
+              bl30
+
+    $ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \
+                         --bl31 fip/bl31.img \
+                         --bl33 fip/bl33.bin \
+                         fip/fip.bin
+
+    $ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin
+    $ python3 $FIPDIR/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0
+
+    $ $FIPDIR/blx_fix.sh \
+              fip/bl2_acs.bin \
+              fip/zero_tmp \
+              fip/bl2_zero.bin \
+              fip/bl21.bin \
+              fip/bl21_zero.bin \
+              fip/bl2_new.bin \
+              bl2
+
+    $ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin
+
+    $ $FIPDIR/aml_encrypt_gxb --bootsig \
+                              --input fip/boot_new.bin
+                              --output fip/u-boot.bin
+
+Then write U-Boot to SD or eMMC with:
+
+.. code-block:: bash
+
+    $ DEV=/dev/boot_device
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync
+    $ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc
+    $ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc
+    $ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc
+    $ ./aml_chksum fip/u-boot.bin.gxbb
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1
+    $ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440
diff --git a/doc/board/anbernic/index.rst b/doc/board/anbernic/index.rst
new file mode 100644
index 00000000000..03758d86137
--- /dev/null
+++ b/doc/board/anbernic/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Anbernic
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   rgxx3.rst
diff --git a/doc/board/anbernic/rgxx3.rst b/doc/board/anbernic/rgxx3.rst
new file mode 100644
index 00000000000..1e63e6951e2
--- /dev/null
+++ b/doc/board/anbernic/rgxx3.rst
@@ -0,0 +1,65 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Anbernic RGxx3 Devices
+=================================
+
+This allows U-Boot to boot the following Anbernic devices:
+
+ - Anbernic RG-ARC-D
+ - Anbernic RG-ARC-S
+ - Anbernic RG353M
+ - Anbernic RG353P
+ - Anbernic RG353PS
+ - Anbernic RG353V
+ - Anbernic RG353VS
+ - Anbernic RG503
+
+Additionally, the following very similar non-Anbernic devices are also
+supported:
+
+ - Powkiddy RGB10MAX3
+ - Powkiddy RGB30
+ - Powkiddy RK2023
+
+The correct device is detected automatically by comparing ADC values
+from ADC channel 1. In the event of an RG353V or RG353P, an attempt
+is then made to probe for an eMMC and if it fails the device is assumed
+to be an RG353VS or RG353PS. Based on the detected device, the
+environment variables "board", "board_name", and "fdtfile" are set to
+the correct values corresponding to the board which can be read by a
+boot script to boot with the correct device tree. If a board is defined
+as requiring panel detection, a panel detect is then performed by
+probing a "dummy" display on the DSI bus and then querying the display
+ID. The display ID is then compared to a table to get the known
+compatible string for use in Linux, and this string is saved as an
+environment variable of "panel".
+
+FDT fixups are performed in the event of an RG353M to change the device
+name, or in the event the panel detected does not match the devicetree.
+This allows Linux to load the correct panel driver without having to
+know exactly which panel is used (as there is no user distingushable
+way to tell).
+
+Building U-Boot
+---------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-linux-gnu-
+    $ export BL31=../rkbin/bin/rk35/rk3568_bl31_v1.34.elf
+    $ export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3568_ddr_1056MHz_v1.13.bin
+    $ make anbernic-rgxx3_defconfig
+    $ make
+
+This will build ``u-boot-rockchip.bin`` which can be written to an SD
+card.
+
+Image installation
+------------------
+
+Write the ``u-boot-rockchip.bin`` to an SD card offset 32kb from the
+start. Please note that eMMC booting has not been tested at this time.
+
+.. code-block:: bash
+
+    $ dd if=u-boot-rockchip.bin of=/dev/mmcblk0 bs=512 seek=64
diff --git a/doc/board/andestech/adp-ag101p.rst b/doc/board/andestech/adp-ag101p.rst
new file mode 100644
index 00000000000..f867eeae3eb
--- /dev/null
+++ b/doc/board/andestech/adp-ag101p.rst
@@ -0,0 +1,40 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+ADP-AG101P
+==========
+
+ADP-AG101P is the SoC with AG101 hardcore CPU.
+
+AG101P SoC
+----------
+
+AG101P is the mainline SoC produced by Andes Technology using N1213 CPU core
+with FPU and DDR contoller support.
+AG101P has integrated both AHB and APB bus and many periphals for application
+and product development.
+
+
+Configurations
+--------------
+
+CONFIG_MEM_REMAP:
+	Doing memory remap is essential for preparing some non-OS or RTOS
+	applications.
+
+CONFIG_SKIP_LOWLEVEL_INIT:
+	If you want to boot this system from SPI ROM and bypass e-bios (the
+	other boot loader on ROM). You should enable CONFIG_SKIP_LOWLEVEL_INIT
+	when running menuconfig or similar.
+
+Build and boot steps
+--------------------
+
+Build:
+
+1. Prepare the toolchains and make sure the $PATH to toolchains is correct.
+2. Use `make adp-ag101p_defconfig` in u-boot root to build the image.
+
+Burn U-Boot to SPI ROM
+----------------------
+
+This section will be added later.
diff --git a/doc/board/andestech/ae350.rst b/doc/board/andestech/ae350.rst
new file mode 100644
index 00000000000..99622fd3258
--- /dev/null
+++ b/doc/board/andestech/ae350.rst
@@ -0,0 +1,524 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+AE350
+=====
+
+AE350 is the mainline SoC produced by Andes Technology using AndesV5 CPU core
+based on RISC-V architecture.
+
+AE350 has integrated both AHB and APB bus and many periphals for application
+and product development.
+
+AndesV5 is Andes CPU IP family that adopts RISC-V architecture.
+
+AndesV5 family includes 25, 27, 45 series.
+
+25-Series Features
+------------------
+
+CPU Core
+ - 5-stage in-order execution pipeline
+ - Hardware Multiplier
+      - radix-2/radix-4/radix-16/radix-256/fast
+ - Hardware Divider
+ - Optional branch prediction
+ - Machine mode and optional user mode
+ - Optional performance monitoring
+
+ISA
+ - RV64I base integer instructions
+ - RVC for 16-bit compressed instructions
+ - RVM for multiplication and division instructions
+
+Memory subsystem
+ - I & D local memory
+      - Size: 4KB to 16MB
+ - Memory subsyetem soft-error protection
+      - Protection scheme: parity-checking or error-checking-and-correction (ECC)
+      - Automatic hardware error correction
+
+Bus
+ - Interface Protocol
+      - Synchronous AHB (32-bit/64-bit data-width), or
+      - Synchronous AXI4 (64-bit data-width)
+
+Power management
+ - Wait for interrupt (WFI) mode
+
+Debug
+ - Configurable number of breakpoints: 2/4/8
+ - External Debug Module
+      - AHB slave port
+ - External JTAG debug transport module
+
+Platform Level Interrupt Controller (PLIC)
+ - AHB slave port
+ - Configurable number of interrupts: 1-1023
+ - Configurable number of interrupt priorities: 3/7/15/63/127/255
+ - Configurable number of targets:  1-16
+ - Preempted interrupt priority stack
+
+Build and boot steps
+--------------------
+
+Build:
+
+1. Prepare the toolchains and make sure the $PATH to toolchains is correct.
+2. Use `make ae350_rv[32|64]_defconfig` in u-boot root to build the image for
+   32 or 64 bit.
+
+Verification:
+
+1. startup
+2. relocation
+3. timer driver
+4. uart driver
+5. mac driver
+6. mmc driver
+7. spi driver
+
+Steps
+-----
+
+1. Ping a server by mac driver
+2. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver
+3. Burn this u-boot image to spi rom by spi driver
+4. Re-boot u-boot from spi flash with power off and power on
+
+Messages of U-Boot boot on AE350 board
+--------------------------------------
+
+.. code-block:: none
+
+   U-Boot 2018.01-rc2-00033-g824f89a (Dec 21 2017 - 16:51:26 +0800)
+
+   DRAM:  1 GiB
+   MMC:   mmc@f0e00000: 0
+   SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
+   In:    serial@f0300000
+   Out:   serial@f0300000
+   Err:   serial@f0300000
+   Net:
+   Warning: mac@e0100000 (eth0) using random MAC address - be:dd:d7:e4:e8:10
+   eth0: mac@e0100000
+
+   RISC-V # version
+   U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800)
+
+   riscv32-unknown-linux-gnu-gcc (GCC) 7.2.0
+   GNU ld (GNU Binutils) 2.29
+
+   RISC-V # setenv ipaddr 10.0.4.200 ;
+   RISC-V # setenv serverip 10.0.4.97 ;
+   RISC-V # ping 10.0.4.97 ;
+   Using mac@e0100000 device
+   host 10.0.4.97 is alive
+
+   RISC-V # mmc rescan
+   RISC-V # fatls mmc 0:1
+      318907   u-boot-ae350-64.bin
+        1252   hello_world_ae350_32.bin
+      328787   u-boot-ae350-32.bin
+
+   3 file(s), 0 dir(s)
+
+   RISC-V # sf probe 0:0 50000000 0
+   SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
+
+   RISC-V # sf test 0x100000 0x1000
+   SPI flash test:
+   0 erase: 36 ticks, 111 KiB/s 0.888 Mbps
+   1 check: 29 ticks, 137 KiB/s 1.096 Mbps
+   2 write: 40 ticks, 100 KiB/s 0.800 Mbps
+   3 read: 20 ticks, 200 KiB/s 1.600 Mbps
+   Test passed
+   0 erase: 36 ticks, 111 KiB/s 0.888 Mbps
+   1 check: 29 ticks, 137 KiB/s 1.096 Mbps
+   2 write: 40 ticks, 100 KiB/s 0.800 Mbps
+   3 read: 20 ticks, 200 KiB/s 1.600 Mbps
+
+   RISC-V # fatload mmc 0:1 0x600000 u-boot-ae350-32.bin
+   reading u-boot-ae350-32.bin
+   328787 bytes read in 324 ms (990.2 KiB/s)
+
+   RISC-V # sf erase 0x0 0x51000
+   SF: 331776 bytes @ 0x0 Erased: OK
+
+   RISC-V # sf write 0x600000 0x0 0x50453
+   device 0 offset 0x0, size 0x50453
+   SF: 328787 bytes @ 0x0 Written: OK
+
+   RISC-V # crc32 0x600000 0x50453
+   crc32 for 00600000 ... 00650452 ==> 692dc44a
+
+   RISC-V # crc32 0x80000000 0x50453
+   crc32 for 80000000 ... 80050452 ==> 692dc44a
+   RISC-V #
+
+   *** power-off and power-on, this U-Boot is booted from spi flash ***
+
+   U-Boot 2018.01-rc2-00032-gf67dd47-dirty (Dec 21 2017 - 13:56:03 +0800)
+
+   DRAM:  1 GiB
+   MMC:   mmc@f0e00000: 0
+   SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
+   In:    serial@f0300000
+   Out:   serial@f0300000
+   Err:   serial@f0300000
+   Net:
+   Warning: mac@e0100000 (eth0) using random MAC address - ee:4c:58:29:32:f5
+   eth0: mac@e0100000
+   RISC-V #
+
+
+Boot bbl and riscv-linux via U-Boot on QEMU
+-------------------------------------------
+
+1. Build riscv-linux
+2. Build bbl and riscv-linux with --with-payload
+3. Prepare ae350.dtb
+4. Creating OS-kernel images
+
+.. code-block:: none
+
+   ./mkimage -A riscv -O linux -T kernel -C none -a 0x0000 -e 0x0000 -d bbl.bin bootmImage-bbl.bin
+   Image Name:
+   Created:      Tue Mar 13 10:06:42 2018
+   Image Type:   RISC-V Linux Kernel Image (uncompressed)
+   Data Size:    17901204 Bytes = 17481.64 KiB = 17.07 MiB
+   Load Address: 00000000
+   Entry Point:  00000000
+
+5. Copy bootmImage-bbl.bin and ae350.dtb to qemu sd card image
+6. Message of booting riscv-linux from bbl via u-boot on qemu
+
+.. code-block:: none
+
+   U-Boot 2018.03-rc4-00031-g2631273 (Mar 13 2018 - 15:02:55 +0800)
+
+   DRAM:  1 GiB
+   main-loop: WARNING: I/O thread spun for 1000 iterations
+   MMC:   mmc@f0e00000: 0
+   Loading Environment from SPI Flash... *** Warning - spi_flash_probe_bus_cs() failed, using default environment
+
+   Failed (-22)
+   In:    serial@f0300000
+   Out:   serial@f0300000
+   Err:   serial@f0300000
+   Net:
+   Warning: mac@e0100000 (eth0) using random MAC address - 02:00:00:00:00:00
+   eth0: mac@e0100000
+   RISC-V # mmc rescan
+   RISC-V # mmc part
+
+   Partition Map for MMC device 0  --   Partition Type: DOS
+
+   Part    Start Sector    Num Sectors     UUID            Type
+   RISC-V # fatls mmc 0:0
+    17901268   bootmImage-bbl.bin
+        1954   ae2xx.dtb
+
+   2 file(s), 0 dir(s)
+
+   RISC-V # fatload mmc 0:0 0x00600000 bootmImage-bbl.bin
+   17901268 bytes read in 4642 ms (3.7 MiB/s)
+   RISC-V # fatload mmc 0:0 0x2000000 ae350.dtb
+   1954 bytes read in 1 ms (1.9 MiB/s)
+   RISC-V # setenv bootm_size 0x2000000
+   RISC-V # setenv fdt_high 0x1f00000
+   RISC-V # bootm 0x00600000 - 0x2000000
+   ## Booting kernel from Legacy Image at 00600000 ...
+      Image Name:
+      Image Type:   RISC-V Linux Kernel Image (uncompressed)
+      Data Size:    17901204 Bytes = 17.1 MiB
+      Load Address: 00000000
+      Entry Point:  00000000
+      Verifying Checksum ... OK
+   ## Flattened Device Tree blob at 02000000
+      Booting using the fdt blob at 0x2000000
+      Loading Kernel Image ... OK
+      Loading Device Tree to 0000000001efc000, end 0000000001eff7a1 ... OK
+   [    0.000000] OF: fdt: Ignoring memory range 0x0 - 0x200000
+   [    0.000000] Linux version 4.14.0-00046-gf3e439f-dirty (rick@atcsqa06) (gcc version 7.1.1 20170509 (GCC)) #1 Tue Jan 9 16:34:25 CST 2018
+   [    0.000000] bootconsole [early0] enabled
+   [    0.000000] Initial ramdisk at: 0xffffffe000016a98 (12267008 bytes)
+   [    0.000000] Zone ranges:
+   [    0.000000]   DMA      [mem 0x0000000000200000-0x000000007fffffff]
+   [    0.000000]   Normal   empty
+   [    0.000000] Movable zone start for each node
+   [    0.000000] Early memory node ranges
+   [    0.000000]   node   0: [mem 0x0000000000200000-0x000000007fffffff]
+   [    0.000000] Initmem setup node 0 [mem 0x0000000000200000-0x000000007fffffff]
+   [    0.000000] elf_hwcap is 0x112d
+   [    0.000000] random: fast init done
+   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 516615
+   [    0.000000] Kernel command line: console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7
+   [    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
+   [    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)
+   [    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)
+   [    0.000000] Sorting __ex_table...
+   [    0.000000] Memory: 2047832K/2095104K available (1856K kernel code, 204K rwdata, 532K rodata, 12076K init, 756K bss, 47272K reserved, 0K cma-reserved)
+   [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
+   [    0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0
+   [    0.000000] riscv,cpu_intc,0: 64 local interrupts mapped
+   [    0.000000] riscv,plic0,e4000000: mapped 31 interrupts to 1/2 handlers
+   [    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x24e6a1710, max_idle_ns: 440795202120 ns
+   [    0.000000] Calibrating delay loop (skipped), value calculated using timer frequency.. 20.00 BogoMIPS (lpj=40000)
+   [    0.000000] pid_max: default: 32768 minimum: 301
+   [    0.004000] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes)
+   [    0.004000] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes)
+   [    0.056000] devtmpfs: initialized
+   [    0.060000] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
+   [    0.064000] futex hash table entries: 256 (order: 0, 6144 bytes)
+   [    0.068000] NET: Registered protocol family 16
+   [    0.080000] vgaarb: loaded
+   [    0.084000] clocksource: Switched to clocksource riscv_clocksource
+   [    0.088000] NET: Registered protocol family 2
+   [    0.092000] TCP established hash table entries: 16384 (order: 5, 131072 bytes)
+   [    0.096000] TCP bind hash table entries: 16384 (order: 5, 131072 bytes)
+   [    0.096000] TCP: Hash tables configured (established 16384 bind 16384)
+   [    0.100000] UDP hash table entries: 1024 (order: 3, 32768 bytes)
+   [    0.100000] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes)
+   [    0.104000] NET: Registered protocol family 1
+   [    0.616000] Unpacking initramfs...
+   [    1.220000] workingset: timestamp_bits=62 max_order=19 bucket_order=0
+   [    1.244000] io scheduler noop registered
+   [    1.244000] io scheduler cfq registered (default)
+   [    1.244000] io scheduler mq-deadline registered
+   [    1.248000] io scheduler kyber registered
+   [    1.360000] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+   [    1.368000] console [ttyS0] disabled
+   [    1.372000] f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 10, base_baud = 1228800) is a 16550A
+   [    1.392000] console [ttyS0] enabled
+   [    1.392000] ftmac100: Loading version 0.2 ...
+   [    1.396000] ftmac100 e0100000.mac eth0: irq 8, mapped at ffffffd002005000
+   [    1.400000] ftmac100 e0100000.mac eth0: generated random MAC address 6e:ac:c3:92:36:c0
+   [    1.404000] IR NEC protocol handler initialized
+   [    1.404000] IR RC5(x/sz) protocol handler initialized
+   [    1.404000] IR RC6 protocol handler initialized
+   [    1.404000] IR JVC protocol handler initialized
+   [    1.408000] IR Sony protocol handler initialized
+   [    1.408000] IR SANYO protocol handler initialized
+   [    1.408000] IR Sharp protocol handler initialized
+   [    1.408000] IR MCE Keyboard/mouse protocol handler initialized
+   [    1.412000] IR XMP protocol handler initialized
+   [    1.456000] ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ
+   [    1.464000] bootconsole [early0] uses init memory and must be disabled even before the real one is ready
+   [    1.464000] bootconsole [early0] disabled
+   [    1.508000] Freeing unused kernel memory: 12076K
+   [    1.512000] This architecture does not have kernel memory protection.
+   [    1.520000] mmc0: new SD card at address 4567
+   [    1.524000] mmcblk0: mmc0:4567 QEMU! 20.0 MiB
+   [    1.844000]  mmcblk0:
+   Wed Dec  1 10:00:00 CST 2010
+   / #
+
+
+Running U-Boot SPL
+------------------
+The U-Boot SPL will boot in M mode and load the FIT image which include
+OpenSBI and U-Boot proper images. After loading progress, it will jump
+to OpenSBI first and then U-Boot proper which will run in S mode.
+
+
+How to build U-Boot SPL
+-----------------------
+Before building U-Boot SPL, OpenSBI must be build first. OpenSBI can be
+cloned and build for AE350 as below:
+
+.. code-block:: none
+
+        git clone https://github.com/riscv/opensbi.git
+        cd opensbi
+        make PLATFORM=andes/ae350
+
+Copy OpenSBI FW_DYNAMIC image (build/platform/andes/ae350/firmware/fw_dynamic.bin)
+into U-Boot root directory
+
+
+How to build U-Boot SPL booting from RAM
+----------------------------------------
+With ae350_rv[32|64]_spl_defconfigs:
+
+U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode
+and then load FIT image from RAM device on AE350.
+
+
+How to build U-Boot SPL booting from ROM
+----------------------------------------
+With ae350_rv[32|64]_spl_xip_defconfigs:
+
+U-Boot SPL can be burned into SPI flash and run in flash in machine mode
+and then load FIT image from SPI flash or MMC device on AE350.
+
+
+Messages of U-Boot SPL boots Kernel on AE350 board
+--------------------------------------------------
+
+.. code-block:: none
+
+    U-Boot SPL 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800)
+    Trying to boot from RAM
+
+    OpenSBI v0.5-1-gdd8ef28 (Nov 14 2019 11:08:39)
+       ____                    _____ ____ _____
+      / __ \                  / ____|  _ \_   _|
+     | |  | |_ __   ___ _ __ | (___ | |_) || |
+     | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
+     | |__| | |_) |  __/ | | |____) | |_) || |_
+      \____/| .__/ \___|_| |_|_____/|____/_____|
+            | |
+            |_|
+
+    Platform Name          : Andes AE350
+    Platform HART Features : RV64ACIMSUX
+    Platform Max HARTs     : 4
+    Current Hart           : 0
+    Firmware Base          : 0x0
+    Firmware Size          : 84 KB
+    Runtime SBI Version    : 0.2
+
+    PMP0: 0x0000000000000000-0x000000000001ffff (A)
+    PMP1: 0x0000000000000000-0x00000001ffffffff (A,R,W,X)
+
+
+    U-Boot 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800)
+
+    DRAM:  1 GiB
+    Flash: 64 MiB
+    MMC:   mmc@f0e00000: 0
+    Loading Environment from SPI Flash... SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
+    OK
+    In:    serial@f0300000
+    Out:   serial@f0300000
+    Err:   serial@f0300000
+    Net:   no alias for ethernet0
+
+    Warning: mac@e0100000 (eth0) using random MAC address - a2:ae:93:7b:cc:8f
+    eth0: mac@e0100000
+    Hit any key to stop autoboot:  0
+    6455 bytes read in 31 ms (203.1 KiB/s)
+    20421684 bytes read in 8647 ms (2.3 MiB/s)
+    ## Booting kernel from Legacy Image at 00600000 ...
+       Image Name:
+       Image Type:   RISC-V Linux Kernel Image (uncompressed)
+       Data Size:    20421620 Bytes = 19.5 MiB
+       Load Address: 00200000
+       Entry Point:  00200000
+       Verifying Checksum ... OK
+    ## Flattened Device Tree blob at 20000000
+       Booting using the fdt blob at 0x20000000
+       Loading Kernel Image
+       Loading Device Tree to 000000001effb000, end 000000001efff936 ... OK
+
+    Starting kernel ...
+
+    OF: fdt: Ignoring memory range 0x0 - 0x200000
+    Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version 7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT Sat Apr 6 23:41:49 CST 2019
+    bootconsole [early0] enabled
+    Initial ramdisk at: 0x        (ptrval) (13665712 bytes)
+    Zone ranges:
+      DMA32    [mem 0x0000000000200000-0x000000003fffffff]
+      Normal   empty
+    Movable zone start for each node
+    Early memory node ranges
+      node   0: [mem 0x0000000000200000-0x000000003fffffff]
+    Initmem setup node 0 [mem 0x0000000000200000-0x000000003fffffff]
+    software IO TLB [mem 0x3b1f8000-0x3f1f8000] (64MB) mapped at [        (ptrval)-        (ptrval)]
+    elf_platform is rv64i2p0m2p0a2p0c2p0xv5-0p0
+    compatible privileged spec version 1.10
+    percpu: Embedded 16 pages/cpu @        (ptrval) s28184 r8192 d29160 u65536
+    Built 1 zonelists, mobility grouping on.  Total pages: 258055
+    Kernel command line: console=ttyS0,38400n8 debug loglevel=7
+    log_buf_len individual max cpu contribution: 4096 bytes
+    log_buf_len total cpu_extra contributions: 12288 bytes
+    log_buf_len min size: 16384 bytes
+    log_buf_len: 32768 bytes
+    early log buf free: 14608(89%)
+    Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes)
+    Inode-cache hash table entries: 65536 (order: 7, 524288 bytes)
+    Sorting __ex_table...
+    Memory: 944428K/1046528K available (3979K kernel code, 246K rwdata, 1490K rodata, 13523K init, 688K bss, 102100K reserved, 0K cma-reserved)
+    SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
+    Preemptible hierarchical RCU implementation.
+            Tasks RCU enabled.
+    NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0
+    riscv,cpu_intc,0: 64 local interrupts mapped
+    riscv,cpu_intc,1: 64 local interrupts mapped
+    riscv,cpu_intc,2: 64 local interrupts mapped
+    riscv,cpu_intc,3: 64 local interrupts mapped
+    riscv,plic0,e4000000: mapped 71 interrupts to 8/8 handlers
+    clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1bacf917bf, max_idle_ns: 881590412290 ns
+    sched_clock: 64 bits at 60MHz, resolution 16ns, wraps every 4398046511098ns
+    Console: colour dummy device 40x30
+    Calibrating delay loop (skipped), value calculated using timer frequency.. 120.00 BogoMIPS (lpj=600000)
+    pid_max: default: 32768 minimum: 301
+    Mount-cache hash table entries: 2048 (order: 2, 16384 bytes)
+    Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes)
+    Hierarchical SRCU implementation.
+    smp: Bringing up secondary CPUs ...
+    CPU0: online
+    CPU2: online
+    CPU3: online
+    smp: Brought up 1 node, 4 CPUs
+    devtmpfs: initialized
+    random: get_random_u32 called from bucket_table_alloc+0x198/0x1d8 with crng_init=0
+    clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
+    futex hash table entries: 1024 (order: 4, 65536 bytes)
+    NET: Registered protocol family 16
+    Advanced Linux Sound Architecture Driver Initialized.
+    clocksource: Switched to clocksource riscv_clocksource
+    NET: Registered protocol family 2
+    tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes)
+    TCP established hash table entries: 8192 (order: 4, 65536 bytes)
+    TCP bind hash table entries: 8192 (order: 5, 131072 bytes)
+    TCP: Hash tables configured (established 8192 bind 8192)
+    UDP hash table entries: 512 (order: 2, 16384 bytes)
+    UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)
+    NET: Registered protocol family 1
+    RPC: Registered named UNIX socket transport module.
+    RPC: Registered udp transport module.
+    RPC: Registered tcp transport module.
+    RPC: Registered tcp NFSv4.1 backchannel transport module.
+    Unpacking initramfs...
+    workingset: timestamp_bits=62 max_order=18 bucket_order=0
+    NFS: Registering the id_resolver key type
+    Key type id_resolver registered
+    Key type id_legacy registered
+    nfs4filelayout_init: NFSv4 File Layout Driver Registering...
+    io scheduler noop registered
+    io scheduler cfq registered (default)
+    io scheduler mq-deadline registered
+    io scheduler kyber registered
+    Console: switching to colour frame buffer device 40x30
+    Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+    console [ttyS0] disabled
+    f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 20, base_baud = 1228800) is a 16550A
+    console [ttyS0] enabled
+    console [ttyS0] enabled
+    bootconsole [early0] disabled
+    bootconsole [early0] disabled
+    loop: module loaded
+    tun: Universal TUN/TAP device driver, 1.6
+    ftmac100: Loading version 0.2 ...
+    ftmac100 e0100000.mac eth0: irq 21, mapped at         (ptrval)
+    ftmac100 e0100000.mac eth0: generated random MAC address 4e:fd:bd:f3:04:fc
+    ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ
+    mmc0: new SDHC card at address d555
+    ftssp010 card registered!
+    mmcblk0: mmc0:d555 SD04G 3.79 GiB
+    NET: Registered protocol family 10
+     mmcblk0: p1
+    Segment Routing with IPv6
+    sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
+    NET: Registered protocol family 17
+    NET: Registered protocol family 15
+    ALSA device list:
+      #0: ftssp_ac97 controller
+    Freeing unused kernel memory: 13520K
+    This architecture does not have kernel memory protection.
+    Sysinit starting
+    Sat Apr  6 23:33:53 CST 2019
+    nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
+
+    ~ #
diff --git a/doc/board/andestech/index.rst b/doc/board/andestech/index.rst
new file mode 100644
index 00000000000..cacc5791a91
--- /dev/null
+++ b/doc/board/andestech/index.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Andes Tech
+==========
+
+.. toctree::
+   :maxdepth: 2
+
+   adp-ag101p
+   ae350
diff --git a/doc/board/apple/index.rst b/doc/board/apple/index.rst
new file mode 100644
index 00000000000..84468478182
--- /dev/null
+++ b/doc/board/apple/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Apple
+=====
+
+.. toctree::
+   :maxdepth: 2
+
+   m1
diff --git a/doc/board/apple/m1.rst b/doc/board/apple/m1.rst
new file mode 100644
index 00000000000..8fa7637629e
--- /dev/null
+++ b/doc/board/apple/m1.rst
@@ -0,0 +1,83 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for Apple Silicon Macs
+=============================
+
+Allows Apple Silicon Macs to boot U-Boot via the m1n1 bootloader
+developed by the Asahi Linux project.  At this point the machines with
+the following SoCs work:
+
+ - Apple M1 SoC (t8103)
+ - Apple M1 Pro SoC (t6000)
+ - Apple M1 Max SoC (t6001)
+ - Apple M1 Ultra SoC (t6002)
+
+On these SoCs the following hardware is supported:
+
+ - S5L serial port
+ - SPI keyboard (on laptops)
+ - Framebuffer
+ - NVMe storage
+ - USB 3.1 Type-C ports
+
+Device trees are currently provided for the M1 Mac mini (2020, J274),
+M1 MacBook Pro 13" (2020, J293), M1 MacBook Air (2020, J313) and M1
+iMac (2021, J456/J457).
+
+Building U-Boot
+---------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-none-elf-
+    $ make apple_m1_defconfig
+    $ make
+
+This will build ``u-boot-nodtb.bin`` as well as devices trees for some
+of the supported machines.  These device trees can be found in the
+``arch/arm/dts`` subdirectory of your build.
+
+Image creation
+--------------
+
+In order to run U-Boot on an Apple Silicon Mac, U-Boot has to be used
+as a payload for the m1n1 bootloader.  Instructions for building m1n1
+can be found here:
+
+    https://github.com/AsahiLinux/docs/wiki/SW%3Am1n1
+
+.. code-block:: bash
+
+    $ cat m1n1.macho t8103-j274.dtb u-boot-nodtb.bin > u-boot.macho
+
+This uses ``u-boot-nodtb.bin`` as the device tree is passed to U-Boot
+by m1n1 after making some adjustments.
+
+Image installation
+------------------
+
+Instructions on how to install U-Boot on your Mac can be found at:
+
+    https://github.com/AsahiLinux/docs/wiki/Developer-Quickstart
+
+Just replace ``m1n1.macho`` with ``u-boot.macho`` in the instructions.
+
+Debug UART
+----------
+
+Since the base address of the UART is SoC-dependent, the debug UART is
+not enabled by default.  To enable the debug UART the base address
+needs to be adjusted and the CONFIG_DEBUG_UART option needs to be
+enabled.  The table below gives the correct base address for the
+supported SoCs.
+
+.. list-table::
+   :widths: 32 16
+   :header-rows: 1
+
+   * - SoC
+     - Base Address
+   * - M1 (t8103)
+     - 0x235200000
+   * - M1 Pro/Max/Ultra (t6000/t6001/t6002)
+     - 0x39b200000
diff --git a/doc/board/armltd/index.rst b/doc/board/armltd/index.rst
new file mode 100644
index 00000000000..052a9698f40
--- /dev/null
+++ b/doc/board/armltd/index.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+Arm Ltd
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   juno
+   vexpress64.rst
diff --git a/doc/board/armltd/juno.rst b/doc/board/armltd/juno.rst
new file mode 100644
index 00000000000..761c037f92b
--- /dev/null
+++ b/doc/board/armltd/juno.rst
@@ -0,0 +1,114 @@
+.. SPDX-License-Identifier: GPL-2.0
+.. Copyright (C) 2021 Arm Ltd.
+
+Arm Juno development platform
+=============================
+
+The `Juno development board`_ is an open, vendor-neutral, Armv8-A development
+platform, made by Arm Ltd. It is part of the Versatile Express family.
+There are three revisions of the board:
+
+* Juno r0, with two Cortex-A57 and four Cortex-A53 cores, without PCIe.
+* Juno r1, with two Cortex-A57 and four Cortex-A53 cores, in later silicon
+  revisions, and with PCIe slots, Gigabit Ethernet and two SATA ports.
+* Juno r2, with two Cortex-A72 and four Cortex-A53 cores, otherwise the
+  same as r1.
+
+Among other things, the motherboard contains a management controller (MCC),
+an FPGA providing I/O interfaces (IOFPGA) and 64MB of NOR flash. The provided
+platform devices resemble the VExpress peripherals.
+The actual SoC also contains a Cortex-M3 based System Control Processor (SCP).
+The `V2M-Juno TRM`_ contains more technical details.
+
+U-Boot build
+------------
+There is only one defconfig and one binary build that covers all three board
+revisions, so to generate the needed ``u-boot.bin``:
+
+.. code-block:: bash
+
+    $ make vexpress_aemv8a_juno_defconfig
+    $ make
+
+The automatic distro boot sequence looks for UEFI boot applications and
+``boot.scr`` scripts on various boot media, starting with USB, then on disks
+connected to the two SATA ports, PXE, DHCP and eventually on the NOR flash.
+
+U-Boot installation
+-------------------
+This assumes there is some firmware on the SD card or NOR flash (see below
+for more details). The U-Boot binary is included in the Trusted Firmware
+FIP image, so after building U-Boot, this needs to be repackaged or recompiled.
+
+The NOR flash will be updated by the MCC, based on the content of a micro-SD
+card, which is exported as a USB mass storage device via the rear USB-B
+socket. So to access that SD card, connect a cable to some host computer, and
+mount the FAT16 partition of the UMS device.
+If there is no device, check the upper serial port for a prompt, and
+explicitly enable the USB interface::
+
+    Cmd> usb_on
+    Enabling debug USB...
+
+Repackaging an existing FIP image
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+To prevent problems, it is probably a good idea to backup the existing firmware,
+for instance by just copying the entire ``SOFTWARE/`` directory, or at least
+the current ``fip.bin``, beforehand.
+
+To just replace the BL33 image in the exising FIP image, you can use
+`fiptool`_ from the Trusted Firmware repository, on the image file:
+
+.. code-block:: bash
+
+    git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+    cd trusted-firmware-a
+    make fiptool
+    tools/fiptool/fiptool update --nt-fw=/path/to/your/u-boot.bin /mnt/juno/SOFTWARE/fip.bin
+
+Unmount the USB mass storage device and reboot the board, the new ``fip.bin``
+will be automatically written to the NOR flash and then used.
+
+Rebuilding Trusted Firmware
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+You can also generate a new FIP image by compiling Arm Trusted Firmware,
+and providing ``u-boot.bin`` as the BL33 file. For that you can either build
+the required `SCP firmware`_ yourself, or just extract the existing
+version from your ``fip.bin``, using `fiptool`_ (see above):
+
+.. code-block:: bash
+
+    mkdir /tmp/juno; cd /tmp/juno
+    fiptool unpack /mnt/juno/SOFTWARE/fip.bin
+
+Then build TF-A:
+
+.. code-block:: bash
+
+    git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+    cd trusted-firmware-a
+    make CROSS_COMPILE=aarch64-linux-gnu- PLAT=juno DEBUG=1 \
+    SCP_BL2=/tmp/juno/scp-fw.bin BL33=/path/to/your/u-boot.bin fiptool all fip
+    cp build/juno/debug/bl1.bin build/juno/debug/fip.bin /mnt/juno/SOFTWARE
+
+Then umount the USB device, and reboot, as above.
+
+Device trees
+------------
+The device tree files for the boards are maintained in the Linux kernel
+repository. They end up in the ``SOFTWARE/`` directory of the SD card, as
+``juno.dtb``, ``juno-r1.dtb``, and ``juno-r2.dtb``, respectively. The MCC
+firmware will look into the images.txt file matching the board revision, from
+the ``SITE1/`` directory. Each version there will reference its respective DTB
+file in ``SOFTWARE/``, and so the correct version will end in the NOR flash, in
+the ``board.dtb`` partition. U-Boot picks its control DTB from there, you can
+pass this on to a kernel using ``$fdtcontroladdr``.
+
+You can update the DTBs anytime, by building them using the ``dtbs`` make
+target from a Linux kernel tree, then just copying the generated binaries
+to the ``SOFTWARE/`` directory of the SD card.
+
+.. _`Juno development board`: https://developer.arm.com/tools-and-software/development-boards/juno-development-board
+.. _`V2M-Juno TRM`: https://developer.arm.com/documentation/100113/latest
+.. _`fiptool`: https://github.com/ARM-software/arm-trusted-firmware/tree/master/tools/fiptool
+.. _`SCP firmware`: https://github.com/ARM-software/SCP-firmware.git
diff --git a/doc/board/armltd/vexpress64.rst b/doc/board/armltd/vexpress64.rst
new file mode 100644
index 00000000000..a7f771d2667
--- /dev/null
+++ b/doc/board/armltd/vexpress64.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+Arm Versatile Express
+=====================
+
+The vexpress_* board configuration supports the following platforms:
+
+ * FVP_Base_RevC-2xAEMvA
+ * FVP_BaseR_AEMv8R
+ * Juno development board
+
+Fixed Virtual Platforms
+-----------------------
+
+The Fixed Virtual Platforms (FVP) are complete simulations of an Arm system,
+including processor, memory and peripherals. They are set out in a "programmer's
+view", which gives a comprehensive model on which to build and test software.
+
+The supported FVPs are available free of charge and can be downloaded from the
+Arm developer site [1]_ (user registration might be required).
+
+Supported features:
+
+ * GICv3
+ * Generic timer
+ * PL011 UART
+
+The default configuration assumes that U-Boot is bootstrapped using a suitable
+bootloader, such as Trusted Firmware-A [4]_. The u-boot binary can be passed
+into the TF-A build: ``make PLAT=<platform> all fip BL33=u-boot.bin``
+
+The FVPs can be debugged using Arm Development Studio [2]_.
+
+Juno
+----
+
+Juno is an Arm development board with the following features:
+
+ * Arm Cortex-A72/A57 and Arm Cortex-A53 in a "big.LITTLE" configuration
+ * A PCIe Gen2.0 bus with 4 lanes
+ * 8GB of DRAM
+ * GICv2
+
+More details can be found in the board documentation [3]_.
+
+References
+----------
+
+.. [1] https://developer.arm.com/tools-and-software/simulation-models/fixed-virtual-platforms
+.. [2] https://developer.arm.com/tools-and-software/embedded/arm-development-studio
+.. [3] https://developer.arm.com/tools-and-software/development-boards/juno-development-board
+.. [4] https://trustedfirmware-a.readthedocs.io/
\ No newline at end of file
diff --git a/doc/board/asus/grouper_common.rst b/doc/board/asus/grouper_common.rst
new file mode 100644
index 00000000000..47a854e9163
--- /dev/null
+++ b/doc/board/asus/grouper_common.rst
@@ -0,0 +1,132 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the ASUS/Google Nexus 7 (2012)
+=========================================
+
+``DISCLAMER!`` Moving your ASUS/Google Nexus 7 (2012) to use U-Boot assumes
+replacement of the vendor ASUS bootloader. Vendor android firmwares will no
+longer be able to run on the device. This replacement IS reversible.
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Process U-Boot
+- Flashing U-Boot into the eMMC
+- Boot
+- Self Upgrading
+
+Build U-Boot
+------------
+
+Device support is implemented by applying config fragment to a generic board
+defconfig. Valid fragments are ``tilapia.config``, ``grouper_E1565.config``
+and ``grouper_PM269.config``.
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ make grouper_common_defconfig grouper_E1565.config # For maxim based grouper
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
+image, ready for further processing.
+
+Process U-Boot
+--------------
+
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
+in re-crypt repo issues. NOT HERE!
+
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update. You need to know your
+tablet's individual SBK to continue.
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
+
+.. code-block:: bash
+
+    $ git clone https://gitlab.com/grate-driver/re-crypt.git
+    $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+    $ ./re-crypt.py --dev grouper --sbk <your sbk>
+
+where SBK has next form ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX``
+
+The script will produce a ``repart-block.bin`` ready to flash.
+
+Processing for pre-loaded U-Boot
+********************************
+
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
+
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
+
+.. code-block:: bash
+
+    $ wheelie --blob blob.bin
+    $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
+
+When flashing is done, reboot the device.
+
+Flashing with a pre-loaded U-Boot
+*********************************
+
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+    $ fastboot flash 0.1 bct.img
+    $ fastboot flash 0.2 ebt.img
+    $ fastboot reboot
+
+Device will reboot.
+
+Boot
+----
+
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on eMMC. Additionally,
+if the Volume Down button is pressed while booting, the device will enter
+bootmenu. Bootmenu contains entries to mount eMMC as mass storage, fastboot,
+reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check
+the next chapter).
+
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
+
+Self Upgrading
+--------------
+
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the eMMC (using
+ability of u-boot to mount it). Enter bootmenu, choose update bootloader option
+with Power button and U-Boot should update itself. Once the process is
+completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/asus/index.rst b/doc/board/asus/index.rst
new file mode 100644
index 00000000000..2b103287905
--- /dev/null
+++ b/doc/board/asus/index.rst
@@ -0,0 +1,11 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+ASUS
+====
+
+.. toctree::
+   :maxdepth: 2
+
+   grouper_common
+   transformer_t20
+   transformer_t30
diff --git a/doc/board/asus/transformer_t20.rst b/doc/board/asus/transformer_t20.rst
new file mode 100644
index 00000000000..d4bc12d1619
--- /dev/null
+++ b/doc/board/asus/transformer_t20.rst
@@ -0,0 +1,129 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the ASUS Eee Pad Transformer device family
+=====================================================
+
+``DISCLAMER!`` Moving your ASUS Eee Pad Transformer/Slider to use U-Boot
+assumes replacement of the vendor ASUS bootloader. Vendor Android firmwares
+will no longer be able to run on the device. This replacement IS reversible.
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Process U-Boot
+- Flashing U-Boot into the eMMC
+- Boot
+- Self Upgrading
+
+Build U-Boot
+------------
+
+Device support is implemented by applying config fragment to a generic board
+defconfig. Valid fragments are ``tf101.config``, ``tf101g.config`` and
+``sl101.config``.
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ make transformer_t20_defconfig tf101.config # For TF101
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
+image, ready for further processing.
+
+Process U-Boot
+--------------
+
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
+in re-crypt repo issues. NOT HERE!
+
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update.
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
+
+.. code-block:: bash
+
+    $ git clone https://gitlab.com/grate-driver/re-crypt.git
+    $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+    $ ./re-crypt.py --dev tf101
+
+The script will produce a ``repart-block.bin`` ready to flash.
+
+Processing for pre-loaded U-Boot
+********************************
+
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
+
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
+
+.. code-block:: bash
+
+    $ wheelie --blob blob.bin
+    $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
+
+When flashing is done, reboot the device.
+
+Flashing with a pre-loaded U-Boot
+*********************************
+
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+    $ fastboot flash 0.1 bct.img
+    $ fastboot flash 0.2 ebt.img
+    $ fastboot reboot
+
+Device will reboot.
+
+Boot
+----
+
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
+eMMC. Additionally, if the Volume Down button is pressed while booting, the
+device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
+as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console
+and update bootloader (check the next chapter).
+
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
+
+Self Upgrading
+--------------
+
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the MicroSD card
+and insert it into the tablet. Enter bootmenu, choose update the bootloader
+option with the Power button and U-Boot should update itself. Once the process
+is completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/asus/transformer_t30.rst b/doc/board/asus/transformer_t30.rst
new file mode 100644
index 00000000000..ff9792dc0fc
--- /dev/null
+++ b/doc/board/asus/transformer_t30.rst
@@ -0,0 +1,155 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the ASUS Transformer device family
+=============================================
+
+``DISCLAMER!`` Moving your ASUS Transformer to use U-Boot assumes replacement
+of the vendor ASUS bootloader. Vendor Android firmwares will no longer be
+able to run on the device. This replacement IS reversible.
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Process U-Boot
+- Flashing U-Boot into the eMMC
+- Flashing U-Boot into the SPI flash
+- Boot
+- Self Upgrading
+
+Build U-Boot
+------------
+
+Device support is implemented by applying a config fragment to a generic board
+defconfig. Valid fragments are ``tf201.config``, ``tf300t.config``,
+``tf300tg.config``, ``tf300tl.config``, ``tf700t.config``, ``tf600t.config`` and
+``p1801-t.config``.
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ make transformer_t30_defconfig tf201.config # For TF201
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
+image, ready for further processing.
+
+Process U-Boot
+--------------
+
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
+in re-crypt repo issues. NOT HERE!
+
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update. You need to know your
+tablet's individual SBK to continue.
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
+
+.. code-block:: bash
+
+    $ git clone https://gitlab.com/grate-driver/re-crypt.git
+    $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+    $ ./re-crypt.py --dev tf201 --sbk <your sbk>
+
+where SBK has next form ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX`` ``0xXXXXXXXX``
+
+The script will produce a ``repart-block.bin`` ready to flash.
+
+Processing for pre-loaded U-Boot
+********************************
+
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
+
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
+
+.. code-block:: bash
+
+    $ wheelie --blob blob.bin
+    $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
+
+When flashing is done, reboot the device.
+
+Flashing with a pre-loaded U-Boot
+*********************************
+
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+    $ fastboot flash 0.1 bct.img
+    $ fastboot flash 0.2 ebt.img
+    $ fastboot reboot
+
+Device will reboot.
+
+Flashing U-Boot into the SPI Flash
+----------------------------------
+
+Some of Transformers use a separate 4 MB SPI flash, which contains all data
+required for boot. It is flashed from within U-Boot itself, preloaded into RAM
+using Fusée Gelée.
+
+After creating your ``repart-block.bin`` you have to place it on a 1st partition
+of microSD card formated in fat. Then insert this microSD card into your tablet
+and boot it using Fusée Gelée and U-Boot, which was included into
+``repart-block.bin``, while booting you must hold the ``volume down`` button.
+
+The process should take less than a minute, if everything goes correctly,
+on microSD will appear ``spi-flash-backup.bin`` file, which is the dump of your
+SPI Flash content and can be used to restore UEFI, do not lose it, tablet will
+power itself off.
+
+Self-updating of U-Boot is performed by placing ``u-boot-dtb-tegra.bin`` on 1st
+partition of microSD, inserting it into the tablet and booting with a pressed
+``volume down`` button.
+
+Boot
+----
+
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
+eMMC. Additionally, if the Volume Down button is pressed while booting, the
+device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
+as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console
+and update bootloader (check the next chapter).
+
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
+
+Self Upgrading
+--------------
+
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the MicroSD card
+and insert it into the tablet. Enter bootmenu, choose update the bootloader
+option with the Power button and U-Boot should update itself. Once the process
+is completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/atmel/at91ek.rst b/doc/board/atmel/at91ek.rst
new file mode 100644
index 00000000000..6185b1dfb28
--- /dev/null
+++ b/doc/board/atmel/at91ek.rst
@@ -0,0 +1,192 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+AT91 Evaluation kits
+====================
+
+Board mapping & boot media
+--------------------------
+
+AT91SAM9260EK, AT91SAM9G20EK & AT91SAM9XEEK
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Memory map::
+
+	0x20000000 - 23FFFFFF	SDRAM (64 MB)
+	0xC0000000 - Cxxxxxxx	Atmel Dataflash card (J13)
+	0xD0000000 - D07FFFFF	Soldered Atmel Dataflash (AT45DB642)
+
+Environment variables
+
+U-Boot environment variables can be stored at different places:
+
+	- Dataflash on SPI chip select 1 (default)
+	- Dataflash on SPI chip select 0 (dataflash card)
+	- Nand flash
+
+You can choose your storage location at config step (here for at91sam9260ek)::
+
+	make at91sam9260ek_nandflash_config	- use nand flash
+	make at91sam9260ek_dataflash_cs0_config	- use data flash (spi cs0)
+	make at91sam9260ek_dataflash_cs1_config	- use data flash (spi cs1)
+
+
+AT91SAM9261EK, AT91SAM9G10EK
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Memory map::
+
+	0x20000000 - 23FFFFFF	SDRAM (64 MB)
+	0xC0000000 - C07FFFFF	Soldered Atmel Dataflash (AT45DB642)
+	0xD0000000 - Dxxxxxxx	Atmel Dataflash card (J22)
+
+Environment variables
+
+U-Boot environment variables can be stored at different places:
+
+	- Dataflash on SPI chip select 0 (default)
+	- Dataflash on SPI chip select 3 (dataflash card)
+	- Nand flash
+
+You can choose your storage location at config step (here for at91sam9260ek)::
+
+	make at91sam9261ek_nandflash_config	- use nand flash
+	make at91sam9261ek_dataflash_cs0_config	- use data flash (spi cs0)
+	make at91sam9261ek_dataflash_cs3_config	- use data flash (spi cs3)
+
+
+AT91SAM9263EK
+^^^^^^^^^^^^^
+
+Memory map::
+
+	0x20000000 - 23FFFFFF	SDRAM (64 MB)
+	0xC0000000 - Cxxxxxxx	Atmel Dataflash card (J9)
+
+Environment variables
+
+U-Boot environment variables can be stored at different places:
+
+	- Dataflash on SPI chip select 0 (dataflash card)
+	- Nand flash
+	- Nor flash (not populate by default)
+
+You can choose your storage location at config step (here for at91sam9260ek)::
+
+	make at91sam9263ek_nandflash_config	- use nand flash
+	make at91sam9263ek_dataflash_cs0_config	- use data flash (spi cs0)
+	make at91sam9263ek_norflash_config	- use nor flash
+
+You can choose to boot directly from U-Boot at config step::
+
+	make at91sam9263ek_norflash_boot_config	- boot from nor flash
+
+
+AT91SAM9M10G45EK
+^^^^^^^^^^^^^^^^
+
+Memory map::
+
+	0x70000000 - 77FFFFFF	SDRAM (128 MB)
+
+Environment variables
+
+U-Boot environment variables can be stored at different places:
+
+	- Nand flash
+
+You can choose your storage location at config step (here for at91sam9m10g45ek)::
+
+	make at91sam9m10g45ek_nandflash_config		- use nand flash
+
+
+AT91SAM9RLEK
+^^^^^^^^^^^^
+
+Memory map::
+
+	0x20000000 - 23FFFFFF	SDRAM (64 MB)
+	0xC0000000 - C07FFFFF   Soldered Atmel Dataflash (AT45DB642)
+
+Environment variables
+
+U-Boot environment variables can be stored at different places:
+
+	- Dataflash on SPI chip select 0
+	- Nand flash.
+
+You can choose your storage location at config step (here for at91sam9rlek)::
+
+	make at91sam9rlek_nandflash_config	- use nand flash
+
+
+AT91SAM9N12EK, AT91SAM9X5EK
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Memory map::
+
+	0x20000000 - 27FFFFFF	SDRAM (128 MB)
+
+Environment variables
+
+U-Boot environment variables can be stored at different places:
+
+	- Nand flash
+	- SD/MMC card
+	- Serialflash/Dataflash on SPI chip select 0
+
+You can choose your storage location at config step (here for at91sam9x5ek)::
+
+	make at91sam9x5ek_dataflash_config	- use data flash
+	make at91sam9x5ek_mmc_config		- use sd/mmc card
+	make at91sam9x5ek_nandflash_config	- use nand flash
+	make at91sam9x5ek_spiflash_config	- use serial flash
+
+
+SAMA5D3XEK
+^^^^^^^^^^
+
+Memory map::
+
+	0x20000000 - 3FFFFFFF	SDRAM (512 MB)
+
+Environment variables
+
+U-Boot environment variables can be stored at different places:
+
+	- Nand flash
+	- SD/MMC card
+	- Serialflash on SPI chip select 0
+
+You can choose your storage location at config step (here for sama5d3xek)::
+
+	make sama5d3xek_mmc_config		- use SD/MMC card
+	make sama5d3xek_nandflash_config	- use nand flash
+	make sama5d3xek_serialflash_config	- use serial flash
+
+
+NAND partition table
+--------------------
+
+All the board support boot from NAND flash will use the following NAND
+partition table::
+
+	0x00000000 - 0x0003FFFF	bootstrap	(256 KiB)
+	0x00040000 - 0x000BFFFF u-boot		(512 KiB)
+	0x000C0000 - 0x000FFFFF env		(256 KiB)
+	0x00100000 - 0x0013FFFF env_redundant	(256 KiB)
+	0x00140000 - 0x0017FFFF spare		(256 KiB)
+	0x00180000 - 0x001FFFFF dtb		(512 KiB)
+	0x00200000 - 0x007FFFFF kernel		(6 MiB)
+	0x00800000 - 0xxxxxxxxx rootfs		(All left)
+
+
+Watchdog support
+----------------
+
+For security reasons, the at91 watchdog is running at boot time and,
+if deactivated, cannot be used anymore.
+If you want to use the watchdog, you will need to keep it running in
+your code (make sure not to disable it in AT91Bootstrap for instance).
+
+In the U-Boot configuration, the AT91 watchdog support is enabled using
+the CONFIG_WDT and CONFIG_WDT_AT91 options.
diff --git a/doc/board/atmel/index.rst b/doc/board/atmel/index.rst
new file mode 100644
index 00000000000..8ba00fc2275
--- /dev/null
+++ b/doc/board/atmel/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Atmel
+=====
+
+.. toctree::
+   :maxdepth: 2
+
+   at91ek
diff --git a/doc/board/beacon/beacon-imx8mm.rst b/doc/board/beacon/beacon-imx8mm.rst
new file mode 100644
index 00000000000..8bf983bff77
--- /dev/null
+++ b/doc/board/beacon/beacon-imx8mm.rst
@@ -0,0 +1,55 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the Beacon EmbeddedWorks i.MX8M Mini Devkit
+======================================================
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get DDR firmware
+- Build U-Boot
+- Burn U-Boot to microSD Card
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/nxp-imx/imx-atf.git -b v2.6
+    $ make PLAT=imx8mm bl31 CROSS_COMPILE=aarch64-linux-gnu-
+    $ cp build/imx8mm/release/bl31.bin ../
+
+Get the DDR firmware
+--------------------
+
+.. code-block:: bash
+
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.15.bin
+    $ chmod +x firmware-imx-8.15.bin
+    $ ./firmware-imx-8.15
+    $ cp firmware-imx-8.15/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ make imx8mm_beacon_defconfig
+    $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+Burn U-Boot to microSD Card
+---------------------------
+
+.. code-block:: bash
+
+    $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33
+
+Boot
+----
+
+Set baseboard DIP switches for micoSD Card:
+- S11 (1:8) 01101000
+- S10 (1:8) 11001000
+- S17 (1:8) 0110xxxx
diff --git a/doc/board/beacon/beacon-imx8mn.rst b/doc/board/beacon/beacon-imx8mn.rst
new file mode 100644
index 00000000000..bb4a86369bb
--- /dev/null
+++ b/doc/board/beacon/beacon-imx8mn.rst
@@ -0,0 +1,53 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the Beacon EmbeddedWorks i.MX8M Nano Devkit
+======================================================
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get DDR firmware
+- Build U-Boot
+- Burn U-Boot to microSD Card
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/nxp-imx/imx-atf.git -b v2.6
+    $ make PLAT=imx8mn bl31 CROSS_COMPILE=aarch64-linux-gnu-
+    $ cp build/imx8mn/release/bl31.bin ../
+
+Get the DDR firmware
+--------------------
+
+.. code-block:: bash
+
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.15.bin
+    $ chmod +x firmware-imx-8.15.bin
+    $ ./firmware-imx-8.15
+    $ cp firmware-imx-8.15/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ make imx8mn_beacon_defconfig
+    $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+Burn U-Boot to microSD Card
+---------------------------
+
+.. code-block:: bash
+
+    $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32
+
+Boot
+----
+
+Set baseboard DIP switches for micoSD Card:
+S17 (1:8): 1100xxxx
diff --git a/doc/board/beacon/beacon-imx8mp.rst b/doc/board/beacon/beacon-imx8mp.rst
new file mode 100644
index 00000000000..375931c07d1
--- /dev/null
+++ b/doc/board/beacon/beacon-imx8mp.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the Beacon EmbeddedWorks i.MX8M Plus Devkit
+======================================================
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get DDR firmware
+- Build U-Boot
+- Burn U-Noot to microSD Card
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+    $ git clone https://github.com/nxp-imx/imx-atf.git -b v2.6
+    $ make PLAT=imx8mp bl31 CROSS_COMPILE=aarch64-linux-gnu-
+    $ cp build/imx8mn/release/bl31.bin ../
+
+Get the DDR firmware
+--------------------
+
+.. code-block:: bash
+
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.15.bin
+    $ chmod +x firmware-imx-8.15.bin
+    $ ./firmware-imx-8.15
+    $ cp firmware-imx-8.15/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ make imx8mp_beacon_defconfig
+    $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+Burn U-Boot to microSD Card
+---------------------------
+
+.. code-block:: bash
+
+    $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32
+
+Boot
+----
+Set baseboard DIP switch:
+S17: 1100XXXX
diff --git a/doc/board/beacon/index.rst b/doc/board/beacon/index.rst
new file mode 100644
index 00000000000..bf62b09fbad
--- /dev/null
+++ b/doc/board/beacon/index.rst
@@ -0,0 +1,11 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Beacon
+======
+
+.. toctree::
+   :maxdepth: 2
+
+   beacon-imx8mp
+   beacon-imx8mm
+   beacon-imx8mn
diff --git a/doc/board/beagle/am62x_beagleplay.rst b/doc/board/beagle/am62x_beagleplay.rst
new file mode 100644
index 00000000000..01f04beb55a
--- /dev/null
+++ b/doc/board/beagle/am62x_beagleplay.rst
@@ -0,0 +1,333 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Nishanth Menon <nm@ti.com>
+
+AM62x Beagleboard.org Beagleplay
+================================
+
+Introduction:
+-------------
+
+BeagleBoard.org BeaglePlay is an easy to use, affordable open source
+hardware single board computer based on the Texas Instruments AM625
+SoC that allows you to create connected devices that work even at long
+distances using IEEE 802.15.4g LR-WPAN and IEEE 802.3cg 10Base-T1L.
+Expansion is provided over open standards based mikroBUS, Grove and
+QWIIC headers among other interfaces.
+
+Further information can be found at:
+
+* Product Page: https://beagleplay.org/
+* Hardware documentation: https://git.beagleboard.org/beagleplay/beagleplay
+
+Boot Flow:
+----------
+Below is the pictorial representation of boot flow:
+
+.. image:: ../ti/img/boot_diagram_k3_current.svg
+  :alt: Boot flow diagram
+
+- On this platform, 'TI Foundational Security' (TIFS) functions as the
+  security enclave master while 'Device Manager' (DM), also known as the
+  'TISCI server' in "TI terminology", offers all the essential services.
+  The A53 or M4F (Aux core) sends requests to TIFS/DM to accomplish these
+  services, as illustrated in the diagram above.
+
+Sources:
+--------
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. prompt:: bash $
+
+  export UBOOT_CFG_CORTEXR=am62x_beagleplay_r5_defconfig
+  export UBOOT_CFG_CORTEXA=am62x_beagleplay_a53_defconfig
+  export TFA_BOARD=lite
+  # we dont use any extra TFA parameters
+  unset TFA_EXTRA_ARGS
+  export OPTEE_PLATFORM=k3-am62x
+  export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+
+.. include::  ../ti/am62x_sk.rst
+    :start-after: .. am62x_evm_rst_include_start_build_steps
+    :end-before: .. am62x_evm_rst_include_end_build_steps
+
+Target Images
+-------------
+Copy these images to an SD card and boot:
+
+* tiboot3.bin from Cortex-R5 build.
+* tispl.bin and u-boot.img from Cortex-A build
+
+Image formats
+-------------
+
+- tiboot3.bin
+
+.. image:: ../ti/img/multi_cert_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: ../ti/img/dm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+Additional hardware for U-Boot development
+------------------------------------------
+
+* Serial Console is critical for U-Boot development on BeaglePlay. See
+  `BeaglePlay serial console documentation
+  <https://docs.beagleboard.org/latest/boards/beagleplay/demos-and-tutorials/using-serial-console.html>`_.
+* uSD is preferred option over eMMC, and a SD/MMC reader will be needed.
+* (optionally) JTAG is useful when working with very early stages of boot.
+
+Default storage options
+-----------------------
+
+There are multiple storage media options on BeaglePlay, but primarily:
+
+* Onboard eMMC (default) - reliable, fast and meant for deployment use.
+* SD/MMC card interface (hold 'USR' switch and power on) - Entirely
+  depends on the SD card quality.
+
+Flash to uSD card or how to deal with "bricked" Board
+-----------------------------------------------------
+
+When deploying or working on Linux, it's common to use the onboard
+eMMC. However, avoiding the eMMC and using the uSD card is safer when
+working with U-Boot.
+
+If you choose to  hand format your own bootable uSD card, be
+aware that it can be difficult. The following information
+may be helpful, but remember that it is only sometimes
+reliable, and partition options can cause issues. These
+can potentially help:
+
+* https://git.ti.com/cgit/arago-project/tisdk-setup-scripts/tree/create-sdcard.sh
+* https://elinux.org/Beagleboard:Expanding_File_System_Partition_On_A_microSD
+
+The simplest option is to start with a standard distribution
+image like those in `BeagleBoard.org Distros Page
+<https://www.beagleboard.org/distros>`_ and download a disk image for
+BeaglePlay. Pick a 16GB+ uSD card to be on the safer side.
+
+With an SD/MMC Card reader and `Balena Etcher
+<https://etcher.balena.io/>`_, having a functional setup in minutes is
+a trivial matter, and it works on almost all Host Operating Systems.
+Yes Windows users, Windows Subsystem for Linux(WSL) based development
+with U-Boot and update uSD card is practical.
+
+Updating U-Boot is a matter of copying the tiboot3.bin, tispl.bin and
+u-boot.img to the "BOOT" partition of the uSD card. Remember to sync
+and unmount (or Eject - depending on the Operating System) the uSD
+card prior to physically removing from SD card reader.
+
+Also see following section on switch setting used for booting using
+uSD card.
+
+.. note::
+  Great news! If the board has not been damaged physically, there's no
+  need to worry about it being "bricked" on this platform. You only have
+  to flash an uSD card, plug it in, and reinstall the image on eMMC. This
+  means that even if you make a mistake, you can quickly fix it and rest
+  easy.
+
+  If you are frequently working with uSD cards, you might find the
+  following useful:
+
+  * `USB-SD-Mux <https://www.linux-automation.com/en/products/usb-sd-mux.html>`_
+  * `SD-Wire <https://wiki.tizen.org/SDWire>`_
+
+Flash to eMMC
+-------------
+
+The eMMC layout selected is user-friendly for developers. The
+boot hardware partition of the eMMC only contains the fixed-size
+tiboot3.bin image. This is because the contents of the boot partitions
+need to run from the SoC's internal SRAM, which remains a fixed size
+constant. The other components of the boot sequence, such as tispl.bin
+and u-boot.img, are located in the /BOOT partition in the User Defined
+Area (UDA) hardware partition of the eMMC. These components can vary
+significantly in size. The choice of keeping tiboot3.bin in boot0 or
+boot1 partition depends on A/B update requirements.
+
+.. image:: img/beagleplay_emmc.svg
+  :alt: eMMC partitions and boot file organization for BeaglePlay
+
+The following are the steps from Linux shell to program eMMC:
+
+.. prompt:: bash #
+
+  # Enable Boot0 boot
+  mmc bootpart enable 1 2 /dev/mmcblk0
+  mmc bootbus set single_backward x1 x8 /dev/mmcblk0
+  mmc hwreset enable /dev/mmcblk0
+
+  # Clear eMMC boot0
+  echo '0' >> /sys/class/block/mmcblk0boot0/force_ro
+  dd if=/dev/zero of=/dev/mmcblk0boot0 count=32 bs=128k
+  # Write tiboot3.bin
+  dd if=tiboot3.bin of=/dev/mmcblk0boot0 bs=128k
+
+  # Copy the rest of the boot binaries
+  mount /dev/mmcblk0p1 /boot/firmware
+  cp tispl.bin /boot/firmware
+  cp u-boot.img /boot/firmware
+  sync
+
+.. warning ::
+
+  U-Boot is configured to prioritize booting from an SD card if it
+  detects a valid boot partition and boot files on it, even if the
+  system initially booted from eMMC. The boot order is set as follows:
+
+  * SD/MMC
+  * eMMC
+  * USB
+  * PXE
+
+LED patterns during boot
+------------------------
+
+.. list-table:: USR LED status indication
+   :widths: 16 16
+   :header-rows: 1
+
+   * - USR LEDs (012345)
+     - Indicates
+
+   * - 00000
+     - Boot failure or R5 image not started up
+
+   * - 11111
+     - A53 SPL/U-boot has started up
+
+   * - 10101
+     - OS boot process has been initiated
+
+   * - 01010
+     - OS boot process failed and drops to U-Boot shell
+
+.. note ::
+
+  In the table above, 0 indicates LED switched off and 1 indicates LED
+  switched ON.
+
+.. warning ::
+
+  If the "red" power LED is not glowing, the system power supply is not
+  functional. Please refer to `BeaglePlay documentation
+  <https://beagleplay.org/>`_ for further information.
+
+A53 SPL DDR Memory Layout
+-------------------------
+
+.. include::  ../ti/am62x_sk.rst
+    :start-after: .. am62x_evm_rst_include_start_ddr_mem_layout
+    :end-before: .. am62x_evm_rst_include_end_ddr_mem_layout
+
+Switch Setting for Boot Mode
+----------------------------
+
+The boot time option is configured via "USR" button on the board.
+See `Beagleplay Schematics <https://git.beagleboard.org/beagleplay/beagleplay/-/blob/main/BeaglePlay_sch.pdf>`_
+for details.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - USR Switch Position
+     - Primary Boot
+     - Secondary Boot
+
+   * - Not Pressed
+     - eMMC
+     - UART
+
+   * - Pressed
+     - SD/MMC File System (FS) mode
+     - USB Device Firmware Upgrade (DFU) mode
+
+To switch to SD card boot mode, hold the USR button while powering on
+with a USB type C power supply, then release when power LED lights up.
+
+DFU based boot
+--------------
+
+To boot the board over DFU, ensure there is no SD card inserted with a
+bootloader. Hold the USR switch while plugging into the type C to boot into DFU
+mode. After power-on the build artifacts needs to be uploaded one by one with a
+tool like dfu-util.
+
+.. include::  ../ti/am62x_sk.rst
+    :start-after: .. am62x_evm_rst_include_start_dfu_boot
+    :end-before: .. am62x_evm_rst_include_end_dfu_boot
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup and debugging information.
+
+.. warning::
+
+  **OpenOCD support since**: v0.12.0
+
+  If the default package version of OpenOCD in your development
+  environment's distribution needs to be updated, it might be necessary to
+  build OpenOCD from the source.
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_tag_connect
+    :end-before: .. k3_rst_include_end_openocd_connect_tag_connect
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_openocd_cfg_external_intro
+    :end-before: .. k3_rst_include_end_openocd_cfg_external_intro
+
+For example, with BeaglePlay (AM62X platform), the openocd_connect.cfg:
+
+.. code-block:: tcl
+
+  # TUMPA example:
+  # http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User's_Manual
+  source [find interface/ftdi/tumpa.cfg]
+
+  transport select jtag
+
+  # default JTAG configuration has only SRST and no TRST
+  reset_config srst_only srst_push_pull
+
+  # delay after SRST goes inactive
+  adapter srst delay 20
+
+  if { ![info exists SOC] } {
+    # Set the SoC of interest
+    set SOC am625
+  }
+
+  source [find target/ti_k3.cfg]
+
+  ftdi tdo_sample_edge falling
+
+  # Speeds for FT2232H are in multiples of 2, and 32MHz is tops
+  # max speed we seem to achieve is ~20MHz.. so we pick 16MHz
+  adapter speed 16000
diff --git a/doc/board/beagle/img/beagleplay_emmc.svg b/doc/board/beagle/img/beagleplay_emmc.svg
new file mode 100644
index 00000000000..c6ff19b7738
--- /dev/null
+++ b/doc/board/beagle/img/beagleplay_emmc.svg
@@ -0,0 +1,697 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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+                 style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); line-height: 1.2; pointer-events: all; white-space: normal; overflow-wrap: normal;">eMMC<xhtml:br />
+hardware partitions</xhtml:div>
+            </xhtml:div>
+          </xhtml:div>
+        </foreignObject>
+        <text
+           x="30"
+           y="34"
+           fill="rgb(0, 0, 0)"
+           font-family="Helvetica"
+           font-size="12px"
+           text-anchor="middle"
+           id="text118">eMMC...</text>
+      </switch>
+    </g>
+    <rect
+       x="365"
+       y="75"
+       width="60"
+       height="30"
+       fill="none"
+       stroke="none"
+       pointer-events="all"
+       id="rect124" />
+    <g
+       transform="translate(-0.5 -0.5)"
+       id="g130">
+      <switch
+         id="switch128">
+        <foreignObject
+           pointer-events="none"
+           width="100%"
+           height="100%"
+           requiredFeatures="http://www.w3.org/TR/SVG11/feature#Extensibility"
+           style="overflow: visible; text-align: left;">
+          <xhtml:div
+             style="display: flex; align-items: unsafe center; justify-content: unsafe center; width: 58px; height: 1px; padding-top: 90px; margin-left: 366px;">
+            <xhtml:div
+               data-drawio-colors="color: rgb(0, 0, 0); "
+               style="box-sizing: border-box; font-size: 0px; text-align: center;">
+              <xhtml:div
+                 style="display: inline-block; font-size: 12px; font-family: Helvetica; color: rgb(0, 0, 0); line-height: 1.2; pointer-events: all; white-space: normal; overflow-wrap: normal;">UDA partitions</xhtml:div>
+            </xhtml:div>
+          </xhtml:div>
+        </foreignObject>
+        <text
+           x="395"
+           y="94"
+           fill="rgb(0, 0, 0)"
+           font-family="Helvetica"
+           font-size="12px"
+           text-anchor="middle"
+           id="text126">UDA partit...</text>
+      </switch>
+    </g>
+  </g>
+  <switch
+     id="switch140">
+    <g
+       requiredFeatures="http://www.w3.org/TR/SVG11/feature#Extensibility"
+       id="g134" />
+    <a
+       transform="translate(0,-5)"
+       xlink:href="https://www.diagrams.net/doc/faq/svg-export-text-problems"
+       target="_blank"
+       id="a138">
+      <text
+         text-anchor="middle"
+         font-size="10px"
+         x="50%"
+         y="100%"
+         id="text136">Text is not SVG - cannot display</text>
+    </a>
+  </switch>
+</svg>
diff --git a/doc/board/beagle/index.rst b/doc/board/beagle/index.rst
new file mode 100644
index 00000000000..9124546ebc7
--- /dev/null
+++ b/doc/board/beagle/index.rst
@@ -0,0 +1,14 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+BeagleBoard.org
+###############
+
+
+ARM based boards
+----------------
+
+.. toctree::
+   :maxdepth: 2
+
+   am62x_beagleplay
+   j721e_beagleboneai64
diff --git a/doc/board/beagle/j721e_beagleboneai64.rst b/doc/board/beagle/j721e_beagleboneai64.rst
new file mode 100644
index 00000000000..d6b9c8ca606
--- /dev/null
+++ b/doc/board/beagle/j721e_beagleboneai64.rst
@@ -0,0 +1,327 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Nishanth Menon <nm@ti.com>
+
+J721E/TDA4VM Beagleboard.org BeagleBone AI-64
+=============================================
+
+Introduction:
+-------------
+
+BeagleBoard.org BeagleBone AI-64 is an open source hardware single
+board computer based on the Texas Instruments TDA4VM SoC featuring
+dual-core 2.0GHz Arm Cortex-A72 processor, C7x+MMA and 2 C66x
+floating-point VLIW DSPs, 3x dual ARM Cortex-R5 co-processors,
+2x 6-core Programmable Real-Time Unit and Industrial Communication
+SubSystem, PowerVR Rogue 8XE GE8430 3D GPU. The board features 4GB
+DDR4, USB3.0 Type-C, 2x USB SS Type-A, miniDisplayPort, 2x 4-lane
+CSI, DSI, 16GB eMMC flash, 1G Ethernet, M.2 E-key for WiFi/BT, and
+BeagleBone expansion headers.
+
+Further information can be found at:
+
+* Product Page: https://beagleboard.org/ai-64
+* Hardware documentation: https://git.beagleboard.org/beagleboard/beaglebone-ai-64
+
+Boot Flow:
+----------
+Below is the pictorial representation of boot flow:
+
+.. image:: ../ti/img/boot_diagram_j721e.svg
+  :alt: Boot flow diagram
+
+- On this platform, DMSC runs 'TI Foundational Security' (TIFS) which
+  functions as the security enclave master. The 'Device Manager' (DM),
+  also known as the 'TISCI server' in "TI terminology", running on boot
+  R5F, offers all the essential services required for device management.
+  The A72, C7x, C6x or R5F (Aux cores) sends requests to TIFS/DM to
+  accomplish the needed services, as illustrated in the diagram above.
+
+Sources:
+--------
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. prompt:: bash $
+
+  export UBOOT_CFG_CORTEXR=j721e_beagleboneai64_r5_defconfig
+  export UBOOT_CFG_CORTEXA=j721e_beagleboneai64_a72_defconfig
+  export TFA_BOARD=generic
+  # we dont use any extra TFA parameters
+  unset TFA_EXTRA_ARGS
+  export OPTEE_PLATFORM=k3-j721e
+  # we dont use any extra OP-TEE parameters
+  unset OPTEE_EXTRA_ARGS
+
+.. include::  ../ti/j721e_evm.rst
+    :start-after: .. j721e_evm_rst_include_start_build_steps
+    :end-before: .. j721e_evm_rst_include_end_build_steps
+
+Target Images
+--------------
+Copy the below images to an SD card and boot:
+
+* tiboot3-j721e-gp-evm.bin from R5 build as tiboot3.bin
+* tispl.bin_unsigned from Cortex-A build as tispl.bin
+* u-boot.img_unsigned from Cortex-A build as u-boot.img
+
+Image formats
+-------------
+
+- tiboot3.bin
+
+.. image:: ../ti/img/no_multi_cert_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: ../ti/img/dm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+- sysfw.itb
+
+.. image:: ../ti/img/sysfw.itb.svg
+  :alt: sysfw.itb image format
+
+Additional hardware for U-Boot development
+------------------------------------------
+
+* Serial Console is critical for U-Boot development on BeagleBone AI-64. See
+  `BeagleBone AI-64 connector documentation
+  <https://docs.beagleboard.org/latest/boards/beaglebone/ai-64/ch07.html>`_.
+* uSD is preferred option over eMMC, and a SD/MMC reader will be needed.
+* (optionally) JTAG is useful when working with very early stages of boot.
+
+Default storage options
+-----------------------
+
+There are multiple storage media options on BeagleBone AI-64, but primarily:
+
+* Onboard eMMC (default) - reliable, fast and meant for deployment use.
+* SD/MMC card interface (hold 'BOOT' switch and power on) - Entirely
+  depends on the SD card quality.
+
+Flash to uSD card or how to deal with "bricked" Board
+--------------------------------------------------------
+
+When deploying or working on Linux, it's common to use the onboard
+eMMC. However, avoiding the eMMC and using the uSD card is safer when
+working with U-Boot.
+
+If you choose to  hand format your own bootable uSD card, be
+aware that it can be difficult. The following information
+may be helpful, but remember that it is only sometimes
+reliable, and partition options can cause issues. These
+can potentially help:
+
+* https://git.ti.com/cgit/arago-project/tisdk-setup-scripts/tree/create-sdcard.sh
+* https://elinux.org/Beagleboard:Expanding_File_System_Partition_On_A_microSD
+
+The simplest option is to start with a standard distribution
+image like those in `BeagleBoard.org Distros Page
+<https://www.beagleboard.org/distros>`_ and download a disk image for
+BeagleBone AI-64. Pick a 16GB+ uSD card to be on the safer side.
+
+With an SD/MMC Card reader and `Balena Etcher
+<https://etcher.balena.io/>`_, having a functional setup in minutes is
+a trivial matter, and it works on almost all Host Operating Systems.
+Yes Windows users, Windows Subsystem for Linux(WSL) based development
+with U-Boot and update uSD card is practical.
+
+Updating U-Boot is a matter of copying the tiboot3.bin, tispl.bin and
+u-boot.img to the "BOOT" partition of the uSD card. Remember to sync
+and unmount (or Eject - depending on the Operating System) the uSD
+card prior to physically removing from SD card reader.
+
+Also see following section on switch setting used for booting using
+uSD card.
+
+.. note::
+  Great news! If the board has not been damaged physically, there's no
+  need to worry about it being "bricked" on this platform. You only have
+  to flash an uSD card, plug it in, and reinstall the image on eMMC. This
+  means that even if you make a mistake, you can quickly fix it and rest
+  easy.
+
+  If you are frequently working with uSD cards, you might find the
+  following useful:
+
+  * `USB-SD-Mux <https://www.linux-automation.com/en/products/usb-sd-mux.html>`_
+  * `SD-Wire <https://wiki.tizen.org/SDWire>`_
+
+Flash to eMMC
+-------------
+
+The eMMC layout selected is user-friendly for developers. The
+boot hardware partition of the eMMC only contains the fixed-size
+tiboot3.bin image. This is because the contents of the boot partitions
+need to run from the SoC's internal SRAM, which remains a fixed size
+constant. The other components of the boot sequence, such as tispl.bin
+and u-boot.img, are located in the /BOOT partition in the User Defined
+Area (UDA) hardware partition of the eMMC. These components can vary
+significantly in size. The choice of keeping tiboot3.bin in boot0 or
+boot1 partition depends on A/B update requirements.
+
+.. image:: img/beagleplay_emmc.svg
+  :alt: eMMC partitions and boot file organization for BeagleBone AI-64
+
+The following are the steps from Linux shell to program eMMC:
+
+.. prompt:: bash #
+
+  # Enable Boot0 boot
+  mmc bootpart enable 1 2 /dev/mmcblk0
+  mmc bootbus set single_backward x1 x8 /dev/mmcblk0
+  mmc hwreset enable /dev/mmcblk0
+
+  # Clear eMMC boot0
+  echo '0' >> /sys/class/block/mmcblk0boot0/force_ro
+  dd if=/dev/zero of=/dev/mmcblk0boot0 count=32 bs=128k
+  # Write tiboot3.bin
+  dd if=tiboot3.bin of=/dev/mmcblk0boot0 bs=128k
+
+  # Copy the rest of the boot binaries
+  mount /dev/mmcblk0p1 /boot/firmware
+  cp tispl.bin /boot/firmware
+  cp u-boot.img /boot/firmware
+  sync
+
+.. warning ::
+
+  U-Boot is configured to prioritize booting from an SD card if it
+  detects a valid boot partition and boot files on it, even if the
+  system initially booted from eMMC. The boot order is set as follows:
+
+  * SD/MMC
+  * eMMC
+  * USB
+  * PXE
+
+LED patterns during boot
+------------------------
+
+.. list-table:: USR LED status indication
+   :widths: 16 16
+   :header-rows: 1
+
+   * - USR LEDs (012345)
+     - Indicates
+
+   * - 00000
+     - Boot failure or R5 image not started up
+
+   * - 11111
+     - A53 SPL/U-boot has started up
+
+   * - 10101
+     - OS boot process has been initiated
+
+   * - 01010
+     - OS boot process failed and drops to U-Boot shell
+
+.. note ::
+
+  In the table above, 0 indicates LED switched off and 1 indicates LED
+  switched ON.
+
+.. warning ::
+
+  The green LED very next to the serial connector labelled "WKUP UART0"
+  is the power LED (LED6). This is the same color as the rest of the USR
+  LEDs. If the "green" LED6 power LED is not glowing, the system power
+  supply is not functional. Please refer to `BeagleBone AI-64 documentation
+  <https://beagleboard.org/ai-64/>`_ for further information.
+
+Switch Setting for Boot Mode
+----------------------------
+
+The boot time option is configured via "BOOT" button on the board.
+See `BeagleBone AI-64 Schematics <https://git.beagleboard.org/beagleboard/beaglebone-ai-64/-/blob/main/BeagleBone_AI-64_SCH.pdf>`_
+for details.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - BOOT Switch Position
+     - Primary Boot
+     - Secondary Boot
+
+   * - Not Pressed
+     - eMMC
+     - SD Card
+
+   * - Pressed
+     - SD Card
+     - SD Card
+
+To switch to SD card boot mode, hold the BOOT button while powering on
+with Type-C power supply, then release when power LED lights up.
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup and debugging information.
+
+.. warning::
+
+  **OpenOCD support since**: v0.12.0
+
+  If the default package version of OpenOCD in your development
+  environment's distribution needs to be updated, it might be necessary to
+  build OpenOCD from the source.
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_tag_connect
+    :end-before: .. k3_rst_include_end_openocd_connect_tag_connect
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_openocd_cfg_external_intro
+    :end-before: .. k3_rst_include_end_openocd_cfg_external_intro
+
+For example, with BeagleBone AI-64 (J721e platform), the openocd_connect.cfg:
+
+.. code-block:: tcl
+
+  # TUMPA example:
+  # http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User's_Manual
+  source [find interface/ftdi/tumpa.cfg]
+
+  transport select jtag
+
+  # default JTAG configuration has only SRST and no TRST
+  reset_config srst_only srst_push_pull
+
+  # delay after SRST goes inactive
+  adapter srst delay 20
+
+  if { ![info exists SOC] } {
+    # Set the SoC of interest
+    set SOC j721e
+  }
+
+  source [find target/ti_k3.cfg]
+
+  ftdi tdo_sample_edge falling
+
+  # Speeds for FT2232H are in multiples of 2, and 32MHz is tops
+  # max speed we seem to achieve is ~20MHz.. so we pick 16MHz
+  adapter speed 16000
diff --git a/doc/board/broadcom/bcm7xxx.rst b/doc/board/broadcom/bcm7xxx.rst
new file mode 100644
index 00000000000..f1994d9f975
--- /dev/null
+++ b/doc/board/broadcom/bcm7xxx.rst
@@ -0,0 +1,183 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2018, 2023 Thomas Fitzsimmons <fitzsim@fitzsim.org>
+
+BCM7445 and BCM7260
+===================
+
+This document describes how to use U-Boot on the Broadcom 7445 and
+Broadcom 7260 SoC, as a third stage bootloader loaded by Broadcom's
+BOLT bootloader.
+
+BOLT loads U-Boot as a generic ELF binary.  Some U-Boot features such
+as networking are not implemented but other important features are,
+including:
+
+* ext4 file system traversal
+* support for loading FIT images
+* advanced scripting
+* support for FIT-provided DTBs instead of relying on the BOLT-provided DTB
+
+A customized version of this port has been used in production.  The
+same approach may work on other BCM7xxx boards, with some
+configuration adjustments and memory layout experimentation.
+
+Configure
+---------
+
+BCM7445
+^^^^^^^
+
+.. code-block:: console
+
+	$ make bcm7445_defconfig
+
+BCM7260
+^^^^^^^
+
+.. code-block:: console
+
+	$ make bcm7260_defconfig
+
+Build
+-----
+
+.. code-block:: console
+
+	$ make
+	$ ${CROSS_COMPILE}strip u-boot
+
+Run
+---
+
+To tell U-Boot which serial port to use for its console, set the
+``stdout-path`` property in the ``/chosen`` node of the BOLT-generated
+device tree.  For example:
+
+::
+
+	BOLT> dt add prop chosen stdout-path s serial0:115200n8
+
+Flash the ``u-boot`` binary into board storage, then invoke it from
+BOLT.  For example:
+
+::
+
+	BOLT> boot -bsu -elf flash0.u-boot1
+
+This port assumes that I-cache and D-cache are already enabled when
+U-Boot is entered.
+
+Flattened Image Tree Support
+----------------------------
+
+What follows is an example FIT image source file.  Build it with:
+
+.. code-block:: console
+
+	$ mkimage -f image.its image.itb
+
+Booting the resulting ``image.itb`` was tested on BOLT v1.20, with the
+following kernels:
+
+* https://github.com/Broadcom/stblinux-3.14
+* https://github.com/Broadcom/stblinux-4.1
+* https://github.com/Broadcom/stblinux-4.9
+
+and with a generic ARMv7 root file system.
+
+**image.its**
+
+::
+
+	/dts-v1/;
+	/ {
+		description = "BCM7445 FIT";
+		images {
+			kernel@1 {
+				description = "Linux kernel";
+				/*
+				 * This kernel image output format can be
+				 * generated with:
+				 *
+				 * make vmlinux
+				 * ${CROSS_COMPILE}objcopy -O binary -S vmlinux vmlinux.bin
+				 * gzip -9 vmlinux.bin
+				 *
+				 * For stblinux-3.14, the specific Broadcom
+				 * board type should be configured in the
+				 * kernel, for example CONFIG_BCM7445D0=y.
+				 */
+				data = /incbin/("<vmlinux.bin.gz>");
+				type = "kernel";
+				arch = "arm";
+				os = "linux";
+				compression = "gzip";
+				load = <0x8000>;
+				entry = <0x8000>;
+				hash@1 {
+					algo = "sha256";
+				};
+			};
+			ramdisk@1 {
+				description = "Initramfs root file system";
+				data = /incbin/("<initramfs.cpio.gz>");
+				type = "ramdisk";
+				arch = "arm";
+				os = "linux";
+				compression = "gzip";
+				/*
+				 * Set the environment variable initrd_high to
+				 * 0xffffffff, and set "load" and "entry" here
+				 * to 0x0 to keep initramfs in-place and to
+				 * accommodate stblinux bmem/CMA reservations.
+				 */
+				load = <0x0>;
+				entry = <0x0>;
+				hash@1 {
+					algo = "sha256";
+				};
+			};
+			fdt@1 {
+				description = "Device tree dumped from BOLT";
+				/*
+				 * This DTB should be similar to the
+				 * BOLT-generated device tree, after BOLT has
+				 * done its runtime modifications to it.  For
+				 * example, it can be dumped from within
+				 * U-Boot (at ${fdtcontroladdr}), after BOLT
+				 * has loaded U-Boot.  The result can be added
+				 * to the Linux source tree as a .dts file.
+				 *
+				 * To support modifications to the device tree
+				 * in-place in U-Boot, add to Linux's
+				 * arch/arm/boot/dts/Makefile:
+				 *
+				 * DTC_FLAGS ?= -p 4096
+				 *
+				 * This will leave some padding in the DTB and
+				 * thus reserve room for node additions.
+				 *
+				 * Also, set the environment variable fdt_high
+				 * to 0xffffffff to keep the DTB in-place and
+				 * to accommodate stblinux bmem/CMA
+				 * reservations.
+				 */
+				data = /incbin/("<bolt-<version>.dtb");
+				type = "flat_dt";
+				arch = "arm";
+				compression = "none";
+				hash@1 {
+					algo = "sha256";
+				};
+			};
+		};
+		configurations {
+			default = "conf@bcm7445";
+			conf@bcm7445 {
+				description = "BCM7445 configuration";
+				kernel = "kernel@1";
+				ramdisk = "ramdisk@1";
+				fdt = "fdt@1";
+			};
+		};
+	};
diff --git a/doc/board/broadcom/index.rst b/doc/board/broadcom/index.rst
new file mode 100644
index 00000000000..ca34afc82be
--- /dev/null
+++ b/doc/board/broadcom/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2022 Matthias Brugger <mbrugger@suse.com>
+
+Broadcom
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   bcm7xxx
+   raspberrypi
+   northstar
diff --git a/doc/board/broadcom/northstar.rst b/doc/board/broadcom/northstar.rst
new file mode 100644
index 00000000000..f4bc0acd010
--- /dev/null
+++ b/doc/board/broadcom/northstar.rst
@@ -0,0 +1,44 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2023 Linus Walleij <linus.walleij@linaro.org>
+
+Broadcom Northstar Boards
+=========================
+
+This document describes how to use U-Boot on the Broadcom Northstar
+boards, comprised of the Cortex A9 ARM-based BCM470x and BCM5301x SoCs. These
+were introduced in 2012-2013 and some of them are also called StrataGX.
+
+Northstar is part of the iProc SoC family.
+
+A good overview of these boards can be found in Jon Mason's presentation
+"Enabling New Hardware in U-Boot" where the difference between Northstar
+and Northstar Plus and Northstar 2 (Aarch64) is addressed.
+
+The ROM in the Northstar SoC will typically look into NOR flash memory
+for a boot loader, and the way this works is undocumented. It should be
+possible to execute U-Boot as the first binary from the NOR flash but
+this usage path is unexplored. Please add information if you know more.
+
+D-Link Boards
+-------------
+
+When we use U-Boot with D-Link routers, the NOR flash has a boot loader
+and web server that can re-flash the bigger NAND flash memory for object
+code in the SEAMA format, so on these platforms U-Boot is converted into
+a SEAMA binary and installed in the SoC using the flash tool resident in
+the NOR flash. Details can be found in the OpenWrt project codebase.
+
+Configure
+---------
+
+.. code-block:: console
+
+	$ make CROSS_COMPILE=${CROSS_COMPILE} bcmns_defconfig
+
+Build
+-----
+
+.. code-block:: console
+
+	$ make CROSS_COMPILE=${CROSS_COMPILE}
+	$ ${CROSS_COMPILE}strip u-boot
diff --git a/doc/board/broadcom/raspberrypi.rst b/doc/board/broadcom/raspberrypi.rst
new file mode 100644
index 00000000000..1d00b38bb23
--- /dev/null
+++ b/doc/board/broadcom/raspberrypi.rst
@@ -0,0 +1,54 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2022 Matthias Brugger <mbrugger@suse.com>
+
+Raspberry Pi
+============
+
+About this
+----------
+
+This document describes the information about Raspberry Pi boards
+and it's usage steps.
+
+Raspberry Pi boards
+-------------------
+
+List of the supported Rasbperry Pi boards and the corresponding defconfig files:
+
+32 bit
+^^^^^^
+
+* rpi_defconfig
+  - Raspberry Pi
+* rpi_0_w_defconfig
+  - Raspberry Pi 1
+  - Raspberry Pi zero
+* rpi_2_defconfig
+  - Raspberry Pi 2
+* rpi_3_32b_defconfig
+  - Raspberry Pi 3b
+* rpi_4_32b_defconfig
+  - Raspberry Pi 4b
+
+64 bit
+^^^^^^
+
+* rpi_3_defconfig
+  - Raspberry Pi 3b
+* rpi_3_b_plus_defconfig
+  - Raspberry Pi 3b+
+* rpi_4_defconfig
+  - Raspberry Pi 4b
+* rpi_arm64_defconfig
+  - Raspberry Pi 3b
+  - Raspberry Pi 3b+
+  - Raspberry Pi 4b
+  - Raspberry Pi 400
+  - Raspberry Pi CM 3
+  - Raspberry Pi CM 3+
+  - Raspberry Pi CM 4
+  - Raspberry Pi zero 2 w
+
+rpi_arm64_defconfig uses the device-tree provided by the firmware instead of
+the embedded one. It allows to use the same U-Boot binary to boot different
+boards.
diff --git a/doc/board/bsh/imx8mn_bsh_smm_s2.rst b/doc/board/bsh/imx8mn_bsh_smm_s2.rst
new file mode 100644
index 00000000000..2e85c1a2181
--- /dev/null
+++ b/doc/board/bsh/imx8mn_bsh_smm_s2.rst
@@ -0,0 +1,61 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8mn_bsh_smm_s2
+=================
+
+U-Boot for the BSH SystemMaster (SMM) S2 board family.
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get firmware-imx package
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://github.com/ARM-software/arm-trusted-firmware
+tag: v2.5
+
+.. code-block:: bash
+
+   $ make PLAT=imx8mn IMX_BOOT_UART_BASE=0x30a60000 bl31
+   $ cp build/imx8mn/release/bl31.bin $(srctree)
+
+Get the ddr firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin
+   $ chmod +x firmware-imx-8.9.bin
+   $ ./firmware-imx-8.9
+   $ cp firmware-imx-8.9/firmware/ddr/synopsys/ddr3*.bin $(srctree)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-linux-gnu-
+   $ make imx8mn_bsh_smm_s2_defconfig
+   $ make
+
+Burn the flash.bin to MicroSD card offset 32KB:
+
+.. code-block:: bash
+
+   $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
+
+Boot
+----
+
+Start the board in USB serial downloader mode, plug-in the USB-OTG port and
+load flash.bin using Freescale/NXP UUU tool:
+
+.. code-block:: bash
+
+   $ uuu -v flash.bin
diff --git a/doc/board/bsh/index.rst b/doc/board/bsh/index.rst
new file mode 100644
index 00000000000..570ee4d72ed
--- /dev/null
+++ b/doc/board/bsh/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+BSH Hausgeraete GmbH
+====================
+
+.. toctree::
+   :maxdepth: 2
+
+   imx8mn_bsh_smm_s2
diff --git a/doc/board/cloos/imx8mm_phg.rst b/doc/board/cloos/imx8mm_phg.rst
new file mode 100644
index 00000000000..173f02d4aed
--- /dev/null
+++ b/doc/board/cloos/imx8mm_phg.rst
@@ -0,0 +1,55 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Cloos i.MX8MM PHG board
+=======================
+
+U-Boot for the Cloos i.MX8MM PHG board
+
+Quick Start
+-----------
+
+- Get and Build the ARM Trusted firmware
+- Get the DDR firmware
+- Build U-Boot
+- Flash U-Boot into the eMMC
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: builddir is U-Boot build directory (source directory for in-tree builds)
+Get ATF from: https://github.com/nxp-imx/imx-atf
+branch: lf_v2.6
+
+.. code-block:: bash
+
+   $ make PLAT=imx8mm bl31
+   $ cp build/imx8mm/release/bl31.bin $(builddir)
+
+Get the DDR firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin
+   $ chmod +x firmware-imx-8.9.bin
+   $ ./firmware-imx-8.9
+   $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-poky-linux-
+   $ make imx8mm_phg_defconfig
+   $ make
+
+Flash U-Boot into the eMMC
+--------------------------
+
+Program flash.bin to the eMMC at offset 33KB:
+
+.. code-block:: bash
+
+   $ ums 0 mmc 0
+   $ sudo dd if=flash.bin of=/dev/sd[x] bs=1K seek=33; sync
diff --git a/doc/board/cloos/index.rst b/doc/board/cloos/index.rst
new file mode 100644
index 00000000000..02c84152db6
--- /dev/null
+++ b/doc/board/cloos/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Cloos
+=====
+
+.. toctree::
+   :maxdepth: 2
+
+   imx8mm_phg
diff --git a/doc/board/congatec/cgtqmx8.rst b/doc/board/congatec/cgtqmx8.rst
new file mode 100644
index 00000000000..a970cb82a12
--- /dev/null
+++ b/doc/board/congatec/cgtqmx8.rst
@@ -0,0 +1,69 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the Congatec conga-QMX8 board
+========================================
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Get imx-mkimage
+- Build U-Boot
+- Build imx-mkimage
+- Flash the binary into the SD card
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+     $ git clone https://github.com/nxp-imx/imx-atf
+     $ cd imx-atf/
+     $ git checkout origin/imx_4.14.78_1.0.0_ga -b imx_4.14.78_1.0.0_ga
+     $ make PLAT=imx8qm bl31
+
+Get scfw_tcm.bin and ahab-container.img
+---------------------------------------
+
+.. code-block:: bash
+
+     $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-1.1.bin
+     $ chmod +x imx-sc-firmware-1.1.bin
+     $ ./imx-sc-firmware-1.1.bin
+     $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin
+     $ chmod +x firmware-imx-8.0.bin
+     $ ./firmware-imx-8.0.bin
+
+Or use this to avoid running random scripts from the internet,
+but note that you must agree to the license the script displays:
+
+.. code-block:: bash
+
+     $ dd if=imx-sc-firmware-1.1.bin of=imx-sc-firmware-1.1.tar.bz2 bs=37185 skip=1
+     $ tar -xf imx-sc-firmware-1.1.tar.bz2
+     $ cp imx-sc-firmware-1.1/mx8qx-val-scfw-tcm.bin $(builddir)
+
+     $ dd if=firmware-imx-8.0.bin of=firmware-imx-8.0.tar.bz2 bs=37180 skip=1
+     $ tar -xf firmware-imx-8.0.tar.bz2
+     $ cp firmware-imx-8.0/firmware/seco/mx8qm-ahab-container.img $(builddir)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+     $ export ATF_LOAD_ADDR=0x80000000
+     $ export BL33_LOAD_ADDR=0x80020000
+     $ make cgtqmx8_defconfig
+     $ make
+
+Flash the binary into the SD card
+---------------------------------
+
+Burn the flash.bin binary to SD card offset 32KB:
+
+.. code-block:: bash
+
+     $ sudo dd if=flash.bin of=/dev/sd[x] bs=1k seek=32 conv=fsync
diff --git a/doc/board/congatec/index.rst b/doc/board/congatec/index.rst
new file mode 100644
index 00000000000..cc57b36b2e5
--- /dev/null
+++ b/doc/board/congatec/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Congatec
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   cgtqmx8.rst
diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
new file mode 100644
index 00000000000..7154f59c374
--- /dev/null
+++ b/doc/board/coreboot/coreboot.rst
@@ -0,0 +1,196 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+Coreboot
+========
+
+Build Instructions for U-Boot as coreboot payload
+-------------------------------------------------
+Building U-Boot as a coreboot payload is just like building U-Boot for targets
+on other architectures, like below::
+
+   $ make coreboot_defconfig
+   $ make all
+
+Test with coreboot
+------------------
+For testing U-Boot as the coreboot payload, there are things that need be paid
+attention to. coreboot supports loading an ELF executable and a 32-bit plain
+binary, as well as other supported payloads. With the default configuration,
+U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
+generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
+provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
+this capability yet. The command is as follows::
+
+   # in the coreboot root directory
+   $ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
+     -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
+
+Make sure 0x1110000 matches CONFIG_TEXT_BASE, which is the symbol address
+of _x86boot_start (in arch/x86/cpu/start.S).
+
+If you want to use ELF as the coreboot payload, change U-Boot configuration to
+use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
+
+To enable video you must enable CONFIG_GENERIC_LINEAR_FRAMEBUFFER in coreboot:
+
+   - Devices->Display->Framebuffer mode->Linear "high resolution" framebuffer
+
+At present it seems that for Minnowboard Max, coreboot does not pass through
+the video information correctly (it always says the resolution is 0x0). This
+works correctly for link though.
+
+You can run via QEMU using::
+
+  qemu-system-x86_64 -bios build/coreboot.rom -serial mon:stdio
+
+The `-serial mon:stdio` part shows both output in the display and on the
+console. It is optional. You can add `nographic` as well to *only* get console
+output.
+
+To run with a SATA drive called `$DISK`::
+
+  qemu-system-x86_64 -bios build/coreboot.rom -serial mon:stdio \
+	-drive id=disk,file=$DISK,if=none \
+	-device ahci,id=ahci \
+	-device ide-hd,drive=disk,bus=ahci.0
+
+Then you can scan it with `scsi scan` and access it normally.
+
+To use 4GB of memory, typically necessary for booting Linux distros, add
+`-m 4GB`.
+
+64-bit U-Boot
+-------------
+
+In addition to the 32-bit 'coreboot' build there is a 'coreboot64' build. This
+produces an image which can be booted from coreboot (32-bit). Internally it
+works by using a 32-bit SPL binary to switch to 64-bit for running U-Boot. It
+can be useful for running UEFI applications, for example with the coreboot
+build in `$CBDIR`::
+
+   DISK=ubuntu-23.04-desktop-amd64.iso
+   CBDIR=~/coreboot/build
+
+   cp $CBDIR/coreboot.rom.in coreboot.rom
+   cbfstool coreboot.rom add-flat-binary -f u-boot-x86-with-spl.bin \
+      -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
+
+   qemu-system-x86_64 -m 2G -smp 4 -bios coreboot.rom \
+      -drive id=disk,file=$DISK,if=none \
+      -device ahci,id=ahci \
+      -device ide-hd,drive=disk,bus=ahci.0 \
+
+This allows booting and installing various distros, many of which are
+64-bit-only, so cannot work with the 32-bit 'coreboot' build.
+
+USB keyboard
+------------
+
+The `CONFIG_USE_PREBOOT` option is enabled by default, meaning that USB starts
+up just before the command-line starts. This allows user interaction on
+non-laptop devices which use a USB keyboard.
+
+CBFS access
+-----------
+
+You can use the 'cbfs' commands to access the Coreboot filesystem::
+
+   => cbfsinit
+   => cbfsinfo
+
+   CBFS version: 0x31313132
+   ROM size: 0x100000
+   Boot block size: 0x4
+   CBFS size: 0xffdfc
+   Alignment: 64
+   Offset: 0x200
+
+   => cbfsls
+        size              type  name
+   ------------------------------------------
+          32       cbfs header  cbfs master header
+       16720                17  fallback/romstage
+       53052                17  fallback/ramstage
+         398               raw  config
+         715               raw  revision
+         117               raw  build_info
+        4044               raw  fallback/dsdt.aml
+         640       cmos layout  cmos_layout.bin
+       17804                17  fallback/postcar
+      335797           payload  fallback/payload
+      607000              null  (empty)
+       10752         bootblock  bootblock
+
+   12 file(s)
+
+   =>
+
+Memory map
+----------
+
+  ==========  ==================================================================
+     Address  Region at that address
+  ==========  ==================================================================
+    ffffffff  Top of ROM (and last byte of 32-bit address space)
+    7a9fd000  Typical top of memory available to U-Boot
+              (use cbsysinfo to see where memory range 'table' starts)
+    10000000  Memory reserved by coreboot for mapping PCI devices
+              (typical size 2151000, includes framebuffer)
+     1920000  CONFIG_SYS_CAR_ADDR, fake Cache-as-RAM memory, used during startup
+     1110000  CONFIG_TEXT_BASE (start address of U-Boot code, before reloc)
+      110000  CONFIG_BLOBLIST_ADDR (before being relocated)
+      100000  CONFIG_PRE_CON_BUF_ADDR
+       f0000  ACPI tables set up by U-Boot
+              (typically redirects to 7ab10030 or similar)
+         500  Location of coreboot sysinfo table, used during startup
+  ==========  ==================================================================
+
+
+Debug UART
+----------
+
+It is possible to enable the debug UART with coreboot. To do this, use the
+info from the cbsysinfo command to locate the UART base. For example::
+
+   => cbsysinfo
+   ...
+   Serial I/O port: 00000000
+      base        : 00000000
+      pointer     : 767b51bc
+      type        : 2
+      base        : fe03e000
+      baud        : 0d115200
+      regwidth    : 4
+      input_hz    : 0d1843200
+      PCI addr    : 00000010
+   ...
+
+Here you can see that the UART base is fe03e000, regwidth is 4 (1 << 2) and the
+input clock is 1843200. So you can add the following CONFIG options::
+
+   CONFIG_DEBUG_UART=y
+   CONFIG_DEBUG_UART_BASE=fe03e000
+   CONFIG_DEBUG_UART_CLOCK=1843200
+   CONFIG_DEBUG_UART_SHIFT=2
+   CONFIG_DEBUG_UART_ANNOUNCE=y
+
+coreboot in CI
+--------------
+
+CI runs tests using a pre-built coreboot image. This ensures that U-Boot can
+boot as a coreboot payload, based on a known-good build of coreboot.
+
+To update the `coreboot.rom` file which is used:
+
+#. Build coreboot with `CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y`. If using
+   `make menuconfig`, this is under
+   `Devices->Display->Framebuffer mode->Linear "high resolution" framebuffer`.
+
+#. Compress the resulting `coreboot.rom`::
+
+      xz -c /path/to/coreboot/build/coreboot.rom > coreboot.rom.xz
+
+#. Upload the file to Google drive
+
+#. Send a patch to change the file ID used by wget in the CI yaml files.
diff --git a/doc/board/coreboot/index.rst b/doc/board/coreboot/index.rst
new file mode 100644
index 00000000000..d148db95f36
--- /dev/null
+++ b/doc/board/coreboot/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Coreboot
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   coreboot
diff --git a/doc/board/emulation/acpi.rst b/doc/board/emulation/acpi.rst
new file mode 100644
index 00000000000..17b68e1b780
--- /dev/null
+++ b/doc/board/emulation/acpi.rst
@@ -0,0 +1,23 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+ACPI on QEMU
+============
+
+QEMU can provide ACPI tables on ARM, RISC-V (since QEMU v8.0.0), and x86.
+
+The following U-Boot settings are needed for ACPI support::
+
+    CONFIG_CMD_QFW=y
+    CONFIG_ACPI=y
+    CONFIG_GENERATE_ACPI_TABLE=y
+
+On x86 these settings are already included in the defconfig files. ARM and
+RISC-V default to use device-trees.
+
+Instead of updating the configuration manually you can add the configuration
+fragment `acpi.config` to the make command for initializing the configuration.
+E.g.
+
+.. code-block:: bash
+
+    make qemu-riscv64_smode_defconfig acpi.config
diff --git a/doc/board/emulation/blkdev.rst b/doc/board/emulation/blkdev.rst
new file mode 100644
index 00000000000..f187ff22a86
--- /dev/null
+++ b/doc/board/emulation/blkdev.rst
@@ -0,0 +1,48 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Emulation of block devices
+--------------------------
+
+QEMU can emulate common block devices by adding the following parameters to
+the qemu-system-<arch> command line:
+
+* MMC
+
+  .. code-block:: bash
+
+      -device sdhci-pci,sd-spec-version=3 \
+      -drive if=none,file=disk.img,format=raw,id=MMC1 \
+      -device sd-card,drive=MMC1
+
+* NVMe
+
+  .. code-block:: bash
+
+      -drive if=none,file=disk.img,format=raw,id=NVME1 \
+      -device nvme,drive=NVME1,serial=nvme-1
+
+* SATA
+
+  .. code-block:: bash
+
+      -device ahci,id=ahci0 \
+      -drive if=none,file=disk.img,format=raw,id=SATA1 \
+      -device ide-hd,bus=ahci0.0,drive=SATA1
+
+* USB
+
+  .. code-block:: bash
+
+      -device qemu-xhci \
+      -drive if=none,file=disk.img,format=raw,id=USB1 \
+      -device usb-storage,drive=USB1
+
+* Virtio
+
+  .. code-block:: bash
+
+      -drive if=none,file=disk.img,format=raw,id=VIRTIO1 \
+      -device virtio-blk,drive=VIRTIO1
+
+  .. note::
+     As of v2023.07 U-Boot does not have a driver for virtio-scsi-pci.
diff --git a/doc/board/emulation/index.rst b/doc/board/emulation/index.rst
new file mode 100644
index 00000000000..98a0b26ad24
--- /dev/null
+++ b/doc/board/emulation/index.rst
@@ -0,0 +1,17 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Emulation
+=========
+
+.. toctree::
+   :maxdepth: 1
+
+   acpi
+   blkdev
+   ../../usage/semihosting
+   qemu-arm
+   qemu-mips
+   qemu-ppce500
+   qemu-riscv
+   qemu-x86
+   qemu-xtensa
diff --git a/doc/board/emulation/qemu-arm.rst b/doc/board/emulation/qemu-arm.rst
new file mode 100644
index 00000000000..1c91c7f3ac6
--- /dev/null
+++ b/doc/board/emulation/qemu-arm.rst
@@ -0,0 +1,202 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2017, Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
+
+QEMU ARM
+========
+
+QEMU for ARM supports a special 'virt' machine designed for emulation and
+virtualization purposes. This document describes how to run U-Boot under it.
+Both 32-bit ARM and AArch64 are supported.
+
+The 'virt' platform provides the following as the basic functionality:
+
+    - A freely configurable amount of CPU cores
+    - U-Boot loaded and executing in the emulated flash at address 0x0
+    - A generated device tree blob placed at the start of RAM
+    - A freely configurable amount of RAM, described by the DTB
+    - A PL011 serial port, discoverable via the DTB
+    - An ARMv7/ARMv8 architected timer
+    - PSCI for rebooting the system
+    - A generic ECAM-based PCI host controller, discoverable via the DTB
+
+Additionally, a number of optional peripherals can be added to the PCI bus.
+
+See :doc:`../../develop/devicetree/dt_qemu` for information on how to see
+the devicetree actually generated by QEMU.
+
+Building U-Boot
+---------------
+Set the CROSS_COMPILE environment variable as usual, and run:
+
+- For ARM::
+
+    make qemu_arm_defconfig
+    make
+
+- For AArch64::
+
+    make qemu_arm64_defconfig
+    make
+
+Running U-Boot
+--------------
+The minimal QEMU command line to get U-Boot up and running is:
+
+- For ARM::
+
+    qemu-system-arm -machine virt -nographic -bios u-boot.bin
+
+- For AArch64::
+
+    qemu-system-aarch64 -machine virt -nographic -cpu cortex-a57 -bios u-boot.bin
+
+Note that for some odd reason qemu-system-aarch64 needs to be explicitly
+told to use a 64-bit CPU or it will boot in 32-bit mode. The -nographic argument
+ensures that output appears on the terminal. Use Ctrl-A X to quit.
+
+Additional persistent U-Boot environment support can be added as follows:
+
+- Create envstore.img using qemu-img::
+
+    qemu-img create -f raw envstore.img 64M
+
+- Add a pflash drive parameter to the command line::
+
+    -drive if=pflash,format=raw,index=1,file=envstore.img
+
+Additional peripherals that have been tested to work in both U-Boot and Linux
+can be enabled with the following command line parameters:
+
+- To add a video console, remove "-nographic" and add e.g.::
+
+    -serial stdio -device VGA
+
+- To add a Serial ATA disk via an Intel ICH9 AHCI controller, pass e.g.::
+
+    -drive if=none,file=disk.img,format=raw,id=mydisk \
+    -device ich9-ahci,id=ahci -device ide-drive,drive=mydisk,bus=ahci.0
+
+- To add an Intel E1000 network adapter, pass e.g.::
+
+    -netdev user,id=net0 -device e1000,netdev=net0
+
+- To add an EHCI-compliant USB host controller, pass e.g.::
+
+    -device usb-ehci,id=ehci
+
+- To add a USB keyboard attached to an emulated xHCI controller, pass e.g.::
+
+    -device qemu-xhci,id=xhci -device usb-kbd,bus=xhci.0
+
+- To add an NVMe disk, pass e.g.::
+
+    -drive if=none,file=disk.img,id=mydisk -device nvme,drive=mydisk,serial=foo
+
+- To add a random number generator, pass e.g.::
+
+    -device virtio-rng-pci
+
+These have been tested in QEMU 2.9.0 but should work in at least 2.5.0 as well.
+
+Booting distros
+---------------
+
+It is possible to install and boot a standard Linux distribution using
+qemu_arm64 by setting up a root disk::
+
+    qemu-img create root.img 20G
+
+then using the installer to install. For example, with Debian 12::
+
+    qemu-system-aarch64 \
+      -machine virt -cpu cortex-a53 -m 4G -smp 4 \
+      -bios u-boot.bin \
+      -serial stdio -device VGA \
+      -nic user,model=virtio-net-pci \
+      -device virtio-rng-pci \
+      -device qemu-xhci,id=xhci \
+      -device usb-kbd -device usb-tablet \
+      -drive if=virtio,file=debian-12.0.0-arm64-netinst.iso,format=raw,readonly=on,media=cdrom \
+      -drive if=virtio,file=root.img,format=raw,media=disk
+
+The output will be something like this::
+
+    U-Boot 2023.10-rc2-00075-gbe8fbe718e35 (Aug 11 2023 - 08:38:49 +0000)
+
+    DRAM:  4 GiB
+    Core:  51 devices, 14 uclasses, devicetree: board
+    Flash: 64 MiB
+    Loading Environment from Flash... *** Warning - bad CRC, using default environment
+
+    In:    serial,usbkbd
+    Out:   serial,vidconsole
+    Err:   serial,vidconsole
+    Bus xhci_pci: Register 8001040 NbrPorts 8
+    Starting the controller
+    USB XHCI 1.00
+    scanning bus xhci_pci for devices... 3 USB Device(s) found
+    Net:   eth0: virtio-net#32
+    Hit any key to stop autoboot:  0
+    Scanning for bootflows in all bootdevs
+    Seq  Method       State   Uclass    Part  Name                      Filename
+    ---  -----------  ------  --------  ----  ------------------------  ----------------
+    Scanning global bootmeth 'efi_mgr':
+    Scanning bootdev 'fw-cfg@9020000.bootdev':
+    fatal: no kernel available
+    scanning bus for devices...
+    Scanning bootdev 'virtio-blk#34.bootdev':
+      0  efi          ready   virtio       2  virtio-blk#34.bootdev.par efi/boot/bootaa64.efi
+    ** Booting bootflow 'virtio-blk#34.bootdev.part_2' with efi
+    Using prior-stage device tree
+    Failed to load EFI variables
+    Error: writing contents
+    ** Unable to write file ubootefi.var **
+    Failed to persist EFI variables
+    Missing TPMv2 device for EFI_TCG_PROTOCOL
+    Booting /efi\boot\bootaa64.efi
+    Error: writing contents
+    ** Unable to write file ubootefi.var **
+    Failed to persist EFI variables
+    Welcome to GRUB!
+
+Standard boot looks through various available devices and finds the virtio
+disks, then boots from the first one. After a second or so the grub menu appears
+and you can work through the installer flow normally.
+
+After the installation, you can boot into the installed system by running QEMU
+again without the drive argument corresponding to the installer CD image.
+
+Enabling TPMv2 support
+----------------------
+
+To emulate a TPM the swtpm package may be used. It can be built from the
+following repositories:
+
+     https://github.com/stefanberger/swtpm.git
+
+Swtpm provides a socket for the TPM emulation which can be consumed by QEMU.
+
+In a first console invoke swtpm with::
+
+     swtpm socket --tpmstate dir=/tmp/mytpm1   \
+     --ctrl type=unixio,path=/tmp/mytpm1/swtpm-sock --log level=20
+
+In a second console invoke qemu-system-aarch64 with::
+
+     -chardev socket,id=chrtpm,path=/tmp/mytpm1/swtpm-sock \
+     -tpmdev emulator,id=tpm0,chardev=chrtpm \
+     -device tpm-tis-device,tpmdev=tpm0
+
+Enable the TPM on U-Boot's command line with::
+
+    tpm autostart
+
+Debug UART
+----------
+
+The debug UART on the ARM virt board uses these settings::
+
+    CONFIG_DEBUG_UART=y
+    CONFIG_DEBUG_UART_PL010=y
+    CONFIG_DEBUG_UART_BASE=0x9000000
+    CONFIG_DEBUG_UART_CLOCK=0
diff --git a/doc/board/emulation/qemu-mips.rst b/doc/board/emulation/qemu-mips.rst
new file mode 100644
index 00000000000..5fd8a0a23bf
--- /dev/null
+++ b/doc/board/emulation/qemu-mips.rst
@@ -0,0 +1,129 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
+
+QEMU MIPS
+=========
+
+Qemu for MIPS is based on the MIPS Malta board. The built Malta U-Boot
+images can be used for Qemu and on physical hardware. The Malta board
+supports all combinations of Little and Big Endian as well as 32 bit
+and 64 bit.
+
+Limitations & comments
+----------------------
+The memory size for Qemu is hard-coded to 256 MiB. For Malta Little Endian
+targets an extra endianness swapped image named *u-boot-swap.bin* is
+generated and required for Qemu.
+
+Example usage
+-------------
+
+Build for 32 bit, big endian:
+
+.. code-block:: bash
+
+  make malta_defconfig
+  make
+  UBOOT_BIN=u-boot.bin
+  QEMU_BIN=qemu-system-mips
+  QEMU_CPU=24Kc
+
+Build for 32 bit, little endian:
+
+.. code-block:: bash
+
+  make maltael_defconfig
+  make
+  UBOOT_BIN=u-boot-swap.bin
+  QEMU_BIN=qemu-system-mipsel
+  QEMU_CPU=24Kc
+
+Build for 64 bit, big endian:
+
+.. code-block:: bash
+
+  make malta64_defconfig
+  make
+  UBOOT_BIN=u-boot.bin
+  QEMU_BIN=qemu-system-mips64
+  QEMU_CPU=MIPS64R2-generic
+
+Build for 64 bit, little endian:
+
+.. code-block:: bash
+
+  make malta64el_defconfig
+  make
+  UBOOT_BIN=u-boot-swap.bin
+  QEMU_BIN=qemu-system-mips64el
+  QEMU_CPU=MIPS64R2-generic
+
+Generate NOR flash image with U-Boot binary:
+
+.. code-block:: bash
+
+  dd if=/dev/zero bs=1M count=4 | tr '\000' '\377' > pflash.img
+  dd if=${UBOOT_BIN} of=pflash.img conv=notrunc
+
+Start Qemu:
+
+.. code-block:: bash
+
+  mkdir tftproot
+  ${QEMU_BIN} -nographic -cpu ${QEMU_CPU} -m 256 -drive if=pflash,file="$(pwd)/pflash.img",format=raw -netdev user,id=net0,tftp="$(pwd)/tftproot" -device pcnet,netdev=net0
+
+.. code-block:: bash
+
+  U-Boot 2021.04-00963-g60279a2b1d (Apr 21 2021 - 19:54:32 +0200)
+
+  Board: MIPS Malta CoreLV
+  DRAM:  256 MiB
+  Flash: 4 MiB
+  Loading Environment from Flash... *** Warning - bad CRC, using default environment
+
+  In:    serial@3f8
+  Out:   serial@3f8
+  Err:   serial@3f8
+  Net:   pcnet#0
+  IDE:   Bus 0: not available
+  maltael #
+
+How to debug U-Boot
+-------------------
+
+In order to debug U-Boot you need to start qemu with gdb server support (-s)
+and waiting the connection to start the CPU (-S). Start Qemu in the first console:
+
+.. code-block:: bash
+
+  mkdir tftproot
+  ${QEMU_BIN} -s -S -nographic -cpu ${QEMU_CPU} -m 256 -drive if=pflash,file="$(pwd)/pflash.img",format=raw -netdev user,id=net0,tftp="$(pwd)/tftproot" -device pcnet,netdev=net0
+
+In the second console start gdb:
+
+.. code-block:: bash
+
+  gdb-multiarch --eval-command "target remote :1234" u-boot
+
+.. code-block:: bash
+
+  GNU gdb (Ubuntu 9.2-0ubuntu1~20.04) 9.2
+  Copyright (C) 2020 Free Software Foundation, Inc.
+  License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
+  This is free software: you are free to change and redistribute it.
+  There is NO WARRANTY, to the extent permitted by law.
+  Type "show copying" and "show warranty" for details.
+  This GDB was configured as "x86_64-linux-gnu".
+  Type "show configuration" for configuration details.
+  For bug reporting instructions, please see:
+  <http://www.gnu.org/software/gdb/bugs/>.
+  Find the GDB manual and other documentation resources online at:
+      <http://www.gnu.org/software/gdb/documentation/>.
+
+  For help, type "help".
+  Type "apropos word" to search for commands related to "word"...
+  Reading symbols from u-boot...
+  Remote debugging using :1234
+  0xbfc00000 in ?? ()
+  (gdb) c
+  Continuing.
diff --git a/doc/board/emulation/qemu-ppce500.rst b/doc/board/emulation/qemu-ppce500.rst
new file mode 100644
index 00000000000..82b50a01de7
--- /dev/null
+++ b/doc/board/emulation/qemu-ppce500.rst
@@ -0,0 +1,95 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
+
+QEMU PPC E500
+=============
+
+QEMU for PPC supports a special 'ppce500' machine designed for emulation and
+virtualization purposes. This document describes how to run U-Boot under it.
+
+The QEMU ppce500 machine models a generic PowerPC e500 virtual machine with
+support for the VirtIO standard networking device connected to the built-in
+PCI host controller. Some common devices in the CCSBAR space are modeled,
+including MPIC, 16550A UART devices, GPIO, I2C and PCI host controller with
+MSI delivery to MPIC. It uses device-tree to pass configuration information
+to guest software.
+
+Building U-Boot
+---------------
+Set the CROSS_COMPILE environment variable as usual, and run::
+
+    $ make qemu-ppce500_defconfig
+    $ make
+
+Running U-Boot
+--------------
+The minimal QEMU command line to get U-Boot up and running is::
+
+    $ qemu-system-ppc -nographic -machine ppce500 -bios u-boot
+
+You can also run U-Boot using 'qemu-system-ppc64'::
+
+    $ qemu-system-ppc64 -nographic -machine ppce500 -bios u-boot
+
+The commands above create a target with 128 MiB memory by default. A freely
+configurable amount of RAM can be created via the '-m' parameter. For example,
+'-m 2G' creates 2 GiB memory for the target, and the memory node in the
+embedded DTB created by QEMU reflects the new setting.
+
+Both qemu-system-ppc and qemu-system-ppc64 provide emulation for the following
+32-bit PowerPC CPUs:
+
+* e500v1
+* e500v2
+* e500mc
+
+Additionally qemu-system-ppc64 provides support for the following 64-bit CPUs:
+
+* e5500
+* e6500
+
+The CPU type can be specified via the '-cpu' command line. If not specified,
+it creates a machine with e500v2 core. The following example shows an e6500
+based machine creation::
+
+    $ qemu-system-ppc64 -nographic -machine ppce500 -cpu e6500 -bios u-boot
+
+When U-Boot boots, you will notice the following::
+
+    CPU:   Unknown, Version: 0.0, (0x00000000)
+    Core:  e6500, Version: 2.0, (0x80400020)
+
+This is because we only specified a core name to QEMU and it does not have a
+meaningful SVR value which represents an actual SoC that integrates such core.
+You can specify a real world SoC device that QEMU has built-in support but all
+these SoCs are e500v1/e500v2 based MPC85xx series, hence you cannot test anything
+built for P10xx/P2010/P2020 (e500v2), P204x/P304x/P40xx (e500mc), P50xx/T10xx (e5500)
+and T208x/T4080/T4160/T4240 (e6500).
+
+By default a VirtIO standard PCI networking device is connected as an ethernet
+interface at PCI address 0.1.0, but we can switch that to an e1000 NIC by::
+
+    $ qemu-system-ppc -nographic -machine ppce500 -bios u-boot \
+                      -nic tap,ifname=tap0,script=no,downscript=no,model=e1000
+
+The QEMU ppce500 machine can also dynamically instantiate an eTSEC device if
+"-device eTSEC" is given to QEMU::
+
+    -netdev tap,ifname=tap0,script=no,downscript=no,id=net0 -device eTSEC,netdev=net0
+
+VirtIO BLK driver is also enabled to support booting from a disk image where
+a kernel image is stored. Append the following to QEMU::
+
+    -drive file=disk.img,format=raw,id=disk0 -device virtio-blk-pci,drive=disk0
+
+Pericom pt7c4338 RTC is supported so we can use the 'date' command::
+
+    => date
+    Date: 2021-02-18 (Thursday)    Time: 15:33:20
+
+Additionally, 'poweroff' command is supported to shut down the QEMU session::
+
+    => poweroff
+    poweroff ...
+
+These have been tested in QEMU 5.2.0.
diff --git a/doc/board/emulation/qemu-riscv.rst b/doc/board/emulation/qemu-riscv.rst
new file mode 100644
index 00000000000..8a5eb1eda56
--- /dev/null
+++ b/doc/board/emulation/qemu-riscv.rst
@@ -0,0 +1,173 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
+
+QEMU RISC-V
+===========
+
+QEMU for RISC-V supports a special 'virt' machine and 'spike' machine designed
+for emulation and virtualization purposes. This document describes how to run
+U-Boot under it. Both 32-bit and 64-bit targets are supported, running in
+either machine or supervisor mode.
+
+The QEMU virt machine models a generic RISC-V virtual machine with support for
+the VirtIO standard networking and block storage devices. It has CLINT, PLIC,
+16550A UART devices in addition to VirtIO and it also uses device-tree to pass
+configuration information to guest software. It implements the latest RISC-V
+privileged architecture.
+
+See :doc:`../../develop/devicetree/dt_qemu` for information on how to see
+the devicetree actually generated by QEMU.
+
+The QEMU spike machine models a minimalistic RISC-V virtual machine with
+only CLINT and HTIF devices. It also uses device-tree to pass configuration
+information to guest software and implements the latest RISC-V privileged
+architecture.
+
+Building U-Boot
+---------------
+Set the CROSS_COMPILE environment variable as usual, and run:
+
+- For 32-bit RISC-V::
+
+    make qemu-riscv32_defconfig
+    make
+
+- For 64-bit RISC-V::
+
+    make qemu-riscv64_defconfig
+    make
+
+This will compile U-Boot for machine mode. To build supervisor mode binaries,
+use the configurations qemu-riscv32_smode_defconfig and
+qemu-riscv64_smode_defconfig instead. Note that U-Boot running in supervisor
+mode requires a supervisor binary interface (SBI), such as RISC-V OpenSBI.
+
+Running U-Boot
+--------------
+The minimal QEMU command line to get U-Boot up and running is:
+
+- For 32-bit RISC-V virt machine::
+
+    qemu-system-riscv32 -nographic -machine virt -bios u-boot.bin
+
+- For 64-bit RISC-V virt machine::
+
+    qemu-system-riscv64 -nographic -machine virt -bios u-boot.bin
+
+- For 64-bit RISC-V spike machine::
+
+    qemu-system-riscv64 -nographic -machine spike -bios u-boot.bin
+
+The commands above create targets with 128MiB memory by default.
+A freely configurable amount of RAM can be created via the '-m'
+parameter. For example, '-m 2G' creates 2GiB memory for the target,
+and the memory node in the embedded DTB created by QEMU reflects
+the new setting.
+
+For instructions on how to run U-Boot in supervisor mode on QEMU
+with OpenSBI, see the documentation available with OpenSBI:
+https://github.com/riscv/opensbi/blob/master/docs/platform/qemu_virt.md
+https://github.com/riscv/opensbi/blob/master/docs/platform/spike.md
+
+These have been tested in QEMU 5.0.0.
+
+Running U-Boot SPL
+------------------
+In the default SPL configuration, U-Boot SPL starts in machine mode. U-Boot
+proper and OpenSBI (FW_DYNAMIC firmware) are bundled as FIT image and made
+available to U-Boot SPL. Both are then loaded by U-Boot SPL and the location
+of U-Boot proper is passed to OpenSBI. After initialization, U-Boot proper is
+started in supervisor mode by OpenSBI.
+
+OpenSBI must be compiled before compiling U-Boot. Version 0.4 and higher is
+supported by U-Boot. Clone the OpenSBI repository and run the following command.
+
+.. code-block:: console
+
+    git clone https://github.com/riscv/opensbi.git
+    cd opensbi
+    make PLATFORM=generic
+
+See the OpenSBI documentation for full details:
+https://github.com/riscv/opensbi/blob/master/docs/platform/qemu_virt.md
+https://github.com/riscv/opensbi/blob/master/docs/platform/spike.md
+
+To make the FW_DYNAMIC binary (build/platform/generic/firmware/fw_dynamic.bin)
+available to U-Boot, either copy it into the U-Boot root directory or specify
+its location with the OPENSBI environment variable. Afterwards, compile U-Boot
+with the following commands.
+
+- For 32-bit RISC-V::
+
+    make qemu-riscv32_spl_defconfig
+    make
+
+- For 64-bit RISC-V::
+
+    make qemu-riscv64_spl_defconfig
+    make
+
+The minimal QEMU commands to run U-Boot SPL in both 32-bit and 64-bit
+configurations are:
+
+- For 32-bit RISC-V virt machine::
+
+    qemu-system-riscv32 -nographic -machine virt -bios spl/u-boot-spl.bin \
+    -device loader,file=u-boot.itb,addr=0x80200000
+
+- For 64-bit RISC-V virt machine::
+
+    qemu-system-riscv64 -nographic -machine virt -bios spl/u-boot-spl.bin \
+    -device loader,file=u-boot.itb,addr=0x80200000
+
+- For 64-bit RISC-V spike machine::
+
+    qemu-system-riscv64 -nographic -machine spike -bios spl/u-boot-spl.bin \
+    -device loader,file=u-boot.itb,addr=0x80200000
+
+An attached disk can be emulated in RISC-V virt machine by adding::
+
+    -device ich9-ahci,id=ahci \
+    -drive if=none,file=riscv64.img,format=raw,id=mydisk \
+    -device ide-hd,drive=mydisk,bus=ahci.0
+
+or alternatively attach an emulated UFS::
+
+    -device ufs,id=ufs0 \
+    -drive if=none,file=test.img,format=raw,id=lun0 \
+    -device ufs-lu,drive=lun0,bus=ufs0
+
+You will have to run 'scsi scan' to use them.
+
+A video console can be emulated in RISC-V virt machine by removing "-nographic"
+and adding::
+
+    -serial stdio -device VGA
+
+In addition, a usb keyboard can be attached to an emulated xHCI controller in
+RISC-V virt machine as an option of input devices by adding::
+
+    -device qemu-xhci,id=xhci -device usb-kbd,bus=xhci.0
+
+Running with KVM
+----------------
+
+Running with QEMU using KVM requires an S-mode U-Boot binary as created by
+qemu-riscv64_smode_defconfig.
+
+Provide the U-Boot S-mode ELF image as *-kernel* parameter and do not add a
+*-bios* parameter, e.g.
+
+.. code-block:: bash
+
+    qemu-system-riscv64 -accel kvm -nographic -machine virt -kernel u-boot
+
+Debug UART
+----------
+
+The following settings provide a debug UART for the virt machine::
+
+    CONFIG_DEBUG_UART=y
+    CONFIG_DEBUG_UART_NS16550=y
+    CONFIG_DEBUG_UART_BASE=0x10000000
+    CONFIG_DEBUG_UART_CLOCK=3686400
diff --git a/doc/board/emulation/qemu-x86.rst b/doc/board/emulation/qemu-x86.rst
new file mode 100644
index 00000000000..c604e42990e
--- /dev/null
+++ b/doc/board/emulation/qemu-x86.rst
@@ -0,0 +1,202 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+QEMU x86
+========
+
+Build instructions for bare mode
+--------------------------------
+
+To build u-boot.rom for QEMU x86 targets, just simply run::
+
+   $ make qemu-x86_defconfig (for 32-bit)
+   $ make qemu-x86_64_defconfig (for 64-bit)
+   $ make all
+
+Note this default configuration will build a U-Boot for the QEMU x86 i440FX
+board. To build a U-Boot against QEMU x86 Q35 board, you can change the build
+configuration during the 'make menuconfig' process like below::
+
+   Device Tree Control  --->
+       ...
+       (qemu-x86_q35) Default Device Tree for DT control
+
+Test with QEMU for bare mode
+----------------------------
+
+QEMU is a fancy emulator that can enable us to test U-Boot without access to
+a real x86 board. Please make sure your QEMU version is 2.3.0 or above test
+U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows::
+
+   $ qemu-system-i386 -nographic -bios path/to/u-boot.rom
+
+This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU
+also supports emulating an x86 board with Q35 and ICH9 based chipset, which is
+also supported by U-Boot. To instantiate such a machine, call QEMU with::
+
+   $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35
+
+Note by default QEMU instantiated boards only have 128 MiB system memory. But
+it is enough to have U-Boot boot and function correctly. You can increase the
+system memory by pass '-m' parameter to QEMU if you want more memory::
+
+   $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024
+
+This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only
+supports 3 GiB maximum system memory and reserves the last 1 GiB address space
+for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m'
+would be 3072.
+
+QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will
+show QEMU's VGA console window. Note this will disable QEMU's serial output.
+If you want to check both consoles, use '-serial stdio'.
+
+Multicore is also supported by QEMU via '-smp n' where n is the number of cores
+to instantiate. Note, the maximum supported CPU number in QEMU is 255.
+
+U-Boot uses 'distro_bootcmd' by default when booting on x86 QEMU. This tries to
+load a boot script, kernel, and ramdisk from several different interfaces. For
+the default boot order, see 'qemu-x86.h'. For more information, see
+'doc/develop/distro.rst'. Most Linux distros can be booted by writing a uboot
+script.
+For example, Debian (stretch) can be booted by creating a script file named
+'boot.txt' with the contents::
+
+   setenv bootargs root=/dev/sda1 ro
+   load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} /vmlinuz
+   load ${devtype} ${devnum}:${distro_bootpart} ${ramdisk_addr_r} /initrd.img
+   zboot ${kernel_addr_r} - ${ramdisk_addr_r} ${filesize}
+
+Then compile and install it with::
+
+   $ apt install u-boot-tools && \
+     mkimage -T script -C none -n "Boot script" -d boot.txt /boot/boot.scr
+
+The fw_cfg interface in QEMU also provides information about kernel data,
+initrd, command-line arguments and more. U-Boot supports directly accessing
+these informtion from fw_cfg interface, which saves the time of loading them
+from hard disk or network again, through emulated devices. To use it , simply
+providing them in QEMU command line::
+
+   $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 \
+     -kernel /path/to/bzImage -append 'root=/dev/ram console=ttyS0' \
+     -initrd /path/to/initrd -smp 8
+
+Note: -initrd and -smp are both optional
+
+Then start QEMU, in U-Boot command line use the following U-Boot command to
+setup kernel::
+
+   => qfw
+   qfw - QEMU firmware interface
+
+   Usage:
+   qfw <command>
+       - list                             : print firmware(s) currently loaded
+       - cpus                             : print online cpu number
+       - load <kernel addr> <initrd addr> : load kernel and initrd (if any) and setup for zboot
+
+   => qfw load
+   loading kernel to address 01000000 size 5d9d30 initrd 04000000 size 1b1ab50
+
+Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then,
+'zboot' can be used to boot the kernel::
+
+   => zboot 01000000 - 04000000 1b1ab50
+
+To run 64-bit U-Boot, qemu-system-x86_64 should be used instead, e.g.::
+
+   $ qemu-system-x86_64 -nographic -bios path/to/u-boot.rom
+
+A specific CPU can be specified via the '-cpu' parameter but please make
+sure the specified CPU supports 64-bit like '-cpu core2duo'. Conversely
+'-cpu pentium' won't work for obvious reasons that the processor only
+supports 32-bit.
+
+Booting distros
+---------------
+
+It is possible to install and boot a standard Linux distribution using
+qemu-x86_64 by setting up a root disk::
+
+   qemu-img create root.img 10G
+
+then using the installer to install. For example, with Ubuntu 2023.04::
+
+   qemu-system-x86_64 -m 8G -smp 4 -bios /tmp/b/qemu-x86_64/u-boot.rom \
+     -drive file=root.img,if=virtio,driver=raw \
+     -drive file=ubuntu-23.04-desktop-amd64.iso,if=virtio,driver=raw
+
+You can also add `-serial mon:stdio` if you want the serial console to show as
+well as the video.
+
+The output will be something like this::
+
+   U-Boot SPL 2023.07 (Jul 23 2023 - 08:00:12 -0600)
+   Trying to boot from SPI
+   Jumping to 64-bit U-Boot: Note many features are missing
+
+
+   U-Boot 2023.07 (Jul 23 2023 - 08:00:12 -0600)
+
+   CPU:   QEMU Virtual CPU version 2.5+
+   DRAM:  8 GiB
+   Core:  20 devices, 13 uclasses, devicetree: separate
+   Loading Environment from nowhere... OK
+   Model: QEMU x86 (I440FX)
+   Net:   e1000: 52:54:00:12:34:56
+          eth0: e1000#0
+   Hit any key to stop autoboot:  0
+   Scanning for bootflows in all bootdevs
+   Seq  Method       State   Uclass    Part  Name                      Filename
+   ---  -----------  ------  --------  ----  ------------------------  ----------------
+   Scanning global bootmeth 'efi_mgr':
+   Hunting with: nvme
+   Hunting with: qfw
+   Hunting with: scsi
+   scanning bus for devices...
+   Hunting with: virtio
+   Scanning bootdev 'qfw_pio.bootdev':
+   fatal: no kernel available
+   Scanning bootdev 'virtio-blk#0.bootdev':
+   Scanning bootdev 'virtio-blk#1.bootdev':
+     0  efi          ready   virtio       2  virtio-blk#1.bootdev.part efi/boot/bootx64.efi
+   ** Booting bootflow 'virtio-blk#1.bootdev.part_2' with efi
+   EFI using ACPI tables at f0060
+        efi_install_fdt() WARNING: Can't have ACPI table and device tree - ignoring DT.
+          efi_run_image() Booting /efi\boot\bootx64.efi
+   error: file `/boot/' not found.
+
+Standard boot looks through various available devices and finds the virtio
+disks, then boots from the first one. After a second or so the grub menu appears
+and you can work through the installer flow normally.
+
+Note that standard boot will not find 32-bit distros, since it looks for a
+different filename.
+
+Current limitations
+-------------------
+
+Only qemu-x86-64 can be used for booting distros, since qemu-x86 (the 32-bit
+version of U-Boot) seems to have an EFI bug leading to the boot handing after
+Linux is selected from grub, e.g. with `debian-12.1.0-i386-netinst.iso`::
+
+   ** Booting bootflow 'virtio-blk#1.bootdev.part_2' with efi
+   EFI using ACPI tables at f0180
+        efi_install_fdt() WARNING: Can't have ACPI table and device tree - ignoring DT.
+          efi_run_image() Booting /efi\boot\bootia32.efi
+   Failed to open efi\boot\root=/dev/sdb3 - Not Found
+   Failed to load image 큀緃: Not Found
+   start_image() returned Not Found, falling back to default loader
+   Welcome to GRUB!
+
+The bochs video driver also seems to cause problems before the OS is able to
+show a display.
+
+The QEMU `-cdrom` option is intended to work with the original ISO-format
+images, not the recently invented ISOHybrid image.
+
+Finally, the use of `-M accel=kvm` is intended to use the native CPU's
+virtual-machine features to accelerate operation, but this causes U-Boot to hang
+when jumping 64-bit mode, at least on AMD machines. This may be a bug in U-Boot
+or something else.
diff --git a/doc/board/emulation/qemu-xtensa.rst b/doc/board/emulation/qemu-xtensa.rst
new file mode 100644
index 00000000000..fff23c1a9b0
--- /dev/null
+++ b/doc/board/emulation/qemu-xtensa.rst
@@ -0,0 +1,33 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2024 Jiaxun Yang <jiaxun.yang@flygoat.com>
+
+QEMU Xtensa
+===========
+
+QEMU for Xtensa supports a special 'virt' machine designed for emulation and
+virtualization purposes. This document describes how to run U-Boot under it.
+
+The QEMU virt machine models a generic Xtensa virtual machine with PCI Bus
+and Xtensa ISS simcall semihosting support. It supports many different Xtensa
+CPU configuration. Currently, only dc233c variant is tested against U-Boot.
+
+Building U-Boot
+---------------
+Set the CROSS_COMPILE environment variable as usual, and run:
+
+    make qemu-xtensa-dc233c_defconfig
+    make
+
+Note that Xtensa's toolchain is bounded to CPU configuration, you must use
+the toolchain built for exactly the same CPU configuration as you selected
+in U-Boot.
+
+Running U-Boot
+--------------
+The minimal QEMU command line to get U-Boot up and running is:
+
+    qemu-system-xtensa -nographic -machine virt -cpu dc233c -semihosting -kernel ./u-boot.elf
+
+You many change cpu option to match your U-Boot CPU type configuration.
+semihosting option is mandatory because this is the only way to interact
+with U-Boot in command line.
diff --git a/doc/board/gateworks/imx8mm_venice.rst b/doc/board/gateworks/imx8mm_venice.rst
new file mode 100644
index 00000000000..ea78dfd7ae6
--- /dev/null
+++ b/doc/board/gateworks/imx8mm_venice.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8mm_venice
+=============
+
+U-Boot for the Gateworks i.MX8M Mini Venice Development Kit boards
+
+Quick Start
+-----------
+- Build the ARM Trusted firmware binary
+- Get DDR firmware
+- Build U-Boot
+- Flash to eMMC
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+   $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4
+   $ make PLAT=imx8mm bl31 CROSS_COMPILE=aarch64-linux-gnu-
+   $ cp build/imx8mm/release/bl31.bin .
+
+Get the DDR Firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin
+   $ chmod +x firmware-imx-8.9.bin
+   $ ./firmware-imx-8.9.bin
+   $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ make imx8mm_venice_defconfig
+   $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+Update eMMC
+-----------
+
+.. code-block:: bash
+
+   => tftpboot $loadaddr flash.bin
+   => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200
+   => mmc dev 2 0 && mmc write $loadaddr 0x42 $blkcnt # emmc user hw part
+   => mmc dev 2 1 && mmc write $loadaddr 0x42 $blkcnt # or emmc boot0 hw part
+   => mmc dev 2 2 && mmc write $loadaddr 0x42 $blkcnt # or emmc boot1 hw part
diff --git a/doc/board/gateworks/imx8mn_venice.rst b/doc/board/gateworks/imx8mn_venice.rst
new file mode 100644
index 00000000000..7015f4ef31c
--- /dev/null
+++ b/doc/board/gateworks/imx8mn_venice.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8mn_venice
+=============
+
+U-Boot for the Gateworks i.MX8M Nano Venice Development Kit boards
+
+Quick Start
+-----------
+- Build the ARM Trusted firmware binary
+- Get DDR firmware
+- Build U-Boot
+- Flash to eMMC
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+   $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4
+   $ make PLAT=imx8mn bl31 CROSS_COMPILE=aarch64-linux-gnu-
+   $ cp build/imx8mn/release/bl31.bin .
+
+Get the DDR Firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin
+   $ chmod +x firmware-imx-8.9.bin
+   $ ./firmware-imx-8.9.bin
+   $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ make imx8mn_venice_defconfig
+   $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+Update eMMC
+-----------
+
+.. code-block:: bash
+
+   => tftpboot $loadaddr flash.bin
+   => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200
+   => mmc dev 2 0 && mmc write $loadaddr 0x40 $blkcnt # emmc user hw part
+   => mmc dev 2 1 && mmc write $loadaddr 0 $blkcnt # or emmc boot0 hw part
+   => mmc dev 2 2 && mmc write $loadaddr 0 $blkcnt # or emmc boot1 hw part
diff --git a/doc/board/gateworks/imx8mp_venice.rst b/doc/board/gateworks/imx8mp_venice.rst
new file mode 100644
index 00000000000..a219caadff2
--- /dev/null
+++ b/doc/board/gateworks/imx8mp_venice.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8mp_venice
+=============
+
+U-Boot for the Gateworks i.MX8M Plus Venice Development Kit boards
+
+Quick Start
+-----------
+- Build the ARM Trusted firmware binary
+- Get DDR firmware
+- Build U-Boot
+- Flash to eMMC
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+   $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4
+   $ make PLAT=imx8mp bl31 CROSS_COMPILE=aarch64-linux-gnu-
+   $ cp build/imx8mp/release/bl31.bin .
+
+Get the DDR Firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin
+   $ chmod +x firmware-imx-8.9.bin
+   $ ./firmware-imx-8.9.bin
+   $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ make imx8mp_venice_defconfig
+   $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+Update eMMC
+-----------
+
+.. code-block:: bash
+
+   => tftpboot $loadaddr flash.bin
+   => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200
+   => mmc dev 2 0 && mmc write $loadaddr 0x40 $blkcnt # emmc user hw part
+   => mmc dev 2 1 && mmc write $loadaddr 0 $blkcnt # or emmc boot0 hw part
+   => mmc dev 2 2 && mmc write $loadaddr 0 $blkcnt # or emmc boot1 hw part
diff --git a/doc/board/gateworks/index.rst b/doc/board/gateworks/index.rst
new file mode 100644
index 00000000000..6cf0839814d
--- /dev/null
+++ b/doc/board/gateworks/index.rst
@@ -0,0 +1,11 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Gateworks
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   imx8mm_venice
+   imx8mn_venice
+   imx8mp_venice
diff --git a/doc/board/google/chromebook_coral.rst b/doc/board/google/chromebook_coral.rst
new file mode 100644
index 00000000000..1eda769c752
--- /dev/null
+++ b/doc/board/google/chromebook_coral.rst
@@ -0,0 +1,442 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Chromebook Coral
+================
+
+Coral is a Chromebook (or really about 20 different Chromebooks) which use the
+Intel Apollo Lake platform (APL). The 'reef' Chromebooks use the same APL SoC so
+should also work. Some later ones based on Glacier Lake (GLK) need various
+changes in GPIOs, etc. but are very similar.
+
+It is hoped that this port can enable ports to embedded APL boards which are
+starting to appear.
+
+Note that booting U-Boot on APL is already supported by coreboot and
+Slim Bootloader. This documentation refers to a 'bare metal' port.
+
+
+Building
+--------
+
+First, you need the following binary blobs:
+
+   * descriptor.bin - Intel flash descriptor
+   * fitimage.bin - Base flash image structure
+   * fsp_m.bin - FSP-M, for setting up SDRAM
+   * fsp_s.bin - FSP-S, for setting up Silicon
+   * vbt.bin - for setting up display
+
+These binaries do not seem to be available publicly. If you have a ROM image,
+such as santa.bin then you can do this::
+
+  cbfstool santa.bin extract -n fspm.bin -f fsp-m.bin
+  cbfstool santa.bin extract -n fsps.bin -f fsp-s.bin
+  cbfstool santa.bin extract -n vbt-santa.bin -f vbt.bin
+  mkdir tmp
+  cd tmp
+  dump_fmap -x ../santa.bin
+  mv SI_DESC ../descriptor.bin
+  mv IFWI ../fitimage.bin
+
+Put all of these files in `board/google/chromebook_coral` so they can be found
+by the build.
+
+To build::
+
+  make O=/tmp/b/chromebook_coral chromebook_coral_defconfig
+  make O=/tmp/b/chromebook_coral -s -j30 all
+
+That should produce `/tmp/b/chrombook_coral/u-boot.rom` which you can use with
+a Dediprog em100::
+
+  em100 -s -c w25q128fw -d /tmp/b/chromebook_coral/u-boot.rom -r
+
+or you can use flashrom to write it to the board. If you do that, make sure you
+have a way to restore the old ROM without booting the board. Otherwise you may
+brick it. Having said that, you may find these instructions useful if you want
+to unbrick your device:
+
+  https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging.md
+
+You can buy Suzy-Q from Sparkfun:
+
+  https://chromium.googlesource.com/chromiumos/third_party/hdctools/+/main/docs/ccd.md#suzyq-suzyqable
+
+Note that it will hang at the SPL prompt for 21 seconds. When booting into
+Chrome OS it will always select developer mode, so will wipe anything you have
+on the device if you let it proceed. You have two seconds in U-Boot to stop the
+auto-boot prompt and several seconds at the 'developer wipe' screen to stop it
+wiping the disk.
+
+Here is the console output::
+
+  U-Boot TPL 2021.04-rc1-00128-g344eefcdfec-dirty (Feb 11 2021 - 20:13:08 -0700)
+  Trying to boot from Mapped SPI
+
+  U-Boot SPL 2021.04-rc1-00128-g344eefcdfec-dirty (Feb 11 2021 - 20:13:08 -0700)
+  Trying to boot from Mapped SPI
+
+
+  U-Boot 2021.04-rc1-00128-g344eefcdfec-dirty (Feb 11 2021 - 20:13:08 -0700)
+
+  CPU:   Intel(R) Celeron(R) CPU N3450 @ 1.10GHz
+  DRAM:  3.9 GiB
+  MMC:   sdmmc@1b,0: 1, emmc@1c,0: 2
+  Video: 1024x768x32 @ b0000000
+  Model: Google Coral
+  Net:   No ethernet found.
+  SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB
+  Hit any key to stop autoboot:  0
+  cmdline=console= loglevel=7 init=/sbin/init cros_secure oops=panic panic=-1 root=PARTUUID=${uuid}/PARTNROFF=1 rootwait rw dm_verity.error_behavior=3 dm_verity.max_bios=-1 dm_verity.dev_wait=0 dm="1 vroot none rw 1,0 3788800 verity payload=ROOT_DEV hashtree=HASH_DEV hashstart=3788800 alg=sha1 root_hexdigest=55052b629d3ac889f25a9583ea12cdcd3ea15ff8 salt=a2d4d9e574069f4fed5e3961b99054b7a4905414b60a25d89974a7334021165c" noinitrd vt.global_cursor_default=0 kern_guid=${uuid} add_efi_memmap noresume i915.modeset=1 Kernel command line: "console= loglevel=7 init=/sbin/init cros_secure oops=panic panic=-1 root=PARTUUID=35c775e7-3735-d745-93e5-d9e0238f7ed0/PARTNROFF=1 rootwait rw dm_verity.error_behavior=3 dm_verity.max_bios=-1 dm_verity.dev_wait=0 dm="1 vroot none rw 1,0 3788800 verity payload=ROOT_DEV hashtree=HASH_DEV hashstart=3788800 alg=sha1 root_hexdigest=55052b629d3ac889f25a9583ea12cdcd3ea15ff8 salt=a2d4d9e574069f4fed5e3961b99054b7a4905414b60a25d89974a7334021165c" noinitrd vt.global_
+  Setup located at 00090000:
+
+  ACPI RSDP addr      : 7991f000
+  E820: 14 entries
+                Addr              Size  Type
+      d0000000     1000000  <NULL>
+             0       a0000  RAM
+         a0000       60000  Reserved
+      7b000000      800000  Reserved
+      7b800000     4800000  Reserved
+      7ac00000      400000  Reserved
+        100000     ff00000  RAM
+      10000000     2151000  Reserved
+      12151000    68aaf000  RAM
+     100000000    80000000  RAM
+      e0000000    10000000  Reserved
+      7991bfd0     12e4030  Reserved
+      d0000000    10000000  Reserved
+      fed10000        8000  Reserved
+  Setup sectors       : 1e
+  Root flags          : 1
+  Sys size            : 63420
+  RAM size            : 0
+  Video mode          : ffff
+  Root dev            : 0
+  Boot flag           : 0
+  Jump                : 66eb
+  Header              : 53726448
+                        Kernel V2
+  Version             : 20d
+  Real mode switch    : 0
+  Start sys           : 1000
+  Kernel version      : 38cc
+     @00003acc:
+  Type of loader      : 80
+                        U-Boot, version 0
+  Load flags          : 81
+                      : loaded-high can-use-heap
+  Setup move size     : 8000
+  Code32 start        : 100000
+  Ramdisk image       : 0
+  Ramdisk size        : 0
+  Bootsect kludge     : 0
+  Heap end ptr        : 8e00
+  Ext loader ver      : 0
+  Ext loader type     : 0
+  Command line ptr    : 99000
+     console= loglevel=7 init=/sbin/init cros_secure oops=panic panic=-1 root=PARTUUID=35c775e7-3735-d745-93e5-d9e0238f7ed0/PARTNROFF=1 rootwait rw dm_verity.error_behavior=3 dm_verity.max_bios=-1 dm_verity.dev_wait=0 dm="1 vroot none rw 1,0 3788800 verity payload=ROOT_DEV hashtree=HASH_DEV hashstart=3788800 alg=sha1 root_hexdigest=55052b629d3ac889f25a9583ea12cdcd3ea15ff8 salt=a2d4d9e574069f4fed5e3961b99054b7a4905414b60a25d89974a7334021165c" noinitrd vt.global_cursor_default=0 kern_guid=35c775e7-3735-d745-93e5-d9e0238f7ed0 add_efi_memmap noresume i915.modeset=1 tpm_tis.force=1 tpm_tis.interrupts=0 nmi_watchdog=panic,lapic disablevmx=off
+  Initrd addr max     : 7fffffff
+  Kernel alignment    : 200000
+  Relocatable kernel  : 1
+  Min alignment       : 15
+                      : 200000
+  Xload flags         : 3
+                      : 64-bit-entry can-load-above-4gb
+  Cmdline size        : 7ff
+  Hardware subarch    : 0
+  HW subarch data     : 0
+  Payload offset      : 26e
+  Payload length      : 612045
+  Setup data          : 0
+  Pref address        : 1000000
+  Init size           : 1383000
+  Handover offset     : 0
+
+  Starting kernel ...
+
+  Timer summary in microseconds (17 records):
+         Mark    Elapsed  Stage
+            0          0  reset
+      155,279    155,279  TPL
+      237,088     81,809  end phase
+      237,533        445  SPL
+      816,456    578,923  end phase
+      817,357        901  board_init_f
+    1,061,751    244,394  board_init_r
+    1,402,435    340,684  id=64
+    1,430,071     27,636  main_loop
+    5,532,057  4,101,986  start_kernel
+
+  Accumulated time:
+                     685  dm_r
+                   2,817  fast_spi
+                  33,095  dm_spl
+                  52,468  dm_f
+                 208,242  fsp-m
+                 242,221  fsp-s
+                 332,710  mmap_spi
+
+
+Boot flow - TPL
+---------------
+
+Apollo Lake boots via an IFWI (Integrated Firmware Image). TPL is placed in
+this, in the IBBL entry.
+
+On boot, an on-chip microcontroller called the CSE (Converged Security Engine)
+sets up some SDRAM at ffff8000 and loads the TPL image to that address. The
+SRAM extends up to the top of 32-bit address space, but the last 2KB is the
+start16 region, so the TPL image must be 30KB at most, and CONFIG_TPL_TEXT_BASE
+must be ffff8000. Actually the start16 region is small and it could probably
+move from f800 to fe00, providing another 1.5KB, but TPL is only about 19KB so
+there is no need to change it at present. The size limit is enforced by
+CONFIG_TPL_SIZE_LIMIT to avoid producing images that won't boot.
+
+TPL (running from start.S) first sets up CAR (Cache-as-RAM) which provides
+larger area of RAM for use while booting. CAR is mapped at CONFIG_SYS_CAR_ADDR
+(fef00000) and is 768KB in size. It then sets up the stack in the botttom 64KB
+of this space (i.e. below fef10000). This means that the stack and early
+malloc() region in TPL can be 64KB at most.
+
+TPL operates without CONFIG_TPL_PCI enabled so PCI config access must use the
+x86-specific functions pci_x86_write_config(), etc. SPL creates a simple-bus
+device so that PCI devices are bound by driver model. Then arch_cpu_init_tpl()
+is called to early init on various devices. This includes placing PCI devices
+at hard-coded addresses in the memory map. PCI auto-config is not used.
+
+Most of the 16KB ROM is mapped into the very top of memory, except for the
+Intel descriptor (first 4KB) and the space for SRAM as above.
+
+TPL does not set up a bloblist since at present it does not have anything to
+pass to SPL.
+
+Once TPL is done it loads SPL from ROM using either the memory-mapped SPI or by
+using the Intel fast SPI driver. SPL is loaded into CAR, at the address given
+by CONFIG_SPL_TEXT_BASE, which is normally fef10000.
+
+Note that booting using the SPI driver results in an TPL image that is about
+26KB in size instead of 19KB. Also boot speed is worse by about 340ms. If you
+really want to use the driver, enable CONFIG_APL_SPI_FLASH_BOOT and set
+BOOT_FROM_FAST_SPI_FLASH to true[2].
+
+
+Boot flow - SPL
+---------------
+
+SPL (running from start_from_tpl.S) continues to use the same stack as TPL.
+It calls arch_cpu_init_spl() to set up a few devices, then init_dram() loads
+the FSP-M binary into CAR and runs to, to set up SDRAM. The address of the
+output 'HOB' list (Hand-off-block) is stored into gd->arch.hob_list for parsing.
+There is a 2GB chunk of SDRAM starting at 0 and the rest is at 4GB.
+
+PCI auto-config is not used in SPL either, but CONFIG_SPL_PCI is defined, so
+proper PCI access is available and normal dm_pci_read_config() calls can be
+used. However PCI auto-config is not used so the same static memory mapping set
+up by TPL is still active.
+
+SPL on x86 always runs with CONFIG_SPL_SEPARATE_BSS=y and BSS is at 120000
+(see u-boot-spl.lds). This works because SPL doesn't access BSS until after
+board_init_r(), as per the rules, and DRAM is available then.
+
+SPL sets up a bloblist and passes the SPL hand-off information to U-Boot proper.
+This includes a pointer to the HOB list as well as DRAM information. See
+struct arch_spl_handoff. The bloblist address is set by CONFIG_BLOBLIST_ADDR,
+normally 100000.
+
+SPL uses SPI flash to update the MRC caches in ROM. This speeds up subsequent
+boots. Be warned that SPL can take 30 seconds without this cache! This is a
+known issue with Intel SoCs with modern DRAM and apparently cannot be improved.
+The MRC caches are used to work around this.
+
+Once SPL is finished it loads U-Boot into SDRAM at CONFIG_TEXT_BASE, which
+is normally 1110000. Note that CAR is still active.
+
+
+Boot flow - U-Boot pre-relocation
+---------------------------------
+
+U-Boot (running from start_from_spl.S) starts running in RAM and uses the same
+stack as SPL. It does various init activities before relocation. Notably
+fsp_setup_pinctrl() sets up the pin muxing for the chip using a very large table
+in the device tree.
+
+PCI auto-config is not used before relocation, but CONFIG_PCI of course is
+defined, so proper PCI access is available. The same static memory mapping set
+up by TPL is still active until relocation.
+
+As per usual, U-Boot allocates memory at the top of available RAM (a bit below
+2GB in this case) and copies things there ready to relocate itself. Notably
+reserve_arch() does not reserve space for the HOB list returned by FSP-M since
+this is already located in RAM.
+
+U-Boot then shuts down CAR and jumps to its relocated version.
+
+
+Boot flow - U-Boot post-relocation
+----------------------------------
+
+U-Boot starts up normally, running near the top of RAM. After driver model is
+running, arch_fsp_init_r() is called which loads and runs the FSP-S binary.
+This updates the HOB list to include graphics information, used by the fsp_video
+driver.
+
+PCI autoconfig is done and a few devices are probed to complete init. Most
+others are started only when they are used.
+
+Note that FSP-S is supposed to run after CAR has been shut down, which happens
+immediately before U-Boot starts up in its relocated position. Therefore we
+cannot run FSP-S before relocation. On the other hand we must run it before
+PCI auto-config is done, since FSP-S may show or hide devices. The first device
+that probes PCI after relocation is the serial port, in initr_serial(), so FSP-S
+must run before that. A corollary is that loading FSP-S must be done without
+using the SPI driver, to avoid probing PCI and causing an autoconfig, so
+memory-mapped reading is always used for FSP-S.
+
+It would be possible to tear down CAR in SPL instead of U-Boot. The SPL handoff
+information could make sure it does not include any pointers into CAR (in fact
+it doesn't). But tearing down CAR in U-Boot allows the initial state used by TPL
+and SPL to be read by U-Boot, which seems useful. It also matches how older
+platforms start up (those that don't use SPL).
+
+
+Performance
+-----------
+
+Bootstage is used through all phases of U-Boot to keep accurate timimgs for
+boot. Use 'bootstage report' in U-Boot to see the report, e.g.::
+
+    Timer summary in microseconds (16 records):
+           Mark    Elapsed  Stage
+              0          0  reset
+        155,325    155,325  TPL
+        204,014     48,689  end TPL
+        204,385        371  SPL
+        738,633    534,248  end SPL
+        739,161        528  board_init_f
+        842,764    103,603  board_init_r
+      1,166,233    323,469  main_loop
+      1,166,283         50  id=175
+
+    Accumulated time:
+                        62  fast_spi
+                       202  dm_r
+                     7,779  dm_spl
+                    15,555  dm_f
+                   208,357  fsp-m
+                   239,847  fsp-s
+                   292,143  mmap_spi
+
+CPU performance is about 3500 DMIPS::
+
+    => dhry
+    1000000 iterations in 161 ms: 6211180/s, 3535 DMIPS
+
+
+Partial memory map
+------------------
+
+::
+
+    ffffffff       Top of ROM (and last byte of 32-bit address space)
+    ffff8000       TPL loaded here (from IFWI)
+    ff000000       Bottom of ROM
+    fefc0000       Top of CAR region
+    fef96000       Stack for FSP-M
+    fef40000 59000 FSP-M (also VPL loads here)
+    fef11000       SPL loaded here
+    fef10000       CONFIG_BLOBLIST_ADDR
+    fef10000       Stack top in TPL, SPL and U-Boot before relocation
+    fef00000  1000 CONFIG_BOOTSTAGE_STASH_ADDR
+    fef00000       Base of CAR region
+
+       30000       AP_DEFAULT_BASE (used to start up additional CPUs)
+       f0000       CONFIG_ROM_TABLE_ADDR
+      120000       BSS (defined in u-boot-spl.lds)
+      200000       FSP-S (which is run after U-Boot is relocated)
+     1110000       CONFIG_TEXT_BASE
+
+
+Speeding up SPL for development
+-------------------------------
+
+The 21-second wait for memory training is annoying during development, since
+every new image incurs this cost when booting. There is no cache to fall back on
+since that area of the image is empty on start-up.
+
+You can add suitable cache contents to the image to fix this, for development
+purposes only, like this::
+
+   # Read the image back after booting through SPL
+   em100 -s -c w25q128fw -u image.bin
+
+   # Extract the two cache regions
+   binman extract -i image.bin extra *cache
+
+   # Move them into the source directory
+   mv *cache board/google/chromebook_coral
+
+Then add something like this to the devicetree::
+
+  #if IS_ENABLED(CONFIG_HAVE_MRC) || IS_ENABLED(CONFIG_FSP_VERSION2)
+     /* Provide initial contents of the MRC data for faster development */
+     rw-mrc-cache {
+        type = "blob";
+        /* Mirror the offset in spi-flash@0 */
+        offset = <0xff8e0000>;
+        size = <0x10000>;
+        filename = "board/google/chromebook_coral/rw-mrc-cache";
+     };
+     rw-var-mrc-cache {
+        type = "blob";
+        size = <0x1000>;
+        filename = "board/google/chromebook_coral/rw-var-mrc-cache";
+     };
+  #endif
+
+This tells binman to put the cache contents in the same place as the
+`rw-mrc-cache` and `rw-var-mrc-cache` regions defined by the SPI-flash driver.
+
+
+Supported peripherals
+---------------------
+
+The following have U-Boot drivers:
+
+   - UART
+   - SPI flash
+   - Video
+   - MMC (dev 0) and micro-SD (dev 1)
+   - Chrome OS EC
+   - Cr50 (security chip)
+   - Keyboard
+   - USB
+
+
+To do
+-----
+
+- Finish peripherals
+   - Sound (Intel I2S support exists, but need da7219 driver)
+- Use FSP-T binary instead of our own CAR implementation
+- Use the official FSP package instead of the coreboot one
+- Suspend / resume
+- Fix MMC which seems to try to read even though the card is empty
+- Fix USB3 crash "WARN halted endpoint, queueing URB anyway."
+
+
+Credits
+-------
+
+This is a spare-time project conducted slowly over a long period of time.
+
+Much of the code for this port came from Coreboot, an open-source firmware
+project similar to U-Boot's SPL in terms of features.
+
+Also see [2] for information about the boot flow used by coreboot. It is
+similar, but has an extra postcar stage. U-Boot doesn't need this since it
+supports relocating itself in memory.
+
+
+[2] Intel PDF https://www.coreboot.org/images/2/23/Apollolake_SoC.pdf
diff --git a/doc/board/google/chromebook_link.rst b/doc/board/google/chromebook_link.rst
new file mode 100644
index 00000000000..16080304d6e
--- /dev/null
+++ b/doc/board/google/chromebook_link.rst
@@ -0,0 +1,34 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Chromebook Link
+===============
+
+First, you need the following binary blobs:
+
+   * descriptor.bin - Intel flash descriptor
+   * me.bin - Intel Management Engine
+   * mrc.bin - Memory Reference Code, which sets up SDRAM
+   * video ROM - sets up the display
+
+You can get these binary blobs by::
+
+   $ git clone http://review.coreboot.org/p/blobs.git
+   $ cd blobs
+
+Find the following files:
+
+   * ./mainboard/google/link/descriptor.bin
+   * ./mainboard/google/link/me.bin
+   * ./northbridge/intel/sandybridge/systemagent-r6.bin
+
+The 3rd one should be renamed to mrc.bin.
+As for the video ROM, you can get it `here`_ and rename it to vga.bin.
+Make sure all these binary blobs are put in the board directory.
+
+Now you can build U-Boot and obtain u-boot.rom::
+
+   $ make chromebook_link_defconfig
+   $ make all
+
+.. _here: http://www.coreboot.org/~stepan/pci8086,0166.rom
diff --git a/doc/board/google/chromebook_samus.rst b/doc/board/google/chromebook_samus.rst
new file mode 100644
index 00000000000..822ba575e2f
--- /dev/null
+++ b/doc/board/google/chromebook_samus.rst
@@ -0,0 +1,101 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Chromebook Samus
+================
+
+First, you need the following binary blobs:
+
+   * descriptor.bin - Intel flash descriptor
+   * me.bin - Intel Management Engine
+   * mrc.bin - Memory Reference Code, which sets up SDRAM
+   * refcode.elf - Additional Reference code
+   * vga.bin - video ROM, which sets up the display
+
+If you have a samus you can obtain them from your flash, for example, in
+developer mode on the Chromebook (use Ctrl-Alt-F2 to obtain a terminal and
+log in as 'root')::
+
+   cd /tmp
+   flashrom -w samus.bin
+   scp samus.bin username@ip_address:/path/to/somewhere
+
+If not see the coreboot tree where you can use::
+
+   bash crosfirmware.sh samus
+
+to get the image. There is also an 'extract_blobs.sh' scripts that you can use
+on the 'coreboot-Google_Samus.*' file to short-circuit some of the below.
+
+Then 'ifdtool -x samus.bin' on your development machine will produce::
+
+   flashregion_0_flashdescriptor.bin
+   flashregion_1_bios.bin
+   flashregion_2_intel_me.bin
+
+Rename flashregion_0_flashdescriptor.bin to descriptor.bin
+Rename flashregion_2_intel_me.bin to me.bin
+You can ignore flashregion_1_bios.bin - it is not used.
+
+To get the rest, use 'cbfstool samus.bin print'::
+
+   samus.bin: 8192 kB, bootblocksize 2864, romsize 8388608, offset 0x700000
+   alignment: 64 bytes, architecture: x86
+
+============================   ========   ===========  ======
+Name                           Offset     Type         Size
+============================   ========   ===========  ======
+cmos_layout.bin                0x700000   cmos_layout  1164
+pci8086,0406.rom               0x7004c0   optionrom    65536
+spd.bin                        0x710500   (unknown)    4096
+cpu_microcode_blob.bin         0x711540   microcode    70720
+fallback/romstage              0x722a00   stage        54210
+fallback/ramstage              0x72fe00   stage        96382
+config                         0x7476c0   raw          6075
+fallback/vboot                 0x748ec0   stage        15980
+fallback/refcode               0x74cd80   stage        75578
+fallback/payload               0x75f500   payload      62878
+u-boot.dtb                     0x76eb00   (unknown)    5318
+(empty)                        0x770000   null         196504
+mrc.bin                        0x79ffc0   (unknown)    222876
+(empty)                        0x7d66c0   null         167320
+============================   ========   ===========  ======
+
+You can extract what you need::
+
+   cbfstool samus.bin extract -n pci8086,0406.rom -f vga.bin
+   cbfstool samus.bin extract -n fallback/refcode -f refcode.rmod
+   cbfstool samus.bin extract -n mrc.bin -f mrc.bin
+   cbfstool samus.bin extract -n fallback/refcode -f refcode.bin -U
+
+Note that the -U flag is only supported by the latest cbfstool. It unpacks
+and decompresses the stage to produce a coreboot rmodule. This is a simple
+representation of an ELF file. You need the patch "Support decoding a stage
+with compression".
+
+Put all 5 files into board/google/chromebook_samus.
+
+Now you can build U-Boot and obtain u-boot.rom::
+
+   $ make chromebook_samus_defconfig
+   $ make all
+
+If you are using em100, then this command will flash write -Boot::
+
+   em100 -s -d filename.rom -c W25Q64CV -r
+
+Flash map for samus / broadwell:
+
+   :fffff800:	SYS_X86_START16
+   :ffff0000:	RESET_SEG_START
+   :fffd8000:	TPL_TEXT_BASE
+   :fffa0000:	X86_MRC_ADDR
+   :fff90000:	VGA_BIOS_ADDR
+   :ffed0000:	TEXT_BASE
+   :ffea0000:	X86_REFCODE_ADDR
+   :ffe70000:	SPL_TEXT_BASE
+   :ffbf8000:	CONFIG_ENV_OFFSET (environemnt offset)
+   :ffbe0000:	rw-mrc-cache (Memory-reference-code cache)
+   :ffa00000:	<spare>
+   :ff801000:	intel-me (address set by descriptor.bin)
+   :ff800000:	intel-descriptor
diff --git a/doc/board/google/index.rst b/doc/board/google/index.rst
new file mode 100644
index 00000000000..061c7977187
--- /dev/null
+++ b/doc/board/google/index.rst
@@ -0,0 +1,11 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Google
+======
+
+.. toctree::
+   :maxdepth: 2
+
+   chromebook_coral
+   chromebook_link
+   chromebook_samus
diff --git a/doc/board/highbank/highbank.rst b/doc/board/highbank/highbank.rst
new file mode 100644
index 00000000000..654ef8a0269
--- /dev/null
+++ b/doc/board/highbank/highbank.rst
@@ -0,0 +1,78 @@
+Calxeda Highbank/Midway board support
+=====================================
+
+The Calxeda ECX-1000 ("Highbank") and ECX-2000 ("Midway") were ARM based
+servers, providing high-density cluster systems. A single motherboard could
+host between 12 and 48 nodes, each with their own quad-core ARMv7
+processor, private DRAM and peripherals, connected through a high-bandwith
+and low-latency "fabric" network. Multiple motherboards could be connected
+together, to extend this fabric.
+
+For the purpose of U-Boot we just care about a single node, this can be
+used as a single system, just using the fabric to connect to some Ethernet
+network. Each node boots on its own, either from a local hard disk, or
+via the network.
+
+The earlier ECX-1000 nodes ("Highbank") contain four ARM Cortex-A9 cores,
+a Cortex-M3 system controller, three 10GBit/s MACs and five SATA
+controllers. The DRAM is limited to 4GB.
+
+The later ECX-2000 nodes ("Midway") use four Cortex-A15 cores, alongside
+two Cortex-A7 management cores, and support up to 32GB of DRAM, while
+keeping the other peripherals.
+
+For the purpose of U-Boot those two SoCs are very similar, so we offer
+one build target. The subtle differences are handled at runtime.
+Calxeda as a company is long defunct, and the remaining systems are
+considered legacy at this point.
+
+Bgilding U-Boot
+---------------
+There is only one defconfig to cover both systems::
+
+    $ make highbank_defconfig
+    $ make
+
+This will create ``u-boot.bin``, which could become part of the firmware update
+package, or could be chainloaded by the existing U-Boot, see below for more
+details.
+
+Boot process
+------------
+Upon powering up a node (which would be controlled by some BMC style
+management controller on the motherboard), the system controller ("ECME")
+would start and do some system initialisation (fabric registration,
+DRAM init, clock setup). It would load the device tree binary, some secure
+monitor code (``a9boot``/``a15boot``) and a U-Boot binary from SPI flash
+into DRAM, then power up the actual application cores (ARM Cortex-A9/A15).
+They would start executing ``a9boot``/``a15boot``, registering the PSCI SMC
+handlers, then dropping into U-Boot, but in non-secure state (HYP mode on
+the A15s).
+
+U-Boot would act as a mere loader, trying to find some ``boot.scr`` file on
+the local hard disks, or reverting to PXE boot.
+
+Updating U-Boot
+---------------
+The U-Boot binary is loaded from SPI flash, which is controlled exclusively
+by the ECME. This can be reached via IPMI using the LANplus transport protocol.
+Updating the SPI flash content requires vendor specific additions to the
+IPMI protocol, support for which was never upstreamed to ipmitool or
+FreeIPMI. Some older repositories for `ipmitool`_, the `pyipmi`_ library and
+a Python `management script`_ to update the SPI flash can be found on Github.
+
+A simpler and safer way to get an up-to-date U-Boot running, is chainloading
+it via the legacy U-Boot::
+
+    $ mkimage -A arm -O u-boot -T standalone -C none -a 0x8000 -e 0x8000 \
+      -n U-Boot -d u-boot.bin u-boot-highbank.img
+
+Then load this image file, either from hard disk, or via TFTP, from the
+existing U-Boot, and execute it with bootm::
+
+    => tftpboot 0x8000 u-boot-highbank.img
+    => bootm
+
+.. _`ipmitool`: https://github.com/Cynerva/ipmitool
+.. _`pyipmi`: https://pypi.org/project/pyipmi/
+.. _`management script`: https://github.com/Cynerva/cxmanage
diff --git a/doc/board/highbank/index.rst b/doc/board/highbank/index.rst
new file mode 100644
index 00000000000..b6975ca4964
--- /dev/null
+++ b/doc/board/highbank/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Highbank
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   highbank
diff --git a/doc/board/hisilicon/hikey.rst b/doc/board/hisilicon/hikey.rst
new file mode 100644
index 00000000000..8038a24fe16
--- /dev/null
+++ b/doc/board/hisilicon/hikey.rst
@@ -0,0 +1,261 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+HiKey board
+###########
+
+Introduction
+============
+
+HiKey is the first certified 96Boards Consumer Edition board. The board/SoC has:
+
+* HiSilicon Kirin 6220 eight-core ARM Cortex-A53 64-bit SoC running at 1.2GHz.
+* ARM Mali 450-MP4 GPU
+* 1GB 800MHz LPDDR3 DRAM
+* 4GB eMMC Flash Storage
+* microSD
+* 802.11a/b/g/n WiFi, Bluetooth
+
+The HiKey schematic can be found here:
+https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/HiKey_schematics_LeMaker_version_Rev_A1.pdf
+
+The SoC datasheet can be found here:
+https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey620/hardware-docs/Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf
+
+Currently the u-boot port supports:
+
+* USB
+* eMMC
+* SD card
+* GPIO
+
+The HiKey U-Boot port has been tested with l-loader, booting ATF, which then
+boots U-Boot as the bl33.bin executable.
+
+Compile from source
+===================
+
+First get all the sources
+
+.. code-block:: bash
+
+  mkdir -p ~/hikey/src ~/hikey/bin
+  cd ~/hikey/src
+  git clone https://github.com/96boards-hikey/edk2 -b testing/hikey960_v2.5
+  git clone https://github.com/ARM-software/arm-trusted-firmware
+  git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2
+  git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4
+  git clone https://github.com/96boards-hikey/atf-fastboot
+  wget https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/hisi-idt.py
+
+Get the BL30 mcuimage.bin binary. It is shipped as part of the UEFI source.
+The latest version can be obtained from the OpenPlatformPkg repo.
+
+.. code-block:: bash
+
+  cp OpenPlatformPkg/Platforms/Hisilicon/HiKey/Binary/mcuimage.bin ~/hikey/bin/
+
+Get nvme.img binary
+
+.. code-block:: bash
+
+  wget -P ~/hikey/bin https://snapshots.linaro.org/96boards/reference-platform/components/uefi-staging/latest/hikey/release/nvme.img
+
+Compile U-Boot
+==============
+
+.. code-block:: bash
+
+  cd ~/hikey/src/u-boot
+  make CROSS_COMPILE=aarch64-linux-gnu- hikey_config
+  make CROSS_COMPILE=aarch64-linux-gnu-
+  cp u-boot.bin ~/hikey/bin
+
+Compile ARM Trusted Firmware (ATF)
+==================================
+
+.. code-block:: bash
+
+  cd ~/hikey/src/arm-trusted-firmware
+  make CROSS_COMPILE=aarch64-linux-gnu- all fip \
+    SCP_BL2=~/hikey/bin/mcuimage.bin \
+    BL33=~/hikey/bin/u-boot.bin DEBUG=1 PLAT=hikey
+
+Copy the resulting FIP binary
+
+.. code-block:: bash
+
+  cp build/hikey/debug/fip.bin ~/hikey/bin
+
+Compile ATF Fastboot
+====================
+
+.. code-block:: bash
+
+  cd ~/hikey/src/atf-fastboot
+  make CROSS_COMPILE=aarch64-linux-gnu- PLAT=hikey DEBUG=1
+
+Compile l-loader
+================
+
+.. code-block:: bash
+
+  cd ~/hikey/src/l-loader
+  ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl1.bin
+  ln -sf ~/hikey/src/arm-trusted-firmware/build/hikey/debug/bl2.bin
+  ln -sf ~/hikey/src/atf-fastboot/build/hikey/debug/bl1.bin fastboot.bin
+  make hikey PTABLE_LST=aosp-8g
+
+Copy the resulting binaries
+
+.. code-block:: bash
+
+  cp *.img ~/hikey/bin
+  cp l-loader.bin ~/hikey/bin
+  cp recovery.bin ~/hikey/bin
+
+These instructions are adapted from
+https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey.rst
+
+Flashing
+========
+
+1. Connect the second jumper on J15 BOOT SEL, to go into recovery mode and flash l-loader.bin with
+the hisi-idt.py utility. Then connect a USB A to B mini cable from your PC to the USB OTG port of HiKey and execute the below command.
+
+The command below assumes HiKey enumerated as the first USB serial port
+
+.. code-block:: bash
+
+  sudo python ~/hikey/src/hisi-idt.py -d /dev/ttyUSB0 --img1 ~/hikey/bin/recovery.bin
+
+2. Once LED 0 comes on solid, HiKey board should be detected as a fastboot device.
+
+.. code-block::
+
+  sudo fastboot devices
+
+  0123456789ABCDEF	fastboot
+
+3. Flash the images
+
+.. code-block::
+
+  sudo fastboot flash ptable ~/hikey/bin/prm_ptable.img
+  sudo fastboot flash loader ~/hikey/bin/l-loader.bin
+  sudo fastboot flash fastboot ~/hikey/bin/fip.bin
+  sudo fastboot flash nvme ~/hikey/bin/nvme.img
+
+4. Disconnect second jumper on J15 BOOT SEL, and reset the board and you will now (hopefully)
+   have ATF, booting u-boot from eMMC.
+
+   Note: To get USB host working, also disconnect the USB OTG cable used for flashing. Otherwise you
+   will get 'dwc_otg_core_host_init: Timeout!' errors.
+
+See working boot trace below on UART3 available at Low Speed Expansion header::
+
+  NOTICE:  BL2: v1.5(debug):v1.5-694-g6d4f6aea
+  NOTICE:  BL2: Built : 09:21:42, Aug 29 2018
+  INFO:    BL2: Doing platform setup
+  INFO:    ddr3 rank1 init pass
+  INFO:    succeed to set ddrc 150mhz
+  INFO:    ddr3 rank1 init pass
+  INFO:    succeed to set ddrc 266mhz
+  INFO:    ddr3 rank1 init pass
+  INFO:    succeed to set ddrc 400mhz
+  INFO:    ddr3 rank1 init pass
+  INFO:    succeed to set ddrc 533mhz
+  INFO:    ddr3 rank1 init pass
+  INFO:    succeed to set ddrc 800mhz
+  INFO:    Samsung DDR
+  INFO:    ddr test value:0xa5a55a5a
+  INFO:    BL2: TrustZone: protecting 16777216 bytes of memory at 0x3f000000
+  INFO:    BL2: TrustZone: protecting 4194304 bytes of memory at 0x3e800000
+  INFO:    [BDID] [fff91c18] midr: 0x410fd033
+  INFO:    init_acpu_dvfs: pmic version 17
+  INFO:    init_acpu_dvfs: ACPU_CHIP_MAX_FREQ=0x186a00.
+  INFO:    acpu_dvfs_volt_init: success!
+  INFO:    acpu_dvfs_set_freq: support freq num is 5
+  INFO:    acpu_dvfs_set_freq: start prof is 0x4
+  INFO:    acpu_dvfs_set_freq: magic is 0x5a5ac5c5
+  INFO:    acpu_dvfs_set_freq: voltage:
+  INFO:      - 0: 0x49
+  INFO:      - 1: 0x49
+  INFO:      - 2: 0x50
+  INFO:      - 3: 0x60
+  INFO:      - 4: 0x78
+  NOTICE:  acpu_dvfs_set_freq: set acpu freq success!INFO:    BL2: Loading image id 2
+  INFO:    Loading image id=2 at address 0x1000000
+  INFO:    Image id=2 loaded: 0x1000000 - 0x1023d00
+  INFO:    hisi_mcu_load_image: mcu sections 0:
+  INFO:    hisi_mcu_load_image:  src  = 0x1000200
+  INFO:    hisi_mcu_load_image:  dst  = 0xf6000000
+  INFO:    hisi_mcu_load_image:  size = 31184
+  INFO:    hisi_mcu_load_image:  [SRC 0x1000200] 0x8000 0x3701 0x7695 0x7689
+  INFO:    hisi_mcu_load_image:  [DST 0xf6000000] 0x8000 0x3701 0x7695 0x7689
+  INFO:    hisi_mcu_load_image: mcu sections 1:
+  INFO:    hisi_mcu_load_image:  src  = 0x1007bd0
+  INFO:    hisi_mcu_load_image:  dst  = 0x5e00000
+  INFO:    hisi_mcu_load_image:  size = 93828
+  INFO:    hisi_mcu_load_image:  [SRC 0x1007bd0] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
+  INFO:    hisi_mcu_load_image:  [DST 0x5e00000] 0xf000b510 0x2103fb3d 0xf0004604 0xf003fb57
+  INFO:    hisi_mcu_load_image: mcu sections 2:
+  INFO:    hisi_mcu_load_image:  src  = 0x101ea54
+  INFO:    hisi_mcu_load_image:  dst  = 0x5e16e84
+  INFO:    hisi_mcu_load_image:  size = 15428
+  INFO:    hisi_mcu_load_image:  [SRC 0x101ea54] 0x9 0x1020640 0x10001 0x8f0d180
+  INFO:    hisi_mcu_load_image:  [DST 0x5e16e84] 0x9 0x1020640 0x10001 0x8f0d180
+  INFO:    hisi_mcu_load_image: mcu sections 3:
+  INFO:    hisi_mcu_load_image:  src  = 0x1022698
+  INFO:    hisi_mcu_load_image:  dst  = 0x5e22a10
+  INFO:    hisi_mcu_load_image:  size = 3060
+  INFO:    hisi_mcu_load_image:  [SRC 0x1022698] 0x0 0x0 0x0 0x0
+  INFO:    hisi_mcu_load_image:  [DST 0x5e22a10] 0x0 0x0 0x0 0x0
+  INFO:    hisi_mcu_load_image: mcu sections 4:
+  INFO:    hisi_mcu_load_image:  src  = 0x102328c
+  INFO:    hisi_mcu_load_image:  dst  = 0x5e23604
+  INFO:    hisi_mcu_load_image:  size = 2616
+  INFO:    hisi_mcu_load_image:  [SRC 0x102328c] 0xf80000a0 0x0 0xf80000ac 0x0
+  INFO:    hisi_mcu_load_image:  [DST 0x5e23604] 0xf80000a0 0x0 0xf80000ac 0x0
+  INFO:    hisi_mcu_start_run: AO_SC_SYS_CTRL2=0
+  INFO:    plat_hikey_bl2_handle_scp_bl2: MCU PC is at 0x42933301
+  INFO:    plat_hikey_bl2_handle_scp_bl2: AO_SC_PERIPH_CLKSTAT4 is 0x3b018f09
+  WARNING: BL2: Platform setup already done!!
+  INFO:    BL2: Loading image id 3
+  INFO:    Loading image id=3 at address 0xf9858000
+  INFO:    Image id=3 loaded: 0xf9858000 - 0xf9860058
+  INFO:    BL2: Loading image id 5
+  INFO:    Loading image id=5 at address 0x35000000
+  INFO:    Image id=5 loaded: 0x35000000 - 0x35061cd2
+  NOTICE:  BL2: Booting BL31
+  INFO:    Entry point address = 0xf9858000
+  INFO:    SPSR = 0x3cd
+  NOTICE:  BL31: v1.5(debug):v1.5-694-g6d4f6aea
+  NOTICE:  BL31: Built : 09:21:44, Aug 29 2018
+  WARNING: Using deprecated integer interrupt array in gicv2_driver_data_t
+  WARNING: Please migrate to using an interrupt_prop_t array
+  INFO:    ARM GICv2 driver initialized
+  INFO:    BL31: Initializing runtime services
+  INFO:    BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied
+  INFO:    BL31: cortex_a53: CPU workaround for 843419 was applied
+  INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied
+  INFO:    BL31: Preparing for EL3 exit to normal world
+  INFO:    Entry point address = 0x35000000
+  INFO:    SPSR = 0x3c9
+
+  U-Boot 2018.09-rc1 (Aug 22 2018 - 14:55:49 +0530)hikey
+
+  DRAM:  990 MiB
+  HI6553 PMIC init
+  MMC:   config_sd_carddetect: SD card present
+  Hisilicon DWMMC: 0, Hisilicon DWMMC: 1
+  Loading Environment from FAT... Unable to use mmc 1:1... Failed (-5)
+  In:    uart@f7113000
+  Out:   uart@f7113000
+  Err:   uart@f7113000
+  Net:   Net Initialization Skipped
+  No ethernet found.
+  Hit any key to stop autoboot:  0
+  starting USB...
+  USB0:   scanning bus 0 for devices... 2 USB Device(s) found
+         scanning usb for storage devices... 0 Storage Device(s) found
+         scanning usb for ethernet devices... 0 Ethernet Device(s) found
diff --git a/doc/board/hisilicon/hikey960.rst b/doc/board/hisilicon/hikey960.rst
new file mode 100644
index 00000000000..93e983b99f1
--- /dev/null
+++ b/doc/board/hisilicon/hikey960.rst
@@ -0,0 +1,284 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+HiKey960 board
+##############
+
+Introduction
+============
+
+HiKey960 is one of the 96Boards Consumer Edition board from HiSilicon.
+The board/SoC has:
+
+* HiSilicon Kirin960 (HI3660) SoC with 4xCortex-A73 and 4xCortex-A53
+* ARM Mali G71 MP8 GPU
+* 3GB LPDDR4 SDRAM
+* 32GB UFS Flash Storage
+* microSD
+* 802.11a/b/g/n WiFi, Bluetooth
+
+More information about this board can be found in 96Boards website:
+https://www.96boards.org/product/hikey960/
+
+Currently the u-boot port supports:
+
+* SD card
+
+Compile from source
+===================
+
+First get all the sources
+
+.. code-block:: bash
+
+  mkdir -p ~/hikey960/src ~/hikey960/bin
+  cd ~/hikey960/src
+  git clone https://github.com/ARM-software/arm-trusted-firmware
+  git clone https://github.com/96boards-hikey/OpenPlatformPkg -b testing/hikey960_v1.3.4
+  git clone https://github.com/96boards-hikey/l-loader -b testing/hikey960_v1.2
+  wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/config
+  wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_usb_xloader.img
+  wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_uce_boot.img
+  wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hisi-sec_xloader.img
+  wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/recovery.bin
+  wget http://snapshots.linaro.org/reference-platform/components/uefi-staging/123/hikey960/release/hikey_idt
+
+Get the SCP_BL2 lpm3.img binary. It is shipped as part of the UEFI source.
+The latest version can be obtained from the OpenPlatformPkg repo.
+
+.. code-block:: bash
+
+  cp OpenPlatformPkg/Platforms/Hisilicon/HiKey960/Binary/lpm3.img ~/hikey960/bin/
+
+Compile U-Boot
+==============
+
+.. code-block:: bash
+
+  cd ~/hikey960/src/u-boot
+  make CROSS_COMPILE=aarch64-linux-gnu- hikey960_defconfig
+  make CROSS_COMPILE=aarch64-linux-gnu-
+  cp u-boot.bin ~/hikey960/bin/
+
+Compile ARM Trusted Firmware (ATF)
+==================================
+
+.. code-block:: bash
+
+  cd ~/hikey960/src/arm-trusted-firmware
+  make CROSS_COMPILE=aarch64-linux-gnu- all fip \
+    SCP_BL2=~/hikey960/bin/lpm3.img \
+    BL33=~/hikey960/bin/u-boot.bin DEBUG=1 PLAT=hikey960
+
+Copy the resulting FIP binary
+
+.. code-block:: bash
+
+  cp build/hikey960/debug/fip.bin ~/hikey960/bin
+
+Compile l-loader
+================
+
+.. code-block:: bash
+
+  cd ~/hikey960/src/l-loader
+  ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl1.bin
+  ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/bl2.bin
+  ln -sf ~/hikey960/src/arm-trusted-firmware/build/hikey960/debug/fip.bin
+  ln -sf ~/hikey960/bin/u-boot.bin
+  make hikey960 PTABLE_LST=linux-32g NS_BL1U=u-boot.bin
+
+Copy the resulting binaries
+
+.. code-block:: bash
+
+  cp *.img ~/hikey960/bin
+  cp l-loader.bin ~/hikey960/bin
+
+These instructions are adapted from
+https://github.com/ARM-software/arm-trusted-firmware/blob/master/docs/plat/hikey960.rst
+
+Setup console
+=============
+
+Install ser2net. Use telnet as the console since UEFI in recovery mode
+output window fails to display in minicom.
+
+.. code-block:: bash
+
+  sudo apt-get install ser2net
+
+Configure ser2net
+
+.. code-block:: bash
+
+  sudo vi /etc/ser2net.conf
+
+Append one line for serial-over-USB in #ser2net.conf
+
+  2004:telnet:0:/dev/ttyUSB0:115200 8DATABITS NONE 1STOPBIT banner
+
+Start ser2net
+
+.. code-block:: bash
+
+  sudo killall ser2net
+  sudo ser2net -u
+
+Open the console.
+
+.. code-block:: bash
+
+  telnet localhost 2004
+
+And you could open the console remotely, too.
+
+Flashing
+========
+
+1. Boot Hikey960 into recovery mode as per the below document:
+https://github.com/96boards/documentation/blob/master/consumer/hikey/hikey960/installation/board-recovery.md
+
+Once Hikey960 is in recovery mode, flash the recovery binary:
+
+.. code-block:: bash
+
+  cd ~/hikey960/src
+  chmod +x ./hikey_idt
+  sudo ./hikey_idt -c config -p /dev/ttyUSB1
+
+Now move to the Hikey960 console and press `f` during UEFI boot. This
+will allow the board to boot into fastboot mode. Once the board is in
+fastboot mode, you should see the ID of the HiKey960 board using the
+following command
+
+.. code-block:: bash
+
+  sudo fastboot devices
+
+  1ED3822A018E3372	fastboot
+
+3. Flash the images
+
+Now, the images can be flashed using fastboot:
+
+.. code-block:: bash
+
+  sudo fastboot flash ptable ~/hikey960/bin/prm_ptable.img
+  sudo fastboot flash xloader ~/hikey960/bin/hisi-sec_xloader.img
+  sudo fastboot flash fastboot ~/hikey960/bin/l-loader.bin
+  sudo fastboot flash fip ~/hikey960/bin/fip.bin
+
+4. Set the "Boot Mode" switch to OFF position for normal boot mode.
+Then power on HiKey960
+
+Observe the console traces using UART6 on the Low Speed Expansion header::
+
+  NOTICE:  BL2: v2.1(debug):v2.1-531-g3ee48f40
+  NOTICE:  BL2: Built : 18:15:58, Aug  2 2019
+  INFO:    BL2: Doing platform setup
+  INFO:    UFS LUN0 contains 1024 blocks with 4096-byte size
+  INFO:    UFS LUN1 contains 1024 blocks with 4096-byte size
+  INFO:    UFS LUN2 contains 2048 blocks with 4096-byte size
+  INFO:    UFS LUN3 contains 7805952 blocks with 4096-byte size
+  INFO:    ufs: change power mode success
+  INFO:    BL2: Loading image id 2
+  INFO:    Loading image id=2 at address 0x89c80000
+  INFO:    Image id=2 loaded: 0x89c80000 - 0x89cb5088
+  INFO:    BL2: Initiating SCP_BL2 transfer to SCP
+  INFO:    BL2: SCP_BL2: 0x89c80000@0x35088
+  INFO:    BL2: SCP_BL2 HEAD:
+  INFO:    BL2: SCP_BL2 0x7000 0x179 0x159 0x149
+  INFO:    BL2: SCP_BL2 0x189 0x18b 0x18d 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x18f
+  INFO:    BL2: SCP_BL2 0x191 0x0 0x193 0x195
+  INFO:    BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
+  INFO:    BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
+  INFO:    BL2: SCP_BL2 0x18fd 0x18fd 0x18fd 0x18fd
+  INFO:    BL2: SCP_BL2 0x4d454355 0x43494741 0x424d554e 0x21215245
+  INFO:    BL2: SCP_BL2 0x4a054904 0x42912000 0xf841bfbc 0xe7fa0b04
+  INFO:    BL2: SCP_BL2 0xb88cf000 0x3b18 0x3d1c 0x6809493e
+  INFO:    BL2: SCP_BL2 0x4613680a 0x201f102 0xf0002a04 0x600a804c
+  INFO:    BL2: SCP_BL2 0x204f04f 0xf203fb02 0xf102440a 0x60100204
+  INFO:    BL2: SCP_BL2 0x160f04f 0xf103fb01 0x68004834 0x61044408
+  INFO:    BL2: SCP_BL2 0x61866145 0xf8c061c7 0xf8c08020 0xf8c09024
+  INFO:    BL2: SCP_BL2 0xf8c0a028 0xf3efb02c 0xf3ef8208 0x68118309
+  INFO:    BL2: SCP_BL2 0xf1026401 0xf0110204 0xbf070f04 0x46113220
+  INFO:    BL2: SCP_BL2 TAIL:
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x19cad151 0x19b80040 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 0x0 0x0 0x0 0x0
+  INFO:    BL2: SCP_BL2 transferred to SCP
+  INFO:    start fw loading
+  INFO:    fw load success
+  WARNING: BL2: Platform setup already done!!
+  INFO:    BL2: Loading image id 3
+  INFO:    Loading image id=3 at address 0x1ac58000
+  INFO:    Image id=3 loaded: 0x1ac58000 - 0x1ac63024
+  INFO:    BL2: Loading image id 5
+  INFO:    Loading image id=5 at address 0x1ac98000
+  INFO:    Image id=5 loaded: 0x1ac98000 - 0x1ad0819c
+  NOTICE:  BL2: Booting BL31
+  INFO:    Entry point address = 0x1ac58000
+  INFO:    SPSR = 0x3cd
+  NOTICE:  BL31: v2.1(debug):v2.1-531-g3ee48f40
+  NOTICE:  BL31: Built : 18:16:01, Aug  2 2019
+  INFO:    ARM GICv2 driver initialized
+  INFO:    BL31: Initializing runtime services
+  INFO:    BL31: cortex_a53: CPU workaround for 855873 was applied
+  INFO:    plat_setup_psci_ops: sec_entrypoint=0x1ac580fc
+  INFO:    BL31: Preparing for EL3 exit to normal world
+  INFO:    Entry point address = 0x1ac98000
+  INFO:    SPSR = 0x3c9
+
+  U-Boot 2019.07-00628-g286f05a6fc-dirty (Aug 02 2019 - 17:14:05 +0530)
+  Hikey960
+
+  DRAM:  3 GiB
+  PSCI:  v1.1
+  MMC:   dwmmc1@ff37f000: 0
+  Loading Environment from EXT4... ** File not found /uboot.env **
+
+  ** Unable to read "/uboot.env" from mmc0:2 **
+  In:    serial@fff32000
+  Out:   serial@fff32000
+  Err:   serial@fff32000
+  Net:   Net Initialization Skipped
+  No ethernet found.
+  Hit any key to stop autoboot:  0
+  switch to partitions #0, OK
+  mmc0 is current device
+  Scanning mmc 0:1...
+  Found /extlinux/extlinux.conf
+  Retrieving file: /extlinux/extlinux.conf
+  201 bytes read in 12 ms (15.6 KiB/s)
+  1:      hikey960-kernel
+  Retrieving file: /Image
+  24689152 bytes read in 4377 ms (5.4 MiB/s)
+  append: earlycon=pl011,mmio32,0xfff32000 console=ttyAMA6,115200 rw root=/dev/mmcblk0p2 rot
+  Retrieving file: /hi3660-hikey960.dtb
+  35047 bytes read in 14 ms (2.4 MiB/s)
+  ## Flattened Device Tree blob at 10000000
+     Booting using the fdt blob at 0x10000000
+     Using Device Tree in place at 0000000010000000, end 000000001000b8e6
+
+  Starting kernel ...
+
+  [  0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
+  [  0.000000] Linux version 5.2.0-03138-gd75da80dce39 (mani@Mani-XPS-13-9360) (gcc versi9
+  [  0.000000] Machine model: HiKey960
+  [  0.000000] earlycon: pl11 at MMIO32 0x00000000fff32000 (options '')
+  [  0.000000] printk: bootconsole [pl11] enabled
+  [  0.000000] efi: Getting EFI parameters from FDT:
diff --git a/doc/board/hisilicon/index.rst b/doc/board/hisilicon/index.rst
new file mode 100644
index 00000000000..5455b766f29
--- /dev/null
+++ b/doc/board/hisilicon/index.rst
@@ -0,0 +1,11 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+HiSilicon
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   hikey
+   hikey960
+   poplar
diff --git a/doc/board/hisilicon/poplar.rst b/doc/board/hisilicon/poplar.rst
new file mode 100644
index 00000000000..0fccc14b807
--- /dev/null
+++ b/doc/board/hisilicon/poplar.rst
@@ -0,0 +1,302 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Poplar board
+############
+
+Board Information
+=================
+
+Developed by HiSilicon, the board features the Hi3798C V200 with an
+integrated quad-core 64-bit ARM Cortex A53 processor and high
+performance Mali T720 GPU, making it capable of running any commercial
+set-top solution based on Linux or Android. Its high performance
+specification also supports a premium user experience with up to H.265
+HEVC decoding of 4K video at 60 frames per second.
+
+* SOC  Hisilicon Hi3798CV200
+* CPU  Quad-core ARM Cortex-A53 64 bit
+* DRAM DDR3/3L/4 SDRAM interface, maximum 32-bit data width 2 GB
+* USB  Two USB 2.0 ports One USB 3.0 ports
+* CONSOLE  USB-micro port for console support
+* ETHERNET  1 GBe Ethernet
+* PCIE  One PCIe 2.0 interfaces
+* JTAG  8-Pin JTAG
+* EXPANSION INTERFACE  Linaro 96Boards Low Speed Expansion slot
+* DIMENSION Standard 160×120 mm 96Boards Enterprice Edition form factor
+* WIFI  802.11AC 2*2 with Bluetooth
+* CONNECTORS  One connector for Smart Card One connector for TSI
+
+Build instructions
+==================
+
+.. note::
+
+  U-Boot has a **strong** dependency with the l-loader and the ARM trusted
+  firmware repositories.
+
+The boot sequence is::
+
+    l-loader --> arm_trusted_firmware --> U-Boot
+
+U-Boot needs to be aware of the BL31 runtime location and size to avoid writing
+over it. Currently, BL31 is being placed below the kernel text offset (check
+poplar.c) but this could change in the future.
+
+The current version of U-Boot has been tested with
+
+- https://github.com/Linaro/poplar-l-loader.git::
+
+    commit f0988698dcc5c08bd0a8f50aa0457e138a5f438c
+    Author: Alex Elder <elder@linaro.org>
+    Date:   Fri Jun 16 08:57:59 2017 -0500
+
+    l-loader: use external memory region definitions
+
+    The ARM Trusted Firmware code now has a header file that collects
+    all the definitions for the memory regions used for its boot stages.
+    Include that file where needed, and use the definitions found therein
+
+    Signed-off-by: Alex Elder <elder@linaro.org>
+
+- https://github.com/Linaro/poplar-arm-trusted-firmware.git::
+
+    commit 6ac42dd3be13c99aa8ce29a15073e2f19d935f68
+    Author: Alex Elder <elder@linaro.org>
+    Date:   Fri Jun 16 09:24:50 2017 -0500
+
+    poplar: define memory regions in a separate file
+
+    Separate the definitions for memory regions used for the BL stage
+    images and FIP into a new file.  The "l-loader" image uses knowledge
+    of the sizes and locations of these memory regions, and it can now
+    include this (external) header to get these definitions, rather than
+    having to make coordinated changes to both code bases.
+
+    The new file has a complete set of definitions (more than may be
+    required by one or the other user).  It also includes a summary of
+    how the boot process works, and how it uses these regions.
+
+    It should now be relatively easy to adjust the sizes and locations
+    of these memory regions, or to add to them (e.g. for TEE).
+
+    Signed-off-by: Alex Elder <elder@linaro.org>
+
+
+Compile from source
+-------------------
+
+Get all the sources
+
+.. code-block:: bash
+
+  mkdir -p ~/poplar/src ~/poplar/bin
+  cd ~/poplar/src
+  git clone https://github.com/Linaro/poplar-l-loader.git l-loader
+  git clone https://github.com/Linaro/poplar-arm-trusted-firmware.git atf
+  git clone https://github.com/Linaro/poplar-U-Boot.git U-Boot
+
+Make sure you are using the correct branch on each one of these repositories.
+The definition of "correct" might change over time (at this moment in time this
+would be the "latest" branch).
+
+Compile U-Boot
+~~~~~~~~~~~~~~
+
+Prerequisite:
+
+.. code-block:: bash
+
+  sudo apt-get install device-tree-compiler
+
+.. code-block:: bash
+
+  cd ~/poplar/src/U-Boot
+  make CROSS_COMPILE=aarch64-linux-gnu- poplar_defconfig
+  make CROSS_COMPILE=aarch64-linux-gnu-
+  cp U-Boot.bin ~/poplar/bin
+
+Compile ARM Trusted Firmware (ATF)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: bash
+
+  cd ~/poplar/src/atf
+  make CROSS_COMPILE=aarch64-linux-gnu- all fip \
+       SPD=none BL33=~/poplar/bin/U-Boot.bin DEBUG=1 PLAT=poplar
+
+Copy resulting binaries
+
+.. code-block:: bash
+
+  cp build/hi3798cv200/debug/bl1.bin ~/poplar/src/l-loader/atf/
+  cp build/hi3798cv200/debug/fip.bin ~/poplar/src/l-loader/atf/
+
+Compile l-loader
+~~~~~~~~~~~~~~~~
+
+.. code-block:: bash
+
+  cd ~/poplar/src/l-loader
+  make clean
+  make CROSS_COMPILE=arm-linux-gnueabi-
+
+Due to BootROM requiremets, rename l-loader.bin to fastboot.bin:
+
+.. code-block:: bash
+
+  cp l-loader.bin ~/poplar/bin/fastboot.bin
+
+Flash instructions
+==================
+
+Two methods:
+
+Using USB debrick support
+    Copy fastboot.bin to a FAT partition on the USB drive and reboot the
+    poplar board while pressing S3(usb_boot).
+
+    The system will execute the new U-Boot and boot into a shell which you
+    can then use to write to eMMC.
+
+Using U-BOOT from shell
+    1) using AXIS usb ethernet dongle and tftp
+    2) using FAT formated USB drive
+
+Flash using TFTP (USB ethernet dongle)
+--------------------------------------
+
+Plug a USB AXIS ethernet dongle on any of the USB2 ports on the Poplar board.
+Copy fastboot.bin to your tftp server.
+In U-Boot make sure your network is properly setup.
+
+Then::
+
+  => tftp 0x30000000 fastboot.bin
+  starting USB...
+  USB0:   USB EHCI 1.00
+  scanning bus 0 for devices... 1 USB Device(s) found
+  USB1:   USB EHCI 1.00
+  scanning bus 1 for devices... 3 USB Device(s) found
+         scanning usb for storage devices... 0 Storage Device(s) found
+         scanning usb for ethernet devices... 1 Ethernet Device(s) found
+  Waiting for Ethernet connection... done.
+  Using asx0 device
+  TFTP from server 192.168.1.4; our IP address is 192.168.1.10
+  Filename 'poplar/fastboot.bin'.
+  Load address: 0x30000000
+  Loading: #################################################################
+       #################################################################
+       ###############################################################
+       2 MiB/s
+  done
+  Bytes transferred = 983040 (f0000 hex)
+
+  => mmc write 0x30000000 0 0x780
+
+  MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK
+  => reset
+
+Flash using USB FAT drive
+-------------------------
+
+Copy fastboot.bin to any partition on a FAT32 formated usb flash drive.
+Enter the uboot prompt::
+
+  => fatls usb 0:2
+     983040   fastboot.bin
+
+  1 file(s), 0 dir(s)
+
+  => fatload usb 0:2 0x30000000 fastboot.bin
+  reading fastboot.bin
+  983040 bytes read in 44 ms (21.3 MiB/s)
+
+  => mmc write 0x30000000 0 0x780
+
+  MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK
+
+Boot trace
+==========
+
+::
+
+  Bootrom start
+  Boot Media: eMMC
+  Decrypt auxiliary code ...OK
+
+  lsadc voltage min: 000000FE, max: 000000FF, aver: 000000FE, index: 00000000
+
+  Entry boot auxiliary code
+
+  Auxiliary code - v1.00
+  DDR code - V1.1.2 20160205
+  Build: Mar 24 2016 - 17:09:44
+  Reg Version:  v134
+  Reg Time:     2016/03/18 09:44:55
+  Reg Name:     hi3798cv2dmb_hi3798cv200_ddr3_2gbyte_8bitx4_4layers.reg
+
+  Boot auxiliary code success
+  Bootrom success
+
+  LOADER:  Switched to aarch64 mode
+  LOADER:  Entering ARM TRUSTED FIRMWARE
+  LOADER:  CPU0 executes at 0x000ce000
+
+  INFO:    BL1: 0xe1000 - 0xe7000 [size = 24576]
+  NOTICE:  Booting Trusted Firmware
+  NOTICE:  BL1: v1.3(debug):v1.3-372-g1ba9c60
+  NOTICE:  BL1: Built : 17:51:33, Apr 30 2017
+  INFO:    BL1: RAM 0xe1000 - 0xe7000
+  INFO:    BL1: Loading BL2
+  INFO:    Loading image id=1 at address 0xe9000
+  INFO:    Image id=1 loaded at address 0xe9000, size = 0x5008
+  NOTICE:  BL1: Booting BL2
+  INFO:    Entry point address = 0xe9000
+  INFO:    SPSR = 0x3c5
+  NOTICE:  BL2: v1.3(debug):v1.3-372-g1ba9c60
+  NOTICE:  BL2: Built : 17:51:33, Apr 30 2017
+  INFO:    BL2: Loading BL31
+  INFO:    Loading image id=3 at address 0x129000
+  INFO:    Image id=3 loaded at address 0x129000, size = 0x8038
+  INFO:    BL2: Loading BL33
+  INFO:    Loading image id=5 at address 0x37000000
+  INFO:    Image id=5 loaded at address 0x37000000, size = 0x58f17
+  NOTICE:  BL1: Booting BL31
+  INFO:    Entry point address = 0x129000
+  INFO:    SPSR = 0x3cd
+  INFO:    Boot bl33 from 0x37000000 for 364311 Bytes
+  NOTICE:  BL31: v1.3(debug):v1.3-372-g1ba9c60
+  NOTICE:  BL31: Built : 17:51:33, Apr 30 2017
+  INFO:    BL31: Initializing runtime services
+  INFO:    BL31: Preparing for EL3 exit to normal world
+  INFO:    Entry point address = 0x37000000
+  INFO:    SPSR = 0x3c9
+
+  U-Boot 2017.05-rc2-00130-gd2255b0 (Apr 30 2017 - 17:51:28 +0200)poplar
+
+  Model: HiSilicon Poplar Development Board
+  BOARD: Hisilicon HI3798cv200 Poplar
+  DRAM:  1 GiB
+  MMC:   Hisilicon DWMMC: 0
+  In:    serial@f8b00000
+  Out:   serial@f8b00000
+  Err:   serial@f8b00000
+  Net:   Net Initialization Skipped
+  No ethernet found.
+
+  Hit any key to stop autoboot:  0
+  starting USB...
+  USB0:   USB EHCI 1.00
+  scanning bus 0 for devices... 1 USB Device(s) found
+  USB1:   USB EHCI 1.00
+  scanning bus 1 for devices... 4 USB Device(s) found
+         scanning usb for storage devices... 1 Storage Device(s) found
+         scanning usb for ethernet devices... 1 Ethernet Device(s) found
+
+  USB device 0:
+      Device 0: Vendor: SanDisk Rev: 1.00 Prod: Cruzer Blade
+          Type: Removable Hard Disk
+          Capacity: 7632.0 MB = 7.4 GB (15630336 x 512)
+  ... is now current device
+  Scanning usb 0:1...
+  =>
diff --git a/doc/board/htc/endeavoru.rst b/doc/board/htc/endeavoru.rst
new file mode 100644
index 00000000000..e0edefe28ae
--- /dev/null
+++ b/doc/board/htc/endeavoru.rst
@@ -0,0 +1,125 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the HTC One X (endeavoru)
+====================================
+
+``DISCLAMER!`` Moving your HTC ONe X to use U-Boot assumes replacement of the
+vendor hboot. Vendor android firmwares will no longer be able to run on the
+device. This replacement IS reversible.
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Process U-Boot
+- Flashing U-Boot into the eMMC
+- Boot
+- Self Upgrading
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ make endeavoru_defconfig
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
+image, ready for further processing.
+
+Process U-Boot
+--------------
+
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
+in re-crypt repo issues. NOT HERE!
+
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update.
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
+
+.. code-block:: bash
+
+    $ git clone https://gitlab.com/grate-driver/re-crypt.git
+    $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+    $ ./re-crypt.py --dev endeavoru
+
+The script will produce a ``repart-block.bin`` ready to flash.
+
+Processing for pre-loaded U-Boot
+********************************
+
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
+
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
+
+.. code-block:: bash
+
+    $ wheelie --blob blob.bin
+    $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
+
+When flashing is done, reboot the device.
+
+Flashing with a pre-loaded U-Boot
+*********************************
+
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+    $ fastboot flash 0.1 bct.img
+    $ fastboot flash 0.2 ebt.img
+    $ fastboot reboot
+
+Device will reboot.
+
+Boot
+----
+
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on eMMC. Additionally,
+if the Volume Down button is pressed while booting, the device will enter
+bootmenu. Bootmenu contains entries to mount eMMC as mass storage, fastboot,
+reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check
+the next chapter).
+
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
+
+Self Upgrading
+--------------
+
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the eMMC (using
+ability of u-boot to mount it). Enter bootmenu, choose update bootloader option
+with Power button and U-Boot should update itself. Once the process is
+completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/htc/index.rst b/doc/board/htc/index.rst
new file mode 100644
index 00000000000..955c9b9e03d
--- /dev/null
+++ b/doc/board/htc/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+HTC
+===
+
+.. toctree::
+   :maxdepth: 2
+
+   endeavoru
diff --git a/doc/board/index.rst b/doc/board/index.rst
new file mode 100644
index 00000000000..417c128c7af
--- /dev/null
+++ b/doc/board/index.rst
@@ -0,0 +1,65 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Board-specific doc
+==================
+
+.. toctree::
+   :maxdepth: 2
+
+   actions/index
+   advantech/index
+   andestech/index
+   allwinner/index
+   amlogic/index
+   anbernic/index
+   apple/index
+   armltd/index
+   asus/index
+   atmel/index
+   beacon/index
+   beagle/index
+   broadcom/index
+   bsh/index
+   cloos/index
+   congatec/index
+   coreboot/index
+   emulation/index
+   gateworks/index
+   google/index
+   highbank/index
+   hisilicon/index
+   htc/index
+   intel/index
+   kontron/index
+   lenovo/index
+   lg/index
+   mediatek/index
+   microchip/index
+   microsoft/index
+   nxp/index
+   openpiton/index
+   phytec/index
+   purism/index
+   qualcomm/index
+   renesas/index
+   rockchip/index
+   samsung/index
+   schneider/index
+   sielaff/index
+   siemens/index
+   sifive/index
+   sipeed/index
+   socionext/index
+   sophgo/index
+   st/index
+   starfive/index
+   ste/index
+   tbs/index
+   thead/index
+   theobroma-systems/index
+   ti/index
+   toradex/index
+   variscite/index
+   wexler/index
+   xen/index
+   xilinx/index
diff --git a/doc/board/intel/bayleybay.rst b/doc/board/intel/bayleybay.rst
new file mode 100644
index 00000000000..db97f645fdf
--- /dev/null
+++ b/doc/board/intel/bayleybay.rst
@@ -0,0 +1,29 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+Bayley Bay CRB
+==============
+
+This uses as FSP as with Crown Bay, except it is for the Atom E3800 series.
+Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at
+the time of writing). Put it in the corresponding board directory and rename
+it to fsp.bin.
+
+Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same
+board directory as vga.bin.
+
+You still need two more binary blobs. For Bayley Bay, they can be extracted
+from the sample SPI image provided in the FSP (SPI.bin at the time of writing)::
+
+   $ ./tools/ifdtool -x BayleyBay/SPI.bin
+   $ cp flashregion_0_flashdescriptor.bin board/intel/bayleybay/descriptor.bin
+   $ cp flashregion_2_intel_me.bin board/intel/bayleybay/me.bin
+
+Now you can build U-Boot and obtain u-boot.rom::
+
+   $ make bayleybay_defconfig
+   $ make all
+
+Note that the debug version of the FSP is bigger in size. If this version
+is used, CONFIG_FSP_ADDR needs to be configured to 0xfffb0000 instead of
+the default value 0xfffc0000.
diff --git a/doc/board/intel/cherryhill.rst b/doc/board/intel/cherryhill.rst
new file mode 100644
index 00000000000..151f0613f8c
--- /dev/null
+++ b/doc/board/intel/cherryhill.rst
@@ -0,0 +1,30 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+Cherry Hill CRB
+===============
+
+This uses Intel FSP for Braswell platform. Download it from Intel FSP website,
+put the .fd file to the board directory and rename it to fsp.bin.
+
+Extract descriptor.bin and me.bin from the original BIOS on the board using
+ifdtool and put them to the board directory as well.
+
+Note the FSP package for Braswell does not ship a traditional legacy VGA BIOS
+image for the integrated graphics device. Instead a new binary called Video
+BIOS Table (VBT) is shipped. Put it to the board directory and rename it to
+vbt.bin if you want graphics support in U-Boot.
+
+Now you can build U-Boot and obtain u-boot.rom::
+
+   $ make cherryhill_defconfig
+   $ make all
+
+An important note for programming u-boot.rom to the on-board SPI flash is that
+you need make sure the SPI flash's 'quad enable' bit in its status register
+matches the settings in the descriptor.bin, otherwise the board won't boot.
+
+For the on-board SPI flash MX25U6435F, this can be done by writing 0x40 to the
+status register by DediProg in: Config > Modify Status Register > Write Status
+Register(s) > Register1 Value(Hex). This is is a one-time change. Once set, it
+persists in SPI flash part regardless of the u-boot.rom image burned.
diff --git a/doc/board/intel/cougarcanyon2.rst b/doc/board/intel/cougarcanyon2.rst
new file mode 100644
index 00000000000..5e3e7a18204
--- /dev/null
+++ b/doc/board/intel/cougarcanyon2.rst
@@ -0,0 +1,24 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+Cougar Canyon 2 CRB
+===================
+
+This uses Intel FSP for 3rd generation Intel Core and Intel Celeron processors
+with mobile Intel HM76 and QM77 chipsets platform. Download it from Intel FSP
+website and put the .fd file (CHIEFRIVER_FSP_GOLD_001_09-OCTOBER-2013.fd at the
+time of writing) in the board directory and rename it to fsp.bin.
+
+Now build U-Boot and obtain u-boot.rom::
+
+   $ make cougarcanyon2_defconfig
+   $ make all
+
+The board has two 8MB SPI flashes mounted, which are called SPI-0 and SPI-1 in
+the board manual. The SPI-0 flash should have flash descriptor plus ME firmware
+and SPI-1 flash is used to store U-Boot. For convenience, the complete 8MB SPI-0
+flash image is included in the FSP package (named Rom00_8M_MB_PPT.bin). Program
+this image to the SPI-0 flash according to the board manual just once and we are
+all set. For programming U-Boot we just need to program SPI-1 flash. Since the
+default u-boot.rom image for this board is set to 2MB, it should be programmed
+to the last 2MB of the 8MB chip, address range [600000, 7FFFFF].
diff --git a/doc/board/intel/crownbay.rst b/doc/board/intel/crownbay.rst
new file mode 100644
index 00000000000..4fcf9811c1a
--- /dev/null
+++ b/doc/board/intel/crownbay.rst
@@ -0,0 +1,43 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+Crown Bay CRB
+=============
+
+U-Boot support of Intel `Crown Bay`_ board relies on a binary blob called
+Firmware Support Package (`FSP`_) to perform all the necessary initialization
+steps as documented in the BIOS Writer Guide, including initialization of the
+CPU, memory controller, chipset and certain bus interfaces.
+
+Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T,
+install it on your host and locate the FSP binary blob. Note this platform
+also requires a Chipset Micro Code (CMC) state machine binary to be present in
+the SPI flash where u-boot.rom resides, and this CMC binary blob can be found
+in this FSP package too.
+
+   * ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd
+   * ./Microcode/C0_22211.BIN
+
+Rename the first one to fsp.bin and second one to cmc.bin and put them in the
+board directory.
+
+Note the FSP release version 001 has a bug which could cause random endless
+loop during the FspInit call. This bug was published by Intel although Intel
+did not describe any details. We need manually apply the patch to the FSP
+binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP
+binary, change the following five bytes values from orginally E8 42 FF FF FF
+to B8 00 80 0B 00.
+
+As for the video ROM, you need manually extract it from the Intel provided
+BIOS for Crown Bay `here`_, using the AMI `MMTool`_. Check PCI option
+ROM ID 8086:4108, extract and save it as vga.bin in the board directory.
+
+Now you can build U-Boot and obtain u-boot.rom::
+
+   $ make crownbay_defconfig
+   $ make all
+
+.. _`Crown Bay`: http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
+.. _`FSP`: http://www.intel.com/fsp
+.. _`here`: http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html
+.. _`MMTool`: http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/
diff --git a/doc/board/intel/edison.rst b/doc/board/intel/edison.rst
new file mode 100644
index 00000000000..782d75a6745
--- /dev/null
+++ b/doc/board/intel/edison.rst
@@ -0,0 +1,170 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
+
+Edison
+======
+
+Build Instructions for U-Boot as main bootloader
+------------------------------------------------
+
+Simple you can build U-Boot and obtain u-boot.bin::
+
+   $ make edison_defconfig
+   $ make all
+
+Updating U-Boot on Edison
+-------------------------
+
+By default Intel Edison boards are shipped with preinstalled heavily
+patched U-Boot v2014.04. Though it supports DFU which we may be able to
+use.
+
+1. Prepare u-boot.bin as described in chapter above. You still need one
+   more step (if and only if you have original U-Boot), i.e. run the
+   following command::
+
+     $ truncate -s %4096 u-boot.bin
+
+2. Run your board and interrupt booting to U-Boot console. In the console
+   call::
+
+     => run do_force_flash_os
+
+3. Wait for few seconds, it will prepare environment variable and runs
+   DFU. Run DFU command from the host system::
+
+     $ dfu-util -v -d 8087:0a99 --alt u-boot0 -D u-boot.bin
+
+4. Return to U-Boot console and following hint. i.e. push Ctrl+C, and
+   reset the board::
+
+     => reset
+
+Updating U-Boot using xFSTK
+---------------------------
+
+You can also update U-Boot using the xfstk-dldr-solo tool if you can build it.
+One way to do that is to follow the `xFSTK`_ instructions. In short, after you
+install all necessary dependencies and clone repository, it will look like this:
+
+.. code-block:: sh
+
+  cd xFSTK
+  export DISTRIBUTION_NAME=ubuntu20.04
+  export BUILD_VERSION=1.8.5
+  git checkout v$BUILD_VERSION
+  ...
+
+Once you have built it, you can copy xfstk-dldr-solo to /usr/local/bin and
+libboost_program_options.so.1.54.0 to /usr/lib/i386-linux-gnu/ and with luck
+it will work. You might find this `drive`_ helpful.
+
+If it does, then you can download and unpack the Edison recovery image,
+install dfu-util, reset your board and flash U-Boot like this:
+
+.. code-block:: sh
+
+  xfstk-dldr-solo --gpflags 0x80000007 \
+      --osimage u-boot-edison.img \
+      --fwdnx recover/edison_dnx_fwr.bin \
+      --fwimage recover/edison_ifwi-dbg-00.bin \
+      --osdnx recover/edison_dnx_osr.bin
+
+This should show the following
+
+.. code-block:: none
+
+  XFSTK Downloader Solo 1.8.5
+  Copyright (c) 2015 Intel Corporation
+  Build date and time: Aug 15 2020 15:07:13
+
+  .Intel SoC Device Detection Found
+  Parsing Commandline....
+  Registering Status Callback....
+  .Initiating Download Process....
+  .......(lots of dots)........XFSTK-STATUS--Reconnecting to device - Attempt #1
+  .......(even more dots)......................
+
+You have about 10 seconds after resetting the board to type the above command.
+If you want to check if the board is ready, type:
+
+.. code-block:: none
+
+  lsusb | grep -E "8087|8086"
+  Bus 001 Device 004: ID 8086:e005 Intel Corp.
+
+If you see a device with the same ID as above, the board is waiting for your
+command.
+
+After about 5 seconds you should see some console output from the board:
+
+.. code-block:: none
+
+  ******************************
+  PSH KERNEL VERSION: b0182b2b
+  		WR: 20104000
+  ******************************
+
+  SCU IPC: 0x800000d0  0xfffce92c
+
+  PSH miaHOB version: TNG.B0.VVBD.0000000c
+
+  microkernel built 11:24:08 Feb  5 2015
+
+  ******* PSH loader *******
+  PCM page cache size = 192 KB
+  Cache Constraint = 0 Pages
+  Arming IPC driver ..
+  Adding page store pool ..
+  PagestoreAddr(IMR Start Address) = 0x04899000
+  pageStoreSize(IMR Size)          = 0x00080000
+
+  *** Ready to receive application ***
+
+After another 10 seconds the xFSTK tool completes and the board resets. About
+10 seconds after that should see the above message again and then within a few
+seconds U-Boot should start on your board:
+
+.. code-block:: none
+
+  U-Boot 2020.10-rc3 (Sep 03 2020 - 18:44:28 -0600)
+
+  CPU:   Genuine Intel(R) CPU   4000  @  500MHz
+  DRAM:  980.6 MiB
+  WDT:   Started with servicing (60s timeout)
+  MMC:   mmc@ff3fc000: 0, mmc@ff3fa000: 1
+  Loading Environment from MMC... OK
+  In:    serial
+  Out:   serial
+  Err:   serial
+  Saving Environment to MMC... Writing to redundant MMC(0)... OK
+  Saving Environment to MMC... Writing to MMC(0)... OK
+  Net:   No ethernet found.
+  Hit any key to stop autoboot:  0
+  Target:blank
+  Partitioning using GPT
+  Writing GPT: success!
+  Saving Environment to MMC... Writing to redundant MMC(0)... OK
+  Flashing already done...
+  5442816 bytes read in 238 ms (21.8 MiB/s)
+  Valid Boot Flag
+  Setup Size = 0x00003c00
+  Magic signature found
+  Using boot protocol version 2.0c
+  Linux kernel version 3.10.17-poky-edison+ (ferry@kalamata) #1 SMP PREEMPT Mon Jan 11 14:54:18 CET 2016
+  Building boot_params at 0x00090000
+  Loading bzImage at address 100000 (5427456 bytes)
+  Magic signature found
+  Kernel command line: "rootwait ..."
+  Magic signature found
+
+  Starting kernel ...
+
+  ...
+
+  Poky (Yocto Project Reference Distro) 1.7.2 edison ttyMFD2
+
+  edison login:
+
+.. _xFSTK: https://github.com/edison-fw/xFSTK
+.. _drive: https://drive.google.com/drive/u/0/folders/1URPHrOk9-UBsh8hjv-7WwC0W6Fy61uAJ
diff --git a/doc/board/intel/galileo.rst b/doc/board/intel/galileo.rst
new file mode 100644
index 00000000000..f51a06bb9e8
--- /dev/null
+++ b/doc/board/intel/galileo.rst
@@ -0,0 +1,22 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+Galileo
+=======
+
+Only one binary blob is needed for Remote Management Unit (RMU) within Intel
+Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is
+needed by the Quark SoC itself.
+
+You can get the binary blob from Quark Board Support Package from Intel website:
+
+   * ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
+
+Rename the file and put it to the board directory by::
+
+   $ cp RMU.bin board/intel/galileo/rmu.bin
+
+Now you can build U-Boot and obtain u-boot.rom::
+
+   $ make galileo_defconfig
+   $ make all
diff --git a/doc/board/intel/index.rst b/doc/board/intel/index.rst
new file mode 100644
index 00000000000..f545dee87ab
--- /dev/null
+++ b/doc/board/intel/index.rst
@@ -0,0 +1,16 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Intel
+=====
+
+.. toctree::
+   :maxdepth: 2
+
+   bayleybay
+   cherryhill
+   cougarcanyon2
+   crownbay
+   edison
+   galileo
+   minnowmax
+   slimbootloader
diff --git a/doc/board/intel/minnowmax.rst b/doc/board/intel/minnowmax.rst
new file mode 100644
index 00000000000..d0286bd9937
--- /dev/null
+++ b/doc/board/intel/minnowmax.rst
@@ -0,0 +1,81 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Minnowboard MAX
+===============
+
+This uses as FSP as with Crown Bay, except it is for the Atom E3800 series.
+Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at
+the time of writing). Put it in the corresponding board directory and rename
+it to fsp.bin.
+
+Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same
+board directory as vga.bin.
+
+You still need two more binary blobs. For Minnowboard MAX, we can reuse the
+same ME firmware above, but for flash descriptor, we need get that somewhere
+else, as the one above does not seem to work, probably because it is not
+designed for the Minnowboard MAX. Now download the original firmware image
+for this board from:
+
+   * http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
+
+Unzip it::
+
+   $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
+
+Use ifdtool in the U-Boot tools directory to extract the images from that
+file, for example::
+
+   $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin
+
+This will provide the descriptor file - copy this into the correct place::
+
+   $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin
+
+Now you can build U-Boot and obtain u-boot.rom::
+
+   $ make minnowmax_defconfig
+   $ make all
+
+Checksums are as follows (but note that newer versions will invalidate this)::
+
+   $ md5sum -b board/intel/minnowmax/*.bin
+   ffda9a3b94df5b74323afb328d51e6b4  board/intel/minnowmax/descriptor.bin
+   69f65b9a580246291d20d08cbef9d7c5  board/intel/minnowmax/fsp.bin
+   894a97d371544ec21de9c3e8e1716c4b  board/intel/minnowmax/me.bin
+   a2588537da387da592a27219d56e9962  board/intel/minnowmax/vga.bin
+
+The ROM image is broken up into these parts:
+
+======   ==================  ============================
+Offset   Description         Controlling config
+======   ==================  ============================
+000000   descriptor.bin      Hard-coded to 0 in ifdtool
+001000   me.bin              Set by the descriptor
+500000   <spare>
+5f0000   MRC cache           CONFIG_ENABLE_MRC_CACHE
+600000   u-boot-dtb.bin      CONFIG_TEXT_BASE
+6ef000   Environment         CONFIG_ENV_OFFSET
+7b0000   vga.bin             CONFIG_VGA_BIOS_ADDR
+7c0000   fsp.bin             CONFIG_FSP_ADDR
+7f8000   <spare>             (depends on size of fsp.bin)
+7ff800   U-Boot 16-bit boot  CONFIG_SYS_X86_START16
+======   ==================  ============================
+
+Overall ROM image size is controlled by CONFIG_ROM_SIZE.
+
+Note that the debug version of the FSP is bigger in size. If this version
+is used, CONFIG_FSP_ADDR needs to be configured to 0xfffb0000 instead of
+the default value 0xfffc0000.
+
+If you want to change CONFIG_TEXT_BASE from the current value of ffe00000
+you need to check a few other things. CONFIG_SYS_MONITOR_BASE should
+automatically update to be the same as CONFIG_TEXT_BASE but
+CONFIG_SYS_MONITOR_LEN may need to be adjusted too. It must cover the space
+from the start of U-Boot to the end of the RAM, since the 16-bit boot needs to
+be able to jump to U-Boot. See the end of arch/x86/lib/fsp1/fsp_car.S which
+has these values.
+
+Also check the MRC cache address in the devicetree ("rw-mrc-cache"). It must
+not overlap with U-Boot.
diff --git a/doc/board/intel/slimbootloader.rst b/doc/board/intel/slimbootloader.rst
new file mode 100644
index 00000000000..87d71a55bdc
--- /dev/null
+++ b/doc/board/intel/slimbootloader.rst
@@ -0,0 +1,177 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Aiden Park <aiden.park@intel.com>
+
+Slim Bootloader
+===============
+
+Introduction
+------------
+
+This target is to enable U-Boot_ as a payload of `Slim Bootloader`_ (a.k.a SBL)
+boot firmware which currently supports QEMU, Apollolake, Whiskeylake,
+Coffeelake-R platforms.
+
+The `Slim Bootloader`_ is designed with multi-stages (Stage1A/B, Stage2, Payload)
+architecture to cover from reset vector to OS booting and it consumes
+`Intel FSP`_ for silicon initialization.
+
+* Stage1A: Reset vector, CAR init with FSP-T
+* Stage1B: Memory init with FSP-M, CAR teardown, Continue execution in memory
+* Stage2 : Rest of Silicon init with FSP-S, Create HOB, Hand-off to Payload
+* Payload: Payload init with HOB, Load OS from media, Booting OS
+
+The Slim Bootloader stages (Stage1A/B, Stage2) focus on chipset, hardware and
+platform specific initialization, and it provides useful information to a
+payload in a HOB (Hand-Off Block) which has serial port, memory map, performance
+data info and so on. This is Slim Bootloader architectural design to make a
+payload light-weight, platform independent and more generic across different
+boot solutions or payloads, and to minimize hardware re-initialization in a
+payload.
+
+Build Instruction for U-Boot as a Slim Bootloader payload
+---------------------------------------------------------
+
+Build U-Boot and obtain u-boot-dtb.bin::
+
+   $ make distclean
+   $ make slimbootloader_defconfig
+   $ make all
+
+Prepare Slim Bootloader
+-----------------------
+
+1. Setup Build Environment for Slim Bootloader.
+
+   Refer to `Getting Started`_ page in `Slim Bootloader`_ document site.
+
+2. Get source code. Let's simply clone the repo::
+
+   $ git clone https://github.com/slimbootloader/slimbootloader.git
+
+3. Copy u-boot-dtb.bin to Slim Bootloader.
+   Slim Bootloader looks for a payload from the specific location.
+   Copy the build u-boot-dtb.bin to the expected location::
+
+   $ mkdir -p <Slim Bootloader Dir>/PayloadPkg/PayloadBins/
+   $ cp <U-Boot Dir>/u-boot-dtb.bin <Slim Bootloader Dir>/PayloadPkg/PayloadBins/u-boot-dtb.bin
+
+Build Instruction for Slim Bootloader for QEMU target
+-----------------------------------------------------
+
+Slim Bootloader supports multiple payloads, and a board of Slim Bootloader
+detects its target payload by PayloadId in board configuration.
+The PayloadId can be any 4 Bytes value.
+
+1. Update PayloadId. Let's use 'U-BT' as an example::
+
+    $ vi Platform/QemuBoardPkg/CfgData/CfgDataExt_Brd1.dlt
+    -GEN_CFG_DATA.PayloadId                     | 'AUTO'
+    +GEN_CFG_DATA.PayloadId                     | 'U-BT'
+
+2. Update payload text base. PAYLOAD_EXE_BASE must be the same as U-Boot
+   CONFIG_TEXT_BASE in board/intel/slimbootloader/Kconfig.
+   PAYLOAD_LOAD_HIGH must be 0::
+
+    $ vi Platform/QemuBoardPkg/BoardConfig.py
+    +               self.PAYLOAD_LOAD_HIGH    = 0
+    +               self.PAYLOAD_EXE_BASE     = 0x00100000
+
+3. Build QEMU target. Make sure u-boot-dtb.bin and U-BT PayloadId
+   in build command. The output is Outputs/qemu/SlimBootloader.bin::
+
+   $ python BuildLoader.py build qemu -p "OsLoader.efi:LLDR:Lz4;u-boot-dtb.bin:U-BT:Lzma"
+
+4. Launch Slim Bootloader on QEMU.
+   You should reach at U-Boot serial console::
+
+   $ qemu-system-x86_64 -machine q35 -nographic -serial mon:stdio -pflash Outputs/qemu/SlimBootloader.bin
+
+Test Linux booting on QEMU target
+---------------------------------
+
+Let's use LeafHill (APL) Yocto image for testing.
+Download it from http://downloads.yoctoproject.org/releases/yocto/yocto-2.0/machines/leafhill/.
+
+1. Prepare Yocto hard disk image::
+
+   $ wget http://downloads.yoctoproject.org/releases/yocto/yocto-2.0/machines/leafhill/leafhill-4.0-jethro-2.0.tar.bz2
+   $ tar -xvf leafhill-4.0-jethro-2.0.tar.bz2
+   $ ls -l leafhill-4.0-jethro-2.0/binary/core-image-sato-intel-corei7-64.hddimg
+
+2. Launch Slim Bootloader on QEMU with disk image::
+
+   $ qemu-system-x86_64 -machine q35 -nographic -serial mon:stdio -pflash Outputs/qemu/SlimBootloader.bin -drive id=mydrive,if=none,file=/path/to/core-image-sato-intel-corei7-64.hddimg,format=raw -device ide-hd,drive=mydrive
+
+3. Update boot environment values on shell::
+
+   => setenv bootfile vmlinuz
+   => setenv bootdev scsi
+   => boot
+
+Build Instruction for Slim Bootloader for LeafHill (APL) target
+---------------------------------------------------------------
+
+Prepare U-Boot and Slim Bootloader as described at the beginning of this page.
+Also, the PayloadId needs to be set for APL board.
+
+1. Update PayloadId. Let's use 'U-BT' as an example::
+
+    $ vi Platform/ApollolakeBoardPkg/CfgData/CfgData_Int_LeafHill.dlt
+    -GEN_CFG_DATA.PayloadId                     | 'AUTO
+    +GEN_CFG_DATA.PayloadId                     | 'U-BT'
+
+2. Update payload text base.
+
+* PAYLOAD_EXE_BASE must be the same as U-Boot CONFIG_TEXT_BASE
+  in board/intel/slimbootloader/Kconfig.
+* PAYLOAD_LOAD_HIGH must be 0::
+
+    $ vi Platform/ApollolakeBoardPkg/BoardConfig.py
+    +               self.PAYLOAD_LOAD_HIGH    = 0
+    +               self.PAYLOAD_EXE_BASE     = 0x00100000
+
+3. Build APL target. Make sure u-boot-dtb.bin and U-BT PayloadId
+   in build command. The output is Outputs/apl/Stitch_Components.zip::
+
+   $ python BuildLoader.py build apl -p "OsLoader.efi:LLDR:Lz4;u-boot-dtb.bin:U-BT:Lzma"
+
+4. Stitch IFWI.
+
+   Refer to Apollolake_ page in Slim Bootloader document site::
+
+   $ python Platform/ApollolakeBoardPkg/Script/StitchLoader.py -i <Existing IFWI> -s Outputs/apl/Stitch_Components.zip -o <Output IFWI>
+
+5. Flash IFWI.
+
+   Use DediProg to flash IFWI. You should reach at U-Boot serial console.
+
+
+Build Instruction to use ELF U-Boot
+-----------------------------------
+
+1. Enable CONFIG_OF_EMBED::
+
+    $ vi configs/slimbootloader_defconfig
+    +CONFIG_OF_EMBED=y
+
+2. Build U-Boot::
+
+   $ make distclean
+   $ make slimbootloader_defconfig
+   $ make all
+   $ strip u-boot (removing symbol for reduced size)
+
+3. Do same steps as above
+
+* Copy u-boot (ELF) to PayloadBins directory
+* Update PayloadId 'U-BT' as above.
+* No need to set PAYLOAD_LOAD_HIGH and PAYLOAD_EXE_BASE.
+* Build Slim Bootloader. Use u-boot instead of u-boot-dtb.bin::
+
+   $ python BuildLoader.py build <qemu or apl> -p "OsLoader.efi:LLDR:Lz4;u-boot:U-BT:Lzma"
+
+.. _U-Boot: https://source.denx.de/
+.. _`Slim Bootloader`: https://github.com/slimbootloader/
+.. _`Intel FSP`: https://github.com/IntelFsp/
+.. _`Getting Started`: https://slimbootloader.github.io/getting-started/
+.. _Apollolake: https://slimbootloader.github.io/supported-hardware/apollo-lake-crb.html#stitching
diff --git a/doc/board/kontron/index.rst b/doc/board/kontron/index.rst
new file mode 100644
index 00000000000..cb1906e626b
--- /dev/null
+++ b/doc/board/kontron/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Kontron
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   pitx-imx8m
+   sl28
+   sl-mx6ul
+   sl-mx8mm
diff --git a/doc/board/kontron/pitx-imx8m.rst b/doc/board/kontron/pitx-imx8m.rst
new file mode 100644
index 00000000000..1f64cbd9b2e
--- /dev/null
+++ b/doc/board/kontron/pitx-imx8m.rst
@@ -0,0 +1,67 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Kontron pitx-imx8m
+==================
+
+The Kontron pitx-imx8m is an embedded board with an i.MX8MQ in the pITX
+form factor.
+
+The board has two Ethernet ports, USB, HDMI/LVDS, m.2 slot, SD card, CAN,
+RS232 and much more.
+
+Quick Start
+-----------
+
+- Get and build the ARM Trusted firmware binary
+- Get DDR and HDMI firmware
+- Build U-Boot
+- Install on SD card
+- Boot
+
+Get and build the ARM Trusted firmware binary
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Note: builddir is U-Boot build directory (source directory for in-tree builds)
+
+.. code-block:: bash
+
+    $ git clone https://github.com/ARM-software/arm-trusted-firmware.git
+    $ git checkout v2.5
+    $ make PLAT=imx8mq ARCH=aarch64 CROSS_COMPILE=aarch64-linux-gnu- bl31
+    $ cp build/imx8mq/release/bl31.bin $(builddir)
+
+Get DDR and HDMI firmware
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Note: builddir is U-Boot build directory (source directory for in-tree builds)
+
+.. code-block:: bash
+
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.11.bin
+    $ chmod +x firmware-imx-8.11.bin
+    $ ./firmware-imx-8.11
+    $ cp firmware-imx-8.11/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
+    $ cp firmware-imx-8.11/firmware/hdmi/cadence/signed_hdmi_imx8m.bin $(builddir)
+
+Build U-Boot
+^^^^^^^^^^^^
+
+.. code-block:: bash
+
+    $ make kontron_pitx_imx8m_defconfig
+    $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+Install on SD card
+^^^^^^^^^^^^^^^^^^
+
+
+Burn the flash.bin to SD card at an offset of 33 KiB:
+
+.. code-block:: bash
+
+    $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33
+
+Boot
+^^^^
+
+Set the boot source selection to SD card boot and power on the board.
diff --git a/doc/board/kontron/sl-mx6ul.rst b/doc/board/kontron/sl-mx6ul.rst
new file mode 100644
index 00000000000..b0b0f44db2c
--- /dev/null
+++ b/doc/board/kontron/sl-mx6ul.rst
@@ -0,0 +1,43 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Kontron Electronics SL i.MX6UL/ULL SoM
+======================================
+
+The Kontron SoM-Line i.MX6UL/ULL (N6x1x) by Kontron Electronics GmbH is a SoM module
+with either an i.MX6UL or i.MX6ULL SoC, 256/512 MB DDR3 RAM, SPI NOR, SPI NAND and Ethernet PHY.
+
+The matching evaluation boards (Board-Line) have two Ethernet ports, USB 2.0,
+RGB, SD card, CAN, RS485, RS232 and much more.
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Boot
+
+Build U-Boot
+^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ make kontron-sl-mx6ul_defconfig
+   $ make
+
+Burn the flash.bin to SD card at an offset of 1 KiB:
+
+.. code-block:: bash
+
+   $ dd if=flash.bin of=/dev/sd[x] bs=1K seek=1 conv=notrunc
+
+Boot
+^^^^
+
+Put the SD card in the slot on the board and apply power.
+
+Further Information
+-------------------
+
+The bootloader configuration is setup to be used with kernel FIT images. Legacy
+images might not be working out of the box.
+
+Please see https://docs.kontron-electronics.de for further vendor documentation.
diff --git a/doc/board/kontron/sl-mx8mm.rst b/doc/board/kontron/sl-mx8mm.rst
new file mode 100644
index 00000000000..702db60fe38
--- /dev/null
+++ b/doc/board/kontron/sl-mx8mm.rst
@@ -0,0 +1,135 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Kontron Electronics i.MX8MM SoMs and Boards
+===========================================
+
+The SL i.MX8MM and OSM-S i.MX8MM by Kontron Electronics GmbH are SoM modules
+with an i.MX8M-Mini SoC, 1/2/4 GB LPDDR4 RAM, SPI NOR, eMMC and PMIC.
+
+The matching evaluation boards (Board-Line, BL) have two Ethernet ports,
+USB 2.0, HDMI/LVDS, SD card, CAN, RS485, RS232 and much more.
+
+The OSM-S i.MX8MM is compliant to the Open Standard Module (OSM) 1.1
+specification, size S (https://sget.org/standards/osm).
+
+Quick Start
+-----------
+
+- Get and Build the Trusted Firmware-A (TF-A)
+- Get the DDR firmware
+- Build U-Boot
+- Boot
+
+.. note::
+
+   To build on a x86-64 host machine, you need a GNU cross toolchain for the
+   target architecture (aarch64). Check your distros package manager or
+   download and install the necessary tools (``aarch64-linux-gnu-*``) manually.
+
+Get and Build the Trusted Firmware-A (TF-A)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+There are two sources for the TF-A. Mainline and NXP. Get the one you prefer
+(support and features might differ).
+
+.. note::
+
+   If you are using GCC 12 and you get compiler/linker errors, try to add the
+   following arguments to your make command as workaround:
+   ``CFLAGS="-Wno-array-bounds" LDFLAGS="--no-warn-rwx-segments"``
+
+**NXP's imx-atf**
+
+1. Get TF-A from: https://github.com/nxp-imx/imx-atf, branch: lf_v2.6
+2. Build
+
+  .. code-block:: bash
+
+     $ make PLAT=imx8mm CROSS_COMPILE=aarch64-linux-gnu- IMX_BOOT_UART_BASE="0x30880000" bl31
+     $ cp build/imx8mm/release/bl31.bin $(builddir)
+
+.. note::
+
+    *builddir* is U-Boot's build directory (source directory for in-tree builds)
+
+**Mainline TF-A**
+
+1. Get TF-A from: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/, tag: v2.4
+2. Build
+
+  .. code-block:: bash
+
+     $ make PLAT=imx8mm CROSS_COMPILE=aarch64-linux-gnu- IMX_BOOT_UART_BASE="0x30880000" bl31
+     $ cp build/imx8mm/release/bl31.bin $(builddir)
+
+Get the DDR firmware
+^^^^^^^^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.18.bin
+   $ chmod +x firmware-imx-8.18.bin
+   $ ./firmware-imx-8.18.bin
+   $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem.bin $(builddir)
+   $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem.bin $(builddir)
+   $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem.bin $(builddir)
+   $ cp firmware-imx-8.18/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem.bin $(builddir)
+
+Build U-Boot
+^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ make kontron-sl-mx8mm_defconfig
+   $ make CROSS_COMPILE=aarch64-linux-gnu-
+
+Copy the flash.bin to SD card at an offset of 33 KiB:
+
+.. code-block:: bash
+
+   $ dd if=flash.bin of=/dev/sd[x] bs=1K seek=33 conv=notrunc
+
+Boot
+^^^^
+
+Put the SD card in the slot on the board and apply power. Check the serial
+console for output.
+
+Flash the Bootloader to SPI NOR
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+1. Determine and note the exact size of the ``flash.bin`` image in bytes (e.g.
+   by running ``ls -l flash.bin``)
+
+2. On the U-Boot CLI copy the bootloader from SD card to RAM:
+
+   .. code-block::
+
+      mmc dev 1
+      mmc read $loadaddr 0x42 0x1000
+
+3. Erase the SPI NOR flash:
+
+   .. code-block::
+
+      sf probe
+      sf erase 0x0 0x200000
+
+4. Copy the bootloader from RAM to SPI NOR. For the last parameter of the
+   command, use the size determined in step 1 in **hexadecimal notation**:
+
+   .. code-block::
+
+      sf write $loadaddr 0x400 0x13B6F0
+
+.. note::
+
+   To be able to boot from SPI NOR the OTP fuses need to be set accordingly.
+
+Further Information
+-------------------
+
+The bootloader configuration is setup to be used with kernel FIT images. Legacy
+images might not be working out of the box.
+
+Please see https://docs.kontron-electronics.de for further vendor documentation.
diff --git a/doc/board/kontron/sl28.rst b/doc/board/kontron/sl28.rst
new file mode 100644
index 00000000000..2cb8ec62be4
--- /dev/null
+++ b/doc/board/kontron/sl28.rst
@@ -0,0 +1,179 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Kontron SMARC-sAL28
+===================
+
+The Kontron SMARC-sAL28 board is a TSN-enabled dual-core ARM A72
+processor module with an on-chip 6-port TSN switch and a 3D GPU.
+
+
+Quickstart
+----------
+
+Compile U-Boot
+^^^^^^^^^^^^^^
+
+Configure and compile the binary::
+
+ $ make kontron_sl28_defconfig
+ $ CROSS_COMPILE=aarch64-linux-gnu make
+
+Copy u-boot.rom to a TFTP server.
+
+Install the bootloader on the board
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+To install the bootloader binary use the following command::
+
+ > tftp path/to/u-boot.rom
+ > sf probe 0
+ > sf update $fileaddr 0x210000 $filesize
+
+The board is fully failsafe, you can't break anything. If builtin watchdog
+is enabled, you'll automatically end up in the failsafe bootloader if
+something goes wrong. If the watchdog is disabled, you have to manually
+enter failsafe mode by asserting the ``FORCE_RECOV#`` line during board
+reset.
+
+Update image
+------------
+
+After the build finished, there will be an update image called
+u-boot-update.bin. This can either be used in the DFU mode (which isn't
+supported yet) or encapsulated in an EFI UpdateCapsule.
+
+To build the capsule use the following command
+
+ $ tools/mkeficapsule -f u-boot-update.bin -i 1 UpdateUboot
+
+Afterward you can copy this file to your ESP into the /EFI/UpdateCapsule/
+folder. On the next EFI boot this will automatically update your
+bootloader.
+
+Builtin watchdog
+----------------
+
+The builtin watchdog will supervise the bootloader startup. If anything
+goes wrong it will reset the board and boot into the failsafe bootloader.
+
+Once the bootloader is started successfully, it will disable the watchdog
+timer.
+
+wdt command flags
+^^^^^^^^^^^^^^^^^
+
+The `wdt start` as well as the `wdt expire` command take a flags argument.
+The supported bitmask is as follows.
+
+| Bit | Description                   |
+| --- | ----------------------------- |
+|   0 | Enable failsafe mode          |
+|   1 | Lock the control register     |
+|   2 | Disable board reset           |
+|   3 | Enable WDT_TIME_OUT# line     |
+
+For example, you can use `wdt expire 1` to issue a reset and boot into the
+failsafe bootloader.
+
+Disable the builtin watchdog
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+If for some reason, this isn't a desired behavior, the watchdog can also
+be configured to not be enabled on board reset. It's configuration is saved
+in the non-volatile board configuration bits. To change these you can use
+the `sl28 nvm` command.
+
+For more information on the non-volatile board configuration bits, see the
+following section.
+
+Non-volatile Board Configuration Bits
+-------------------------------------
+
+The board has 16 configuration bits which are stored in the CPLD and are
+non-volatile. These can be changed by the `sl28 nvm` command.
+
+===  ===============================================================
+Bit  Description
+===  ===============================================================
+  0  Power-on inhibit
+  1  Enable eMMC boot
+  2  Enable watchdog by default
+  3  Disable failsafe watchdog by default
+  4  Clock generator selection bit 0
+  5  Clock generator selection bit 1
+  6  Disable CPU SerDes clock #2 and PCIe-A clock output
+  7  Disable PCIe-B and PCIe-C clock output
+  8  Keep onboard PHYs in reset
+  9  Keep USB hub in reset
+ 10  Keep eDP-to-LVDS converter in reset
+ 11  Enable I2C stuck recovery on I2C PM and I2C GP busses
+ 12  Enable automatic onboard PHY H/W reset
+ 13  reserved
+ 14  Used by the RCW to determine boot source
+ 15  Used by the RCW to determine boot source
+===  ===============================================================
+
+Please note, that if the board is in failsafe mode, the bits will have the
+factory defaults, ie. all bits are off.
+
+Power-On Inhibit
+^^^^^^^^^^^^^^^^
+
+If this is set, the board doesn't automatically turn on when power is
+applied. Instead, the user has to either toggle the ``PWR_BTN#`` line or
+use any other wake-up source such as RTC alarm or Wake-on-LAN.
+
+eMMC Boot
+^^^^^^^^^
+
+If this is set, the RCW will be fetched from the on-board eMMC at offset
+1MiB. For further details, have a look at the `Reset Configuration Word
+Documentation`_.
+
+Watchdog
+^^^^^^^^
+
+By default, the CPLD watchdog is enabled in failsafe mode. Using bits 2 and
+3, the user can change its mode or disable it altogether.
+
+=====  =====  ===============================
+Bit 2  Bit 3  Description
+=====  =====  ===============================
+    0      0  Watchdog enabled, failsafe mode
+    0      1  Watchdog disabled
+    1      0  Watchdog enabled, failsafe mode
+    1      1  Watchdog enabled, normal mode
+=====  =====  ===============================
+
+Clock Generator Select
+^^^^^^^^^^^^^^^^^^^^^^
+
+The board is prepared to supply different SerDes clock speeds. But for now,
+only setting 0 is supported, otherwise the CPU will hang because the PLL
+will not lock.
+
+Clock Output Disable And Keep Devices In Reset
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+To safe power, the user might disable different devices and clock output of
+the board. It is not supported to disable the "CPU SerDes clock #2" for
+now, otherwise the CPU will hang because the PLL will not lock.
+
+Automatic reset of the onboard PHYs
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+By default, there is no hardware reset of the onboard PHY. This is because
+for Wake-on-LAN, some registers have to retain their values. If you don't
+use the WOL feature and a soft reset of the PHY is not enough you can
+enable the hardware reset. The onboard PHY hardware reset follows the
+power-on reset.
+
+
+Further documentation
+---------------------
+
+- `Vendor Documentation`_
+- `Reset Configuration Word Documentation`_
+
+.. _Reset Configuration Word Documentation: https://raw.githubusercontent.com/kontron/rcw-smarc-sal28/master/README.md
+.. _Vendor Documentation: https://raw.githubusercontent.com/kontron/u-boot-smarc-sal28/master/board/kontron/sl28/README.md
diff --git a/doc/board/lenovo/ideapad-yoga-11.rst b/doc/board/lenovo/ideapad-yoga-11.rst
new file mode 100644
index 00000000000..94bf171b35f
--- /dev/null
+++ b/doc/board/lenovo/ideapad-yoga-11.rst
@@ -0,0 +1,41 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the Lenovo Ideapad Yoga 11 tablet
+============================================
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Boot
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ make ideapad-yoga-11_defconfig
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
+image, ready for loading.
+
+Boot
+----
+
+Currently, U-Boot can be preloaded into RAM via the Fusée Gelée. To enter
+RCM protocol use ``power`` and ``volume up`` key combination from powered
+off device. The host PC should recognize an APX device.
+
+Built U-Boot ``u-boot-dtb-tegra.bin`` can be loaded from fusee-tools
+directory with
+
+.. code-block:: bash
+
+    $ ./run_bootloader.sh -s T30 -t ./bct/ideapad-yoga-11.bct
+
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
+eMMC. Additionally, if the Volume Down button is pressed while loading, the
+device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
+as mass storage, fastboot, reboot, reboot RCM, poweroffand enter U-Boot console.
diff --git a/doc/board/lenovo/index.rst b/doc/board/lenovo/index.rst
new file mode 100644
index 00000000000..2ce457ab045
--- /dev/null
+++ b/doc/board/lenovo/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Lenovo
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   ideapad-yoga-11
diff --git a/doc/board/lg/index.rst b/doc/board/lg/index.rst
new file mode 100644
index 00000000000..3af3681e0bb
--- /dev/null
+++ b/doc/board/lg/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+LG
+==
+
+.. toctree::
+   :maxdepth: 2
+
+   x3_t30
diff --git a/doc/board/lg/x3_t30.rst b/doc/board/lg/x3_t30.rst
new file mode 100644
index 00000000000..618b00d34e3
--- /dev/null
+++ b/doc/board/lg/x3_t30.rst
@@ -0,0 +1,128 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the LG X3 T30 device family
+======================================
+
+``DISCLAMER!`` Moving your LG P880 or P895 to use U-Boot assumes replacement
+of the vendor LG bootloader. Vendor android firmwares will no longer be able
+to run on the device. This replacement IS reversible.
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Process U-Boot
+- Flashing U-Boot into the eMMC
+- Boot
+- Self Upgrading
+
+Build U-Boot
+------------
+
+Device support is implemented by applying config fragment to a generic
+board defconfig. Valid fragments are ``p880.config`` and ``p895.config``.
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ make x3_t30_defconfig p895.config # For LG Optimus Vu
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
+image, ready for further processing.
+
+Process U-Boot
+--------------
+
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
+in re-crypt repo issues. NOT HERE!
+
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update.
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
+
+.. code-block:: bash
+
+    $ git clone https://gitlab.com/grate-driver/re-crypt.git
+    $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+    $ ./re-crypt.py --dev p895
+
+The script will produce a ``repart-block.bin`` ready to flash.
+
+Processing for pre-loaded U-Boot
+********************************
+
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
+
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to NvFlash should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
+
+.. code-block:: bash
+
+    $ wheelie --blob blob.bin
+    $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
+
+When flashing is done, reboot the device.
+
+Flashing with a pre-loaded U-Boot
+*********************************
+
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+    $ fastboot flash 0.1 bct.img
+    $ fastboot flash 0.2 ebt.img
+    $ fastboot reboot
+
+Device will reboot.
+
+Boot
+----
+
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on eMMC. Additionally,
+if the Volume Down button is pressed while booting, the device will enter
+bootmenu. Bootmenu contains entries to mount eMMC as mass storage, fastboot,
+reboot, reboot RCM, poweroff, enter U-Boot console and update bootloader (check
+the next chapter).
+
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
+
+Self Upgrading
+--------------
+
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the eMMC (using
+ability of u-boot to mount it). Enter bootmenu, choose update bootloader option
+with Power button and U-Boot should update itself. Once the process is
+completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/mediatek/index.rst b/doc/board/mediatek/index.rst
new file mode 100644
index 00000000000..c55d5aeb5c4
--- /dev/null
+++ b/doc/board/mediatek/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Mediatek
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   mt7621
diff --git a/doc/board/mediatek/mt7621.rst b/doc/board/mediatek/mt7621.rst
new file mode 100644
index 00000000000..1662255546f
--- /dev/null
+++ b/doc/board/mediatek/mt7621.rst
@@ -0,0 +1,48 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+mt7621_rfb/mt7621_nand_rfb
+==========================
+
+U-Boot for the MediaTek MT7621 boards
+
+Quick Start
+-----------
+
+- Get the DDR initialization binary blob
+- Configure CPU and DDR parameters
+- Build U-Boot
+
+Get the DDR initialization binary blob
+--------------------------------------
+
+Download one from:
+ - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram.bin
+ - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram_noprint.bin
+
+mt7621_stage_sram_noprint.bin has removed all output logs. To use this one,
+download and rename it to mt7621_stage_sram.bin
+
+Put the binary blob to the u-boot build directory.
+
+Configure CPU and DDR parameters
+--------------------------------
+
+menuconfig > MIPS architecture > MediaTek MIPS platforms > CPU & DDR configuration
+
+Select the correct DDR timing parameters for your board. The size shown here
+must match the DDR size of you board.
+
+The frequency of CPU and DDR can also be adjusted.
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=mipsel-linux-
+   $ make O=build mt7621_rfb_defconfig # or mt7621_nand_rfb_defconfig
+   $ cp mt7621_stage_sram.bin ./build/mt7621_stage_sram.bin
+   $ # or cp mt7621_stage_sram_noprint.bin ./build/mt7621_stage_sram.bin
+   $ make O=build
+
+Burn the u-boot-mt7621.bin to the SPI-NOR or NAND flash.
diff --git a/doc/board/microchip/index.rst b/doc/board/microchip/index.rst
new file mode 100644
index 00000000000..affc5a9e014
--- /dev/null
+++ b/doc/board/microchip/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Microchip
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   mpfs_icicle
diff --git a/doc/board/microchip/mpfs_icicle.rst b/doc/board/microchip/mpfs_icicle.rst
new file mode 100644
index 00000000000..1464e536e94
--- /dev/null
+++ b/doc/board/microchip/mpfs_icicle.rst
@@ -0,0 +1,828 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Microchip PolarFire SoC Icicle Kit
+==================================
+
+RISC-V PolarFire SoC
+--------------------
+
+The PolarFire SoC is the 4+1 64-bit RISC-V SoC from Microchip.
+
+The Icicle Kit development platform is based on PolarFire SoC and capable
+of running Linux.
+
+Mainline support
+----------------
+
+The support for following drivers are already enabled:
+
+1. NS16550 UART Driver.
+2. Microchip Clock Driver.
+3. Cadence MACB ethernet driver for networking support.
+4. Cadence MMC Driver for eMMC/SD support.
+5. Microchip I2C Driver.
+
+Booting from eMMC using HSS
+---------------------------
+
+Building U-Boot
+~~~~~~~~~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+3. make microchip_mpfs_icicle_defconfig
+4. make
+
+Flashing
+~~~~~~~~
+
+The current U-Boot port is supported in S-mode only and loaded from DRAM.
+
+A prior stage M-mode firmware/bootloader (e.g HSS with OpenSBI) is required to
+boot the u-boot.bin in S-mode.
+
+Currently, the u-boot.bin is used as a payload of the HSS firmware (Microchip
+boot-flow) and OpenSBI generic platform fw_payload.bin (with u-boot.bin embedded)
+as HSS payload (Custom boot-flow)
+
+Microchip boot-flow
+~~~~~~~~~~~~~~~~~~~
+
+HSS with OpenSBI (M-Mode) -> U-Boot (S-Mode) -> Linux (S-Mode)
+
+Build the HSS (Hart Software Services) - Microchip boot-flow
+''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
+
+(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services)
+
+1. Configure
+
+.. code-block:: none
+
+   make BOARD=icicle-kit-es config
+
+Alternatively, copy the default config for Microchip boot-flow.
+
+.. code-block:: none
+
+   cp boards/icicle-kit-es/def_config .config
+
+2. make BOARD=icicle-kit-es
+3. In the Default subdirectory, the standard build will create hss.elf and
+   various binary formats (hss.hex and hss.bin).
+
+The FPGA design will use the hss.hex or hss.bin.
+
+FPGA design with HSS programming file
+'''''''''''''''''''''''''''''''''''''
+
+https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md
+
+The HSS firmware runs from the PolarFire SoC eNVM on reset.
+
+Creating the HSS payload - Microchip boot-flow
+''''''''''''''''''''''''''''''''''''''''''''''
+
+1. You will be creating a payload from `u-boot-dtb.bin`.
+   Copy this file to the HSS/tools/hss-payload-generator/test directory.
+2. Go to hss-payload-generator source directory.
+
+.. code-block:: none
+
+   cd hart-software-services/tools/hss-payload-generator
+
+3. Edit test/uboot.yaml file for hart entry points and correct name of the binary file.
+
+	hart-entry-points: {u54_1: '0x80200000', u54_2: '0x80200000', u54_3: '0x80200000', u54_4: '0x80200000'}
+
+	payloads:
+	test/u-boot-dtb.bin: {exec-addr: '0x80200000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: prv_s}
+
+4. Generate payload
+
+.. code-block:: none
+
+   ./hss-payload-generator -c test/uboot.yaml payload.bin
+
+Once the payload binary is generated, it should be copied to the eMMC.
+
+Please refer to HSS documenation to build the HSS firmware for payload.
+(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services/blob/master/tools/hss-payload-generator/README.md)
+
+Custom boot-flow
+~~~~~~~~~~~~~~~~
+
+HSS without OpenSBI (M-Mode) -> OpenSBI (M-Mode) -> U-Boot (S-Mode) -> Linux (S-Mode)
+
+Build OpenSBI
+'''''''''''''
+
+1. Get the OpenSBI source
+
+.. code-block:: none
+
+   git clone https://github.com/riscv/opensbi.git
+   cd opensbi
+
+2. Build
+
+.. code-block:: none
+
+   make PLATFORM=generic FW_PAYLOAD_PATH=<u-boot-directory>/u-boot.bin
+   FW_FDT_PATH=<u-boot-directory>/arch/riscv/dts/mpfs-icicle-kit-.dtb
+
+3. Output "fw_payload.bin" file available at
+   "<opensbi-directory>/build/platform/generic/firmware/fw_payload.bin"
+
+Build the HSS (Hart Software Services)- Custom boot-flow
+''''''''''''''''''''''''''''''''''''''''''''''''''''''''
+
+(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services)
+
+1. Configure
+
+.. code-block:: none
+
+   make BOARD=icicle-kit-es config
+
+Alternatively, copy the default custom config for Custom boot-flow.
+
+.. code-block:: none
+
+   cp boards/icicle-kit-es/def_config_custom .config
+
+2. make BOARD=icicle-kit-es
+3. In the Default subdirectory, the standard build will create hss.elf and
+   various binary formats (hss.hex and hss.bin).
+
+The FPGA design will use the hss.hex or hss.bin.
+
+Creating the HSS payload - Custom boot-flow
+'''''''''''''''''''''''''''''''''''''''''''
+
+1. You will be creating a payload from `fw_payload.bin`.
+   Copy this file to the HSS/tools/hss-payload-generator/test directory.
+2. Go to hss-payload-generator source directory.
+
+.. code-block:: none
+
+   cd hart-software-services/tools/hss-payload-generator
+
+3. Edit test/uboot.yaml file for hart entry points and correct name of the binary file.
+
+	hart-entry-points: {u54_1: '0x80000000', u54_2: '0x80000000', u54_3: '0x80000000', u54_4: '0x80000000'}
+
+	payloads:
+	test/fw_payload.bin: {exec-addr: '0x80000000', owner-hart: u54_1, secondary-hart: u54_2, secondary-hart: u54_3, secondary-hart: u54_4, priv-mode: prv_m}
+
+4. Generate payload
+
+.. code-block:: none
+
+   ./hss-payload-generator -c test/uboot.yaml payload.bin
+
+Once the payload binary is generated, it should be copied to the eMMC.
+
+Please refer to HSS documenation to build the HSS firmware for payload.
+(Note: HSS git repo is at https://github.com/polarfire-soc/hart-software-services/blob/master/tools/hss-payload-generator/README.md
+and also refer the HSS payload generator at https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/software-development/hss-payloads.md)
+
+eMMC
+~~~~
+
+Program eMMC with payload binary is explained in the PolarFire SoC documentation.
+(Note: PolarFire SoC Documentation git repo is at https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md#eMMC)
+
+Once the payload image is copied to the eMMC, press CTRL+C in the HSS command
+line interface, then type 'boot' and enter to boot the newly copied image.
+
+.. code-block:: none
+
+    sudo dd if=<payload_binary> of=/dev/sdX bs=512
+
+GUID type
+~~~~~~~~~
+
+The HSS always picks up HSS payload from a GPT partition with
+GUID type "21686148-6449-6E6F-744E-656564454649" or sector '0' of the eMMC if no
+GPT partition.
+
+Booting
+~~~~~~~
+
+You should see the U-Boot prompt on UART1.
+(Note: UART0 is reserved for HSS)
+
+Sample boot log from MPFS Icicle Kit
+''''''''''''''''''''''''''''''''''''
+
+.. code-block:: none
+
+   U-Boot 2021.01-00314-g7303332537-dirty (Jan 14 2021 - 10:09:43 +0530)
+
+   CPU:   rv64imafdc
+   Model: Microchip MPFS Icicle Kit
+   DRAM:  1 GiB
+   MMC:   sdhc@20008000: 0
+   In:    serial@20100000
+   Out:   serial@20100000
+   Err:   serial@20100000
+   Net:   eth0: ethernet@20112000
+   Hit any key to stop autoboot:  0
+
+Now you can configure your networking, tftp server and use tftp boot method to
+load uImage (with initramfs).
+
+.. code-block:: none
+
+   RISC-V # setenv kernel_addr_r 0x80200000
+   RISC-V # setenv fdt_addr_r 0x82200000
+
+   RISC-V # setenv ipaddr 192.168.1.5
+   RISC-V # setenv netmask 255.255.255.0
+   RISC-V # setenv serverip 192.168.1.3
+   RISC-V # setenv gateway 192.168.1.1
+
+   RISC-V # tftpboot ${kernel_addr_r} uImage
+   ethernet@20112000: PHY present at 9
+   ethernet@20112000: Starting autonegotiation...
+   ethernet@20112000: Autonegotiation complete
+   ethernet@20112000: link up, 1000Mbps full-duplex (lpa: 0x7800)
+   Using ethernet@20112000 device
+   TFTP from server 192.168.1.3; our IP address is 192.168.1.5
+   Filename 'uImage'.
+   Load address: 0x80200000
+   Loading: #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    #################################################################
+	    ############
+	    6.4 MiB/s
+   done
+   Bytes transferred = 14482480 (dcfc30 hex)
+
+   RISC-V # tftpboot ${fdt_addr_r} mpfs-icicle-kit.dtb
+   ethernet@20112000: PHY present at 9
+   ethernet@20112000: Starting autonegotiation...
+   ethernet@20112000: Autonegotiation complete
+   ethernet@20112000: link up, 1000Mbps full-duplex (lpa: 0x7800)
+   Using ethernet@20112000 device
+   TFTP from server 192.168.1.3; our IP address is 192.168.1.5
+   Filename 'mpfs-icicle-kit.dtb'.
+   Load address: 0x82200000
+   Loading: #
+			2.5 MiB/s
+   done
+   Bytes transferred = 10282 (282a hex)
+
+   RISC-V # bootm ${kernel_addr_r} - ${fdt_addr_r}
+   ## Booting kernel from Legacy Image at 80200000 ...
+		Image Name:   Linux
+		Image Type:   RISC-V Linux Kernel Image (uncompressed)
+		Data Size:    14482416 Bytes = 13.8 MiB
+		Load Address: 80200000
+		Entry Point:  80200000
+		Verifying Checksum ... OK
+   ## Flattened Device Tree blob at 82200000
+		Booting using the fdt blob at 0x82200000
+		Loading Kernel Image
+		Using Device Tree in place at 000000008fffa000, end 000000008ffff829 ... OK
+
+   Starting kernel ...
+
+   [    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
+   [    0.000000] Linux version 5.6.17 (padmarao@padmarao-VirtualBox) (gcc version 7.2.0 (GCC)) #2 SMP Tue Jun 16 21:27:50 IST 2020
+   [    0.000000] initrd not found or empty - disabling initrd
+   [    0.000000] Zone ranges:
+   [    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000]   Normal   empty
+   [    0.000000] Movable zone start for each node
+   [    0.000000] Early memory node ranges
+   [    0.000000]   node   0: [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000] software IO TLB: mapped [mem 0xbb1f5000-0xbf1f5000] (64MB)
+   [    0.000000] elf_hwcap is 0x112d
+   [    0.000000] percpu: Embedded 14 pages/cpu s24856 r0 d32488 u57344
+   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 258055
+   [    0.000000] Kernel command line: console=ttyS0,115200n8
+   [    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
+   [    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
+   [    0.000000] Sorting __ex_table...
+   [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+   [    0.000000] Memory: 950308K/1046528K available (3289K kernel code, 212K rwdata, 900K rodata, 9476K init, 250K bss, 96220K reserved, 0K cma-reserved)
+   [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
+   [    0.000000] rcu: Hierarchical RCU implementation.
+   [    0.000000] rcu: 	RCU event tracing is enabled.
+   [    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
+   [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
+   [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
+   [    0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0
+   [    0.000000] plic: mapped 186 interrupts with 4 handlers for 9 contexts.
+   [    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1]
+   [    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns
+   [    0.000015] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
+   [    0.000311] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=10000)
+   [    0.000349] pid_max: default: 32768 minimum: 301
+   [    0.000846] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+   [    0.000964] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+   [    0.005630] rcu: Hierarchical SRCU implementation.
+   [    0.006901] smp: Bringing up secondary CPUs ...
+   [    0.012545] smp: Brought up 1 node, 4 CPUs
+   [    0.014431] devtmpfs: initialized
+   [    0.020526] random: get_random_bytes called from setup_net+0x36/0x192 with crng_init=0
+   [    0.020928] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
+   [    0.020999] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
+   [    0.022768] NET: Registered protocol family 16
+   [    0.035478] microchip-pfsoc-clkcfg 20002000.clkcfg: Registered PFSOC core clocks
+   [    0.048429] SCSI subsystem initialized
+   [    0.049694] pps_core: LinuxPPS API ver. 1 registered
+   [    0.049719] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+   [    0.049780] PTP clock support registered
+   [    0.051781] clocksource: Switched to clocksource riscv_clocksource
+   [    0.055326] NET: Registered protocol family 2
+   [    0.056922] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
+   [    0.057053] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
+   [    0.057648] TCP bind hash table entries: 8192 (order: 5, 131072 bytes, linear)
+   [    0.058579] TCP: Hash tables configured (established 8192 bind 8192)
+   [    0.059648] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
+   [    0.059837] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
+   [    0.060707] NET: Registered protocol family 1
+   [    0.266229] workingset: timestamp_bits=62 max_order=18 bucket_order=0
+   [    0.287107] io scheduler mq-deadline registered
+   [    0.287140] io scheduler kyber registered
+   [    0.429601] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+   [    0.433979] printk: console [ttyS0] disabled
+   [    0.434154] 20000000.serial: ttyS0 at MMIO 0x20000000 (irq = 18, base_baud = 9375000) is a 16550A
+   [    0.928039] printk: console [ttyS0] enabled
+   [    0.939804] libphy: Fixed MDIO Bus: probed
+   [    0.948702] libphy: MACB_mii_bus: probed
+   [    0.993698] macb 20112000.ethernet eth0: Cadence GEM rev 0x0107010c at 0x20112000 irq 21 (56:34:12:00:fc:00)
+   [    1.006751] mousedev: PS/2 mouse device common for all mice
+   [    1.013803] i2c /dev entries driver
+   [    1.019451] sdhci: Secure Digital Host Controller Interface driver
+   [    1.027242] sdhci: Copyright(c) Pierre Ossman
+   [    1.032731] sdhci-pltfm: SDHCI platform and OF driver helper
+   [    1.091826] mmc0: SDHCI controller on 20008000.sdhc [20008000.sdhc] using ADMA 64-bit
+   [    1.102738] NET: Registered protocol family 17
+   [    1.170326] Freeing unused kernel memory: 9476K
+   [    1.176067] This architecture does not have kernel memory protection.
+   [    1.184157] Run /init as init process
+   Starting logging: OK
+   Starting mdev...
+   /etc/init.d/S10mdev: line 21: can't create /proc/sys/kernel/hotplug: nonexiste[    1.331981] mmc0: mmc_select_hs200 failed, error -74
+   nt directory
+   [    1.355011] mmc0: new MMC card at address 0001
+   [    1.363981] mmcblk0: mmc0:0001 DG4008 7.28 GiB
+   [    1.372248] mmcblk0boot0: mmc0:0001 DG4008 partition 1 4.00 MiB
+   [    1.382292] mmcblk0boot1: mmc0:0001 DG4008 partition 2 4.00 MiB
+   [    1.390265] mmcblk0rpmb: mmc0:0001 DG4008 partition 3 4.00 MiB, chardev (251:0)
+   [    1.425234] GPT:Primary header thinks Alt. header is not at the end of the disk.
+   [    1.434656] GPT:2255809 != 15273599
+   [    1.439038] GPT:Alternate GPT header not at the end of the disk.
+   [    1.446671] GPT:2255809 != 15273599
+   [    1.451048] GPT: Use GNU Parted to correct GPT errors.
+   [    1.457755]  mmcblk0: p1 p2 p3
+   sort: /sys/devices/platform/Fixed: No such file or directory
+   modprobe: can't change directory to '/lib/modules': No such file or directory
+   Initializing random number generator... [    2.830198] random: dd: uninitialized urandom read (512 bytes read)
+   done.
+   Starting network...
+   [    3.061867] macb 20112000.ethernet eth0: PHY [20112000.ethernet-ffffffff:09] driver [Vitesse VSC8662] (irq=POLL)
+   [    3.074674] macb 20112000.ethernet eth0: configuring for phy/sgmii link mode
+   [    3.084263] pps pps0: new PPS source ptp0
+   [    3.089710] macb 20112000.ethernet: gem-ptp-timer ptp clock registered.
+   udhcpc (v1.24.2) started
+   Sending discover...
+   Sending discover...
+   [    6.380169] macb 20112000.ethernet eth0: Link is Up - 1Gbps/Full - flow control tx
+   Sending discover...
+   Sending select for 192.168.1.2...
+   Lease of 192.168.1.2 obtained, lease time 86400
+   deleting routers
+   adding dns 192.168.1.1
+   Starting dropbear sshd: [   11.385619] random: dropbear: uninitialized urandom read (32 bytes read)
+   OK
+
+   Welcome to Buildroot
+   buildroot login: root
+   Password:
+   #
+
+Booting U-Boot and Linux from eMMC
+----------------------------------
+
+FPGA design with HSS programming file and Linux Image
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md
+
+The HSS firmware runs from the PolarFire SoC eNVM on reset.
+
+eMMC
+~~~~
+
+Program eMMC with payload binary and Linux image is explained in the
+PolarFire SoC documentation.
+The payload binary should be copied to partition 2 of the eMMC.
+
+(Note: PolarFire SoC Documentation git repo is at https://github.com/polarfire-soc/polarfire-soc-documentation/blob/master/boards/mpfs-icicle-kit-es/updating-icicle-kit/updating-icicle-kit-design-and-linux.md#eMMC)
+
+Once the Linux image and payload binary is copied to the eMMC, press CTRL+C
+in the HSS command line interface, then type 'boot' and enter to boot the newly
+copied payload and Linux image.
+
+.. code-block:: none
+
+    zcat <linux-image>.wic.gz | sudo dd of=/dev/sdX bs=4096 iflag=fullblock oflag=direct conv=fsync status=progress
+
+    sudo dd if=<payload_binary> of=/dev/sdX2 bs=512
+
+You should see the U-Boot prompt on UART1.
+(Note: UART0 is reserved for HSS)
+
+GUID type
+~~~~~~~~~
+
+The HSS always picks up the HSS payload from a GPT partition with
+GUID type "21686148-6449-6E6F-744E-656564454649" or sector '0' of the eMMC if no
+GPT partition.
+
+Sample boot log from MPFS Icicle Kit
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: none
+
+   U-Boot 2021.01-00314-g7303332537-dirty (Jan 14 2021 - 10:09:43 +0530)
+
+   CPU:   rv64imafdc
+   Model: Microchip MPFS Icicle Kit
+   DRAM:  1 GiB
+   MMC:   sdhc@20008000: 0
+   In:    serial@20100000
+   Out:   serial@20100000
+   Err:   serial@20100000
+   Net:   eth0: ethernet@20112000
+   Hit any key to stop autoboot:  0
+
+   RISC-V # mmc info
+   Device: sdhc@20008000
+   Manufacturer ID: 45
+   OEM: 100
+   Name: DG400
+   Bus Speed: 52000000
+   Mode: MMC High Speed (52MHz)
+   Rd Block Len: 512
+   MMC version 5.1
+   High Capacity: Yes
+   Capacity: 7.3 GiB
+   Bus Width: 4-bit
+   Erase Group Size: 512 KiB
+   HC WP Group Size: 8 MiB
+   User Capacity: 7.3 GiB WRREL
+   Boot Capacity: 4 MiB ENH
+   RPMB Capacity: 4 MiB ENH
+
+   RISC-V # mmc part
+   Partition Map for MMC device 0  --   Partition Type: EFI
+
+   Part	Start LBA	End LBA		Name
+		Attributes
+		Type GUID
+		Partition GUID
+	1	0x00002000	0x0000b031	"boot"
+		attrs:	0x0000000000000004
+		type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+		guid:	99ff6a94-f2e7-44dd-a7df-f3a2da106ef9
+	2	0x0000b032	0x0000f031	"primary"
+		attrs:	0x0000000000000000
+		type:	21686148-6449-6e6f-744e-656564454649
+		guid:	12006052-e64b-4423-beb0-b956ea00f1ba
+	3	0x00010000	0x00226b9f	"root"
+		attrs:	0x0000000000000000
+		type:	0fc63daf-8483-4772-8e79-3d69d8477de4
+		guid:	dd2c5619-2272-4c3c-8dc2-e21942e17ce6
+
+   RISC-V # load mmc 0 ${ramdisk_addr_r} fitimage
+   RISC-V # bootm ${ramdisk_addr_r}
+   ## Loading kernel from FIT Image at 88300000 ...
+   Using 'conf@microchip_icicle-kit-es-a000-microchip.dtb' configuration
+   Trying 'kernel@1' kernel subimage
+     Description:  Linux kernel
+     Type:         Kernel Image
+     Compression:  gzip compressed
+     Data Start:   0x883000fc
+     Data Size:    3574555 Bytes = 3.4 MiB
+     Architecture: RISC-V
+     OS:           Linux
+     Load Address: 0x80200000
+     Entry Point:  0x80200000
+     Hash algo:    sha256
+     Hash value:   21f18d72cf2f0a7192220abb577ad25c77c26960052d779aa02bf55dbf0a6403
+   Verifying Hash Integrity ... sha256+ OK
+   ## Loading fdt from FIT Image at 88300000 ...
+   Using 'conf@microchip_icicle-kit-es-a000-microchip.dtb' configuration
+   Trying 'fdt@microchip_icicle-kit-es-a000-microchip.dtb' fdt subimage
+     Description:  Flattened Device Tree blob
+     Type:         Flat Device Tree
+     Compression:  uncompressed
+     Data Start:   0x88668d44
+     Data Size:    9760 Bytes = 9.5 KiB
+     Architecture: RISC-V
+     Load Address: 0x82200000
+     Hash algo:    sha256
+     Hash value:   5c3a9f30d41b6b8e53b47916e1f339b3a4d454006554d1f7e1f552ed62409f4b
+   Verifying Hash Integrity ... sha256+ OK
+   Loading fdt from 0x88668d48 to 0x82200000
+   Booting using the fdt blob at 0x82200000
+   Uncompressing Kernel Image
+   Loading Device Tree to 000000008fffa000, end 000000008ffff61f ... OK
+
+   Starting kernel ...
+
+   [    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
+   [    0.000000] Linux version 5.6.16 (oe-user@oe-host) (gcc version 9.3.0 (GCC)) #1 SMP Fri Oct 9 11:49:47 UTC 2020
+   [    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
+   [    0.000000] printk: bootconsole [sbi0] enabled
+   [    0.000000] Zone ranges:
+   [    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000]   Normal   empty
+   [    0.000000] Movable zone start for each node
+   [    0.000000] Early memory node ranges
+   [    0.000000]   node   0: [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000] Zeroed struct page in unavailable ranges: 512 pages
+   [    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x00000000bfffffff]
+   [    0.000000] software IO TLB: mapped [mem 0xb9e00000-0xbde00000] (64MB)
+   [    0.000000] CPU with hartid=0 is not available
+   [    0.000000] CPU with hartid=0 is not available
+   [    0.000000] elf_hwcap is 0x112d
+   [    0.000000] percpu: Embedded 17 pages/cpu s29784 r8192 d31656 u69632
+   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 258055
+   [    0.000000] Kernel command line: earlycon=sbi root=/dev/mmcblk0p3 rootwait console=ttyS0,115200n8 uio_pdrv_genirq.of_id=generic-uio
+   [    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
+   [    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
+   [    0.000000] Sorting __ex_table...
+   [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+   [    0.000000] Memory: 941440K/1046528K available (4118K kernel code, 280K rwdata, 1687K rodata, 169K init, 273K bss, 105088K reserved, 0K cma-reserved)
+   [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
+   [    0.000000] rcu: Hierarchical RCU implementation.
+   [    0.000000] rcu: 	RCU event tracing is enabled.
+   [    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=5 to nr_cpu_ids=4.
+   [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
+   [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
+   [    0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0
+   [    0.000000] plic: mapped 53 interrupts with 4 handlers for 9 contexts.
+   [    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1]
+   [    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns
+   [    0.000015] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
+   [    0.008679] Console: colour dummy device 80x25
+   [    0.013112] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=10000)
+   [    0.023368] pid_max: default: 32768 minimum: 301
+   [    0.028314] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+   [    0.035766] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+   [    0.047099] rcu: Hierarchical SRCU implementation.
+   [    0.052813] smp: Bringing up secondary CPUs ...
+   [    0.061581] smp: Brought up 1 node, 4 CPUs
+   [    0.067069] devtmpfs: initialized
+   [    0.073621] random: get_random_u32 called from bucket_table_alloc.isra.0+0x4e/0x150 with crng_init=0
+   [    0.074409] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
+   [    0.093399] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
+   [    0.101879] NET: Registered protocol family 16
+   [    0.110336] microchip-pfsoc-clkcfg 20002000.clkcfg: Registered PFSOC core clocks
+   [    0.132717] usbcore: registered new interface driver usbfs
+   [    0.138225] usbcore: registered new interface driver hub
+   [    0.143813] usbcore: registered new device driver usb
+   [    0.148939] pps_core: LinuxPPS API ver. 1 registered
+   [    0.153929] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+   [    0.163071] PTP clock support registered
+   [    0.168521] clocksource: Switched to clocksource riscv_clocksource
+   [    0.174927] VFS: Disk quotas dquot_6.6.0
+   [    0.179016] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
+   [    0.205536] NET: Registered protocol family 2
+   [    0.210944] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
+   [    0.219393] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
+   [    0.227497] TCP bind hash table entries: 8192 (order: 5, 131072 bytes, linear)
+   [    0.235440] TCP: Hash tables configured (established 8192 bind 8192)
+   [    0.242537] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
+   [    0.249285] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
+   [    0.256690] NET: Registered protocol family 1
+   [    0.262585] workingset: timestamp_bits=62 max_order=18 bucket_order=0
+   [    0.281036] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 249)
+   [    0.288481] io scheduler mq-deadline registered
+   [    0.292983] io scheduler kyber registered
+   [    0.298895] microsemi,mss-gpio 20122000.gpio: Microsemi MSS GPIO registered 32 GPIOs
+   [    0.453723] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+   [    0.462911] printk: console [ttyS0] disabled
+   [    0.467216] 20100000.serial: ttyS0 at MMIO 0x20100000 (irq = 12, base_baud = 9375000) is a 16550A
+   [    0.476201] printk: console [ttyS0] enabled
+   [    0.476201] printk: console [ttyS0] enabled
+   [    0.484576] printk: bootconsole [sbi0] disabled
+   [    0.484576] printk: bootconsole [sbi0] disabled
+   [    0.494920] 20102000.serial: ttyS1 at MMIO 0x20102000 (irq = 13, base_baud = 9375000) is a 16550A
+   [    0.505068] 20104000.serial: ttyS2 at MMIO 0x20104000 (irq = 14, base_baud = 9375000) is a 16550A
+   [    0.533336] loop: module loaded
+   [    0.572284] Rounding down aligned max_sectors from 4294967295 to 4294967288
+   [    0.580000] db_root: cannot open: /etc/target
+   [    0.585413] libphy: Fixed MDIO Bus: probed
+   [    0.591526] libphy: MACB_mii_bus: probed
+   [    0.598060] macb 20112000.ethernet eth0: Cadence GEM rev 0x0107010c at 0x20112000 irq 17 (56:34:12:00:fc:00)
+   [    0.608352] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
+   [    0.615001] ehci-platform: EHCI generic platform driver
+   [    0.620446] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
+   [    0.626632] ohci-platform: OHCI generic platform driver
+   [    0.632326] usbcore: registered new interface driver cdc_acm
+   [    0.637996] cdc_acm: USB Abstract Control Model driver for USB modems and ISDN adapters
+   [    0.646459] i2c /dev entries driver
+   [    0.650852] microsemi-mss-i2c 2010b000.i2c: Microsemi I2C Probe Complete
+   [    0.658010] sdhci: Secure Digital Host Controller Interface driver
+   [    0.664326] sdhci: Copyright(c) Pierre Ossman
+   [    0.668754] sdhci-pltfm: SDHCI platform and OF driver helper
+   [    0.706845] mmc0: SDHCI controller on 20008000.sdhc [20008000.sdhc] using ADMA 64-bit
+   [    0.715052] usbcore: registered new interface driver usbhid
+   [    0.720722] usbhid: USB HID core driver
+   [    0.725174] pac193x 0-0010: Chip revision: 0x03
+   [    0.733339] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 0 active
+   [    0.740127] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 1 active
+   [    0.746881] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 2 active
+   [    0.753686] pac193x 0-0010: :pac193x_prep_iio_channels: Channel 3 active
+   [    0.760495] pac193x 0-0010: :pac193x_prep_iio_channels: Active chip channels: 25
+   [    0.778006] NET: Registered protocol family 10
+   [    0.784929] Segment Routing with IPv6
+   [    0.788875] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
+   [    0.795743] NET: Registered protocol family 17
+   [    0.801191] hctosys: unable to open rtc device (rtc0)
+   [    0.807774] Waiting for root device /dev/mmcblk0p3...
+   [    0.858506] mmc0: mmc_select_hs200 failed, error -74
+   [    0.865764] mmc0: new MMC card at address 0001
+   [    0.872564] mmcblk0: mmc0:0001 DG4008 7.28 GiB
+   [    0.878777] mmcblk0boot0: mmc0:0001 DG4008 partition 1 4.00 MiB
+   [    0.886182] mmcblk0boot1: mmc0:0001 DG4008 partition 2 4.00 MiB
+   [    0.892633] mmcblk0rpmb: mmc0:0001 DG4008 partition 3 4.00 MiB, chardev (247:0)
+   [    0.919029] GPT:Primary header thinks Alt. header is not at the end of the disk.
+   [    0.926448] GPT:2255841 != 15273599
+   [    0.930019] GPT:Alternate GPT header not at the end of the disk.
+   [    0.936029] GPT:2255841 != 15273599
+   [    0.939583] GPT: Use GNU Parted to correct GPT errors.
+   [    0.944800]  mmcblk0: p1 p2 p3
+   [    0.966696] EXT4-fs (mmcblk0p3): INFO: recovery required on readonly filesystem
+   [    0.974105] EXT4-fs (mmcblk0p3): write access will be enabled during recovery
+   [    1.052362] random: fast init done
+   [    1.057961] EXT4-fs (mmcblk0p3): recovery complete
+   [    1.065734] EXT4-fs (mmcblk0p3): mounted filesystem with ordered data mode. Opts: (null)
+   [    1.074002] VFS: Mounted root (ext4 filesystem) readonly on device 179:3.
+   [    1.081654] Freeing unused kernel memory: 168K
+   [    1.086108] This architecture does not have kernel memory protection.
+   [    1.092629] Run /sbin/init as init process
+   [    1.702217] systemd[1]: System time before build time, advancing clock.
+   [    1.754192] systemd[1]: systemd 244.3+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR -SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid)
+   [    1.776361] systemd[1]: Detected architecture riscv64.
+
+   Welcome to OpenEmbedded nodistro.0!
+
+   [    1.829651] systemd[1]: Set hostname to <icicle-kit-es>.
+   [    2.648597] random: systemd: uninitialized urandom read (16 bytes read)
+   [    2.657485] systemd[1]: Created slice system-getty.slice.
+   [  OK  ] Created slice system-getty.slice.
+   [    2.698779] random: systemd: uninitialized urandom read (16 bytes read)
+   [    2.706317] systemd[1]: Created slice system-serial\x2dgetty.slice.
+   [  OK  ] Created slice system-serial\x2dgetty.slice.
+   [    2.748716] random: systemd: uninitialized urandom read (16 bytes read)
+   [    2.756098] systemd[1]: Created slice User and Session Slice.
+   [  OK  ] Created slice User and Session Slice.
+   [    2.789065] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
+   [  OK  ] Started Dispatch Password …ts to Console Directory Watch.
+   [    2.828974] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
+   [  OK  ] Started Forward Password R…uests to Wall Directory Watch.
+   [    2.869009] systemd[1]: Reached target Paths.
+   [  OK  ] Reached target Paths.
+   [    2.898808] systemd[1]: Reached target Remote File Systems.
+   [  OK  ] Reached target Remote File Systems.
+   [    2.938771] systemd[1]: Reached target Slices.
+   [  OK  ] Reached target Slices.
+   [    2.968754] systemd[1]: Reached target Swap.
+   [  OK  ] Reached target Swap.
+   [    2.999283] systemd[1]: Listening on initctl Compatibility Named Pipe.
+   [  OK  ] Listening on initctl Compatibility Named Pipe.
+   [    3.060458] systemd[1]: Condition check resulted in Journal Audit Socket being skipped.
+   [    3.069826] systemd[1]: Listening on Journal Socket (/dev/log).
+   [  OK  ] Listening on Journal Socket (/dev/log).
+   [    3.109601] systemd[1]: Listening on Journal Socket.
+   [  OK  ] Listening on Journal Socket.
+   [    3.149868] systemd[1]: Listening on Network Service Netlink Socket.
+   [  OK  ] Listening on Network Service Netlink Socket.
+   [    3.189419] systemd[1]: Listening on udev Control Socket.
+   [  OK  ] Listening on udev Control Socket.
+   [    3.229179] systemd[1]: Listening on udev Kernel Socket.
+   [  OK  ] Listening on udev Kernel Socket.
+   [    3.269520] systemd[1]: Condition check resulted in Huge Pages File System being skipped.
+   [    3.278477] systemd[1]: Condition check resulted in POSIX Message Queue File System being skipped.
+   [    3.288200] systemd[1]: Condition check resulted in Kernel Debug File System being skipped.
+   [    3.302570] systemd[1]: Mounting Temporary Directory (/tmp)...
+            Mounting Temporary Directory (/tmp)...
+   [    3.339226] systemd[1]: Condition check resulted in Create list of static device nodes for the current kernel being skipped.
+   [    3.355883] systemd[1]: Starting File System Check on Root Device...
+            Starting File System Check on Root Device...
+   [    3.407220] systemd[1]: Starting Journal Service...
+            Starting Journal Service...
+   [    3.422441] systemd[1]: Condition check resulted in Load Kernel Modules being skipped.
+   [    3.431770] systemd[1]: Condition check resulted in FUSE Control File System being skipped.
+   [    3.446415] systemd[1]: Mounting Kernel Configuration File System...
+            Mounting Kernel Configuration File System...
+   [    3.458983] systemd[1]: Starting Apply Kernel Variables...
+            Starting Apply Kernel Variables...
+   [    3.471368] systemd[1]: Starting udev Coldplug all Devices...
+            Starting udev Coldplug all Devices...
+   [    3.491071] systemd[1]: Mounted Temporary Directory (/tmp).
+   [  OK      3.498114] systemd[1]: Mounted Kernel Configuration File System.
+   0m] Mounted Temporary Directory (/tmp).
+   [  OK  ] Mounted Kernel Configuration File System.
+   [    3.550853] systemd[1]: Started Apply Kernel Variables.
+   [  OK      3.557535] systemd[1]: Started Journal Service.
+   0m] Started Apply Kernel Variables.
+   [  OK  ] Started Journal Service.
+   [  OK  ] Started udev Coldplug all Devices.
+   [  OK  ] Started File System Check on Root Device.
+            Starting Remount Root and Kernel File Systems...
+   [    8.133469] EXT4-fs (mmcblk0p3): re-mounted. Opts: (null)
+   [  OK  ] Started Remount Root and Kernel File Systems.
+            Starting Flush Journal to Persistent Storage...
+   [    8.215327] systemd-journald[77]: Received client request to flush runtime journal.
+            Starting Create Static Device Nodes in /dev...
+   [  OK  ] Started Flush Journal to Persistent Storage.
+   [  OK  ] Started Create Static Device Nodes in /dev.
+   [  OK  ] Reached target Local File Systems (Pre).
+            Mounting /var/volatile...
+            Starting udev Kernel Device Manager...
+   [  OK  ] Mounted /var/volatile.
+            Starting Load/Save Random Seed...
+   [  OK  ] Reached target Local File Systems.
+            Starting Create Volatile Files and Directories...
+   [  OK  ] Started udev Kernel Device Manager.
+   [  OK  ] Started Create Volatile Files and Directories.
+            Starting Network Time Synchronization...
+            Starting Update UTMP about System Boot/Shutdown...
+   [  OK  ] Started Update UTMP about System Boot/Shutdown.
+   [  OK  ] Started Network Time Synchronization.
+   [   11.618575] random: crng init done
+   [   11.622007] random: 7 urandom warning(s) missed due to ratelimiting
+   [  OK  ] Started Load/Save Random Seed.
+   [  OK  ] Reached target System Initialization.
+   [  OK  ] Started Daily Cleanup of Temporary Directories.
+   [  OK  ] Reached target System Time Set.
+   [  OK  ] Reached target System Time Synchronized.
+   [  OK  ] Reached target Timers.
+   [  OK  ] Listening on D-Bus System Message Bus Socket.
+   [  OK  ] Listening on dropbear.socket.
+   [  OK  ] Reached target Sockets.
+   [  OK  ] Reached target Basic System.
+   [  OK  ] Started D-Bus System Message Bus.
+            Starting IPv6 Packet Filtering Framework...
+            Starting IPv4 Packet Filtering Framework...
+            Starting Login Service...
+   [  OK  ] Started IPv6 Packet Filtering Framework.
+   [  OK  ] Started IPv4 Packet Filtering Framework.
+   [  OK  ] Reached target Network (Pre).
+            Starting Network Service...
+   [  OK  ] Started Login Service.
+   [   12.602455] macb 20112000.ethernet eth0: PHY [20112000.ethernet-ffffffff:09] driver [Vitesse VSC8662] (irq=POLL)
+   [   12.612795] macb 20112000.ethernet eth0: configuring for phy/sgmii link mode
+   [   12.622153] pps pps0: new PPS source ptp0
+   [  OK     12.626725] macb 20112000.ethernet: gem-ptp-timer ptp clock registered.
+   0m] Started Network Service.
+            Starting Network Name Resolution...
+   [  OK  ] Started Network Name Resolution.
+   [  OK  ] Reached target Network.
+   [  OK  ] Reached target Host and Network Name Lookups.
+   [  OK  ] Started Collectd.
+   [  OK  ] Started Collectd.
+            Starting Permit User Sessions...
+   [  OK  ] Started Permit User Sessions.
+   [  OK  ] Started Getty on tty1.
+   [  OK  ] Started Serial Getty on ttyS0.
+   [  OK  ] Reached target Login Prompts.
+   [  OK  ] Reached target Multi-User System.
+            Starting Update UTMP about System Runlevel Changes...
+   [  OK  ] Started Update UTMP about System Runlevel Changes.
+
+   OpenEmbedded nodistro.0 icicle-kit-es ttyS0
+
+   icicle-kit-es login: [   15.795564] macb 20112000.ethernet eth0: Link is Up - 1Gbps/Full - flow control tx
+   [   15.803306] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
+
+   icicle-kit-es login: root
+   root@icicle-kit-es:~#
diff --git a/doc/board/microsoft/index.rst b/doc/board/microsoft/index.rst
new file mode 100644
index 00000000000..107f3527852
--- /dev/null
+++ b/doc/board/microsoft/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Microsoft
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   surface-rt
diff --git a/doc/board/microsoft/surface-rt.rst b/doc/board/microsoft/surface-rt.rst
new file mode 100644
index 00000000000..b5645e79340
--- /dev/null
+++ b/doc/board/microsoft/surface-rt.rst
@@ -0,0 +1,41 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the Microsoft Surface RT tablet
+==========================================
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Boot
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ make surface-rt_defconfig
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
+image, ready for loading.
+
+Boot
+----
+
+Currently, U-Boot can be preloaded into RAM via the Fusée Gelée. To enter
+RCM protocol use ``power`` and ``volume up`` key combination from powered
+off device. The host PC should recognize an APX device.
+
+Built U-Boot ``u-boot-dtb-tegra.bin`` can be loaded from fusee-tools
+directory with
+
+.. code-block:: bash
+
+    $ ./run_bootloader.sh -s T30 -t ./bct/surface-rt.bct
+
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
+eMMC. Additionally, if the Volume Down button is pressed while loading, the
+device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
+as mass storage, fastboot, reboot, reboot RCM, poweroffand enter U-Boot console.
diff --git a/doc/board/nxp/imx8mm_evk.rst b/doc/board/nxp/imx8mm_evk.rst
new file mode 100644
index 00000000000..bb11029fbcd
--- /dev/null
+++ b/doc/board/nxp/imx8mm_evk.rst
@@ -0,0 +1,90 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8mm_evk
+==========
+
+U-Boot for the NXP i.MX8MM EVK board
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get ddr firmware
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: builddir is U-Boot build directory (source directory for in-tree builds)
+Get ATF from: https://github.com/nxp-imx/imx-atf
+branch: imx_5.4.47_2.2.0
+
+.. code-block:: bash
+
+   $ make PLAT=imx8mm bl31
+   $ cp build/imx8mm/release/bl31.bin $(builddir)
+
+Get the ddr firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin
+   $ chmod +x firmware-imx-8.9.bin
+   $ ./firmware-imx-8.9
+   $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
+
+Build U-Boot for sd card
+------------------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-poky-linux-
+   $ make imx8mm_evk_defconfig
+   $ make
+
+Burn the flash.bin to MicroSD card offset 33KB:
+
+.. code-block:: bash
+
+   $sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc
+
+Boot
+----
+Set Boot switch to SD boot
+
+Build U-Boot for qspi flash card
+--------------------------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-poky-linux-
+   $ make imx8mm_evk_fspi_defconfig
+   $ make
+
+Currently, there is no direct support to write to QSPI Flash.
+Copy flash.bin to ${loadaddr} either from sd card or over network and then copy to
+qspi flash
+
+From sd card to memory
+
+.. code-block:: bash
+
+    $mmc dev 1
+    $mmc read ${loadaddr} 0x00 <size_of_flash.bin/512>
+
+.. code-block:: bash
+
+   $ sf probe
+   $ sf erase 0 <size_of_flash.bin_in_hex>
+   $ sf write $loadaddr 0x00 <size_of_flash.bin_in_hex>
+
+Boot from QSPI Flash
+--------------------
+
+Set Boot Switch to QSPI Flash
+
+Pin configuration for imx8mm_revC evk to boot from qspi flash
+SW1101: 0110xxxxxx
+SW1102: 00100x0010
diff --git a/doc/board/nxp/imx8mn_evk.rst b/doc/board/nxp/imx8mn_evk.rst
new file mode 100644
index 00000000000..4f225ea6601
--- /dev/null
+++ b/doc/board/nxp/imx8mn_evk.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8mn_evk
+==========
+
+U-Boot for the NXP i.MX8MN EVK board
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get firmware-imx package
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://github.com/nxp-imx/imx-atf
+branch: imx_5.4.47_2.2.0
+
+.. code-block:: bash
+
+   $ make PLAT=imx8mn bl31
+   $ cp build/imx8mn/release/bl31.bin $(srctree)
+
+Get the ddr firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin
+   $ chmod +x firmware-imx-8.9.bin
+   $ ./firmware-imx-8.9
+   $ cp firmware-imx-8.9/firmware/ddr/synopsys/ddr4*.bin $(srctree)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-poky-linux-
+   $ make imx8mn_ddr4_evk_defconfig
+   $ make
+
+Burn the flash.bin to MicroSD card offset 32KB:
+
+.. code-block:: bash
+
+   $sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
+
+Boot
+----
+
+Set Boot switch to SD boot
diff --git a/doc/board/nxp/imx8mp_evk.rst b/doc/board/nxp/imx8mp_evk.rst
new file mode 100644
index 00000000000..72175dbe78f
--- /dev/null
+++ b/doc/board/nxp/imx8mp_evk.rst
@@ -0,0 +1,61 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8mp_evk
+==========
+
+U-Boot for the NXP i.MX8MP EVK board
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get the firmware-imx package
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Get ATF from: https://github.com/nxp-imx/imx-atf
+branch: imx_5.4.70_2.3.0
+
+.. code-block:: bash
+
+   $ make PLAT=imx8mp bl31
+
+Get the ddr firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.10.bin
+   $ chmod +x firmware-imx-8.10.bin
+   $ ./firmware-imx-8.10.bin
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+Note: builddir is U-Boot build directory (source directory for in-tree builds).
+
+   $ export CROSS_COMPILE=aarch64-poky-linux-
+   $ make O=build imx8mp_evk_defconfig
+   $ cp ../imx-atf/build/imx8mp/release/bl31.bin $(builddir)
+   $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem_202006.bin $(builddir)
+   $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem_202006.bin $(builddir)
+   $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem_202006.bin $(builddir)
+   $ cp ../firmware-imx-8.10/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem_202006.bin $(builddir)
+   $ make
+
+Burn the flash.bin to the MicroSD card at offset 32KB:
+
+.. code-block:: bash
+
+   $ sudo dd if=flash.bin of=/dev/sd[x] bs=1K seek=32 conv=notrunc; sync
+
+Boot
+----
+
+Set Boot switch to SD boot
+Use /dev/ttyUSB2 for U-Boot console
diff --git a/doc/board/nxp/imx8mq_evk.rst b/doc/board/nxp/imx8mq_evk.rst
new file mode 100644
index 00000000000..4b0624e7e86
--- /dev/null
+++ b/doc/board/nxp/imx8mq_evk.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8mq_evk
+==========
+
+U-Boot for the NXP i.MX8MQ EVK board
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get ddr and hdmi fimware
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://github.com/nxp-imx/imx-atf
+branch: imx_5.4.47_2.2.0
+
+.. code-block:: bash
+
+   $ make PLAT=imx8mq bl31
+   $ cp build/imx8mq/release/bl31.bin $(builddir)
+
+Get the ddr and hdmi firmware
+-----------------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin
+   $ chmod +x firmware-imx-8.9.bin
+   $ ./firmware-imx-8.9.bin
+   $ cp firmware-imx-8.9/firmware/hdmi/cadence/signed_hdmi_imx8m.bin $(builddir)
+   $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-poky-linux-
+   $ make imx8mq_evk_defconfig
+   $ make
+
+Burn the flash.bin to MicroSD card offset 33KB:
+
+.. code-block:: bash
+
+   $sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=notrunc
+
+Boot
+----
+Set Boot switch SW801: 1100 and Bmode: 10 to boot from Micro SD.
diff --git a/doc/board/nxp/imx8qxp_mek.rst b/doc/board/nxp/imx8qxp_mek.rst
new file mode 100644
index 00000000000..bdd38368f1a
--- /dev/null
+++ b/doc/board/nxp/imx8qxp_mek.rst
@@ -0,0 +1,66 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8qxp_mek
+===========
+
+U-Boot for the NXP i.MX8QXP EVK board
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Build U-Boot
+- Flash the binary into the SD card
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+.. code-block:: bash
+
+   $ git clone https://github.com/nxp-imx/imx-atf
+   $ cd imx-atf/
+   $ git checkout origin/imx_4.19.35_1.1.0 -b imx_4.19.35_1.1.0
+   $ make PLAT=imx8qx bl31
+
+Get scfw_tcm.bin and ahab-container.img
+---------------------------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-sc-firmware-1.2.7.1.bin
+   $ chmod +x imx-sc-firmware-1.2.7.1.bin
+   $ ./imx-sc-firmware-1.2.7.1.bin
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-2.3.1.bin
+   $ chmod +x imx-seco-2.3.1.bin
+   $ ./imx-seco-2.3.1.bin
+
+Copy the following binaries to U-Boot folder:
+
+.. code-block:: bash
+
+  $ cp imx-atf/build/imx8qx/release/bl31.bin .
+  $ cp imx-seco-2.3.1/firmware/seco/mx8qx-ahab-container.img ./ahab-container.img
+  $ cp imx-sc-firmware-1.2.7.1/mx8qx-mek-scfw-tcm.bin	.
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+  $ make imx8qxp_mek_defconfig
+  $ make
+
+Flash the binary into the SD card
+---------------------------------
+
+Burn the flash.bin binary to SD card offset 32KB:
+
+.. code-block:: bash
+
+   $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
+
+Boot
+----
+Set Boot switch SW2: 1100.
diff --git a/doc/board/nxp/imx93_11x11_evk.rst b/doc/board/nxp/imx93_11x11_evk.rst
new file mode 100644
index 00000000000..171645ad06c
--- /dev/null
+++ b/doc/board/nxp/imx93_11x11_evk.rst
@@ -0,0 +1,68 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx93_11x11_evk
+=======================
+
+U-Boot for the NXP i.MX93 EVK on the 11x11mm board
+
+Quick Start
+-----------
+
+- Get and Build the ARM Trusted firmware
+- Get the DDR firmware
+- Get ahab-container.img
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://github.com/nxp-imx/imx-atf/
+branch: lf_v2.8
+
+.. code-block:: bash
+
+   $ unset LDFLAGS
+   $ make PLAT=imx93 bl31
+   $ cp build/imx93/release/bl31.bin $(srctree)
+
+Get the DDR firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin
+   $ chmod +x firmware-imx-8.21.bin
+   $ ./firmware-imx-8.21.bin
+   $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
+
+Get ahab-container.img
+---------------------------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.11.bin
+   $ chmod +x firmware-sentinel-0.11.bin
+   $ ./firmware-sentinel-0.11.bin
+   $ cp firmware-sentinel-0.11/mx93a1-ahab-container.img $(srctree)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-poky-linux-
+   $ make imx93_11x11_evk_defconfig
+   $ make
+
+Burn the flash.bin to MicroSD card offset 32KB:
+
+.. code-block:: bash
+
+   $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
+
+Boot
+----
+
+Set Boot switch to SD boot
diff --git a/doc/board/nxp/imxrt1020-evk.rst b/doc/board/nxp/imxrt1020-evk.rst
new file mode 100644
index 00000000000..267f80c5170
--- /dev/null
+++ b/doc/board/nxp/imxrt1020-evk.rst
@@ -0,0 +1,41 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imxrt1020-evk
+=============
+
+How to use U-Boot on NXP i.MXRT1020 EVK
+---------------------------------------
+
+- Build U-Boot for i.MXRT1020 EVK:
+
+.. code-block:: bash
+
+   $ make mrproper
+   $ make imxrt1020-evk_defconfig
+   $ make
+
+This will generate the SPL image called SPL and the u-boot.img.
+
+- Flash the SPL image into the micro SD card:
+
+.. code-block:: bash
+
+   $sudo dd if=SPL of=/dev/sdX bs=1k seek=1 conv=notrunc; sync
+
+- Flash the u-boot.img image into the micro SD card:
+
+.. code-block:: bash
+
+   $sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128 conv=notrunc; sync
+
+- Jumper settings::
+
+   SW8: 0 1 1 0
+
+where 0 means bottom position and 1 means top position (from the
+switch label numbers reference).
+
+- Connect the USB cable between the EVK and the PC for the console.
+  The USB console connector is the one close the ethernet connector
+
+- Insert the micro SD card in the board, power it up and U-Boot messages should come up.
diff --git a/doc/board/nxp/imxrt1050-evk.rst b/doc/board/nxp/imxrt1050-evk.rst
new file mode 100644
index 00000000000..e0cafe1035d
--- /dev/null
+++ b/doc/board/nxp/imxrt1050-evk.rst
@@ -0,0 +1,71 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imxrt1050-evk
+=============
+
+How to use U-Boot on NXP i.MXRT1050 EVK
+---------------------------------------
+
+- Build U-Boot for i.MXRT1050 EVK:
+
+.. code-block:: bash
+
+   $ make mrproper
+   $ make imxrt1050-evk_defconfig
+   $ make
+
+This will generate the SPL image called SPL and the u-boot.img.
+
+- Flash the SPL image into the micro SD card:
+
+.. code-block:: bash
+
+   $sudo dd if=SPL of=/dev/sdX bs=1k seek=1 conv=notrunc; sync
+
+- Flash the u-boot.img image into the micro SD card:
+
+.. code-block:: bash
+
+   $sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128 conv=notrunc; sync
+
+- Jumper settings::
+
+   SW7: 1 0 1 0
+
+where 0 means bottom position and 1 means top position (from the
+switch label numbers reference).
+
+- Connect the USB cable between the EVK and the PC for the console.
+  The USB console connector is the one close the ethernet connector
+
+- Insert the micro SD card in the board, power it up and U-Boot messages should come up.
+
+
+How to use U-Boot with SPI flash on NXP i.MXRT1050 EVK
+------------------------------------------------------
+
+- Build U-Boot for i.MXRT1050 EVK:
+
+.. code-block:: bash
+
+   $ make mrproper
+   $ make imxrt1050-evk_fspi_defconfig
+   $ make
+
+This will generate SPL, uboot.img, fspi_header.bin, and the final image (flash.bin).
+
+To boot from SPI flash on other boards, you may need to change the flash header config,
+which is specific to your flash chip, in Kconfig.
+The flash config is 4K in size and is documented on page 217 of the imxrt1050 RM.
+The default flash chip on the i.MXRT1050 EVK is the S26KS512SDPBHI02 HYPERFLASH.
+
+- Jumper settings::
+
+   SW7: 0 1 1 0
+
+where 0 means bottom position and 1 means top position (from the
+switch label numbers reference).
+
+- Connect the USB cable between the EVK and the PC for the console.
+
+- Use either JTAG or SWD to write `flash.bin` to the NOR. I used Mcuexpresso IDE's GUI flash tool.
diff --git a/doc/board/nxp/imxrt1170-evk.rst b/doc/board/nxp/imxrt1170-evk.rst
new file mode 100644
index 00000000000..86bd39ccb64
--- /dev/null
+++ b/doc/board/nxp/imxrt1170-evk.rst
@@ -0,0 +1,50 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+imxrt1170-evk
+=============
+
+How to use U-Boot on NXP i.MXRT1170 EVK
+---------------------------------------
+
+- Build U-Boot for i.MXRT1170 EVK:
+
+  .. code-block:: bash
+
+      $ make mrproper
+      $ make imxrt1170-evk_defconfig
+      $ make
+
+  This will generate the SPL image called SPL and the u-boot.img.
+
+- Flash the SPL image into the micro SD card:
+
+  .. code-block:: bash
+
+      $sudo dd if=SPL of=/dev/sdX bs=1k seek=1 conv=notrunc; sync
+
+  This location is not compatible with GPT partioning. Please, use MBR
+  partitioning instead.
+
+- Flash the u-boot.img image into the micro SD card:
+
+  .. code-block:: bash
+
+      $sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128 conv=notrunc; sync
+
+- Jumper settings
+
+  .. list-table::
+     :stub-columns: 1
+
+     * - SW1
+       - 1 0 1 0
+     * - SW2
+       - 0 0 0 0 | 0 0 0 0 | 1 0 0 0
+
+  where 0 means bottom position and 1 means top position (from the
+  switch label numbers reference).
+
+- Connect the USB cable between the EVK and the PC for the console.
+  The USB console connector is the one close the ethernet connector
+
+- Insert the micro SD card in the board, power it up and U-Boot messages should come up.
diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst
new file mode 100644
index 00000000000..94687730544
--- /dev/null
+++ b/doc/board/nxp/index.rst
@@ -0,0 +1,23 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+NXP Semiconductors
+==================
+
+.. toctree::
+   :maxdepth: 2
+
+   imx8mm_evk
+   imx8mn_evk
+   imx8mp_evk
+   imx8mq_evk
+   imx8qxp_mek
+   imx93_11x11_evk
+   imxrt1020-evk
+   imxrt1050-evk
+   imxrt1170-evk
+   ls1046ardb
+   mx6sabreauto
+   mx6sabresd
+   mx6ul_14x14_evk
+   mx6ullevk
+   psb
diff --git a/doc/board/nxp/ls1046ardb.rst b/doc/board/nxp/ls1046ardb.rst
new file mode 100644
index 00000000000..8c0bc82dde7
--- /dev/null
+++ b/doc/board/nxp/ls1046ardb.rst
@@ -0,0 +1,193 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+LS1046ARDB
+==========
+
+The LS1046A Reference Design Board (RDB) is a high-performance computing,
+evaluation, and development platform that supports the QorIQ LS1046A
+LayerScape Architecture processor. The LS1046ARDB provides SW development
+platform for the Freescale LS1046A processor series, with a complete
+debugging environment. The LS1046A RDB is lead-free and RoHS-compliant.
+
+LS1046A SoC Overview
+--------------------
+Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A
+SoC overview.
+
+LS1046ARDB board Overview
+-------------------------
+- SERDES1 Connections, 4 lanes supporting:
+
+  - Lane0: 10GBase-R with x1 RJ45 connector
+  - Lane1: 10GBase-R Cage
+  - Lane2: SGMII.5
+  - Lane3: SGMII.6
+
+- SERDES2 Connections, 4 lanes supporting:
+
+  - Lane0: PCIe1 with miniPCIe slot
+  - Lane1: PCIe2 with PCIe x2 slot
+  - Lane2: PCIe3 with PCIe x4 slot
+  - Lane3: SATA
+
+- DDR Controller
+
+  - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s
+
+- IFC/Local Bus
+
+  - One 512 MB NAND flash with ECC support
+  - CPLD connection
+
+- USB 3.0
+
+  - one Type A port, one Micro-AB port
+
+- SDHC: connects directly to a full SD/MMC slot
+- DSPI: 64 MB high-speed flash Memory for boot code and storage (up to 108MHz)
+- 4 I2C controllers
+- UART
+
+  - Two 4-pin serial ports at up to 115.2 Kbit/s
+  - Two DB9 D-Type connectors supporting one Serial port each
+
+- ARM JTAG support
+
+Memory map from core's view
+---------------------------
+
+================== ================== ================ =====
+Start Address      End Address        Description      Size
+================== ================== ================ =====
+``0x00_0000_0000`` ``0x00_000F_FFFF`` Secure Boot ROM  1M
+``0x00_0100_0000`` ``0x00_0FFF_FFFF`` CCSRBAR          240M
+``0x00_1000_0000`` ``0x00_1000_FFFF`` OCRAM0           64K
+``0x00_1001_0000`` ``0x00_1001_FFFF`` OCRAM1           64K
+``0x00_2000_0000`` ``0x00_20FF_FFFF`` DCSR             16M
+``0x00_7E80_0000`` ``0x00_7E80_FFFF`` IFC - NAND Flash 64K
+``0x00_7FB0_0000`` ``0x00_7FB0_0FFF`` IFC - CPLD       4K
+``0x00_8000_0000`` ``0x00_FFFF_FFFF`` DRAM1            2G
+``0x05_0000_0000`` ``0x05_07FF_FFFF`` QMAN S/W Portal  128M
+``0x05_0800_0000`` ``0x05_0FFF_FFFF`` BMAN S/W Portal  128M
+``0x08_8000_0000`` ``0x09_FFFF_FFFF`` DRAM2            6G
+``0x40_0000_0000`` ``0x47_FFFF_FFFF`` PCI Express1     32G
+``0x48_0000_0000`` ``0x4F_FFFF_FFFF`` PCI Express2     32G
+``0x50_0000_0000`` ``0x57_FFFF_FFFF`` PCI Express3     32G
+================== ================== ================ =====
+
+QSPI flash map
+--------------
+
+================== ================== ================== =====
+Start Address      End Address        Description        Size
+================== ================== ================== =====
+``0x00_4000_0000`` ``0x00_400F_FFFF`` RCW + PBI          1M
+``0x00_4010_0000`` ``0x00_402F_FFFF`` U-Boot             2M
+``0x00_4030_0000`` ``0x00_403F_FFFF`` U-Boot Env         1M
+``0x00_4040_0000`` ``0x00_405F_FFFF`` PPA                2M
+``0x00_4060_0000`` ``0x00_408F_FFFF`` Secure boot header 3M
+                                      + bootscript
+``0x00_4090_0000`` ``0x00_4093_FFFF`` FMan ucode         256K
+``0x00_4094_0000`` ``0x00_4097_FFFF`` QE/uQE firmware    256K
+``0x00_4098_0000`` ``0x00_40FF_FFFF`` Reserved           6M
+``0x00_4100_0000`` ``0x00_43FF_FFFF`` FIT Image          48M
+================== ================== ================== =====
+
+Booting Options
+---------------
+
+NB: The reference manual documents the RCW source with the *least-significant
+bit first*.
+
+QSPI boot
+^^^^^^^^^
+
+This is the default. ``{ SW5[0:8], SW4[0] }`` should be ``0010_0010_0``.
+
+SD boot and eMMC boot
+^^^^^^^^^^^^^^^^^^^^^
+
+``{ SW5[0:8], SW4[0] }`` should be ``0010_0000_0``. eMMC is selected only if
+there is no SD card in the slot.
+
+.. _ls1046ardb_jtag:
+
+JTAG boot
+^^^^^^^^^
+
+To recover a bricked board, or to perform initial programming, the ls1046
+supports using two hard-coded Reset Configuration Words (RCWs). Unfortunately,
+this configuration disables most functionality, including the uarts and ethernet.
+However, the SD/MMC and flash controllers are still functional. To get around
+the lack of a serial console, we will use ARM semihosting instead. When
+enabled, OpenOCD will interpret certain instructions as calls to the host
+operating system. This allows U-Boot to use the console, read/write files, or
+run arbitrary commands (!).
+
+When configuring U-Boot, ensure that ``CONFIG_SEMIHOSTING``,
+``CONFIG_SPL_SEMIHOSTING``, and ``CONFIG_SEMIHOSTING_SERIAL`` are enabled.
+``{ SW5[0:8], SW4[0] }`` should be ``0100_1111_0``. Additionally, ``SW4[7]``
+should be set to ``0``. Connect to the "console" USB connector on the front of
+the enclosure.
+
+Create a new file called ``u-boot.tcl`` (or whatever you choose) with the
+following contents::
+
+    # Load the configuration for the LS1046ARDB
+    source [find board/nxp_rdb-ls1046a.cfg]
+    # Initialize the scan chain
+    init
+    # Stop the processor
+    halt
+    # Enable semihosting
+    arm semihosting enable
+    # Load U-Boot SPL
+    load_image spl/u-boot-spl 0 elf
+    # Start executing SPL at the beginning of OCRAM
+    resume 0x10000000
+
+Then, launch openocd like::
+
+    openocd -f u-boot.tcl
+
+You should see the U-Boot SPL banner followed by the banner for U-Boot proper
+in the output of openocd. The CMSIS-DAP adapter is slow, so this can take a
+long time. If you don't see it, something has gone wrong. After a while, you
+should see the prompt. You can load an image using semihosting by running::
+
+    => load hostfs - $loadaddr <name of file>
+
+Note that openocd's terminal is "cooked," so commands will only be sent to
+U-Boot when you press enter, and all commands will be echoed twice.
+Additionally, openocd will block when waiting for input, ignoring gdb, JTAG
+events, and Ctrl-Cs. To make openocd process these events, just hit enter.
+
+Using an external JTAG adapter
+""""""""""""""""""""""""""""""
+
+The CMSIS-DAP adapter can be rather slow. To speed up booting, use an external
+JTAG adapter. The following examples assume you are using a J-Link, though any
+adapter supported by OpenOCD will do. Ensure that ``SW4[7]`` is ``1``. Attach
+your jtag adapter to J22. Modify ``u-boot.tcl`` and replace the first two lines
+with the following::
+
+    # Load the J-Link configuration (or whatever your adapter is)
+    source [find interface/jlink.cfg]
+    # Use JTAG, since the J-Link also supports SWD
+    transport select jtag
+    # The reset pin resets the whole CPU
+    reset_config srst_only
+    # Load the LS1046A config
+    source [find target/ls1046a.cfg]
+
+You can proceed as normal through the rest of the steps above. I got a speedup
+of around 100x by using a J-Link.
+
+Debug UART
+----------
+
+To enable the debug UART, enable the following config options::
+
+    CONFIG_DEBUG_UART_NS16550=y
+    CONFIG_DEBUG_UART_BASE=0x21c0500
+    CONFIG_DEBUG_UART_CLOCK=300000000
diff --git a/doc/board/nxp/mx6sabreauto.rst b/doc/board/nxp/mx6sabreauto.rst
new file mode 100644
index 00000000000..fe4cd9d2141
--- /dev/null
+++ b/doc/board/nxp/mx6sabreauto.rst
@@ -0,0 +1,100 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+mx6sabreauto
+============
+
+How to use and build U-Boot on mx6sabreauto
+-------------------------------------------
+
+mx6sabreauto_defconfig target supports mx6q/mx6dl/mx6qp sabreauto variants.
+
+In order to build it:
+
+.. code-block:: bash
+
+   $ make mx6sabreauto_defconfig
+   $ make
+
+This will generate the SPL and u-boot-dtb.img binaries.
+
+- Flash the SPL binary into the SD card:
+
+.. code-block:: bash
+
+   $ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 conv=notrunc && sync
+
+- Flash the u-boot-dtb.img binary into the SD card:
+
+.. code-block:: bash
+
+   $ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 conv=notrunc && sync
+
+Booting via Falcon mode
+-----------------------
+
+Write in mx6sabreauto_defconfig the following define below:
+
+CONFIG_SPL_OS_BOOT=y
+
+In order to build it:
+
+.. code-block:: bash
+
+   $ make mx6sabreauto_defconfig
+   $ make
+
+This will generate the SPL image called SPL and the u-boot-dtb.img.
+
+- Flash the SPL image into the SD card:
+
+.. code-block:: bash
+
+   $ sudo dd if=SPL of=/dev/sdb bs=1K seek=1 conv=notrunc && sync
+
+- Flash the u-boot-dtb.img image into the SD card:
+
+.. code-block:: bash
+
+   $ sudo dd if=u-boot-dtb.img of=/dev/sdb bs=1K seek=69 conv=notrunc && sync
+
+Create a FAT16 boot partition to store uImage and the dtb file, then copy the files there:
+
+.. code-block:: bash
+
+   $ sudo cp uImage /media/boot
+   $ sudo cp imx6dl-sabreauto.dtb /media/boot
+
+Create a partition for root file system and extract it there:
+
+.. code-block:: bash
+
+   $ sudo tar xvf rootfs.tar.gz -C /media/root
+
+The SD card must have enough space for raw "args" and "kernel".
+To configure Falcon mode for the first time, on U-Boot do the following commands:
+
+- Load dtb file from boot partition::
+
+   # load mmc 0:1 ${fdt_addr} imx6dl-sabreauto.dtb
+
+- Load kernel image from boot partition::
+
+   # load mmc 0:1 ${loadaddr} uImage
+
+- Write kernel at 2MB offset::
+
+   # mmc write ${loadaddr} 0x1000 0x4000
+
+- Setup kernel bootargs::
+
+   # setenv bootargs "console=ttymxc3,115200 root=/dev/mmcblk0p1 rootfstype=ext4 rootwait quiet rw"
+
+- Prepare args::
+
+   # spl export fdt ${loadaddr} - ${fdt_addr}
+
+- Write args 1MB data (0x800 sectors) to 1MB offset (0x800 sectors)::
+
+   # mmc write 18000000 0x800 0x800
+
+- Restart the board and then SPL binary will launch the kernel directly.
diff --git a/doc/board/nxp/mx6sabresd.rst b/doc/board/nxp/mx6sabresd.rst
new file mode 100644
index 00000000000..c9869f4a73a
--- /dev/null
+++ b/doc/board/nxp/mx6sabresd.rst
@@ -0,0 +1,132 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+mx6sabresd
+==========
+
+How to use and build U-Boot on mx6sabresd
+-----------------------------------------
+
+The following methods can be used for booting mx6sabresd boards:
+
+1. Booting from SD card
+
+2. Booting from eMMC
+
+3. Booting via Falcon mode (SPL launches the kernel directly)
+
+
+1. Booting from SD card via SPL
+-------------------------------
+
+mx6sabresd_defconfig target supports mx6q/mx6dl/mx6qp sabresd variants.
+
+In order to build it:
+
+.. code-block:: bash
+
+   $ make mx6sabresd_defconfig
+   $ make
+
+This will generate the SPL and u-boot-dtb.img binaries.
+
+- Flash the SPL binary into the SD card:
+
+.. code-block:: bash
+
+   $ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 conv=notrunc && sync
+
+- Flash the u-boot-dtb.img binary into the SD card:
+
+.. code-block:: bash
+
+   $ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 conv=notrunc && sync
+
+2. Booting from eMMC
+--------------------
+
+.. code-block:: bash
+
+   $ make mx6sabresd_defconfig
+   $ make
+
+This will generate the SPL and u-boot-dtb.img binaries.
+
+- Boot first from SD card as shown in the previous section
+
+In U-Boot change the eMMC partition config::
+
+   => mmc partconf 2 1 0 0
+
+Mount the eMMC in the host PC::
+
+   => ums 0 mmc 2
+
+- Flash SPL and u-boot-dtb.img binaries into the eMMC:
+
+.. code-block:: bash
+
+   $ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 conv=notrunc && sync
+   $ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 conv=notrunc && sync
+
+Set SW6 to eMMC 8-bit boot: 11010110
+
+3. Booting via Falcon mode
+--------------------------
+
+.. code-block:: bash
+
+  $ make mx6sabresd_defconfig
+  $ make
+
+This will generate the SPL image called SPL and the u-boot-dtb.img.
+
+- Flash the SPL image into the SD card
+
+.. code-block:: bash
+
+   $ sudo dd if=SPL of=/dev/sdX bs=1K seek=1 oflag=sync status=none conv=notrunc && sync
+
+- Flash the u-boot-dtb.img image into the SD card
+
+.. code-block:: bash
+
+   $ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1K seek=69 oflag=sync status=none conv=notrunc && sync
+
+Create a partition for root file system and extract it there
+
+.. code-block:: bash
+
+   $ sudo tar xvf rootfs.tar.gz -C /media/root
+
+The SD card must have enough space for raw "args" and "kernel".
+To configure Falcon mode for the first time, on U-Boot do the following commands:
+
+- Setup the IP server::
+
+   # setenv serverip <server_ip_address>
+
+- Download dtb file::
+
+   # dhcp ${fdt_addr} imx6q-sabresd.dtb
+
+- Download kernel image::
+
+   # dhcp ${loadaddr} uImage
+
+- Write kernel at 2MB offset::
+
+   # mmc write ${loadaddr} 0x1000 0x4000
+
+- Setup kernel bootargs::
+
+   # setenv bootargs "console=ttymxc0,115200 root=/dev/mmcblk1p1 rootfstype=ext4 rootwait quiet rw"
+
+- Prepare args::
+
+   # spl export fdt ${loadaddr} - ${fdt_addr}
+
+- Write args 1MB data (0x800 sectors) to 1MB offset (0x800 sectors)::
+
+   # mmc write 18000000 0x800 0x800
+
+- Press KEY_VOL_UP key, power up the board and then SPL binary will launch the kernel directly.
diff --git a/doc/board/nxp/mx6ul_14x14_evk.rst b/doc/board/nxp/mx6ul_14x14_evk.rst
new file mode 100644
index 00000000000..c135a21bf5b
--- /dev/null
+++ b/doc/board/nxp/mx6ul_14x14_evk.rst
@@ -0,0 +1,98 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+mx6ul_14x14_evk
+===============
+
+How to use U-Boot on Freescale MX6UL 14x14 EVK
+----------------------------------------------
+
+- Build U-Boot for MX6UL 14x14 EVK:
+
+.. code-block:: bash
+
+   $ make mrproper
+   $ make mx6ul_14x14_evk_defconfig
+   $ make
+
+This will generate the SPL image called SPL and the u-boot.img.
+
+1. Booting via SDCard
+---------------------
+
+- Flash the SPL image into the micro SD card:
+
+.. code-block:: bash
+
+   sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1 conv=notrunc; sync
+
+- Flash the u-boot.img image into the micro SD card:
+
+.. code-block:: bash
+
+   sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69 conv=notrunc; sync
+
+- Jumper settings::
+
+   SW601: 0 0 1 0
+   Sw602: 1 0
+
+where 0 means bottom position and 1 means top position (from the
+switch label numbers reference).
+
+- Connect the USB cable between the EVK and the PC for the console.
+  The USB console connector is the one close the push buttons
+
+- Insert the micro SD card in the board, power it up and U-Boot messages should come up.
+
+2. Booting via Serial Download Protocol (SDP)
+---------------------------------------------
+
+The mx6ulevk board can boot from USB OTG port using the SDP, target will
+enter in SDP mode in case an SD Card is not connect or boot switches are
+set as below::
+
+   Sw602: 0 1
+   SW601: x x x x
+
+The following tools can be used to boot via SDP, for both tools you must
+connect an USB cable in USB OTG port.
+
+- Method 1: Universal Update Utility (uuu)
+
+The UUU binary can be downloaded in release tab from link below:
+https://github.com/NXPmicro/mfgtools
+
+The following script should be created to boot SPL + u-boot-dtb.img binaries:
+
+.. code-block:: bash
+
+   $ cat uuu_script
+     uuu_version 1.1.4
+
+     SDP: boot -f SPL
+     SDPU: write -f u-boot-dtb.img -addr 0x877fffc0
+     SDPU: jump -addr 0x877fffc0
+     SDPU: done
+
+Please note that the address above is calculated based on TEXT_BASE address:
+
+0x877fffc0 = 0x87800000 (TEXT_BASE) - 0x40 (U-Boot proper Header size)
+
+Power on the target and run the following command from U-Boot root directory:
+
+.. code-block:: bash
+
+   $ sudo ./uuu uuu_script
+
+- Method 2: imx usb loader tool (imx_usb):
+
+The imx_usb_loader tool can be downloaded in link below:
+https://github.com/boundarydevices/imx_usb_loader
+
+Build the source code and run the following commands from U-Boot root
+directory:
+
+.. code-block:: bash
+
+   $ sudo ./imx_usb SPL
+   $ sudo ./imx_usb u-boot-dtb.img
diff --git a/doc/board/nxp/mx6ullevk.rst b/doc/board/nxp/mx6ullevk.rst
new file mode 100644
index 00000000000..a26248a1e3b
--- /dev/null
+++ b/doc/board/nxp/mx6ullevk.rst
@@ -0,0 +1,47 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+mx6ullevk
+=========
+
+How to use U-Boot on Freescale MX6ULL 14x14 EVK
+-----------------------------------------------
+
+- First make sure you have installed the dtc package (device tree compiler):
+
+.. code-block:: bash
+
+   $ sudo apt-get install device-tree-compiler
+
+- Build U-Boot for MX6ULL 14x14 EVK:
+
+.. code-block:: bash
+
+   $ make mrproper
+   $ make mx6ull_14x14_evk_defconfig
+   $ make
+
+This generates the u-boot-dtb.imx image in the current directory.
+
+- Flash the u-boot-dtb.imx image into the micro SD card:
+
+.. code-block:: bash
+
+   $ sudo dd if=u-boot-dtb.imx of=/dev/sdb bs=1K seek=1 conv=notrunc && sync
+
+- Jumper settings::
+
+   SW601: 0 0 1 0
+   Sw602: 1 0
+
+Where 0 means bottom position and 1 means top position (from the switch label
+numbers reference).
+
+Connect the USB cable between the EVK and the PC for the console.
+(The USB console connector is the one close the push buttons)
+
+Insert the micro SD card in the board, power it up and U-Boot messages should
+come up.
+
+The link for the board: http://www.nxp.com/products/microcontrollers-and- \
+processors/arm-processors/i.mx-applications-processors/i.mx-6-processors/ \
+i.mx6qp/evaluation-kit-for-the-i.mx-6ull-applications-processor:MCIMX6ULL-EVK
diff --git a/doc/board/nxp/psb.rst b/doc/board/nxp/psb.rst
new file mode 100644
index 00000000000..2eccdcfccd9
--- /dev/null
+++ b/doc/board/nxp/psb.rst
@@ -0,0 +1,176 @@
+i.MX7D/i.MX8MM SRC_GPR10 PERSIST_SECONDARY_BOOT for bootloader A/B switching
+============================================================================
+
+Introduction
+------------
+Since at least iMX53 until iMX8MM, it is possible to have two copies of
+bootloader in SD/eMMC and switch between them. The switch is triggered
+either by the BootROM in case the bootloader image is faulty OR can be
+enforced by the user.
+
+Operation
+---------
+ #. Upon Power-On Reset (POR)
+
+    - SRC_GPR10 bit PERSIST_SECONDARY_BOOT is set to 0
+    - BootROM attempts to start bootloader A-copy
+
+      - if A-copy valid
+
+         - BootROM starts A-copy
+         - END
+
+      - if A-copy NOT valid
+
+         - BootROM sets SRC_GPR10 bit PERSIST_SECONDARY_BOOT to 1
+         - BootROM triggers WARM reset, GOTO 1)
+         - END
+
+ #. Upon COLD Reset
+
+    - GOTO 1)
+    - END
+
+ #. Upon WARM Reset
+
+    - SRC_GPR10 bit PERSIST_SECONDARY_BOOT is retained
+
+      - if SRC_GPR10 bit PERSIST_SECONDARY_BOOT is 0
+
+        - BootROM attempts to start bootloader A-copy
+
+          - if A-copy valid
+
+            - BootROM starts A-copy
+            - END
+
+          - if A-copy NOT valid
+
+            - BootROM sets SRC_GPR10 bit PERSIST_SECONDARY_BOOT to 1
+            - BootROM triggers WARM reset. GOTO 1.3)
+            - END
+
+      - if SRC_GPR10 bit PERSIST_SECONDARY_BOOT is 1
+
+        - BootROM attempts to start bootloader B-copy
+
+          - if B-copy valid
+
+            - BootROM starts B-copy
+            - END
+
+          - if B-copy NOT valid
+            - System hangs
+            - END
+
+Setup
+-----
+The bootloader A-copy must be placed at predetermined offset in SD/eMMC. The
+bootloader B-copy area offset is determined by an offset stored in Secondary
+Image Table (SIT). The SIT must be placed at predetermined offset in SD/eMMC.
+
+The following table contains offset of SIT, bootloader A-copy and recommended
+bootloader B-copy offset. The offsets are in 512 Byte sector units (that is
+offset 0x1 means 512 Bytes from the start of SD/eMMC card data partition).
+For details on the addition of two numbers in recommended B-copy offset, see
+SIT format below.
+
++----------+-----------------------------+--------------------+-----------------------+-----------------------------+
+|   SoC    | Boot Device Type            | SIT offset (fixed) | A-copy offset (fixed) | B-copy offset (recommended) |
++----------+-----------------------------+--------------------+-----------------------+-----------------------------+
+| iMX7D    |                             |         0x1        |          0x2          |          0x800+0x2          |
++----------+-----------------------------+--------------------+-----------------------+-----------------------------+
+| iMX8MM   | SD/eSD/MMC/eMMC normal boot |        0x41        |         0x42          |         0x1000+0x42         |
++----------+-----------------------------+--------------------+-----------------------+-----------------------------+
+| iMX8MM   | eMMC Fast boot fuse blown   |         0x1        |          0x2          |          0x1000+0x2         |
++----------+-----------------------------+--------------------+-----------------------+-----------------------------+
+
+SIT format
+~~~~~~~~~~
+SIT is a 20 byte long structure containing of 5 32-bit words. Those encode
+bootloader B-copy area offset (called "firstSectorNumber"), magic value
+(called "tag") that is always 0x00112233, and three unused words set to 0.
+SIT is documented in [1]_ and [2]_. Example SIT are below::
+
+  $ hexdump -vC sit-mx7d.bin
+    00000000  00 00 00 00
+    00000004  00 00 00 00
+    00000008  33 22 11 00 <--- This is the "tag"
+    0000000c  00 08 00 00 <--- This is the "firstSectorNumber"
+    00000010  00 00 00 00
+
+  $ hexdump -vC sit-mx8mm.bin
+    00000000  00 00 00 00
+    00000004  00 00 00 00
+    00000008  33 22 11 00 <--- This is the "tag"
+    0000000c  00 10 00 00 <--- This is the "firstSectorNumber"
+    00000010  00 00 00 00
+
+B-copy area offset ("firstSectorNumber") is offset, in units of 512 Byte
+sectors, that is added to the start of boot media when switching between
+A-copy and B-copy. For A-copy, this offset is 0x0. For B-copy, this offset
+is determined by SIT (e.g. if firstSectorNumber is 0x1000 as it is above
+in sit-mx8mm.bin, then the B-copy offset is 0x1000 sectors = 2 MiB).
+
+Bootloader A-copy (e.g. u-boot.imx or flash.bin) is placed at fixed offset
+from A-copy area offset (e.g. 0x2 sectors from sector 0x0 for iMX7D, which
+means u-boot.imx A-copy must be written to sector 0x2).
+
+The same applies to bootloader B-copy, which is placed at fixed offset from
+B-copy area offset determined by SIT (e.g. 0x2 sectors from sector 0x800 [see
+sit-mx7d.bin example above, this can be changed in SIT firstSectorNumber] for
+iMX7D, which means u-boot.imx B-copy must be written to sector 0x802)
+
+**WARNING:**
+B-copy area offset ("firstSectorNumber") is NOT equal to bootloader
+(image, which is u-boot.imx or flash.bin) B-copy offset.
+
+To generate SIT, use for example the following bourne shell printf command::
+
+$ printf '\x0\x0\x0\x0\x0\x0\x0\x0\x33\x22\x11\x00\x00\x08\x00\x00\x0\x0\x0\x0' > sit-mx7d.bin
+$ printf '\x0\x0\x0\x0\x0\x0\x0\x0\x33\x22\x11\x00\x00\x10\x00\x00\x0\x0\x0\x0' > sit-mx8mm.bin
+
+Write bootloader A/B copy and SIT to SD/eMMC
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Examples of writing SIT and two copies of bootloader to SD or eMMC:
+
+- iMX8MM, SD card at /dev/sdX, Linux command line
+  ::
+
+    $ dd if=sit-mx8mm.bin of=/dev/sdX bs=512 seek=65
+    $ dd if=flash.bin     of=/dev/sdX bs=512 seek=66
+    $ dd if=flash.bin     of=/dev/sdX bs=512 seek=4162
+
+- iMX8MM, eMMC 1 data partition, U-Boot command line
+  ::
+
+    => mmc partconf 1 0 0 0
+
+    => dhcp ${loadaddr} sit-mx8mm.bin
+    => mmc dev 1
+    => mmc write ${loadaddr} 0x41 0x1
+
+    => dhcp ${loadaddr} flash.bin
+    => setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    => mmc dev 1
+    => mmc write ${loadaddr} 0x42   ${blkcnt}
+    => mmc write ${loadaddr} 0x1042 ${blkcnt}
+
+WARM reset into B-copy using WDT
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+To perform a reboot into B-copy, the PERSIST_SECONDARY_BOOT must be set
+in SRC_GPR10 register. Example on iMX8MM::
+
+  => mw 0x30390098 0x40000000
+
+A WARM reset can be triggered using WDT as follows::
+
+  => mw.w 0x30280000 0x25
+
+References
+----------
+
+.. [1] i.MX 7Dual Applications Processor Reference Manual, Rev. 1, 01/2018 ; section 6.6.5.3.5 Redundant boot support for expansion device
+.. [2] i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 ; section 6.1.5.4.5 Redundant boot support for expansion device
diff --git a/doc/board/openpiton/index.rst b/doc/board/openpiton/index.rst
new file mode 100644
index 00000000000..c469102c4b0
--- /dev/null
+++ b/doc/board/openpiton/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+OpenPiton
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   riscv64
diff --git a/doc/board/openpiton/riscv64.rst b/doc/board/openpiton/riscv64.rst
new file mode 100644
index 00000000000..c379fbf9ffe
--- /dev/null
+++ b/doc/board/openpiton/riscv64.rst
@@ -0,0 +1,375 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Openpiton RISC-V SoC
+====================
+
+OpenPiton is an open source, manycore processor and research platform. It is a
+tiled manycore framework scalable from one to 1/2 billion cores. It supports a
+number of ISAs including RISC-V with its P-Mesh cache coherence protocol and
+networks on chip. It is highly configurable in both core and uncore components.
+OpenPiton has been verified in both ASIC and multiple Xilinx FPGA prototypes
+running full-stack Debian linux.
+
+RISC-V Standard Bootflow
+------------------------
+
+Currently, OpenPiton implements RISC-V standard bootflow in the following steps
+mover.S -> u-boot-spl -> opensbi -> u-boot -> Linux
+This board supports S-mode u-boot as well as M-mode SPL
+
+Building OpenPition
+-------------------
+
+If you'd like to build OpenPiton, please go to OpenPiton github repo
+(at https://github.com/PrincetonUniversity/openpiton) to build from the latest
+changes
+
+Building Images
+---------------
+
+SPL
+~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+	export CROSS_COMPILE=<riscv64 toolchain prefix>
+	export ARCH=riscv
+
+3. make openpiton_riscv64_spl_defconfig
+4. make
+
+U-Boot
+~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+	export CROSS_COMPILE=<riscv64 toolchain prefix>
+	export ARCH=riscv
+
+3. make openpiton_riscv64_defconfig
+4. make
+
+opensbi
+~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+	export CROSS_COMPILE=<riscv64 toolchain prefix>
+	export ARCH=riscv
+
+3. Go to OpenSBI directory
+4. make PLATFORM=fpga/openpiton FW_PAYLOAD_PATH=<path to u-boot-nodtb.bin>
+
+Using fw_payload.bin with Linux
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Put the generated fw_payload.bin into the /boot directory on the root filesystem,
+plug in the SD card, then flash the bitstream. Linux will boot automatically.
+
+Booting
+-------
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
+
+Sample Dual-core Debian boot log from OpenPiton
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: none
+
+	Trying to boot from MMC1
+
+	OpenSBI v0.9-5-gd06cb61
+	____                    _____ ____ _____
+	/ __ \                  / ____|  _ \_   _|
+	| |  | |_ __   ___ _ __ | (___ | |_) || |
+	| |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
+	| |__| | |_) |  __/ | | |____) | |_) || |_
+	\____/| .__/ \___|_| |_|_____/|____/_____|
+	| |
+	|_|
+
+	Platform Name             : OPENPITON RISC-V
+	Platform Features         : timer,mfdeleg
+	Platform HART Count       : 3
+	Firmware Base             : 0x80000000
+	Firmware Size             : 104 KB
+	Runtime SBI Version       : 0.2
+
+	Domain0 Name              : root
+	Domain0 Boot HART         : 0
+	Domain0 HARTs             : 0*,1*,2*
+	Domain0 Region00          : 0x0000000080000000-0x000000008001ffff ()
+	Domain0 Region01          : 0x0000000000000000-0xffffffffffffffff (R,W,X)
+	Domain0 Next Address      : 0x0000000080200000
+	Domain0 Next Arg1         : 0x0000000082200000
+	Domain0 Next Mode         : S-mode
+	Domain0 SysReset          : yes
+
+	Boot HART ID              : 0
+	Boot HART Domain          : root
+	Boot HART ISA             : rv64imafdcsu
+	Boot HART Features        : scounteren,mcounteren
+	Boot HART PMP Count       : 0
+	Boot HART PMP Granularity : 0
+	Boot HART PMP Address Bits: 0
+	Boot HART MHPM Count      : 0
+	Boot HART MHPM Count      : 0
+	Boot HART MIDELEG         : 0x0000000000000222
+	Boot HART MEDELEG         : 0x000000000000b109
+
+
+	U-Boot 2021.01+ (Jun 12 2021 - 10:31:34 +0800)
+
+	DRAM:  1 GiB
+	MMC:   sdhci@f000000000: 0 (eMMC)
+	In:    uart@fff0c2c000
+	Out:   uart@fff0c2c000
+	Err:   uart@fff0c2c000
+	Hit any key to stop autoboot:  0
+	6492992 bytes read in 5310 ms (1.2 MiB/s)
+	## Flattened Device Tree blob at 86000000
+	Booting using the fdt blob at 0x86000000
+	Loading Device Tree to 00000000bfffa000, end 00000000bffff007 ... OK
+
+	Starting kernel ...
+
+	[    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
+	[    0.000000] Linux version 5.6.0-rc4-gb9d34f7e294d-dirty
+	[    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
+	[    0.000000] printk: bootconsole [sbi0] enabled
+	[    0.000000] Zone ranges:
+	[    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000bfffffff]
+	[    0.000000]   Normal   empty
+	[    0.000000] Movable zone start for each node
+	[    0.000000] Early memory node ranges
+	[    0.000000]   node   0: [mem 0x0000000080200000-0x00000000bfffffff]
+	[    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x00000000bfffffff]
+	[    0.000000] On node 0 totalpages: 261632
+	[    0.000000]   DMA32 zone: 4088 pages used for memmap
+	[    0.000000]   DMA32 zone: 0 pages reserved
+	[    0.000000]   DMA32 zone: 261632 pages, LIFO batch:63
+	[    0.000000] software IO TLB: mapped [mem 0xbaffa000-0xbeffa000] (64MB)
+	[    0.000000] SBI specification v0.2 detected
+	[    0.000000] SBI implementation ID=0x1 Version=0x9
+	[    0.000000] SBI v0.2 TIME extension detected
+	[    0.000000] SBI v0.2 IPI extension detected
+	[    0.000000] SBI v0.2 RFENCE extension detected
+	[    0.000000] SBI v0.2 HSM extension detected
+	[    0.000000] elf_hwcap is 0x112d
+	[    0.000000] percpu: Embedded 16 pages/cpu s25368 r8192 d31976 u65536
+	[    0.000000] pcpu-alloc: s25368 r8192 d31976 u65536 alloc=16*4096
+	[    0.000000] pcpu-alloc: [0] 0
+	[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 257544
+	[    0.000000] Kernel command line: earlycon=sbi root=/dev/piton_sd1
+	[    0.000000] Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
+	[    0.000000] Inode-cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
+	[    0.000000] Sorting __ex_table...
+	[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+	[    0.000000] Memory: 956252K/1046528K available (4357K kernel code, 286K rwdata, 1200K rodata, 168K init, 311K bss, 90276K re)
+	[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
+	[    0.000000] rcu: Hierarchical RCU implementation.
+	[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=1.
+	[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
+	[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
+	[    0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0
+	[    0.000000] plic: mapped 2 interrupts with 1 handlers for 2 contexts.
+	[    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [0]
+	[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1ec037a6a, max_idle_ns: 7052723236599 ns
+	[    0.000138] sched_clock: 64 bits at 520kHz, resolution 1919ns, wraps every 4398046510738ns
+	[    0.009429] printk: console [hvc0] enabled
+	[    0.009429] printk: console [hvc0] enabled
+	[    0.017850] printk: bootconsole [sbi0] disabled
+	[    0.017850] printk: bootconsole [sbi0] disabled
+	[    0.028029] Calibrating delay loop (skipped), value calculated using timer frequency.. 1.04 BogoMIPS (lpj=5208)
+	[    0.038753] pid_max: default: 32768 minimum: 301
+	[    0.050248] Mount-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+	[    0.058661] Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes, linear)
+	[    0.069359] *** VALIDATE tmpfs ***
+	[    0.089093] *** VALIDATE proc ***
+	[    0.101135] *** VALIDATE cgroup ***
+	[    0.105019] *** VALIDATE cgroup2 ***
+	[    0.144310] rcu: Hierarchical SRCU implementation.
+	[    0.162836] smp: Bringing up secondary CPUs ...
+	[    0.167736] smp: Brought up 1 node, 1 CPU
+	[    0.185982] devtmpfs: initialized
+	[    0.216237] random: get_random_u32 called from bucket_table_alloc.isra.25+0x4e/0x15c with crng_init=0
+	[    0.236026] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
+	[    0.246916] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
+	[    0.266994] NET: Registered protocol family 16
+	[    0.763362] clocksource: Switched to clocksource riscv_clocksource
+	[    0.770122] *** VALIDATE bpf ***
+	[    0.782837] *** VALIDATE ramfs ***
+	[    0.829997] NET: Registered protocol family 2
+	[    0.853577] tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes, linear)
+	[    0.864085] TCP established hash table entries: 8192 (order: 4, 65536 bytes, linear)
+	[    0.875373] TCP bind hash table entries: 8192 (order: 5, 131072 bytes, linear)
+	[    0.887958] TCP: Hash tables configured (established 8192 bind 8192)
+	[    0.902149] UDP hash table entries: 512 (order: 2, 16384 bytes, linear)
+	[    0.909904] UDP-Lite hash table entries: 512 (order: 2, 16384 bytes, linear)
+	[    0.924809] NET: Registered protocol family 1
+	[    0.948605] RPC: Registered named UNIX socket transport module.
+	[    0.956003] RPC: Registered udp transport module.
+	[    0.961565] RPC: Registered tcp transport module.
+	[    0.966432] RPC: Registered tcp NFSv4.1 backchannel transport module.
+	[    0.987180] Initialise system trusted keyrings
+	[    0.998953] workingset: timestamp_bits=46 max_order=18 bucket_order=0
+	[    1.323977] *** VALIDATE nfs ***
+	[    1.328520] *** VALIDATE nfs4 ***
+	[    1.334422] NFS: Registering the id_resolver key type
+	[    1.340148] Key type id_resolver registered
+	[    1.345280] Key type id_legacy registered
+	[    1.349820] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
+	[    1.357610] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
+	[    1.866909] Key type asymmetric registered
+	[    1.872460] Asymmetric key parser 'x509' registered
+	[    1.878750] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
+	[    1.887480] io scheduler mq-deadline registered
+	[    1.892864] io scheduler kyber registered
+	[    3.905595] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+	[    3.954332] fff0c2c000.uart: ttyS0 at MMIO 0xfff0c2c000 (irq = 1, base_baud = 4166687) is a 16550
+	[    4.254794] loop: module loaded
+	[    4.258269] piton_sd:v1.0 Apr 26, 2019
+	[    4.258269]
+	[    4.265170] gpt partition table header:
+	[    4.265283] signature: 5452415020494645
+	[    4.269258] revision: 10000
+	[    4.273746] size: 5c
+	[    4.276659] crc_header: 26b42404
+	[    4.278911] reserved: 0
+	[    4.282730] current lba: 1
+	[    4.285311] backup lda: 3b723ff
+	[    4.288093] partition entries lba: 2
+	[    4.291835] number partition entries: 80
+	[    4.295529] size partition entries: 80
+	[    9.473253]  piton_sd: piton_sd1
+	[   10.099676] libphy: Fixed MDIO Bus: probed
+	[   10.148782] NET: Registered protocol family 10
+	[   10.183418] Segment Routing with IPv6
+	[   10.189384] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
+	[   10.214449] NET: Registered protocol family 17
+	[   10.227413] Key type dns_resolver registered
+	[   10.240561] Loading compiled-in X.509 certificates
+	[   10.465264] EXT4-fs (piton_sd1): mounted filesystem with ordered data mode. Opts: (null)
+	[   10.475922] VFS: Mounted root (ext4 filesystem) readonly on device 254:1.
+	[   10.551865] devtmpfs: mounted
+	[   10.562744] Freeing unused kernel memory: 168K
+	[   10.567450] This architecture does not have kernel memory protection.
+	[   10.574688] Run /sbin/init as init process
+	[   10.578916]   with arguments:
+	[   10.582489]     /sbin/init
+	[   10.585312]   with environment:
+	[   10.588518]     HOME=/
+	[   10.591459]     TERM=linux
+	[   18.154373] systemd[1]: System time before build time, advancing clock.
+	[   18.565415] systemd[1]: systemd 238 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIB)
+	[   18.596359] systemd[1]: Detected architecture riscv64.
+
+	Welcome to Debian GNU/Linux buster/sid!
+
+	[   18.797150] systemd[1]: Set hostname to <openpiton>.
+	[   31.609244] random: systemd: uninitialized urandom read (16 bytes read)
+	[   31.630366] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe.
+	[  OK  ] Listening on /dev/initctl Compatibility Named Pipe.
+	[   31.674820] random: systemd: uninitialized urandom read (16 bytes read)
+	[   31.806800] systemd[1]: Created slice system-serial\x2dgetty.slice.
+	[  OK  ] Created slice system-serial\x2dgetty.slice.
+	[   31.839855] random: systemd: uninitialized urandom read (16 bytes read)
+	[   31.850670] systemd[1]: Reached target Slices.
+	[  OK  ] Reached target Slices.
+	[   32.128005] systemd[1]: Reached target Swap.
+	[  OK  ] Reached target Swap.
+	[   32.180337] systemd[1]: Listening on Journal Socket.
+	[  OK  ] Listening on Journal Socket.
+	[   32.416448] systemd[1]: Mounting Kernel Debug File System...
+	Mounting Kernel Debug File System...
+	[   32.937934] systemd[1]: Starting Remount Root and Kernel File Systems...
+	Starting Remount Root and Kernel File Systems...
+	[   33.117472] urandom_read: 4 callbacks suppressed
+	[   33.117645] random: systemd: uninitialized urandom read (16 bytes read)
+	[   33.214868] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
+	[  OK  ] Started Forward Password Requests to Wall Directory Watch.
+	[   33.366745] random: systemd: uninitialized urandom read (16 bytes read)
+	[   33.453262] systemd[1]: Listening on Journal Socket (/dev/log).
+	[  OK  ] Listening on Journal Socket (/dev/log).
+	[   33.627020] random: systemd: uninitialized urandom read (16 bytes read)
+	[   34.029973] systemd[1]: Starting Load Kernel Modules...
+	Starting Load Kernel Modules...
+	[  OK  ] Created slice system-getty.slice.
+	[  OK  ] Started Dispatch Password Requests to Console Directory Watch.
+	[  OK  ] Reached target Local Encrypted Volumes.
+	[  OK  ] Reached target Paths.
+	[  OK  ] Reached target Remote File Systems.
+	[  OK  ] Listening on udev Kernel Socket.
+	[  OK  ] Listening on udev Control Socket.
+	[  OK  ] Reached target Sockets.
+	Starting udev Coldplug all Devices...
+	Starting Journal Service...
+	[   37.108761] systemd[1]: Starting Create Static Device Nodes in /dev...
+	Starting Create Static Device Nodes in /dev...
+	[   37.941929] systemd[1]: Mounted Kernel Debug File System.
+	[  OK  ] Mounted Kernel Debug File System.
+	[   38.463855] systemd[1]: Started Remount Root and Kernel File Systems.
+	[  OK  ] Started Remount Root and Kernel File Systems.
+	[   39.614728] systemd[1]: Started Load Kernel Modules.
+	[  OK  ] Started Load Kernel Modules.
+	[   40.794332] systemd[1]: Starting Apply Kernel Variables...
+	Starting Apply Kernel Variables...
+	[   41.928338] systemd[1]: Starting Load/Save Random Seed...
+	Starting Load/Save Random Seed...
+	[   43.494757] systemd[1]: Started Create Static Device Nodes in /dev.
+	[  OK  ] Started Create Static Device Nodes in /dev.
+	[   44.795372] systemd[1]: Starting udev Kernel Device Manager...
+	Starting udev Kernel Device Manager...
+	[   45.043065] systemd[1]: Reached target Local File Systems (Pre).
+	[  OK  ] Reached target Local File Systems (Pre).
+	[   45.224716] systemd[1]: Reached target Local File Systems.
+	[  OK  ] Reached target Local File Systems.
+	[   46.036491] systemd[1]: Started Apply Kernel Variables.
+	[  OK  ] Started Apply Kernel Variables.
+	[   46.947879] systemd[1]: Started Load/Save Random Seed.
+	[  OK  ] Started Load/Save Random Seed.
+	[   47.910242] systemd[1]: Starting Raise network interfaces...
+	Starting Raise network interfaces...
+	[   48.119915] systemd[1]: Started Journal Service.
+	[  OK  ] Started Journal Service.
+	Starting Flush Journal to Persistent Storage...
+	[  OK  ] Started udev Kernel Device Manager.
+	[   55.369915] systemd-journald[88]: Received request to flush runtime journal from PID 1
+	[  OK  ] Started Flush Journal to Persistent Storage.
+	Starting Create Volatile Files and Directories...
+	[  OK  ] Started Raise network interfaces.
+	[  OK  ] Reached target Network.
+	[FAILED] Failed to start Create Volatile Files and Directories.
+	See 'systemctl status systemd-tmpfiles-setup.service' for details.
+	Starting Update UTMP about System Boot/Shutdown...
+	[FAILED] Failed to start Network Time Synchronization.
+	See 'systemctl status systemd-timesyncd.service' for details.
+	[  OK  ] Reached target System Time Synchronized.
+	[  OK  ] Stopped Network Time Synchronization.
+	[  OK  ] Started udev Coldplug all Devices.
+	[  OK  ] Found device /dev/hvc0.
+	[  OK  ] Reached target System Initialization.
+	[  OK  ] Reached target Basic System.
+	[  OK  ] Started Regular background program processing daemon.
+	[  OK  ] Started Daily Cleanup of Temporary Directories.
+	Starting Permit User Sessions...
+	[  OK  ] Started Daily apt download activities.
+	[  OK  ] Started Daily apt upgrade and clean activities.
+	[  OK  ] Reached target Timers.
+	[  OK  ] Started Permit User Sessions.
+	[  OK  ] Started Serial Getty on hvc0.
+	[  OK  ] Reached target Login Prompts.
+	[  OK  ] Reached target Multi-User System.
+	[  OK  ] Reached target Graphical Interface.
+
+	Debian GNU/Linux buster/sid openpiton hvc0
+
+	openpiton login:
diff --git a/doc/board/phytec/imx8mm-phygate-tauri-l.rst b/doc/board/phytec/imx8mm-phygate-tauri-l.rst
new file mode 100644
index 00000000000..28b614fd144
--- /dev/null
+++ b/doc/board/phytec/imx8mm-phygate-tauri-l.rst
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+phyGATE-Tauri-L-i.MX 8M Mini
+============================
+
+The phyGATE-Tauri-L-i.MX 8M Mini with 2GB of main memory is supported.
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get ddr firmware
+- Build U-Boot
+- Boot
+
+Build the ARM Trusted firmware binary
+-------------------------------------
+
+.. code-block:: bash
+
+   $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+   $ cd trusted-firmware-a
+   $ export CROSS_COMPILE=aarch64-linux-gnu
+   $ export IMX_BOOT_UART_BASE=0x30880000
+   $ make PLAT=imx8mm bl31
+
+Get the ddr firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.23.bin
+   $ chmod +x firmware-imx-8.23.bin
+   $ ./firmware-imx-8.23.bin
+
+Build U-Boot for SD card
+------------------------
+
+Copy binaries
+^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ cp <TF-A dir>/build/imx8mm/release/bl31.bin .
+   $ cp firmware-imx-8.23/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ make imx8mm-phygate-tauri-l_defconfig
+   $ make flash.bin
+
+Flash SD card
+^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=sync
diff --git a/doc/board/phytec/imx93-phyboard-segin.rst b/doc/board/phytec/imx93-phyboard-segin.rst
new file mode 100644
index 00000000000..ce17fbec78d
--- /dev/null
+++ b/doc/board/phytec/imx93-phyboard-segin.rst
@@ -0,0 +1,61 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+phyBOARD-Segin-i.MX93
+=====================
+
+U-Boot for the phyBOARD-Segin-i.MX93.
+
+Quick Start
+-----------
+
+- Get and Build the ARM Trusted firmware
+- Get the DDR firmware
+- Get ahab-container.img
+- Build U-Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://github.com/nxp-imx/imx-atf/
+branch: lf_v2.8
+
+.. code-block:: bash
+
+   $ unset LDFLAGS
+   $ make PLAT=imx93 bl31
+   $ cp build/imx93/release/bl31.bin $(srctree)
+
+Get the DDR firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin
+   $ chmod +x firmware-imx-8.21.bin
+   $ ./firmware-imx-8.21.bin
+   $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
+
+Get ahab-container.img
+---------------------------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.11.bin
+   $ chmod +x firmware-sentinel-0.11.bin
+   $ ./firmware-sentinel-0.11.bin
+   $ cp firmware-sentinel-0.11/mx93a1-ahab-container.img $(srctree)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ make imx93-phyboard-segin_defconfig
+   $ make
+
+Burn the flash.bin to MicroSD card offset 32KB:
+
+.. code-block:: bash
+
+   $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst
new file mode 100644
index 00000000000..99848a9e958
--- /dev/null
+++ b/doc/board/phytec/index.rst
@@ -0,0 +1,14 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+PHYTEC
+======
+
+.. toctree::
+   :maxdepth: 2
+
+   imx8mm-phygate-tauri-l
+   imx93-phyboard-segin
+   phycore-am62x
+   phycore-am64x
+   phycore-imx8mm
+   phycore-imx8mp
diff --git a/doc/board/phytec/phycore-am62x.rst b/doc/board/phytec/phycore-am62x.rst
new file mode 100644
index 00000000000..a7ce2c58825
--- /dev/null
+++ b/doc/board/phytec/phycore-am62x.rst
@@ -0,0 +1,179 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Wadim Egorov <w.egorov@phytec.de>
+
+phyCORE-AM62x
+=============
+
+The `phyCORE-AM62x <https://www.phytec.com/product/phycore-am62x>`_ is a
+SoM (System on Module) featuring TI's AM62x SoC. It can be used in combination
+with different carrier boards. This module can come with different sizes and
+models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM62x family.
+
+A development Kit, called `phyBOARD-Lyra <https://www.phytec.com/product/phyboard-am62x>`_
+is used as a carrier board reference design around the AM62x SoM.
+
+Quickstart
+----------
+
+* Download sources and TI firmware blobs
+* Build Trusted Firmware-A
+* Build OP-TEE
+* Build U-Boot for the R5
+* Build U-Boot for the A53
+* Create bootable uSD Card
+* Boot
+
+Sources
+-------
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure
+---------------
+
+Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=phycore_am62x_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=phycore_am62x_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ # we don't use any extra TFA parameters
+ $ unset TFA_EXTRA_ARGS
+ $ export OPTEE_PLATFORM=k3-am62x
+ $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+
+.. include::  ../ti/am62x_sk.rst
+    :start-after: .. am62x_evm_rst_include_start_build_steps
+    :end-before: .. am62x_evm_rst_include_end_build_steps
+
+uSD Card creation
+-----------------
+
+Use fdisk to partition the uSD card. The layout should look similar to:
+
+.. code-block:: bash
+
+ $ sudo fdisk -l /dev/mmcblk0
+ Disk /dev/mmcblk0: 7.56 GiB, 8120172544 bytes, 15859712 sectors
+ Units: sectors of 1 * 512 = 512 bytes
+ Sector size (logical/physical): 512 bytes / 512 bytes
+ I/O size (minimum/optimal): 512 bytes / 512 bytes
+ Disklabel type: dos
+ Disk identifier: 0x6583d9a3
+
+ Device         Boot  Start     End Sectors   Size Id Type
+ /dev/mmcblk0p1 *      2048  264191  262144   128M  c W95 FAT32 (LBA)
+ /dev/mmcblk0p2      264192 1934953 1670762 815.8M 83 Linux
+
+
+Once partitioned, the boot partition has to be formatted with a FAT filesystem.
+Assuming the uSD card is `/dev/mmcblk0`:
+
+.. code-block:: bash
+
+ $ mkfs.vfat /dev/mmcblk0p1
+
+To boot from a micro SD card on a HSFS device simply copy the following
+artifacts to the FAT partition:
+
+* tiboot3.bin from R5 build
+* tispl.bin from Cortex-A build
+* u-boot.img from Cortex-A build
+
+Boot
+----
+
+Put the uSD card in the slot on the board and apply power. Check the serial
+console for output.
+
+Flash to SPI NOR
+----------------
+
+Below commands can be used to flash the SPI NOR flash; assuming
+tiboot3.bin, tispl.bin and u-boot.img are stored on the uSD card.
+
+.. code-block:: bash
+
+  mtd list
+  fatload mmc 1 ${loadaddr} tiboot3.bin
+  mtd write ospi.tiboot3 ${loadaddr} 0 ${filesize}
+  fatload mmc 1 ${loadaddr} tispl.bin
+  mtd write ospi.tispl ${loadaddr} 0 ${filesize}
+  fatload mmc 1 ${loadaddr} u-boot.img
+  mtd write ospi.u-boot ${loadaddr} 0 ${filesize}
+
+UART based boot
+---------------
+
+To boot the board via UART, set the switches to UART mode and connect to the
+micro USB port labeled as "Debug UART". After power-on the build artifacts
+needs to be uploaded one by one with a tool like sz.
+
+Example bash script sequence for running on a Linux host PC feeding all boot
+artifacts needed to the device. Assuming the host uses /dev/ttyUSB0 as
+the main domain serial port:
+
+.. prompt:: bash $
+
+  stty -F /dev/ttyUSB0 115200
+  sb --xmodem tiboot3.bin > /dev/ttyUSB0 < /dev/ttyUSB0
+  sb --ymodem tispl.bin > /dev/ttyUSB0 < /dev/ttyUSB0
+  sb --ymodem u-boot.img > /dev/ttyUSB0 < /dev/ttyUSB0
+
+Boot Modes
+----------
+
+The phyCORE-AM62x development kit supports booting from many different
+interfaces. By default, the development kit is set to boot from the micro-SD
+card. To change the boot device, DIP switches S5 and S6 can be used.
+Boot switches should be changed with power off.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW5: 12345678
+     - SW6: 12345678
+
+   * - uSD
+     - 11000010
+     - 01000000
+
+   * - eMMC
+     - 11010010
+     - 00000000
+
+   * - OSPI
+     - 11010000
+     - 10000000
+
+   * - UART
+     - 11011100
+     - 00000000
+
+   * - USB DFU
+     - 11001010
+     - 00100000
+
+Further Information
+-------------------
+
+Please see :doc:`../ti/am62x_sk` chapter for further AM62 SoC related documentation
+and https://docs.phytec.com/projects/yocto-phycore-am62x/en/latest/ for vendor documentation.
diff --git a/doc/board/phytec/phycore-am64x.rst b/doc/board/phytec/phycore-am64x.rst
new file mode 100644
index 00000000000..68d78ad7c25
--- /dev/null
+++ b/doc/board/phytec/phycore-am64x.rst
@@ -0,0 +1,178 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Wadim Egorov <w.egorov@phytec.de>
+
+phyCORE-AM64x
+=============
+
+The `phyCORE-AM64x <https://www.phytec.com/product/phycore-am64x>`_ is a
+SoM (System on Module) featuring TI's AM64x SoC. It can be used in combination
+with different carrier boards. This module can come with different sizes and
+models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM64x family.
+
+A development Kit, called `phyBOARD-Electra <https://www.phytec.com/product/phyboard-am64x>`_
+is used as a carrier board reference design around the AM64x SoM.
+
+Quickstart
+----------
+
+* Download sources and TI firmware blobs
+* Build Trusted Firmware-A
+* Build OP-TEE
+* Build U-Boot for the R5
+* Build U-Boot for the A53
+* Create bootable uSD Card
+* Boot
+
+Sources
+-------
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure
+---------------
+
+Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=phycore_am64x_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=phycore_am64x_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ # we don't use any extra TFA parameters
+ $ unset TFA_EXTRA_ARGS
+ $ export OPTEE_PLATFORM=k3-am64x
+ # we don't use any extra OPTEE parameters
+ unset OPTEE_EXTRA_ARGS
+
+.. include::  ../ti/am62x_sk.rst
+    :start-after: .. am62x_evm_rst_include_start_build_steps
+    :end-before: .. am62x_evm_rst_include_end_build_steps
+
+uSD Card creation
+-----------------
+
+Use fdisk to partition the uSD card. The layout should look similar to:
+
+.. code-block:: bash
+
+ $ sudo fdisk -l /dev/mmcblk0
+ Disk /dev/mmcblk0: 7.56 GiB, 8120172544 bytes, 15859712 sectors
+ Units: sectors of 1 * 512 = 512 bytes
+ Sector size (logical/physical): 512 bytes / 512 bytes
+ I/O size (minimum/optimal): 512 bytes / 512 bytes
+ Disklabel type: dos
+ Disk identifier: 0x6583d9a3
+
+ Device         Boot  Start     End Sectors   Size Id Type
+ /dev/mmcblk0p1 *      2048  264191  262144   128M  c W95 FAT32 (LBA)
+ /dev/mmcblk0p2      264192 1934953 1670762 815.8M 83 Linux
+
+
+Once partitioned, the boot partition has to be formatted with a FAT filesystem.
+Assuming the uSD card is `/dev/mmcblk0`:
+
+.. code-block:: bash
+
+ $ mkfs.vfat /dev/mmcblk0p1
+
+To boot from a micro SD card on a HSFS device simply copy the following
+artifacts to the FAT partition:
+
+* tiboot3.bin from R5 build
+* tispl.bin from Cortex-A build
+* u-boot.img from Cortex-A build
+
+Boot
+----
+
+Put the uSD card in the slot on the board and apply power. Check the serial
+console for output.
+
+Flash to SPI NOR
+----------------
+
+Below commands can be used to flash the SPI NOR flash; assuming
+tiboot3.bin, tispl.bin and u-boot.img are stored on the uSD card.
+
+.. code-block:: bash
+
+  mtd list
+  fatload mmc 1 ${loadaddr} tiboot3.bin
+  mtd write ospi.tiboot3 ${loadaddr} 0 ${filesize}
+  fatload mmc 1 ${loadaddr} tispl.bin
+  mtd write ospi.tispl ${loadaddr} 0 ${filesize}
+  fatload mmc 1 ${loadaddr} u-boot.img
+  mtd write ospi.u-boot ${loadaddr} 0 ${filesize}
+
+UART based boot
+---------------
+
+To boot the board via UART, set the switches to UART mode and connect to the
+micro USB port labeled as "Debug UART". After power-on the build artifacts
+needs to be uploaded one by one with a tool like sz.
+
+Example bash script sequence for running on a Linux host PC feeding all boot
+artifacts needed to the device. Assuming the host uses /dev/ttyUSB0 as
+the main domain serial port:
+
+.. prompt:: bash $
+
+  stty -F /dev/ttyUSB0 115200
+  sb --xmodem tiboot3.bin > /dev/ttyUSB0 < /dev/ttyUSB0
+  # Resend tiboot3.bin a 2nd time due to ErrataID:i2331
+  sb --xmodem tiboot3.bin > /dev/ttyUSB0 < /dev/ttyUSB0
+  sb --ymodem tispl.bin > /dev/ttyUSB0 < /dev/ttyUSB0
+  sb --ymodem u-boot.img > /dev/ttyUSB0 < /dev/ttyUSB0
+
+Boot Modes
+----------
+
+The phyCORE-AM64x development kit supports booting from many different
+interfaces. By default, the development kit is set to boot from the micro-SD
+card. To change the boot device, DIP switches S5 and S6 can be used.
+Boot switches should be changed with power off.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW3: 12345678
+     - SW4: 12345678
+
+   * - uSD
+     - 11000010
+     - 01000000
+
+   * - eMMC
+     - 11010010
+     - 00000000
+
+   * - OSPI
+     - 11010000
+     - 10000000
+
+   * - UART
+     - 11011100
+     - 00000000
+
+Further Information
+-------------------
+
+Please see :doc:`../ti/am64x_evm` chapter for further AM64 SoC related documentation
+and https://docs.phytec.com/projects/yocto-phycore-am64x/en/latest/ for vendor documentation.
diff --git a/doc/board/phytec/phycore-imx8mm.rst b/doc/board/phytec/phycore-imx8mm.rst
new file mode 100644
index 00000000000..e9dc2259907
--- /dev/null
+++ b/doc/board/phytec/phycore-imx8mm.rst
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+phyCORE-i.MX 8M Mini
+====================
+
+The phyCORE-i.MX 8M Mini with 2GB of main memory is supported.
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get ddr firmware
+- Build U-Boot
+- Boot
+
+Build the ARM Trusted firmware binary
+-------------------------------------
+
+.. code-block:: bash
+
+   $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+   $ cd trusted-firmware-a
+   $ export CROSS_COMPILE=aarch64-linux-gnu
+   $ export IMX_BOOT_UART_BASE=0x30880000
+   $ make PLAT=imx8mm bl31
+
+Get the ddr firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.19.bin
+   $ chmod +x firmware-imx-8.19.bin
+   $ ./firmware-imx-8.19.bin
+
+Build U-Boot for SD card
+------------------------
+
+Copy binaries
+^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ cp <TF-A dir>/build/imx8mm/release/bl31.bin .
+   $ cp firmware-imx-8.19/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ make phycore-imx8mm_defconfig
+   $ make flash.bin
+
+Flash SD card
+^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=sync
diff --git a/doc/board/phytec/phycore-imx8mp.rst b/doc/board/phytec/phycore-imx8mp.rst
new file mode 100644
index 00000000000..fda751aeffb
--- /dev/null
+++ b/doc/board/phytec/phycore-imx8mp.rst
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+phyCORE-i.MX 8M Plus
+====================
+
+The phyCORE-i.MX 8M Plus with 2GB of main memory is supported.
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get ddr firmware
+- Build U-Boot
+- Boot
+
+Build the ARM Trusted firmware binary
+-------------------------------------
+
+.. code-block:: bash
+
+   $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+   $ cd trusted-firmware-a
+   $ export CROSS_COMPILE=aarch64-linux-gnu
+   $ export IMX_BOOT_UART_BASE=0x30860000
+   $ make PLAT=imx8mp bl31
+
+Get the ddr firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.19.bin
+   $ chmod +x firmware-imx-8.19.bin
+   $ ./firmware-imx-8.19.bin
+
+Build U-Boot for SD card
+------------------------
+
+Copy binaries
+^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ cp <TF-A dir>/build/imx8mp/release/bl31.bin .
+   $ cp firmware-imx-8.19/firmware/ddr/synopsys/lpddr4*.bin .
+
+Build U-Boot
+^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ make phycore-imx8mp_defconfig
+   $ make flash.bin
+
+Flash SD card
+^^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=sync
diff --git a/doc/board/purism/index.rst b/doc/board/purism/index.rst
new file mode 100644
index 00000000000..a9cdc312d46
--- /dev/null
+++ b/doc/board/purism/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Purism SPC
+==========
+
+.. toctree::
+   :maxdepth: 2
+
+   librem5
diff --git a/doc/board/purism/librem5.rst b/doc/board/purism/librem5.rst
new file mode 100644
index 00000000000..a7975e1659b
--- /dev/null
+++ b/doc/board/purism/librem5.rst
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Librem5
+=======
+
+U-Boot for the Purism Librem5 phone
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get ddr and hdmi firmware
+- Build U-Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://source.puri.sm/Librem5/arm-trusted-firmware
+branch: librem5
+
+.. code-block:: bash
+
+   $ make PLAT=imx8mq CROSS_COMPILE=aarch64-linux-gnu- bl31
+   $ cp build/imx8mq/release/bl31.bin $(builddir)
+
+Get the ddr and display port firmware
+-------------------------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.15.bin
+   $ chmod +x firmware-imx-8.15.bin
+   $ ./firmware-imx-8.15.bin
+   $ cp firmware-imx-8.15/firmware/hdmi/cadence/signed_dp_imx8m.bin $(builddir)
+   $ cp firmware-imx-8.15/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-linux-gnu-
+   $ make librem5_defconfig
+   $ make ARCH=arm
+
+Burn the flash.bin
+------------------
+
+Use uuu to burn flash.bin. Power on the phone while holding vol+ to get it
+into uuu mode.
+
+.. code-block:: bash
+
+   $ git clone https://source.puri.sm/Librem5/librem5-devkit-tools.git
+   $ cd librem5-devkit-tools
+   $ cp $(builddir)/flash.bin files/u-boot-librem5.imx
+   $ uuu uuu_scripts/u-boot_flash_librem5.lst
+
+Reboot the phone.
diff --git a/doc/board/qualcomm/board.rst b/doc/board/qualcomm/board.rst
new file mode 100644
index 00000000000..4d793209f9e
--- /dev/null
+++ b/doc/board/qualcomm/board.rst
@@ -0,0 +1,125 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Dzmitry Sankouski <dsankouski@gmail.com>
+
+Qualcomm generic boards
+=======================
+
+About this
+----------
+This document describes how to build and run U-Boot for Qualcomm generic
+boards. Right now the generic target supports the Snapdragon 845 SoC, however
+it's expected to support more SoCs going forward.
+
+SDM845 - high-end qualcomm chip, introduced in late 2017.
+Mostly used in flagship phones and tablets of 2018.
+
+The current boot flow support loading u-boot as an Android boot image via
+Qualcomm's UEFI-based ABL (Android) Bootloader. The DTB used by U-Boot will
+be appended to the U-Boot image the same way as when booting Linux. U-Boot
+will then retrieve the DTB during init. This way the memory layout and KASLR
+offset will be populated by ABL.
+
+Installation
+------------
+Build
+^^^^^
+
+	$ ./tools/buildman/buildman -o .output qcom
+
+This will build ``.output/u-boot-nodtb.bin`` using the ``qcom_defconfig``.
+
+Generate FIT image (optional)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+See doc/uImage.FIT for more details
+
+Pack android boot image
+^^^^^^^^^^^^^^^^^^^^^^^
+We'll assemble android boot image with ``u-boot-nodtb.bin`` instead of linux kernel,
+and FIT image instead of ``initramfs``. Android bootloader expect gzipped kernel
+with appended dtb, so let's mimic linux to satisfy stock bootloader.
+
+Boards
+------
+
+starqlte
+^^^^^^^^
+
+The starqltechn is a production board for Samsung S9 (SM-G9600) phone,
+based on the Qualcomm SDM845 SoC.
+
+This device is supported by the common qcom_defconfig.
+
+The DTB is called "sdm845-samsung-starqltechn.dtb"
+
+More information can be found on the `Samsung S9 page`_.
+
+dragonboard845c
+^^^^^^^^^^^^^^^
+
+The dragonboard845c is a Qualcomm Robotics RB3 Development Platform, based on
+the Qualcomm SDM845 SoC.
+
+This device is supported by the common qcom_defconfig
+
+The DTB is called "sdm845-db845c.dtb"
+
+More information can be found on the `DragonBoard 845c page`_.
+
+qcs404-evb
+^^^^^^^^^^
+
+The QCS404 EvB is a Qualcomm Development Platform, based on the Qualcomm QCS404 SoC.
+
+This device is supported by the common qcom_defconfig
+
+The DTB is called "qcs404-evb-4000.dtb"
+
+Building steps
+--------------
+
+Steps:
+
+- Build u-boot
+
+As above::
+
+	./tools/buildman/buildman -o .output qcom
+
+Or for db410c (and other boards not supported by the generic target)::
+
+	make CROSS_COMPILE=aarch64-linux-gnu- O=.output dragonboard410c_defconfig
+	make O=.output -j$(nproc)
+
+- gzip u-boot::
+
+	gzip u-boot-nodtb.bin
+
+- Append dtb to gzipped u-boot::
+
+	cat u-boot-nodtb.bin.gz arch/arm/dts/your-board.dtb > u-boot-nodtb.bin.gz-dtb
+
+- If you chose to build a FIT image, A ``qcom.its`` file can be found in ``board/qualcomm/generic/``
+  directory. It expects a folder as ``qcom_imgs/`` in the main directory containing pre-built kernel,
+  dts and ramdisk images. See ``qcom.its`` for full path to images::
+
+	mkimage -f qcom.its qcom.itb
+
+- Now we've got everything to build android boot image::
+
+	mkbootimg --kernel u-boot-nodtb.bin.gz-dtb --ramdisk db845c.itb \
+	--output boot.img --pagesize 4096 --base 0x80000000
+
+Or with no FIT image::
+
+	mkbootimg --kernel u-boot-nodtb.bin.gz-dtb \
+	--output boot.img --pagesize 4096 --base 0x80000000
+
+- Flash boot.img using fastboot and erase dtbo to avoid conflicts with our DTB:
+
+  .. code-block:: bash
+
+	fastboot flash boot boot.img
+	fastboot erase dtbo
+
+.. _Samsung S9 page: https://en.wikipedia.org/wiki/Samsung_Galaxy_S9
+.. _DragonBoard 845c page: https://www.96boards.org/product/rb3-platform/
diff --git a/doc/board/qualcomm/debugging.rst b/doc/board/qualcomm/debugging.rst
new file mode 100644
index 00000000000..1c35d1909d1
--- /dev/null
+++ b/doc/board/qualcomm/debugging.rst
@@ -0,0 +1,61 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Caleb Connolly <caleb.connolly@linaro.org>
+
+Qualcomm debugging
+==================
+
+About this
+----------
+
+This page describes how to enable early UART and other debugging techniques
+for Qualcomm boards.
+
+Enable debug UART
+-----------------
+
+Newer boards (SDM845 and newer, those with GENI SE UART)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Open ``configs/qcom_defconfig`` and add the following snippet to the bottom:
+
+	CONFIG_BAUDRATE=115200
+
+	# Uncomment to enable UART pre-relocation
+	CONFIG_DEBUG_UART=y
+	CONFIG_DEBUG_UART_ANNOUNCE=y
+	# This is the address of the debug-uart peripheral
+	# The value here is for SDM845, other platforms will vary
+	CONFIG_DEBUG_UART_BASE=0xa84000
+	# Boards older than ~2018 pre-date the GENI driver and unfortunately
+	# aren't supported here
+	CONFIG_DEBUG_UART_MSM_GENI=y
+	# For sdm845 this is the UART clock rate
+	CONFIG_DEBUG_UART_CLOCK=7372800
+	# Most newer boards have an oversampling value of 16 instead
+	# of 32, they need the clock rate to be doubled
+	#CONFIG_DEBUG_UART_CLOCK=14745600
+
+Then build as normal (don't forget to ``make qcom_defconfig``` again).
+
+Older boards (db410c and db820c)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Open ``configs/dragonboard<BOARD>_defconfig``
+
+	CONFIG_BAUDRATE=115200
+	CONFIG_DEBUG_UART=y
+	CONFIG_DEBUG_UART_ANNOUNCE=y
+	# db410c - 0x78b0000
+	# db820c - 0x75b0000
+	CONFIG_DEBUG_UART_BASE=0x75b0000
+	CONFIG_DEBUG_UART_MSM=y
+	CONFIG_DEBUG_UART_CLOCK=7372800
+	#CONFIG_DEBUG_UART_SKIP_INIT=y
+
+	CONFIG_LOG=y
+	CONFIG_HEXDUMP=y
+	CONFIG_CMD_LOG=y
+	CONFIG_LOG_MAX_LEVEL=9
+	CONFIG_LOG_DEFAULT_LEVEL=9
+	CONFIG_LOGLEVEL=9
+
diff --git a/doc/board/qualcomm/dragonboard410c.rst b/doc/board/qualcomm/dragonboard410c.rst
new file mode 100644
index 00000000000..34629241110
--- /dev/null
+++ b/doc/board/qualcomm/dragonboard410c.rst
@@ -0,0 +1,47 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Stephan Gerhold <stephan@gerhold.net>
+
+DragonBoard 410c
+================
+
+The DragonBoard 410c is a development board based on the Qualcomm APQ8016E SoC.
+More information can be found on the `96Boards product page`_.
+
+U-Boot can be used as a replacement for Qualcomm's original Android bootloader
+(a fork of Little Kernel/LK). Like LK, it is installed directly into the ``aboot``
+partition. Note that the U-Boot port used to be loaded as an Android boot image
+through LK. This is no longer the case, now U-Boot can replace LK entirely.
+
+.. _96Boards product page: https://www.96boards.org/product/dragonboard410c/
+
+.. _MSM8916/SD410/APQ8016 Technical Reference Manual: https://web.archive.org/web/20210525022203/https://developer.qualcomm.com/qfile/35259/lm80-p0436-100_d_snapdragon_410e_apq8016e_tech_reference_manual_revd.pdf
+
+Installation
+------------
+First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``dragonboard410c``::
+
+  $ export CROSS_COMPILE=<aarch64 toolchain prefix>
+  $ make dragonboard410c_defconfig
+  $ make
+
+This will build ``u-boot.elf`` in the configured output directory.
+
+Although the DragonBoard 410c does not have secure boot set up by default,
+the firmware still expects firmware ELF images to be "signed". The signature
+does not provide any security in this case, but it provides the firmware with
+some required metadata.
+
+To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_::
+
+  $ ./qtestsign.py aboot u-boot.elf
+
+Then install the resulting ``u-boot-test-signed.mbn`` to the ``aboot`` partition
+on your device, e.g. with ``fastboot flash aboot u-boot-test-signed.mbn``.
+
+U-Boot should be running after a reboot (``fastboot reboot``).
+
+.. _qtestsign: https://github.com/msm8916-mainline/qtestsign
+
+Usage
+-----
+Press Volume Down during boot to enter Fastboot mode.
diff --git a/doc/board/qualcomm/index.rst b/doc/board/qualcomm/index.rst
new file mode 100644
index 00000000000..4955274a39b
--- /dev/null
+++ b/doc/board/qualcomm/index.rst
@@ -0,0 +1,11 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Qualcomm
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   dragonboard410c
+   board
+   debugging
diff --git a/doc/board/renesas/index.rst b/doc/board/renesas/index.rst
new file mode 100644
index 00000000000..fb6558ec11b
--- /dev/null
+++ b/doc/board/renesas/index.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Renesas
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   renesas
+   rzn1
diff --git a/doc/board/renesas/renesas.rst b/doc/board/renesas/renesas.rst
new file mode 100644
index 00000000000..7d961e862e4
--- /dev/null
+++ b/doc/board/renesas/renesas.rst
@@ -0,0 +1,238 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Renesas
+=======
+
+About this
+----------
+
+This document describes the information about Renesas supported boards
+and their usage steps.
+
+Renesas SoC based boards
+------------------------
+
+Renesas is a SoC solutions provider for automotive and industrial applications.
+
+.. list-table:: Supported Renesas SoC based boards
+   :widths: 10, 25, 15, 10, 25
+   :header-rows: 1
+
+   * - Family
+     - Board
+     - SoC
+     - Arch
+     - defconfig
+
+   * - R2D
+     - R2D-PLUS
+     - SH7751
+     - sh
+     - r2dplus_defconfig
+
+   * - RZ/A1
+     - GR-PEACH
+     - R7S72100 (RZ/A1H)
+     - arm
+     - grpeach_defconfig
+
+   * - R-Car Gen2
+     - Lager
+     - R8A7790 (H2)
+     - arm
+     - lager_defconfig
+
+   * -
+     - Stout
+     - R8A7790 (H2)
+     - arm
+     - stout_defconfig
+
+   * -
+     - Koelsch
+     - R8A7791 (M2-W)
+     - arm
+     - koelsch_defconfig
+
+   * -
+     - Porter
+     - R8A7791 (M2-W)
+     - arm
+     - porter_defconfig
+
+   * -
+     - Blanche
+     - R8A7792 (V2H)
+     - arm
+     - blanche_defconfig
+
+   * -
+     - Gose
+     - R8A7793 (M2-N)
+     - arm
+     - gose_defconfig
+
+   * -
+     - Alt
+     - R8A7794 (E2)
+     - arm
+     - alt_defconfig
+
+   * -
+     - Silk
+     - R8A7794 (E2)
+     - arm
+     - silk_defconfig
+
+   * - R-Car Gen3
+     - Salvator-X(S)
+     - R8A77951 (H3)
+     - arm64
+     - rcar3_salvator-x_defconfig
+
+   * -
+     - ULCB
+     - R8A77951 (H3)
+     - arm64
+     - rcar3_ulcb_defconfig
+
+   * -
+     - Salvator-X(S)
+     - R8A77960 (M3-W)
+     - arm64
+     - rcar3_salvator-x_defconfig
+
+   * -
+     - ULCB
+     - R8A77960 (M3-W)
+     - arm64
+     - rcar3_ulcb_defconfig
+
+   * -
+     - Salvator-X(S)
+     - R8A77965 (M3-N)
+     - arm64
+     - rcar3_salvator-x_defconfig
+
+   * -
+     - ULCB
+     - R8A77965 (M3-N)
+     - arm64
+     - rcar3_ulcb_defconfig
+
+   * -
+     - Eagle
+     - R8A77970 (V3M)
+     - arm64
+     - r8a77970_eagle_defconfig
+
+   * -
+     - V3MSK
+     - R8A77970 (V3M)
+     - arm64
+     - r8a77970_v3msk_defconfig
+
+   * -
+     - Condor
+     - R8A77980 (V3H)
+     - arm64
+     - r8a77980_condor_defconfig
+
+   * -
+     - V3HSK
+     - R8A77980 (V3H)
+     - arm64
+     - r8a77980_v3hsk_defconfig
+
+   * -
+     - Ebisu
+     - R8A77990 (E3)
+     - arm64
+     - r8a77990_ebisu_defconfig
+
+   * -
+     - Draak
+     - R8A77995 (D3)
+     - arm64
+     - r8a77995_draak_defconfig
+
+   * - R-Car Gen4
+     - Falcon
+     - R8A779A0 (V3U)
+     - arm64
+     - r8a779a0_falcon_defconfig
+
+   * -
+     - Spider
+     - R8A779F0 (S4)
+     - arm64
+     - r8a779f0_spider_defconfig
+
+   * -
+     - White Hawk
+     - R8A779G0 (V4H)
+     - arm64
+     - r8a779g0_whitehawk_defconfig
+
+   * - RZ/G2 Family
+     - Beacon EmbeddedWorks RZ/G2M SoM
+     - R8A774A1 (RZ/G2M)
+     - arm64
+     - rzg2_beacon_defconfig
+
+   * -
+     - HopeRun HiHope RZ/G2M
+     - R8A774A1 (RZ/G2M)
+     - arm64
+     - hihope_rzg2_defconfig
+
+   * -
+     - Beacon EmbeddedWorks RZ/G2N SoM
+     - R8A774B1 (RZ/G2N)
+     - arm64
+     - rzg2_beacon_defconfig
+
+   * -
+     - HopeRun HiHope RZ/G2N
+     - R8A774B1 (RZ/G2N)
+     - arm64
+     - hihope_rzg2_defconfig
+
+   * -
+     - Silicon Linux RZ/G2E evaluation kit (EK874)
+     - R8A774C0 (RZ/G2E)
+     - arm64
+     - silinux_ek874_defconfig
+
+   * -
+     - Beacon EmbeddedWorks RZ/G2H SoM
+     - R8A774E1 (RZ/G2H)
+     - arm64
+     - rzg2_beacon_defconfig
+
+   * -
+     - HopeRun HiHope RZ/G2H
+     - R8A774E1 (RZ/G2H)
+     - arm64
+     - hihope_rzg2_defconfig
+
+   * - :doc:`RZ/N1 Family <rzn1>`
+     - Schneider RZ/N1D board
+     - R9A06G032 (RZ/N1D)
+     - arm64
+     - rzn1_snarc_defconfig
+
+   * -
+     - Schneider RZ/N1S board
+     - R9A06G033 (RZ/N1S)
+     - arm64
+     - rzn1_snarc_defconfig
+
+Build
+-----
+
+Locate the appropriate defconfig in the table above. Then apply standard build
+procedure::
+
+    make <board_defconfig>
+    make
diff --git a/doc/board/renesas/rzn1.rst b/doc/board/renesas/rzn1.rst
new file mode 100644
index 00000000000..e6d636b89e8
--- /dev/null
+++ b/doc/board/renesas/rzn1.rst
@@ -0,0 +1,76 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Renesas RZ/N1
+=============
+
+Building
+--------
+
+This document describes how to build and flash U-Boot for the RZ/N1.
+
+U-Boot
+^^^^^^
+
+Clone the U-Boot repository and build it as follows:
+
+.. code-block:: bash
+
+        git clone --depth 1 https://source.denx.de/u-boot/u-boot.git
+        cd u-boot
+        make rzn1_snarc_defconfig
+        make CROSS_COMPILE=arm-linux-gnu-
+
+This produces `u-boot` which is an ELF executable, suitable for use with `gdb`
+and JTAG debugging tools.
+
+It also produceds `u-boot.bin` which is a raw binary.
+
+Binman
+^^^^^^
+
+The BootROM in the RZ/N1 SoC expects to find the boot image in SPKG format.
+This format is documented in Chapter 7.4 of the RZ/N1 User Manual.
+
+The `binman` tool may be used to generate the SPKG format for booting.
+See tools/binman/binman.rst for details on this tool and its pre-requisites.
+
+.. code-block:: bash
+
+    binman -d arch/arm/dts/r9a06g032-rzn1-snarc.dtb -o <OUT>
+
+This will produce `u-boot.bin.spkg` in the specified <OUT> directory. It can
+then be flashed into QSPI, NAND, or loaded via USB-DFU mode.
+
+SPKG image
+^^^^^^^^^^
+
+Alternatively, the same SPKG image can be built by calling `mkimage` as follows:
+
+.. code-block:: bash
+
+    tools/mkimage -n board/schneider/rzn1-snarc/spkgimage.cfg \
+            -T spkgimage -a 0x20040000 -e 0x20040000 \
+            -d u-boot.bin u-boot.bin.spkg
+
+This produces `u-boot.bin.spkg` which can be flashed into QSPI, NAND, or loaded
+via USB-DFU mode.
+
+Take note of the load and execution address, which are encoded into the SPKG
+headers. For development convenience, mkimage computes the execution offset
+(part of the SPKG header) by subtracting the supplied load address from the
+supplied execution address.
+
+Also note there are other parameters, notably ECC configuration in the case of
+boot from NAND, specified in the `spkgimage.cfg` configuration file.
+
+Flashing
+--------
+
+The RZ/N1 is able to boot from QSPI, NAND, or via USB (DFU). In all cases the
+on-board BootROM expects for the binary to be wrapped with a "SPKG" header.
+
+It is possible to recover a bricked unit by using the USB (DFU) boot mode. This
+allows uploading U-Boot into the internal RAM. Thereafter U-Boot can be used to
+program the QSPI and/or NAND, making use of U-Boot dfu mode.
+
+Otherwise the only other option for recovery is via JTAG.
diff --git a/doc/board/rockchip/index.rst b/doc/board/rockchip/index.rst
new file mode 100644
index 00000000000..9a87a035e95
--- /dev/null
+++ b/doc/board/rockchip/index.rst
@@ -0,0 +1,11 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
+
+Rockchip
+========
+
+.. toctree::
+   :maxdepth: 2
+
+   rockchip
+   rkmtd
diff --git a/doc/board/rockchip/rkmtd.rst b/doc/board/rockchip/rkmtd.rst
new file mode 100644
index 00000000000..1481380ba6c
--- /dev/null
+++ b/doc/board/rockchip/rkmtd.rst
@@ -0,0 +1,105 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2023 Johan Jonker <jbx6244@gmail.com>
+
+RKMTD
+=====
+
+Info
+----
+
+The command rkmtd creates a virtual block device to transfer
+Rockchip boot block data to and from NAND with block orientated
+tools like "ums" and "rockusb".
+
+It uses the Rockchip MTD driver to scan for boot blocks and copies
+data from the first block in a GPT formatted virtual disk.
+Data must be written in U-boot "idbloader.img" format and start at
+partition "loader1" offset 64. The data header is parsed
+for length and offset. When the last sector is received
+it erases up to 5 erase blocks on NAND and writes boot blocks
+in a pattern depending on the NAND ID. Data is then verified.
+When a block turns out bad the block header is discarded.
+
+Limitations
+-----------
+
+- Support with CONFIG_ROCKCHIP_NAND MTD driver only.
+- Support for Rockchip boot block header type 1 only.
+- Pattern for listed NAND IDs only. (Logic still not disclosed by Rockchip)
+- The MTD framework driver data and NAND ID must be extracted at a lower level.
+
+Available rkmtd commands
+------------------------
+
+.. code-block:: bash
+
+        rkmtd bind <label>      - bind RKMTD device
+        rkmtd unbind <label>    - unbind RKMTD device
+        rkmtd info [<label>]    - show all available RKMTD devices
+        rkmtd dev [<label>]     - show or set current RKMTD device
+
+U-boot settings
+---------------
+
+Config to enable Rockchip MTD support:
+
+.. code-block:: bash
+
+        CONFIG_MTD=y
+        CONFIG_MTD_RAW_NAND=y
+        CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y
+        CONFIG_SYS_NAND_USE_FLASH_BBT=y
+        CONFIG_ROCKCHIP_NAND=y
+
+Option to keep existing NAND data unchanged:
+
+.. code-block:: bash
+
+        CONFIG_ROCKCHIP_NAND_SKIP_BBTSCAN=y
+
+Commands to enable:
+
+.. code-block:: bash
+
+        CONFIG_CMD_USB=y
+        CONFIG_CMD_RKMTD=y
+        CONFIG_CMD_ROCKUSB=y
+        CONFIG_CMD_USB_MASS_STORAGE=y
+
+Linux Host (PC) tool commands combinations that work
+----------------------------------------------------
+
+.. table::
+   :widths: 20 44
+
+   ==================== ============================================
+   U-boot               Linux
+   ==================== ============================================
+   rkmtd bind 0
+   rockusb 0 rkmtd 0
+                        upgrade_tool pl
+
+                        upgrade_tool rl 64 512 idbloader_backup.img
+
+                        upgrade_tool wl 64 idbloader.img
+
+                        upgrade_tool rd
+
+                        rkdeveloptool ppt
+
+                        rkdeveloptool rl 64 512 idbloader_backup.img
+
+                        rkdeveloptool wlx loader1 idbloader.img
+
+                        rkdeveloptool wl 64 idbloader.img
+
+                        rkdeveloptool rd
+
+                        rkflashtool r 64 512 > idbloader_backup.img
+
+                        rkflashtool w 64 512 < idbloader.img
+   ums 0 rkmtd 0
+                        dd if=/dev/sda1 of=idbloader_backup.img
+
+                        dd if=idbloader.img of=/dev/sda1
+   ==================== ============================================
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
new file mode 100644
index 00000000000..bedc52e03e2
--- /dev/null
+++ b/doc/board/rockchip/rockchip.rst
@@ -0,0 +1,487 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
+
+ROCKCHIP
+========
+
+About this
+----------
+
+This document describes the information about Rockchip supported boards
+and it's usage steps.
+
+Rockchip boards
+---------------
+
+Rockchip is a SoC solutions provider for tablets & PCs, streaming media
+TV boxes, AI audio & vision, IoT hardware.
+
+A wide range of Rockchip SoCs with associated boards are supported in
+mainline U-Boot.
+
+List of mainline supported Rockchip boards:
+
+* px30
+     - Rockchip Evb-PX30 (evb-px30)
+     - Engicam PX30.Core C.TOUCH 2.0 (px30-core-ctouch2-px30)
+     - Engicam PX30.Core C.TOUCH 2.0 10.1 (px30-core-ctouch2-of10-px30)
+     - Engicam PX30.Core EDIMM2.2 Starter Kit (px30-core-edimm2.2-px30)
+     - Firefly Core-PX30-JD4 (firefly-px30)
+     - Theobroma Systems PX30-µQ7 SoM - Ringneck (ringneck-px30)
+* rk3036
+     - Rockchip Evb-RK3036 (evb-rk3036)
+     - Kylin (kylin_rk3036)
+* rk3066
+     - Rikomagic MK808 (mk808)
+* rk3128
+     - Rockchip Evb-RK3128 (evb-rk3128)
+* rk3188
+     - Radxa Rock (rock)
+* rk3229
+     - Rockchip Evb-RK3229 (evb-rk3229)
+* rk3288
+     - Rockchip Evb-RK3288 (evb-rk3288)
+     - Firefly-RK3288 (firefly-rk3288)
+     - MQmaker MiQi (miqi-rk3288)
+     - Phytec RK3288 PCM-947 (phycore-rk3288)
+     - PopMetal-RK3288 (popmetal-rk3288)
+     - Radxa Rock 2 Square (rock2)
+     - Tinker-RK3288 (tinker-rk3288)
+     - Google Jerry (chromebook_jerry)
+     - Google Mickey (chromebook_mickey)
+     - Google Minnie (chromebook_minnie)
+     - Google Speedy (chromebook_speedy)
+     - Amarula Vyasa-RK3288 (vyasa-rk3288)
+* rk3308
+     - Radxa ROCK Pi S (rock-pi-s-rk3308)
+     - Rockchip Evb-RK3308 (evb-rk3308)
+     - Roc-cc-RK3308 (roc-cc-rk3308)
+* rk3326
+     - ODROID-GO Advance (odroid-go2)
+* rk3328
+     - Rockchip Evb-RK3328 (evb-rk3328)
+     - Firefly ROC-RK3328-CC (roc-cc-rk3328)
+     - FriendlyElec NanoPi R2C (nanopi-r2c-rk3328)
+     - FriendlyElec NanoPi R2C Plus (nanopi-r2c-plus-rk3328)
+     - FriendlyElec NanoPi R2S (nanopi-r2s-rk3328)
+     - Pine64 Rock64 (rock64-rk3328)
+     - Radxa ROCK Pi E (rock-pi-e-rk3328)
+     - Xunlong Orange Pi R1 Plus (orangepi-r1-plus-rk3328)
+     - Xunlong Orange Pi R1 Plus LTS (orangepi-r1-plus-lts-rk3328)
+* rk3368
+     - GeekBox (geekbox)
+     - PX5 EVB (evb-px5)
+     - Rockchip Sheep (sheep-rk3368)
+* rk3399
+     - 96boards RK3399 Ficus (ficus-rk3399)
+     - 96boards Rock960 (rock960-rk3399)
+     - Firefly-RK3399 (firefly_rk3399)
+     - Firefly ROC-RK3399-PC
+     - FriendlyElec NanoPC-T4 (nanopc-t4-rk3399)
+     - FriendlyElec NanoPi M4 (nanopi-m4-rk3399)
+     - FriendlyElec NanoPi M4B (nanopi-m4b-rk3399)
+     - FriendlyARM NanoPi NEO4 (nanopi-neo4-rk3399)
+     - Google Bob (chromebook_bob)
+     - Google Kevin (chromebook_kevin)
+     - Khadas Edge (khadas-edge-rk3399)
+     - Khadas Edge-Captain (khadas-edge-captain-rk3399)
+     - Khadas Edge-V (hadas-edge-v-rk3399)
+     - Orange Pi RK3399 (orangepi-rk3399)
+     - Pine64 RockPro64 (rockpro64-rk3399)
+     - Radxa ROCK 4C+ (rock-4c-plus-rk3399)
+     - Radxa ROCK 4SE (rock-4se-rk3399)
+     - Radxa ROCK Pi 4A/B/A+/B+ (rock-pi-4-rk3399)
+     - Radxa ROCK Pi 4C (rock-pi-4c-rk3399)
+     - Rockchip Evb-RK3399 (evb_rk3399)
+     - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
+
+* rk3566
+     - Anbernic RGxx3 (anbernic-rgxx3-rk3566)
+     - Pine64 PineTab2 (pinetab2-rk3566)
+     - Pine64 Quartz64-A Board (quartz64-a-rk3566)
+     - Pine64 Quartz64-B Board (quartz64-b-rk3566)
+     - Pine64 SOQuartz on Blade (soquartz-blade-rk3566)
+     - Pine64 SOQuartz on CM4-IO (soquartz-cm4-rk3566)
+     - Pine64 SOQuartz on Model A (soquartz-model-a-rk3566)
+     - Powkiddy X55 (powkiddy-x55-rk3566)
+     - Radxa CM3 IO Board (radxa-cm3-io-rk3566)
+
+* rk3568
+     - Rockchip Evb-RK3568 (evb-rk3568)
+     - Banana Pi BPI-R2 Pro (bpi-r2-pro-rk3568)
+     - EmbedFire LubanCat 2 (lubancat-2-rk3568)
+     - FriendlyElec NanoPi R5C (nanopi-r5c-rk3568)
+     - FriendlyElec NanoPi R5S (nanopi-r5s-rk3568)
+     - Generic RK3566/RK3568 (generic-rk3568)
+     - Hardkernel ODROID-M1 (odroid-m1-rk3568)
+     - Radxa E25 Carrier Board (radxa-e25-rk3568)
+     - Radxa ROCK 3 Model A (rock-3a-rk3568)
+
+* rk3588
+     - ArmSoM Sige7 (sige7-rk3588)
+     - Rockchip EVB (evb-rk3588)
+     - Edgeble Neural Compute Module 6A SoM - Neu6a (neu6a-io-rk3588)
+     - Edgeble Neural Compute Module 6B SoM - Neu6b (neu6b-io-rk3588)
+     - FriendlyElec NanoPC-T6 (nanopc-t6-rk3588)
+     - FriendlyElec NanoPi R6C (nanopi-r6c-rk3588s)
+     - FriendlyElec NanoPi R6S (nanopi-r6s-rk3588s)
+     - Generic RK3588S/RK3588 (generic-rk3588)
+     - Indiedroid Nova (nova-rk3588s)
+     - Pine64 QuartzPro64 (quartzpro64-rk3588)
+     - Radxa ROCK 5A (rock5a-rk3588s)
+     - Radxa ROCK 5B (rock5b-rk3588)
+     - Rockchip Toybrick TB-RK3588X (toybrick-rk3588)
+     - Theobroma Systems RK3588-SBC Jaguar (jaguar-rk3588)
+     - Theobroma Systems SOM-RK3588-Q7 - Tiger (tiger-rk3588)
+     - Turing Machines RK1 (turing-rk1-rk3588)
+     - Xunlong Orange Pi 5 (orangepi-5-rk3588s)
+     - Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588)
+     - Yanyi Tech CoolPi 4 Model B (coolpi-4b-rk3588s)
+     - Yanyi Tech CoolPi CM5 EVB (coolpi-cm5-evb-rk3588)
+
+* rv1108
+     - Rockchip Evb-rv1108 (evb-rv1108)
+     - Elgin-R1 (elgin-rv1108)
+
+* rv1126
+     - Edgeble Neural Compute Module 2 SoM - Neu2/Neu2k (neu2-io-r1126)
+     - Itead Sonoff iHost (sonoff-ihost-rv1126)
+
+Building
+--------
+
+TF-A
+^^^^
+
+TF-A is required when building ARM64 Rockchip SoCs images.
+
+To build TF-A:
+
+.. code-block:: bash
+
+        git clone --depth 1 https://github.com/ARM-software/arm-trusted-firmware.git
+        cd arm-trusted-firmware
+        make realclean
+        make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399
+        cd ..
+
+Specify the PLAT= with desired Rockchip platform to build TF-A for.
+
+For SoCs whose TF-A code is not available as open source, use BL31 binary provided by Rockchip:
+
+.. code-block:: bash
+
+        git clone --depth 1 https://github.com/rockchip-linux/rkbin
+
+TPL
+^^^
+
+For some SoCs U-Boot sources lack of support to inizialize DRAM.
+In these cases, to get a fully functional image following :ref:`PackageWithTPLandSPL`, use DDR binary provided by Rockchip rkbin repository as ROCKCHIP_TPL when building U-Boot.
+Otherwise, follow :ref:`PackageWithRockchipMiniloader`. 
+
+U-Boot
+^^^^^^
+
+.. code-block:: bash
+
+        git clone --depth 1 https://source.denx.de/u-boot/u-boot.git
+        cd u-boot
+
+To build px30 boards:
+
+.. code-block:: bash
+
+        export BL31=../arm-trusted-firmware/build/px30/release/bl31/bl31.elf
+        make evb-px30_defconfig
+        make CROSS_COMPILE=aarch64-linux-gnu-
+
+To build rk3066 boards:
+
+.. code-block:: bash
+
+        make mk808_defconfig
+        make CROSS_COMPILE=arm-linux-gnueabihf-
+
+To build rk3288 boards:
+
+.. code-block:: bash
+
+        make evb-rk3288_defconfig
+        make CROSS_COMPILE=arm-linux-gnueabihf-
+
+To build rk3308 boards:
+
+.. code-block:: bash
+
+        export BL31=../rkbin/bin/rk33/rk3308_bl31_v2.26.elf
+        export ROCKCHIP_TPL=../rkbin/bin/rk33/rk3308_ddr_589MHz_uartX_mY_v2.07.bin
+        make evb-rk3308_defconfig
+        make CROSS_COMPILE=aarch64-linux-gnu-
+
+To build rk3328 boards:
+
+.. code-block:: bash
+
+        export BL31=../arm-trusted-firmware/build/rk3328/release/bl31/bl31.elf
+        make evb-rk3328_defconfig
+        make CROSS_COMPILE=aarch64-linux-gnu-
+
+To build rk3368 boards:
+
+.. code-block:: bash
+
+        export BL31=../arm-trusted-firmware/build/rk3368/release/bl31/bl31.elf
+        make evb-px5_defconfig
+        make CROSS_COMPILE=aarch64-linux-gnu-
+
+To build rk3399 boards:
+
+.. code-block:: bash
+
+        export BL31=../arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf
+        make evb-rk3399_defconfig
+        make CROSS_COMPILE=aarch64-linux-gnu-
+
+To build rk3568 boards:
+
+.. code-block:: bash
+
+        export BL31=../arm-trusted-firmware/build/rk3568/release/bl31/bl31.elf
+        [or]export BL31=../rkbin/bin/rk35/rk3568_bl31_v1.34.elf
+        export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3568_ddr_1560MHz_v1.13.bin
+        make evb-rk3568_defconfig
+        make CROSS_COMPILE=aarch64-linux-gnu-
+
+To build rk3588 boards:
+
+.. code-block:: bash
+
+        export BL31=../rkbin/bin/rk35/rk3588_bl31_v1.33.elf
+        export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.09.bin
+        make evb-rk3588_defconfig
+        make CROSS_COMPILE=aarch64-linux-gnu-
+
+Flashing
+--------
+
+.. _`PackageWithTPLandSPL`:
+
+1. Package the image with U-Boot TPL/SPL
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+SD Card
+"""""""
+
+All Rockchip platforms (except rk3128 which doesn't use SPL) are now
+supporting a single boot image using binman.
+
+To write an image that boots from a SD card (assumed to be /dev/sda):
+
+.. code-block:: bash
+
+        sudo dd if=u-boot-rockchip.bin of=/dev/sda seek=64
+        sync
+
+eMMC
+""""
+
+eMMC flash would probe on mmc0 in most of the Rockchip platforms.
+
+Create GPT partition layout as defined in $partitions:
+
+.. code-block:: bash
+
+        mmc dev 0
+        gpt write mmc 0 $partitions
+
+Connect the USB-OTG cable between the host and a target device.
+
+Launch fastboot on the target with:
+
+.. code-block:: bash
+
+        fastboot 0
+
+Upon a successful gadget connection the host shows the USB device with:
+
+.. code-block:: bash
+
+        lsusb
+        # Bus 001 Device 020: ID 2207:330c Fuzhou Rockchip Electronics Company RK3399 in Mask ROM mode
+
+Program the flash with:
+
+.. code-block:: bash
+
+        sudo fastboot -i 0x2207 flash loader1 idbloader.img
+        sudo fastboot -i 0x2207 flash loader2 u-boot.itb
+
+Note:
+
+For Rockchip 32-bit platforms the U-Boot proper image
+is u-boot-dtb.img
+
+SPI
+"""
+
+Write u-boot-rockchip-spi.bin to offset 0 of SPI flash.
+
+Copy u-boot-rockchip-spi.bin into SD card and boot from SD:
+
+.. code-block:: bash
+
+        sf probe
+        load mmc 1:1 $kernel_addr_r u-boot-rockchip-spi.bin
+        sf update $fileaddr 0 $filesize
+
+.. _`PackageWithRockchipMiniloader`:
+
+2. Package the image with Rockchip miniloader
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Image package with Rockchip miniloader requires rkbin [1].
+
+.. code-block:: bash
+
+        cd ..
+        git clone --depth 1 https://github.com/rockchip-linux/rkbin
+
+Create idbloader.img:
+
+.. code-block:: bash
+
+        cd u-boot
+        ./tools/mkimage -n px30 -T rksd -d ../rkbin/bin/rk33/px30_ddr_333MHz_v1.16.bin idbloader.img
+        cat ../rkbin/bin/rk33/px30_miniloader_v1.31.bin >> idbloader.img
+        sudo dd if=idbloader.img of=/dev/sda seek=64
+
+Create trust.img:
+
+.. code-block:: bash
+
+        cd ../rkbin
+        ./tools/trust_merger RKTRUST/PX30TRUST.ini
+        sudo dd if=trust.img of=/dev/sda seek=24576
+
+Create uboot.img [2]:
+
+.. code-block:: bash
+
+        cd ../u-boot
+        ../rkbin/tools/loaderimage --pack --uboot u-boot-dtb.bin uboot.img 0x200000
+        sudo dd if=uboot.img of=/dev/sda seek=16384
+
+Note:
+
+1. rkbin binaries are regularly updated, so it would be recommended to use the latest version.
+2. 0x200000 is a load address and is an option for some platforms.
+
+3. Package the RK3066 image with U-Boot TPL/SPL on NAND
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Unlike later SoC models the rk3066 BootROM doesn't have SDMMC support.
+If all other boot options fail then it enters into a BootROM mode on the USB OTG port.
+This method loads TPL/SPL on NAND with U-Boot and kernel on SD card.
+
+SD Card
+"""""""
+
+U-Boot expects a GPT partition map and a boot directory structure with files on the SD card.
+
+.. code-block:: none
+
+        Partition Map for MMC device 0  --   Partition Type: EFI
+        Part     Start LBA         End LBA           Name
+        1        0x00000040        0x00001f7f        "loader1"
+        2        0x00004000        0x00005fff        "loader2"
+        3        0x00006000        0x00007fff        "trust"
+        4        0x00008000        0x0003ffff        "boot"
+        5        0x00040000        0x00ed7fde        "rootfs"
+
+Make sure boot and esp flag are set for the boot partition.
+Loader1 partition is not used by RK3066.
+
+Boot partition:
+
+.. code-block:: none
+
+        extlinux
+          extlinux.conf
+
+        zImage
+        rk3066a-mk808.dtb
+
+To write a U-Boot image to the SD card (assumed to be /dev/sda):
+
+.. code-block:: bash
+
+        sudo dd if=u-boot-dtb.img of=/dev/sda seek=16384
+        sync
+
+NAND
+""""
+
+Bring device in BootROM mode:
+
+If bricked and no BootROM mode shows up then connect pin 8 and 9 of the NAND flash
+with a needle while reconnecting to the USB OTG port to a PC.
+
+Show connected devices with:
+
+.. code-block:: bash
+
+        lsusb
+        # Bus 001 Device 004: ID 2207:300a Fuzhou Rockchip Electronics Company RK3066 in Mask ROM mode
+
+
+Create NAND image:
+
+Size of SPL and TPL must be aligned to 2kb.
+
+Program with commands in a bash script ./flash.sh:
+
+.. code-block:: bash
+
+        #!/bin/sh
+
+        printf "RK30" | dd conv=notrunc bs=4 count=1 of=u-boot-tpl.bin
+        truncate -s %2048 u-boot-tpl.bin
+        truncate -s %2048 u-boot-spl.bin
+        ../tools/boot_merger --verbose config-flash.ini
+        ../tools/upgrade_tool ul ./RK30xxLoader_uboot.bin
+
+config-flash.ini:
+
+.. code-block:: none
+
+        [CHIP_NAME]
+        NAME=RK30
+        [VERSION]
+        MAJOR=2
+        MINOR=21
+        [CODE471_OPTION]
+        NUM=1
+        Path1=30_LPDDR2_300MHz_DD.bin
+        [CODE472_OPTION]
+        NUM=1
+        Path1=rk30usbplug.bin
+        [LOADER_OPTION]
+        NUM=2
+        LOADER1=FlashData
+        LOADER2=FlashBoot
+        FlashData=u-boot-tpl.bin
+        FlashBoot=u-boot-spl.bin
+        [OUTPUT]
+        PATH=RK30xxLoader_uboot.bin
+
+TODO
+----
+
+- Add Rockchip idbloader image building
+- Add Rockchip TPL image building
+- Document SPI flash boot
+- Add missing SoC's with it boards list
+
+.. Jagan Teki <jagan@amarulasolutions.com>
+.. Wednesday 28 October 2020 06:47:26 PM IST
diff --git a/doc/board/samsung/axy17lte.rst b/doc/board/samsung/axy17lte.rst
new file mode 100644
index 00000000000..b7f299d1c7d
--- /dev/null
+++ b/doc/board/samsung/axy17lte.rst
@@ -0,0 +1,85 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Dzmitry Sankouski <dsankouski@gmail.com>
+
+Samsung 2017 A series phones
+============================
+
+About this
+----------
+This document describes the information about Samsung A(7/5/3) 2017 midrange
+phones and u-boot usage steps.
+
+U-Boot can be used as a chain-loaded bootloader to replace Samsung's original SBOOT bootloader.
+It is loaded as an Android boot image through SBOOT.
+
+Phone specs
+-----------
+A3 (SM-A320) (a3y17lte)
+^^^^^^^^^^^^^^^^^^^^^^^
+- 4.7 AMOLED display
+- Exynos 7870 SoC
+- 16GB flash
+- 2GB RAM
+
+.. A3 2017 wiki page: https://en.wikipedia.org/wiki/Samsung_Galaxy_A3_(2017)
+
+A5 (SM-A520) (a5y17lte)
+^^^^^^^^^^^^^^^^^^^^^^^
+- 5.2 AMOLED display
+- Exynos 7880 SoC
+- 32GB flash
+- 3GB RAM
+
+.. A5 2017 wiki page: https://en.wikipedia.org/wiki/Samsung_Galaxy_A5_(2017)
+
+A7 (SM-A720) (a5y17lte)
+^^^^^^^^^^^^^^^^^^^^^^^
+- 5.7 AMOLED display
+- Exynos 7880 SoC
+- 32GB flash
+- 3GB RAM
+
+.. A7 2017 wiki page: https://en.wikipedia.org/wiki/Samsung_Galaxy_A7_(2017)
+
+Installation
+------------
+
+Building u-boot
+^^^^^^^^^^^^^^^
+
+First, setup ``CROSS_COMPILE`` for aarch64.
+Then, build U-Boot for your phone, for example ``a5y17lte``::
+
+  $ export CROSS_COMPILE=<aarch64 toolchain prefix>
+  $ make a5y17lte_defconfig
+  $ make
+
+This will build ``u-boot.bin`` in the configured output directory.
+
+Payload
+^^^^^^^
+What is a payload?
+""""""""""""""""""
+A payload file is a file to be used instead of linux kernel in android boot image.
+This file will be loaded into memory, and executed by SBOOT,
+and is therefore SBOOT's payload.
+It may be pure u-boot (with loading u-boot's payload from flash in mind),
+or u-boot + u-boot's payload.
+
+Creating payload file
+"""""""""""""""""""""
+- Assemble FIT image for your kernel
+
+Creating android boot image
+"""""""""""""""""""""""""""
+Once payload created, it's time for android image::
+
+  uboot=<path to u-boot.bin file>
+  ramdisk=<path to FIT payload file>
+  mkbootimg --base 0x40000000 --kernel_offset 0x00000000 --ramdisk_offset 0x01000000 --tags_offset 0x00000100 --pagesize 2048 --second_offset 0x00f00000 --kernel "$uboot" --ramdisk "$ramdisk" -o uboot.img
+
+Note, that stock Samsung bootloader ignores offsets, set in mkbootimg.
+
+Flashing
+""""""""
+Flash like regular android boot image.
diff --git a/doc/board/samsung/e850-96.rst b/doc/board/samsung/e850-96.rst
new file mode 100644
index 00000000000..0cb95473e53
--- /dev/null
+++ b/doc/board/samsung/e850-96.rst
@@ -0,0 +1,87 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Sam Protsenko <semen.protsenko@linaro.org>
+
+WinLink E850-96 board
+=====================
+
+Overview
+--------
+
+WinLink's E850-96 board [1]_ is based on Samsung Exynos850 SoC and follows
+96Boards Consumer Edition specification [2]_. That makes it possible to use
+96Boards mezzanine boards [3]_ along with it. It's an open-hardware board and
+the hardware design files [4]_ were published, along with the supported
+software [5]_ and related documentation.
+
+U-Boot can be used on E850-96 instead of the original Samsung LittleKernel based
+bootloader [6]_. Because FWBL1 [7]_ doesn't verify bootloader's signature, there
+is no need to sign a U-Boot binary. That means U-Boot binary can be flashed into
+``bootloader`` partition (instead of LittleKernel bootloader) and it will just
+work.
+
+Because BL2 bootloader already sets up DRAM and runs the final bootloader
+(U-Boot) from DRAM, there is no need in U-Boot SPL. It's enough to have only
+U-Boot proper (``u-boot.bin``).
+
+Boot Flow
+---------
+
+The boot path for Exynos850 is shown on the figure below.
+
+.. image:: img/exynos850-boot-architecture.svg
+  :alt: Exynos850 SoC boot flow
+
+Legend:
+
+* ``BL0``: Boot ROM code
+* ``BL1``: Software part of Boot ROM
+* ``EPBL``: Exynos Primary Boot Loader
+* ``BL2``: Initializes CMU and DRAM and runs the final bootloader
+* ``Bootloader``: Final bootloader (e.g. U-Boot); also called BL33 in terms of
+  ARM boot flow
+* ``EL3_MON``: EL3 monitor (trusted firmware, handles SMC calls); also called
+  BL31 in terms of ARM boot flow
+* ``LDFW``: Loadable Firmware
+
+Build Procedure
+---------------
+
+.. warning::
+  At the moment both eMMC and USB features are not enabled in U-Boot. Flashing
+  U-Boot binary **WILL** effectively brick your board. The ``dltool`` [8]_ can
+  be used then to perform USB boot and flash LittleKernel bootloader binary [7]_
+  to unbrick and revive the board. Flashing U-Boot binary might be helpful for
+  developers or anybody who want to check current state of U-Boot enablement on
+  E850-96 (which is mostly serial console and related blocks).
+
+Build U-Boot binary from source code (using AArch64 baremetal GCC toolchain):
+
+.. prompt:: bash $
+
+  export PATH=<toolchain path>/bin:$PATH
+  export CROSS_COMPILE=<toolchain prefix>
+  make e850-96_defconfig
+  make
+
+Boot E850-96 board into fastboot mode as described in board software doc [9]_,
+and flash U-Boot binary into ``bootloader`` eMMC partition:
+
+.. prompt:: bash $
+
+  fastboot flash bootloader u-boot.bin
+  fastboot reboot
+
+U-Boot will boot up to the shell.
+
+References
+----------
+
+.. [1] https://www.96boards.org/product/e850-96b/
+.. [2] https://www.96boards.org/products/ce/
+.. [3] https://www.96boards.org/products/mezzanine/
+.. [4] https://www.96boards.org/documentation/consumer/e850-96b/hardware-docs/
+.. [5] https://gitlab.com/Linaro/96boards/e850-96/
+.. [6] https://gitlab.com/Linaro/96boards/e850-96/lk
+.. [7] https://gitlab.com/Linaro/96boards/e850-96/images
+.. [8] https://gitlab.com/Linaro/96boards/e850-96/tools/dltool
+.. [9] https://gitlab.com/Linaro/96boards/e850-96/doc
diff --git a/doc/board/samsung/img/exynos850-boot-architecture.svg b/doc/board/samsung/img/exynos850-boot-architecture.svg
new file mode 100644
index 00000000000..c6e850407b4
--- /dev/null
+++ b/doc/board/samsung/img/exynos850-boot-architecture.svg
@@ -0,0 +1,1283 @@
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+              </xhtml:div>
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diff --git a/doc/board/samsung/index.rst b/doc/board/samsung/index.rst
new file mode 100644
index 00000000000..a1c9636b050
--- /dev/null
+++ b/doc/board/samsung/index.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Samsung
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   axy17lte
+   e850-96
diff --git a/doc/board/schneider/hmibsc.rst b/doc/board/schneider/hmibsc.rst
new file mode 100644
index 00000000000..f09fb5af1b3
--- /dev/null
+++ b/doc/board/schneider/hmibsc.rst
@@ -0,0 +1,45 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Sumit Garg <sumit.garg@linaro.org>
+
+HMIBSC
+======
+
+The HMIBSC is an IIoT Edge Box Core board based on the Qualcomm APQ8016E SoC.
+More information can be found on the `SE product page`_.
+
+U-Boot can be used as a replacement for Qualcomm's original Android bootloader
+(a fork of Little Kernel/LK). Like LK, it is installed directly into the ``aboot``
+partition. Note that the U-Boot port used to be loaded as an Android boot image
+through LK. This is no longer the case, now U-Boot can replace LK entirely.
+
+.. _SE product page: https://www.se.com/us/en/product/HMIBSCEA53D1L0T/iiot-edge-box-core-harmony-ipc-emmc-dc-linux-tpm/
+
+Build steps
+-----------
+
+First, setup ``CROSS_COMPILE`` for aarch64. Then, build U-Boot for ``hmibsc``::
+
+  $ export CROSS_COMPILE=<aarch64 toolchain prefix>
+  $ make hmibsc_defconfig
+  $ make
+
+This will build ``u-boot.elf`` in the configured output directory.
+
+Installation
+------------
+
+Although the HMIBSC does not have secure boot set up by default, the firmware
+still expects firmware ELF images to be "signed". The signature does not provide
+any security in this case, but it provides the firmware with some required
+metadata.
+
+To "sign" ``u-boot.elf`` you can use e.g. `qtestsign`_::
+
+  $ ./qtestsign.py aboot u-boot.elf
+
+Then install the resulting ``u-boot-test-signed.mbn`` to the ``aboot`` partition
+on your device, e.g. with ``fastboot flash aboot u-boot-test-signed.mbn``.
+
+U-Boot should be running after a reboot (``fastboot reboot``).
+
+.. _qtestsign: https://github.com/msm8916-mainline/qtestsign
diff --git a/doc/board/schneider/index.rst b/doc/board/schneider/index.rst
new file mode 100644
index 00000000000..55792ed3100
--- /dev/null
+++ b/doc/board/schneider/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Schneider Electric
+==================
+
+.. toctree::
+   :maxdepth: 2
+
+   hmibsc
diff --git a/doc/board/sielaff/imx6dl-sielaff.rst b/doc/board/sielaff/imx6dl-sielaff.rst
new file mode 100644
index 00000000000..699079b3271
--- /dev/null
+++ b/doc/board/sielaff/imx6dl-sielaff.rst
@@ -0,0 +1,29 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sielaff i.MX6 Solo Board
+========================
+
+The Sielaff i.MX6 Solo board is a control and Human Machine Interface (HMI)
+board for vending machines.
+
+Quick Start
+-----------
+
+Build U-Boot
+^^^^^^^^^^^^
+
+.. code-block:: bash
+
+   make imx6dl_sielaff_defconfig
+   make CROSS_COMPILE=arm-linux-gnueabi-
+
+Copy the flash.bin file to an SD card at an offset of 1 KiB:
+
+.. code-block:: bash
+
+   dd if=flash.bin of=/dev/sd[x] bs=1K seek=1
+
+Boot
+^^^^
+
+Put the SD card in the slot on the board and apply power.
diff --git a/doc/board/sielaff/index.rst b/doc/board/sielaff/index.rst
new file mode 100644
index 00000000000..a8376484d88
--- /dev/null
+++ b/doc/board/sielaff/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sielaff
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   imx6dl-sielaff
diff --git a/doc/board/siemens/index.rst b/doc/board/siemens/index.rst
new file mode 100644
index 00000000000..082936ea7e7
--- /dev/null
+++ b/doc/board/siemens/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Siemens
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   iot2050
diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst
new file mode 100644
index 00000000000..ee3c5c95846
--- /dev/null
+++ b/doc/board/siemens/iot2050.rst
@@ -0,0 +1,164 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Jan Kiszka <jan.kiszka@siemens.com>
+
+SIMATIC IOT2050 BASIC and ADVANCED
+==================================
+
+The SIMATIC IOT2050 is an open industrial IoT gateway that is using the TI
+AM6528 GP (Basic variant) or the AM6548 HS (Advanced variant). The Advanced
+variant is prepared for secure boot. M.2 Variant also uses the AM6548 HS.
+Instead of a MiniPCI connector, it comes with two M.2 connectors and can
+support 5G/WIFI/BT applications or connect an SSD.
+
+The IOT2050 starts only from OSPI. It loads a Siemens-provided bootloader
+called SE-Boot for the MCU domain (R5F cores), then hands over to ATF and
+OP-TEE, before booting U-Boot on the A53 cores. This describes how to build all
+open artifacts into a flashable image for the OSPI flash. The flash image will
+work on both variants.
+
+Dependencies
+------------
+
+ATF:    Upstream release 2.4 or newer
+OP-TEE: Upstream release 3.10.0 or newer
+
+Binary dependencies can be found in
+https://github.com/siemens/meta-iot2050/tree/master/recipes-bsp/u-boot/files/prebuild.
+The following binaries from that source need to be present in the build folder:
+
+ - seboot_pg1.bin
+ - seboot_pg2.bin
+
+When using the watchdog, a related firmware for the R5 core(s) is needed, e.g.
+https://github.com/siemens/k3-rti-wdt. The name and location of the image is
+configured via CONFIG_WDT_K3_RTI_FW_FILE.
+
+For building an image containing the OTP key provisioning data, below binary
+needs to be present in the build folder:
+
+ - otpcmd.bin
+
+Regarding how to generating this otpcmd.bin, please refer to:
+https://github.com/siemens/meta-iot2050/tree/master/recipes-bsp/secure-boot-otp-provisioning/files/make-otpcmd.sh
+
+Building
+--------
+
+Make sure that CROSS_COMPILE is set appropriately:
+
+.. code-block:: text
+
+ $ export CROSS_COMPILE=aarch64-linux-gnu-
+
+ATF:
+
+.. code-block:: text
+
+ $ make PLAT=k3 SPD=opteed K3_USART=1
+
+OP-TEE:
+
+.. code-block:: text
+
+ $ make PLATFORM=k3-am65x CFG_ARM64_core=y CFG_TEE_CORE_LOG_LEVEL=2 CFG_CONSOLE_UART=1 CFG_USER_TA_TARGETS="ta_arm64"
+
+U-Boot:
+
+.. code-block:: text
+
+ $ export BL31=/path/to/bl31.bin
+ $ export TEE=/path/to/tee-raw.bin
+ $ make iot2050_defconfig
+
+ $ make
+
+This will generate two different flash images: flash-p1.bin that targets the
+first generation of IOT2050 devices and flash-pg2.bin that runs on PG2
+including M.2 devices.
+
+Flashing
+--------
+
+Via U-Boot:
+
+.. code-block:: text
+
+ IOT2050> sf probe
+ IOT2050> load mmc 0:1 $loadaddr /path/to/flash-pgX.bin
+ IOT2050> sf update $loadaddr 0x0 $filesize
+
+Via external programmer Dediprog SF100 or SF600:
+
+.. code-block:: text
+
+ $ dpcmd --vcc 2 -v -u flash-pgX.bin
+
+Signing (optional)
+------------------
+
+To enable verified boot for the firmware artifacts after the Siemens-managed
+first-stage loader (seboot_pgX.bin), the following steps need to be taken
+before and after the build:
+
+Generate dtsi holding the public key
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. code-block:: text
+
+ tools/key2dtsi.py -c -s key.pem public-key.dtsi
+
+This will be used to embed the public key into U-Boot SPL and main so that each
+step can validate signatures of the succeeding one.
+
+Adjust U-Boot configuration
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Enabled at least the following options in U-Boot:
+
+.. code-block:: text
+
+ CONFIG_SPL_FIT_SIGNATURE=y
+ CONFIG_DEVICE_TREE_INCLUDES="/path/to/public-key.dtsi"
+ CONFIG_RSA=y
+
+Note that there are more configuration changes needed in order to lock-down
+the command line and the boot process of U-Boot for secure scenarios. These are
+not in scope here.
+
+Build U-Boot
+^^^^^^^^^^^^
+
+See related section above.
+
+Sign flash-pgX.bin
+^^^^^^^^^^^^^^^^^^
+
+In the build folder still containing artifacts from step 3, invoke:
+
+.. code-block:: text
+
+ tools/iot2050-sign-fw.sh /path/to/key.pem
+
+Flash signed flash-pgX.bin
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The signing has happen in-place in flash-pgX.bin, thus the flashing procedure
+described above.
+
+M.2 slot configuration
+----------------------
+
+The M.2 variant of the IOT2050 comes with one B-keyed and one E-keyed slot.
+These are configured by U-Boot depending on the detected usage (auto
+configuration). The device tree loaded later on for the OS will be fixed up
+by U-Boot according to this configuration.
+
+For the case auto configuration does not work reliably, it is possible to set
+the U-Boot environment variable "m2_manual_config" to select the mode manually:
+
+"0"  -  B-key: PCIe x2, USB 2.0
+        E-key: USB 2.0
+"1"  -  B-key: PCIe, USB 2.0
+        E-key: PCIe, USB 2.0
+"2"  -  B-key: USB 3.0,
+        E-key: PCIe, USB 2.0
diff --git a/doc/board/sifive/index.rst b/doc/board/sifive/index.rst
new file mode 100644
index 00000000000..a43937a3e0a
--- /dev/null
+++ b/doc/board/sifive/index.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+SiFive
+======
+
+.. toctree::
+   :maxdepth: 2
+
+   unleashed
+   unmatched
diff --git a/doc/board/sifive/unleashed.rst b/doc/board/sifive/unleashed.rst
new file mode 100644
index 00000000000..ce38b701d78
--- /dev/null
+++ b/doc/board/sifive/unleashed.rst
@@ -0,0 +1,577 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+HiFive Unleashed
+================
+
+FU540-C000 RISC-V SoC
+---------------------
+The FU540-C000 is the world’s first 4+1 64-bit RISC-V SoC from SiFive.
+
+The HiFive Unleashed development platform is based on FU540-C000 and capable
+of running Linux.
+
+Mainline support
+----------------
+
+The support for following drivers are already enabled:
+
+1. SiFive UART Driver.
+2. SiFive PRCI Driver for clock.
+3. Cadence MACB ethernet driver for networking support.
+4. SiFive SPI Driver.
+5. MMC SPI Driver for MMC/SD support.
+
+Booting from MMC using FSBL
+---------------------------
+
+Building
+~~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+3. make sifive_fu540_defconfig
+4. make
+
+Flashing
+~~~~~~~~
+
+The current U-Boot port is supported in S-mode only and loaded from DRAM.
+
+A prior stage M-mode firmware/bootloader (e.g OpenSBI) is required to
+boot the u-boot.bin in S-mode and provide M-mode runtime services.
+
+Currently, the u-boot.bin is used as a payload of the OpenSBI FW_PAYLOAD
+firmware. We need to compile OpenSBI with below command:
+
+.. code-block:: none
+
+	make PLATFORM=generic FW_PAYLOAD_PATH=<path to u-boot-dtb.bin>
+
+More detailed description of steps required to build FW_PAYLOAD firmware
+is beyond the scope of this document. Please refer OpenSBI documenation.
+(Note: OpenSBI git repo is at https://github.com/riscv/opensbi.git)
+
+Once the prior stage firmware/bootloader binary is generated, it should be
+copied to the first partition of the sdcard.
+
+.. code-block:: none
+
+    sudo dd if=<prior_stage_firmware_binary> of=/dev/disk2s1 bs=1024
+
+Booting
+~~~~~~~
+
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
+
+Sample boot log from HiFive Unleashed board
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: none
+
+   U-Boot 2019.07-00024-g350ff02f5b (Jul 22 2019 - 11:45:02 +0530)
+
+   CPU:   rv64imafdc
+   Model: SiFive HiFive Unleashed A00
+   DRAM:  8 GiB
+   MMC:   spi@10050000:mmc@0: 0
+   In:    serial@10010000
+   Out:   serial@10010000
+   Err:   serial@10010000
+   Net:   eth0: ethernet@10090000
+   Hit any key to stop autoboot:  0
+   => version
+   U-Boot 2019.07-00024-g350ff02f5b (Jul 22 2019 - 11:45:02 +0530)
+
+   riscv64-linux-gcc.br_real (Buildroot 2018.11-rc2-00003-ga0787e9) 8.2.0
+   GNU ld (GNU Binutils) 2.31.1
+   => mmc info
+   Device: spi@10050000:mmc@0
+   Manufacturer ID: 3
+   OEM: 5344
+   Name: SU08G
+   Bus Speed: 20000000
+   Mode: SD Legacy
+   Rd Block Len: 512
+   SD version 2.0
+   High Capacity: Yes
+   Capacity: 7.4 GiB
+   Bus Width: 1-bit
+   Erase Group Size: 512 Bytes
+   => mmc part
+
+   Partition Map for MMC device 0  --   Partition Type: EFI
+
+   Part    Start LBA       End LBA         Name
+           Attributes
+           Type GUID
+           Partition GUID
+     1     0x00000800      0x000107ff      "bootloader"
+           attrs:  0x0000000000000000
+           type:   2e54b353-1271-4842-806f-e436d6af6985
+           guid:   393bbd36-7111-491c-9869-ce24008f6403
+     2     0x00040800      0x00ecdfde      ""
+           attrs:  0x0000000000000000
+           type:   0fc63daf-8483-4772-8e79-3d69d8477de4
+           guid:   7fc9a949-5480-48c7-b623-04923080757f
+
+Now you can configure your networking, tftp server and use tftp boot method to
+load uImage.
+
+.. code-block:: none
+
+   => setenv ipaddr 10.206.7.133
+   => setenv netmask 255.255.252.0
+   => setenv serverip 10.206.4.143
+   => setenv gateway 10.206.4.1
+
+If you want to use a flat kernel image such as Image file
+
+.. code-block:: none
+
+   => tftpboot ${kernel_addr_r} /sifive/fu540/Image
+   ethernet@10090000: PHY present at 0
+   ethernet@10090000: Starting autonegotiation...
+   ethernet@10090000: Autonegotiation complete
+   ethernet@10090000: link up, 1000Mbps full-duplex (lpa: 0x3c00)
+   Using ethernet@10090000 device
+   TFTP from server 10.206.4.143; our IP address is 10.206.7.133
+   Filename '/sifive/fu540/Image'.
+   Load address: 0x84000000
+   Loading: #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            ##########################################
+            1.2 MiB/s
+   done
+   Bytes transferred = 8867100 (874d1c hex)
+
+Or if you want to use a compressed kernel image file such as Image.gz
+
+.. code-block:: none
+
+   => tftpboot ${kernel_addr_r} /sifive/fu540/Image.gz
+   ethernet@10090000: PHY present at 0
+   ethernet@10090000: Starting autonegotiation...
+   ethernet@10090000: Autonegotiation complete
+   ethernet@10090000: link up, 1000Mbps full-duplex (lpa: 0x3c00)
+   Using ethernet@10090000 device
+   TFTP from server 10.206.4.143; our IP address is 10.206.7.133
+   Filename '/sifive/fu540/Image.gz'.
+   Load address: 0x84000000
+   Loading: #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            ##########################################
+            1.2 MiB/s
+   done
+   Bytes transferred = 4809458 (4962f2 hex)
+
+By this time, correct kernel image is loaded and required environment variables
+are set. You can proceed to load the ramdisk and device tree from the tftp server
+as well.
+
+.. code-block:: none
+
+   => tftpboot ${ramdisk_addr_r} /sifive/fu540/uRamdisk
+   ethernet@10090000: PHY present at 0
+   ethernet@10090000: Starting autonegotiation...
+   ethernet@10090000: Autonegotiation complete
+   ethernet@10090000: link up, 1000Mbps full-duplex (lpa: 0x3c00)
+   Using ethernet@10090000 device
+   TFTP from server 10.206.4.143; our IP address is 10.206.7.133
+   Filename '/sifive/fu540/uRamdisk'.
+   Load address: 0x88300000
+   Loading: #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            #################################################################
+            ##############
+            418.9 KiB/s
+   done
+   Bytes transferred = 2398272 (249840 hex)
+   => tftpboot ${fdt_addr_r} /sifive/fu540/hifive-unleashed-a00.dtb
+   ethernet@10090000: PHY present at 0
+   ethernet@10090000: Starting autonegotiation...
+   ethernet@10090000: Autonegotiation complete
+   ethernet@10090000: link up, 1000Mbps full-duplex (lpa: 0x7c00)
+   Using ethernet@10090000 device
+   TFTP from server 10.206.4.143; our IP address is 10.206.7.133
+   Filename '/sifive/fu540/hifive-unleashed-a00.dtb'.
+   Load address: 0x88000000
+   Loading: ##
+            1000 Bytes/s
+   done
+   Bytes transferred = 5614 (15ee hex)
+   => setenv bootargs "root=/dev/ram rw console=ttySIF0 ip=dhcp earlycon=sbi"
+   => booti ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r}
+   ## Loading init Ramdisk from Legacy Image at 88300000 ...
+      Image Name:   Linux RootFS
+      Image Type:   RISC-V Linux RAMDisk Image (uncompressed)
+      Data Size:    2398208 Bytes = 2.3 MiB
+      Load Address: 00000000
+      Entry Point:  00000000
+      Verifying Checksum ... OK
+   ## Flattened Device Tree blob at 88000000
+      Booting using the fdt blob at 0x88000000
+      Using Device Tree in place at 0000000088000000, end 00000000880045ed
+
+   Starting kernel ...
+
+   [    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
+   [    0.000000] Linux version 5.3.0-rc1-00003-g460ac558152f (anup@anup-lab-machine) (gcc version 8.2.0 (Buildroot 2018.11-rc2-00003-ga0787e9)) #6 SMP Mon Jul 22 10:01:01 IST 2019
+   [    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
+   [    0.000000] printk: bootconsole [sbi0] enabled
+   [    0.000000] Initial ramdisk at: 0x(____ptrval____) (2398208 bytes)
+   [    0.000000] Zone ranges:
+   [    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000ffffffff]
+   [    0.000000]   Normal   [mem 0x0000000100000000-0x000000027fffffff]
+   [    0.000000] Movable zone start for each node
+   [    0.000000] Early memory node ranges
+   [    0.000000]   node   0: [mem 0x0000000080200000-0x000000027fffffff]
+   [    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x000000027fffffff]
+   [    0.000000] software IO TLB: mapped [mem 0xfbfff000-0xfffff000] (64MB)
+   [    0.000000] CPU with hartid=0 is not available
+   [    0.000000] CPU with hartid=0 is not available
+   [    0.000000] elf_hwcap is 0x112d
+   [    0.000000] percpu: Embedded 18 pages/cpu s34584 r8192 d30952 u73728
+   [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 2067975
+   [    0.000000] Kernel command line: root=/dev/ram rw console=ttySIF0 ip=dhcp earlycon=sbi
+   [    0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
+   [    0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
+   [    0.000000] Sorting __ex_table...
+   [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+   [    0.000000] Memory: 8182308K/8386560K available (5916K kernel code, 368K rwdata, 1840K rodata, 213K init, 304K bss, 204252K reserved, 0K cma-reserved)
+   [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
+   [    0.000000] rcu: Hierarchical RCU implementation.
+   [    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
+   [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
+   [    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
+   [    0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0
+   [    0.000000] plic: mapped 53 interrupts with 4 handlers for 9 contexts.
+   [    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1]
+   [    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 3526361616960 ns
+   [    0.000006] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
+   [    0.008559] Console: colour dummy device 80x25
+   [    0.012989] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=4000)
+   [    0.023104] pid_max: default: 32768 minimum: 301
+   [    0.028273] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
+   [    0.035765] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
+   [    0.045307] rcu: Hierarchical SRCU implementation.
+   [    0.049875] smp: Bringing up secondary CPUs ...
+   [    0.055729] smp: Brought up 1 node, 4 CPUs
+   [    0.060599] devtmpfs: initialized
+   [    0.064819] random: get_random_u32 called from bucket_table_alloc.isra.10+0x4e/0x160 with crng_init=0
+   [    0.073720] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
+   [    0.083176] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
+   [    0.090721] NET: Registered protocol family 16
+   [    0.106319] vgaarb: loaded
+   [    0.108670] SCSI subsystem initialized
+   [    0.112515] usbcore: registered new interface driver usbfs
+   [    0.117758] usbcore: registered new interface driver hub
+   [    0.123167] usbcore: registered new device driver usb
+   [    0.128905] clocksource: Switched to clocksource riscv_clocksource
+   [    0.141239] NET: Registered protocol family 2
+   [    0.145506] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear)
+   [    0.153754] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear)
+   [    0.163466] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear)
+   [    0.173468] TCP: Hash tables configured (established 65536 bind 65536)
+   [    0.179739] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear)
+   [    0.186627] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear)
+   [    0.194117] NET: Registered protocol family 1
+   [    0.198417] RPC: Registered named UNIX socket transport module.
+   [    0.203887] RPC: Registered udp transport module.
+   [    0.208664] RPC: Registered tcp transport module.
+   [    0.213429] RPC: Registered tcp NFSv4.1 backchannel transport module.
+   [    0.219944] PCI: CLS 0 bytes, default 64
+   [    0.224170] Unpacking initramfs...
+   [    0.262347] Freeing initrd memory: 2336K
+   [    0.266531] workingset: timestamp_bits=62 max_order=21 bucket_order=0
+   [    0.280406] NFS: Registering the id_resolver key type
+   [    0.284798] Key type id_resolver registered
+   [    0.289048] Key type id_legacy registered
+   [    0.293114] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
+   [    0.300262] NET: Registered protocol family 38
+   [    0.304432] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
+   [    0.311862] io scheduler mq-deadline registered
+   [    0.316461] io scheduler kyber registered
+   [    0.356421] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+   [    0.363004] 10010000.serial: ttySIF0 at MMIO 0x10010000 (irq = 4, base_baud = 0) is a SiFive UART v0
+   [    0.371468] printk: console [ttySIF0] enabled
+   [    0.371468] printk: console [ttySIF0] enabled
+   [    0.380223] printk: bootconsole [sbi0] disabled
+   [    0.380223] printk: bootconsole [sbi0] disabled
+   [    0.389589] 10011000.serial: ttySIF1 at MMIO 0x10011000 (irq = 1, base_baud = 0) is a SiFive UART v0
+   [    0.398680] [drm] radeon kernel modesetting enabled.
+   [    0.412395] loop: module loaded
+   [    0.415214] sifive_spi 10040000.spi: mapped; irq=3, cs=1
+   [    0.420628] sifive_spi 10050000.spi: mapped; irq=5, cs=1
+   [    0.425897] libphy: Fixed MDIO Bus: probed
+   [    0.429964] macb 10090000.ethernet: Registered clk switch 'sifive-gemgxl-mgmt'
+   [    0.436743] macb: GEM doesn't support hardware ptp.
+   [    0.441621] libphy: MACB_mii_bus: probed
+   [    0.601316] Microsemi VSC8541 SyncE 10090000.ethernet-ffffffff:00: attached PHY driver [Microsemi VSC8541 SyncE] (mii_bus:phy_addr=10090000.ethernet-ffffffff:00, irq=POLL)
+   [    0.615857] macb 10090000.ethernet eth0: Cadence GEM rev 0x10070109 at 0x10090000 irq 6 (70:b3:d5:92:f2:f3)
+   [    0.625634] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
+   [    0.631381] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
+   [    0.637382] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
+   [    0.643799] ehci-pci: EHCI PCI platform driver
+   [    0.648261] ehci-platform: EHCI generic platform driver
+   [    0.653497] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
+   [    0.659599] ohci-pci: OHCI PCI platform driver
+   [    0.664055] ohci-platform: OHCI generic platform driver
+   [    0.669448] usbcore: registered new interface driver uas
+   [    0.674575] usbcore: registered new interface driver usb-storage
+   [    0.680642] mousedev: PS/2 mouse device common for all mice
+   [    0.709493] mmc_spi spi1.0: SD/MMC host mmc0, no DMA, no WP, no poweroff, cd polling
+   [    0.716615] usbcore: registered new interface driver usbhid
+   [    0.722023] usbhid: USB HID core driver
+   [    0.726738] NET: Registered protocol family 10
+   [    0.731359] Segment Routing with IPv6
+   [    0.734332] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
+   [    0.740687] NET: Registered protocol family 17
+   [    0.744660] Key type dns_resolver registered
+   [    0.806775] mmc0: host does not support reading read-only switch, assuming write-enable
+   [    0.814020] mmc0: new SDHC card on SPI
+   [    0.820137] mmcblk0: mmc0:0000 SU08G 7.40 GiB
+   [    0.850220]  mmcblk0: p1 p2
+   [    3.821524] macb 10090000.ethernet eth0: link up (1000/Full)
+   [    3.828938] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
+   [    3.848919] Sending DHCP requests .., OK
+   [    6.252076] IP-Config: Got DHCP answer from 10.206.4.1, my address is 10.206.7.133
+   [    6.259624] IP-Config: Complete:
+   [    6.262831]      device=eth0, hwaddr=70:b3:d5:92:f2:f3, ipaddr=10.206.7.133, mask=255.255.252.0, gw=10.206.4.1
+   [    6.272809]      host=dhcp-10-206-7-133, domain=sdcorp.global.sandisk.com, nis-domain=(none)
+   [    6.281228]      bootserver=10.206.126.11, rootserver=10.206.126.11, rootpath=
+   [    6.281232]      nameserver0=10.86.1.1, nameserver1=10.86.2.1
+   [    6.294179]      ntpserver0=10.86.1.1, ntpserver1=10.86.2.1
+   [    6.301026] Freeing unused kernel memory: 212K
+   [    6.304683] This architecture does not have kernel memory protection.
+   [    6.311121] Run /init as init process
+              _  _
+             | ||_|
+             | | _ ____  _   _  _  _
+             | || |  _ \| | | |\ \/ /
+             | || | | | | |_| |/    \
+             |_||_|_| |_|\____|\_/\_/
+
+                  Busybox Rootfs
+
+   Please press Enter to activate this console.
+   / #
+
+Booting from MMC using U-Boot SPL
+---------------------------------
+
+Building
+~~~~~~~~
+
+Before building U-Boot SPL, OpenSBI must be built first. OpenSBI can be
+cloned and built for FU540 as below:
+
+.. code-block:: console
+
+	git clone https://github.com/riscv/opensbi.git
+	cd opensbi
+	make PLATFORM=generic
+	export OPENSBI=<path to opensbi/build/platform/generic/firmware/fw_dynamic.bin>
+
+Now build the U-Boot SPL and U-Boot proper
+
+.. code-block:: console
+
+	cd <U-Boot-dir>
+	make sifive_fu540_defconfig
+	make
+
+This will generate spl/u-boot-spl.bin and FIT image (u-boot.itb)
+
+
+Flashing
+~~~~~~~~
+
+ZSBL loads the U-Boot SPL (u-boot-spl.bin) from a partition with GUID type
+5B193300-FC78-40CD-8002-E86C45580B47
+
+U-Boot SPL expects a U-Boot FIT image (u-boot.itb) from a partition with GUID
+type 2E54B353-1271-4842-806F-E436D6AF6985
+
+FIT image (u-boot.itb) is a combination of fw_dynamic.bin, u-boot-nodtb.bin and
+device tree blob (hifive-unleashed-a00.dtb)
+
+Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch)
+
+.. code-block:: bash
+
+	sudo sgdisk --clear \
+	  --set-alignment=2 \
+	  --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \
+	  --new=2:2082:10273 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \
+	  --new=3:10274: --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \
+	  /dev/sdX
+
+Program the SD card
+
+.. code-block:: bash
+
+	sudo dd if=spl/u-boot-spl.bin of=/dev/sdX seek=34
+	sudo dd if=u-boot.itb of=/dev/sdX seek=2082
+
+Booting
+~~~~~~~
+
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
+
+Sample boot log from HiFive Unleashed board
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: none
+
+	U-Boot SPL 2020.04-rc2-00109-g63efc7e07e-dirty (Apr 30 2020 - 13:52:36 +0530)
+	Trying to boot from MMC1
+
+
+	U-Boot 2020.04-rc2-00109-g63efc7e07e-dirty (Apr 30 2020 - 13:52:36 +0530)
+
+	CPU:   rv64imafdc
+	Model: SiFive HiFive Unleashed A00
+	DRAM:  8 GiB
+	MMC:   spi@10050000:mmc@0: 0
+	In:    serial@10010000
+	Out:   serial@10010000
+	Err:   serial@10010000
+	Net:   eth0: ethernet@10090000
+	Hit any key to stop autoboot:  0
+	=> version
+	U-Boot 2020.04-rc2-00109-g63efc7e07e-dirty (Apr 30 2020 - 13:52:36 +0530)
+
+	riscv64-unknown-linux-gnu-gcc (crosstool-NG 1.24.0.37-3f461da) 9.2.0
+	GNU ld (crosstool-NG 1.24.0.37-3f461da) 2.32
+	=> mmc info
+	Device: spi@10050000:mmc@0
+	Manufacturer ID: 3
+	OEM: 5344
+	Name: SC16G
+	Bus Speed: 20000000
+	Mode: SD Legacy
+	Rd Block Len: 512
+	SD version 2.0
+	High Capacity: Yes
+	Capacity: 14.8 GiB
+	Bus Width: 1-bit
+	Erase Group Size: 512 Bytes
+	=> mmc part
+
+	Partition Map for MMC device 0  --   Partition Type: EFI
+
+	Part    Start LBA       End LBA         Name
+	Attributes
+	Type GUID
+	Partition GUID
+	1     0x00000022      0x00000821      "loader1"
+	attrs:  0x0000000000000000
+	type:   5b193300-fc78-40cd-8002-e86c45580b47
+	guid:   66e2b5d2-74db-4df8-ad6f-694b3617f87f
+	2     0x00000822      0x00002821      "loader2"
+	attrs:  0x0000000000000000
+	type:   2e54b353-1271-4842-806f-e436d6af6985
+	guid:   8befaeaf-bca0-435d-b002-e201f37c0a2f
+	3     0x00002822      0x01dacbde      "rootfs"
+	attrs:  0x0000000000000000
+	type:   0fc63daf-8483-4772-8e79-3d69d8477de4
+	type:   linux
+	guid:   9faa81b6-39b1-4418-af5e-89c48f29c20d
+
+Booting from SPI
+----------------
+
+Use Building steps from "Booting from MMC using U-Boot SPL" section.
+
+Partition the SPI in Linux via mtdblock. (Require to boot the board in
+SD boot mode by enabling MTD block in Linux)
+
+Use prebuilt image from here [1], which support to partition the SPI flash.
+
+.. code-block:: none
+
+  # sgdisk --clear \
+  > --set-alignment=2 \
+  > --new=1:40:2087 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \
+  > --new=2:2088:10279 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \
+  > --new=3:10536:65494 --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \
+  > /dev/mtdblock0
+
+Program the SPI (Require to boot the board in SD boot mode)
+
+Execute below steps on U-Boot proper,
+
+.. code-block:: none
+
+  tftpboot $kernel_addr_r u-boot-spl.bin
+  sf erase 0x5000 $filesize
+  sf write $kernel_addr_r 0x5000 $filesize
+
+  tftpboot $kernel_addr_r u-boot.itb
+  sf erase 0x105000 $filesize
+  sf write $kernel_addr_r 0x105000 $filesize
+
+Power off the board
+
+Change DIP switches MSEL[3:0] are set to 0110
+
+Power up the board.
+
+[1] https://github.com/amarula/bsp-sifive
diff --git a/doc/board/sifive/unmatched.rst b/doc/board/sifive/unmatched.rst
new file mode 100644
index 00000000000..c515949066f
--- /dev/null
+++ b/doc/board/sifive/unmatched.rst
@@ -0,0 +1,572 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+HiFive Unmatched
+================
+
+FU740-C000 RISC-V SoC
+---------------------
+The FU740-C000 is a 4+1 64-bit RISC-V core SoC from SiFive.
+
+The HiFive Unmatched development platform is based on FU740-C000 and capable
+of running Linux.
+
+Mainline support
+----------------
+The support for following drivers are already enabled:
+
+1. SiFive UART Driver.
+2. SiFive PRCI Driver for clock.
+3. Cadence MACB ethernet driver for networking support.
+4. SiFive SPI Driver.
+5. MMC SPI Driver for MMC/SD support.
+
+Booting from micro SD card using U-Boot SPL
+-------------------------------------------
+
+Booting from an SD card requires that the boot mode selection DIP switches
+MSEL[3:0] are set to 1011.
+
+Building
+--------
+
+Before building U-Boot SPL, OpenSBI must be built first. OpenSBI can be
+cloned and built for FU740 as below:
+
+.. code-block:: console
+
+	git clone https://github.com/riscv/opensbi.git
+	cd opensbi
+	make PLATFORM=generic
+	export OPENSBI=<path to opensbi/build/platform/generic/firmware/fw_dynamic.bin>
+
+Now build the U-Boot SPL and U-Boot proper
+
+.. code-block:: console
+
+	cd <U-Boot-dir>
+	make sifive_unmatched_defconfig
+	make
+
+This will generate spl/u-boot-spl.bin and u-boot.itb
+
+
+Flashing
+--------
+
+ZSBL loads the U-Boot SPL (u-boot-spl.bin) from a partition with GUID type
+5B193300-FC78-40CD-8002-E86C45580B47
+
+With the default configuration U-Boot SPL expects u-boot.itb starting at sector
+2082 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x822). It is recommended to use a
+partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985 for storing
+main U-Boot.
+
+u-boot.itb is a combination of fw_dynamic.bin, u-boot-nodtb.bin and
+device tree blob (hifive-unmatched-a00.dtb)
+
+Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch)
+
+.. code-block:: bash
+
+	sudo sgdisk -g --clear -a 1 \
+	  --new=1:34:2081         --change-name=1:spl --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \
+	  --new=2:2082:10273      --change-name=2:uboot  --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \
+	  --new=3:16384:282623    --change-name=3:boot --typecode=3:0x0700 \
+	  --new=4:286720:13918207 --change-name=4:root --typecode=4:0x8300 \
+	  /dev/sdX
+
+Copy linux Image.gz and hifive-unmatched-a00.dtb to boot partition
+
+.. code-block:: bash
+
+	sudo mkfs.vfat /dev/sdX3
+	sudo mkfs.ext4 /dev/sdX4
+
+	sudo mount /dev/sdX3 /media/sdX3
+	sudo cp Image.gz hifive-unmatched-a00.dtb /media/sdX3/
+
+Program the SD card
+
+.. code-block:: bash
+
+	sudo dd if=spl/u-boot-spl.bin of=/dev/sdX seek=34
+	sudo dd if=u-boot.itb of=/dev/sdX seek=2082
+
+Booting
+-------
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
+
+
+Loading the kernel and dtb
+
+.. code-block:: none
+
+	fatload mmc 0:3 ${kernel_addr_r} Image.gz
+	fatload mmc 0:3 ${fdt_addr_r} hifive-unmatched-a00.dtb
+	booti ${kernel_addr_r} - ${fdt_addr_r}
+
+
+Sample boot log from HiFive Unmatched board
+-------------------------------------------
+
+.. code-block:: none
+
+	U-Boot SPL 2021.04-rc4-00009-g7d70643cc3-dirty (Mar 16 2021 - 18:03:14 +0800)
+	Trying to boot from MMC1
+
+	U-Boot 2021.04-rc4-00009-g7d70643cc3-dirty (Mar 16 2021 - 18:03:14 +0800)
+
+	CPU:   rv64imafdc
+	Model: SiFive HiFive Unmatched A00
+	DRAM:  16 GiB
+	MMC:   spi@10050000:mmc@0: 0
+	In:    serial@10010000
+	Out:   serial@10010000
+	Err:   serial@10010000
+	Model: SiFive HiFive Unmatched A00
+	Net:
+	Error: ethernet@10090000 address not set.
+	No ethernet found.
+
+	Hit any key to stop autoboot:  0
+	PCIe Link up, Gen1
+
+	Device 0: Vendor: 0x126f Rev: S1111A0L Prod: AA000000000000001995
+		    Type: Hard Disk
+		    Capacity: 488386.3 MB = 476.9 GB (1000215216 x 512)
+	... is now current device
+	Scanning nvme 0:1...
+	libfdt fdt_check_header(): FDT_ERR_BADMAGIC
+	Scanning disk mmc@0.blk...
+	** Unrecognized filesystem type **
+	** Unrecognized filesystem type **
+	Scanning disk nvme#0.blk#0...
+	Found 8 disks
+	No EFI system partition
+
+	Error: ethernet@10090000 address not set.
+	BootOrder not defined
+	EFI boot manager: Cannot load any image
+	starting USB...
+	Bus xhci_pci: Register 4000840 NbrPorts 4
+	Starting the controller
+	USB XHCI 1.00
+	scanning bus xhci_pci for devices... 3 USB Device(s) found
+	       scanning usb for storage devices... 0 Storage Device(s) found
+
+	Device 0: unknown device
+	switch to partitions #0, OK
+	mmc0 is current device
+	Scanning mmc 0:3...
+	Found /extlinux/extlinux.conf
+	Retrieving file: /extlinux/extlinux.conf
+	205 bytes read in 9 ms (21.5 KiB/s)
+	1:      OpenEmbedded-SiFive-HiFive-Unmatched
+	Retrieving file: /Image.gz
+	7225919 bytes read in 4734 ms (1.5 MiB/s)
+	append: root=/dev/mmcblk0p4 rootfstype=ext4 rootwait console=ttySIF0,115200 earlycon=sbi
+	Retrieving file: /hifive-unmatched-a00.dtb
+	10445 bytes read in 13 ms (784.2 KiB/s)
+	   Uncompressing Kernel Image
+	Moving Image from 0x84000000 to 0x80200000, end=81629000
+	## Flattened Device Tree blob at 88000000
+	   Booting using the fdt blob at 0x88000000
+	   Using Device Tree in place at 0000000088000000, end 00000000880058cc
+
+	Starting kernel ...
+
+	[    0.000000] Linux version 5.10.15 (oe-user@oe-host) (riscv64-oe-linux-gcc (GCC) 10.2.0, GNU ld (GNU Binutils) 2.35.0.201
+	[    0.000000] OF: fdt: Ignoring memory range 0x80000000 - 0x80200000
+	[    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
+	[    0.000000] printk: bootconsole [sbi0] enabled
+	[    0.000000] efi: UEFI not found.
+	[    0.000000] Zone ranges:
+	[    0.000000]   DMA32    [mem 0x0000000080200000-0x00000000ffffffff]
+	[    0.000000]   Normal   [mem 0x0000000100000000-0x000000027fffffff]
+	[    0.000000] Movable zone start for each node
+	[    0.000000] Early memory node ranges
+	[    0.000000]   node   0: [mem 0x0000000080200000-0x000000027fffffff]
+	[    0.000000] Zeroed struct page in unavailable ranges: 512 pages
+	[    0.000000] Initmem setup node 0 [mem 0x0000000080200000-0x000000027fffffff]
+	[    0.000000] software IO TLB: mapped [mem 0x00000000fbfff000-0x00000000fffff000] (64MB)
+	[    0.000000] SBI specification v0.3 detected
+	[    0.000000] SBI implementation ID=0x1 Version=0x9
+	[    0.000000] SBI v0.2 TIME extension detected
+	[    0.000000] SBI v0.2 IPI extension detected
+	[    0.000000] SBI v0.2 RFENCE extension detected
+	[    0.000000] SBI v0.2 HSM extension detected
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] riscv: ISA extensions acdfim
+	[    0.000000] riscv: ELF capabilities acdfim
+	[    0.000000] percpu: Embedded 26 pages/cpu s66904 r8192 d31400 u106496
+	[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 2067975
+	[    0.000000] Kernel command line: root=/dev/mmcblk0p4 rootfstype=ext4 rootwait console=ttySIF0,115200 earlycon=sbi
+	[    0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)
+	[    0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
+	[    0.000000] Sorting __ex_table...
+	[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+	[    0.000000] Memory: 8155880K/8386560K available (8490K kernel code, 5515K rwdata, 4096K rodata, 285K init, 383K bss, 23)
+	[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
+	[    0.000000] rcu: Hierarchical RCU implementation.
+	[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
+	[    0.000000]  Tracing variant of Tasks RCU enabled.
+	[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
+	[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
+	[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] riscv-intc: unable to find hart id for /cpus/cpu@0/interrupt-controller
+	[    0.000000] riscv-intc: 64 local interrupts mapped
+	[    0.000000] plic: interrupt-controller@c000000: mapped 69 interrupts with 4 handlers for 9 contexts.
+	[    0.000000] random: get_random_bytes called from 0xffffffe000002a6a with crng_init=0
+	[    0.000000] riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [1]
+	[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 352636161696s
+	[    0.000007] sched_clock: 64 bits at 1000kHz, resolution 1000ns, wraps every 2199023255500ns
+	[    0.008626] Console: colour dummy device 80x25
+	[    0.013049] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=4000)
+	[    0.023115] pid_max: default: 32768 minimum: 301
+	[    0.028423] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
+	[    0.035919] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)
+	[    0.045957] rcu: Hierarchical SRCU implementation.
+	[    0.050393] EFI services will not be available.
+	[    0.055132] smp: Bringing up secondary CPUs ...
+	[    0.061824] smp: Brought up 1 node, 4 CPUs
+	[    0.067458] devtmpfs: initialized
+	[    0.072700] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
+	[    0.081789] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
+	[    0.089738] NET: Registered protocol family 16
+	[    0.093999] thermal_sys: Registered thermal governor 'step_wise'
+	[    0.109208] iommu: Default domain type: Translated
+	[    0.119694] vgaarb: loaded
+	[    0.122571] SCSI subsystem initialized
+	[    0.126499] usbcore: registered new interface driver usbfs
+	[    0.131686] usbcore: registered new interface driver hub
+	[    0.137071] usbcore: registered new device driver usb
+	[    0.142286] EDAC MC: Ver: 3.0.0
+	[    0.145760] Advanced Linux Sound Architecture Driver Initialized.
+	[    0.152205] clocksource: Switched to clocksource riscv_clocksource
+	[    1.046286] VFS: Disk quotas dquot_6.6.0
+	[    1.049651] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
+	[    1.062844] NET: Registered protocol family 2
+	[    1.067172] tcp_listen_portaddr_hash hash table entries: 4096 (order: 4, 65536 bytes, linear)
+	[    1.075455] TCP established hash table entries: 65536 (order: 7, 524288 bytes, linear)
+	[    1.085428] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes, linear)
+	[    1.096548] TCP: Hash tables configured (established 65536 bind 65536)
+	[    1.103043] UDP hash table entries: 4096 (order: 5, 131072 bytes, linear)
+	[    1.109879] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes, linear)
+	[    1.117413] NET: Registered protocol family 1
+	[    1.121881] RPC: Registered named UNIX socket transport module.
+	[    1.127139] RPC: Registered udp transport module.
+	[    1.131901] RPC: Registered tcp transport module.
+	[    1.136677] RPC: Registered tcp NFSv4.1 backchannel transport module.
+	[    1.143194] PCI: CLS 0 bytes, default 64
+	[    1.148359] Initialise system trusted keyrings
+	[    1.152364] workingset: timestamp_bits=62 max_order=21 bucket_order=0
+	[    1.165382] NFS: Registering the id_resolver key type
+	[    1.169781] Key type id_resolver registered
+	[    1.174011] Key type id_legacy registered
+	[    1.178179] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
+	[    1.184874] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
+	[    1.192453] 9p: Installing v9fs 9p2000 file system support
+	[    1.198116] NET: Registered protocol family 38
+	[    1.201886] Key type asymmetric registered
+	[    1.206046] Asymmetric key parser 'x509' registered
+	[    1.211029] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
+	[    1.218468] io scheduler mq-deadline registered
+	[    1.223072] io scheduler kyber registered
+	[    1.228803] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
+	[    1.235017] fu740-pcie e00000000.pcie: FPGA PCIE PROBE
+	[    1.281706] fu740-pcie e00000000.pcie: PCIE-PERSTN is GPIO 504
+	[    1.286922] fu740-pcie e00000000.pcie: PWREN is GPIO 501
+	[    1.292377] fu740-pcie e00000000.pcie: host bridge /soc/pcie@e00000000 ranges:
+	[    1.299603] fu740-pcie e00000000.pcie:       IO 0x0060080000..0x006008ffff -> 0x0060080000
+	[    1.307922] fu740-pcie e00000000.pcie:      MEM 0x0060090000..0x0070ffffff -> 0x0060090000
+	[    1.316244] fu740-pcie e00000000.pcie:      MEM 0x2000000000..0x3fffffffff -> 0x2000000000
+	[    1.432223] fu740-pcie e00000000.pcie: PWREN enabling
+	[    1.436607] fu740-pcie e00000000.pcie: PWREN valid
+	[    1.560226] fu740-pcie e00000000.pcie: invalid resource
+	[    1.664802] fu740-pcie e00000000.pcie: Link up
+	[    1.768582] fu740-pcie e00000000.pcie: Link up
+	[    1.872369] fu740-pcie e00000000.pcie: Link up
+	[    1.876116] fu740-pcie e00000000.pcie: Link up, Gen3
+	[    1.881352] fu740-pcie e00000000.pcie: PCI host bridge to bus 0000:00
+	[    1.887700] pci_bus 0000:00: root bus resource [bus 00-ff]
+	[    1.893247] pci_bus 0000:00: root bus resource [io  0x0000-0xffff] (bus address [0x60080000-0x6008ffff])
+	[    1.902807] pci_bus 0000:00: root bus resource [mem 0x60090000-0x70ffffff]
+	[    1.909748] pci_bus 0000:00: root bus resource [mem 0x2000000000-0x3fffffffff pref]
+	[    1.917517] pci 0000:00:00.0: [f15e:0000] type 01 class 0x060400
+	[    1.923569] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff]
+	[    1.929902] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]
+	[    1.936723] pci 0000:00:00.0: supports D1
+	[    1.940755] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
+	[    1.947619] pci 0000:01:00.0: [1b21:2824] type 01 class 0x060400
+	[    1.953052] pci 0000:01:00.0: enabling Extended Tags
+	[    1.958165] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
+	[    1.976890] pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    1.984425] pci 0000:02:00.0: [1b21:2824] type 01 class 0x060400
+	[    1.990396] pci 0000:02:00.0: enabling Extended Tags
+	[    1.995509] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
+	[    2.001938] pci 0000:02:02.0: [1b21:2824] type 01 class 0x060400
+	[    2.007682] pci 0000:02:02.0: enabling Extended Tags
+	[    2.012793] pci 0000:02:02.0: PME# supported from D0 D3hot D3cold
+	[    2.019167] pci 0000:02:03.0: [1b21:2824] type 01 class 0x060400
+	[    2.024966] pci 0000:02:03.0: enabling Extended Tags
+	[    2.030075] pci 0000:02:03.0: PME# supported from D0 D3hot D3cold
+	[    2.036468] pci 0000:02:04.0: [1b21:2824] type 01 class 0x060400
+	[    2.042250] pci 0000:02:04.0: enabling Extended Tags
+	[    2.047359] pci 0000:02:04.0: PME# supported from D0 D3hot D3cold
+	[    2.053811] pci 0000:02:08.0: [1b21:2824] type 01 class 0x060400
+	[    2.059534] pci 0000:02:08.0: enabling Extended Tags
+	[    2.064647] pci 0000:02:08.0: PME# supported from D0 D3hot D3cold
+	[    2.071499] pci 0000:02:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.078837] pci 0000:02:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.086911] pci 0000:02:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.094987] pci 0000:02:04.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.103075] pci 0000:02:08.0: bridge configuration invalid ([bus 00-00]), reconfiguring
+	[    2.111901] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03
+	[    2.118031] pci 0000:04:00.0: [1b21:1142] type 00 class 0x0c0330
+	[    2.123968] pci 0000:04:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
+	[    2.131038] pci 0000:04:00.0: PME# supported from D3cold
+	[    2.148888] pci_bus 0000:04: busn_res: [bus 04-ff] end is updated to 04
+	[    2.155588] pci_bus 0000:05: busn_res: [bus 05-ff] end is updated to 05
+	[    2.162286] pci_bus 0000:06: busn_res: [bus 06-ff] end is updated to 06
+	[    2.168408] pci 0000:07:00.0: [126f:2263] type 00 class 0x010802
+	[    2.174351] pci 0000:07:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit]
+	[    2.192890] pci_bus 0000:07: busn_res: [bus 07-ff] end is updated to 07
+	[    2.198837] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 07
+	[    2.205522] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 07
+	[    2.212241] pci 0000:00:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff]
+	[    2.219067] pci 0000:00:00.0: BAR 14: assigned [mem 0x60200000-0x603fffff]
+	[    2.226010] pci 0000:00:00.0: BAR 6: assigned [mem 0x60090000-0x6009ffff pref]
+	[    2.233308] pci 0000:01:00.0: BAR 14: assigned [mem 0x60200000-0x603fffff]
+	[    2.240259] pci 0000:02:02.0: BAR 14: assigned [mem 0x60200000-0x602fffff]
+	[    2.247203] pci 0000:02:08.0: BAR 14: assigned [mem 0x60300000-0x603fffff]
+	[    2.254150] pci 0000:02:00.0: PCI bridge to [bus 03]
+	[    2.259217] pci 0000:04:00.0: BAR 0: assigned [mem 0x60200000-0x60207fff 64bit]
+	[    2.266594] pci 0000:02:02.0: PCI bridge to [bus 04]
+	[    2.271615] pci 0000:02:02.0:   bridge window [mem 0x60200000-0x602fffff]
+	[    2.278485] pci 0000:02:03.0: PCI bridge to [bus 05]
+	[    2.283529] pci 0000:02:04.0: PCI bridge to [bus 06]
+	[    2.288572] pci 0000:07:00.0: BAR 0: assigned [mem 0x60300000-0x60303fff 64bit]
+	[    2.295952] pci 0000:02:08.0: PCI bridge to [bus 07]
+	[    2.300973] pci 0000:02:08.0:   bridge window [mem 0x60300000-0x603fffff]
+	[    2.307842] pci 0000:01:00.0: PCI bridge to [bus 02-07]
+	[    2.313133] pci 0000:01:00.0:   bridge window [mem 0x60200000-0x603fffff]
+	[    2.320009] pci 0000:00:00.0: PCI bridge to [bus 01-07]
+	[    2.325288] pci 0000:00:00.0:   bridge window [mem 0x60200000-0x603fffff]
+	[    2.332808] pcieport 0000:00:00.0: AER: enabled with IRQ 51
+	[    2.337946] pcieport 0000:01:00.0: enabling device (0000 -> 0002)
+	[    2.344786] pcieport 0000:02:02.0: enabling device (0000 -> 0002)
+	[    2.351328] pcieport 0000:02:08.0: enabling device (0000 -> 0002)
+	[    2.357091] pci 0000:04:00.0: enabling device (0000 -> 0002)
+	[    2.362751] switchtec: loaded.
+	[    2.365933] L2CACHE: DataError @ 0x00000003.00964470
+	[    2.365992] L2CACHE: No. of Banks in the cache: 4
+	[    2.375414] L2CACHE: No. of ways per bank: 16
+	[    2.379846] L2CACHE: Sets per bank: 512
+	[    2.383751] L2CACHE: Bytes per cache block: 64
+	[    2.388267] L2CACHE: Index of the largest way enabled: 15
+	[    2.434865] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+	[    2.441695] 10010000.serial: ttySIF0 at MMIO 0x10010000 (irq = 1, base_baud = 115200) is a SiFive UART v0
+	[    2.450625] printk: console [ttySIF0] enabled
+	[    2.450625] printk: console [ttySIF0] enabled
+	[    2.459360] printk: bootconsole [sbi0] disabled
+	[    2.459360] printk: bootconsole [sbi0] disabled
+	[    2.468824] 10011000.serial: ttySIF1 at MMIO 0x10011000 (irq = 2, base_baud = 115200) is a SiFive UART v0
+	[    2.493853] loop: module loaded
+	[    2.526475] nvme nvme0: pci function 0000:07:00.0
+	[    2.530852] nvme 0000:07:00.0: enabling device (0000 -> 0002)
+	[    2.537716] Rounding down aligned max_sectors from 4294967295 to 4294967288
+	[    2.544470] db_root: cannot open: /etc/target
+	[    2.545926] nvme nvme0: allocated 64 MiB host memory buffer.
+	[    2.549020] sifive_spi 10040000.spi: mapped; irq=4, cs=1
+	[    2.559941] spi-nor spi0.0: is25wp256 (32768 Kbytes)
+	[    2.566431] sifive_spi 10050000.spi: mapped; irq=6, cs=1
+	[    2.566707] nvme nvme0: 4/0/0 default/read/poll queues
+	[    2.571935] libphy: Fixed MDIO Bus: probed
+	[    2.580950] macb 10090000.ethernet: Registered clk switch 'sifive-gemgxl-mgmt'
+	[    2.587536] macb 10090000.ethernet: invalid hw address, using random
+	[    2.588100]  nvme0n1: p1 p2
+	[    2.593875] BEU: Load or Store TILINK BUS ERR occurred
+	[    2.594342] libphy: MACB_mii_bus: probed
+	[    2.599312] macb 10090000.ethernet eth0: Cadence GEM rev 0x10070109 at 0x10090000 irq 7 (5e:57:b8:ab:24:4a)
+	[    2.615501] e1000e: Intel(R) PRO/1000 Network Driver
+	[    2.620251] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
+	[    2.626463] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
+	[    2.632684] ehci-pci: EHCI PCI platform driver
+	[    2.637144] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
+	[    2.643273] ohci-pci: OHCI PCI platform driver
+	[    2.647731] uhci_hcd: USB Universal Host Controller Interface driver
+	[    2.654315] xhci_hcd 0000:04:00.0: xHCI Host Controller
+	[    2.659450] xhci_hcd 0000:04:00.0: new USB bus registered, assigned bus number 1
+	[    2.807373] xhci_hcd 0000:04:00.0: hcc params 0x0200e081 hci version 0x100 quirks 0x0000000010000410
+	[    2.816609] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.10
+	[    2.824115] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
+	[    2.831312] usb usb1: Product: xHCI Host Controller
+	[    2.836174] usb usb1: Manufacturer: Linux 5.10.15 xhci-hcd
+	[    2.841652] usb usb1: SerialNumber: 0000:04:00.0
+	[    2.846639] hub 1-0:1.0: USB hub found
+	[    2.850037] hub 1-0:1.0: 2 ports detected
+	[    2.854306] xhci_hcd 0000:04:00.0: xHCI Host Controller
+	[    2.859335] xhci_hcd 0000:04:00.0: new USB bus registered, assigned bus number 2
+	[    2.866599] xhci_hcd 0000:04:00.0: Host supports USB 3.0 SuperSpeed
+	[    2.873638] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
+	[    2.881074] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003, bcdDevice= 5.10
+	[    2.889212] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
+	[    2.896422] usb usb2: Product: xHCI Host Controller
+	[    2.901282] usb usb2: Manufacturer: Linux 5.10.15 xhci-hcd
+	[    2.906752] usb usb2: SerialNumber: 0000:04:00.0
+	[    2.911671] hub 2-0:1.0: USB hub found
+	[    2.915130] hub 2-0:1.0: 2 ports detected
+	[    2.919486] usbcore: registered new interface driver usb-storage
+	[    2.925212] usbcore: registered new interface driver usbserial_generic
+	[    2.931620] usbserial: USB Serial support registered for generic
+	[    2.937771] mousedev: PS/2 mouse device common for all mice
+	[    2.943220] usbcore: registered new interface driver usbtouchscreen
+	[    2.949466] i2c /dev entries driver
+	[    2.954218] lm90 0-004c: supply vcc not found, using dummy regulator
+	[    2.961629] EDAC DEVICE0: Giving out device to module Sifive ECC Manager controller sifive_edac.0: DEV sifive_edac.0 (I)
+	[    2.997874] mmc_spi spi1.0: SD/MMC host mmc0, no DMA, no WP, no poweroff, cd polling
+	[    3.005138] ledtrig-cpu: registered to indicate activity on CPUs
+	[    3.010980] usbcore: registered new interface driver usbhid
+	[    3.016407] usbhid: USB HID core driver
+	[    3.020540] usbcore: registered new interface driver snd-usb-audio
+	[    3.027209] NET: Registered protocol family 10
+	[    3.031878] Segment Routing with IPv6
+	[    3.034864] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
+	[    3.041232] NET: Registered protocol family 17
+	[    3.045324] 9pnet: Installing 9P2000 support
+	[    3.049397] Key type dns_resolver registered
+	[    3.053786] Loading compiled-in X.509 certificates
+	[    3.059729] ALSA device list:
+	[    3.061943]   No soundcards found.
+	[    3.066057] Waiting for root device /dev/mmcblk0p4...
+	[    3.077319] mmc0: host does not support reading read-only switch, assuming write-enable
+	[    3.084564] mmc0: new SDHC card on SPI
+	[    3.089699] mmcblk0: mmc0:0000 SD32G 29.7 GiB
+	[    3.126488] GPT:Primary header thinks Alt. header is not at the end of the disk.
+	[    3.133144] GPT:13918241 != 62333951
+	[    3.136679] GPT:Alternate GPT header not at the end of the disk.
+	[    3.142673] GPT:13918241 != 62333951
+	[    3.146231] GPT: Use GNU Parted to correct GPT errors.
+	[    3.151398]  mmcblk0: p1 p2 p3 p4
+	[    3.212226] usb 1-2: new high-speed USB device number 2 using xhci_hcd
+	[    3.258310] EXT4-fs (mmcblk0p4): INFO: recovery required on readonly filesystem
+	[    3.264855] EXT4-fs (mmcblk0p4): write access will be enabled during recovery
+	[    3.458247] usb 1-2: New USB device found, idVendor=174c, idProduct=2074, bcdDevice= 0.01
+	[    3.465662] usb 1-2: New USB device strings: Mfr=2, Product=3, SerialNumber=1
+	[    3.472775] usb 1-2: Product: AS2107
+	[    3.476336] usb 1-2: Manufacturer: ASMedia
+	[    3.480419] usb 1-2: SerialNumber: USB2.0 Hub
+	[    3.533583] EXT4-fs (mmcblk0p4): recovery complete
+	[    3.543756] EXT4-fs (mmcblk0p4): mounted filesystem with ordered data mode. Opts: (null)
+	[    3.551132] VFS: Mounted root (ext4 filesystem) readonly on device 179:4.
+	[    3.554682] hub 1-2:1.0: USB hub found
+	[    3.561105] devtmpfs: mounted
+	[    3.561778] hub 1-2:1.0: 4 ports detected
+	[    3.565546] Freeing unused kernel memory: 284K
+	[    3.572964] Kernel memory protection not selected by kernel config.
+	[    3.579225] Run /sbin/init as init process
+	[    3.613136] usb 2-2: new SuperSpeed Gen 1 USB device number 2 using xhci_hcd
+	[    3.643539] usb 2-2: New USB device found, idVendor=174c, idProduct=3074, bcdDevice= 0.01
+	[    3.650948] usb 2-2: New USB device strings: Mfr=2, Product=3, SerialNumber=1
+	[    3.658072] usb 2-2: Product: AS2107
+	[    3.661630] usb 2-2: Manufacturer: ASMedia
+	[    3.665709] usb 2-2: SerialNumber: USB2.0 Hub
+	[    3.762380] hub 2-2:1.0: USB hub found
+	[    3.766074] hub 2-2:1.0: 4 ports detected
+	[    7.487226] systemd[1]: System time before build time, advancing clock.
+	[    7.788093] systemd[1]: systemd 247.2+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR -SMACK +SYSVINIT +U)
+	[    7.809694] systemd[1]: Detected architecture riscv64.
+
+	Welcome to OpenEmbedded nodistro.0!
+
+	[    7.832648] systemd[1]: Set hostname to <unmatched>.
+	[    9.397499] systemd[1]: Queued start job for default target Multi-User System.
+	[    9.408518] random: systemd: uninitialized urandom read (16 bytes read)
+	[    9.429329] systemd[1]: Created slice system-getty.slice.
+	[  OK  ] Created slice system-getty.slice.
+	[    9.440400] random: systemd: uninitialized urandom read (16 bytes read)
+	[    9.447086] systemd[1]: Created slice system-modprobe.slice.
+	[  OK  ] Created slice system-modprobe.slice.
+	[    9.458480] random: systemd: uninitialized urandom read (16 bytes read)
+	[    9.465436] systemd[1]: Created slice system-serial\x2dgetty.slice.
+	[  OK  ] Created slice system-serial\x2dgetty.slice.
+	[    9.478594] systemd[1]: Created slice User and Session Slice.
+	[  OK  ] Created slice User and Session Slice.
+	[    9.490225] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.
+	[  OK  ] Started Dispatch Password ��…ts to Console Directory Watch.
+	[    9.506407] systemd[1]: Started Forward Password Requests to Wall Directory Watch.
+	[  OK  ] Started Forward Password R��…uests to Wall Directory Watch.
+	[    9.522312] systemd[1]: Reached target Paths.
+	[  OK  ] Reached target Paths.
+	[    9.531078] systemd[1]: Reached target Remote File Systems.
+	[  OK  ] Reached target Remote File Systems.
+	[    9.542855] systemd[1]: Reached target Slices.
+	[  OK  ] Reached target Slices.
+	[    9.552712] systemd[1]: Reached target Swap.
+	[  OK  ] Reached target Swap.
+	[    9.561566] systemd[1]: Listening on initctl Compatibility Named Pipe.
+	[  OK  ] Listening on initctl Compatibility Named Pipe.
+	[    9.578686] systemd[1]: Condition check resulted in Journal Audit Socket being skipped.
+	[    9.586545] systemd[1]: Listening on Journal Socket (/dev/log).
+	[  OK  ] Listening on Journal Socket (/dev/log).
+
+	[snip]
+
+	[  OK  ] Reached target System Time Synchronized.
+	[  OK  ] Reached target Timers.
+	[  OK  ] Listening on D-Bus System Message Bus Socket.
+	[  OK  ] Reached target Sockets.
+	[  OK  ] Reached target Basic System.
+	[  OK  ] Started D-Bus System Message Bus.
+		 Starting User Login Management...
+		 Starting Permit User Sessions...
+	[  OK  ] Started Xinetd A Powerful Replacement For Inetd.
+	[  OK  ] Finished Permit User Sessions.
+	[  OK  ] Started Getty on tty1.
+	[  OK  ] Started Serial Getty on hvc0.
+	[  OK  ] Started Serial Getty on ttySIF0.
+	[  OK  ] Reached target Login Prompts.
+	[  OK  ] Started User Login Management.
+	[  OK  ] Reached target Multi-User System.
+		 Starting Update UTMP about System Runlevel Changes...
+	[  OK  ] Finished Update UTMP about System Runlevel Changes.
+
+	OpenEmbedded nodistro.0 unmatched hvc0
+
+	unmatched login:
+	OpenEmbedded nodistro.0 unmatched ttySIF0
+
+	unmatched login:
+
+
+Booting from SPI
+----------------
+
+Use Building steps from "Booting from uSD using U-Boot SPL" section.
+
+Partition the SPI in Linux via mtdblock.  The partition types here are
+"HiFive Unleashed FSBL", "HiFive Unleashed BBL", and "U-Boot environment"
+for partitions one through three respectively.
+
+.. code-block:: none
+
+	sgdisk --clear -a 1 \
+	    --new=1:40:2087     --change-name=1:spl   --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \
+	    --new=2:2088:10279  --change-name=2:uboot --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \
+	    --new=3:10280:10535 --change-name=3:env   --typecode=3:3DE21764-95BD-54BD-A5C3-4ABE786F38A8 \
+	    /dev/mtdblock0
+
+Write U-Boot SPL and U-Boot to their partitions.
+
+.. code-block:: none
+
+	dd if=spl/u-boot-spl.bin of=/dev/mtdblock0 bs=4096 seek=5 conv=sync
+	dd if=u-boot.itb  of=/dev/mtdblock0 bs=4096 seek=261 conv=sync
+
+Power off the board.
+
+Change DIP switches MSEL[3:0] to 0110.
+
+Power up the board.
diff --git a/doc/board/sipeed/index.rst b/doc/board/sipeed/index.rst
new file mode 100644
index 00000000000..3518e2d8f4d
--- /dev/null
+++ b/doc/board/sipeed/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sipeed
+======
+
+.. toctree::
+   :maxdepth: 2
+
+   maix
diff --git a/doc/board/sipeed/maix.rst b/doc/board/sipeed/maix.rst
new file mode 100644
index 00000000000..4568bb3e4b7
--- /dev/null
+++ b/doc/board/sipeed/maix.rst
@@ -0,0 +1,697 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2020 Sean Anderson <seanga2@gmail.com>
+
+MAIX
+====
+
+Several of the Sipeed Maix series of boards contain the Kendryte K210 processor,
+a 64-bit RISC-V CPU produced by Canaan Inc. This processor contains several
+peripherals to accelerate neural network processing and other "ai" tasks. This
+includes a "KPU" neural network processor, an audio processor supporting
+beamforming reception, and a digital video port supporting capture and output at
+VGA resolution. Other peripherals include 8M of SRAM (accessible with and
+without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
+accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
+peripherals vary, but include spi flash; on-board usb-serial bridges; ports for
+cameras, displays, and sd cards; and ESP32 chips.
+
+Currently, only the Sipeed MAIX BiT V2.0 (bitm) and Sipeed MAIXDUINO are
+supported, but the boards are fairly similar.
+
+Documentation for Maix boards is available from
+`Sipeed's website <http://dl.sipeed.com/MAIX/HDK/>`_.
+Documentation for the Kendryte K210 is available from
+`Kendryte's website <https://kendryte.com/downloads/>`_. However, hardware
+details are rather lacking, so most technical reference has been taken from the
+`standalone sdk <https://github.com/kendryte/kendryte-standalone-sdk>`_.
+
+Build and boot steps
+--------------------
+
+To build U-Boot, run
+
+.. code-block:: none
+
+    make <defconfig>
+    make CROSS_COMPILE=<your cross compile prefix>
+
+To flash U-Boot, run
+
+.. code-block:: none
+
+    kflash -tp /dev/<your tty here> -B <board_id> u-boot-dtb.bin
+
+The board provides two serial devices, e.g.
+
+* /dev/serial/by-id/usb-Kongou_Hikari_Sipeed-Debug_12345678AB-if00-port0
+* /dev/serial/by-id/usb-Kongou_Hikari_Sipeed-Debug_12345678AB-if01-port0
+
+Which one is used for flashing depends on the board.
+
+Currently only a small subset of the board features are supported. So we can
+use the same default configuration and device tree. In the long run we may need
+separate settings.
+
+======================== ========================== ========== ==========
+Board                    defconfig                  board_id   TTY device
+======================== ========================== ========== ==========
+Sipeed MAIX BiT          sipeed_maix_bitm_defconfig bit        first
+Sipeed MAIX BiT with Mic sipeed_maix_bitm_defconfig bit_mic    first
+Sipeed MAIXDUINO         sipeed_maix_bitm_defconfig maixduino  first
+Sipeed MAIX GO                                      goE        second
+Sipeed MAIX ONE DOCK                                dan        first
+======================== ========================== ========== ==========
+
+Flashing causes a reboot of the device. Parameter -t specifies that the serial
+console shall be opened immediately. Boot output should look like the following:
+
+.. code-block:: none
+
+    U-Boot 2020.04-rc2-00087-g2221cc09c1-dirty (Feb 28 2020 - 13:53:09 -0500)
+
+    DRAM:  8 MiB
+    MMC:   spi@53000000:slot@0: 0
+    In:    serial@38000000
+    Out:   serial@38000000
+    Err:   serial@38000000
+    =>
+
+OpenSBI
+^^^^^^^
+
+OpenSBI is an open source supervisor execution environment implementing the
+RISC-V Supervisor Binary Interface Specification [1]. One of its features is
+to intercept run-time exceptions, e.g. for unaligned access or illegal
+instructions, and to emulate the failing instructions.
+
+The OpenSBI source can be downloaded via:
+
+.. code-block:: bash
+
+    git clone https://github.com/riscv/opensbi
+
+As OpenSBI will be loaded at 0x80000000 we have to adjust the U-Boot text base.
+Furthermore we have to enable building U-Boot for S-mode::
+
+    CONFIG_TEXT_BASE=0x80020000
+    CONFIG_RISCV_SMODE=y
+
+Both settings are contained in sipeed_maix_smode_defconfig so we can build
+U-Boot with:
+
+.. code-block:: bash
+
+    make sipeed_maix_smode_defconfig
+    make
+
+To build OpenSBI with U-Boot as a payload:
+
+.. code-block:: bash
+
+    cd opensbi
+    make \
+    PLATFORM=kendryte/k210 \
+    FW_PAYLOAD=y \
+    FW_PAYLOAD_OFFSET=0x20000 \
+    FW_PAYLOAD_PATH=<path to U-Boot>/u-boot-dtb.bin
+
+The value of FW_PAYLOAD_OFFSET must match CONFIG_TEXT_BASE - 0x80000000.
+
+The file to flash is build/platform/kendryte/k210/firmware/fw_payload.bin.
+
+Booting
+^^^^^^^
+
+The default boot process is to load and boot the files ``/uImage`` and
+``/k210.dtb`` off of the first partition of the MMC. For Linux, this will result
+in an output like
+
+.. code-block:: none
+
+    U-Boot 2020.10-00691-gd1d651d988-dirty (Oct 16 2020 - 17:05:24 -0400)
+
+    DRAM:  8 MiB
+    MMC:   spi@53000000:slot@0: 0
+    Loading Environment from SPIFlash... SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB
+    OK
+    In:    serial@38000000
+    Out:   serial@38000000
+    Err:   serial@38000000
+    Hit any key to stop autoboot:  0
+    1827380 bytes read in 1044 ms (1.7 MiB/s)
+    13428 bytes read in 10 ms (1.3 MiB/s)
+    ## Booting kernel from Legacy Image at 80060000 ...
+       Image Name:   linux
+       Image Type:   RISC-V Linux Kernel Image (uncompressed)
+       Data Size:    1827316 Bytes = 1.7 MiB
+       Load Address: 80000000
+       Entry Point:  80000000
+       Verifying Checksum ... OK
+    ## Flattened Device Tree blob at 80400000
+       Booting using the fdt blob at 0x80400000
+       Loading Kernel Image
+       Loading Device Tree to 00000000803f9000, end 00000000803ff473 ... OK
+
+    Starting kernel ...
+
+    [    0.000000] Linux version 5.9.0-00021-g6dcc2f0814c6-dirty (sean@godwin) (riscv64-linux-gnu-gcc (GCC) 10.2.0, GNU ld (GNU Binutils) 2.35) #34 SMP Fri Oct 16 14:40:57 EDT 2020
+    [    0.000000] earlycon: sifive0 at MMIO 0x0000000038000000 (options '115200n8')
+    [    0.000000] printk: bootconsole [sifive0] enabled
+    [    0.000000] Zone ranges:
+    [    0.000000]   DMA32    [mem 0x0000000080000000-0x00000000807fffff]
+    [    0.000000]   Normal   empty
+    [    0.000000] Movable zone start for each node
+    [    0.000000] Early memory node ranges
+    [    0.000000]   node   0: [mem 0x0000000080000000-0x00000000807fffff]
+    [    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000000807fffff]
+    [    0.000000] riscv: ISA extensions acdfgim
+    [    0.000000] riscv: ELF capabilities acdfim
+    [    0.000000] percpu: max_distance=0x18000 too large for vmalloc space 0x0
+    [    0.000000] percpu: Embedded 12 pages/cpu s18848 r0 d30304 u49152
+    [    0.000000] Built 1 zonelists, mobility grouping off.  Total pages: 2020
+    [    0.000000] Kernel command line: earlycon console=ttySIF0
+    [    0.000000] Dentry cache hash table entries: 1024 (order: 1, 8192 bytes, linear)
+    [    0.000000] Inode-cache hash table entries: 512 (order: 0, 4096 bytes, linear)
+    [    0.000000] Sorting __ex_table...
+    [    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+    [    0.000000] Memory: 6004K/8192K available (1139K kernel code, 126K rwdata, 198K rodata, 90K init, 81K bss, 2188K reserved, 0K cma-reserved)
+    [    0.000000] rcu: Hierarchical RCU implementation.
+    [    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
+    [    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
+    [    0.000000] riscv-intc: 64 local interrupts mapped
+    [    0.000000] plic: interrupt-controller@C000000: mapped 65 interrupts with 2 handlers for 2 contexts.
+    [    0.000000] random: get_random_bytes called from 0x00000000800019a8 with crng_init=0
+    [    0.000000] k210-clk: clock-controller
+    [    0.000000] k210-clk: clock-controller: fixed-rate 26 MHz osc base clock
+    [    0.000000] clint: clint@2000000: timer running at 7800000 Hz
+    [    0.000000] clocksource: clint_clocksource: mask: 0xffffffffffffffff max_cycles: 0x3990be68b, max_idle_ns: 881590404272 ns
+    [    0.000014] sched_clock: 64 bits at 7MHz, resolution 128ns, wraps every 4398046511054ns
+    [    0.008450] Console: colour dummy device 80x25
+    [    0.012494] Calibrating delay loop (skipped), value calculated using timer frequency.. 15.60 BogoMIPS (lpj=31200)
+    [    0.022693] pid_max: default: 4096 minimum: 301
+    [    0.027352] Mount-cache hash table entries: 512 (order: 0, 4096 bytes, linear)
+    [    0.034428] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes, linear)
+    [    0.045099] rcu: Hierarchical SRCU implementation.
+    [    0.050048] smp: Bringing up secondary CPUs ...
+    [    0.055417] smp: Brought up 1 node, 2 CPUs
+    [    0.059602] devtmpfs: initialized
+    [    0.082796] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
+    [    0.091820] futex hash table entries: 16 (order: -2, 1024 bytes, linear)
+    [    0.098507] pinctrl core: initialized pinctrl subsystem
+    [    0.140938] clocksource: Switched to clocksource clint_clocksource
+    [    0.247216] workingset: timestamp_bits=62 max_order=11 bucket_order=0
+    [    0.277392] k210-fpioa 502b0000.pinmux: K210 FPIOA pin controller
+    [    0.291724] k210-sysctl 50440000.syscon: K210 system controller
+    [    0.305317] k210-rst 50440000.syscon:reset-controller: K210 reset controller
+    [    0.313808] 38000000.serial: ttySIF0 at MMIO 0x38000000 (irq = 1, base_baud = 115200) is a SiFive UART v0
+    [    0.322712] printk: console [ttySIF0] enabled
+    [    0.322712] printk: console [ttySIF0] enabled
+    [    0.331328] printk: bootconsole [sifive0] disabled
+    [    0.331328] printk: bootconsole [sifive0] disabled
+    [    0.353347] Freeing unused kernel memory: 88K
+    [    0.357004] This architecture does not have kernel memory protection.
+    [    0.363397] Run /init as init process
+
+Loading, Booting, and Storing Images
+------------------------------------
+
+.. _loading:
+
+Loading Images
+^^^^^^^^^^^^^^
+
+Serial
+""""""
+
+Use the ``loady`` command to load images over serial.
+
+.. code-block:: none
+
+    => loady $loadaddr 1500000
+    ## Switch baudrate to 1500000 bps and press ENTER ...
+
+    *** baud: 1500000
+
+    *** baud: 1500000 ***
+    ## Ready for binary (ymodem) download to 0x80000000 at 1500000 bps...
+    C
+    *** file: loader.bin
+    $ sz -vv loader.bin
+    Sending: loader.bin
+    Bytes Sent:2478208   BPS:72937
+    Sending:
+    Ymodem sectors/kbytes sent:   0/ 0k
+    Transfer complete
+
+    *** exit status: 0 ***
+    ## Total Size      = 0x0025d052 = 2478162 Bytes
+    ## Switch baudrate to 115200 bps and press ESC ...
+
+    *** baud: 115200
+
+    *** baud: 115200 ***
+    =>
+
+This command does not set ``$filesize``, so it may need to be set manually.
+
+SPI Flash
+"""""""""
+
+To load an image off of SPI flash, first set up a partition as described in
+:ref:`k210_partitions`. Then, use ``mtd`` to load that partition
+
+.. code-block:: none
+
+    => sf probe
+    SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB
+    => mtd read linux $loadaddr
+    Reading 2097152 byte(s) at offset 0x00000000
+
+This command does not set ``$filesize``, so it may need to be set manually.
+
+MMC
+"""
+
+The MMC device number is 0. To list partitions on the device, use ``part``:
+
+.. code-block:: none
+
+    => part list mmc 0
+
+    Partition Map for MMC device 0  --   Partition Type: EFI
+
+    Part    Start LBA       End LBA          Name
+            Attributes
+            Type GUID
+            Partition GUID
+      1     0x00000800      0x039effde      "boot"
+            attrs:  0x0000000000000000
+            type:   c12a7328-f81f-11d2-ba4b-00a0c93ec93b
+            guid:   96161f7d-7113-4cc7-9a24-08ab7fc5cb72
+
+To list files, use ``ls``:
+
+.. code-block:: none
+
+    => ls mmc 0:1
+    <DIR>       4096 .
+    <DIR>       4096 ..
+    <DIR>      16384 lost+found
+               13428 k210.dtb
+             1827380 uImage
+
+To load a file, use ``load``:
+
+.. code-block:: none
+
+    => load mmc 0:1 $loadaddr uImage
+    1827380 bytes read in 1049 ms (1.7 MiB/s)
+
+Running Programs
+^^^^^^^^^^^^^^^^
+
+Binaries
+""""""""
+
+To run a bare binary, use the ``go`` command:
+
+.. code-block:: none
+
+    => go 80000000
+    ## Starting application at 0x80000000 ...
+    Example expects ABI version 9
+    Actual U-Boot ABI version 9
+    Hello World
+    argc = 1
+    argv[0] = "80000000"
+    argv[1] = "<NULL>"
+    Hit any key to exit ...
+
+Note that this will only start a program on one hart. As-of this writing it is
+only possible to start a program on multiple harts using the ``bootm`` command.
+
+Legacy Images
+"""""""""""""
+
+To create a legacy image, use ``tools/mkimage``:
+
+.. code-block:: none
+
+    $ tools/mkimage -A riscv -O linux -T kernel -C none -a 0x80000000 -e 0x80000000 -n linux -d ../linux-git/arch/riscv/boot/Image uImage
+    Image Name:   linux
+    Created:      Fri Oct 16 17:36:32 2020
+    Image Type:   RISC-V Linux Kernel Image (uncompressed)
+    Data Size:    1827316 Bytes = 1784.49 KiB = 1.74 MiB
+    Load Address: 80000000
+    Entry Point:  80000000
+
+The ``bootm`` command also requires an FDT, even if the image doesn't require
+one. After loading the image to ``$loadaddr`` and the FDT to ``$fdt_addr_r``,
+boot with:
+
+.. code-block:: none
+
+    => bootm $loadaddr - $fdt_addr_r
+    ## Booting kernel from Legacy Image at 80060000 ...
+       Image Name:   linux
+       Image Type:   RISC-V Linux Kernel Image (uncompressed)
+       Data Size:    1827316 Bytes = 1.7 MiB
+       Load Address: 80000000
+       Entry Point:  80000000
+       Verifying Checksum ... OK
+    ## Flattened Device Tree blob at 80400000
+       Booting using the fdt blob at 0x80400000
+       Loading Kernel Image
+       Loading Device Tree to 00000000803f9000, end 00000000803ff473 ... OK
+
+    Starting kernel ...
+
+The FDT is verified after the kernel is relocated, so it must be loaded high
+enough so that it won't be overwritten. The default values for ``$loadaddr``
+and ``$fdt_addr_r`` should provide ample headroom for most use-cases.
+
+Flashing Images
+^^^^^^^^^^^^^^^
+
+SPI Flash
+"""""""""
+
+To flash data to SPI flash, first load it using one of the methods in
+:ref:`loading`. Addiotionally, create some partitions as described in
+:ref:`partitions`. Then use the ``mtd`` command:
+
+.. code-block:: none
+
+    => sf probe
+    SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB
+    => mtd write linux $loadaddr 0 $filesize
+    Writing 2478162 byte(s) at offset 0x00000000
+
+Note that in order to write a bootable image, a header and tailer must be added.
+
+MMC
+"""
+
+MMC writes are unsupported for now.
+
+SPI Flash
+^^^^^^^^^
+
+Sipeed MAIX boards typically provide around 16 MiB of SPI NOR flash. U-Boot is
+stored in the first 1 MiB or so of this flash. U-Boot's environment is stored at
+the end of flash.
+
+.. _k210_partitions:
+
+Partitions
+""""""""""
+
+There is no set data layout. The default partition layout only allocates
+partitions for U-Boot and its default environment
+
+.. code-block:: none
+
+    => mtd list
+    List of MTD devices:
+    * nor0
+      - type: NOR flash
+      - block size: 0x1000 bytes
+      - min I/O: 0x1 bytes
+      - 0x000000000000-0x000001000000 : "nor0"
+          - 0x000000000000-0x000000100000 : "u-boot"
+          - 0x000000fff000-0x000001000000 : "env"
+
+As an example, to allocate 2MiB for Linux and (almost) 13 MiB for other data,
+set the ``mtdparts`` like:
+
+.. code-block:: none
+
+    => env set mtdparts nor0:1M(u-boot),2M(linux),0xcff000(data),0x1000@0xfff000(env)
+    => mtd list
+    List of MTD devices:
+    * nor0
+      - type: NOR flash
+      - block size: 0x1000 bytes
+      - min I/O: 0x1 bytes
+      - 0x000000000000-0x000001000000 : "nor0"
+          - 0x000000000000-0x000000100000 : "u-boot"
+          - 0x000000100000-0x000000300000 : "linux"
+          - 0x000000300000-0x000000fff000 : "data"
+          - 0x000000fff000-0x000001000000 : "env"
+
+To make these changes permanent, save the environment:
+
+.. code-block:: none
+
+    => env save
+    Saving Environment to SPIFlash... Erasing SPI flash...Writing to SPI flash...done
+    OK
+
+U-Boot will always load the environment from the last 4 KiB of flash.
+
+Pin Assignment
+--------------
+
+The K210 contains a Fully Programmable I/O Array (FPIOA), which can remap any of
+its 256 input functions to any any of 48 output pins. The following table has
+the default pin assignments for the BitM.
+
+===== ========== =======
+Pin   Function   Comment
+===== ========== =======
+IO_0  JTAG_TCLK
+IO_1  JTAG_TDI
+IO_2  JTAG_TMS
+IO_3  JTAG_TDO
+IO_4  UARTHS_RX
+IO_5  UARTHS_TX
+IO_6             Not set
+IO_7             Not set
+IO_8  GPIO_0
+IO_9  GPIO_1
+IO_10 GPIO_2
+IO_11 GPIO_3
+IO_12 GPIO_4     Green LED
+IO_13 GPIO_5     Red LED
+IO_14 GPIO_6     Blue LED
+IO_15 GPIO_7
+IO_16 GPIOHS_0   ISP
+IO_17 GPIOHS_1
+IO_18 I2S0_SCLK  MIC CLK
+IO_19 I2S0_WS    MIC WS
+IO_20 I2S0_IN_D0 MIC SD
+IO_21 GPIOHS_5
+IO_22 GPIOHS_6
+IO_23 GPIOHS_7
+IO_24 GPIOHS_8
+IO_25 GPIOHS_9
+IO_26 SPI1_D1    MMC MISO
+IO_27 SPI1_SCLK  MMC CLK
+IO_28 SPI1_D0    MMC MOSI
+IO_29 GPIOHS_13  MMC CS
+IO_30 GPIOHS_14
+IO_31 GPIOHS_15
+IO_32 GPIOHS_16
+IO_33 GPIOHS_17
+IO_34 GPIOHS_18
+IO_35 GPIOHS_19
+IO_36 GPIOHS_20  Panel CS
+IO_37 GPIOHS_21  Panel RST
+IO_38 GPIOHS_22  Panel DC
+IO_39 SPI0_SCK   Panel WR
+IO_40 SCCP_SDA
+IO_41 SCCP_SCLK
+IO_42 DVP_RST
+IO_43 DVP_VSYNC
+IO_44 DVP_PWDN
+IO_45 DVP_HSYNC
+IO_46 DVP_XCLK
+IO_47 DVP_PCLK
+===== ========== =======
+
+Over- and Under-clocking
+------------------------
+
+To change the clock speed of the K210, you will need to enable
+``CONFIG_CLK_K210_SET_RATE`` and edit the board's device tree. To do this, add a
+section to ``arch/riscv/arch/riscv/dts/k210-maix-bit.dts`` like the following:
+
+.. code-block:: none
+
+    &sysclk {
+	assigned-clocks = <&sysclk K210_CLK_PLL0>;
+	assigned-clock-rates = <800000000>;
+    };
+
+There are three PLLs on the K210: PLL0 is the parent of most of the components,
+including the CPU and RAM. PLL1 is the parent of the neural network coprocessor.
+PLL2 is the parent of the sound processing devices. Note that child clocks of
+PLL0 and PLL2 run at *half* the speed of the PLLs. For example, if PLL0 is
+running at 800 MHz, then the CPU will run at 400 MHz. This is the example given
+above. The CPU can be overclocked to around 600 MHz, and underclocked to 26 MHz.
+
+It is possible to set PLL2's parent to PLL0. The plls are more accurate when
+converting between similar frequencies. This makes it easier to get an accurate
+frequency for I2S. As an example, consider sampling an I2S device at 44.1 kHz.
+On this device, the I2S serial clock runs at 64 times the sample rate.
+Therefore, we would like to run PLL2 at an even multiple of 2.8224 MHz. If
+PLL2's parent is IN0, we could use a frequency of 390 MHz (the same as the CPU's
+default speed).  Dividing by 138 yields a serial clock of about 2.8261 MHz. This
+results in a sample rate of 44.158 kHz---around 50 Hz or .1% too fast. If,
+instead, we set PLL2's parent to PLL1 running at 390 MHz, and request a rate of
+2.8224 * 136 = 383.8464 MHz, the achieved rate is 383.90625 MHz. Dividing by 136
+yields a serial clock of about 2.8228 MHz. This results in a sample rate of
+44.107 kHz---just 7 Hz or .02% too fast. This configuration is shown in the
+following example:
+
+.. code-block:: none
+
+    &sysclk {
+	assigned-clocks = <&sysclk K210_CLK_PLL1>, <&sysclk K210_CLK_PLL2>;
+	assigned-clock-parents = <0>, <&sysclk K210_CLK_PLL1>;
+	assigned-clock-rates = <390000000>, <383846400>;
+    };
+
+There are a couple of quirks to the PLLs. First, there are more frequency ratios
+just above and below 1.0, but there is a small gap around 1.0. To be explicit,
+if the input frequency is 100 MHz, it would be impossible to have an output of
+99 or 101 MHz. In addition, there is a maximum frequency for the internal VCO,
+so higher input/output frequencies will be less accurate than lower ones.
+
+Technical Details
+-----------------
+
+Boot Sequence
+^^^^^^^^^^^^^
+
+1. ``RESET`` pin is deasserted. The pin is connected to the ``RESET`` button. It
+   can also be set to low via either the ``DTR`` or the ``RTS`` line of the
+   serial interface (depending on the board).
+2. Both harts begin executing at ``0x00001000``.
+3. Both harts jump to firmware at ``0x88000000``.
+4. One hart is chosen as a boot hart.
+5. Firmware reads the value of pin ``IO_16`` (ISP). This pin is connected to the
+   ``BOOT`` button. The pin can equally be set to low via either the ``DTR`` or
+   ``RTS`` line of the serial interface (depending on the board).
+
+   * If the pin is low, enter ISP mode. This mode allows loading data to ram,
+     writing it to flash, and booting from specific addresses.
+   * If the pin is high, continue boot.
+6. Firmware reads the next stage from flash (SPI3) to address ``0x80000000``.
+
+   * If byte 0 is 1, the next stage is decrypted using the built-in AES
+     accelerator and the one-time programmable, 128-bit AES key.
+   * Bytes 1 to 4 hold the length of the next stage.
+   * The SHA-256 sum of the next stage is automatically calculated, and verified
+     against the 32 bytes following the next stage.
+7. The boot hart sends an IPI to the other hart telling it to jump to the next
+   stage.
+8. The boot hart jumps to ``0x80000000``.
+
+Debug UART
+^^^^^^^^^^
+
+The Debug UART is provided with the following settings::
+
+    CONFIG_DEBUG_UART=y
+    CONFIG_DEBUG_UART_SIFIVE=y
+    CONFIG_DEBUG_UART_BASE=0x38000000
+    CONFIG_DEBUG_UART_CLOCK=390000000
+
+Resetting the board
+^^^^^^^^^^^^^^^^^^^
+
+The MAIX boards can be reset using the DTR and RTS lines of the serial console.
+How the lines are used depends on the specific board. See the code of kflash.py
+for details.
+
+This is the reset sequence for the MAXDUINO and MAIX BiT with Mic:
+
+.. code-block:: python
+
+   def reset(self):
+        self.device.setDTR(False)
+        self.device.setRTS(False)
+        time.sleep(0.1)
+        self.device.setDTR(True)
+        time.sleep(0.1)
+        self.device.setDTR(False)
+        time.sleep(0.1)
+
+and this for the MAIX Bit:
+
+.. code-block:: python
+
+   def reset(self):
+        self.device.setDTR(False)
+        self.device.setRTS(False)
+        time.sleep(0.1)
+        self.device.setRTS(True)
+        time.sleep(0.1)
+        self.device.setRTS(False)
+        time.sleep(0.1)
+
+Memory Map
+^^^^^^^^^^
+
+========== ========= ===========
+Address    Size      Description
+========== ========= ===========
+0x00000000 0x1000    debug
+0x00001000 0x1000    rom
+0x02000000 0xC000    clint
+0x0C000000 0x4000000 plic
+0x38000000 0x1000    uarths
+0x38001000 0x1000    gpiohs
+0x40000000 0x400000  sram0 (non-cached)
+0x40400000 0x200000  sram1 (non-cached)
+0x40600000 0x200000  airam (non-cached)
+0x40800000 0xC00000  kpu
+0x42000000 0x400000  fft
+0x50000000 0x1000    dmac
+0x50200000 0x200000  apb0
+0x50200000 0x80      gpio
+0x50210000 0x100     uart0
+0x50220000 0x100     uart1
+0x50230000 0x100     uart2
+0x50240000 0x100     spi slave
+0x50250000 0x200     i2s0
+0x50250200 0x200     apu
+0x50260000 0x200     i2s1
+0x50270000 0x200     i2s2
+0x50280000 0x100     i2c0
+0x50290000 0x100     i2c1
+0x502A0000 0x100     i2c2
+0x502B0000 0x100     fpioa
+0x502C0000 0x100     sha256
+0x502D0000 0x100     timer0
+0x502E0000 0x100     timer1
+0x502F0000 0x100     timer2
+0x50400000 0x200000  apb1
+0x50400000 0x100     wdt0
+0x50410000 0x100     wdt1
+0x50420000 0x100     otp control
+0x50430000 0x100     dvp
+0x50440000 0x100     sysctl
+0x50450000 0x100     aes
+0x50460000 0x100     rtc
+0x52000000 0x4000000 apb2
+0x52000000 0x100     spi0
+0x53000000 0x100     spi1
+0x54000000 0x200     spi3
+0x80000000 0x400000  sram0 (cached)
+0x80400000 0x200000  sram1 (cached)
+0x80600000 0x200000  airam (cached)
+0x88000000 0x20000   otp
+0x88000000 0xC200    firmware
+0x8801C000 0x1000    riscv priv spec 1.9 config
+0x8801D000 0x2000    flattened device tree (contains only addresses and
+                     interrupts)
+0x8801F000 0x1000    credits
+========== ========= ===========
+
+Links
+-----
+
+[1] https://github.com/riscv/riscv-sbi-doc
+    RISC-V Supervisor Binary Interface Specification
diff --git a/doc/board/socionext/developerbox.rst b/doc/board/socionext/developerbox.rst
new file mode 100644
index 00000000000..863761c6e27
--- /dev/null
+++ b/doc/board/socionext/developerbox.rst
@@ -0,0 +1,233 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Introduction
+============
+
+DeveloperBox is a certified 96boards Enterprise Edition board. The board/SoC has: -
+
+* Socionext SC2A11 24-cores ARM Cortex-A53 on tbe Mini-ATX form factor motherboard
+* 4 DIMM slots (4GB DDR4-2400 UDIMM shipped by default)
+* 1 4xPCIe Gen2 slot and 2 1xPCIe Gen2 slots
+  (1x slots are connected via PCIe bridge chip)
+* 4 USB-3.0 ports
+* 2 SATA ports
+* 1 GbE network port
+* 1 USB-UART serial port (micro USB)
+* 64MB SPI NOR Flash
+* 8GB eMMC Flash Storage
+* 96boards LS connector
+
+The DeveloperBox schematic can be found here: -
+https://www.96boards.org/documentation/enterprise/developerbox/hardware-docs/mzsc2am_v03_20180115_a.pdf
+
+And the other documents can be found here: -
+https://www.96boards.org/documentation/enterprise/developerbox/
+
+
+Currently, the U-Boot port supports: -
+
+* USB
+* eMMC
+* SPI-NOR
+* SATA
+* GbE
+
+The DeveloperBox boots the TF-A and EDK2 as a main bootloader by default.
+The DeveloperBox U-Boot port will replace the EDK2 and boot from TF-A as
+BL33, but no need to combine with it.
+
+Compile from source
+===================
+
+You can build U-Boot without any additinal source code.::
+
+  cd u-boot
+  git checkout v2023.07
+  export ARCH=arm64
+  export CROSS_COMPILE=aarch64-linux-gnu-
+  make synquacer_developerbox_defconfig
+  make -j `noproc`
+
+Then, expand the binary to 1MB for preparing flash.::
+
+  cp u-boot.bin SPI_NOR_UBOOT.fd
+  truncate -s 1M SPI_NOR_UBOOT.fd
+
+Installation
+============
+
+You can install the SNI_NOR_UBOOT.fd via NOR flash writer.
+
+Flashing the U-Boot image on DeveloperBox requires a 96boards UART mezzanine
+or other mezzanine which can connect to the LS-UART0 port.
+Connect USB cable from host to the LS-UART0 and set DSW2-7 to ON, and turn the
+board on again. The flash writer program will be started automatically;
+don't forget to turn the DSW2-7 off again after flashing.
+
+*!!CAUTION!! If you write the U-Boot image on wrong address, the board can
+be bricked. See below page if you need to recover the bricked board. See
+the following page for more details*
+
+https://www.96boards.org/documentation/enterprise/developerbox/installation/board-recovery.md.html
+
+When the serial flasher is running correctly it will show the following boot
+messages printed to the LS-UART0 console::
+
+
+  /*------------------------------------------*/
+  /*  SC2A11 "SynQuacer" series Flash writer  */
+  /*                                          */
+  /*  Version: cd254ac                        */
+  /*  Build: 12/15/17 11:25:45                */
+  /*------------------------------------------*/
+
+  Command Input >
+
+Once the flasher tool is running we are ready flash the UEFI image::
+
+  flash rawwrite 200000 100000
+  >> Send SPI_NOR_UBOOT.fd via XMODEM (Control-A S in minicom) <<
+
+*!!NOTE!! The flasher command parameter is different from the command for
+board recovery. U-Boot uses the offset 200000 (2-five-0, 2M in hex) and the
+size 100000 (1-five-0, 1M in hex).*
+
+After transferring the SPI_NOR_UBOOT.fd, turn off the DSW2-7 and
+reset the board.
+
+
+Enable FWU Multi Bank Update
+============================
+
+DeveloperBox supports the FWU Multi Bank Update. You *MUST* update both
+*SCP firmware* and *TF-A* for this feature. This will change the layout and
+the boot process but you can switch back to the normal one by changing
+the DSW 1-4 off.
+
+Configure U-Boot
+----------------
+
+To enable the FWU Multi Bank Update on the DeveloperBox board the
+configs/synquacer_developerbox_defconfig enables default FWU configuration ::
+
+ CONFIG_FWU_MULTI_BANK_UPDATE=y
+ CONFIG_FWU_MDATA=y
+ CONFIG_FWU_MDATA_MTD=y
+ CONFIG_FWU_NUM_BANKS=2
+ CONFIG_FWU_NUM_IMAGES_PER_BANK=1
+ CONFIG_CMD_FWU_METADATA=y
+ CONFIG_FWU_MDATA_V2=y
+
+And build it::
+
+  cd u-boot/
+  export ARCH=arm64
+  export CROSS_COMPILE=aarch64-linux-gnu-
+  make synquacer_developerbox_defconfig
+  make -j `noproc`
+  cd ../
+
+By default, the CONFIG_FWU_NUM_BANKS and CONFIG_FWU_NUM_IMAGES_PER_BANKS are
+set to 2 and 1 respectively. This uses FIP (Firmware Image Package) type image
+which contains TF-A, U-Boot and OP-TEE (the OP-TEE is optional).
+You can use fiptool to compose the FIP image from those firmware
+images. There are two versions of the FWU metadata, of which the
+platform enables version 2 by default.
+
+Rebuild SCP firmware
+--------------------
+
+Rebuild SCP firmware which supports FWU Multi Bank Update as below::
+
+  cd SCP-firmware/
+  OUT=./build/product/synquacer
+  ROMFW_FILE=$OUT/scp_romfw/$SCP_BUILD_MODE/bin/scp_romfw.bin
+  RAMFW_FILE=$OUT/scp_ramfw/$SCP_BUILD_MODE/bin/scp_ramfw.bin
+  ROMRAMFW_FILE=scp_romramfw_release.bin
+
+  make CC=arm-none-eabi-gcc PRODUCT=synquacer MODE=release
+  tr "\000" "\377" < /dev/zero | dd of=${ROMRAMFW_FILE} bs=1 count=196608
+  dd if=${ROMFW_FILE} of=${ROMRAMFW_FILE} bs=1 conv=notrunc seek=0
+  dd if=${RAMFW_FILE} of=${ROMRAMFW_FILE} bs=1 seek=65536
+  cd ../
+
+And you can get the `scp_romramfw_release.bin` file.
+
+Rebuild OPTEE firmware
+----------------------
+
+Rebuild OPTEE to use in new-layout FIP as below::
+
+  cd optee_os/
+  make -j`nproc` PLATFORM=synquacer ARCH=arm \
+    CROSS_COMPILE64=aarch64-linux-gnu- CFG_ARM64_core=y \
+    CFG_CRYPTO_WITH_CE=y CFG_CORE_HEAP_SIZE=524288 CFG_CORE_DYN_SHM=y \
+    CFG_CORE_ARM64_PA_BITS=48 CFG_TEE_CORE_LOG_LEVEL=1 CFG_TEE_TA_LOG_LEVEL=1
+  cp out/arm-plat-synquacer/core/tee-pager_v2.bin ../arm-trusted-firmware/
+
+The produced `tee-pager_v2.bin` is to be used while building TF-A next.
+
+
+Rebuild TF-A and FIP
+--------------------
+
+Rebuild TF-A which supports FWU Multi Bank Update as below::
+
+  cd arm-trusted-firmware/
+  make CROSS_COMPILE=aarch64-linux-gnu- -j`nproc` PLAT=synquacer \
+     TRUSTED_BOARD_BOOT=1 SPD=opteed SQ_RESET_TO_BL2=1 GENERATE_COT=1 \
+     MBEDTLS_DIR=../mbedtls BL32=tee-pager_v2.bin \
+     BL33=../u-boot/u-boot.bin all fip fiptool
+
+And make a FIP image.::
+
+  cp build/synquacer/release/fip.bin SPI_NOR_NEWFIP.fd
+  tools/fiptool/fiptool update --tb-fw build/synquacer/release/bl2.bin SPI_NOR_NEWFIP.fd
+
+UUIDs for the FWU Multi Bank Update
+-----------------------------------
+
+FWU multi-bank update requires some UUIDs. The DeveloperBox platform uses
+following UUIDs.
+
+ - Location UUID for the FIP image: 17e86d77-41f9-4fd7-87ec-a55df9842de5
+ - Image type UUID for the FIP image: 10c36d7d-ca52-b843-b7b9-f9d6c501d108
+ - Image UUID for Bank0 : 5a66a702-99fd-4fef-a392-c26e261a2828
+ - Image UUID for Bank1 : a8f868a1-6e5c-4757-878d-ce63375ef2c0
+
+These UUIDs are used for making a FWU metadata image.
+
+u-boot$ ./tools/mkfwumdata -v 2 -i 1 -b 2 \
+	17e86d77-41f9-4fd7-87ec-a55df9842de5,10c36d7d-ca52-b843-b7b9-f9d6c501d108,5a66a702-99fd-4fef-a392-c26e261a2828,a8f868a1-6e5c-4757-878d-ce63375ef2c0 \
+	../devbox-fwu-mdata.img
+
+Create Accept & Revert capsules
+
+u-boot$ ./tools/mkeficapsule -A -g 7d6dc310-52ca-43b8-b7b9-f9d6c501d108 NEWFIP_accept.Cap
+u-boot$ ./tools/mkeficapsule -R NEWFIP_revert.Cap
+
+Install via flash writer
+------------------------
+
+As explained in above section, the new FIP image and the FWU metadata image
+can be installed via NOR flash writer.
+
+Once the flasher tool is running we are ready to flash the images.::
+Write the FIP image to the Bank-0 & 1 at 6MB and 10MB offset.::
+
+  flash rawwrite 600000 400000
+  flash rawwrite a00000 400000
+  >> Send SPI_NOR_NEWFIP.fd via XMODEM (Control-A S in minicom) <<
+
+  flash rawwrite 500000 1000
+  flash rawwrite 530000 1000
+  >> Send devbox-fwu-mdata.img via XMODEM (Control-A S in minicom) <<
+
+And write the new SCP firmware.::
+
+  flash write cm3
+  >> Send scp_romramfw_release.bin via XMODEM (Control-A S in minicom) <<
+
+At last, turn on the DSW 3-4 on the board, and reboot.
+Note that if DSW 3-4 is turned off, the DeveloperBox will boot from
+the original EDK2 firmware (or non-FWU U-Boot if you already installed).
diff --git a/doc/board/socionext/index.rst b/doc/board/socionext/index.rst
new file mode 100644
index 00000000000..4673dcc45be
--- /dev/null
+++ b/doc/board/socionext/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Socionext
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   developerbox
diff --git a/doc/board/sophgo/index.rst b/doc/board/sophgo/index.rst
new file mode 100644
index 00000000000..e097afdac64
--- /dev/null
+++ b/doc/board/sophgo/index.rst
@@ -0,0 +1,8 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sophgo
+======
+.. toctree::
+   :maxdepth: 1
+
+   milkv_duo
diff --git a/doc/board/sophgo/milkv_duo.rst b/doc/board/sophgo/milkv_duo.rst
new file mode 100644
index 00000000000..cb2ed1ad987
--- /dev/null
+++ b/doc/board/sophgo/milkv_duo.rst
@@ -0,0 +1,64 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Milk-V Duo
+==========
+
+CV1800B RISC-V SoC
+------------------
+The CV1800B is a high-performance, low-power 1+1 64-bit RISC-V SoC from Sophgo.
+
+Mainline support
+----------------
+The support for following drivers are already enabled:
+1. ns16550 UART Driver.
+
+Building
+~~~~~~~~
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: console
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+   cd <U-Boot-dir>
+   make milkv_duo_defconfig
+   make
+
+This will generate u-boot-dtb.bin
+
+Booting
+~~~~~~~
+Currently, we rely on vendor FSBL(First Stage Boot Loader) to initialize the
+clock and load the u-boot image, then bootup from it.
+
+Alternatively, to run u-boot-dtb.bin on top of FSBL, follow these steps:
+
+1. Use the vendor-provided tool to create a unified fip.bin file containing
+   FSBL, OpenSBI, and U-Boot.
+
+2. Place the generated fip.bin file into the FAT partition of the SD card.
+
+3. Insert the SD card into the board and power it on.
+
+The board will automatically execute the FSBL from the fip.bin file.
+Subsequently, it will transition to OpenSBI, and finally, OpenSBI will invoke
+U-Boot.
+
+
+Sample boot log from Milk-V Duo board
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.. code-block:: none
+
+   U-Boot 2024.01-rc5-00010-g51965baa36 (Dec 28 2023 - 13:15:53 +0800)milkv_duo
+
+   DRAM:  63.3 MiB
+   Core:  10 devices, 8 uclasses, devicetree: separate
+   Loading Environment from nowhere... OK
+   In:    serial@4140000
+   Out:   serial@4140000
+   Err:   serial@4140000
+   Net:   No ethernet found.
+   milkv_duo# cpu detail
+     0: cpu@0      rv64imafdc
+      ID = 0, freq = 0 Hz: L1 cache, MMU
+   milkv_duo#
diff --git a/doc/board/st/index.rst b/doc/board/st/index.rst
new file mode 100644
index 00000000000..2a8a4ef3b84
--- /dev/null
+++ b/doc/board/st/index.rst
@@ -0,0 +1,11 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+STMicroelectronics
+==================
+
+.. toctree::
+   :maxdepth: 2
+
+   st-dt
+   stm32mp1
+   stm32_MCU
diff --git a/doc/board/st/st-dt.rst b/doc/board/st/st-dt.rst
new file mode 100644
index 00000000000..2a285c81807
--- /dev/null
+++ b/doc/board/st/st-dt.rst
@@ -0,0 +1,68 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Patrick Delaunay <patrick.delaunay@foss.st.com>
+
+U-Boot device tree bindings
+---------------------------
+
+The U-Boot specific bindings are defined in the U-Boot directory:
+doc/device-tree-bindings
+
+* clock
+        - :download:`clock/st,stm32mp1.txt <../../device-tree-bindings/clock/st,stm32mp1.txt>`
+* ram
+        - :download:`memory-controllers/st,stm32mp1-ddr.txt <../../device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt>`
+
+All the other device tree bindings used in U-Boot are specified in Linux
+kernel. Please refer dt bindings from below specified paths in the Linux
+kernel binding directory = Documentation/devicetree/bindings/
+
+* acd
+	- iio/adc/st,stm32-adc.yaml
+* clock
+        - clock/st,stm32-rcc.txt
+        - clock/st,stm32h7-rcc.txt
+	- clock/st,stm32mp1-rcc.yaml
+* display
+	- display/st,stm32-dsi.yaml
+	- display/st,stm32-ltdc.yaml
+* gpio
+	- pinctrl/st,stm32-pinctrl.yaml
+* hwlock
+	- hwlock/st,stm32-hwspinlock.yaml
+* i2c
+	- i2c/st,stm32-i2c.yaml
+* mailbox
+	- mailbox/st,stm32-ipcc.yaml
+* mmc
+	- mmc/arm,pl18x.yaml
+* nand
+	- mtd/st,stm32-fmc2-nand.yaml
+	- memory-controllers/st,stm32-fmc2-ebi.yaml
+* net
+        - net/stm32-dwmac.yaml
+* nvmem
+        - nvmem/st,stm32-romem.yaml
+* remoteproc
+	- remoteproc/st,stm32-rproc.yaml
+* regulator
+	- regulator/st,stm32mp1-pwr-reg.yaml
+	- regulator/st,stm32-vrefbuf.yaml
+* reset
+	- reset/st,stm32-rcc.txt
+	- reset/st,stm32mp1-rcc.txt
+* rng
+	- rng/st,stm32-rng.yaml
+* rtc
+	- rtc/st,stm32-rtc.yaml
+* serial
+	- serial/st,stm32-uart.yaml
+* spi
+	- spi/st,stm32-spi.yaml
+	- spi/st,stm32-qspi.yaml
+* syscon
+        - arm/stm32/st,stm32-syscon.yaml
+* usb
+	- phy/phy-stm32-usbphyc.yaml
+        - usb/dwc2.yaml
+* watchdog
+	- watchdog/st,stm32-iwdg.yaml
diff --git a/doc/board/st/stm32_MCU.rst b/doc/board/st/stm32_MCU.rst
new file mode 100644
index 00000000000..61650bc8011
--- /dev/null
+++ b/doc/board/st/stm32_MCU.rst
@@ -0,0 +1,186 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Patrice Chotard <patrice.chotardy@foss.st.com>
+
+STM32 MCU boards
+================
+
+This is a quick instruction for setup STM32 MCU boards.
+
+Supported devices
+-----------------
+
+U-Boot supports the following STMP32 MCU SoCs:
+
+ - STM32F429
+ - STM32F469
+ - STM32F746
+ - STM32F769
+ - STM32H743
+ - STM32H750
+
+SoCs information:
+-----------------
+STM32F4 series are Cortex-M4 MCU.
+STM32F7 and STM32H7 series are Cortex-M7 MCU.
+
+ + STM32F4 series: https://www.st.com/en/microcontrollers-microprocessors/stm32f4-series.html
+ + STM32F7 series: https://www.st.com/en/microcontrollers-microprocessors/stm32f7-series.html
+ + STM32H7 series: https://www.st.com/en/microcontrollers-microprocessors/stm32h7-series.html
+
+Currently the following boards are supported:
+
+ + stm32f429-discovery
+ + stm32f469-discovery
+ + stm32746g-evaluation
+ + stm32f746-discovery
+ + stm32f769-discovery
+ + stm32h743i-discovery
+ + stm32h743i-evaluation
+ + stm32h750i-art-pi
+
+Boot Sequences
+--------------
+
+For STM32F7 series, 2 boot configurations are supported with and without SPL
+
++------------------------+-------------------------+--------------+
+| **FSBL**               | **SSBL**                | **OS**       |
++------------------------+-------------------------+--------------+
+| First Stage Bootloader | Second Stage Bootloader | Linux Kernel |
++------------------------+-------------------------+--------------+
+| embedded Flash         | DDR                                    |
++------------------------+-------------------------+--------------+
+
+The boot chain with SPL
+```````````````````````
+
+defconfig_file :
+   + **stm32746g-eval_spl_defconfig**
+   + **stm32f746-disco_spl_defconfig**
+   + **stm32f769-disco_spl_defconfig**
+
++------------+------------+-------+
+| FSBL       | SSBL       | OS    |
++------------+------------+-------+
+|U-Boot SPL  | U-Boot     | Linux |
++------------+------------+-------+
+
+The boot chain without SPL
+``````````````````````````
+
+defconfig_file :
+   + **stm32f429-discovery_defconfig**
+   + **stm32f429-evaluation_defconfig**
+   + **stm32f469-discovery_defconfig**
+   + **stm32746g-eval_defconfig**
+   + **stm32f746-disco_defconfig**
+   + **stm32f769-disco_defconfig**
+   + **stm32h743-disco_defconfig**
+   + **stm32h743-eval_defconfig**
+   + **stm32h750-art-pi_defconfig**
+
++-----------+-------+
+| FSBL      | OS    |
++-----------+-------+
+|U-Boot     | Linux |
++-----------+-------+
+
+Build Procedure
+---------------
+
+1. Install the required tools for U-Boot
+
+   * install package needed in U-Boot makefile
+     (libssl-dev, swig, libpython-dev...)
+
+   * install ARMv7 toolchain for 32bit Cortex-A (from Linaro,
+     from SDK for STM32MP15x, or any crosstoolchains from your distribution)
+     (you can use any gcc cross compiler compatible with U-Boot)
+
+2. Set the cross compiler::
+
+   # export CROSS_COMPILE=/path/to/toolchain/arm-linux-gnueabi-
+
+3. Select the output directory (optional)::
+
+   # export KBUILD_OUTPUT=/path/to/output
+
+   for example: use one output directory for each configuration::
+
+   # export KBUILD_OUTPUT=stm32f4
+   # export KBUILD_OUTPUT=stm32f7
+   # export KBUILD_OUTPUT=stm32h7
+
+   you can build outside of code directory::
+
+   # export KBUILD_OUTPUT=../build/stm32f4
+
+4. Configure U-Boot::
+
+   # make <defconfig_file>
+
+   For example with <defconfig_file>:
+
+   - For **stm32f429 discovery** board : **stm32f429-discovery_defconfig**
+   - For **stm32f769 discovery** board with SPL: **stm32f769-disco_spl_defconfig**
+   - For **stm32f769 discovery** board without SPL: **stm32f769-disco_defconfig**
+
+5. Configure the device-tree and build the U-Boot image::
+
+   # make DEVICE_TREE=<name> all
+
+   Examples:
+
+  a) boot with SPL on stm32f746 discovery board::
+
+     # export KBUILD_OUTPUT=stm32f746-disco
+     # make stm32f746-disco_spl_defconfig
+     # make all
+
+  b) boot without SPL on stm32f746 discovery board::
+
+     # export KBUILD_OUTPUT=stm32f746-disco
+     # make stm32f746-disco_defconfig
+     # make all
+
+  c) boot on stm32h743 discovery board::
+
+     # export KBUILD_OUTPUT=stm32h743-disco
+     # make stm32h743-disco_defconfig
+     # make all
+
+  d) boot on stm32h743 evaluation board::
+
+     # export KBUILD_OUTPUT=stm32h743-disco
+     # make stm32h743-eval_defconfig
+     # make all
+
+6. U-Boot Output files
+
+   So in the output directory (selected by KBUILD_OUTPUT),
+   you can found the needed U-Boot files, for example::
+
+     - stm32f746-disco_defconfig = **u-boot-dtb.bin** and **u-boot.dtb**
+
+       - FSBL = u-boot-dtb.bin
+
+     - stm32f746-disco_spl_defconfig = **u-boot-dtb.bin**, **u-boot.dtb** and **u-boot-with-spl.bin**
+
+       - FSBL + SSBL = u-boot-with-spl.bin
+       - SSBL = u-boot-dtb.bin
+
+7. Flash U-Boot files
+
+Plug STM32 MCUs board using the USB ST-Link connector, hence it will expose
+the flash area as a mass-storage. In this mass-storage you will find the
+following files:
+
+- DETAILS.TXT: give the bootrom version and build
+- MBED.HTM: shortcul to the hardware board description web page from st.com.
+
+Copy/paste the u-boot.bin or u-boot-with-spl.bin (in case of bootchain with SPL)
+to this mass-storage. The "COM" LED will blink alternatively red and green during
+the flash process. When done the board will reboot automatically.
+
+In case of boot with SPL, by default SPL will try to load either a Linux
+kernel (falcon mode) or, if the key "c" is maintained pressed, the main U-Boot.
diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst
new file mode 100644
index 00000000000..63b44776ffc
--- /dev/null
+++ b/doc/board/st/stm32mp1.rst
@@ -0,0 +1,841 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Patrick Delaunay <patrick.delaunay@foss.st.com>
+
+STM32MP1xx boards
+=================
+
+This is a quick instruction for setup STMicroelectronics STM32MP1xx boards.
+
+Further information can be found in STMicroelectronics STM32 WIKI_.
+
+Supported devices
+-----------------
+
+U-Boot supports all the STMicroelectronics MPU with the associated boards
+
+ - STMP32MP15x SoCs:
+
+  - STM32MP157
+  - STM32MP153
+  - STM32MP151
+
+ - STMP32MP13x SoCs:
+
+  - STM32MP135
+  - STM32MP133
+  - STM32MP131
+
+Everything is supported in Linux but U-Boot is limited to the boot device:
+
+ 1. UART
+ 2. SD card/MMC controller (SDMMC)
+ 3. NAND controller (FMC)
+ 4. NOR controller (QSPI)
+ 5. USB controller (OTG DWC2)
+ 6. Ethernet controller
+
+And the necessary drivers
+
+ 1. I2C
+ 2. STPMIC1 (PMIC and regulator)
+ 3. Clock, Reset, Sysreset
+ 4. Fuse (BSEC)
+ 5. OP-TEE
+ 6. ETH
+ 7. USB host
+ 8. WATCHDOG
+ 9. RNG
+ 10. RTC
+
+STM32MP15x
+``````````
+
+The STM32MP15x is a Cortex-A7 MPU aimed at various applications.
+
+It features:
+
+ - Dual core Cortex-A7 application core (Single on STM32MP151)
+ - 2D/3D image composition with GPU (only on STM32MP157)
+ - Standard memories interface support
+ - Standard connectivity, widely inherited from the STM32 MCU family
+ - Comprehensive security support
+ - Cortex M4 coprocessor
+
+Each line comes with a security option (cryptography & secure boot) and
+a Cortex-A frequency option:
+
+ - A : Cortex-A7 @ 650 MHz
+ - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
+ - D : Cortex-A7 @ 800 MHz
+ - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
+
+Currently the following boards are supported:
+
+ + stm32mp157a-dk1.dts
+ + stm32mp157c-dk2.dts
+ + stm32mp157c-ed1.dts
+ + stm32mp157c-ev1.dts
+ + stm32mp15xx-dhcor-avenger96.dts
+
+The SCMI variant of each board is supported by a specific "scmi" device tree:
+ + stm32mp157a-dk1-scmi.dts
+ + stm32mp157c-dk2-scmi.dts
+ + stm32mp157c-ed1-scmi.dts
+ + stm32mp157c-ev1-scmi.dts
+
+SCMI variant is used only with stm32mp15_defconfig, when the resources are
+secured with RCC_TZCR.TZEN=1 in OP-TEE. The access to these reset and clock
+resources are provided by OP-TEE and the associated SCMI services.
+
+STM32MP13x
+``````````
+
+The STM32MP13x is a single Cortex-A7 MPU aimed at various applications.
+
+Currently the following boards are supported:
+
+ + stm32mp135f-dk.dts
+
+
+Boot Sequences
+--------------
+
+2 boot configurations are supported with:
+
++----------+------------------------+-------------------------+--------------+
+| **ROM**  | **FSBL**               | **SSBL**                | **OS**       |
++ **code** +------------------------+-------------------------+--------------+
+|          | First Stage Bootloader | Second Stage Bootloader | Linux Kernel |
++          +------------------------+-------------------------+--------------+
+|          | embedded RAM           | DDR                                    |
++----------+------------------------+-------------------------+--------------+
+| TrustZone|                         secure monitor                          |
++----------+------------------------+-------------------------+--------------+
+
+The trusted boot chain is recommended with:
+
+- FSBL = **TF-A BL2**
+- Secure monitor = **OP-TEE**
+- SSBL = **U-Boot**
+
+It is the only supported boot chain for STM32MP13x family.
+
+The **Trusted** boot chain with TF-A_
+`````````````````````````````````````
+
+defconfig_file :
+   + **stm32mp15_defconfig**  and **stm32mp13_defconfig** (for TF-A_ with FIP support)
+   + **stm32mp15_trusted_defconfig** (for TF-A_ without FIP support)
+
+    +-------------+--------------------------+------------+-------+
+    |  ROM code   | FSBL                     | SSBL       | OS    |
+    +             +--------------------------+------------+-------+
+    |             |Trusted Firmware-A (TF-A_)| U-Boot     | Linux |
+    +-------------+--------------------------+------------+-------+
+    | TrustZone   |secure monitor = SPMin or OP-TEE_              |
+    +-------------+--------------------------+------------+-------+
+
+TF-A_ and OP-TEE_ are 2 separate projects, with their git repository;
+they are compiled separately.
+
+TF-A_ (BL2) initialize the DDR and loads the next stage binaries from a FIP file:
+   + BL32: a secure monitor BL32 = SPMin provided by TF-A_ or OP-TEE_ :
+     performs a full initialization of Secure peripherals and provides service
+     to normal world
+   + BL33: a non-trusted firmware = U-Boot, running in normal world and uses
+     the secure monitor to access to secure resources.
+   + HW_CONFIG: The hardware configuration file = the U-Boot device tree
+
+The scmi variant of each device tree is only support with OP-TEE as secure
+monitor, with stm32mp15_defconfig.
+
+The **Basic** boot chain with SPL (for STM32MP15x)
+``````````````````````````````````````````````````
+
+defconfig_file :
+   + **stm32mp15_basic_defconfig**
+
+    +-------------+------------+------------+-------+
+    |  ROM code   | FSBL       | SSBL       | OS    |
+    +             +------------+------------+-------+
+    |             |U-Boot SPL  | U-Boot     | Linux |
+    +-------------+------------+------------+-------+
+    | TrustZone   |            | PSCI from U-Boot   |
+    +-------------+------------+------------+-------+
+
+SPL has limited security initialization.
+
+U-Boot is running in secure mode and provide a secure monitor to the kernel
+with only PSCI support (Power State Coordination Interface defined by ARM).
+
+.. warning:: This alternate **basic** boot chain with SPL is not supported/promoted by STMicroelectronics to make product.
+
+Device Tree
+-----------
+
+All the STM32MP15x and STM32MP13x boards supported by U-Boot use the same generic board
+stm32mp1 which supports all the bootable devices.
+
+Each STMicroelectronics board is only configured with the associated device tree.
+
+STM32MP15x device Tree Selection
+````````````````````````````````
+The supported device trees for STM32MP15x (stm32mp15_trusted_defconfig and stm32mp15_basic_defconfig) are:
+
++ ev1: eval board with pmic stpmic1 (ev1 = mother board + daughter ed1)
+
+   + stm32mp157c-ev1
+
++ ed1: daughter board with pmic stpmic1
+
+   + stm32mp157c-ed1
+
++ dk1: Discovery board
+
+   + stm32mp157a-dk1
+
++ dk2: Discovery board = dk1 with a BT/WiFI combo and a DSI panel
+
+   + stm32mp157c-dk2
+
++ avenger96: Avenger96 board from Arrow Electronics based on DH Elec. DHCOR SoM
+
+   + stm32mp15xx-dhcor-avenger96
+
+STM32MP13x device Tree Selection
+````````````````````````````````
+The supported device trees for STM32MP13x (stm32mp13_defconfig) are:
+
++ dk: Discovery board
+
+   + stm32mp135f-dk
+
+
+Build Procedure
+---------------
+
+1. Install the required tools for U-Boot
+
+   * install package needed in U-Boot makefile
+     (libssl-dev, swig, libpython-dev...)
+
+   * install ARMv7 toolchain for 32bit Cortex-A (from Linaro,
+     from SDK for STM32MP15x, or any crosstoolchains from your distribution)
+     (you can use any gcc cross compiler compatible with U-Boot)
+
+2. Set the cross compiler::
+
+    # export CROSS_COMPILE=/path/to/toolchain/arm-linux-gnueabi-
+
+3. Select the output directory (optional)::
+
+   # export KBUILD_OUTPUT=/path/to/output
+
+   for example: use one output directory for each configuration::
+
+   # export KBUILD_OUTPUT=stm32mp13
+   # export KBUILD_OUTPUT=stm32mp15
+   # export KBUILD_OUTPUT=stm32mp15_trusted
+   # export KBUILD_OUTPUT=stm32mp15_basic
+
+   you can build outside of code directory::
+
+   # export KBUILD_OUTPUT=../build/stm32mp15
+
+4. Configure U-Boot::
+
+   # make <defconfig_file>
+
+   with <defconfig_file>:
+
+   - For **trusted** boot mode :
+     - For STM32MP13x: **stm32mp13_defconfig**
+     - For STM32MP15x: **stm32mp15_defconfig** or stm32mp15_trusted_defconfig
+   - For STM32MP15x basic boot mode: stm32mp15_basic_defconfig
+
+5. Configure the device-tree and build the U-Boot image::
+
+   # make DEVICE_TREE=<name> all
+
+   Examples:
+
+  a) trusted boot with FIP on STM32MP15x ev1::
+
+     # export KBUILD_OUTPUT=stm32mp15
+     # make stm32mp15_defconfig
+     # make DEVICE_TREE=stm32mp157c-ev1-scmi all
+
+    or without SCMI support
+
+     # export KBUILD_OUTPUT=stm32mp15
+     # make stm32mp15_defconfig
+     # make DEVICE_TREE=stm32mp157c-ev1 all
+
+  b) trusted boot on STM32MP13x discovery board::
+
+     # export KBUILD_OUTPUT=stm32mp13
+     # make stm32mp13_defconfig
+     # make DEVICE_TREE=stm32mp135f-dk all
+
+    DEVICE_TEE selection is optional as stm32mp135f-dk is the default board of the defconfig::
+
+     # make stm32mp13_defconfig
+     # make all
+
+  c) basic boot on STM32MP15x ev1::
+
+      # export KBUILD_OUTPUT=stm32mp15_basic
+      # make stm32mp15_basic_defconfig
+      # make DEVICE_TREE=stm32mp157c-ev1 all
+
+  d) basic boot on STM32MP15x ed1::
+
+      # export KBUILD_OUTPUT=stm32mp15_basic
+      # make stm32mp15_basic_defconfig
+      # make DEVICE_TREE=stm32mp157c-ed1 all
+
+  e) basic boot on STM32MP15x dk1::
+
+     # export KBUILD_OUTPUT=stm32mp15_basic
+     # make stm32mp15_basic_defconfig
+     # make DEVICE_TREE=stm32mp157a-dk1 all
+
+  f) basic boot on STM32MP15x avenger96::
+
+     # export KBUILD_OUTPUT=stm32mp15_basic
+     # make stm32mp15_basic_defconfig
+     # make DEVICE_TREE=stm32mp15xx-dhcor-avenger96 all
+
+6. U-Boot Output files
+
+   So in the output directory (selected by KBUILD_OUTPUT),
+   you can found the needed U-Boot files:
+
+     - stm32mp13_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb**
+     - stm32mp15_defconfig = **u-boot-nodtb.bin** and **u-boot.dtb**
+
+     - stm32mp15_trusted_defconfig = u-boot.stm32
+
+     - stm32mp15_basic_defconfig
+
+       - FSBL = spl/u-boot-spl.stm32
+
+       - SSBL = u-boot.img (without CONFIG_SPL_LOAD_FIT) or
+                u-boot.itb (with CONFIG_SPL_LOAD_FIT=y)
+
+7. TF-A_ compilation
+
+   This step is required only for **Trusted** boot (stm32mp15_defconfig and
+   stm32mp15_trusted_defconfig); see OP-TEE_ and TF-A_ documentation for build
+   commands.
+
+   - For TF-A_ with FIP support: **stm32mp15_defconfig**
+
+     - with OP-TEE_ support, compile the OP-TEE to generate the binary included
+       in FIP
+
+     - after TF-A compilation, the used  files are:
+
+       - TF-A_ BL2 => FSBL = **tf-a.stm32**
+
+       - FIP => **fip.bin**
+
+         FIP file includes the 2 files given in arguments of TF-A_ compilation:
+
+        - BL33=u-boot-nodtb.bin
+        - BL33_CFG=u-boot.dtb
+
+     You can also update a existing FIP after U-Boot compilation with fiptool,
+     a tool provided by TF-A_::
+
+     # fiptool update --nt-fw u-boot-nodtb.bin --hw-config u-boot.dtb fip-stm32mp157c-ev1.bin
+
+   - For TF-A_ without FIP support : **stm32mp15_trusted_defconfig**
+     SPMin is used and the used files are:
+
+       - FSBL = **tf-a.stm32** (provided by TF-A_ compilation, contening BL2 and
+         BL32 = SPMin)
+
+       - SSBL = **u-boot.stm32** used instead of fip.bin in next chapters
+
+8. The bootloaders files
+
++ The **ROM code** expects FSBL binaries with STM32 image header =
+  tf-a.stm32 or u-boot-spl.stm32
+
+According the FSBL / the boot mode:
+
++ **TF-A** expect a FIP binary = fip.bin, including the OS monitor (SPMin or
+  OP-TEE_) and the U-Boot binary + device tree
+
+  or, without FIP support, binaries with STM32 image header: U-Boot
+  = u-boot.stm32 and eventually  OP-TEE files (tee-header.stm32, tee-pageable.stm32,
+  tee-pager.stm32)
+
++ **SPL** expects SSBL = U-Boot with uImage header = u-boot.img
+  or FIT = u-boot.itb.
+
+
+Switch Setting for Boot Mode
+----------------------------
+
+You can select the boot mode, on the board with one switch, to select
+the boot pin values = BOOT0, BOOT1, BOOT2
+
+  +-------------+---------+---------+---------+
+  |*Boot Mode*  | *BOOT2* | *BOOT1* | *BOOT0* |
+  +=============+=========+=========+=========+
+  | Recovery    |  0      |  0      |  0      |
+  +-------------+---------+---------+---------+
+  | NOR         |  0      |  0      |  1      |
+  +-------------+---------+---------+---------+
+  | eMMC        |  0      |  1      |  0      |
+  +-------------+---------+---------+---------+
+  | NAND        |  0      |  1      |  1      |
+  +-------------+---------+---------+---------+
+  | Reserved    |  1      |  0      |  0      |
+  +-------------+---------+---------+---------+
+  | SD-Card     |  1      |  0      |  1      |
+  +-------------+---------+---------+---------+
+  | Recovery    |  1      |  1      |  0      |
+  +-------------+---------+---------+---------+
+  | SPI-NAND    |  1      |  1      |  1      |
+  +-------------+---------+---------+---------+
+
+- on the STM32MP15x **daughter board ed1 = MB1263** with the switch SW1
+- on STM32MP15x **Avenger96** with switch S3 (NOR and SPI-NAND are not applicable)
+- on board STM32MP15x **DK1/DK2** with the switch SW1 = BOOT0, BOOT2
+  with only 2 pins available (BOOT1 is forced to 0 and NOR not supported),
+  the possible value becomes:
+
+    +-------------+---------+---------+
+    |*Boot Mode*  | *BOOT2* | *BOOT0* |
+    +=============+=========+=========+
+    | Recovery    |  0      |  0      |
+    +-------------+---------+---------+
+    | NOR     (NA)|  0      |  1      |
+    +-------------+---------+---------+
+    | Reserved    |  1      |  0      |
+    +-------------+---------+---------+
+    | SD-Card     |  1      |  1      |
+    +-------------+---------+---------+
+
+Recovery is a boot from serial link (UART/USB) and it is used with
+STM32CubeProgrammer tool to load executable in RAM and to update the flash
+devices available on the board (NOR/NAND/eMMC/SD card).
+
+The communication between HOST and board is based on
+
+  - for UARTs : the uart protocol used with all MCU STM32
+  - for USB : based on USB DFU 1.1 (without the ST extensions used on MCU STM32)
+
+Prepare an SD card
+------------------
+
+The minimal requirements for STMP32MP15x and STM32MP13x boot up to U-Boot are:
+
+- GPT partitioning (with gdisk or with sgdisk)
+- 2 fsbl partitions, named "fsbl1" and "fsbl2", size at least 256KiB
+- one partition named "fip" for FIP or U-Boot (TF-A_ search the "fip"
+  partition and SPL search the 3th partition, because
+  CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3)
+
+The 2 fsbl partitions have the same content and are present to guarantee a
+fail-safe update of FSBL; fsbl2 can be omitted if this ROM code feature is
+not required.
+
+Without FIP support in TF-A_, the 3rd partition "fip" for u-boot.stm32 must
+be named "ssbl".
+
+Then the minimal GPT partition is:
+
+For TF-A_ with FIP support:
+
+  +-------+--------+---------+------------------------+
+  | *Num* | *Name* | *Size*  | *Content*              |
+  +=======+========+=========+========================+
+  | 1     | fsbl1  | 256 KiB | TF-A_ BL2 (tf-a.stm32) |
+  +-------+--------+---------+------------------------+
+  | 2     | fsbl2  | 256 KiB | TF-A_ BL2 (tf-a.stm32) |
+  +-------+--------+---------+------------------------+
+  | 3     | fip    | 4MB     | fip.bin                |
+  +-------+--------+---------+------------------------+
+  | 4     | <any>  | <any>   | Rootfs                 |
+  +-------+--------+---------+------------------------+
+
+or:
+
+  +-------+--------+---------+------------------------+------------------------+
+  | *Num* | *Name* | *Size*  | *Trusted boot content* | *Basic boot content*   |
+  +=======+========+=========+========================+========================+
+  | 1     | fsbl1  | 256 KiB | TF-A_ BL2 (tf-a.stm32) | SPL (u-boot-spl.stm32) |
+  +-------+--------+---------+------------------------+------------------------+
+  | 2     | fsbl2  | 256 KiB | TF-A_ BL2 (tf-a.stm32) | SPL (u-boot-spl.stm32) |
+  +-------+--------+---------+------------------------+------------------------+
+  | 3     | ssbl   | 2MB     | U-Boot (u-boot.stm32)  | U-Boot (u-boot.img)    |
+  +-------+--------+---------+------------------------+------------------------+
+  | 4     | <any>  | <any>   | Rootfs                                          |
+  +-------+--------+---------+------------------------+------------------------+
+
+And the 4th partition (Rootfs) is marked bootable with a file extlinux.conf
+following the Generic Distribution feature (see :doc:`../../develop/distro` for
+use).
+
+The size of fip or ssbl partition must be enough for the associated binary file,
+4MB and 2MB are default values.
+
+According the used card reader select the correct block device
+(for example /dev/sdx or /dev/mmcblk0), in the next example, it is /dev/mmcblk0
+
+For example:
+
+a) remove previous formatting::
+
+     # sgdisk -o /dev/<SD card dev>
+
+b) create minimal image for FIP
+
+   For FIP support in TF-A_::
+
+    # sgdisk --resize-table=128 -a 1 \
+    -n 1:34:545		-c 1:fsbl1 \
+    -n 2:546:1057		-c 2:fsbl2 \
+    -n 3:1058:9249		-c 3:fip \
+    -n 4:9250:			-c 4:rootfs -A 4:set:2 \
+    -p /dev/<SD card dev>
+
+   With gpt table with 128 entries an the partition 4 marked bootable (bit 2).
+
+   For basic boot mode or without FIP support in TF-A_::
+
+    # sgdisk --resize-table=128 -a 1 \
+    -n 1:34:545		-c 1:fsbl1 \
+    -n 2:546:1057		-c 2:fsbl2 \
+    -n 3:1058:5153		-c 3:ssbl \
+    -n 4:5154:		    -c 4:rootfs -A 4:set:2 \
+    -p /dev/<SD card dev>
+
+c) copy the FSBL (2 times) and SSBL file on the correct partition.
+   in this example in partition 1 to 3
+
+   for trusted boot: ::
+
+    # dd if=tf-a.stm32 of=/dev/mmcblk0p1
+    # dd if=tf-a.stm32 of=/dev/mmcblk0p2
+    # dd if=fip.bin of=/dev/mmcblk0p3
+      OR
+      dd if=u-boot.stm32 of=/dev/mmcblk0p3 # Without FIT support
+
+   for basic boot mode : <SD card dev> = /dev/mmcblk0::
+
+    # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p1
+    # dd if=u-boot-spl.stm32 of=/dev/mmcblk0p2
+    # dd if=u-boot.img of=/dev/mmcblk0p3 # Without CONFIG_SPL_LOAD_FIT
+      OR
+      dd if=u-boot.itb of=/dev/mmcblk0p3 # With CONFIG_SPL_LOAD_FIT=y
+
+To boot from SD card, select BootPinMode = 1 0 1 and reset.
+
+Prepare eMMC
+------------
+
+You can use U-Boot to copy binary in eMMC.
+
+In the next example, you need to boot from SD card and the images
+(tf-a.stm32, fip.bin / u-boot-spl.stm32, u-boot.img for systems without
+CONFIG_SPL_LOAD_FIT or u-boot.itb for systems with CONFIG_SPL_LOAD_FIT=y) are
+presents on SD card (mmc 0) in ext4 partition 4 (bootfs)
+
+To boot from SD card, select BootPinMode = 1 0 1 and reset.
+
+Then you update the eMMC with the next U-Boot command :
+
+a) prepare GPT on eMMC,
+   example with 3 partitions, fip, bootfs and roots::
+
+    # setenv emmc_part "name=fip,size=4MiB;name=bootfs,type=linux,bootable,size=64MiB;name=rootfs,type=linux,size=512"
+    # gpt write mmc 1 ${emmc_part}
+
+b) copy FSBL, TF-A_ or SPL, on first eMMC boot partition
+   (SPL max size is 256kB, with LBA 512, 0x200)::
+
+    # ext4load mmc 0:4 0xC0000000 tf-a.stm32
+    or
+    # ext4load mmc 0:4 0xC0000000 u-boot-spl.stm32
+
+    # mmc dev 1
+    # mmc partconf 1 1 1 1
+    # mmc write ${fileaddr} 0 200
+    # mmc partconf 1 1 1 0
+
+c) copy SSBL, FIP or U-Boot binary, in first GPT partition of eMMC::
+
+    # ext4load mmc 0:4 0xC0000000 fip.bin
+    or
+    # ext4load mmc 0:4 0xC0000000 u-boot.img # Without CONFIG_SPL_LOAD_FIT
+    or
+    # ext4load mmc 0:4 0xC0000000 u-boot.itb # With CONFIG_SPL_LOAD_FIT=y
+
+
+    # mmc dev 1
+    # part start mmc 1 1 partstart
+    # mmc write ${fileaddr} ${partstart} ${filesize}
+
+To boot from eMMC, select BootPinMode = 0 1 0 and reset.
+
+MAC Address
+-----------
+
+Please read doc/README.enetaddr for the implementation guidelines for mac id
+usage. Basically, environment has precedence over board specific storage.
+
+For STMicroelectronics board, it is retrieved in:
+
+ - STM32MP15x OTP:
+
+   - OTP_57[31:0] = MAC_ADDR[31:0]
+   - OTP_58[15:0] = MAC_ADDR[47:32]
+
+ - STM32MP13x OTP:
+
+  - OTP_57[31:0]  = MAC_ADDR0[31:0]
+  - OTP_58[15:0]  = MAC_ADDR0[47:32]
+  - OTP_58[31:16] = MAC_ADDR1[15:0]
+  - OTP_59[31:0]  = MAC_ADDR1[47:16]
+
+To program a MAC address on virgin STM32MP15x OTP words above, you can use the fuse command
+on bank 0 to access to internal OTP and lock them:
+
+In the next example we are using the 2 OTPs used on STM32MP15x.
+
+Prerequisite: check if a MAC address isn't yet programmed in OTP
+
+1) check OTP: their value must be equal to 0::
+
+    STM32MP> fuse sense 0 57 2
+    Sensing bank 0:
+    Word 0x00000039: 00000000 00000000
+
+2) check environment variable::
+
+    STM32MP> env print ethaddr
+    ## Error: "ethaddr" not defined
+
+3) check lock status of fuse 57 & 58 (at 0x39, 0=unlocked, 0x40000000=locked)::
+
+    STM32MP> fuse sense 0 0x10000039 2
+    Sensing bank 0:
+       Word 0x10000039: 00000000 00000000
+
+Example to set mac address "12:34:56:78:9a:bc"
+
+1) Write OTP::
+
+    STM32MP> fuse prog -y 0 57 0x78563412 0x0000bc9a
+
+2) Read OTP::
+
+    STM32MP> fuse sense 0 57 2
+    Sensing bank 0:
+    Word 0x00000039: 78563412 0000bc9a
+
+3) Lock OTP::
+
+    STM32MP> fuse prog 0 0x10000039 0x40000000 0x40000000
+
+    STM32MP> fuse sense 0 0x10000039 2
+    Sensing bank 0:
+       Word 0x10000039: 40000000 40000000
+
+4) next REBOOT, in the trace::
+
+    ### Setting environment from OTP MAC address = "12:34:56:78:9a:bc"
+
+5) check env update::
+
+    STM32MP> env print ethaddr
+    ethaddr=12:34:56:78:9a:bc
+
+.. warning:: This command can't be executed twice on the same board as
+             OTP are protected. It is already done for the board
+             provided by STMicroelectronics.
+
+Coprocessor firmware on STM32MP15x
+----------------------------------
+
+U-Boot can boot the coprocessor before the kernel (coprocessor early boot).
+
+a) Manuallly by using rproc commands (update the bootcmd)
+
+   Configurations::
+
+	# env set name_copro "rproc-m4-fw.elf"
+	# env set dev_copro 0
+	# env set loadaddr_copro 0xC1000000
+
+   Load binary from bootfs partition (number 4) on SD card (mmc 0)::
+
+	# ext4load mmc 0:4 ${loadaddr_copro} ${name_copro}
+
+   => ${filesize} variable is updated with the size of the loaded file.
+
+   Start M4 firmware with remote proc command::
+
+	# rproc init
+	# rproc load ${dev_copro} ${loadaddr_copro} ${filesize}
+	# rproc start ${dev_copro}"00270033
+
+b) Automatically by using FIT feature and generic DISTRO bootcmd
+
+   see examples in the board stm32mp1 directory: fit_copro_kernel_dtb.its
+
+   Generate FIT including kernel + device tree + M4 firmware with cfg with M4
+   boot::
+
+   $> mkimage -f fit_copro_kernel_dtb.its fit_copro_kernel_dtb.itb
+
+   Then using DISTRO configuration file: see extlinux.conf to select the correct
+   configuration:
+
+   - stm32mp157c-ev1-m4
+   - stm32mp157c-dk2-m4
+
+DFU support
+-----------
+
+The DFU is supported on ST board.
+
+The env variable dfu_alt_info is automatically build, and all
+the memory present on the ST boards are exported.
+
+The dfu mode is started by the command::
+
+  STM32MP> dfu 0
+
+On EV1 board, booting from SD card, without OP-TEE_::
+
+  STM32MP> dfu 0 list
+  DFU alt settings list:
+  dev: RAM alt: 0 name: uImage layout: RAM_ADDR
+  dev: RAM alt: 1 name: devicetree.dtb layout: RAM_ADDR
+  dev: RAM alt: 2 name: uramdisk.image.gz layout: RAM_ADDR
+  dev: eMMC alt: 3 name: mmc0_fsbl1 layout: RAW_ADDR
+  dev: eMMC alt: 4 name: mmc0_fsbl2 layout: RAW_ADDR
+  dev: eMMC alt: 5 name: mmc0_fip layout: RAW_ADDR
+  dev: eMMC alt: 6 name: mmc0_bootfs layout: RAW_ADDR
+  dev: eMMC alt: 7 name: mmc0_vendorfs layout: RAW_ADDR
+  dev: eMMC alt: 8 name: mmc0_rootfs layout: RAW_ADDR
+  dev: eMMC alt: 9 name: mmc0_userfs layout: RAW_ADDR
+  dev: eMMC alt: 10 name: mmc1_boot1 layout: RAW_ADDR
+  dev: eMMC alt: 11 name: mmc1_boot2 layout: RAW_ADDR
+  dev: eMMC alt: 12 name: mmc1_fip layout: RAW_ADDR
+  dev: eMMC alt: 13 name: mmc1_bootfs layout: RAW_ADDR
+  dev: eMMC alt: 14 name: mmc1_vendorfs layout: RAW_ADDR
+  dev: eMMC alt: 15 name: mmc1_rootfs layout: RAW_ADDR
+  dev: eMMC alt: 16 name: mmc1_userfs layout: RAW_ADDR
+  dev: MTD alt: 17 name: nor0 layout: RAW_ADDR
+  dev: MTD alt: 18 name: nor1 layout: RAW_ADDR
+  dev: MTD alt: 19 name: nand0 layout: RAW_ADDR
+  dev: VIRT alt: 20 name: OTP layout: RAW_ADDR
+  dev: VIRT alt: 21 name: PMIC layout: RAW_ADDR
+
+All the supported device are exported for dfu-util tool::
+
+  $> dfu-util -l
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=21, name="PMIC", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="OTP", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="nand0", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nor1", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor0", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="mmc1_userfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="mmc1_rootfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=14, name="mmc1_vendorfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=13, name="mmc1_bootfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=12, name="mmc1_fip", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=11, name="mmc1_boot2", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=10, name="mmc1_boot1", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=9, name="mmc0_userfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=8, name="mmc0_rootfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=7, name="mmc0_vendorfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=6, name="mmc0_bootfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=5, name="mmc0_fip", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=4, name="mmc0_fsbl2", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=3, name="mmc0_fsbl1", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=2, name="uramdisk.image.gz", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=1, name="devicetree.dtb", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=0, name="uImage", serial="002700333338511934383330"
+
+You can update the boot device:
+
+- SD card (mmc0)::
+
+  $> dfu-util -d 0483:5720 -a 3 -D tf-a-stm32mp157c-ev1.stm32
+  $> dfu-util -d 0483:5720 -a 4 -D tf-a-stm32mp157c-ev1.stm32
+  $> dfu-util -d 0483:5720 -a 5 -D fip-stm32mp157c-ev1.bin
+  $> dfu-util -d 0483:5720 -a 6 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 7 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 8 -D st-image-weston-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 9 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4
+
+- EMMC (mmc1)::
+
+  $> dfu-util -d 0483:5720 -a 10 -D tf-a-stm32mp157c-ev1.stm32
+  $> dfu-util -d 0483:5720 -a 11 -D tf-a-stm32mp157c-ev1.stm32
+  $> dfu-util -d 0483:5720 -a 12 -D fip-stm32mp157c-ev1.bin
+  $> dfu-util -d 0483:5720 -a 13 -D st-image-bootfs-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 14 -D st-image-vendorfs-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 15 -D st-image-weston-openstlinux-weston-stm32mp1.ext4
+  $> dfu-util -d 0483:5720 -a 16 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4
+
+- you can also dump the OTP and the PMIC NVM with::
+
+  $> dfu-util -d 0483:5720 -a 19 -U otp.bin
+  $> dfu-util -d 0483:5720 -a 20 -U pmic.bin
+
+
+When the board is booting for nor0 or nand0,
+only the MTD partition on the boot devices are available, for example:
+
+- NOR (nor0 = alt 20, nor1 = alt 26) & NAND (nand0 = alt 27) :
+
+  $> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1.stm32
+  $> dfu-util -d 0483:5720 -a 22 -D tf-a-stm32mp157c-ev1.stm32
+  $> dfu-util -d 0483:5720 -a 23 -D fip-stm32mp157c-ev1.bin
+  $> dfu-util -d 0483:5720 -a 28 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi
+
+- NAND (nand0 = alt 21)::
+
+  $> dfu-util -d 0483:5720 -a 22 -D tf-a-stm32mp157c-ev1.stm32
+  $> dfu-util -d 0483:5720 -a 23 -D fip-stm32mp157c-ev1.bin
+  $> dfu-util -d 0483:5720 -a 24 -D fip-stm32mp157c-ev1.bin
+  $> dfu-util -d 0483:5720 -a 25 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi
+
+References
+----------
+
+.. _WIKI:
+
+STM32 Arm® Cortex®-based MPUs user guide
+
+  + https://wiki.st.com/
+  + https://wiki.st.com/stm32mpu/wiki/Main_Page
+
+.. _TF-A:
+
+TF-A = The Trusted Firmware-A project provides a reference implementation of
+secure world software for Armv7-A and Armv8-A class processors
+
+  + https://www.trustedfirmware.org/projects/tf-a/
+  + https://trustedfirmware-a.readthedocs.io/en/latest/
+  + https://trustedfirmware-a.readthedocs.io/en/latest/plat/stm32mp1.html
+  + https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/
+
+.. _OP-TEE:
+
+OP-TEE = an open source Trusted Execution Environment (TEE) implementing the
+Arm TrustZone technology
+
+  + https://www.op-tee.org/
+  + https://optee.readthedocs.io/en/latest/
+  + https://optee.readthedocs.io/en/latest/building/devices/stm32mp1.html
+  + https://github.com/OP-TEE/optee_os
\ No newline at end of file
diff --git a/doc/board/starfive/index.rst b/doc/board/starfive/index.rst
new file mode 100644
index 00000000000..72ab6ddfbf6
--- /dev/null
+++ b/doc/board/starfive/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+StarFive
+========
+
+.. toctree::
+   :maxdepth: 1
+
+   milk-v_mars
+   milk-v_mars_cm
+   pine64_star64
+   visionfive2
diff --git a/doc/board/starfive/milk-v_mars.rst b/doc/board/starfive/milk-v_mars.rst
new file mode 100644
index 00000000000..554932ecfd4
--- /dev/null
+++ b/doc/board/starfive/milk-v_mars.rst
@@ -0,0 +1,111 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Milk-V Mars
+===========
+
+U-Boot for the Milk-V Mars uses the same U-Boot binaries as the VisionFive 2
+board. In U-Boot SPL the actual board is detected and the device-tree patched
+accordingly.
+
+Building
+~~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+The M-mode software OpenSBI provides the supervisor binary interface (SBI) and
+is responsible for the switch to S-Mode. It is a prerequisite to build U-Boot.
+Support for the JH7110 was introduced in OpenSBI 1.2. It is recommended to use
+a current release.
+
+.. code-block:: console
+
+	git clone https://github.com/riscv/opensbi.git
+	cd opensbi
+	make PLATFORM=generic FW_TEXT_START=0x40000000 FW_OPTIONS=0
+
+Now build the U-Boot SPL and U-Boot proper.
+
+.. code-block:: console
+
+	cd <U-Boot-dir>
+	make starfive_visionfive2_defconfig
+	make OPENSBI=$(opensbi_dir)/build/platform/generic/firmware/fw_dynamic.bin
+
+This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well
+as the FIT image (u-boot.itb) with OpenSBI and U-Boot.
+
+Device-tree selection
+~~~~~~~~~~~~~~~~~~~~~
+
+Depending on the board version U-Boot set variable $fdtfile to either
+starfive/jh7110-starfive-visionfive-2-v1.2a.dtb or
+starfive/jh7110-starfive-visionfive-2-v1.3b.dtb.
+
+To overrule this selection the variable can be set manually and saved in the
+environment
+
+::
+
+    setenv fdtfile my_device-tree.dtb
+    env save
+
+or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to set to
+provide a default value.
+
+Boot source selection
+~~~~~~~~~~~~~~~~~~~~~
+
+The board provides the DIP switches MSEL[1:0] to select the boot device out of
+SPI flash, eMMC, SD-card, UART. To select booting from SD-card set the DIP
+switches MSEL[1:0] to 10.
+
+Preparing the SD-Card
+~~~~~~~~~~~~~~~~~~~~~
+
+The device firmware loads U-Boot SPL (u-boot-spl.bin.normal.out) from the
+partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free
+to choose any partition number.
+
+With the default configuration U-Boot SPL loads the U-Boot FIT image
+(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2).
+When formatting it is recommended to use GUID
+BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition.
+
+The FIT image (u-boot.itb) is a combination of OpenSBI's fw_dynamic.bin,
+u-boot-nodtb.bin and the device tree blob.
+
+Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch)
+
+.. code-block:: bash
+
+	sudo sgdisk --clear \
+	  --set-alignment=2 \
+	  --new=1:4096:8191 --change-name=1:spl --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985\
+	  --new=2:8192:16383 --change-name=2:uboot --typecode=2:BC13C2FF-59E6-4262-A352-B275FD6F7172  \
+	  --new=3:16384:1654784 --change-name=3:system --typecode=3:EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 \
+	  /dev/sdb
+
+Copy U-Boot to the SD card
+
+.. code-block:: bash
+
+	sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1
+	sudo dd if=u-boot.itb of=/dev/sdb2
+
+	sudo mount /dev/sdb3 /mnt/
+	sudo cp u-boot-spl.bin.normal.out /mnt/
+	sudo cp u-boot.itb /mnt/
+	sudo cp Image.gz /mnt/
+	sudo cp initramfs.cpio.gz /mnt/
+	sudo cp jh7110-starfive-visionfive-2.dtb /mnt/
+	sudo umount /mnt
+
+Booting
+~~~~~~~
+
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
diff --git a/doc/board/starfive/milk-v_mars_cm.rst b/doc/board/starfive/milk-v_mars_cm.rst
new file mode 100644
index 00000000000..52d4e5e9098
--- /dev/null
+++ b/doc/board/starfive/milk-v_mars_cm.rst
@@ -0,0 +1,193 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Milk-V Mars CM
+==============
+
+U-Boot for the Milk-V Mars CM uses the same U-Boot binaries as the VisionFive 2
+board. In U-Boot SPL the actual board is detected and the device-tree patched
+accordingly.
+
+The Milk-V Mars CM Lite comes without eMMC and needs a different pin muxing
+than the Milk-V Mars CM. The availability and size of the eMMC shows up in the
+serial number displayed by the *mac* command, e.g.
+MARC-V10-2340-D002E016-00000304. The number after the E is the MMC size. U-Boot
+takes a value of E000 as an indicator for the Lite version. Unfortunately the
+vendor has not set this value correctly on some Lite boards.
+
+Please, use CONFIG_STARFIVE_NO_EMMC=y if EEPROM data indicates eMMC is present
+on the Milk-V Mars CM Lite. Otherwise you will not be able to read from the
+SD-card.
+
+The serial number can be corrected using the *mac* command:
+
+.. code-block::
+
+    mac read_eeprom
+    mac product_id MARC-V10-2340-D002E000-00000304
+    mac write_eeprom
+
+.. note::
+
+   The *mac initialize* command overwrites the vendor string and the MAC
+   addresses. This is why it is avoided here.
+
+By default the EEPROM is write protected. The write protection may be overcome
+by connecting the "GND" and "EN" test pads on top of the module.
+
+Building
+~~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+The M-mode software OpenSBI provides the supervisor binary interface (SBI) and
+is responsible for the switch to S-Mode. It is a prerequisite to build U-Boot.
+Support for the JH7110 was introduced in OpenSBI 1.2. It is recommended to use
+a current release.
+
+.. code-block:: console
+
+	git clone https://github.com/riscv/opensbi.git
+	cd opensbi
+	make PLATFORM=generic FW_TEXT_START=0x40000000
+
+(*FW_TEXT_START* is not needed anymore after OpenSBI patch d4d2582eef7a
+"firmware: remove FW_TEXT_START" which should appear in OpenSBI 1.5.)
+
+Now build the U-Boot SPL and U-Boot proper.
+
+.. code-block:: console
+
+	cd <U-Boot-dir>
+	make starfive_visionfive2_defconfig
+	make OPENSBI=$(opensbi_dir)/build/platform/generic/firmware/fw_dynamic.bin
+
+This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well
+as the FIT image (u-boot.itb) with OpenSBI and U-Boot.
+
+Device-tree selection
+~~~~~~~~~~~~~~~~~~~~~
+
+Depending on the board version U-Boot sets variable $fdtfile to either
+starfive/jh7110-milkv-mars-cm.dtb (with eMMC storage) or
+starfive/jh7110-milkv-mars-cm-lite.dtb (without eMMC storage).
+
+To overrule this selection the variable can be set manually and saved in the
+environment
+
+::
+
+    env set fdtfile my_device-tree.dtb
+    env save
+
+or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to set to
+provide a default value.
+
+The variable *$fdtfile* is used in the boot process to automatically load
+a device-tree provided by the operating system. For details of the boot
+process refer to the :doc:`/develop/bootstd/index`
+description.
+
+Boot source selection
+~~~~~~~~~~~~~~~~~~~~~
+
+The low speed connector nRPIBOOT line is used to switch the boot source.
+
+* If nRPIBOOT is connected to ground, the board boots from UART.
+* If nRPIBOOT is not connected, the board boots from SPI flash.
+
+Compute module boards typically have a switch or jumper for this line.
+
+Flashing a new U-Boot version
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+U-Boot SPL is provided as file spl/u-boot-spl.bin.normal.out. Main U-Boot is
+in file u-boot.itb.
+
+Assuming your new U-Boot version is on partition 1 of an SD-card you could
+install it to the SPI flash with:
+
+::
+
+    sf probe
+    load mmc 0:1 $kernel_addr_r u-boot-spl.bin.normal.out
+    sf update $kernel_addr_r 0 $filesize
+    load mmc 0:1 $kernel_addr_r u-boot.itb
+    sf update $kernel_addr_r 0x100000 $filesize
+
+For loading the files from a TFTP server refer to the dhcp and tftpboot
+commands.
+
+After updating U-Boot you may want to reboot and reset the environment to the
+default.
+
+::
+
+    env default -f -a
+    env save
+
+Booting from UART
+~~~~~~~~~~~~~~~~~
+
+For booting via UART U-Boot must be built with CONFIG_SPL_YMODEM_SUPPORT=y.
+
+With nRPIBOOT connected to ground for UART boot, power the board and upload
+u-boot-spl.bin.normal.out via XMODEM. Then upload u-boot.itb via YMODEM.
+
+The XMODEM implementation in the boot ROM is not fully specification compliant.
+It sends too many NAKs in a row. Tio is a terminal emulation that tolerates
+these faults.
+
+::
+
+    $ tio -b 115200 --databits 8 --flow none --stopbits 1 /dev/ttyUSB0
+    [08:14:54.700] tio v2.7
+    [08:14:54.700] Press ctrl-t q to quit
+    [08:14:54.701] Connected
+
+    (C)StarFive
+    CCC
+    (C)StarFive
+    CCCCCCCC
+
+Press *ctrl-t x* to initiate XMODEM-1K transfer.
+
+::
+
+    [08:15:14.778] Send file with XMODEM
+    [08:15:22.459] Sending file 'u-boot-spl.bin.normal.out'
+    [08:15:22.459] Press any key to abort transfer
+    ........................................................................
+    .......................................................................|
+    [08:15:22.459] Done
+
+    U-Boot SPL 2024.07-rc1-00075-gd6a4ab20097 (Apr 25 2024 - 16:32:10 +0200)
+    DDR version: dc2e84f0.
+    Trying to boot from UART
+    CC
+
+Press *ctrl-t y* to initiate YMODEM transfer.
+
+::
+
+    [08:15:50.331] Send file with YMODEM
+    [08:15:53.540] Sending file 'u-boot.itb'
+    [08:15:53.540] Press any key to abort transfer
+    ........................................................................
+    …
+    ...............|
+    [08:15:53.540] Done
+    Loaded 1040599 bytes
+
+
+    U-Boot 2024.07-rc1-00075-gd6a4ab20097 (Apr 25 2024 - 16:32:10 +0200)
+
+Booting from SPI flash
+~~~~~~~~~~~~~~~~~~~~~~
+
+With nRPIBOOT disconnected from ground for SPI boot, power up the board. You
+should see the U-Boot prompt on the serial console.
diff --git a/doc/board/starfive/pine64_star64.rst b/doc/board/starfive/pine64_star64.rst
new file mode 100644
index 00000000000..52e9a907917
--- /dev/null
+++ b/doc/board/starfive/pine64_star64.rst
@@ -0,0 +1,201 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Pine64 Star64
+=============
+
+U-Boot for the Star64 uses the same U-Boot binaries as the VisionFive 2 board.
+In U-Boot SPL the actual board is detected and the device-tree patched
+accordingly.
+
+Building
+~~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+The M-mode software OpenSBI provides the supervisor binary interface (SBI) and
+is responsible for the switch to S-Mode. It is a prerequisite to build U-Boot.
+Support for the JH7110 was introduced in OpenSBI 1.2. It is recommended to use
+a current release.
+
+.. code-block:: console
+
+	git clone https://github.com/riscv/opensbi.git
+	cd opensbi
+	make PLATFORM=generic FW_TEXT_START=0x40000000
+
+Now build the U-Boot SPL and U-Boot proper.
+
+.. code-block:: console
+
+	cd <U-Boot-dir>
+	make starfive_visionfive2_defconfig
+	make OPENSBI=$(opensbi_dir)/build/platform/generic/firmware/fw_dynamic.bin
+
+This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well
+as the FIT image (u-boot.itb) with OpenSBI and U-Boot.
+
+Device-tree selection
+~~~~~~~~~~~~~~~~~~~~~
+
+U-Boot will set variable $fdtfile to starfive/jh7110-pine64-star64.dtb.
+
+To overrule this selection the variable can be set manually and saved in the
+environment
+
+::
+
+    env set fdtfile my_device-tree.dtb
+    env save
+
+or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to set to
+provide a default value.
+
+Boot source selection
+~~~~~~~~~~~~~~~~~~~~~
+
+Boot mode is selected by an MSEL-DIP marked S1804 and GPIO_0 position adjacent
+to the 40pin GPIO header. ON/ONKE and number markings of the MSEL-DIP are
+misleading; Instead refer to the ``L`` (0) and ``H`` (1) silkscreen for
+accurate selection.
+
++ (QSPI) Flash: 00
++ SD: 01
++ EMMC: 10
++ UART: 11
+
+Preparing the SD-Card
+~~~~~~~~~~~~~~~~~~~~~
+
+The device firmware loads U-Boot SPL (u-boot-spl.bin.normal.out) from the
+partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free
+to choose any partition number.
+
+With the default configuration U-Boot SPL loads the U-Boot FIT image
+(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2).
+When formatting it is recommended to use GUID
+BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition.
+
+The FIT image (u-boot.itb) is a combination of OpenSBI's fw_dynamic.bin,
+u-boot-nodtb.bin and the device tree blob.
+
+Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch)
+
+.. code-block:: bash
+
+	sudo sgdisk --clear \
+	  --set-alignment=2 \
+	  --new=1:4096:8191 --change-name=1:spl --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985\
+	  --new=2:8192:16383 --change-name=2:uboot --typecode=2:BC13C2FF-59E6-4262-A352-B275FD6F7172  \
+	  --new=3:16384:1654784 --change-name=3:system --typecode=3:EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 \
+	  /dev/sdb
+
+Copy U-Boot to the SD card
+
+.. code-block:: bash
+
+	sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1
+	sudo dd if=u-boot.itb of=/dev/sdb2
+
+	sudo mount /dev/sdb3 /mnt/
+	sudo cp u-boot-spl.bin.normal.out /mnt/
+	sudo cp u-boot.itb /mnt/
+	sudo cp Image.gz /mnt/
+	sudo cp initramfs.cpio.gz /mnt/
+	sudo cp jh7110-starfive-visionfive-2.dtb /mnt/
+	sudo umount /mnt
+
+Booting
+~~~~~~~
+
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
+
+Serial Number and MAC address issues
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+U-Boot requires valid EEPROM data to determine which board-specific fix-up to
+apply at runtime. This affects the size of memory initialized, network mac
+address numbering, and tuning of the network PHYs.
+
+The Star64 does not currently ship with unique serial numbers per-device.
+Devices follow a pattern where the last mac address bytes are a sum of 0x7558
+and the serial number (lower port mac0), or a sum of 0x7559 and the serial
+number (upper port mac1).
+
+As tested there are several 4gb model units where the serial number and network
+mac addresses collide with other devices (serial
+``STAR64V1-2310-D004E000-00000005``, MACs ``6c:cf:39:00:75:61``,
+``6c:cf:39:00:75:62``)
+
+Some early Star64 boards shipped with an uninitialized EEPROM and no write
+protect pull-up resistor in place. Later units of all 4gb and 8gb models
+sharing the same serial number in EEPROM data will have this problem that the
+network mac addresses are alike between different models and this may be
+corrected by defeating the write protect resistor to write new values. As an
+alternative to this, it may be worked around by overriding the mac addresses
+via U-Boot environment variables.
+
+It is required for any unit having uninitialized EEPROM and recommended for
+all later Star64 4gb model units (not properly serialized) to have decided on a
+new 6-byte serial number. This serial number should be high enough to
+avoid collision with other JH7110 boards and low enough not to overflow i.e.
+between ``cafe00`` and ``f00d00``.
+
+Update EEPROM values
+^^^^^^^^^^^^^^^^^^^^
+
+1. Prepare EEPROM data in memory
+
+::
+
+	## When there is no error to load existing data:
+	mac read_eeprom
+
+	## When there is an error to load non-existing data:
+	# "DRAM:  Not a StarFive EEPROM data format - magic error"
+	mac initialize
+
+2. Set Star64 values
+
+::
+
+	## Common values
+	mac vendor PINE64
+	mac pcb_revision c1
+	mac bom_revision A
+
+	## Device-specific values
+	# Year 2023 week 10 production date, 8GB DRAM, optional eMMC, serial cdef01
+	mac product_id STAR64V1-2310-D008E000-00cdef01
+
+	# Last three bytes mac0: 0x7558 + serial number 0xcdef01
+	mac mac0_address 6c:cf:39:ce:64:59
+
+	# Last three bytes mac1: 0x7559 + serial number 0xcdef01
+	mac mac1_address 6c:cf:39:ce:64:5a
+
+3. Defeat write-protect pull-up resistor (if installed) and write to EEPROM
+
+::
+
+	mac write_eeprom
+
+Set Variables in U-Boot
+^^^^^^^^^^^^^^^^^^^^^^^
+
+.. note:: Changing just the serial number will not alter your MAC address
+
+The MAC addresses may be "set" as follows by writing as a custom config to SPI
+(Change the last 3 bytes of MAC addreses as appropriate):
+
+::
+
+	env set serial# STAR64V1-2310-D008E000-00cdef01
+	env set ethaddr 6c:cf:39:ce:64:59
+	env set eth1addr 6c:cf:39:ce:64:5a
+	env save
+	reset
diff --git a/doc/board/starfive/visionfive2.rst b/doc/board/starfive/visionfive2.rst
new file mode 100644
index 00000000000..2c68df3ce4d
--- /dev/null
+++ b/doc/board/starfive/visionfive2.rst
@@ -0,0 +1,512 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+StarFive VisionFive2
+====================
+
+JH7110 RISC-V SoC
+-----------------
+
+The JH7110 is 4+1 64-bit RISC-V SoC from StarFive.
+
+The StarFive VisionFive2 development platform is based on JH7110 and capable
+of running Linux.
+
+Mainline support
+----------------
+
+The support for following drivers are already enabled:
+
+1. ns16550 UART Driver.
+2. StarFive JH7110 clock Driver.
+3. StarFive JH7110 reset Driver.
+4. Cadence QSPI controller Driver.
+5. MMC SPI Driver for MMC/SD support.
+6. PLDA PCIE controller driver.
+7. On-board VL805 PCIE-USB controller driver.
+
+Booting from MMC using U-Boot SPL
+---------------------------------
+
+The current U-Boot port is supported in S-mode only and loaded from DRAM.
+
+A prior stage M-mode firmware/bootloader (e.g OpenSBI) is required to
+boot the u-boot.itb in S-mode and provide M-mode runtime services.
+
+Currently, the u-boot.itb is used as a dynamic of the OpenSBI FW_DYNAMIC
+firmware with the latest.
+
+Building
+~~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+Before building U-Boot SPL, OpenSBI must be built first. OpenSBI can be
+cloned and built for JH7110 as below:
+
+.. code-block:: console
+
+	git clone https://github.com/riscv/opensbi.git
+	cd opensbi
+	make PLATFORM=generic FW_TEXT_START=0x40000000 FW_OPTIONS=0
+
+The VisionFive 2 support for OpenSBI was introduced after the v1.2 release.
+
+More detailed description of steps required to build FW_DYNAMIC firmware
+is beyond the scope of this document. Please refer OpenSBI documenation.
+(Note: OpenSBI git repo is at https://github.com/riscv/opensbi.git)
+
+Now build the U-Boot SPL and U-Boot proper
+
+.. code-block:: console
+
+	cd <U-Boot-dir>
+	make starfive_visionfive2_defconfig
+	make OPENSBI=$(opensbi_dir)/opensbi/build/platform/generic/firmware/fw_dynamic.bin
+
+This will generate the U-Boot SPL image (spl/u-boot-spl.bin.normal.out) as well
+as the FIT image (u-boot.itb) with OpenSBI and U-Boot.
+
+Device-tree selection
+~~~~~~~~~~~~~~~~~~~~~
+
+Depending on the board version U-Boot set variable $fdtfile to either
+starfive/jh7110-starfive-visionfive-2-v1.2a.dtb or
+starfive/jh7110-starfive-visionfive-2-v1.3b.dtb.
+
+To overrule this selection the variable can be set manually and saved in the
+environment
+
+::
+
+    setenv fdtfile my_device-tree.dtb
+    env save
+
+or the configuration variable CONFIG_DEFAULT_FDT_FILE can be used to provide
+a default value.
+
+Flashing
+~~~~~~~~
+
+The device firmware loads U-Boot SPL (u-boot-spl.bin.normal.out) from the
+partition with type GUID 2E54B353-1271-4842-806F-E436D6AF6985. You are free
+to choose any partition number.
+
+With the default configuration U-Boot SPL loads the U-Boot FIT image
+(u-boot.itb) from partition 2 (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2).
+When formatting it is recommended to use GUID
+BC13C2FF-59E6-4262-A352-B275FD6F7172 for this partition.
+
+The FIT image (u-boot.itb) is a combination of OpenSBI's fw_dynamic.bin,
+u-boot-nodtb.bin and the device tree blob
+(jh7110-starfive-visionfive-2-v1.3b.dtb or
+jh7110-starfive-visionfive-2-v1.2a.dtb).
+
+Format the SD card (make sure the disk has GPT, otherwise use gdisk to switch)
+
+.. code-block:: bash
+
+	sudo sgdisk --clear \
+	  --set-alignment=2 \
+	  --new=1:4096:8191 --change-name=1:spl --typecode=1:2E54B353-1271-4842-806F-E436D6AF6985\
+	  --new=2:8192:16383 --change-name=2:uboot --typecode=2:BC13C2FF-59E6-4262-A352-B275FD6F7172  \
+	  --new=3:16384:1654784 --change-name=3:system --typecode=3:EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 \
+	  /dev/sdb
+
+Program the SD card
+
+.. code-block:: bash
+
+	sudo dd if=u-boot-spl.bin.normal.out of=/dev/sdb1
+	sudo dd if=u-boot.itb of=/dev/sdb2
+
+	sudo mount /dev/sdb3 /mnt/
+	sudo cp u-boot-spl.bin.normal.out /mnt/
+	sudo cp u-boot.itb /mnt/
+	sudo cp Image.gz /mnt/
+	sudo cp initramfs.cpio.gz /mnt/
+	sudo cp jh7110-starfive-visionfive-2.dtb /mnt/
+	sudo umount /mnt
+
+Booting
+~~~~~~~
+
+The board provides the DIP switches MSEL[1:0] to select the boot device.
+To select booting from SD-card set the DIP switches MSEL[1:0] to 10.
+
+Once you plugin the sdcard and power up, you should see the U-Boot prompt.
+
+Sample boot log from StarFive VisionFive2 board
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: none
+
+
+	U-Boot SPL 2023.04-rc2-00055-gfc43b9c51a-dirty (Mar 02 2023 - 10:51:39 +0800)
+	DDR version: dc2e84f0.
+	Trying to boot from MMC2
+
+	OpenSBI v1.2-80-g4b28afc
+	  ____                    _____ ____ _____
+	 / __ \                  / ____|  _ \_   _|
+	| |  | |_ __   ___ _ __ | (___ | |_) || |
+	| |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
+	| |__| | |_) |  __/ | | |____) | |_) || |_
+	 \____/| .__/ \___|_| |_|_____/|____/_____|
+	       | |
+	       |_|
+
+	Platform Name             : StarFive VisionFive 2 v1.3B
+	Platform Features         : medeleg
+	Platform HART Count       : 5
+	Platform IPI Device       : aclint-mswi
+	Platform Timer Device     : aclint-mtimer @ 4000000Hz
+	Platform Console Device   : uart8250
+	Platform HSM Device       : ---
+	Platform PMU Device       : ---
+	Platform Reboot Device    : ---
+	Platform Shutdown Device  : ---
+	Platform Suspend Device   : ---
+	Firmware Base             : 0x40000000
+	Firmware Size             : 264 KB
+	Firmware RW Offset        : 0x20000
+	Runtime SBI Version       : 1.0
+
+	Domain0 Name              : root
+	Domain0 Boot HART         : 2
+	Domain0 HARTs             : 0*,1*,2*,3*,4*
+	Domain0 Region00          : 0x0000000002000000-0x000000000200ffff M: (I,R,W) S/U: ()
+	Domain0 Region01          : 0x0000000040000000-0x000000004001ffff M: (R,X) S/U: ()
+	Domain0 Region02          : 0x0000000040000000-0x000000004007ffff M: (R,W) S/U: ()
+	Domain0 Region03          : 0x0000000000000000-0xffffffffffffffff M: (R,W,X) S/U: (R,W,X)
+	Domain0 Next Address      : 0x0000000040200000
+	Domain0 Next Arg1         : 0x0000000040287970
+	Domain0 Next Mode         : S-mode
+	Domain0 SysReset          : yes
+	Domain0 SysSuspend        : yes
+
+	Boot HART ID              : 2
+	Boot HART Domain          : root
+	Boot HART Priv Version    : v1.11
+	Boot HART Base ISA        : rv64imafdcbx
+	Boot HART ISA Extensions  : none
+	Boot HART PMP Count       : 8
+	Boot HART PMP Granularity : 4096
+	Boot HART PMP Address Bits: 34
+	Boot HART MHPM Count      : 2
+	Boot HART MIDELEG         : 0x0000000000000222
+	Boot HART MEDELEG         : 0x000000000000b109
+
+
+	U-Boot 2023.04-rc2-00055-gfc43b9c51a-dirty (Mar 02 2023 - 10:51:39 +0800)
+
+	CPU:   rv64imac_zba_zbb
+	Model: StarFive VisionFive 2 v1.3B
+	DRAM:  8 GiB
+	Core:  107 devices, 18 uclasses, devicetree: separate
+	MMC:   mmc@16010000: 0, mmc@16020000: 1
+	Loading Environment from nowhere... OK
+	In:    serial@10000000
+	Out:   serial@10000000
+	Err:   serial@10000000
+	Net:   No ethernet found.
+	Working FDT set to ff74a340
+	Hit any key to stop autoboot:  0
+	StarFive #
+	StarFive # version
+	U-Boot 2023.04-rc2-00055-gfc43b9c51a-dirty (Mar 02 2023 - 10:51:39 +0800)
+
+	riscv64-buildroot-linux-gnu-gcc.br_real (Buildroot VF2_515_v1.0.0_rc4) 10.3.0
+	GNU ld (GNU Binutils) 2.36.1
+	StarFive #
+	StarFive # mmc dev 1
+	switch to partitions #0, OK
+	mmc1 is current device
+	StarFive # mmc info
+	Device: mmc@16020000
+	Manufacturer ID: 9f
+	OEM: 5449
+	Name: SD64G
+	Bus Speed: 50000000
+	Mode: SD High Speed (50MHz)
+	Rd Block Len: 512
+	SD version 3.0
+	High Capacity: Yes
+	Capacity: 58.3 GiB
+	Bus Width: 4-bit
+	Erase Group Size: 512 Bytes
+	StarFive #
+	StarFive # mmc part
+
+	Partition Map for MMC device 1  --   Partition Type: EFI
+
+	Part    Start LBA       End LBA         Name
+			Attributes
+			Type GUID
+			Partition GUID
+	1     0x00001000      0x00001fff      "spl"
+			attrs:  0x0000000000000000
+			type:   2e54b353-1271-4842-806f-e436d6af6985
+					(2e54b353-1271-4842-806f-e436d6af6985)
+			guid:   d5ee2056-3020-475b-9a33-25b4257c9f12
+	2     0x00002000      0x00003fff      "uboot"
+			attrs:  0x0000000000000000
+			type:   bc13c2ff-59e6-4262-a352-b275fd6f7172
+					(bc13c2ff-59e6-4262-a352-b275fd6f7172)
+			guid:   379ab7fe-fd0c-4149-b758-960c1cbfc0cc
+	3     0x00004000      0x00194000      "system"
+			attrs:  0x0000000000000000
+			type:   ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+					(data)
+			guid:   539a6df9-4655-4953-8541-733ca36eb1db
+	StarFive #
+	StarFive # fatls mmc 1:3
+	6429424   Image.gz
+	717705   u-boot.itb
+	125437   u-boot-spl.bin.normal.out
+	152848495   initramfs.cpio.gz
+		11285   jh7110-starfive-visionfive-2-v1.3b.dtb
+
+	5 file(s), 0 dir(s)
+
+	StarFive # fatload mmc 1:3 ${kernel_addr_r} Image.gz
+	6429424 bytes read in 394 ms (15.6 MiB/s)
+	StarFive # fatload mmc 1:3 ${fdt_addr_r} jh7110-starfive-visionfive-2.dtb
+	11285 bytes read in 5 ms (2.2 MiB/s)
+	StarFive # fatload mmc 1:3 ${ramdisk_addr_r} initramfs.cpio.gz
+	152848495 bytes read in 9271 ms (15.7 MiB/s)
+	StarFive # booti ${kernel_addr_r} ${ramdisk_addr_r}:${filesize} ${fdt_addr_r}
+	Uncompressing Kernel Image
+	## Flattened Device Tree blob at 46000000
+	Booting using the fdt blob at 0x46000000
+	Working FDT set to 46000000
+	Loading Ramdisk to f5579000, end fe73d86f ... OK
+	Loading Device Tree to 00000000f5573000, end 00000000f5578c14 ... OK
+	Working FDT set to f5573000
+
+	Starting kernel ...
+
+
+	] Linux version 6.2.0-starfive-00026-g11934a315b67 (wyh@wyh-VirtualBox) (riscv64-linux-gnu-gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0, GNU ld (GNU Binutils for Ubuntu) 2.30) #1 SMP Thu Mar  2 14:51:36 CST 2023
+	[    0.000000] OF: fdt: Ignoring memory range 0x40000000 - 0x40200000
+	[    0.000000] Machine model: StarFive VisionFive 2 v1.3B
+	[    0.000000] efi: UEFI not found.
+	[    0.000000] Zone ranges:
+	[    0.000000]   DMA32    [mem 0x0000000040200000-0x00000000ffffffff]
+	[    0.000000]   Normal   [mem 0x0000000100000000-0x000000013fffffff]
+	[    0.000000] Movable zone start for each node
+	[    0.000000] Early memory node ranges
+	[    0.000000]   node   0: [mem 0x0000000040200000-0x000000013fffffff]
+	[    0.000000] Initmem setup node 0 [mem 0x0000000040200000-0x000000013fffffff]
+	[    0.000000] On node 0, zone DMA32: 512 pages in unavailable ranges
+	[    0.000000] SBI specification v1.0 detected
+	[    0.000000] SBI implementation ID=0x1 Version=0x10002
+	[    0.000000] SBI TIME extension detected
+	[    0.000000] SBI IPI extension detected
+	[    0.000000] SBI RFENCE extension detected
+	[    0.000000] SBI HSM extension detected
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] riscv: base ISA extensions acdfim
+	[    0.000000] riscv: ELF capabilities acdfim
+	[    0.000000] percpu: Embedded 18 pages/cpu s35960 r8192 d29576 u73728
+	[    0.000000] pcpu-alloc: s35960 r8192 d29576 u73728 alloc=18*4096
+	[    0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3
+	[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 1031688
+	[    0.000000] Kernel command line: console=ttyS0,115200 debug rootwait earlycon=sbi
+	[    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
+	[    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
+	[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
+	[    0.000000] software IO TLB: area num 4.
+	[    0.000000] software IO TLB: mapped [mem 0x00000000f1573000-0x00000000f5573000] (64MB)
+	[    0.000000] Virtual kernel memory layout:
+	[    0.000000]       fixmap : 0xffffffc6fee00000 - 0xffffffc6ff000000   (2048 kB)
+	[    0.000000]       pci io : 0xffffffc6ff000000 - 0xffffffc700000000   (  16 MB)
+	[    0.000000]      vmemmap : 0xffffffc700000000 - 0xffffffc800000000   (4096 MB)
+	[    0.000000]      vmalloc : 0xffffffc800000000 - 0xffffffd800000000   (  64 GB)
+	[    0.000000]      modules : 0xffffffff0136a000 - 0xffffffff80000000   (2028 MB)
+	[    0.000000]       lowmem : 0xffffffd800000000 - 0xffffffd8ffe00000   (4094 MB)
+	[    0.000000]       kernel : 0xffffffff80000000 - 0xffffffffffffffff   (2047 MB)
+	[    0.000000] Memory: 3867604K/4192256K available (8012K kernel code, 4919K rwdata, 4096K rodata, 2190K init, 476K bss, 324652K reserved, 0K cma-reserved)
+	[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
+	[    0.000000] rcu: Hierarchical RCU implementation.
+	[    0.000000] rcu:     RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=4.
+	[    0.000000] rcu:     RCU debug extended QS entry/exit.
+	[    0.000000]  Tracing variant of Tasks RCU enabled.
+	[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
+	[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
+	[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
+	[    0.000000] CPU with hartid=0 is not available
+	[    0.000000] riscv-intc: unable to find hart id for /cpus/cpu@0/interrupt-controller
+	[    0.000000] riscv-intc: 64 local interrupts mapped
+	[    0.000000] plic: interrupt-controller@c000000: mapped 136 interrupts with 4 handlers for 9 contexts.
+	[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
+	[    0.000000] riscv-timer: riscv_timer_init_dt: Registering clocksource cpuid [0] hartid [4]
+	[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1d854df40, max_idle_ns: 881590404240 ns
+	[    0.000003] sched_clock: 64 bits at 4MHz, resolution 250ns, wraps every 2199023255500ns
+	[    0.000437] Console: colour dummy device 80x25
+	[    0.000568] Calibrating delay loop (skipped), value calculated using timer frequency.. 8.00 BogoMIPS (lpj=16000)
+	[    0.000602] pid_max: default: 32768 minimum: 301
+	[    0.000752] LSM: initializing lsm=capability,integrity
+	[    0.001071] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
+	[    0.001189] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
+	[    0.004201] CPU node for /cpus/cpu@0 exist but the possible cpu range is :0-3
+	[    0.007426] cblist_init_generic: Setting adjustable number of callback queues.
+	[    0.007457] cblist_init_generic: Setting shift to 2 and lim to 1.
+	[    0.007875] riscv: ELF compat mode unsupported
+	[    0.007902] ASID allocator disabled (0 bits)
+	[    0.008405] rcu: Hierarchical SRCU implementation.
+	[    0.008426] rcu:     Max phase no-delay instances is 1000.
+	[    0.009247] EFI services will not be available.
+	[    0.010738] smp: Bringing up secondary CPUs ...
+	[    0.018358] smp: Brought up 1 node, 4 CPUs
+	[    0.021776] devtmpfs: initialized
+	[    0.027337] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
+	[    0.027389] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
+	[    0.027888] pinctrl core: initialized pinctrl subsystem
+	[    0.029881] NET: Registered PF_NETLINK/PF_ROUTE protocol family
+	[    0.030401] audit: initializing netlink subsys (disabled)
+	[    0.031041] audit: type=2000 audit(0.028:1): state=initialized audit_enabled=0 res=1
+	[    0.031943] cpuidle: using governor menu
+	[    0.043011] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
+	[    0.043033] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
+	[    0.044943] iommu: Default domain type: Translated
+	[    0.044965] iommu: DMA domain TLB invalidation policy: strict mode
+	[    0.046089] SCSI subsystem initialized
+	[    0.046733] libata version 3.00 loaded.
+	[    0.047231] usbcore: registered new interface driver usbfs
+	[    0.047315] usbcore: registered new interface driver hub
+	[    0.047420] usbcore: registered new device driver usb
+	[    0.049770] vgaarb: loaded
+	[    0.050277] clocksource: Switched to clocksource riscv_clocksource
+	[    0.084690] NET: Registered PF_INET protocol family
+	[    0.085561] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
+	[    0.093010] tcp_listen_portaddr_hash hash table entries: 2048 (order: 4, 65536 bytes, linear)
+	[    0.093152] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
+	[    0.093224] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
+	[    0.093821] TCP bind hash table entries: 32768 (order: 9, 2097152 bytes, linear)
+	[    0.117880] TCP: Hash tables configured (established 32768 bind 32768)
+	[    0.118500] UDP hash table entries: 2048 (order: 5, 196608 bytes, linear)
+	[    0.118881] UDP-Lite hash table entries: 2048 (order: 5, 196608 bytes, linear)
+	[    0.119675] NET: Registered PF_UNIX/PF_LOCAL protocol family
+	[    0.121749] RPC: Registered named UNIX socket transport module.
+	[    0.121776] RPC: Registered udp transport module.
+	[    0.121784] RPC: Registered tcp transport module.
+	[    0.121791] RPC: Registered tcp NFSv4.1 backchannel transport module.
+	[    0.121816] PCI: CLS 0 bytes, default 64
+	[    0.124101] Unpacking initramfs...
+	[    0.125468] workingset: timestamp_bits=46 max_order=20 bucket_order=0
+	[    0.128372] NFS: Registering the id_resolver key type
+	[    0.128498] Key type id_resolver registered
+	[    0.128525] Key type id_legacy registered
+	[    0.128625] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
+	[    0.128649] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
+	[    0.129358] 9p: Installing v9fs 9p2000 file system support
+	[    0.130179] NET: Registered PF_ALG protocol family
+	[    0.130499] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 247)
+	[    0.130544] io scheduler mq-deadline registered
+	[    0.130556] io scheduler kyber registered
+	[    0.416754] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+	[    0.420857] SuperH (H)SCI(F) driver initialized
+	[    0.443735] loop: module loaded
+	[    0.448605] e1000e: Intel(R) PRO/1000 Network Driver
+	[    0.448627] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
+	[    0.450716] usbcore: registered new interface driver uas
+	[    0.450832] usbcore: registered new interface driver usb-storage
+	[    0.451638] mousedev: PS/2 mouse device common for all mice
+	[    0.453465] sdhci: Secure Digital Host Controller Interface driver
+	[    0.453487] sdhci: Copyright(c) Pierre Ossman
+	[    0.453584] sdhci-pltfm: SDHCI platform and OF driver helper
+	[    0.454140] usbcore: registered new interface driver usbhid
+	[    0.454174] usbhid: USB HID core driver
+	[    0.454833] riscv-pmu-sbi: SBI PMU extension is available
+	[    0.454920] riscv-pmu-sbi: 16 firmware and 4 hardware counters
+	[    0.454942] riscv-pmu-sbi: Perf sampling/filtering is not supported as sscof extension is not available
+	[    0.457071] NET: Registered PF_INET6 protocol family
+	[    0.460627] Segment Routing with IPv6
+	[    0.460821] In-situ OAM (IOAM) with IPv6
+	[    0.461005] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
+	[    0.462712] NET: Registered PF_PACKET protocol family
+	[    0.462933] 9pnet: Installing 9P2000 support
+	[    0.463141] Key type dns_resolver registered
+	[    0.463168] start plist test
+	[    0.469261] end plist test
+	[    0.506774] debug_vm_pgtable: [debug_vm_pgtable         ]: Validating architecture page table helpers
+	[    0.553683] gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation.
+	[    0.554741] starfive-jh7110-sys-pinctrl 13040000.pinctrl: StarFive GPIO chip registered 64 GPIOs
+	[    0.555900] gpio gpiochip1: Static allocation of GPIO base is deprecated, use dynamic allocation.
+	[    0.556772] starfive-jh7110-aon-pinctrl 17020000.pinctrl: StarFive GPIO chip registered 4 GPIOs
+	[    0.559454] printk: console [ttyS0] disabled
+	[    0.579948] 10000000.serial: ttyS0 at MMIO 0x10000000 (irq = 3, base_baud = 1500000) is a 16550A
+	[    0.580082] printk: console [ttyS0] enabled
+	[   13.642680] Freeing initrd memory: 149264K
+	[   13.651051] Freeing unused kernel image (initmem) memory: 2188K
+	[   13.666431] Run /init as init process
+	[   13.670116]   with arguments:
+	[   13.673168]     /init
+	[   13.675488]   with environment:
+	[   13.678668]     HOME=/
+	[   13.681038]     TERM=linux
+	Starting syslogd: OK
+	Starting klogd: OK
+	Running sysctl: OK
+	Populating /dev using udev: [   14.145944] udevd[93]: starting version 3.2.10
+	[   15.214287] random: crng init done
+	[   15.240816] udevd[94]: starting eudev-3.2.10
+	done
+	Saving random seed: OK
+	Starting system message bus: dbus[122]: Unknown username "pulse" in message bus configuration file
+	done
+	Starting rpcbind: OK
+	Starting iptables: OK
+	Starting bluetoothd: OK
+	Starting network: Waiting for interface eth0 to appear............... timeout!
+	run-parts: /etc/network/if-pre-up.d/wait_iface: exit status 1
+	FAIL
+	Starting dropbear sshd: OK
+	Starting NFS statd: OK
+	Starting NFS services: OK
+	Starting NFS daemon: rpc.nfsd: Unable to access /proc/fs/nfsd errno 2 (No such file or directory).
+	Please try, as root, 'mount -t nfsd nfsd /proc/fs/nfsd' and then restart rpc.nfsd to correct the problem
+	FAIL
+	Starting NFS mountd: OK
+	Starting DHCP server: FAIL
+
+	Welcome to Buildroot
+	buildroot login:
+
+Booting from SPI
+----------------
+
+Use Building steps from "Booting from MMC using U-Boot SPL" section.
+
+Partition the SPI in Linux via mtdblock. (Require to boot the board in
+SD boot mode by enabling MTD block in Linux)
+
+Use prebuilt image from here [1], which support to partition the SPI flash.
+
+
+Program the SPI (Require to boot the board in SD boot mode)
+
+Execute below steps on U-Boot proper,
+
+.. code-block:: none
+
+  sf probe
+  fatload mmc 1:3 $kernel_addr_r u-boot.itb
+  sf update $kernel_addr_r 0x100000 $filesize
+
+  fatload mmc 1:3 $kernel_addr_r u-boot-spl.bin.normal.out
+  sf update $kernel_addr_r 0x0 $filesize
+
+
+Power off the board
+
+Change DIP switches MSEL[1:0] are set to 00, select the boot mode to flash
+
+Power up the board.
diff --git a/doc/board/ste/index.rst b/doc/board/ste/index.rst
new file mode 100644
index 00000000000..bef520ce63f
--- /dev/null
+++ b/doc/board/ste/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+ST-Ericsson
+===========
+
+.. toctree::
+   :maxdepth: 2
+
+   stemmy
diff --git a/doc/board/ste/stemmy.rst b/doc/board/ste/stemmy.rst
new file mode 100644
index 00000000000..6d77fe9c831
--- /dev/null
+++ b/doc/board/ste/stemmy.rst
@@ -0,0 +1,81 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Stephan Gerhold <stephan@gerhold.net>
+
+ST-Ericsson U8500 Samsung "stemmy" board
+========================================
+
+The "stemmy" board supports Samsung smartphones released with
+the ST-Ericsson NovaThor U8500 SoC, e.g.
+
+    +---------------------------+----------+--------------+----------------+
+    | Device                    | Model    | Codename     | U-Boot         |
+    +===========================+==========+==============+================+
+    | Samsung Galaxy Ace 2      | GT-I8160 | codina       | ``u-boot.bin`` |
+    +---------------------------+----------+--------------+----------------+
+    | Samsung Galaxy Amp        | SGH-I407 | kyle         | ``u-boot.img`` |
+    +---------------------------+----------+--------------+----------------+
+    | Samsung Galaxy Beam       | GT-I8530 | gavini       | ``u-boot.bin`` |
+    +---------------------------+----------+--------------+----------------+
+    | Samsung Galaxy Exhibit    | SGH-T599 | codina (TMO) | ``u-boot.bin`` |
+    +---------------------------+----------+--------------+----------------+
+    | Samsung Galaxy S Advance  | GT-I9070 | janice       | ``u-boot.bin`` |
+    +---------------------------+----------+--------------+----------------+
+    | Samsung Galaxy S III mini | GT-I8190 | golden       | ``u-boot.img`` |
+    +---------------------------+----------+--------------+----------------+
+    | Samsung Galaxy Xcover 2   | GT-S7710 | skomer       | ``u-boot.img`` |
+    +---------------------------+----------+--------------+----------------+
+
+At the moment, U-Boot is intended to be chain-loaded from
+the original Samsung bootloader, not replacing it entirely.
+
+Installation
+------------
+First, setup ``CROSS_COMPILE`` for ARMv7. Then, build U-Boot for ``stemmy``::
+
+  $ export CROSS_COMPILE=arm-none-eabi-
+  $ make stemmy_defconfig
+  $ make
+
+This will build ``u-boot.bin`` in the configured output directory.
+
+For newer devices (check ``u-boot.img`` in the table above), the U-Boot binary
+has to be packed into an Android boot image. Devices with ``u-boot.bin`` boot
+the raw U-Boot binary from the boot partition. You can build the Android boot
+image with ``mkbootimg``, e.g. from from android-7.1.2_r37_::
+
+  $ mkbootimg \
+    --kernel=u-boot.bin \
+    --base=0x00000000 \
+    --kernel_offset=0x00100000 \
+    --ramdisk_offset=0x02000000 \
+    --tags_offset=0x00000100 \
+    --output=u-boot.img
+
+.. _android-7.1.2_r37: https://android.googlesource.com/platform/system/core/+/refs/tags/android-7.1.2_r37/mkbootimg/mkbootimg
+
+To flash the U-Boot binary, enter the Samsung download mode
+(press Power + Home + Volume Down). Use Heimdall_ to flash the U-Boot image to
+the Android boot partition::
+
+  $ heimdall flash --Kernel u-boot.(bin|img)
+
+If this is not working but there are messages like ``Android recovery image`` in
+the UART console, you can try flashing to the recovery partition instead::
+
+  $ heimdall flash --Kernel2 u-boot.(bin|img)
+
+.. _Heimdall: https://gitlab.com/BenjaminDobell/Heimdall
+
+After a reboot the U-Boot prompt should appear via UART. Unless interrupted it
+automatically boots to USB Fastboot mode where Android boot images can be booted
+via ``fastboot boot boot.img``. It is mainly intended to boot mainline Linux,
+but booting original Samsung Android boot images is also supported (e.g. for
+charging).
+
+UART
+----
+UART is available through the micro USB port, similar to the Carkit standard.
+With a ~619kOhm resistor between ID and GND, 1.8V RX/TX is available at D+/D-.
+
+.. note::
+  Make sure to connect the UART cable **before** turning on the phone.
diff --git a/doc/board/tbs/index.rst b/doc/board/tbs/index.rst
new file mode 100644
index 00000000000..b677bc624fd
--- /dev/null
+++ b/doc/board/tbs/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+TBS
+===
+
+.. toctree::
+   :maxdepth: 2
+
+   tbs2910
diff --git a/doc/board/tbs/tbs2910.rst b/doc/board/tbs/tbs2910.rst
new file mode 100644
index 00000000000..9d4be61783e
--- /dev/null
+++ b/doc/board/tbs/tbs2910.rst
@@ -0,0 +1,191 @@
+TBS2910 Matrix ARM miniPC
+=========================
+
+Building
+--------
+To build u-boot for the TBS2910 Matrix ARM miniPC, you can use the following
+procedure:
+
+First add the ARM toolchain to your PATH
+
+Then setup the ARCH and cross compilation environment variables.
+
+When this is done you can then build u-boot for the TBS2910 Matrix ARM miniPC
+with the following commands:
+
+.. code-block:: none
+
+   make mrproper
+   make tbs2910_defconfig
+   make
+
+Once the build is complete, you can find the resulting image as u-boot.imx in
+the current directory.
+
+UART
+----
+The UART voltage is at 3.3V and its settings are 115200bps 8N1
+
+BOOT/UPDATE boot switch:
+------------------------
+The BOOT/UPDATE switch (SW11) is connected to the BOOT_MODE0 and
+BOOT_MODE1 SoC pins. It has "BOOT" and "UPDATE" markings both on
+the PCB and on the plastic case.
+
+When set to the "UPDATE" position, the SoC will use the "Boot From Fuses"
+configuration, and since BT_FUSE_SEL is 0, this makes the SOC jump to serial
+downloader.
+
+When set in the "BOOT" position, the SoC will use the "Internal boot"
+configuration, and since BT_FUSE_SEL is 0, it will then use the GPIO pins
+for the boot configuration.
+
+SW6 binary DIP switch array on the PCB revision 2.1:
+----------------------------------------------------
+On that PCB revision, SW6 has 8 positions.
+
+Switching a position to ON sets the corresponding
+register to 1.
+
+See the following table for a correspondence between the switch positions and
+registers:
+
+===============    ============
+Switch position    Register
+===============    ============
+1                  BOOT_CFG2[3]
+2                  BOOT_CFG2[4]
+3                  BOOT_CFG2[5]
+4                  BOOT_CFG2[6]
+5                  BOOT_CFG1[4]
+6                  BOOT_CFG1[5]
+7                  BOOT_CFG1[6]
+8                  BOOT_CFG1[7]
+===============    ============
+
+For example:
+
+  - To boot from the eMMC: 1:ON , 2:ON, 3:ON, 4:OFF, 5:OFF, 6:ON, 7:ON, 8:OFF
+  - To boot from the microSD slot: 1: ON, 2: OFF, 3: OFF, 4: OFF, 5:OFF, 6:OFF,
+    7:ON, 8:OFF
+  - To boot from the SD slot: 1: OFF, 2: ON, 3: OFF, 4: OFF, 5:OFF, 6:OFF, 7:ON,
+    8:OFF
+  - To boot from SATA: 1: OFF, 2: OFF, 3: OFF, 4: OFF, 5:OFF, 6:ON, 7:OFF, 8:OFF
+
+You can refer to the BOOT_CFG registers in the I.MX6Q reference manual for
+additional details.
+
+SW6 binary DIP switch array on the PCB revision 2.3:
+----------------------------------------------------
+On that PCB revision, SW6 has only 4 positions.
+
+Switching a position to ON sets the corresponding
+register to 1.
+
+See the following table for a correspondence between the switch positions and
+registers:
+
+===============    ============
+Switch position    Register
+===============    ============
+1                  BOOT_CFG2[3]
+2                  BOOT_CFG2[4]
+3                  BOOT_CFG2[5]
+4                  BOOT_CFG1[5]
+===============    ============
+
+For example:
+
+- To boot from the eMMC: 1:ON, 2:ON, 3:ON, 4:ON
+- To boot from the microSD slot: 1:ON, 2:OFF, 3:OFF, 4:OFF
+- To boot from the SD slot: 1:OFF, 2:ON, 3:OFF, 4:OFF
+
+You can refer to the BOOT_CFG registers in the I.MX6Q reference manual for
+additional details.
+
+Loading u-boot from USB:
+------------------------
+If you need to load u-boot from USB, you can use the following instructions:
+
+First build imx_usb_loader, as we will need it to load u-boot from USB. This
+can be done with the following commands:
+
+.. code-block:: none
+
+   git clone git://github.com/boundarydevices/imx_usb_loader.git
+   cd imx_usb_loader
+   make
+
+This will create the resulting imx_usb binary.
+
+When this is done, you can copy the u-boot.imx image that you built earlier
+in in the imx_usb_loader directory.
+
+You will then need to power off the TBS2910 Matrix ARM miniPC and make sure that
+the boot switch is set to "UPDATE"
+
+Once this is done you can connect an USB cable between the computer that will
+run imx_usb and the TBS2910 Matrix ARM miniPC.
+
+If you also need to access the u-boot console, you will also need to connect an
+UART cable between the computer running imx_usb and the TBS2910 Matrix ARM
+miniPC.
+
+Once everything is connected you can finally power on the TBS2910 Matrix ARM
+miniPC. The SoC will then jump to the serial download and wait for you.
+
+Finlay, you can load u-boot through USB with with the following command:
+
+.. code-block:: none
+
+   sudo ./imx_usb -v u-boot.imx
+
+The u-boot boot messages will then appear in the serial console.
+
+Install u-boot on the eMMC:
+---------------------------
+To install u-boot on the eMMC, you first need to boot the TBS2910 Matrix ARM
+miniPC.
+
+Once booted, you can flash u-boot.imx to mmcblk0boot0 with the
+following commands:
+
+.. code-block:: none
+
+   sudo echo 0 >/sys/block/mmcblk0boot0/force_ro
+   sudo dd if=u-boot.imx of=/dev/mmcblk0boot0 bs=1k seek=1; sync
+
+Note that the eMMC card node may vary, so adjust this as needed.
+
+Once the new u-boot version is installed, to boot on it you then need to power
+off the TBS2910 Matrix ARM miniPC.
+
+Once it is off, you need make sure that the boot switch is set to "BOOT" and
+that the SW6 switch is set to boot on the eMMC as described in the previous
+sections.
+
+If you also need to access the u-boot console, you will also need to connect an
+UART cable between the computer running imx_usb and the TBS2910 Matrix ARM
+miniPC.
+
+You can then power up the TBS2910 Matrix ARM miniPC and U-Boot messages will
+appear in the serial console.
+
+Booting a distribution:
+-----------------------
+When booting on the TBS2910 Matrix ARM miniPC, by default U-Boot will first try
+to boot from hardcoded offsets from the start of the eMMC. This is for
+compatibility with the stock GNU/Linux distribution.
+
+If that fails it will then try to boot from several interfaces using
+'distro_bootcmd': It will first try to boot from the microSD slot, then the
+SD slot, then the internal eMMC, then the SATA interface and finally the USB
+interface. For more information on how to configure your distribution to boot,
+see 'doc/develop/distro.rst'.
+
+Links:
+------
+  - https://www.tbsdtv.com/download/document/tbs2910/TBS2910-Matrix-ARM-mini-PC-SCH_rev2.1.pdf
+    - The schematics for the revision 2.1 of the TBS2910 Matrix ARM miniPC.
+  - https://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf - The
+    SoC reference manual for additional details on the BOOT_CFG registers.
diff --git a/doc/board/thead/index.rst b/doc/board/thead/index.rst
new file mode 100644
index 00000000000..2c4b3fb8cb3
--- /dev/null
+++ b/doc/board/thead/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+T-HEAD
+======
+
+.. toctree::
+   :maxdepth: 1
+
+   lpi4a
diff --git a/doc/board/thead/lpi4a.rst b/doc/board/thead/lpi4a.rst
new file mode 100644
index 00000000000..e395c6ae12c
--- /dev/null
+++ b/doc/board/thead/lpi4a.rst
@@ -0,0 +1,129 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sipeed's Lichee PI 4A based on T-HEAD TH1520 SoC
+================================================
+
+The LicheePi4A is a high-performance RISC-V SBC based on TH1520(4xC910@1.85GHz),
+comes with 4/8/16 GB RAM, and up to 128GB eMMC, and rich peripherals.
+
+ - SoC            T-HEAD TH1520 SoC
+ - System Memory  4GB, 8GB, or 16GB LPDDR4X
+ - Storage        eMMC flash with 8/32/128 GB
+ -                external microSD slot
+ - Networking     2x Gigabit Ethernet
+ -                WiFi+BT
+ - Display        HDMI2.0, 4-lane MIPI DSI
+ - Camera         4-lane MIPI CSI + 2x2-lane MIPI CSI
+ - Audio          Onboard Speaker, 2xMEMS MIC, 3.5mm headphone jack
+ - USB            4xUSB3.0 Type-A, 1xUSB2.0 Type-C
+ - GPIO           2x10Pin breakout, UART/IIC/SPI
+ - Power          DC 12V/2A, POE 5V/2.4A, USB Type-C 5V/2A
+
+TH1520 RISC-V SoC
+-----------------
+
+The TH1520 SoC consist of quad-core RISC-V Xuantie C910 (RV64GCV) processor,
+Xuantie C906 audio DSP, low power Xuantie E902 core, it also integrate
+Imagination GPU for graphics, and 4 TOPS NPU for AI acceleration.
+
+Mainline support
+----------------
+
+The support for following drivers are already enabled:
+
+1. ns16550 UART Driver.
+
+Building
+~~~~~~~~
+
+1. Add the RISC-V toolchain to your PATH.
+2. Setup ARCH & cross compilation environment variable:
+
+.. code-block:: none
+
+   export CROSS_COMPILE=<riscv64 toolchain prefix>
+
+The U-Boot is capable of running in M-Mode, so we can directly build it.
+
+.. code-block:: console
+
+	cd <U-Boot-dir>
+	make th1520_lpi4a_defconfig
+	make
+
+This will generate u-boot-dtb.bin
+
+Booting
+~~~~~~~
+
+Currently, we rely on vendor u-boot to initialize the clock, pinctrl subsystem,
+and chain load the mainline u-boot image either via tftp or emmc storage,
+then bootup from it.
+
+Sample boot log from Lichee PI 4A board via tftp
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+.. code-block:: none
+
+	brom_ver 8
+	[APP][E] protocol_connect failed, exit.
+
+	U-Boot SPL 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000)
+	FM[1] lpddr4x dualrank freq=3733 64bit dbi_off=n sdram init
+	ddr initialized, jump to uboot
+	image has no header
+
+
+	U-Boot 2020.01-00016-g8c870a6be8 (May 20 2023 - 01:04:49 +0000)
+
+	CPU:   rv64imafdcvsu
+	Model: T-HEAD c910 light
+	DRAM:  8 GiB
+	C910 CPU FREQ: 750MHz
+	AHB2_CPUSYS_HCLK FREQ: 250MHz
+	AHB3_CPUSYS_PCLK FREQ: 125MHz
+	PERISYS_AHB_HCLK FREQ: 250MHz
+	PERISYS_APB_PCLK FREQ: 62MHz
+	GMAC PLL POSTDIV FREQ: 1000MHZ
+	DPU0 PLL POSTDIV FREQ: 1188MHZ
+	DPU1 PLL POSTDIV FREQ: 1188MHZ
+	MMC:   sdhci@ffe7080000: 0, sd@ffe7090000: 1
+	Loading Environment from MMC... OK
+	Error reading output register
+	Warning: cannot get lcd-en GPIO
+	LCD panel cannot be found : -121
+	splash screen startup cost 16 ms
+	In:    serial
+	Out:   serial
+	Err:   serial
+	Net:
+	Warning: ethernet@ffe7070000 using MAC address from ROM
+	eth0: ethernet@ffe7070000ethernet@ffe7070000:0 is connected to ethernet@ffe7070000.  Reconnecting to ethernet@ffe7060000
+
+	Warning: ethernet@ffe7060000 (eth1) using random MAC address - 42:25:d4:16:5f:fc
+	, eth1: ethernet@ffe7060000
+	Hit any key to stop autoboot:  2
+	ethernet@ffe7060000 Waiting for PHY auto negotiation to complete.. done
+	Speed: 1000, full duplex
+	Using ethernet@ffe7070000 device
+	TFTP from server 192.168.8.50; our IP address is 192.168.8.45
+	Filename 'u-boot-dtb.bin'.
+	Load address: 0x1c00000
+	Loading: * #########################
+		 8 MiB/s
+	done
+	Bytes transferred = 376686 (5bf6e hex)
+	## Starting application at 0x01C00000 ...
+
+        U-Boot 2023.07-rc2-00004-g1befbe31c1 (May 23 2023 - 18:40:01 +0800)
+
+        CPU:   rv64imafdc
+        Model: Sipeed Lichee Pi 4A
+        DRAM:  8 GiB
+        Core:  13 devices, 6 uclasses, devicetree: separate
+        Loading Environment from <NULL>... OK
+        In:    serial@ffe7014000
+        Out:   serial@ffe7014000
+        Err:   serial@ffe7014000
+        Model: Sipeed Lichee Pi 4A
+        LPI4A=>
diff --git a/doc/board/theobroma-systems/index.rst b/doc/board/theobroma-systems/index.rst
new file mode 100644
index 00000000000..73e07f7ebfa
--- /dev/null
+++ b/doc/board/theobroma-systems/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Theobroma Systems
+=================
+
+.. toctree::
+   :maxdepth: 2
+
+   jaguar_rk3588
+   puma_rk3399
+   ringneck_px30
+   tiger_rk3588
diff --git a/doc/board/theobroma-systems/jaguar_rk3588.rst b/doc/board/theobroma-systems/jaguar_rk3588.rst
new file mode 100644
index 00000000000..db15f945d3b
--- /dev/null
+++ b/doc/board/theobroma-systems/jaguar_rk3588.rst
@@ -0,0 +1,100 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+SBC-RK3588-AMR Jaguar
+=====================
+
+The SBC-RK3588-AMR is a Single Board Computer designed by
+Theobroma Systems for autonomous mobile robots.
+
+It provides the following features:
+
+ * up to 32GB LDDR4
+ * up to 128GB on-module eMMC (with 8-bit 1.8V interface)
+ * SD card
+ * Gigabit Ethernet
+ * 1x USB-A 2.0 host
+ * PCIe M.2 2230 Key M (Gen 2 1-lane) for WiFi+BT
+ * PCIe M.2 2280 Key M (Gen 3 4-lane) for NVMe
+ * CAN
+ * RS485 UART
+ * 2x USB Type-C 3.1 host/device
+ * HDMI output
+ * 2x camera connectors (MIPI-CSI 2-lane I2C/SPI for IMUs GPIOs)
+ * EEPROM
+ * Secure Element
+ * ATtiny companion controller implementing:
+
+   - low-power RTC functionality (ISL1208 emulation)
+   - fan controller (AMC6821 emulation)
+
+ * 80-pin Mezzanine connector
+
+Here is the step-by-step to boot to U-Boot on SBC-RK3588-AMR Jaguar from Theobroma
+Systems.
+
+Get the TF-A and DDR init (TPL) binaries
+----------------------------------------
+
+.. prompt:: bash
+
+   git clone https://github.com/rockchip-linux/rkbin
+   cd rkbin
+   export RKBIN=$(pwd)
+   export BL31=$RKBIN/bin/rk35/rk3588_bl31_v1.38.elf
+   export ROCKCHIP_TPL=$RKBIN/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.11.bin
+   sed -i 's/^uart baudrate=.*$/uart baudrate=115200/' tools/ddrbin_param.txt
+   ./tools/ddrbin_tool tools/ddrbin_param.txt "$ROCKCHIP_TPL"
+   ./tools/boot_merger RKBOOT/RK3588MINIALL.ini
+   export RKDB=$RKBIN/rk3588_spl_loader_v1.11.112.bin
+
+This will setup all required external dependencies for compiling U-Boot. This will
+be updated in the future once upstream Trusted-Firmware-A supports RK3588 or U-Boot
+gains support for open-source DRAM initialization in TPL.
+
+Build U-Boot
+------------
+
+.. prompt:: bash
+
+   cd ../u-boot
+   make CROSS_COMPILE=aarch64-linux-gnu- jaguar-rk3588_defconfig all
+
+This will build ``u-boot-rockchip.bin`` which can be written to an MMC device
+(eMMC or SD card).
+
+Flash the image
+---------------
+
+Copy ``u-boot-rockchip.bin`` to offset 32k for SD/eMMC.
+
+SD-Card
+~~~~~~~
+
+.. prompt:: bash
+
+   dd if=u-boot-rockchip.bin of=/dev/sdX seek=64
+
+.. note::
+
+   Replace ``/dev/sdX`` to match your SD card kernel device.
+
+eMMC
+~~~~
+
+``rkdeveloptool`` allows to flash the on-board eMMC via the USB OTG interface
+with help of the Rockchip loader binary.
+
+To enter the USB flashing mode, remove any SD card, insert a USB-C cable in the
+``DOWNLOAD`` USB Type-C connector (P11) and then power cycle or reset the board
+while pressing the ``BIOS`` (SW2) button. A new USB device should have appeared
+on your PC (check with ``lsusb -d 2207:350b``).
+
+To flash U-Boot on the eMMC with ``rkdeveloptool``:
+
+.. prompt:: bash
+
+   git clone https://github.com/rockchip-linux/rkdeveloptool
+   cd rkdeveloptool
+   autoreconf -i && CPPFLAGS=-Wno-format-truncation ./configure && make
+   ./rkdeveloptool db "$RKDB"
+   ./rkdeveloptool wl 64 ../u-boot-rockchip.bin
diff --git a/doc/board/theobroma-systems/puma_rk3399.rst b/doc/board/theobroma-systems/puma_rk3399.rst
new file mode 100644
index 00000000000..5bc6385e451
--- /dev/null
+++ b/doc/board/theobroma-systems/puma_rk3399.rst
@@ -0,0 +1,126 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+RK3399-Q7 Puma
+==============
+
+The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip
+RK3399 in a Qseven-compatible form-factor.
+
+RK3399-Q7 features:
+
+ * CPU: ARMv8 64bit Big-Little architecture,
+
+   * Big: dual-core Cortex-A72
+   * Little: quad-core Cortex-A53
+   * IRAM: 200KB
+   * DRAM: 4GB-128MB dual-channel
+
+ * eMMC: onboard eMMC
+ * SD/MMC
+ * GbE (onboard Micrel KSZ9031) Gigabit ethernet PHY
+ * USB:
+
+   * USB3.0 dual role port
+   * 2x USB3.0 host, 1x USB2.0 host via onboard USB3.0 hub
+
+ * Display: HDMI/eDP/MIPI
+ * Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF)
+ * NOR Flash: onboard SPI NOR
+ * Companion Controller: onboard additional Cortex-M0 microcontroller
+   * RTC
+   * fan controller
+   * CAN
+
+Here is the step-by-step to boot to U-Boot on RK3399-Q7 from Theobroma Systems.
+
+Get the Source and build ATF binary
+-----------------------------------
+
+.. prompt:: bash
+
+   git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+   cd trusted-firmware-a
+   make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
+   export BL31=$PWD/build/rk3399/release/bl31/bl31.elf
+
+Compile the U-Boot
+------------------
+
+.. prompt:: bash
+
+   cd ../u-boot
+   make CROSS_COMPILE=aarch64-linux-gnu- puma-rk3399_defconfig all
+
+This will build ``u-boot-rockchip.bin`` which can be written to an MMC device
+(eMMC or SD card), and ``u-boot-rockchip-spi.bin`` which can be written to the
+SPI-NOR flash.
+
+Flash the image
+---------------
+
+Copy ``u-boot-rockchip.bin`` to offset 32k for SD/eMMC.
+Copy ``u-boot-rockchip-spi.bin`` to offset 0 for NOR-flash.
+
+SD-Card
+~~~~~~~
+
+.. prompt:: bash
+
+   dd if=u-boot-rockchip.bin of=/dev/sdX seek=64
+
+.. note::
+
+   Replace ``/dev/sdX`` to match your SD card kernel device.
+
+eMMC
+~~~~
+
+``rkdeveloptool`` allows to flash the on-board eMMC via the USB OTG interface
+with help of the Rockchip loader binary.
+
+To enter the USB flashing mode on Haikou baseboard, remove any SD card, insert a
+micro-USB cable in the ``Q7 USB P1`` connector (P8), move ``SW5`` switch into
+``BIOS Disable`` mode, power cycle or reset the board and move ``SW5`` switch
+back to ``Normal Boot`` mode. A new USB device should have appeared on your PC
+(check with ``lsusb -d 2207:330c``).
+
+To flash U-Boot on the eMMC with ``rkdeveloptool``:
+
+.. prompt:: bash
+
+   git clone https://github.com/rockchip-linux/rkdeveloptool
+   cd rkdeveloptool
+   autoreconf -i && CPPFLAGS=-Wno-format-truncation ./configure && make
+   git clone https://github.com/rockchip-linux/rkbin.git
+   cd rkbin
+   ./tools/boot_merger RKBOOT/RK3399MINIALL.ini
+   cd ..
+   ./rkdeveloptool db rkbin/rk3399_loader_v1.30.130.bin
+   ./rkdeveloptool wl 64 ../u-boot-rockchip.bin
+
+NOR-Flash
+~~~~~~~~~
+
+``rkdeveloptool`` allows to flash the on-board SPI via the USB OTG interface with
+help of the Rockchip loader binary.
+
+To enter the USB flashing mode on Haikou baseboard, remove any SD card, insert a
+micro-USB cable in the ``Q7 USB P1`` connector (P8), move ``SW5`` switch into
+``BIOS Disable`` mode, power cycle or reset the board and move ``SW5`` switch
+back to ``Normal Boot`` mode. A new USB device should have appeared on your PC
+(check with ``lsusb -d 2207:330c``).
+
+To flash U-Boot on the SPI with ``rkdeveloptool``:
+
+.. prompt:: bash
+
+   git clone https://github.com/rockchip-linux/rkdeveloptool
+   cd rkdeveloptool
+   autoreconf -i && CPPFLAGS=-Wno-format-truncation ./configure && make
+   git clone https://github.com/rockchip-linux/rkbin.git
+   cd rkbin
+   ./tools/boot_merger RKBOOT/RK3399MINIALL_SPINOR.ini
+   cd ..
+   ./rkdeveloptool db rkbin/rk3399_loader_spinor_v1.30.114.bin
+   ./rkdeveloptool ef
+   ./rkdeveloptool wl 0 ../u-boot-rockchip-spi.bin
diff --git a/doc/board/theobroma-systems/ringneck_px30.rst b/doc/board/theobroma-systems/ringneck_px30.rst
new file mode 100644
index 00000000000..c16b9ed17ed
--- /dev/null
+++ b/doc/board/theobroma-systems/ringneck_px30.rst
@@ -0,0 +1,95 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+PX30-uQ7 Ringneck
+=================
+
+The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm, MXM-230
+connector) system-on-module from Theobroma Systems, featuring the Rockchip PX30.
+
+It provides the following feature set:
+
+  * up to 4GB DDR4
+  * up to 128GB on-module eMMC (with 8-bit 1.8V interface)
+  * SD card (on a baseboard) via edge connector
+  * Fast Ethernet with on-module TI DP83825I PHY
+  * MIPI-DSI/LVDS
+  * MIPI-CSI
+  * USB
+
+    - 1x USB 2.0 dual-role
+    - 3x USB 2.0 host
+
+  * on-module companion controller (STM32 Cortex-M0 or ATtiny), implementing:
+
+    - low-power RTC functionality (ISL1208 emulation)
+    - fan controller (AMC6821 emulation)
+    - USB<->CAN bridge controller (STM32 only)
+
+  * on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi
+  * on-module NXP SE05x Secure Element
+
+Here is the step-by-step to boot to U-Boot on PX30-uQ7 Ringneck from Theobroma
+Systems.
+
+Get the Source and build ATF binary
+-----------------------------------
+
+.. prompt:: bash
+
+   git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+   cd trusted-firmware-a
+   make CROSS_COMPILE=aarch64-linux-gnu- PLAT=px30 bl31
+   export BL31=$PWD/build/px30/release/bl31/bl31.elf
+
+Compile the U-Boot
+------------------
+
+.. prompt:: bash
+
+   cd ../u-boot
+   make CROSS_COMPILE=aarch64-linux-gnu- ringneck-px30_defconfig all
+
+This will build ``u-boot-rockchip.bin`` which can be written to an MMC device
+(eMMC or SD card).
+
+Flash the image
+---------------
+
+Copy ``u-boot-rockchip.bin`` to offset 32k for SD/eMMC.
+
+SD-Card
+~~~~~~~
+
+.. prompt:: bash
+
+   dd if=u-boot-rockchip.bin of=/dev/sdX seek=64
+
+.. note::
+
+   Replace ``/dev/sdX`` to match your SD card kernel device.
+
+eMMC
+~~~~
+
+``rkdeveloptool`` allows to flash the on-board eMMC via the USB OTG interface
+with help of the Rockchip loader binary.
+
+To enter the USB flashing mode on Haikou baseboard, remove any SD card, insert a
+micro-USB cable in the ``Q7 USB P1`` connector (P8), move ``SW5`` switch into
+``BIOS Disable`` mode, power cycle or reset the board and move ``SW5`` switch
+back to ``Normal Boot`` mode. A new USB device should have appeared on your PC
+(check with ``lsusb -d 2207:330d``).
+
+To flash U-Boot on the eMMC with ``rkdeveloptool``:
+
+.. prompt:: bash
+
+   git clone https://github.com/rockchip-linux/rkdeveloptool
+   cd rkdeveloptool
+   autoreconf -i && CPPFLAGS=-Wno-format-truncation ./configure && make
+   git clone https://github.com/rockchip-linux/rkbin.git
+   cd rkbin
+   ./tools/boot_merger RKBOOT/PX30MINIALL.ini
+   cd ..
+   ./rkdeveloptool db rkbin/px30_loader_v2.08.135.bin
+   ./rkdeveloptool wl 64 ../u-boot-rockchip.bin
diff --git a/doc/board/theobroma-systems/tiger_rk3588.rst b/doc/board/theobroma-systems/tiger_rk3588.rst
new file mode 100644
index 00000000000..a73eec7fb9b
--- /dev/null
+++ b/doc/board/theobroma-systems/tiger_rk3588.rst
@@ -0,0 +1,102 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+SOM-RK3588-Q7 Tiger
+===================
+
+The RK3588-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
+connector) system-on-module from Theobroma Systems, featuring the
+Rockchip RK3588.
+
+It provides the following feature set:
+ * up to 16GB LPDDR4x
+ * on-module eMMC
+ * SD card (on a baseboard) via edge connector
+ * Gigabit Ethernet with on-module GbE PHY
+ * HDMI/eDP
+ * MIPI-DSI
+ * 4x MIPI-CSI (3x on FPC connectors, 1x over Q7)
+ * HDMI input over FPC connector
+ * CAN
+ * USB
+   - 1x USB 3.0 dual-role (direct connection)
+   - 2x USB 3.0 host + 1x USB 2.0 host
+ * PCIe
+   - 1x PCIe 2.1 Gen3, 4 lanes
+   - 2xSATA / 2x PCIe 2.1 Gen1, 2 lanes
+ * on-module ATtiny816 companion controller, implementing:
+   - low-power RTC functionality (ISL1208 emulation)
+   - fan controller (AMC6821 emulation)
+ * on-module Secure Element with Global Platform 2.2.1 compliant
+   JavaCard environment
+
+Here is the step-by-step to boot to U-Boot on SOM-RK3588-Q7 Tiger from Theobroma
+Systems.
+
+Get the TF-A and DDR init (TPL) binaries
+----------------------------------------
+
+.. prompt:: bash
+
+   git clone https://github.com/rockchip-linux/rkbin
+   cd rkbin
+   export RKBIN=$(pwd)
+   export BL31=$RKBIN/bin/rk35/rk3588_bl31_v1.38.elf
+   export ROCKCHIP_TPL=$RKBIN/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.11.bin
+   sed -i 's/^uart baudrate=.*$/uart baudrate=115200/' tools/ddrbin_param.txt
+   sed -i 's/^uart iomux=.*$/uart iomux=2/' tools/ddrbin_param.txt
+   ./tools/ddrbin_tool tools/ddrbin_param.txt "$ROCKCHIP_TPL"
+   ./tools/boot_merger RKBOOT/RK3588MINIALL.ini
+   export RKDB=$RKBIN/rk3588_spl_loader_v1.11.112.bin
+
+This will setup all required external dependencies for compiling U-Boot. This will
+be updated in the future once upstream Trusted-Firmware-A supports RK3588 or U-Boot
+gains support for open-source DRAM initialization in TPL.
+
+Build U-Boot
+------------
+
+.. prompt:: bash
+
+   cd ../u-boot
+   make CROSS_COMPILE=aarch64-linux-gnu- tiger-rk3588_defconfig all
+
+This will build ``u-boot-rockchip.bin`` which can be written to an MMC device
+(eMMC or SD card).
+
+Flash the image
+---------------
+
+Copy ``u-boot-rockchip.bin`` to offset 32k for SD/eMMC.
+
+SD-Card
+~~~~~~~
+
+.. prompt:: bash
+
+   dd if=u-boot-rockchip.bin of=/dev/sdX seek=64
+
+.. note::
+
+   Replace ``/dev/sdX`` to match your SD card kernel device.
+
+eMMC
+~~~~
+
+``rkdeveloptool`` allows to flash the on-board eMMC via the USB OTG interface
+with help of the Rockchip loader binary.
+
+To enter the USB flashing mode on Haikou baseboard, remove any SD card, insert a
+micro-USB cable in the ``Q7 USB P1`` connector (P8), move ``SW5`` switch into
+``BIOS Disable`` mode, power cycle or reset the board and move ``SW5`` switch
+back to ``Normal Boot`` mode. A new USB device should have appeared on your PC
+(check with ``lsusb -d 2207:350b``).
+
+To flash U-Boot on the eMMC with ``rkdeveloptool``:
+
+.. prompt:: bash
+
+   git clone https://github.com/rockchip-linux/rkdeveloptool
+   cd rkdeveloptool
+   autoreconf -i && CPPFLAGS=-Wno-format-truncation ./configure && make
+   ./rkdeveloptool db "$RKDB"
+   ./rkdeveloptool wl 64 ../u-boot-rockchip.bin
diff --git a/doc/board/ti/am335x_evm.rst b/doc/board/ti/am335x_evm.rst
new file mode 100644
index 00000000000..7a3125d705b
--- /dev/null
+++ b/doc/board/ti/am335x_evm.rst
@@ -0,0 +1,473 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Tom Rini <trini@konsulko.com>
+
+AM335x Generation
+=================
+
+Summary
+-------
+
+This document covers various features of the `am335x_evm` default
+configuration, some of the related defconfigs, and how to enable hardware
+features not present by default in the defconfigs.
+
+Hardware
+--------
+
+The binary produced by this board supports, based on parsing of the EEPROM
+documented in TI's reference designs:
+* AM335x GP EVM
+* AM335x EVM SK
+* The Beaglebone family of designs
+
+Customization
+-------------
+
+Given that all of the above boards are reference platforms (and the
+Beaglebone platforms are OSHA), it is likely that this platform code and
+configuration will be used as the basis of a custom platform.  It is
+worth noting that aside from things such as NAND or MMC only being
+required if a custom platform makes use of these blocks, the following
+are required, depending on design:
+
+* GPIO is only required if DDR3 power is controlled in a way similar to EVM SK
+* SPI is only required for SPI flash, or exposing the SPI bus.
+
+The following blocks are required:
+
+* I2C, to talk with the PMIC and ensure that we do not run afoul of
+  errata 1.0.24.
+
+When removing options as part of customization, note that you will likely need
+to look at both `include/configs/am335x_evm.h`,
+`include/configs/ti_am335x_common.h` and `include/configs/am335x_evm.h` as the
+migration to Kconfig is not yet complete.
+
+Secure Boot
+-----------
+
+.. secure_boot_include_start_config_ti_secure_device
+
+Secure TI devices require a boot image that is authenticated by ROM
+code to function. Without this, even JTAG remains locked and the
+device is essentially useless. In order to create a valid boot image for
+a secure device from TI, the initial public software image must be signed
+and combined with various headers, certificates, and other binary images.
+
+Information on the details on the complete boot image format can be obtained
+from Texas Instruments. The tools used to generate boot images for secure
+devices are part of a secure development package (SECDEV) that can be
+downloaded from:
+
+	https://www.ti.com/mysecuresoftware (login required)
+
+The secure development package is access controlled due to NDA and export
+control restrictions. Access must be requested and granted by TI before the
+package is viewable and downloadable. Contact TI, either online or by way
+of a local TI representative, to request access.
+
+.. secure_boot_include_end_config_ti_secure_device
+
+.. secure_boot_include_start_spl_boot
+
+1. Booting of U-Boot SPL
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+When CONFIG_TI_SECURE_DEVICE is set, the U-Boot SPL build process
+requires the presence and use of these tools in order to create a
+viable boot image. The build process will look for the environment
+variable TI_SECURE_DEV_PKG, which should be the path of the installed
+SECDEV package. If the TI_SECURE_DEV_PKG variable is not defined or
+if it is defined but doesn't point to a valid SECDEV package, a
+warning is issued during the build to indicate that a final secure
+bootable image was not created.
+
+Within the SECDEV package exists an image creation script:
+
+.. prompt:: bash $
+
+   ${TI_SECURE_DEV_PKG}/scripts/create-boot-image.sh
+
+This is called as part of the SPL/u-boot build process. As the secure
+boot image formats and requirements differ between secure SOC from TI,
+the purpose of this script is to abstract these details as much as
+possible.
+
+The script is basically the only required interface to the TI SECDEV
+package for creating a bootable SPL image for secure TI devices.
+
+.. prompt:: bash $
+
+   create-boot-image.sh \
+		<IMAGE_FLAG> <INPUT_FILE> <OUTPUT_FILE> <SPL_LOAD_ADDR>
+
+.. secure_boot_include_end_spl_boot
+
+<IMAGE_FLAG> is a value that specifies the type of the image to
+generate OR the action the image generation tool will take. Valid
+values are:
+
+.. list-table::
+   :widths: 25 25
+   :header-rows: 0
+
+   * - PI_X-LOADER
+     - Generates an image for SPI flash (byte swapped)
+   * - X-LOADER
+     - Generates an image for non-XIP flash
+   * - MLO
+     - Generates an image for SD/MMC/eMMC media
+   * - 2ND
+     - Generates an image for USB, UART and Ethernet
+   * - XIP_X-LOADER
+     - Generates a single stage u-boot for NOR/QSPI XiP
+
+<INPUT_FILE> is the full path and filename of the public world boot
+loaderbinary file (depending on the boot media, this is usually
+either u-boot-spl.bin or u-boot.bin).
+
+<OUTPUT_FILE> is the full path and filename of the final secure
+image. The output binary images should be used in place of the standard
+non-secure binary images (see the platform-specific user's guides and
+releases notes for how the non-secure images are typically used)
+
+.. list-table::
+   :widths: 25 25
+   :header-rows: 0
+
+   * - u-boot-spl_HS_SPI_X-LOADER
+     - byte swapped boot image for SPI flash
+   * - u-boot-spl_HS_X-LOADER
+     - boot image for NAND or SD/MMC/eMMC rawmode
+   * - u-boot-spl_HS_MLO
+     - boot image for SD/MMC/eMMC media
+   * - u-boot-spl_HS_2ND
+     - boot image for USB, UART and Ethernet
+   * - u-boot_HS_XIP_X-LOADER
+     - boot image for NOR or QSPI Xip flash
+
+<SPL_LOAD_ADDR> is the address at which SOC ROM should load the
+<INPUT_FILE>
+
+.. secure_boot_include_start_primary_u_boot
+
+2. Booting of Primary U-Boot (u-boot.img)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The SPL image is responsible for loading the next stage boot loader,
+which is the main u-boot image. For secure TI devices, the SPL will
+be authenticated, as described above, as part of the particular
+device's ROM boot process. In order to continue the secure boot
+process, the authenticated SPL must authenticate the main u-boot
+image that it loads.
+
+The configurations for secure TI platforms are written to make the boot
+process use the FIT image format for the u-boot.img (CONFIG_SPL_FRAMEWORK
+and CONFIG_SPL_LOAD_FIT). With these configurations the binary
+components that the SPL loads include a specific DTB image and u-boot
+image. These DTB image may be one of many available to the boot
+process. In order to secure these components so that they can be
+authenticated by the SPL as they are loaded from the FIT image,	the
+build procedure for secure TI devices will secure these images before
+they are integrated into the FIT image. When those images are extracted
+from the FIT image at boot time, they are post-processed to verify that
+they are still secure. The outlined security-related SPL post-processing
+is enabled through the CONFIG_SPL_FIT_IMAGE_POST_PROCESS option which
+must be enabled for the secure boot scheme to work. In order to allow
+verifying proper operation of the secure boot chain in case of successful
+authentication messages like "Authentication passed" are output by the
+SPL to the console for each blob that got extracted from the FIT image.
+
+The exact details of the how the images are secured is handled by the
+SECDEV package. Within the SECDEV package exists a script to process
+an input binary image:
+
+.. prompt:: bash $
+
+   ${TI_SECURE_DEV_PKG}/scripts/secure-binary-image.sh
+
+This is called as part of the u-boot build process. As the secure
+image formats and requirements can differ between the various secure
+SOCs from TI, this script in the SECDEV package abstracts these
+details. This script is essentially the only required interface to the
+TI SECDEV package for creating a u-boot.img image for secure TI
+devices.
+
+The SPL/u-boot code contains calls to dedicated secure ROM functions
+to perform the validation on the secured images. The details of the
+interface to those functions is shown in the code. The summary
+is that they are accessed by invoking an ARM secure monitor call to
+the device's secure ROM (fixed read-only-memory that is secure and
+only accessible when the ARM core is operating in the secure mode).
+
+Invoking the secure-binary-image script for Secure Devices
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. prompt:: bash $
+
+   secure-binary-image.sh <INPUT_FILE> <OUTPUT_FILE>
+
+<INPUT_FILE> is the full path and filename of the input binary image
+
+<OUTPUT_FILE> is the full path and filename of the output secure image.
+
+.. secure_boot_include_end_primary_u_boot
+
+NAND
+----
+
+The AM335x GP EVM ships with a 256MiB NAND available in most profiles.  In
+this example to program the NAND we assume that an SD card has been
+inserted with the files to write in the first SD slot and that mtdparts
+have been configured correctly for the board. All images are first loaded
+into memory, then written to NAND.
+
+1. Building u-boot for NAND boot
+
+.. list-table:: CONFIGxx options for NAND device
+   :widths: 25 25
+   :header-rows: 1
+
+   * - Config
+     - Description
+   * - CONFIG_SYS_NAND_PAGE_SIZE
+     - number of main bytes in NAND page
+   * - CONFIG_SYS_NAND_OOBSIZE
+     - number of OOB bytes in NAND page
+   * - CONFIG_SYS_NAND_BLOCK_SIZE
+     - number of bytes in NAND erase-block
+   * - CFG_SYS_NAND_ECCPOS
+     - ECC map for NAND page
+   * - CONFIG_NAND_OMAP_ECCSCHEME
+     - (refer doc/README.nand)
+
+2. Flashing NAND via MMC/SD
+
+.. prompt:: bash =>
+
+   # select BOOTSEL to MMC/SD boot and boot from MMC/SD card
+   mmc rescan
+   # erase flash
+   nand erase.chip
+   env default -f -a
+   saveenv
+   # flash MLO. Redundant copies of MLO are kept for failsafe
+   load mmc 0 0x82000000 MLO
+   nand write 0x82000000 0x00000 0x20000
+   nand write 0x82000000 0x20000 0x20000
+   nand write 0x82000000 0x40000 0x20000
+   nand write 0x82000000 0x60000 0x20000
+   # flash u-boot.img
+   load mmc 0 0x82000000 u-boot.img
+   nand write 0x82000000 0x80000 0x60000
+   # flash kernel image
+   load mmc 0 0x82000000 uImage
+   nand write 0x82000000 ${nandsrcaddr} ${nandimgsize}
+   # flash filesystem image
+   load mmc 0 0x82000000 filesystem.img
+   nand write 0x82000000 ${loadaddress} 0x300000
+
+3. Set BOOTSEL pin to select NAND boot, and POR the device.
+	The device should boot from images flashed on NAND device.
+
+
+Falcon Mode
+-----------
+
+The default build includes "Falcon Mode" (see doc/README.falcon) via NAND,
+eMMC (or raw SD cards) and FAT SD cards.  Our default behavior currently is
+to read a 'c' on the console while in SPL at any point prior to loading the
+OS payload (so as soon as possible) to opt to booting full U-Boot.  Also
+note that while one can program Falcon Mode "in place" great care needs to
+be taken by the user to not 'brick' their setup.  As these are all eval
+boards with multiple boot methods, recovery should not be an issue in this
+worst-case however.
+
+Falcon Mode: eMMC
+-----------------
+
+The recommended layout in this case is:
+
+.. list-table:: eMMC Recommended Layout
+   :widths: 25 25 50
+   :header-rows: 1
+
+   * - MMC Blocks
+     - Description
+     - Location in bytes
+   * - 0x0000 - 0x007F
+     - MBR or GPT table
+     - 0x000000 - 0x020000
+   * - 0x0080 - 0x00FF
+     - ARGS or FDT file
+     - 0x010000 - 0x020000
+   * - 0x0100 - 0x01FF
+     - SPL.backup1 (first copy used)
+     - 0x020000 - 0x040000
+   * - 0x0200 - 0x02FF
+     - SPL.backup2 (second copy used)
+     - 0x040000 - 0x060000
+   * - 0x0300 - 0x06FF
+     - U-Boot
+     - 0x060000 - 0x0e0000
+   * - 0x0700 - 0x08FF
+     - U-Boot Env + Redundant
+     - 0x0e0000 - 0x120000
+   * - 0x0900 - 0x28FF
+     - Kernel
+     - 0x120000 - 0x520000
+
+Note that when we run 'spl export' it will prepare to boot the kernel.
+This includes relocation of the uImage from where we loaded it to the entry
+point defined in the header.  As these locations overlap by default, it
+would leave us with an image that if written to MMC will not boot, so
+instead of using the loadaddr variable we use 0x81000000 in the following
+example.  In this example we are loading from the network, for simplicity,
+and assume a valid partition table already exists and 'mmc dev' has already
+been run to select the correct device.  Also note that if you previously
+had a FAT partition (such as on a Beaglebone Black) it is not enough to
+write garbage into the area, you must delete it from the partition table
+first.
+
+.. prompt:: bash =>
+
+   # Ensure we are able to talk with this mmc device
+   mmc rescan
+   tftp 81000000 am335x/MLO
+   # Write to two of the backup locations ROM uses
+   mmc write 81000000 100 100
+   mmc write 81000000 200 100
+   # Write U-Boot to the location set in the config
+   tftp 81000000 am335x/u-boot.img
+   mmc write 81000000 300 400
+   # Load kernel and device tree into memory, perform export
+   tftp 81000000 am335x/uImage
+   run findfdt
+   tftp ${fdtaddr} am335x/${fdtfile}
+   run mmcargs
+   spl export fdt 81000000 - ${fdtaddr}
+   # Write the updated device tree to MMC
+   mmc write ${fdtaddr} 80 80
+   # Write the uImage to MMC
+   mmc write 81000000 900 2000
+
+Falcon Mode: FAT SD cards
+-------------------------
+
+In this case the additional file is written to the filesystem.  In this
+example we assume that the uImage and device tree to be used are already on
+the FAT filesystem (only the uImage MUST be for this to function
+afterwards) along with a Falcon Mode aware MLO and the FAT partition has
+already been created and marked bootable:
+
+.. prompt:: bash =>
+
+   mmc rescan
+   # Load kernel and device tree into memory, perform export
+   load mmc 0:1 ${loadaddr} uImage
+   run findfdt
+   load mmc 0:1 ${fdtaddr} ${fdtfile}
+   run mmcargs
+   spl export fdt ${loadaddr} - ${fdtaddr}
+
+This will print a number of lines and then end with something like:
+
+.. code-block:: bash
+
+   Using Device Tree in place at 80f80000, end 80f85928
+   Using Device Tree in place at 80f80000, end 80f88928
+
+So then you:
+
+.. prompt:: bash =>
+
+   fatwrite mmc 0:1 0x80f80000 args 8928
+
+Falcon Mode: NAND
+-----------------
+
+In this case the additional data is written to another partition of the
+NAND.  In this example we assume that the uImage and device tree to be are
+already located on the NAND somewhere (such as filesystem or mtd partition)
+along with a Falcon Mode aware MLO written to the correct locations for
+booting and mtdparts have been configured correctly for the board:
+
+.. prompt:: bash =>
+
+   nand read ${loadaddr} kernel
+   load nand rootfs ${fdtaddr} /boot/am335x-evm.dtb
+   run nandargs
+   spl export fdt ${loadaddr} - ${fdtaddr}
+   nand erase.part u-boot-spl-os
+   nand write ${fdtaddr} u-boot-spl-os
+
+USB device
+----------
+
+The platform code for am33xx based designs is legacy in the sense that
+it is not fully compliant with the driver model in its management of the
+various resources. This is particularly true for the USB Ethernet gadget
+which will automatically be bound to the first USB Device Controller
+(UDC). This make the USB Ethernet gadget work out of the box on common
+boards like the Beagle Bone Blacks and by default will prevents other
+gadgets to be used.
+
+The output of the 'dm tree' command shows which driver is bound to which
+device, so the user can easily configure their platform differently from
+the command line:
+
+.. prompt:: bash =>
+
+   dm tree
+
+.. code-block:: text
+
+   Class     Index  Probed  Driver                Name
+  -----------------------------------------------------------
+  [...]
+  misc          0  [ + ]   ti-musb-wrapper       |   |-- usb@47400000
+  usb           0  [ + ]   ti-musb-peripheral    |   |   |-- usb@47401000
+  ethernet      1  [ + ]   usb_ether             |   |   |   `-- usb_ether
+  bootdev       3  [   ]   eth_bootdev           |   |   |       `-- usb_ether.bootdev
+  usb           0  [   ]   ti-musb-host          |   |   `-- usb@47401800
+
+Typically here any network command performed using the usb_ether
+interface would work, while using other gadgets would fail:
+
+.. prompt:: bash =>
+
+   fastboot usb 0
+
+.. code-block:: text
+
+  All UDC in use (1 available), use the unbind command
+  g_dnl_register: failed!, error: -19
+  exit not allowed from main input shell.
+
+As hinted by the primary error message, the only controller available
+(usb@47401000) is currently bound to the usb_ether driver, which makes
+it impossible for the fastboot command to bind with this device (at
+least from a bootloader point of view). The solution here would be to
+use the unbind command specifying the class and index parameters (as
+shown above in the 'dm tree' output) to target the driver to unbind:
+
+.. prompt:: bash =>
+
+   unbind ethernet 1
+
+The output of the 'dm tree' command now shows the availability of the
+first USB device controller, the fastboot gadget will now be able to
+bind with it:
+
+.. prompt:: bash =>
+
+   dm tree
+
+.. code-block:: text
+
+  Class     Index  Probed  Driver                Name
+  -----------------------------------------------------------
+  [...]
+  misc          0  [ + ]   ti-musb-wrapper       |   |-- usb@47400000
+  usb           0  [   ]   ti-musb-peripheral    |   |   |-- usb@47401000
+  usb           0  [   ]   ti-musb-host          |   |   `-- usb@47401800
diff --git a/doc/board/ti/am43xx_evm.rst b/doc/board/ti/am43xx_evm.rst
new file mode 100644
index 00000000000..543526cd281
--- /dev/null
+++ b/doc/board/ti/am43xx_evm.rst
@@ -0,0 +1,188 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Neha Malcom Francis <n-francis@ti.com>
+
+AM43xx Generation
+=================
+
+Secure Boot
+-----------
+
+.. include:: am335x_evm.rst
+   :start-after: .. secure_boot_include_start_config_ti_secure_device
+   :end-before: .. secure_boot_include_end_config_ti_secure_device
+
+.. include:: am335x_evm.rst
+   :start-after: .. secure_boot_include_start_spl_boot
+   :end-before: .. secure_boot_include_end_spl_boot
+
+<IMAGE_FLAG> is a value that specifies the type of the image to
+generate OR the action the image generation tool will take. Valid
+values are:
+
+.. list-table::
+   :widths: 25 25
+   :header-rows: 0
+
+   * - SPI_X-LOADER
+     - Generates an image for SPI flash (byte swapped)
+   * - XIP_X-LOADER
+     - Generates a single stage u-boot for NOR/QSPI XiP
+   * - ISSW
+     - Generates an image for all other boot modes
+
+<INPUT_FILE> is the full path and filename of the public world boot
+loaderbinary file (depending on the boot media, this is usually
+either u-boot-spl.bin or u-boot.bin).
+
+<OUTPUT_FILE> is the full path and filename of the final secure
+image. The output binary images should be used in place of the standard
+non-secure binary images (see the platform-specific user's guides and
+releases notes for how the non-secure images are typically used)
+
+.. list-table::
+   :widths: 25 25
+   :header-rows: 0
+
+   * - u-boot-spl_HS_SPI_X-LOADER
+     - byte swapped boot image for SPI flash
+   * - u-boot_HS_XIP_X-LOADER
+     - boot image for NOR or QSPI Xip flash
+   * - u-boot-spl_HS_ISSW
+     - boot image for all other boot media
+
+
+<SPL_LOAD_ADDR> is the address at which SOC ROM should load the
+<INPUT_FILE>
+
+.. include:: am335x_evm.rst
+   :start-after: .. secure_boot_include_start_primary_u_boot
+   :end-before: .. secure_boot_include_end_primary_u_boot
+
+.. qspi_boot_support_include_start
+
+QSPI U-Boot support
+-------------------
+
+Host processor is connected to serial flash device via qpsi
+interface. QSPI is a kind of spi module that allows single,
+dual and quad read access to external spi devices. The module
+has a memory mapped interface which provide direct interface
+for accessing data form external spi devices.
+
+The one QSPI in the device is primarily intended for fast booting
+from Quad SPI flash devices.
+
+Usecase
+^^^^^^^
+
+MLO/u-boot.img will be flashed from SD/MMC to the flash device
+using serial flash erase and write commands. Then, switch settings
+will be changed to qspi boot. Then, the ROM code will read MLO
+from the predefined location in the flash, where it was flashed and
+execute it after storing it in SDRAM. Then, the MLO will read
+u-boot.img from flash and execute it from SDRAM.
+
+SPI mode
+^^^^^^^^
+
+SPI mode uses mtd spi framework for transfer and reception of data.
+Can be used in:
+
+ #. Normal mode: use single pin for transfers
+ #. Dual Mode: use two pins for transfers.
+ #. Quad mode: use four pin for transfer
+
+Memory mapped read mode
+^^^^^^^^^^^^^^^^^^^^^^^
+
+In this, SPI controller is configured using configuration port and then
+controller is switched to memory mapped port for data read.
+
+Driver
+^^^^^^
+
+drivers/qspi/ti_qspi.c
+    - File which is responsible for configuring the
+      qspi controller and also for providing the low level api which
+      is responsible for transferring the datas from host controller
+      to flash device and vice versa.
+
+.. qspi_boot_support_include_end
+
+Testing
+^^^^^^^
+
+These are the testing details of qspi flash driver with Macronix M25L51235
+flash device.
+
+The test includes
+ - probing the flash device
+ - erasing the flash device
+ - Writing to flash
+ - Reading the contents of the flash.
+
+Test Log
+
+.. code-block:: bash
+
+  Hit any key to stop autoboot:  0
+  => sf probe 0
+  SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000
+  => sf erase 0 0x80000
+  SF: 524288 bytes @ 0x0 Erased: OK
+  => mw 81000000 0xdededede 0x40000
+  => sf write 81000000 0 0x40000
+  SF: 262144 bytes @ 0x0 Written: OK
+  => sf read 82000000 0 0x40000
+  SF: 262144 bytes @ 0x0 Read: OK
+  => md 0x82000000
+  82000000: dededede dededede dededede dededede    ................
+  82000010: dededede dededede dededede dededede    ................
+  82000020: dededede dededede dededede dededede    ................
+  82000030: dededede dededede dededede dededede    ................
+  82000040: dededede dededede dededede dededede    ................
+  82000050: dededede dededede dededede dededede    ................
+  82000060: dededede dededede dededede dededede    ................
+  82000070: dededede dededede dededede dededede    ................
+  82000080: dededede dededede dededede dededede    ................
+  82000090: dededede dededede dededede dededede    ................
+  820000a0: dededede dededede dededede dededede    ................
+  820000b0: dededede dededede dededede dededede    ................
+  820000c0: dededede dededede dededede dededede    ................
+  820000d0: dededede dededede dededede dededede    ................
+  820000e0: dededede dededede dededede dededede    ................
+  820000f0: dededede dededede dededede dededede    ................
+  => md 0x82010000
+  82010000: dededede dededede dededede dededede    ................
+  82010010: dededede dededede dededede dededede    ................
+  82010020: dededede dededede dededede dededede    ................
+  82010030: dededede dededede dededede dededede    ................
+  82010040: dededede dededede dededede dededede    ................
+  82010050: dededede dededede dededede dededede    ................
+  82010060: dededede dededede dededede dededede    ................
+  82010070: dededede dededede dededede dededede    ................
+  82010080: dededede dededede dededede dededede    ................
+  82010090: dededede dededede dededede dededede    ................
+  820100a0: dededede dededede dededede dededede    ................
+  820100b0: dededede dededede dededede dededede    ................
+  820100c0: dededede dededede dededede dededede    ................
+  820100d0: dededede dededede dededede dededede    ................
+  820100e0: dededede dededede dededede dededede    ................
+  820100f0: dededede dededede dededede dededede    ................
+  => md 0x82030000
+  82030000: dededede dededede dededede dededede    ................
+  82030010: dededede dededede dededede dededede    ................
+  82030020: dededede dededede dededede dededede    ................
+  82030030: dededede dededede dededede dededede    ................
+  82030040: dededede dededede dededede dededede    ................
+  82030050: dededede dededede dededede dededede    ................
+  82030060: dededede dededede dededede dededede    ................
+  82030070: dededede dededede dededede dededede    ................
+  82030080: dededede dededede dededede dededede    ................
+  82030090: dededede dededede dededede dededede    ................
+  820300a0: dededede dededede dededede dededede    ................
+  820300b0: dededede dededede dededede dededede    ................
+  820300c0: dededede dededede dededede dededede    ................
+  820300d0: dededede dededede dededede dededede    ................
+  820300e0: dededede dededede dededede dededede    ................
+  820300f0: dededede dededede dededede dededede    ................
diff --git a/doc/board/ti/am62ax_sk.rst b/doc/board/ti/am62ax_sk.rst
new file mode 100644
index 00000000000..60726b6652c
--- /dev/null
+++ b/doc/board/ti/am62ax_sk.rst
@@ -0,0 +1,213 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Jai Luthra <j-luthra@ti.com>
+
+AM62A Platforms
+===============
+
+Introduction:
+-------------
+The AM62A SoC family is built on the K3 Multicore SoC architecture platform,
+providing a deep learning accelerator, multi-camera support with ISP, video
+transcoder and other BOM-saving integrations.
+The AM62A SoC enables cost-sensitive automotive applications including driver
+and in-cabin monitoring systems, next generation of eMirror system, as well as
+a broad set of industrial applications in Factory Automation, Building
+Automation, Robotics and more.
+
+Some highlights of this SoC are:
+
+* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
+* Cortex-R5F for general-purpose or safety usage.
+* Deep Learning Accelerator with Single-core C7x Vector DSP with MMA (up to
+  1.0GHz).
+* Vision Processing Accelerator (VPAC) with a 315MPixel/s ISP (up to 5MP @
+  60fps) supporting 16-bit RAW input with RGB-IR separation.
+* 4K Video encoder and decoder for HEVC (Level 5.1 High-tier) and H.264 (Level
+  5.2) supporting upto 240MPixels/s and MJPEG encoder at 416MPixels/s
+* Single display with 24-bit RGB parallel (DPI) interface supporting upto
+  165Mhz pixel clock for 2K resolution.
+* Integrated Giga-bit Ethernet switch supporting up to a total of two
+  external ports (TSN capable).
+* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
+  NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
+  1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
+* Dedicated Centralized System Controller for Security, Power, and
+  Resource Management.
+* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
+  enabling battery powered system design.
+
+More details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruj16
+
+Platform information:
+
+* https://www.ti.com/tool/SK-AM62A-LP
+
+Boot Flow:
+----------
+Below is the pictorial representation of boot flow:
+
+.. image:: img/boot_diagram_k3_current.svg
+  :alt: Boot flow diagram
+
+- Here TIFS acts as master and provides all the critical services. R5/A53
+  requests TIFS to get these services done as shown in the above diagram.
+
+Sources:
+--------
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=am62ax_evm_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=am62ax_evm_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ # we dont use any extra TFA parameters
+ $ unset TFA_EXTRA_ARGS
+ $ export OPTEE_PLATFORM=k3-am62ax
+ $ # we dont use any extra OPTEE parameters
+ $ unset OPTEE_EXTRA_ARGS
+
+1. Trusted Firmware-A:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+2. OP-TEE:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A53:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+
+Target Images
+--------------
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img.  Each SoC
+variant (GP, HS-FS, HS-SE) requires a different source for these files.
+
+ - GP
+
+        * tiboot3-am62ax-gp-evm.bin from step 3.1
+        * tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
+
+ - HS-FS
+
+        * tiboot3-am62ax-hs-fs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+ - HS-SE
+
+        * tiboot3-am62ax-hs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/multi_cert_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: img/dm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+Switch Setting for Boot Mode
+----------------------------
+
+Boot Mode pins provide means to select the boot mode and options before the
+device is powered up. After every POR, they are the main source to populate
+the Boot Parameter Tables.
+
+The following table shows some common boot modes used on AM62 platform. More
+details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruj16 under the `Boot Mode Pins` section.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW2: 12345678
+     - SW3: 12345678
+
+   * - SD
+     - 01000000
+     - 11000010
+
+   * - OSPI
+     - 00000000
+     - 11001110
+
+   * - EMMC
+     - 00000000
+     - 11010010
+
+   * - UART
+     - 00000000
+     - 11011100
+
+   * - USB DFU
+     - 00000000
+     - 11001010
+
+For SW2 and SW1, the switch state in the "ON" position = 1.
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+  **OpenOCD support since**: August 2023 (git master)
+
+  Until the next stable release of OpenOCD is available in your development
+  environment's distribution, it might be necessary to build OpenOCD `from the
+  source <https://github.com/openocd-org/openocd>`_.
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+    :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to the board
+
+.. code-block:: bash
+
+  openocd -f board/ti_am62a7evm.cfg
diff --git a/doc/board/ti/am62px_sk.rst b/doc/board/ti/am62px_sk.rst
new file mode 100644
index 00000000000..c80b5068117
--- /dev/null
+++ b/doc/board/ti/am62px_sk.rst
@@ -0,0 +1,313 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Bryan Brattlof <bb@ti.com>
+
+AM62Px Platforms
+================
+
+The AM62Px is an extension of the existing Sitara AM62x low-cost family
+of application processors built for Automotive and Linux Application
+development. Scalable Arm Cortex-A53 performance and embedded features,
+such as: multi high-definition display support, 3D-graphics
+acceleration, 4K video acceleration, and extensive peripherals make the
+AM62Px well-suited for a broad range of automation and industrial
+application, including automotive digital instrumentation, automotive
+displays, industrial HMI, and more.
+
+Some highlights of AM62P SoC are:
+
+* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
+  Dual/Single core variants are provided in the same package to allow HW
+  compatible designs.
+
+* One Device manager Cortex-R5F for system power and resource
+  management, and one Cortex-R5F for Functional Safety or
+  general-purpose usage.
+
+* One 3D GPU up to 50 GLFOPS
+
+* H.264/H.265 Video Encode/Decode.
+
+* Display support: 3x display support over OLDI/LVDS (1x OLDI-DL, 1x or
+  2x OLDI-SL), DSI, or DPI. Up to 3840x1080 @ 60fps resolution
+
+* Integrated Giga-bit Ethernet switch supporting up to a total of two
+  external ports (TSN capable).
+
+* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3xMMC and SD, GPMC for
+  NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
+  1xCSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
+
+* Dedicated Centralized Hardware Security Module with support for secure
+  boot, debug security and crypto acceleration and trusted execution
+  environment.
+
+* One 32-bit DDR Subsystem that supports LPDDR4, DDR4 memory types.
+
+* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
+  enabling battery powered system design.
+
+For those interested, more details about this SoC can be found in the
+Technical Reference Manual here: https://www.ti.com/lit/pdf/spruj83
+
+Boot Flow:
+----------
+
+The bootflow is exactly the same as all SoCs in the am62xxx extended SoC
+family. Below is the pictorial representation:
+
+.. image:: img/boot_diagram_k3_current.svg
+  :alt: Boot flow diagram
+
+- Here TIFS acts as master and provides all the critical services. R5/A53
+  requests TIFS to get these services done as shown in the above diagram.
+
+Sources:
+--------
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=am62px_evm_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=am62px_evm_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ # we dont use any extra TFA parameters
+ $ unset TFA_EXTRA_ARGS
+ $ export OPTEE_PLATFORM=k3-am62x
+ $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+
+.. am62px_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A53:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+.. am62px_evm_rst_include_end_build_steps
+
+Target Images
+--------------
+
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img.  Each SoC
+variant (HS-FS, HS-SE) requires a different source for these files.
+
+ - HS-FS
+
+        * tiboot3-am62px-hs-fs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+ - HS-SE
+
+        * tiboot3-am62px-hs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/multi_cert_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: img/dm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+OSPI:
+-----
+ROM supports booting from OSPI from offset 0x0.
+
+Flashing images to OSPI:
+
+Below commands can be used to download tiboot3.bin, tispl.bin, and u-boot.img,
+over tftp and then flash those to OSPI at their respective addresses.
+
+.. prompt:: bash =>
+
+  sf probe
+  tftp ${loadaddr} tiboot3.bin
+  sf update $loadaddr 0x0 $filesize
+  tftp ${loadaddr} tispl.bin
+  sf update $loadaddr 0x80000 $filesize
+  tftp ${loadaddr} u-boot.img
+  sf update $loadaddr 0x280000 $filesize
+
+Flash layout for OSPI:
+
+.. image:: img/ospi_sysfw2.svg
+  :alt: OSPI flash partition layout
+
+A53 SPL DDR Memory Layout
+-------------------------
+
+.. am62px_evm_rst_include_start_ddr_mem_layout
+
+This provides an overview memory usage in A53 SPL stage.
+
+.. list-table::
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Region
+     - Start Address
+     - End Address
+
+   * - EMPTY
+     - 0x80000000
+     - 0x80080000
+
+   * - TEXT BASE
+     - 0x80080000
+     - 0x800d8000
+
+   * - EMPTY
+     - 0x800d8000
+     - 0x80200000
+
+   * - BMP IMAGE
+     - 0x80200000
+     - 0x80b77660
+
+   * - STACK
+     - 0x80b77660
+     - 0x80b77e60
+
+   * - GD
+     - 0x80b77e60
+     - 0x80b78000
+
+   * - MALLOC
+     - 0x80b78000
+     - 0x80b80000
+
+   * - EMPTY
+     - 0x80b80000
+     - 0x80c80000
+
+   * - BSS
+     - 0x80c80000
+     - 0x80d00000
+
+   * - BLOBS
+     - 0x80d00000
+     - 0x80d00400
+
+   * - EMPTY
+     - 0x80d00400
+     - 0x81000000
+.. am62px_evm_rst_include_end_ddr_mem_layout
+
+Switch Setting for Boot Mode
+----------------------------
+
+Boot Mode pins provide means to select the boot mode and options before the
+device is powered up. After every POR, they are the main source to populate
+the Boot Parameter Tables.
+
+The following table shows some common boot modes used on AM62Px
+platforms. More details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruj83 under the `Boot Mode Pins` section.
+
+.. note::
+
+   This device is very new. Currently only UART boot is available while
+   we continue to add support for the other bootmodes.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW2: 12345678
+     - SW3: 12345678
+
+   * - SD
+     - 01000000
+     - 11000010
+
+   * - OSPI
+     - 00000000
+     - 11001110
+
+   * - EMMC
+     - 00000000
+     - 11010010
+
+   * - UART
+     - 00000000
+     - 11011100
+
+   * - USB DFU
+     - 00000000
+     - 11001010
+
+For SW2 and SW1, the switch state in the "ON" position = 1.
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+  **OpenOCD support after**: v0.12.0
+
+  While support for the entire K3 generation including the am62xxx
+  extended family was added before v0.12.0, the tcl scripts for the
+  am62px have been accepted and will be available in the next release of
+  OpenOCD. It may be necessary to build OpenOCD from source depending on
+  the version your distribution has packaged.
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+    :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to the board
+
+.. code-block:: bash
+
+  openocd -f board/ti_am62pevm.cfg
diff --git a/doc/board/ti/am62x_sk.rst b/doc/board/ti/am62x_sk.rst
new file mode 100644
index 00000000000..2a25e84f6c9
--- /dev/null
+++ b/doc/board/ti/am62x_sk.rst
@@ -0,0 +1,337 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Vignesh Raghavendra <vigneshr@ti.com>
+
+AM62 Platforms
+==============
+
+Introduction:
+-------------
+The AM62 SoC family is the follow on AM335x built on the K3 Multicore
+SoC architecture platform, providing ultra-low-power modes, dual
+display, multi-sensor edge compute, security and other BOM-saving
+integrations.  The AM62 SoC targets a broad market to enable
+applications such as Industrial HMI, PLC/CNC/Robot control, Medical
+Equipment, Building Automation, Appliances and more.
+
+Some highlights of this SoC are:
+
+* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
+  Pin-to-pin compatible options for single and quad core are available.
+* Cortex-M4F for general-purpose or safety usage.
+* Dual display support, providing 24-bit RBG parallel interface and
+  OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display
+  resolution.
+* Selectable GPU support, up to 8GFLOPS, providing better user experience
+  in 3D graphic display case and Android.
+* PRU(Programmable Realtime Unit) support for customized programmable
+  interfaces/IOs.
+* Integrated Giga-bit Ethernet switch supporting up to a total of two
+  external ports (TSN capable).
+* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
+  NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
+  1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
+* Dedicated Centralized System Controller for Security, Power, and
+  Resource Management.
+* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
+  enabling battery powered system design.
+
+More details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruiv7
+
+Platform information:
+
+* https://www.ti.com/tool/SK-AM62B
+
+Boot Flow:
+----------
+Below is the pictorial representation of boot flow:
+
+.. image:: img/boot_diagram_k3_current.svg
+  :alt: Boot flow diagram
+
+- Here TIFS acts as master and provides all the critical services. R5/A53
+  requests TIFS to get these services done as shown in the above diagram.
+
+Sources:
+--------
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. prompt:: bash $
+
+  export UBOOT_CFG_CORTEXR=am62x_evm_r5_defconfig
+  export UBOOT_CFG_CORTEXA=am62x_evm_a53_defconfig
+  export TFA_BOARD=lite
+  # we dont use any extra TFA parameters
+  unset TFA_EXTRA_ARGS
+  export OPTEE_PLATFORM=k3-am62x
+  export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+
+.. am62x_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.1.1 Alternative build of R5 for DFU boot:
+
+As the SPL size can get too big when building with support for booting both
+from local storage *and* DFU an extra config fragment should be used to enable
+DFU support (and disable storage support)
+
+.. prompt:: bash $
+
+  export UBOOT_CFG_CORTEXR="${UBOOT_CFG_CORTEXR} am62x_r5_usbdfu.config"
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A53:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+.. am62x_evm_rst_include_end_build_steps
+
+Target Images
+-------------
+
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img.  Each SoC
+variant (GP, HS-FS, HS-SE) requires a different source for these files.
+
+ - GP
+
+        * tiboot3-am62x-gp-evm.bin from step 3.1
+        * tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
+
+ - HS-FS
+
+        * tiboot3-am62x-hs-fs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+ - HS-SE
+
+        * tiboot3-am62x-hs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/multi_cert_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: img/dm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+OSPI:
+-----
+ROM supports booting from OSPI from offset 0x0.
+
+Flashing images to OSPI:
+
+Below commands can be used to download tiboot3.bin, tispl.bin, and u-boot.img,
+over tftp and then flash those to OSPI at their respective addresses.
+
+.. prompt:: bash =>
+
+  sf probe
+  tftp ${loadaddr} tiboot3.bin
+  sf update $loadaddr 0x0 $filesize
+  tftp ${loadaddr} tispl.bin
+  sf update $loadaddr 0x80000 $filesize
+  tftp ${loadaddr} u-boot.img
+  sf update $loadaddr 0x280000 $filesize
+
+Flash layout for OSPI:
+
+.. image:: img/ospi_sysfw2.svg
+  :alt: OSPI flash partition layout
+
+A53 SPL DDR Memory Layout
+-------------------------
+
+.. am62x_evm_rst_include_start_ddr_mem_layout
+
+This provides an overview memory usage in A53 SPL stage.
+
+.. list-table::
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Region
+     - Start Address
+     - End Address
+
+   * - EMPTY
+     - 0x80000000
+     - 0x80080000
+
+   * - TEXT BASE
+     - 0x80080000
+     - 0x800d8000
+
+   * - EMPTY
+     - 0x800d8000
+     - 0x80200000
+
+   * - BMP IMAGE
+     - 0x80200000
+     - 0x80b77660
+
+   * - STACK
+     - 0x80b77660
+     - 0x80b77e60
+
+   * - GD
+     - 0x80b77e60
+     - 0x80b78000
+
+   * - MALLOC
+     - 0x80b78000
+     - 0x80b80000
+
+   * - EMPTY
+     - 0x80b80000
+     - 0x80c80000
+
+   * - BSS
+     - 0x80c80000
+     - 0x80d00000
+
+   * - BLOBS
+     - 0x80d00000
+     - 0x80d00400
+
+   * - EMPTY
+     - 0x80d00400
+     - 0x81000000
+.. am62x_evm_rst_include_end_ddr_mem_layout
+
+Switch Setting for Boot Mode
+----------------------------
+
+Boot Mode pins provide means to select the boot mode and options before the
+device is powered up. After every POR, they are the main source to populate
+the Boot Parameter Tables.
+
+The following table shows some common boot modes used on AM62 platform. More
+details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruiv7 under the `Boot Mode Pins` section.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW2: 12345678
+     - SW3: 12345678
+
+   * - SD
+     - 01000000
+     - 11000010
+
+   * - OSPI
+     - 00000000
+     - 11001110
+
+   * - EMMC
+     - 00000000
+     - 11010010
+
+   * - UART
+     - 00000000
+     - 11011100
+
+   * - USB DFU
+     - 00000000
+     - 11001010
+
+For SW2 and SW1, the switch state in the "ON" position = 1.
+
+DFU based boot
+--------------
+
+To boot the board over DFU, set the switches to DFU mode and connect to the
+USB type C DRD port on the board. After power-on the build artifacts needs to be
+uploaded one by one with a tool like dfu-util.
+
+.. am62x_evm_rst_include_start_dfu_boot
+
+The initial ROM will have a DFU alt named `bootloader` for the initial R5 spl
+upload. The next stages as exposed by U-Boot have target alts matching the name
+of the artifacts, for these a USB reset has to be done after each upload.
+
+When using dfu-util the following commands can be used to boot to a U-Boot shell:
+
+.. prompt:: bash $
+
+  dfu-util -a bootloader -D tiboot3.bin
+  dfu-util -R -a tispl -D tispl.bin
+  dfu-util -R -a u-boot.img -D u-boot.img
+
+.. am62x_evm_rst_include_end_dfu_boot
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+  **OpenOCD support since**: v0.12.0
+
+  If the default package version of OpenOCD in your development
+  environment's distribution needs to be updated, it might be necessary to
+  build OpenOCD from the source.
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+    :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to the board
+
+.. prompt:: bash $
+
+  openocd -f board/ti_am625evm.cfg
diff --git a/doc/board/ti/am64x_evm.rst b/doc/board/ti/am64x_evm.rst
new file mode 100644
index 00000000000..88997b6a283
--- /dev/null
+++ b/doc/board/ti/am64x_evm.rst
@@ -0,0 +1,225 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Nishanth Menon <nm@ti.com>
+
+AM64 Platforms
+==============
+
+Introduction:
+-------------
+The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
+providing advanced system integration to enable applications such as
+Motor Drives, PLC, Remote IO and IoT Gateways.
+
+Some highlights of this SoC are:
+
+* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
+  MCUs, and a single Cortex-M4F.
+* Two Gigabit Industrial Communication Subsystems (ICSSG).
+* Integrated Ethernet switch supporting up to a total of two external
+  ports.
+* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
+  controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
+  peripherals.
+* Centralized System Controller for Security, Power, and Resource
+  Management (DMSC).
+
+More details can be found in the Technical Reference Manual:
+ https://www.ti.com/lit/pdf/spruim2
+
+Platform information:
+
+* AM64-EVM: https://www.ti.com/tool/TMDS64EVM
+* AM64-SK: https://www.ti.com/tool/SK-AM64B
+
+Boot Flow:
+----------
+Below is the pictorial representation of boot flow:
+
+.. image:: img/boot_diagram_am64.svg
+  :alt: Boot flow diagram
+
+- Here TIFS acts as master and provides all the critical services. R5/A53
+  requests TIFS to get these services done as shown in the above diagram.
+
+Sources:
+--------
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+0. Setup the environment variables:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. prompt:: bash $
+
+  export UBOOT_CFG_CORTEXR=am64x_evm_r5_defconfig
+  export UBOOT_CFG_CORTEXA=am64x_evm_a53_defconfig
+  export TFA_BOARD=lite
+  # we dont use any extra TFA parameters
+  unset TFA_EXTRA_ARGS
+  export OPTEE_PLATFORM=k3-am64x
+  # we dont use any extra TFA parameters
+  unset OPTEE_EXTRA_ARGS
+
+.. am64x_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A53:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+.. am64x_evm_rst_include_end_build_steps
+
+Target Images
+-------------
+
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img.  Each SoC
+variant (GP, HS-FS, HS-SE) requires a different source for these files.
+
+ - GP
+
+        * tiboot3-am64x-gp-evm.bin from step 3.1
+        * tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
+
+ - HS-FS
+
+        * tiboot3-am64x-hs-fs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+ - HS-SE
+
+        * tiboot3-am64x-hs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/multi_cert_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: img/nodm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+OSPI:
+-----
+ROM supports booting from OSPI from offset 0x0.
+
+Flashing images to OSPI:
+
+Below commands can be used to download tiboot3.bin, tispl.bin, and u-boot.img,
+over tftp and then flash those to OSPI at their respective addresses.
+
+.. prompt:: bash =>
+
+  sf probe
+  tftp ${loadaddr} tiboot3.bin
+  sf update $loadaddr 0x0 $filesize
+  tftp ${loadaddr} tispl.bin
+  sf update $loadaddr 0x100000 $filesize
+  tftp ${loadaddr} u-boot.img
+  sf update $loadaddr 0x300000 $filesize
+
+Flash layout for OSPI:
+
+.. image:: img/ospi_sysfw-am64.svg
+  :alt: OSPI flash partition layout
+
+Switch Setting for Boot Mode
+----------------------------
+
+Boot Mode pins provide means to select the boot mode and options before the
+device is powered up. After every POR, they are the main source to populate
+the Boot Parameter Tables.
+
+The following table shows some common boot modes used on AM64 platform. More
+details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruim2 under the `Boot Mode Pins` section.
+
+.. list-table:: Boot Modes for AM64x-EVM
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW2: 12345678
+     - SW3: 12345678
+
+   * - SD/MMC
+     - 11000010
+     - 01000000
+
+   * - xSPI/SFDP (OSPI)
+     - 11001110
+     - 01000000
+
+   * - UART
+     - 11011100
+     - 00000000
+
+.. note ::
+
+  For SW2 and SW3, the switch state in the "ON" position = 1.
+
+.. list-table:: Boot Modes for AM64x-SK
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW2: 12345678
+     - SW3: 12345678
+
+   * - SD/MMC
+     - 00000010
+     - 01000011
+
+   * - xSPI/SFDP (OSPI)
+     - 00000010
+     - 01110011
+
+   * - UART
+     - 00000000
+     - 00111011
+
+.. note ::
+
+  For SW2 and SW3, the switch state in the "ON" position = 1.
+  Boot bits on SK is reversed bits to the bootmode signals
diff --git a/doc/board/ti/am65x_evm.rst b/doc/board/ti/am65x_evm.rst
new file mode 100644
index 00000000000..89011c08dd4
--- /dev/null
+++ b/doc/board/ti/am65x_evm.rst
@@ -0,0 +1,320 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Neha Francis <n-francis@ti.com>
+
+AM65x Platforms
+===============
+
+Introduction:
+-------------
+The AM65x family of SoCs is the first device family from K3 Multicore
+SoC architecture, targeted for broad market and industrial control with
+aim to meet the complex processing needs of modern embedded products.
+
+The device is built over three domains, each containing specific processing
+cores, voltage domains and peripherals:
+
+1. Wake-up (WKUP) domain:
+        * Device Management and Security Controller (DMSC)
+
+2. Microcontroller (MCU) domain:
+        * Dual Core ARM Cortex-R5F processor
+
+3. MAIN domain:
+        * Quad core 64-bit ARM Cortex-A53
+
+More info can be found in TRM: https://www.ti.com/lit/pdf/spruid7
+
+Platform information:
+
+* https://www.ti.com/tool/TMDX654GPEVM
+
+Boot Flow:
+----------
+On AM65x family devices, ROM supports boot only via MCU(R5). This means that
+bootloader has to run on R5 core. In order to meet this constraint, and for
+the following reasons the boot flow is designed as mentioned:
+
+1. Need to move away from R5 asap, so that we want to start *any*
+firmware on the R5 cores for example autosar can be loaded to receive CAN
+response and other safety operations to be started. This operation is
+very time critical and is applicable for all automotive use cases.
+
+2. U-Boot on A53 should start other remotecores for various
+applications. This should happen before running Linux.
+
+3. In production boot flow, we might not like to use full U-Boot,
+instead use Falcon boot flow to reduce boot time.
+
+.. image:: img/boot_diagram_am65.svg
+  :alt: Boot flow diagram
+
+- Here DMSC acts as master and provides all the critical services. R5/A53
+  requests DMSC to get these services done as shown in the above diagram.
+
+Sources:
+--------
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+0. Setup the environment variables:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. prompt:: bash $
+
+  export UBOOT_CFG_CORTEXR=am65x_evm_r5_defconfig
+  export UBOOT_CFG_CORTEXA=am65x_evm_a53_defconfig
+  export TFA_BOARD=generic
+  # we dont use any extra TFA parameters
+  unset TFA_EXTRA_ARGS
+  export OPTEE_PLATFORM=k3-am65x
+  # we dont use any extra OP-TEE parameters
+  unset OPTEE_EXTRA_ARGS
+
+.. am65x_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A53:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+.. am65x_evm_rst_include_end_build_steps
+
+Target Images
+-------------
+
+In order to boot we need tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img.
+Each SoC variant (GP and HS) requires a different source for these files.
+
+- GP
+
+        * tiboot3-am65x_sr2-gp-evm.bin, sysfw-am65x_sr2-gp-evm.itb from step 3.1
+        * tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
+
+- HS
+
+        * tiboot3-am65x_sr2-hs-evm.bin, sysfw-am65x_sr2-hs-evm.itb from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/no_multi_cert_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: img/nodm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+- sysfw.itb
+
+.. image:: img/sysfw.itb.svg
+  :alt: sysfw.itb image format
+
+eMMC:
+-----
+ROM supports booting from eMMC from boot0 partition offset 0x0
+
+Flashing images to eMMC:
+
+The following commands can be used to download tiboot3.bin, tispl.bin,
+u-boot.img, and sysfw.itb from an SD card and write them to the eMMC boot0
+partition at respective addresses.
+
+.. prompt:: bash =>
+
+  mmc dev 0 1
+  fatload mmc 1 ${loadaddr} tiboot3.bin
+  mmc write ${loadaddr} 0x0 0x400
+  fatload mmc 1 ${loadaddr} tispl.bin
+  mmc write ${loadaddr} 0x400 0x1000
+  fatload mmc 1 ${loadaddr} u-boot.img
+  mmc write ${loadaddr} 0x1400 0x2000
+  fatload mmc 1 ${loadaddr} sysfw.itb
+  mmc write ${loadaddr} 0x3600 0x800
+
+To give the ROM access to the boot partition, the following commands must be
+used for the first time:
+
+.. prompt:: bash =>
+
+  mmc partconf 0 1 1 1
+  mmc bootbus 0 1 0 0
+
+To create a software partition for the rootfs, the following command can be
+used:
+
+.. prompt:: bash =>
+
+  gpt write mmc 0 ${partitions}
+
+eMMC layout:
+
+.. image:: img/emmc_am65x_evm_boot0.svg
+  :alt: emmc boot partition layout
+
+Kernel image and DT are expected to be present in the /boot folder of rootfs.
+To boot kernel from eMMC, use the following commands:
+
+.. prompt:: bash =>
+
+  setenv mmcdev 0
+  setenv bootpart 0
+  boot
+
+OSPI:
+-----
+ROM supports booting from OSPI from offset 0x0.
+
+Flashing images to OSPI:
+
+Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
+and sysfw.itb over tftp and then flash those to OSPI at their respective
+addresses.
+
+.. prompt:: bash =>
+
+  sf probe
+  tftp ${loadaddr} tiboot3.bin
+  sf update $loadaddr 0x0 $filesize
+  tftp ${loadaddr} tispl.bin
+  sf update $loadaddr 0x80000 $filesize
+  tftp ${loadaddr} u-boot.img
+  sf update $loadaddr 0x280000 $filesize
+  tftp ${loadaddr} sysfw.itb
+  sf update $loadaddr 0x6C0000 $filesize
+
+Flash layout for OSPI:
+
+.. image:: img/ospi_sysfw.svg
+  :alt: OSPI flash partition layout
+
+Kernel Image and DT are expected to be present in the /boot folder of UBIFS
+ospi.rootfs just like in SD card case. U-Boot looks for UBI volume named
+"rootfs" for rootfs.
+
+To boot kernel from OSPI, at the U-Boot prompt:
+
+.. prompt:: bash =>
+
+  setenv boot ubi
+  boot
+
+UART:
+-----
+ROM supports booting from MCU_UART0 via X-Modem protocol. The entire UART-based
+boot process up to U-Boot (proper) prompt goes through different stages and uses
+different UART peripherals as follows:
+
+.. list-table:: ROM UART Boot Responsibilities
+   :widths: 16 16 16 16
+   :header-rows: 1
+
+   * - Who
+     - Loading What
+     - Hardware Module
+     - Protocol
+
+   * - Boot ROM
+     - tiboot3.bin
+     - MCU_UART0
+     - X-Modem(*)
+
+   * - R5 SPL
+     - sysfw.itb
+     - MCU_UART0
+     - Y-Modem(*)
+
+   * - R5 SPL
+     - tispl.bin
+     - MAIN_UART0
+     - Y-Modem
+
+   * - A53 SPL
+     - u-boot.img
+     - MAIN_UART0
+     - Y-Modem
+
+Note that in addition to X/Y-Modem related protocol timeouts the DMSC
+watchdog timeout of 3min (typ.) needs to be observed until System Firmware
+is fully loaded (from sysfw.itb) and started.
+
+Example bash script sequence for running on a Linux host PC feeding all boot
+artifacts needed to the device:
+
+.. prompt:: bash $
+
+  MCU_DEV=/dev/ttyUSB1
+  MAIN_DEV=/dev/ttyUSB0
+
+  stty -F $MCU_DEV 115200 cs8 -cstopb -parenb
+  stty -F $MAIN_DEV 115200 cs8 -cstopb -parenb
+
+  sb --xmodem tiboot3.bin > $MCU_DEV < $MCU_DEV
+  sb --ymodem sysfw.itb > $MCU_DEV < $MCU_DEV
+  sb --ymodem tispl.bin > $MAIN_DEV < $MAIN_DEV
+  sleep 1
+  sb --xmodem u-boot.img > $MAIN_DEV < $MAIN_DEV
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+  **OpenOCD support since**: v0.12.0
+
+  If the default package version of OpenOCD in your development
+  environment's distribution needs to be updated, it might be necessary to
+  build OpenOCD from the source.
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+    :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to the board
+
+.. prompt:: bash $
+
+  openocd -f board/ti_am654evm.cfg
diff --git a/doc/board/ti/dra7xx_evm.rst b/doc/board/ti/dra7xx_evm.rst
new file mode 100644
index 00000000000..8e5d95535fa
--- /dev/null
+++ b/doc/board/ti/dra7xx_evm.rst
@@ -0,0 +1,138 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Neha Malcom Francis <n-francis@ti.com>
+
+DRA7xx Generation
+=================
+
+Secure Boot
+-----------
+
+.. include:: am335x_evm.rst
+   :start-after: .. secure_boot_include_start_config_ti_secure_device
+   :end-before: .. secure_boot_include_end_config_ti_secure_device
+
+.. include:: am335x_evm.rst
+   :start-after: .. secure_boot_include_start_spl_boot
+   :end-before: .. secure_boot_include_end_spl_boot
+
+<IMAGE_FLAG> is a value that specifies the type of the image to
+generate OR the action the image generation tool will take. Valid
+values are:
+
+.. list-table::
+   :widths: 25 25
+   :header-rows: 0
+
+   * - X-LOADER
+     - Generates an image for NOR or QSPI boot modes
+   * - MLO
+     - Generates an image for NOR or QSPI boot modes
+   * - ULO
+     - Generates an image for USB/UART peripheral boot modes
+
+<INPUT_FILE> is the full path and filename of the public world boot
+loaderbinary file (for this platform, this is always u-boot-spl.bin).
+
+<OUTPUT_FILE> is the full path and filename of the final secure image.
+The output binary images should be used in place of the standard
+non-secure binary images (see the platform-specific user's guides
+and releases notes for how the non-secure images are typically used)
+
+.. list-table::
+   :widths: 25 25
+   :header-rows: 0
+
+   * - u-boot-spl_HS_SPI_X-LOADER
+     - boot image for SD/MMC/eMMC. This image is
+       copied to a file named MLO, which is the name that
+       the device ROM bootloader requires for loading from
+       the FAT partition of an SD card (same as on
+       non-secure devices)
+   * - u-boot-spl_HS_ULO
+     - boot image for USB/UART peripheral boot modes
+   * - u-boot-spl_HS_X-LOADER
+     - boot image for all other flash memories
+       including QSPI and NOR flash
+
+<SPL_LOAD_ADDR> is the address at which SOC ROM should load the
+<INPUT_FILE>
+
+.. include:: am335x_evm.rst
+   :start-after: .. secure_boot_include_start_primary_u_boot
+   :end-before: .. secure_boot_include_end_primary_u_boot
+
+eMMC Boot Partition Use
+-----------------------
+
+It is possible, depending on SYSBOOT configuration to boot from the eMMC
+boot partitions using (name depending on documentation referenced)
+Alternative Boot operation mode or Boot Sequence Option 1/2.  In this
+example we load MLO and u-boot.img from the build into DDR and then use
+'mmc bootbus' to set the required rate (see TRM) and 'mmc partconfig' to
+set boot0 as the boot device.
+
+.. prompt:: bash =>
+
+   setenv autoload no
+   usb start
+   dhcp
+   mmc dev 1 1
+   tftp ${loadaddr} dra7xx/MLO
+   mmc write ${loadaddr} 0 100
+   tftp ${loadaddr} dra7xx/u-boot.img
+   mmc write ${loadaddr} 300 400
+   mmc bootbus 1 2 0 2
+   mmc partconf 1 1 1 0
+   mmc rst-function 1 1
+
+.. include:: am43xx_evm.rst
+   :start-after: qspi_boot_support_include_start
+   :end-before: qspi_boot_support_include_end
+
+Testing
+^^^^^^^
+
+Build the patched U-Boot and load MLO/u-boot.img.
+
+Boot from another medium like MMC
+
+.. prompt:: bash
+
+  => mmc dev 0
+  mmc0 is current device
+  => fatload mmc 0 0x82000000 MLO
+  reading MLO
+  55872 bytes read in 8 ms (6.7 MiB/s)
+  => fatload mmc 0 0x83000000 u-boot.img
+  reading u-boot.img
+  248600 bytes read in 19 ms (12.5 MiB/s)
+
+Commands to erase/write u-boot/MLO to flash device
+
+.. prompt:: bash
+
+  => sf probe 0
+  SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB, mapped at 5c000000
+  => sf erase 0 0x10000
+  SF: 65536 bytes @ 0x0 Erased: OK
+  => sf erase 0x20000 0x10000
+  SF: 65536 bytes @ 0x20000 Erased: OK
+  => sf erase 0x30000 0x10000
+  SF: 65536 bytes @ 0x30000 Erased: OK
+  => sf erase 0x40000 0x10000
+  SF: 65536 bytes @ 0x40000 Erased: OK
+  => sf erase 0x50000 0x10000
+  SF: 65536 bytes @ 0x50000 Erased: OK
+  => sf erase 0x60000 0x10000
+  SF: 65536 bytes @ 0x60000 Erased: OK
+  => sf write 82000000 0 0x10000
+  SF: 65536 bytes @ 0x0 Written: OK
+  => sf write 83000000 0x20000 0x60000
+  SF: 393216 bytes @ 0x20000 Written: OK
+
+Next, set sysboot to QSPI-1 boot mode(SYSBOOT[5:0] = 100110) and power
+on. ROM should find the GP header at offset 0 and load/execute SPL. SPL
+then detects that ROM was in QSPI-1 mode (boot code 10) and attempts to
+find a U-Boot image header at offset 0x20000 (set in the config file)
+and proceeds to load that image using the U-Boot image payload offset/size
+from the header. It will then start U-Boot.
diff --git a/doc/board/ti/img/boot_diagram_am64.svg b/doc/board/ti/img/boot_diagram_am64.svg
new file mode 100644
index 00000000000..9c922a59fa4
--- /dev/null
+++ b/doc/board/ti/img/boot_diagram_am64.svg
@@ -0,0 +1,1702 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!--SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause-->
+
+<!--Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/-->
+
+<svg
+   version="1.1"
+   width="706px"
+   height="951px"
+   viewBox="-0.5 -0.5 706 951"
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+   sodipodi:docname="boot_diagram_am64.svg"
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new file mode 100644
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diff --git a/doc/board/ti/index.rst b/doc/board/ti/index.rst
new file mode 100644
index 00000000000..b9cdf23e68f
--- /dev/null
+++ b/doc/board/ti/index.rst
@@ -0,0 +1,13 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Texas Instruments
+#################
+
+.. toctree::
+   :maxdepth: 2
+
+   am335x_evm
+   am43xx_evm
+   dra7xx_evm
+   ks2_evm
+   k3
diff --git a/doc/board/ti/j7200_evm.rst b/doc/board/ti/j7200_evm.rst
new file mode 100644
index 00000000000..d4a823fa26c
--- /dev/null
+++ b/doc/board/ti/j7200_evm.rst
@@ -0,0 +1,231 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Udit Kumar <u-kumar1@ti.com>
+
+J7200 Platforms
+===============
+
+Introduction:
+-------------
+The J7200 family of SoCs are part of K3 Multicore SoC architecture platform
+targeting automotive applications. They are designed as a low power, high
+performance and highly integrated device architecture, adding significant
+enhancement on processing power, graphics capability, video and imaging
+processing, virtualization and coherent memory support.
+
+The device is partitioned into three functional domains, each containing
+specific processing cores and peripherals:
+
+1. Wake-up (WKUP) domain:
+        * Device Management and Security Controller (DMSC)
+
+2. Microcontroller (MCU) domain:
+        * Dual Core ARM Cortex-R5F processor
+
+3. MAIN domain:
+        * Dual core 64-bit ARM Cortex-A72
+
+More info can be found in TRM: https://www.ti.com/lit/pdf/spruiu1
+
+Platform information:
+
+* https://www.ti.com/tool/J7200XSOMXEVM
+
+Boot Flow:
+----------
+Below is the pictorial representation of boot flow:
+
+.. image:: img/boot_diagram_k3_current.svg
+  :alt: Boot flow diagram
+
+- Here DMSC acts as master and provides all the critical services. R5/A72
+  requests DMSC to get these services done as shown in the above diagram.
+
+Sources:
+--------
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+0. Setup the environment variables:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. prompt:: bash $
+
+  export UBOOT_CFG_CORTEXR=j7200_evm_r5_defconfig
+  export UBOOT_CFG_CORTEXA=j7200_evm_a72_defconfig
+  export TFA_BOARD=generic
+  # we dont use any extra TFA parameters
+  unset TFA_EXTRA_ARGS
+  export OPTEE_PLATFORM=k3-j7200
+  # we dont use any extra OP-TEE parameters
+  unset OPTEE_EXTRA_ARGS
+
+.. j7200_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A72:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+.. j7200_evm_rst_include_end_build_steps
+
+Target Images
+-------------
+
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC
+variant (GP, HS-FS, HS-SE) requires a different source for these files.
+
+ - GP
+
+        * tiboot3-j7200-gp-evm.bin from step 3.1
+        * tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
+
+ - HS-FS
+
+        * tiboot3-j7200_sr2-hs-fs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+ - HS-SE
+
+        * tiboot3-j7200_sr2-hs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/j7200_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: img/dm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+Switch Setting for Boot Mode
+----------------------------
+
+Boot Mode pins provide means to select the boot mode and options before the
+device is powered up. After every POR, they are the main source to populate
+the Boot Parameter Tables.
+
+The following table shows some common boot modes used on J7200 platform. More
+details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruiu1 under the `Boot Mode Pins` section.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW9: 12345678
+     - SW8: 12345678
+
+   * - SD
+     - 00000000
+     - 10000010
+
+   * - EMMC
+     - 01000000
+     - 10000000
+
+   * - OSPI
+     - 01000000
+     - 00000110
+
+   * - UART
+     - 01110000
+     - 00000000
+
+   * - USB DFU
+     - 00100000
+     - 10000000
+
+For SW8 and SW9, the switch state in the "ON" position = 1.
+
+eMMC:
+-----
+ROM supports booting from eMMC raw read or UDA FS mode.
+
+Below is memory layout in case of booting from
+boot 0/1  partition in raw mode.
+
+Current allocated size for tiboot3 size is 1MB, tispl is 2MB.
+
+Size of u-boot.img is taken 4MB for refernece,
+But this is subject to change depending upon atf, optee size
+
+.. image:: img/emmc_j7200_evm_boot01.svg
+  :alt: Traditional eMMC boot partition layout
+
+In case of UDA FS mode booting, following is layout.
+
+All boot images tiboot3.bin, tispl and u-boot should be written to
+fat formatted UDA FS as file.
+
+.. image:: img/emmc_j7200_evm_udafs.svg
+  :alt: eMMC UDA boot partition layout
+
+In case of booting from eMMC, write above images into raw or UDA FS.
+and set mmc partconf accordingly.
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+  **OpenOCD support since**: v0.12.0
+
+  If the default package version of OpenOCD in your development
+  environment's distribution needs to be updated, it might be necessary to
+  build OpenOCD from the source.
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+    :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to the board
+
+.. prompt:: bash $
+
+  openocd -f board/ti_j7200evm.cfg
diff --git a/doc/board/ti/j721e_evm.rst b/doc/board/ti/j721e_evm.rst
new file mode 100644
index 00000000000..80d91cafab0
--- /dev/null
+++ b/doc/board/ti/j721e_evm.rst
@@ -0,0 +1,260 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Lokesh Vutla <lokeshvutla@ti.com>
+
+J721E Platforms
+===============
+
+Introduction:
+-------------
+The J721e family of SoCs are part of K3 Multicore SoC architecture platform
+targeting automotive applications. They are designed as a low power, high
+performance and highly integrated device architecture, adding significant
+enhancement on processing power, graphics capability, video and imaging
+processing, virtualization and coherent memory support.
+
+The device is partitioned into three functional domains, each containing
+specific processing cores and peripherals:
+
+1. Wake-up (WKUP) domain:
+        * Device Management and Security Controller (DMSC)
+
+2. Microcontroller (MCU) domain:
+        * Dual Core ARM Cortex-R5F processor
+
+3. MAIN domain:
+        * Dual core 64-bit ARM Cortex-A72
+        * 2 x Dual cortex ARM Cortex-R5 subsystem
+        * 2 x C66x Digital signal processor sub system
+        * C71x Digital signal processor sub-system with MMA.
+
+More info can be found in TRM: https://www.ti.com/lit/pdf/spruil1
+
+Platform information:
+
+* https://www.ti.com/tool/J721EXSOMXEVM
+* https://www.ti.com/tool/SK-TDA4VM
+
+Boot Flow:
+----------
+Boot flow is similar to that of AM65x SoC and extending it with remoteproc
+support. Below is the pictorial representation of boot flow:
+
+.. image:: img/boot_diagram_j721e.svg
+  :alt: Boot flow diagram
+
+- Here DMSC acts as master and provides all the critical services. R5/A72
+  requests DMSC to get these services done as shown in the above diagram.
+
+Sources:
+--------
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. prompt:: bash $
+
+ export UBOOT_CFG_CORTEXR=j721e_evm_r5_defconfig
+ export UBOOT_CFG_CORTEXA=j721e_evm_a72_defconfig
+ export TFA_BOARD=generic
+ # we dont use any extra TFA parameters
+ unset TFA_EXTRA_ARGS
+ export OPTEE_PLATFORM=k3-j721e
+ # we dont use any extra OP-TEE parameters
+ unset OPTEE_EXTRA_ARGS
+
+.. j721e_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A72:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+.. j721e_evm_rst_include_end_build_steps
+
+Target Images
+-------------
+
+In order to boot we need tiboot3.bin, sysfw.itb, tispl.bin and u-boot.img.
+Each SoC variant (GP, HS-FS and HS-SE) requires a different source for these
+files.
+
+ - GP
+
+        * tiboot3-j721e-gp-evm.bin, sysfw-j721e-gp-evm.itb from step 3.1
+        * tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
+
+ - HS-FS
+
+        * tiboot3-j721e_sr2-hs-fs-evm.bin, sysfw-j721e_sr2-hs-fs-evm.itb from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+ - HS-SE
+
+        * tiboot3-j721e_sr2-hs-evm.bin, sysfw-j721e_sr2-hs-evm.itb from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/no_multi_cert_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: img/dm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+- sysfw.itb
+
+.. image:: img/sysfw.itb.svg
+  :alt: sysfw.itb image format
+
+OSPI:
+-----
+ROM supports booting from OSPI from offset 0x0.
+
+Flashing images to OSPI:
+
+Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
+and sysfw.itb over tftp and then flash those to OSPI at their respective
+addresses.
+
+.. prompt:: bash =>
+
+  sf probe
+  tftp ${loadaddr} tiboot3.bin
+  sf update $loadaddr 0x0 $filesize
+  tftp ${loadaddr} tispl.bin
+  sf update $loadaddr 0x80000 $filesize
+  tftp ${loadaddr} u-boot.img
+  sf update $loadaddr 0x280000 $filesize
+  tftp ${loadaddr} sysfw.itb
+  sf update $loadaddr 0x6C0000 $filesize
+
+Flash layout for OSPI:
+
+.. image:: img/ospi_sysfw.svg
+  :alt: OSPI flash partition layout
+
+R5 Memory Map:
+--------------
+
+.. list-table::
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Region
+     - Start Address
+     - End Address
+
+   * - SPL
+     - 0x41c00000
+     - 0x41c40000
+
+   * - EMPTY
+     - 0x41c40000
+     - 0x41c81920
+
+   * - STACK
+     - 0x41c85920
+     - 0x41c81920
+
+   * - Global data
+     - 0x41c859f0
+     - 0x41c85920
+
+   * - Heap
+     - 0x41c859f0
+     - 0x41cf59f0
+
+   * - BSS
+     - 0x41cf59f0
+     - 0x41cff9f0
+
+   * - MCU Scratchpad
+     - 0x41cff9fc
+     - 0x41cffbfc
+
+   * - ROM DATA
+     - 0x41cffbfc
+     - 0x41cfffff
+
+Firmware:
+---------
+
+The J721e u-boot allows firmware to be loaded for the Cortex-R5 subsystem.
+The CPSW5G in J7200 and CPSW9G in J721E present in MAIN domain is configured
+and controlled by the ethernet firmware that executes in the MAIN Cortex R5.
+The default supported environment variables support loading these firmwares
+from only MMC. "dorprocboot" env variable has to be set for the U-BOOT to load
+and start the remote cores in the system.
+
+J721E common processor board can be attached to a Ethernet QSGMII card and the
+PHY in the card has to be reset before it can be used for data transfer.
+"do_main_cpsw0_qsgmii_phyinit" env variable has to be set for the U-BOOT to
+configure this PHY.
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+  **OpenOCD support since**: v0.12.0
+
+  If the default package version of OpenOCD in your development
+  environment's distribution needs to be updated, it might be necessary to
+  build OpenOCD from the source.
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+    :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to the board
+
+.. prompt:: bash $
+
+  openocd -f board/ti_j721eevm.cfg
diff --git a/doc/board/ti/j721s2_evm.rst b/doc/board/ti/j721s2_evm.rst
new file mode 100644
index 00000000000..f5c48c96a83
--- /dev/null
+++ b/doc/board/ti/j721s2_evm.rst
@@ -0,0 +1,345 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Manorit Chawdhry <m-chawdhry@ti.com>
+
+J721S2 and AM68 Platforms
+=========================
+
+Introduction:
+-------------
+
+The J721S2 family of SoCs are part of K3 Multicore SoC architecture platform
+targeting automotive applications. They are designed as a low power, high
+performance and highly integrated device architecture, adding significant
+enhancement on processing power, graphics capability, video and imaging
+processing, virtualization and coherent memory support.
+
+The AM68 Starter Kit/Evaluation Module (EVM) is based on the J721S2 family
+of SoCs. They are designed for machine vision, traffic monitoring, retail
+automation, and factory automation.
+
+The device is partitioned into three functional domains, each containing
+specific processing cores and peripherals:
+
+1. Wake-up (WKUP) domain:
+    * ARM Cortex-M4F processor, runs TI Foundational Security (TIFS)
+
+2. Microcontroller (MCU) domain:
+    * Dual core ARM Cortex-R5F processor, runs device management
+      and SoC early boot
+
+3. MAIN domain:
+    * Dual core 64-bit ARM Cortex-A72, runs HLOS
+
+More info can be found in TRM: https://www.ti.com/lit/pdf/spruj28
+
+Platform information:
+
+* https://www.ti.com/tool/J721S2XSOMXEVM
+* https://www.ti.com/tool/SK-AM68
+
+Boot Flow:
+----------
+
+Below is the pictorial representation of boot flow:
+
+.. image:: img/boot_diagram_k3_current.svg
+
+- On this platform, "TI Foundational Security" (TIFS) functions as the
+  security enclave master while "Device Manager" (DM), also known as the
+  "TISCI server" in TI terminology, offers all the essential services.
+
+- As illustrated in the diagram above, R5 SPL manages power and clock
+  services independently before handing over control to "DM". The A72 or
+  the C7x (Aux core) software components request TIFS/DM to handle
+  security or device management services.
+
+Sources:
+--------
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+
+0. Setup the environment variables:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. prompt:: bash $
+
+  export UBOOT_CFG_CORTEXR=j721s2_evm_r5_defconfig
+  export UBOOT_CFG_CORTEXA=j721s2_evm_a72_defconfig
+  export TFA_BOARD=generic
+  export TFA_EXTRA_ARGS="K3_USART=0x8"
+  # The following is not a typo, j784s4 is the OP-TEE platform for j721s2
+  export OPTEE_PLATFORM=k3-j784s4
+  export OPTEE_EXTRA_ARGS="CFG_CONSOLE_UART=0x8"
+
+.. j721s2_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+.. _j721s2_evm_rst_u_boot_r5:
+
+* 3.1 R5:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+.. _j721s2_evm_rst_u_boot_a72:
+
+* 3.2 A72:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+.. j721s2_evm_rst_include_end_build_steps
+
+Target Images
+-------------
+
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC
+variant (GP, HS-FS, HS-SE) requires a different source for these files.
+
+ - GP
+
+    * tiboot3-j721s2-gp-evm.bin from :ref:`step 3.1 <j721s2_evm_rst_u_boot_r5>`
+    * tispl.bin_unsigned, u-boot.img_unsigned from :ref:`step 3.2 <j721s2_evm_rst_u_boot_a72>`
+
+ - HS-FS
+
+    * tiboot3-j721s2-hs-fs-evm.bin from :ref:`step 3.1 <j721s2_evm_rst_u_boot_r5>`
+    * tispl.bin, u-boot.img from :ref:`step 3.2 <j721s2_evm_rst_u_boot_a72>`
+
+ - HS-SE
+
+    * tiboot3-j721s2-hs-evm.bin from :ref:`step 3.1 <j721s2_evm_rst_u_boot_r5>`
+    * tispl.bin, u-boot.img from :ref:`step 3.2 <j721s2_evm_rst_u_boot_a72>`
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/multi_cert_tiboot3.bin.svg
+
+- tispl.bin
+
+.. image:: img/dm_tispl.bin.svg
+
+R5 Memory Map:
+--------------
+
+.. list-table::
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Region
+     - Start Address
+     - End Address
+
+   * - SPL
+     - 0x41c00000
+     - 0x41c40000
+
+   * - EMPTY
+     - 0x41c40000
+     - 0x41c61f20
+
+   * - STACK
+     - 0x41c65f20
+     - 0x41c61f20
+
+   * - Global data
+     - 0x41c65f20
+     - 0x41c66000
+
+   * - Heap
+     - 0x41c66000
+     - 0x41c76000
+
+   * - BSS
+     - 0x41c76000
+     - 0x41c80000
+
+   * - DM DATA
+     - 0x41c80000
+     - 0x41c84130
+
+   * - EMPTY
+     - 0x41c84130
+     - 0x41cff9fc
+
+   * - MCU Scratchpad
+     - 0x41cff9fc
+     - 0x41cffbfc
+
+   * - ROM DATA
+     - 0x41cffbfc
+     - 0x41cfffff
+
+Switch Setting for Boot Mode
+----------------------------
+
+Boot Mode pins provide means to select the boot mode and options before the
+device is powered up. After every POR, they are the main source to populate
+the Boot Parameter Tables.
+
+Boot Mode Pins for J721S2-EVM
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The following table shows some common boot modes used on J721S2 platform.
+More details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/pdf/spruj28 under the `Boot Mode Pins` section.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW9: 12345678
+     - SW8: 12345678
+
+   * - SD
+     - 00000000
+     - 10000010
+
+   * - EMMC
+     - 01000000
+     - 10000000
+
+   * - OSPI
+     - 01000000
+     - 00000110
+
+   * - UART
+     - 01110000
+     - 00000000
+
+   * - USB DFU
+     - 00100000
+     - 10000000
+
+For SW8 and SW9, the switch state in the "ON" position = 1.
+
+Boot Mode Pins for SK-AM68
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The following table shows some common boot modes used on AM68-SK platform.
+More details can be found in the User Guide for AM68-SK:
+https://www.ti.com/lit/pdf/spruj68 under the `Bootmode Settings` section.
+
+.. list-table:: Boot Modes
+   :widths: 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW1: 1234
+
+   * - SD
+     - 0000
+
+   * - xSPI
+     - 0010
+
+   * - UART
+     - 1010
+
+   * - Ethernet
+     - 0100
+
+For SW1, the switch state in the "ON" position = 1.
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+  **OpenOCD support since**: v0.12.0
+
+  If the default package version of OpenOCD in your development
+  environment's distribution needs to be updated, it might be necessary to
+  build OpenOCD from the source.
+
+Debugging U-Boot on J721S2-EVM
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+    :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to the board
+
+.. prompt:: bash $
+
+  openocd -f board/ti_j721s2evm.cfg
+
+Debugging U-Boot on SK-AM68
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_cti20
+    :end-before: .. k3_rst_include_end_openocd_connect_cti20
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_cfg_external_intro
+    :end-before: .. k3_rst_include_end_openocd_cfg_external_intro
+
+For SK-AM68, the openocd_connect.cfg is as follows:
+
+.. code-block:: tcl
+
+  # TUMPA example:
+  # http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User's_Manual
+  source [find interface/ftdi/tumpa.cfg]
+
+  transport select jtag
+
+  # default JTAG configuration has only SRST and no TRST
+  reset_config srst_only srst_push_pull
+
+  # delay after SRST goes inactive
+  adapter srst delay 20
+
+  if { ![info exists SOC] } {
+    # Set the SoC of interest
+    set SOC j721s2
+  }
+
+  source [find target/ti_k3.cfg]
+
+  ftdi tdo_sample_edge falling
+
+  # Speeds for FT2232H are in multiples of 2, and 32MHz is tops
+  # max speed we seem to achieve is ~20MHz.. so we pick 16MHz
+  adapter speed 16000
diff --git a/doc/board/ti/j722s_evm.rst b/doc/board/ti/j722s_evm.rst
new file mode 100644
index 00000000000..10b243908a1
--- /dev/null
+++ b/doc/board/ti/j722s_evm.rst
@@ -0,0 +1,260 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Jayesh Choudhary <j-choudhary@ti.com>
+
+J722S-EVM Platform
+==================
+
+The J722S is a family of  application processors built for Automotive and
+Linux Application development. J722S family of SoCs is a superset of the
+AM62P SoC family and shares similar memory map, thus the nodes are being
+reused from AM62P includes instead of duplicating the definitions.
+
+Some highlights of J722S SoC (in addition to AM62P SoC features) are:
+
+* Two Cortex-R5F for Functional Safety or general-purpose usage and
+  two C7x floating point vector DSP with Matrix Multiply Accelerator
+  for deep learning.
+
+* Vision Processing Accelerator (VPAC) with image signal processor
+  and Depth and Motion Processing Accelerator (DMPAC).
+
+* 7xUARTs, 3xSPI, 5xI2C, 2xUSB2, 2xCAN-FD, 3xMMC and SD, GPMC for
+  NAND/FPGA connection, OSPI memory controller, 5xMcASP for audio,
+  4xCSI-RX for Camera, 1 PCIe Gen3 controller, USB3.0 eCAP/eQEP,
+  ePWM, among other peripherals.
+
+For those interested, more details about this SoC can be found in the
+Technical Reference Manual here: https://www.ti.com/lit/zip/sprujb3
+
+Boot Flow:
+----------
+
+The bootflow is exactly the same as all SoCs in the am62xxx extended SoC
+family. Below is the pictorial representation:
+
+.. image:: img/boot_diagram_k3_current.svg
+  :alt: Boot flow diagram
+
+- Here TIFS acts as master and provides all the critical services. R5/A53
+  requests TIFS to get these services done as shown in the above diagram.
+
+Sources:
+--------
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=j722s_evm_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=j722s_evm_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ export OPTEE_PLATFORM=k3-am62x
+ $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+
+.. j722s_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot:
+
+* 3.1 R5:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+* 3.2 A53:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+.. j722s_evm_rst_include_end_build_steps
+
+Target Images
+--------------
+
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img.  Each SoC
+variant (HS-FS, HS-SE) requires a different source for these files.
+
+ - HS-FS
+
+        * tiboot3-j722s-hs-fs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+ - HS-SE
+
+        * tiboot3-j722s-hs-evm.bin from step 3.1
+        * tispl.bin, u-boot.img from step 3.2
+
+Image formats:
+--------------
+
+- tiboot3.bin
+
+.. image:: img/multi_cert_tiboot3.bin.svg
+  :alt: tiboot3.bin image format
+
+- tispl.bin
+
+.. image:: img/dm_tispl.bin.svg
+  :alt: tispl.bin image format
+
+A53 SPL DDR Memory Layout
+-------------------------
+
+.. j722s_evm_rst_include_start_ddr_mem_layout
+
+This provides an overview memory usage in A53 SPL stage.
+
+.. list-table::
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Region
+     - Start Address
+     - End Address
+
+   * - EMPTY
+     - 0x80000000
+     - 0x80080000
+
+   * - TEXT BASE
+     - 0x80080000
+     - 0x800d8000
+
+   * - EMPTY
+     - 0x800d8000
+     - 0x80477660
+
+   * - STACK
+     - 0x80477660
+     - 0x80477e60
+
+   * - GD
+     - 0x80477e60
+     - 0x80478000
+
+   * - MALLOC
+     - 0x80478000
+     - 0x80480000
+
+   * - EMPTY
+     - 0x80480000
+     - 0x80a00000
+
+   * - BSS
+     - 0x80a00000
+     - 0x80a80000
+
+   * - BLOBS
+     - 0x80a80000
+     - 0x80d00400
+
+   * - EMPTY
+     - 0x80d00400
+     - 0x81000000
+.. j722s_evm_rst_include_end_ddr_mem_layout
+
+Switch Setting for Boot Mode
+----------------------------
+
+Boot Mode pins provide means to select the boot mode and options before the
+device is powered up. After every POR, they are the main source to populate
+the Boot Parameter Tables.
+
+The following table shows some common boot modes used on J722S-EVM
+platform. More details can be found in the Technical Reference Manual:
+https://www.ti.com/lit/zip/sprujb3 under the `Boot Mode Pins` section.
+
+.. note::
+
+   This device is very new. Currently only UART boot is available while
+   we continue to add support for the other bootmodes.
+
+.. list-table:: Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW3: 12345678
+     - SW4: 12345678
+
+   * - SD
+     - 11000010
+     - 01000000
+
+   * - OSPI
+     - 11001110
+     - 00000000
+
+   * - EMMC
+     - 11010010
+     - 00000000
+
+   * - UART
+     - 11011100
+     - 00000000
+
+   * - USB DFU
+     - 11001010
+     - 00000000
+
+For SW2 and SW1, the switch state in the "ON" position = 1.
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+  **OpenOCD support after**: v0.12.0
+
+  While support for the entire K3 generation including the am62xxx
+  extended family was added before v0.12.0, the tcl scripts for the
+  am62px have been accepted and will be available in the next release of
+  OpenOCD. It may be necessary to build OpenOCD from source depending on
+  the version your distribution has packaged.
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+    :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to the board
+
+.. code-block:: bash
+
+  openocd -f board/ti_j722sevm.cfg
diff --git a/doc/board/ti/j784s4_evm.rst b/doc/board/ti/j784s4_evm.rst
new file mode 100644
index 00000000000..2ffec3dbd3b
--- /dev/null
+++ b/doc/board/ti/j784s4_evm.rst
@@ -0,0 +1,327 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
+.. sectionauthor:: Apurva Nandan <a-nandan@ti.com>
+
+J784S4 and AM69 Platforms
+=========================
+
+Introduction
+------------
+The J784S4 SoC belongs to the K3 Multicore SoC architecture
+platform, providing advanced system integration in automotive,
+ADAS and industrial applications requiring AI at the network edge.
+This SoC extends the K3 Jacinto 7 family of SoCs with focus on
+raising performance and integration while providing interfaces,
+memory architecture and compute performance for multi-sensor, high
+concurrency applications.
+
+The device is partitioned into three functional domains, each containing
+specific processing cores and peripherals:
+
+1. Wake-up (WKUP) domain
+    * ARM Cortex-M4F processor, runs TI Foundational Security (TIFS)
+
+2. Microcontroller (MCU) domain
+    * Dual core ARM Cortex-R5F processor, runs device management
+      and SoC early boot
+
+3. MAIN domain
+    * Two clusters of quad core 64-bit ARM Cortex-A72, runs HLOS
+    * Dual core ARM Cortex-R5F processor used for RTOS applications
+    * Four C7x DSPs used for Machine Learning applications.
+
+
+More info can be found in TRM: http://www.ti.com/lit/zip/spruj52
+
+Platform information:
+
+* https://www.ti.com/tool/J784S4XEVM
+* https://www.ti.com/tool/SK-AM69
+
+Boot Flow
+---------
+Below is the pictorial representation of boot flow:
+
+.. image:: img/boot_diagram_k3_current.svg
+    :alt: K3 boot flow
+
+- On this platform, "TI Foundational Security" (TIFS) functions as the
+  security enclave master. While "Device Manager" (DM), also known as the
+  "TISCI server" in TI terminology, offers all the essential services.
+
+- As illustrated in the diagram above, R5 SPL manages power and clock
+  services independently before handing over control to DM. The A72 or
+  the C7x (Aux core) software components request TIFS/DM to handle
+  security or device management services.
+
+Sources
+-------
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure
+---------------
+0. Setup the environment variables:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=j784s4_evm_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=j784s4_evm_a72_defconfig
+ $ export TFA_BOARD=j784s4
+ $ export TFA_EXTRA_ARGS="K3_USART=0x8"
+ $ export OPTEE_PLATFORM=k3-j784s4
+ $ export OPTEE_EXTRA_ARGS="CFG_CONSOLE_UART=0x8"
+
+.. j784s4_evm_rst_include_start_build_steps
+
+1. Trusted Firmware-A
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_tfa
+    :end-before: .. k3_rst_include_end_build_steps_tfa
+
+
+2. OP-TEE
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_optee
+    :end-before: .. k3_rst_include_end_build_steps_optee
+
+3. U-Boot
+
+.. _j784s4_evm_rst_u_boot_r5:
+
+* 3.1 R5
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_spl_r5
+    :end-before: .. k3_rst_include_end_build_steps_spl_r5
+
+.. _j784s4_evm_rst_u_boot_a72:
+
+* 3.2 A72
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_build_steps_uboot
+    :end-before: .. k3_rst_include_end_build_steps_uboot
+.. j784s4_evm_rst_include_end_build_steps
+
+Target Images
+-------------
+In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC
+variant (GP, HS-FS, HS-SE) requires a different source for these files.
+
+ - GP
+
+    * tiboot3-j784s4-gp-evm.bin from :ref:`step 3.1 <j784s4_evm_rst_u_boot_r5>`
+    * tispl.bin_unsigned, u-boot.img_unsigned from :ref:`step 3.2 <j784s4_evm_rst_u_boot_a72>`
+
+ - HS-FS
+
+    * tiboot3-j784s4-hs-fs-evm.bin from :ref:`step 3.1 <j784s4_evm_rst_u_boot_r5>`
+    * tispl.bin, u-boot.img from :ref:`step 3.2 <j784s4_evm_rst_u_boot_a72>`
+
+ - HS-SE
+
+    * tiboot3-j784s4-hs-evm.bin from :ref:`step 3.1 <j784s4_evm_rst_u_boot_r5>`
+    * tispl.bin, u-boot.img from :ref:`step 3.2 <j784s4_evm_rst_u_boot_a72>`
+
+Image formats
+-------------
+
+- tiboot3.bin
+
+.. image:: img/multi_cert_tiboot3.bin.svg
+    :alt: tiboot3.bin format
+
+- tispl.bin
+
+.. image:: img/dm_tispl.bin.svg
+    :alt: tispl.bin format
+
+OSPI:
+-----
+ROM supports booting from OSPI from offset 0x0.
+
+Flashing images to OSPI NOR:
+
+Below commands can be used to download tiboot3.bin, tispl.bin, and
+u-boot.img over tftp and then flash those to OSPI at their respective
+addresses.
+
+.. prompt:: bash =>
+
+  sf probe
+  tftp ${loadaddr} tiboot3.bin
+  sf update $loadaddr 0x0 $filesize
+  tftp ${loadaddr} tispl.bin
+  sf update $loadaddr 0x80000 $filesize
+  tftp ${loadaddr} u-boot.img
+  sf update $loadaddr 0x280000 $filesize
+
+Flash layout for OSPI NOR:
+
+.. image:: img/ospi_sysfw3.svg
+  :alt: OSPI NOR flash partition layout
+
+R5 Memory Map
+-------------
+
+.. list-table::
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Region
+     - Start Address
+     - End Address
+
+   * - SPL
+     - 0x41c00000
+     - 0x41c40000
+
+   * - EMPTY
+     - 0x41c40000
+     - 0x41c61f20
+
+   * - STACK
+     - 0x41c65f20
+     - 0x41c61f20
+
+   * - Global data
+     - 0x41c65f20
+     - 0x41c66000
+
+   * - Heap
+     - 0x41c66000
+     - 0x41c76000
+
+   * - BSS
+     - 0x41c76000
+     - 0x41c80000
+
+   * - DM DATA
+     - 0x41c80000
+     - 0x41c84130
+
+   * - EMPTY
+     - 0x41c84130
+     - 0x41cff9fc
+
+   * - MCU Scratchpad
+     - 0x41cff9fc
+     - 0x41cffbfc
+
+   * - ROM DATA
+     - 0x41cffbfc
+     - 0x41cfffff
+
+Switch Setting for Boot Mode
+----------------------------
+
+Boot Mode pins provide means to select the boot mode and options before the
+device is powered up. After every POR, they are the main source to populate
+the Boot Parameter Tables.
+
+Boot Mode Pins for J784S4-EVM
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The following tables show some common boot modes used on J784S4 EVM platform.
+More details can be found in the Technical Reference Manual:
+http://www.ti.com/lit/zip/spruj52 under the `Boot Mode Pins` section.
+
+.. list-table:: J784S4 EVM Boot Modes
+   :widths: 16 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW11: 12345678
+     - SW7: 12345678
+
+   * - SD
+     - 10000010
+     - 00000000
+
+   * - EMMC
+     - 10000000
+     - 01000000
+
+   * - OSPI
+     - 00000110
+     - 01000000
+
+   * - UART
+     - 00000000
+     - 01110000
+
+For SW7 and SW11, the switch state in the "ON" position = 1.
+
+Boot Mode Pins for AM69-SK
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The following table show some common boot modes used on AM69-SK platform.
+More details can be found in the User Guide for AM69-SK:
+https://www.ti.com/lit/ug/spruj70/spruj70.pdf under the `Bootmode Settings`
+section.
+
+.. list-table:: AM69 SK Boot Modes
+   :widths: 16 16
+   :header-rows: 1
+
+   * - Switch Label
+     - SW2: 1234
+
+   * - SD
+     - 0000
+
+   * - OSPI
+     - 0010
+
+   * - EMMC
+     - 0110
+
+   * - UART
+     - 1010
+
+For SW2, the switch state in the "ON" position = 1.
+
+Debugging U-Boot
+----------------
+
+See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
+detailed setup information.
+
+.. warning::
+
+  **OpenOCD support since**: September 2023 (git master)
+
+  Until the next stable release of OpenOCD is available in your development
+  environment's distribution, it might be necessary to build OpenOCD `from the
+  source <https://github.com/openocd-org/openocd>`_.
+
+Debugging U-Boot on J784S4-EVM and AM69-SK
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. include::  k3.rst
+    :start-after: .. k3_rst_include_start_openocd_connect_XDS110
+    :end-before: .. k3_rst_include_end_openocd_connect_XDS110
+
+To start OpenOCD and connect to J784S4-EVM or AM69-SK board, use the
+following.
+
+.. code-block:: bash
+
+  openocd -f board/ti_j784s4evm.cfg
diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst
new file mode 100644
index 00000000000..67b066a07d3
--- /dev/null
+++ b/doc/board/ti/k3.rst
@@ -0,0 +1,1167 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Bryan Brattlof <bb@ti.com>
+
+K3 Generation
+=============
+
+Summary
+-------
+
+Texas Instrument's K3 family of SoCs utilize a heterogeneous multicore
+and highly integrated device architecture targeted to maximize
+performance and power efficiency for a wide range of industrial,
+automotive and other broad market segments.
+
+Typically the processing cores and the peripherals for these devices are
+partitioned into three functional domains to provide ultra-low power
+modes as well as accommodating application and industrial safety systems
+on the same SoC.  These functional domains are typically called the:
+
+* Wakeup (WKUP) domain
+* Micro-controller (MCU) domain
+* Main domain
+
+For a more detailed view of what peripherals are attached to each
+domain, consult the device specific documentation.
+
+K3 Based SoCs
+-------------
+
+.. toctree::
+   :maxdepth: 1
+
+   am62ax_sk
+   am62x_sk
+   ../beagle/am62x_beagleplay
+   ../phytec/phycore-am62x
+   ../toradex/verdin-am62
+   am62px_sk
+   am64x_evm
+   am65x_evm
+   j7200_evm
+   ../beagle/j721e_beagleboneai64
+   j721e_evm
+   j721s2_evm
+   j722s_evm
+   j784s4_evm
+
+Boot Flow Overview
+------------------
+
+For all K3 SoCs the first core started will be inside the Security
+Management Subsystem (SMS) which will secure the device and start a core
+in the wakeup domain to run the ROM code. ROM will then initialize the
+boot media needed to load the binaries packaged inside `tiboot3.bin`,
+including a 32bit U-Boot SPL, (called the wakeup SPL) that ROM will jump
+to after it has finished loading everything into internal SRAM.
+
+.. image:: img/boot_flow_01.svg
+  :alt: Boot flow up to wakeup domain SPL
+
+The wakeup SPL, running on a wakeup domain core, will initialize DDR and
+any peripherals needed to load the larger binaries inside the `tispl.bin`
+into DDR.  Once loaded the wakeup SPL will start one of the 'big'
+application cores inside the main domain to initialize the main domain,
+starting with Trusted Firmware-A (TF-A), before moving on to start
+OP-TEE and the main domain's U-Boot SPL.
+
+.. image:: img/boot_flow_02.svg
+  :alt: Boot flow up to main domain SPL
+
+The main domain's SPL, running on a 64bit application core, has
+virtually unlimited space (billions of bytes now that DDR is working) to
+initialize even more peripherals needed to load in the `u-boot.img`
+which loads more firmware into the micro-controller & wakeup domains and
+finally prepare the main domain to run Linux.
+
+.. image:: img/boot_flow_03.svg
+  :alt: Complete boot flow up to Linux
+
+This is the typical boot flow for all K3 based SoCs, however this flow
+offers quite a lot in the terms of flexibility, especially on High
+Security (HS) SoCs.
+
+Boot Flow Variations
+^^^^^^^^^^^^^^^^^^^^
+
+All K3 SoCs will generally use the above boot flow with two main
+differences depending on the capabilities of the boot ROM and the number
+of cores inside the device. These differences split the bootflow into
+essentially 4 unique but very similar flows:
+
+* Split binary with a combined firmware: (eg: AM65)
+* Combined binary with a combined firmware: (eg: AM64)
+* Split binary with a split firmware: (eg: J721E)
+* Combined binary with a split firmware: (eg: AM62)
+
+For devices that utilize the split binary approach, ROM is not capable
+of loading the firmware into the SoC, requiring the wakeup domain's
+U-Boot SPL to load the firmware.
+
+Devices with a split firmware will have two firmwares loaded into the
+device at different times during the bootup process. TI's Foundational
+Security (TIFS), needed to operate the Security Management Subsystem,
+will either be loaded by ROM or the WKUP U-Boot SPL, then once the
+wakeup U-Boot SPL has completed, the second Device Management (DM)
+firmware can be loaded on the now free core in the wakeup domain.
+
+For more information on the bootup process of your SoC, consult the
+device specific boot flow documentation.
+
+Secure Boot
+-----------
+
+K3 HS-SE (High Security - Security Enforced) devices enforce an
+authenticated boot flow for secure boot. HS-FS (High Security - Field
+Securable) is the state of a K3 device before it has been eFused with
+customer security keys.  In the HS-FS state the authentication still can
+function as in HS-SE, but as there are no customer keys to verify the
+signatures against, the authentication will pass for certificates signed
+with any key.
+
+Chain of trust
+^^^^^^^^^^^^^^
+
+1) Public ROM loads the tiboot3.bin (R5 SPL, TIFS)
+2) R5 SPL loads tispl.bin (ATF, OP-TEE, DM, SPL)
+3) SPL loads u-boot.img (U-Boot)
+4) U-Boot loads fitImage (Linux and DTBs)
+
+Steps 1-3 are all authenticated by either the Secure ROM or TIFS as the
+authenticating entity and step 4 uses U-boot standard mechanism for
+authenticating.
+
+All the authentication that are done for ROM/TIFS are done through x509
+certificates that are signed.
+
+Firewalls
+^^^^^^^^^
+
+1) Secure ROM comes up and sets up firewalls that are needed by itself
+2) TIFS will setup it's own firewalls to protect core system resources
+3) R5 SPL will remove any firewalls that are leftover from the Secure ROM stage
+   that are no longer required.
+4) Each stage beyond this: such as tispl.bin containing TFA/OPTEE uses OIDs to
+   set up firewalls to protect themselves (enforced by TIFS)
+5) TFA/OP-TEE can configure other firewalls at runtime if required as they
+   are already authenticated and firewalled off from illegal access.
+6) All later stages can setup or remove firewalls that have not been already
+   configured by previous stages, such as those created by TIFS, TFA, and OP-TEE.
+
+Futhur, firewalls have a lockdown bit in hardware that enforces the setting
+(and cannot be over-ridden) until the full system is reset.
+
+Software Sources
+----------------
+
+All scripts and code needed to build the `tiboot3.bin`, `tispl.bin` and
+`u-boot.img` for all K3 SoCs can be located at the following places
+online
+
+.. k3_rst_include_start_boot_sources
+
+* **Das U-Boot**
+
+  | **source:** https://source.denx.de/u-boot/u-boot.git
+  | **branch:** master
+
+* **Trusted Firmware-A (TF-A)**
+
+  | **source:** https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/
+  | **branch:** master
+
+* **Open Portable Trusted Execution Environment (OP-TEE)**
+
+  | **source:** https://github.com/OP-TEE/optee_os.git
+  | **branch:** master
+
+* **TI Firmware (TIFS, DM, SYSFW)**
+
+  | **source:** https://git.ti.com/git/processor-firmware/ti-linux-firmware.git
+  | **branch:** ti-linux-firmware
+
+.. note::
+
+  The TI Firmware required for functionality of the system can be
+  one of the following combination (see platform specific boot diagram for
+  further information as to which component runs on which processor):
+
+  * **TIFS** - TI Foundational Security Firmware - Consists of purely firmware
+    meant to run on the security enclave.
+  * **DM** - Device Management firmware also called TI System Control Interface
+    server (TISCI Server) - This component purely plays the role of managing
+    device resources such as power, clock, interrupts, dma etc. This firmware
+    runs on a dedicated or multi-use microcontroller outside the security
+    enclave.
+
+ OR
+
+  * **SYSFW** - System firmware - consists of both TIFS and DM both running on
+    the security enclave.
+
+.. k3_rst_include_end_boot_sources
+
+Build Procedure
+---------------
+
+.. note ::
+
+   Make sure you have installed all necessary host package dependencies
+   before proceeding. See :ref:`build/gcc:Building with GCC`.
+
+Depending on the specifics of your device, you will need three or more
+binaries to boot your SoC.
+
+* `tiboot3.bin` (bootloader for the wakeup domain)
+* `tispl.bin` (bootloader for the main domain)
+* `u-boot.img`
+
+During the bootup process, both the 32bit wakeup domain and the 64bit
+main domains will be involved. This means everything inside the
+`tiboot3.bin` running in the wakeup domain will need to be compiled for
+32bit cores and most binaries in the `tispl.bin` will need to be
+compiled for 64bit main domain CPU cores.
+
+All of that to say you will need both a 32bit and 64bit cross compiler
+(assuming you're using an x86 desktop)
+
+.. k3_rst_include_start_common_env_vars_desc
+.. list-table:: Generic environment variables
+   :widths: 25 25 50
+   :header-rows: 1
+
+   * - S/w Component
+     - Env Variable
+     - Description
+   * - All Software
+     - CC32
+     - Cross compiler for ARMv7 (ARM 32bit), typically arm-linux-gnueabihf-
+   * - All Software
+     - CC64
+     - Cross compiler for ARMv8 (ARM 64bit), typically aarch64-linux-gnu-
+   * - All Software
+     - LNX_FW_PATH
+     - Path to TI Linux firmware repository
+   * - All Software
+     - TFA_PATH
+     - Path to source of Trusted Firmware-A
+   * - All Software
+     - OPTEE_PATH
+     - Path to source of OP-TEE
+.. k3_rst_include_end_common_env_vars_desc
+
+.. k3_rst_include_start_common_env_vars_defn
+.. prompt:: bash $
+
+ export CC32=arm-linux-gnueabihf-
+ export CC64=aarch64-linux-gnu-
+ export LNX_FW_PATH=path/to/ti-linux-firmware
+ export TFA_PATH=path/to/trusted-firmware-a
+ export OPTEE_PATH=path/to/optee_os
+.. k3_rst_include_end_common_env_vars_defn
+
+We will also need some common environment variables set up for the various
+other build sources. we shall use the following, in the build descriptions below:
+
+.. k3_rst_include_start_board_env_vars_desc
+.. list-table:: Board specific environment variables
+   :widths: 25 25 50
+   :header-rows: 1
+
+   * - S/w Component
+     - Env Variable
+     - Description
+   * - U-Boot
+     - UBOOT_CFG_CORTEXR
+     - Defconfig for Cortex-R (Boot processor).
+   * - U-Boot
+     - UBOOT_CFG_CORTEXA
+     - Defconfig for Cortex-A (MPU processor).
+   * - Trusted Firmware-A
+     - TFA_BOARD
+     - Platform name used for building TF-A for Cortex-A Processor.
+   * - Trusted Firmware-A
+     - TFA_EXTRA_ARGS
+     - Any extra arguments used for building TF-A.
+   * - OP-TEE
+     - OPTEE_PLATFORM
+     - Platform name used for building OP-TEE for Cortex-A Processor.
+   * - OP-TEE
+     - OPTEE_EXTRA_ARGS
+     - Any extra arguments used for building OP-TEE.
+.. k3_rst_include_end_board_env_vars_desc
+
+Building tiboot3.bin
+^^^^^^^^^^^^^^^^^^^^
+
+1. To generate the U-Boot SPL for the wakeup domain, use the following
+   commands, substituting :code:`{SOC}` for the name of your device (eg:
+   am62x) to package the various firmware and the wakeup UBoot SPL into
+   the final `tiboot3.bin` binary. (or the `sysfw.itb` if your device
+   uses the split binary flow)
+
+.. _k3_rst_include_start_build_steps_spl_r5:
+
+.. k3_rst_include_start_build_steps_spl_r5
+.. prompt:: bash $
+
+ # inside u-boot source
+ make $UBOOT_CFG_CORTEXR
+ make CROSS_COMPILE=$CC32 BINMAN_INDIRS=$LNX_FW_PATH
+.. k3_rst_include_end_build_steps_spl_r5
+
+At this point you should have all the needed binaries to boot the wakeup
+domain of your K3 SoC.
+
+**Combined Binary Boot Flow** (eg: am62x, am64x, ... )
+
+   `tiboot3-{SOC}-{gp/hs-fs/hs}.bin`
+
+**Split Binary Boot Flow** (eg: j721e, am65x)
+
+   | `tiboot3-{SOC}-{gp/hs-fs/hs}.bin`
+   | `sysfw-{SOC}-{gp/hs-fs/hs}-evm.itb`
+
+.. note ::
+
+   It's important to rename the generated `tiboot3.bin` and `sysfw.itb`
+   to match exactly `tiboot3.bin` and `sysfw.itb` as ROM and the wakeup
+   UBoot SPL will only look for and load the files with these names.
+
+Building tispl.bin
+^^^^^^^^^^^^^^^^^^
+
+The `tispl.bin` is a standard fitImage combining the firmware need for
+the main domain to function properly as well as Device Management (DM)
+firmware if your device using a split firmware.
+
+2. We will first need TF-A, as it's the first thing to run on the 'big'
+   application cores on the main domain.
+
+.. k3_rst_include_start_build_steps_tfa
+.. prompt:: bash $
+
+ # inside trusted-firmware-a source
+ make CROSS_COMPILE=$CC64 ARCH=aarch64 PLAT=k3 SPD=opteed $TFA_EXTRA_ARGS \
+      TARGET_BOARD=$TFA_BOARD
+.. k3_rst_include_end_build_steps_tfa
+
+Typically all `j7*` devices will use `TARGET_BOARD=generic` or `TARGET_BOARD
+=j784s4` (if it is a J784S4 device), while typical Sitara (`am6*`) devices
+use the `lite` option.
+
+3. The Open Portable Trusted Execution Environment (OP-TEE) is designed
+   to run as a companion to a non-secure Linux kernel for Cortex-A cores
+   using the TrustZone technology built into the core.
+
+.. k3_rst_include_start_build_steps_optee
+.. prompt:: bash $
+
+ # inside optee_os source
+ make CROSS_COMPILE=$CC32 CROSS_COMPILE64=$CC64 CFG_ARM64_core=y $OPTEE_EXTRA_ARGS \
+       PLATFORM=$OPTEE_PLATFORM
+.. k3_rst_include_end_build_steps_optee
+
+4. Finally, after TF-A has initialized the main domain and OP-TEE has
+   finished, we can jump back into U-Boot again, this time running on a
+   64bit core in the main domain.
+
+.. _k3_rst_include_start_build_steps_uboot:
+
+.. k3_rst_include_start_build_steps_uboot
+.. prompt:: bash $
+
+ # inside u-boot source
+ make $UBOOT_CFG_CORTEXA
+ make CROSS_COMPILE=$CC64 BINMAN_INDIRS=$LNX_FW_PATH \
+        BL31=$TFA_PATH/build/k3/$TFA_BOARD/release/bl31.bin \
+        TEE=$OPTEE_PATH/out/arm-plat-k3/core/tee-raw.bin
+
+.. note::
+   It is also possible to pick up a custom DM binary by adding TI_DM argument
+   pointing to the file. If not provided, it defaults to picking up the DM
+   binary from BINMAN_INDIRS. This is only applicable to devices that utilize
+   split firmware.
+
+.. k3_rst_include_end_build_steps_uboot
+
+At this point you should have every binary needed initialize both the
+wakeup and main domain and to boot to the U-Boot prompt
+
+**Main Domain Bootloader**
+
+   | `tispl.bin` for HS devices or `tispl.bin_unsigned` for GP devices
+   | `u-boot.img` for HS devices or `u-boot.img_unsigned` for GP devices
+
+Capsules
+--------
+
+Most K3 boards have support for UEFI capsule update via capsule-on-disk
+functionality. Check the ``CONFIG_EFI_CAPSULE_ON_DISK`` config option for
+the board under question to verify. If configured, capsules for each of the
+binaries above are automatically generated as part of the binary's build.
+They are named `<binary>-capsule.bin`. For example, the capsule for
+`u-boot.img` would be called `uboot-capsule.bin`.
+
+See :ref:`uefi_capsule_update_ref` for more information on U-Boot's support
+for capsule update and how they are applied.
+
+Each board defines the capsules generated, including where those capsules
+are applied. See the ``update_info`` definition for a board, typically
+found at `board/ti/<board>/evm.c`. For example, `board/ti/am62x/evm.c`.
+Usually, if the board has OSPI flash, the capsules will be applied there,
+else the boot partition of the eMMC device.
+
+Once applied, the board will have U-Boot binaries in on-board non-volatile
+storage. To start booting from that storage, set the bootmode pins
+accordingly. Future updates can be performed by using the capsules
+generated from the corresponding U-Boot builds.
+
+FIT signature signing
+---------------------
+
+K3 platforms have FIT signature signing enabled by default on their primary
+platforms. Here we'll take an example for creating FIT Image for J721E platform
+and the same can be extended to other platforms
+
+Pre-requisites:
+
+* U-boot build (:ref:`U-boot build <k3_rst_include_start_build_steps_spl_r5>`)
+* Linux Image and Linux DTB prebuilt
+
+Describing FIT source
+^^^^^^^^^^^^^^^^^^^^^
+
+FIT Image is a packed structure containing binary blobs and configurations.
+The Kernel FIT Image that we have has Kernel Image, DTB and the DTBOs.  It
+supports packing multiple images and configurations that allow you to
+choose any configuration at runtime to boot from.
+
+.. code-block::
+
+    /dts-v1/;
+
+    / {
+        description = "FIT Image description";
+        #address-cells = <1>;
+
+        images {
+            [image-1]
+            [image-2]
+            [fdt-1]
+            [fdt-2]
+        }
+
+        configurations {
+            default = <conf-1>
+            [conf-1: image-1,fdt-1]
+            [conf-2: image-2,fdt-1]
+        }
+    }
+
+* Sample Images
+
+.. code-block::
+
+    kernel-1 {
+            description = "Linux kernel";
+            data = /incbin/("linux.bin");
+            type = "kernel";
+            arch = "arm64";
+            os = "linux";
+            compression = "gzip";
+            load = <0x81000000>;
+            entry = <0x81000000>;
+            hash-1 {
+                    algo = "sha512";
+            };
+    };
+    fdt-ti_k3-j721e-common-proc-board.dtb {
+            description = "Flattened Device Tree blob";
+            data = /incbin/("arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dtb");
+            type = "flat_dt";
+            arch = "arm64";
+            compression = "none";
+            load = <0x83000000>;
+            hash-1 {
+                    algo = "sha512";
+            };
+    };
+    # Optional images
+    fdt-ti_k3-j721e-evm-virt-mac-client.dtbo {
+            description = "Flattened Device Tree blob";
+            data = /incbin/("arch/arm64/boot/dts/ti/k3-j721e-evm-virt-mac-client.dtbo");
+            type = "flat_dt";
+            arch = "arm64";
+            compression = "none";
+            load = <0x83080000>;
+            hash-1 {
+                    algo = "sha512";
+            };
+    };
+
+.. note::
+
+    Change the path in data variables to point to the respective files in your
+    local machine. For e.g change "linux.bin" to "<path-to-kernel-image>".
+
+For enabling usage of FIT signature, add the signature node to the
+corresponding configuration node as follows.
+
+* Sample Configurations
+
+.. code-block::
+
+    conf-ti_k3-j721e-common-proc-board.dtb {
+            description = "Linux kernel, FDT blob";
+            fdt = "fdt-ti_k3-j721e-common-proc-board.dtb";
+            kernel = "kernel-1";
+            signature-1 {
+                    algo = "sha512,rsa4096";
+                    key-name-hint = "custMpk";
+                    sign-images = "kernel", "fdt";
+            };
+    };
+    # Optional configurations
+    conf-ti_k3-j721e-evm-virt-mac-client.dtbo {
+            description = "FDTO blob";
+            fdt = "fdt-ti_k3-j721e-evm-virt-mac-client.dtbo";
+
+            signature-1 {
+                    algo = "sha512,rsa4096";
+                    key-name-hint = "custMpk";
+                    sign-images = "fdt";
+            };
+    };
+
+Specify all images you need the signature to authenticate as a part of
+sign-images. The key-name-hint needs to be changed if you are using some
+other key other than the TI dummy key that we are using for this example.
+It should be the name of the file containing the keys.
+
+.. note::
+
+    Generating new set of keys:
+
+    .. prompt:: bash $
+
+        mkdir keys
+        openssl genpkey -algorithm RSA -out keys/dev.key \
+        -pkeyopt rsa_keygen_bits:4096 -pkeyopt rsa_keygen_pubexp:65537
+        openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
+
+Generating the fitImage
+^^^^^^^^^^^^^^^^^^^^^^^
+
+.. note::
+
+    For signing a secondary platform like SK boards, you'll require
+    additional steps
+
+    - Change the CONFIG_DEFAULT_DEVICE_TREE
+
+        For e.g
+
+        .. code-block::
+
+            diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
+            index a5c1df7e0054..6d0126d955ef 100644
+            --- a/configs/j721e_evm_a72_defconfig
+            +++ b/configs/j721e_evm_a72_defconfig
+            @@ -13,7 +13,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
+             CONFIG_ENV_SIZE=0x20000
+             CONFIG_DM_GPIO=y
+             CONFIG_SPL_DM_SPI=y
+            -CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
+            +CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-sk"
+             CONFIG_SPL_TEXT_BASE=0x80080000
+             CONFIG_DM_RESET=y
+             CONFIG_SPL_MMC=y
+
+    - Change the binman nodes to package u-boot.dtb for the correct set of platform
+
+        For e.g
+
+        .. code-block::
+
+            diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi
+                  index 673be646b1e3..752fa805fe8d 100644
+                  --- a/arch/arm/dts/k3-j721e-binman.dtsi
+                  +++ b/arch/arm/dts/k3-j721e-binman.dtsi
+                  @@ -299,8 +299,8 @@
+                   #define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb"
+
+                   #define UBOOT_NODTB "u-boot-nodtb.bin"
+                  -#define J721E_EVM_DTB "u-boot.dtb"
+                  -#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb"
+                  +#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb"
+                  +#define J721E_SK_DTB "u-boot.dtb"
+
+This step will embed the public key in the u-boot.dtb file that was already
+built during the initial u-boot build.
+
+.. prompt:: bash $
+
+    mkimage -r -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K $UBOOT_PATH/build/$ARMV8/dts/dt.dtb fitImage
+
+.. note::
+
+    If you have another set of keys then change the -k argument to point to
+    the folder where your keys are present, the build requires the presence
+    of both .key and .crt file.
+
+Build u-boot again
+^^^^^^^^^^^^^^^^^^
+
+The updated u-boot.dtb needs to be packed in u-boot.img for authentication
+so rebuild U-boot ARMV8 without changing any parameters.
+Refer (:ref:`U-boot ARMV8 build <k3_rst_include_start_build_steps_uboot>`)
+
+.. note::
+
+   The devices now also have distroboot enabled so if the FIT image doesn't
+   work then the fallback to normal distroboot will be there on HS devices.
+   This will need to be explicitly disabled by changing the boot_targets to
+   disallow fallback during testing.
+
+Saving environment
+------------------
+
+SAVEENV is disabled by default and for the new flow uses Uenv.txt as the default
+way for saving the environments. This has been done as Uenv.txt is more granular
+then the saveenv command and can be used across various bootmodes too.
+
+**Writing to MMC/EMMC**
+
+.. prompt:: bash =>
+
+  env export -t $loadaddr <list of variables>
+  fatwrite mmc ${mmcdev} ${loadaddr} ${bootenvfile} ${filesize}
+
+**Reading from MMC/EMMC**
+
+By default run envboot will read it from the MMC/EMMC partition ( based on
+mmcdev) and set the environments.
+
+If manually needs to be done then the environment can be read from the
+filesystem and then imported
+
+.. prompt:: bash =>
+
+  fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
+  env import -t ${loadaddr} ${filesize}
+
+.. _k3_rst_refer_openocd:
+
+Common Debugging environment - OpenOCD
+--------------------------------------
+
+This section will show you how to connect a board to `OpenOCD
+<https://openocd.org/>`_ and load the SPL symbols for debugging with
+a K3 generation device. To follow this guide, you must build custom
+u-boot binaries, start your board from a boot media such as an SD
+card, and use an OpenOCD environment. This section uses generic
+examples, though you can apply these instructions to any supported K3
+generation device.
+
+The overall structure of this setup is in the following figure.
+
+.. image:: img/openocd-overview.svg
+  :alt: Overview of OpenOCD setup.
+
+.. note::
+
+  If you find these instructions useful, please consider `donating
+  <https://openocd.org/pages/donations.html>`_ to OpenOCD.
+
+Step 1: Download and install OpenOCD
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+To get started, it is more convenient if the distribution you
+use supports OpenOCD by default. Follow the instructions in the
+`getting OpenOCD <https://openocd.org/pages/getting-openocd.html>`_
+documentation to pick the installation steps appropriate to your
+environment. Some references to OpenOCD documentation:
+
+* `OpenOCD User Guide <https://openocd.org/doc/html/index.html>`_
+* `OpenOCD Developer's Guide <https://openocd.org/doc/doxygen/html/index.html>`_
+
+Refer to the release notes corresponding to the `OpenOCD version
+<https://github.com/openocd-org/openocd/releases>`_ to ensure
+
+* Processor support: In general, processor support shouldn't present
+  any difficulties since OpenOCD provides solid support for both ARMv8
+  and ARMv7.
+* SoC support: When working with System-on-a-Chip (SoC), the support
+  usually comes as a TCL config file. It is vital to ensure the correct
+  version of OpenOCD or to use the TCL files from the latest release or
+  the one mentioned.
+* Board or the JTAG adapter support: In most cases, board support is
+  a relatively easy problem if the board has a JTAG pin header. All
+  you need to do is ensure that the adapter you select is compatible
+  with OpenOCD. Some boards come with an onboard JTAG adapter that
+  requires a USB cable to be plugged into the board, in which case, it
+  is vital to ensure that the JTAG adapter is supported. Fortunately,
+  almost all TI K3 SK/EVMs come with TI's XDS110, which has out of the
+  box support by OpenOCD. The board-specific documentation will
+  cover the details and any adapter/dongle recommendations.
+
+.. prompt:: bash $
+
+ openocd -v
+
+.. note::
+
+ OpenOCD version 0.12.0 is usually required to connect to most K3
+ devices. If your device is only supported by a newer version than the
+ one provided by your distribution, you may need to build it from the source.
+
+Building OpenOCD from source
+""""""""""""""""""""""""""""
+
+The dependency package installation instructions below are for Debian
+systems, but equivalent instructions should exist for systems with
+other package managers. Please refer to the `OpenOCD Documentation
+<https://openocd.org/>`_ for more recent installation steps.
+
+.. prompt:: bash $
+
+  # Check the packages to be installed: needs deb-src in sources.list
+  sudo apt build-dep openocd
+  # The following list is NOT complete - please check the latest
+  sudo apt-get install libtool pkg-config texinfo libusb-dev \
+    libusb-1.0.0-dev libftdi-dev libhidapi-dev autoconf automake
+  git clone https://github.com/openocd-org/openocd.git openocd
+  cd openocd
+  git submodule init
+  git submodule update
+  ./bootstrap
+  ./configure --prefix=/usr/local/
+  make -j`nproc`
+  sudo make install
+
+.. note::
+
+  The example above uses the GitHub mirror site. See
+  `git repo information <https://openocd.org/doc/html/Developers.html#OpenOCD-Git-Repository>`_
+  information to pick the official git repo.
+  If a specific version is desired, select the version using `git checkout tag`.
+
+Installing OpenOCD udev rules
+"""""""""""""""""""""""""""""
+
+The step is not necessary if the distribution supports the OpenOCD, but
+if building from a source, ensure that the udev rules are installed
+correctly to ensure a sane system.
+
+.. prompt:: bash $
+
+  # Go to the OpenOCD source directory
+  cd openocd
+  Copy the udev rules to the correct system location
+  sudo cp ./contrib/60-openocd.rules \
+      ./src/jtag/drivers/libjaylink/contrib/99-libjaylink.rules \
+      /etc/udev/rules.d/
+  # Get Udev to load the new rules up
+  sudo udevadm control --reload-rules
+  # Use the new rules on existing connected devices
+  sudo udevadm trigger
+
+Step 2: Setup GDB
+^^^^^^^^^^^^^^^^^
+
+Most systems come with gdb-multiarch package.
+
+.. prompt:: bash $
+
+  # Install gdb-multiarch package
+  sudo apt-get install gdb-multiarch
+
+Though using GDB natively is normal, developers with interest in using IDE
+may find a few of these interesting:
+
+* `gdb-dashboard <https://github.com/cyrus-and/gdb-dashboard>`_
+* `gef <https://github.com/hugsy/gef>`_
+* `peda <https://github.com/longld/peda>`_
+* `pwndbg <https://github.com/pwndbg/pwndbg>`_
+* `voltron <https://github.com/snare/voltron>`_
+* `ddd <https://www.gnu.org/software/ddd/>`_
+* `vscode <https://www.justinmklam.com/posts/2017/10/vscode-debugger-setup/>`_
+* `vim conque-gdb <https://github.com/vim-scripts/Conque-GDB>`_
+* `emacs realgud <https://github.com/realgud/realgud/wiki/gdb-notes>`_
+* `Lauterbach IDE <https://www2.lauterbach.com/pdf/backend_gdb.pdf>`_
+
+.. warning::
+  LLDB support for OpenOCD is still a work in progress as of this writing.
+  Using GDB is probably the safest option at this point in time.
+
+Step 3: Connect board to PC
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+There are few patterns of boards in the ecosystem
+
+.. k3_rst_include_start_openocd_connect_XDS110
+
+**Integrated JTAG adapter/dongle**: The board has a micro-USB connector labelled
+XDS110 USB or JTAG. Connect a USB cable to the board to the mentioned port.
+
+.. note::
+
+  There are multiple USB ports on a typical board, So, ensure you have read
+  the user guide for the board and confirmed the silk screen label to ensure
+  connecting to the correct port.
+
+.. k3_rst_include_end_openocd_connect_XDS110
+
+.. k3_rst_include_start_openocd_connect_cti20
+
+**cTI20 connector**: The TI's `cTI20
+<https://software-dl.ti.com/ccs/esd/documents/xdsdebugprobes/emu_JTAG_connectors.html#cti-20-pin-header-information>`_ connector
+is probably the most prevelant on TI platforms. Though many
+TI boards have an onboard XDS110, cTI20 connector is usually
+provided as an alternate scheme to connect alternatives such
+as `Lauterbach <https://www.lauterbach.com/>`_ or `XDS560
+<https://www.ti.com/tool/TMDSEMU560V2STM-U>`_.
+
+To debug on these boards, the following combinations is suggested:
+
+* `TUMPA <https://www.diygadget.com/JTAG-cables-and-microcontroller-programmers/tiao-usb-multi-protocol-adapter-JTAG-spi-i2c-serial>`_
+  or `equivalent dongles supported by OpenOCD. <https://openocd.org/doc/html/Debug-Adapter-Hardware.html#Debug-Adapter-Hardware>`_
+* Cable such as `Tag-connect ribbon cable <https://www.tag-connect.com/product/20-pin-cortex-ribbon-cable-4-length-with-50-mil-connectors>`_
+* Adapter to convert cTI20 to ARM20 such as those from
+  `Segger <https://www.segger.com/products/debug-probes/j-link/accessories/adapters/ti-cti-20-adapter/>`_
+  or `Lauterbach LA-3780 <https://www.lauterbach.com/ad3780.html>`_
+  Or optionally, if you have manufacturing capability then you could try
+  `BeagleBone JTAG Adapter <https://github.com/mmorawiec/BeagleBone-Black-JTAG-Adapters>`_
+
+.. warning::
+  XDS560 and Lauterbach are proprietary solutions and is not supported by
+  OpenOCD.
+  When purchasing an off the shelf adapter/dongle, you do want to be careful
+  about the signalling though. Please
+  `read for additional info <https://software-dl.ti.com/ccs/esd/xdsdebugprobes/emu_JTAG_connectors.html>`_.
+
+.. k3_rst_include_end_openocd_connect_cti20
+
+.. k3_rst_include_start_openocd_connect_tag_connect
+
+**Tag-Connect**: `Tag-Connect <https://www.tag-connect.com/>`_
+pads on the boards which require special cable. Please check the documentation
+to `identify <https://www.tag-connect.com/info/legs-or-no-legs>`_ if "legged"
+or "no-leg" version of the cable is appropriate for the board.
+
+To debug on these boards, you will need:
+
+* `TUMPA <https://www.diygadget.com/JTAG-cables-and-microcontroller-programmers/tiao-usb-multi-protocol-adapter-JTAG-spi-i2c-serial>`_
+  or `equivalent dongles supported by OpenOCD <https://openocd.org/doc/html/Debug-Adapter-Hardware.html#Debug-Adapter-Hardware>`_.
+* Tag-Connect cable appropriate to the board such as
+  `TC2050-IDC-NL <https://www.tag-connect.com/product/TC2050-IDC-NL-10-pin-no-legs-cable-with-ribbon-connector>`_
+* In case of no-leg, version, a
+  `retaining clip <https://www.tag-connect.com/product/tc2050-clip-3pack-retaining-clip>`_
+* Tag-Connect to ARM20
+  `adapter <https://www.tag-connect.com/product/tc2050-arm2010-arm-20-pin-to-tc2050-adapter>`_
+
+.. note::
+  You can optionally use a 3d printed solution such as
+  `Protective cap <https://www.thingiverse.com/thing:3025584>`_ or
+  `clip <https://www.thingiverse.com/thing:3035278>`_ to replace
+  the retaining clip.
+
+.. warning::
+  With the Tag-Connect to ARM20 adapter, Please solder the "Trst" signal for
+  connection to work.
+
+.. k3_rst_include_end_openocd_connect_tag_connect
+
+Debugging with OpenOCD
+^^^^^^^^^^^^^^^^^^^^^^
+
+Debugging U-Boot is different from debugging regular user space
+applications. The bootloader initialization process involves many boot
+media and hardware configuration operations. For K3 devices, there
+are also interactions with security firmware. While reloading the
+"elf" file works through GDB, developers must be mindful of cascading
+initialization's potential consequences.
+
+Consider the following code change:
+
+.. code-block:: diff
+
+  --- a/file.c	2023-07-29 10:55:29.647928811 -0500
+  +++ b/file.c	2023-07-29 10:55:46.091856816 -0500
+  @@ -1,3 +1,3 @@
+   val = readl(reg);
+  -val |= 0x2;
+  +val |= 0x1;
+   writel(val, reg);
+
+Re-running the elf file with the above change will result in the
+register setting 0x3 instead of the intended 0x1. There are other
+hardware blocks which may not behave very well with a re-initialization
+without proper shutdown.
+
+To help narrow the debug down, it is usually simpler to use the
+standard boot media to get to the bootloader and debug only in the area
+of interest.
+
+In general, to debug u-boot spl/u-boot with OpenOCD there are three steps:
+
+* Modify the code adding a loop to allow the debugger to attach
+  near the point of interest. Boot up normally to stop at the loop.
+* Connect with OpenOCD and step out of the loop.
+* Step through the code to find the root of issue.
+
+Typical debugging involves a few iterations of the above sequence.
+Though most bootloader developers like to use printf to debug,
+debug with JTAG tends to be most efficient since it is possible to
+investigate the code flow and inspect hardware registers without
+repeated iterations.
+
+Code modification
+"""""""""""""""""
+
+* **start.S**: Adding an infinite while loop at the very entry of
+  U-Boot. For this, look for the corresponding start.S entry file.
+  This is usually only required when debugging some core SoC or
+  processor related function. For example: arch/arm/cpu/armv8/start.S or
+  arch/arm/cpu/armv7/start.S
+
+.. code-block:: diff
+
+  diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
+  index 69e281b086..744929e825 100644
+  --- a/arch/arm/cpu/armv7/start.S
+  +++ b/arch/arm/cpu/armv7/start.S
+  @@ -37,6 +37,8 @@
+   #endif
+
+   reset:
+  +dead_loop:
+  +    b dead_loop
+       /* Allow the board to save important registers */
+       b    save_boot_params
+   save_boot_params_ret:
+
+* **board_init_f**: Adding an infinite while loop at the board entry
+  function. In many cases, it is important to debug the boot process if
+  any changes are made for board-specific applications. Below is a step
+  by step process for debugging the boot SPL or Armv8 SPL:
+
+  To debug the boot process in either domain, we will first
+  add a modification to the code we would like to debug.
+  In this example, we will debug ``board_init_f`` inside
+  ``arch/arm/mach-k3/{soc}_init.c``. Since some sections of U-Boot
+  will be executed multiple times during the bootup process of K3
+  devices, we will need to include either ``CONFIG_ARM64`` or
+  ``CONFIG_CPU_V7R`` to catch the CPU at the desired place during the
+  bootup process (Main or Wakeup domains). For example, modify the
+  file as follows (depending on need):
+
+.. code-block:: c
+
+  void board_init_f(ulong dummy)
+  {
+      .
+      .
+      /* Code to run on the R5F (Wakeup/Boot Domain) */
+      if (IS_ENABLED(CONFIG_CPU_V7R)) {
+          volatile int x = 1;
+          while(x) {};
+      }
+      ...
+      /* Code to run on the ARMV8 (Main Domain) */
+      if (IS_ENABLED(CONFIG_ARM64)) {
+          volatile int x = 1;
+          while(x) {};
+      }
+      .
+      .
+  }
+
+Connecting with OpenOCD for a debug session
+"""""""""""""""""""""""""""""""""""""""""""
+
+Startup OpenOCD to debug the platform as follows:
+
+* **Integrated JTAG interface**: If the evm has a debugger such as
+  XDS110 inbuilt, there is typically an evm board support added and a
+  cfg file will be available.
+
+.. k3_rst_include_start_openocd_cfg_XDS110
+
+.. prompt:: bash $
+
+  openocd -f board/{board_of_choice}.cfg
+
+.. k3_rst_include_end_openocd_cfg_XDS110
+
+.. k3_rst_include_start_openocd_cfg_external_intro
+
+* **External JTAG adapter/interface**: In other cases, where an
+  adapter/dongle is used, a simple cfg file can be created to integrate the
+  SoC and adapter information. See `supported TI K3 SoCs
+  <https://github.com/openocd-org/openocd/blob/master/tcl/target/ti_k3.cfg#L59>`_
+  to decide if the SoC is supported or not.
+
+.. prompt:: bash $
+
+  openocd -f openocd_connect.cfg
+
+.. k3_rst_include_end_openocd_cfg_external_intro
+
+  For example, with BeaglePlay (AM62X platform), the openocd_connect.cfg:
+
+.. code-block:: tcl
+
+  # TUMPA example:
+  # http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User's_Manual
+  source [find interface/ftdi/tumpa.cfg]
+
+  transport select jtag
+
+  # default JTAG configuration has only SRST and no TRST
+  reset_config srst_only srst_push_pull
+
+  # delay after SRST goes inactive
+  adapter srst delay 20
+
+  if { ![info exists SOC] } {
+    # Set the SoC of interest
+    set SOC am625
+  }
+
+  source [find target/ti_k3.cfg]
+
+  ftdi tdo_sample_edge falling
+
+  # Speeds for FT2232H are in multiples of 2, and 32MHz is tops
+  # max speed we seem to achieve is ~20MHz.. so we pick 16MHz
+  adapter speed 16000
+
+Below is an example of the output of this command:
+
+.. code-block:: console
+
+  Info : Listening on port 6666 for tcl connections
+  Info : Listening on port 4444 for telnet connections
+  Info : XDS110: connected
+  Info : XDS110: vid/pid = 0451/bef3
+  Info : XDS110: firmware version = 3.0.0.20
+  Info : XDS110: hardware version = 0x002f
+  Info : XDS110: connected to target via JTAG
+  Info : XDS110: TCK set to 2500 kHz
+  Info : clock speed 2500 kHz
+  Info : JTAG tap: am625.cpu tap/device found: 0x0bb7e02f (mfg: 0x017 (Texas Instruments), part: 0xbb7e, ver: 0x0)
+  Info : starting gdb server for am625.cpu.sysctrl on 3333
+  Info : Listening on port 3333 for gdb connections
+  Info : starting gdb server for am625.cpu.a53.0 on 3334
+  Info : Listening on port 3334 for gdb connections
+  Info : starting gdb server for am625.cpu.a53.1 on 3335
+  Info : Listening on port 3335 for gdb connections
+  Info : starting gdb server for am625.cpu.a53.2 on 3336
+  Info : Listening on port 3336 for gdb connections
+  Info : starting gdb server for am625.cpu.a53.3 on 3337
+  Info : Listening on port 3337 for gdb connections
+  Info : starting gdb server for am625.cpu.main0_r5.0 on 3338
+  Info : Listening on port 3338 for gdb connections
+  Info : starting gdb server for am625.cpu.gp_mcu on 3339
+  Info : Listening on port 3339 for gdb connections
+
+.. note::
+  Notice the default configuration is non-SMP configuration allowing
+  for each of the core to be attached and debugged simultaneously.
+  ARMv8 SPL/U-Boot starts up on cpu0 of a53/a72.
+
+.. k3_rst_include_start_openocd_cfg_external_gdb
+
+To debug using this server, use GDB directly or your preferred
+GDB-based IDE. To start up GDB in the terminal, run the following
+command.
+
+.. prompt:: bash $
+
+  gdb-multiarch
+
+To connect to your desired core, run the following command within GDB:
+
+.. prompt:: bash (gdb)
+
+  target extended-remote localhost:{port for desired core}
+
+To load symbols:
+
+.. warning::
+
+  SPL and U-Boot does a re-location of address compared to where it
+  is loaded originally. This step takes place after the DDR size is
+  determined from dt parsing. So, debugging can be split into either
+  "before re-location" or "after re-location". Please refer to the
+  file ''doc/README.arm-relocation'' to see how to grab the relocation
+  address.
+
+* Prior to relocation:
+
+.. prompt:: bash (gdb)
+
+  symbol-file {path to elf file}
+
+* After relocation:
+
+.. prompt:: bash (gdb)
+
+  # Drop old symbol file
+  symbol-file
+  # Pick up new relocaddr
+  add-symbol-file {path to elf file} {relocaddr}
+
+.. k3_rst_include_end_openocd_cfg_external_gdb
+
+In the above example of AM625,
+
+.. prompt:: bash (gdb)
+
+  target extended-remote localhost:3338     <- R5F (Wakeup Domain)
+  target extended-remote localhost:3334     <- A53 (Main Domain)
+
+The core can now be debugged directly within GDB using GDB commands or
+if using IDE, as appropriate to the IDE.
+
+Stepping through the code
+"""""""""""""""""""""""""
+
+`GDB TUI Commands
+<https://sourceware.org/gdb/onlinedocs/gdb/TUI-Commands.html>`_ can
+help set up the display more sensible for debug. Provide the name
+of the layout that can be used to debug. For example, use the GDB
+command ``layout src`` after loading the symbols to see the code and
+breakpoints. To exit the debug loop added above, add any breakpoints
+needed and run the following GDB commands to step out of the debug
+loop set in the ``board_init_f`` function.
+
+.. prompt:: bash (gdb)
+
+  set x = 0
+  continue
+
+The platform has now been successfully setup to debug with OpenOCD
+using GDB commands or a GDB-based IDE. See `OpenOCD documentation for
+GDB <https://openocd.org/doc/html/GDB-and-OpenOCD.html>`_ for further
+information.
+
+.. warning::
+
+  On the K3 family of devices, a watchdog timer within the DMSC is
+  enabled by default by the ROM bootcode with a timeout of 3 minutes.
+  The watchdog timer is serviced by System Firmware (SYSFW) or TI
+  Foundational Security (TIFS) during normal operation. If debugging
+  the SPL before the SYSFW is loaded, the watchdog timer will not get
+  serviced automatically and the debug session will reset after 3
+  minutes. It is recommended to start debugging SPL code only after
+  the startup of SYSFW to avoid running into the watchdog timer reset.
+
+Miscellaneous notes with OpenOCD
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Currently, OpenOCD does not support tracing for K3 platforms. Tracing
+function could be beneficial if the bug in code occurs deep within
+nested function and can optionally save developers major trouble of
+stepping through a large quantity of code.
diff --git a/doc/board/ti/ks2_evm.rst b/doc/board/ti/ks2_evm.rst
new file mode 100644
index 00000000000..16c2e57d09d
--- /dev/null
+++ b/doc/board/ti/ks2_evm.rst
@@ -0,0 +1,303 @@
+.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+.. sectionauthor:: Neha Malcom Francis <n-francis@ti.com>
+
+Keystone II EVM Generation
+==========================
+
+Summary
+-------
+
+This README has information on the U-Boot port for K2HK, K2E, and K2L EVM boards.
+Documentation for this board can be found at:
+
+ - http://www.advantech.com/Support/TI-EVM/EVMK2HX_sd.aspx
+ - https://www.einfochips.com/index.php/partnerships/texas-instruments/k2e-evm.html
+ - https://www.einfochips.com/index.php/partnerships/texas-instruments/k2l-evm.html
+
+The K2HK board is based on Texas Instruments Keystone2 family of SoCs: K2H, K2K.
+More details on these SoCs are available at company websites:
+
+K2K: https://www.ti.com/product/tci6638k2k
+K2H: https://www.ti.com/product/tci6638k2h
+
+The K2E SoC details are available at
+ https://www.ti.com/lit/ds/symlink/66ak2e05.pdf
+
+The K2L SoC details are available at
+ https://www.ti.com/lit/ds/symlink/tci6630k2l.pdf
+
+The K2G SoC details are available at
+ https://www.ti.com/lit/ds/symlink/66ak2g02.pdf
+
+Board Configuration
+-------------------
+
+Some of the peripherals that are configured by U-Boot
+
+.. list-table::
+   :widths: 10 10 10 10 10 10 10 10
+   :header-rows: 1
+
+   * -
+     - DDR3
+     - NAND
+     - MSM SRAM
+     - ETH Ports
+     - UART
+     - I2C
+     - SPI
+   * - K2HK
+     - 2
+     - 512MB
+     - 6MB
+     - 4(2)
+     - 2
+     - 3
+     - 3
+   * - K2E
+     - 4
+     - 512MB
+     - 2MB
+     - 8(2)
+     - 2
+     - 3
+     - 3
+   * - K2L
+     - 2
+     - 512MB
+     - 2MB
+     - 4(2)
+     - 4
+     - 3
+     - 3
+   * - K2G
+     - 2
+     - 256MB
+     - 1MB
+     - 1
+     - 1
+     - 1
+     - 1
+
+There are only 2 eth port installed on the boards.
+
+There are separate PLLs to drive clocks to Tetris ARM and Peripherals.
+To bring up SMP Linux on this board, there is a boot monitor
+code that will be installed in MSMC SRAM. There is command available
+to install this image from U-Boot.
+
+The port related files can be found at following folders:
+ - keystone2 SoC related files: arch/arm/cpu/armv7/keystone/
+ - EVMs board files: board/ti/k2s_evm/
+
+Board configuration files:
+ - include/configs/k2hk_evm.h
+ - include/configs/k2e_evm.h
+ - include/configs/k2l_evm.h
+ - include/configs/k2g_evm.h
+
+As U-Boot is migrating to Kconfig there is also board defconfig files
+ - configs/k2e_evm_defconfig
+ - configs/k2hk_evm_defconfig
+ - configs/k2l_evm_defconfig
+ - configs/k2g_evm_defconfig
+
+Supported boot modes:
+ - SPI NOR boot
+ - AEMIF NAND boot (K2E, K2L and K2HK)
+ - UART boot
+ - MMC boot (Only on K2G)
+
+Supported image formats:
+ - u-boot.bin: for loading and running u-boot.bin through Texas Instruments Code
+   Composer Studio (CCS) and for UART boot.
+ - u-boot-spi.gph: gpimage for programming SPI NOR flash for SPI NOR boot
+ - MLO: gpimage for programming NAND flash for NAND boot, MMC boot.
+
+Build Instructions
+------------------
+
+Examples for k2hk, for k2e, k2l and k2g just replace k2hk prefix accordingly.
+Don't forget to add CROSS_COMPILE.
+
+To build u-boot.bin, u-boot-spi.gph, MLO:
+
+.. prompt:: bash $
+
+   make k2hk_evm_defconfig
+   make
+
+Load and Run U-Boot on Keystone EVMs using CCS
+----------------------------------------------
+
+Need Code Composer Studio (CCS) installed on a PC to load and run u-boot.bin
+on EVM? See instructions at below link for installing CCS on a Windows PC.
+
+        `<http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Getting_Started#Installing_Code_Composer_Studio>`_
+
+Use u-boot.bin from the build folder for loading and running U-Boot binary
+on EVM. Follow instructions at:
+
+ - K2HK http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup
+ - K2E  http://processors.wiki.ti.com/index.php/EVMK2E_Hardware_Setup
+ - K2L  http://processors.wiki.ti.com/index.php/TCIEVMK2L_Hardware_Setup
+ - K2G  http://processors.wiki.ti.com/index.php/66AK2G02_GP_EVM_Hardware_Setup
+
+to configure SW1 dip switch to use "No Boot/JTAG DSP Little Endian Boot Mode"
+and Power ON the EVM.  Follow instructions to connect serial port of EVM to
+PC and start TeraTerm or Hyper Terminal.
+
+Start CCS on a Windows machine and Launch Target configuration as instructed at
+
+        `<http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Exploring#Loading_and_Running_U-Boot_on_EVM_through_CCS>`_
+
+The instructions provided in the above link uses a script for
+loading the U-Boot binary on the target EVM. Instead do the following:-
+
+#. Right click to "Texas Instruments XDS2xx USB Emulator_0/CortexA15_1 core (D
+   is connected: Unknown)" at the debug window (This is created once Target
+   configuration is launched) and select "Connect Target".
+#. Once target connect is successful, choose Tools->Load Memory option from the
+   top level menu. At the Load Memory window, choose the file u-boot.bin
+   through "Browse" button and click "next >" button. In the next window, enter
+   Start address as 0xc000000, choose Type-size "32 bits" and click "Finish"
+   button.
+#. Click View -> Registers from the top level menu to view registers window.
+#. From Registers, window expand "Core Registers" to view PC. Edit PC value
+   to be 0xc000000. From the "Run" top level menu, select "Free Run"
+#. The U-Boot prompt is shown at the Tera Term/ Hyper terminal console as
+   below and type any key to stop autoboot as instructed.
+
+.. code-block:: bash
+
+  U-Boot 2014.04-rc1-00201-gc215b5a (Mar 21 2014 - 12:47:59)
+
+  I2C:   ready
+  Detected SO-DIMM [SQR-SD3T-2G1333SED]
+  DRAM:  1.1 GiB
+  NAND:  512 MiB
+  Net:   K2HK_EMAC
+  Warning: K2HK_EMAC using MAC address from net device
+  , K2HK_EMAC1, K2HK_EMAC2, K2HK_EMAC3
+  Hit any key to stop autoboot:  0
+
+SPI NOR Flash Programming Instructions
+--------------------------------------
+
+U-Boot image can be flashed to first 512KB of the NOR flash using following
+instructions:
+
+1. Start CCS and run U-Boot as described above.
+2. Suspend Target. Select Run -> Suspend from top level menu
+   CortexA15_1 (Free Running)"
+3. Load u-boot-spi.gph binary from build folder on to DDR address 0x87000000
+   through CCS as described in step 2 of "Load and Run U-Boot on K2HK/K2E/K2L
+   EVM using CCS", but using address 0x87000000.
+4. Free Run the target as described earlier (step 4) to get U-Boot prompt
+5. At the U-Boot console type following to setup U-Boot environment variables.
+
+.. prompt:: bash =>
+
+   setenv addr_uboot 0x87000000
+   setenv filesize <size in hex of u-boot-spi.gph rounded to hex 0x10000>
+   run burn_uboot_spi
+
+Once U-Boot prompt is available, power off the EVM. Set the SW1 dip switch to
+"SPI Little Endian Boot mode" as per instruction at
+
+        `<http://processors.wiki.ti.com/index.php/*_Hardware_Setup>`_
+
+6. Power ON the EVM. The EVM now boots with U-Boot image on the NOR flash.
+
+AEMIF NAND Flash programming instructions
+-----------------------------------------
+
+U-Boot image can be flashed to first 1024KB of the NAND flash using following
+instructions:
+
+1. Start CCS and run U-Boot as described above.
+2. Suspend Target. Select Run -> Suspend from top level menu
+   CortexA15_1 (Free Running)"
+3. Load MLO binary from build folder on to DDR address 0x87000000
+   through CCS as described in step 2 of "Load and Run U-Boot on K2HK EVM
+   using CCS", but using address 0x87000000.
+4. Free Run the target as described earlier (step 4) to get U-Boot prompt
+5. At the U-Boot console type following to setup U-Boot environment variables.
+
+.. prompt:: bash =>
+
+   setenv filesize <size in hex of MLO rounded to hex 0x10000>
+   run burn_uboot_nand
+
+Once U-Boot prompt is available, Power OFF the EVM. Set the SW1 dip switch to
+"ARM NAND Boot mode" as per instruction at
+
+        `<http://processors.wiki.ti.com/index.php/>`_
+
+under Hardware Setup
+
+6. Power ON the EVM. The EVM now boots with U-Boot image on the NAND flash.
+
+Load and Run U-Boot on keystone EVMs using UART download
+--------------------------------------------------------
+
+Open BMC and regular UART terminals.
+
+1. On the regular UART port start xmodem transfer of the u-boot.bin
+2. Using BMC terminal set the ARM-UART bootmode and reboot the EVM
+
+.. prompt:: bash BMC>
+
+  bootmode #4
+  reboot
+
+3. When xmodem is complete you should see the U-Boot starts on the UART port
+
+Load and Run U-Boot on K2G EVMs using MMC
+-----------------------------------------
+
+Open BMC and regular UART terminals.
+
+1. Set the SW3 dip switch to "ARM MMC Boot mode" as per instruction at
+
+        `<http://processors.wiki.ti.com/index.php/66AK2G02_GP_EVM_Hardware_Setup>`_
+
+2. Create SD card partitions as per steps given in Hardware Setup Guide.
+3. Copy MLO to Boot Partition.
+4. Insert SD card and Power on the EVM.
+   The EVM now boots with U-Boot image from SD card.
+
+Secure Boot
+-----------
+
+.. include:: am335x_evm.rst
+   :start-after: .. secure_boot_include_start_config_ti_secure_device
+   :end-before: .. secure_boot_include_end_config_ti_secure_device
+
+.. include:: am335x_evm.rst
+   :start-after: .. secure_boot_include_start_spl_boot
+   :end-before: .. secure_boot_include_end_spl_boot
+
+<IMAGE_FLAG> is currently ignored and reserved for future use.
+
+<INPUT_FILE> is the full path and filename of the public world boot
+loader binary file (only u-boot.bin is currently supported on
+Keystone2 devices, u-boot-spl.bin is not currently supported).
+
+<OUTPUT_FILE> is the full path and filename of the final secure image.
+The output binary images should be used in place of the standard
+non-secure binary images (see the platform-specific user's guides
+and releases notes for how the non-secure images are typically used)
+
+.. list-table::
+   :widths: 10 20
+   :header-rows: 0
+
+   * - u-boot_HS_MLO
+     - signed and encrypted boot image that can be used to
+       boot from all media. Secure boot from SPI NOR flash is not
+       currently supported.
+
+.. include:: am335x_evm.rst
+   :start-after: .. secure_boot_include_start_primary_u_boot
+   :end-before: .. secure_boot_include_end_primary_u_boot
diff --git a/doc/board/toradex/apalis-imx8.rst b/doc/board/toradex/apalis-imx8.rst
new file mode 100644
index 00000000000..069d86ccd8c
--- /dev/null
+++ b/doc/board/toradex/apalis-imx8.rst
@@ -0,0 +1,94 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+.. sectionauthor:: Marcel Ziswiler <marcel.ziswiler@toradex.com>
+
+Apalis iMX8 Module
+==================
+
+- SoM: https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8
+- Carrier board: https://www.toradex.com/products/carrier-board/apalis-evaluation-board
+
+Quick Start
+-----------
+
+- Build the ARM trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Build U-Boot
+- Load U-Boot binary using uuu
+- Flash U-Boot binary into the eMMC
+- Boot
+
+Get and Build the ARM Trusted Firmware
+--------------------------------------
+
+Download the imx-atf repository:
+
+.. code-block:: bash
+
+    $ git clone -b lf_v2.6 https://github.com/nxp-imx/imx-atf.git
+
+Compile it with an aarch64 toolchain:
+
+.. code-block:: bash
+
+    $ cd imx-atf/
+    $ make PLAT=imx8qm bl31
+
+Get scfw_tcm.bin and ahab-container.img
+---------------------------------------
+
+Download imx-seco firmware and extract it:
+
+.. code-block:: bash
+
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-5.8.7.bin
+    $ sh imx-seco-5.8.7.bin --auto-accept
+
+Copy the following binaries to the U-Boot folder:
+
+.. code-block:: bash
+
+    $ wget https://github.com/toradex/i.MX-System-Controller-Firmware/raw/master/src/scfw_export_mx8qm_b0/build_mx8qm_b0/mx8qm-apalis-scfw-tcm.bin
+    $ cp ../imx-atf/build/imx8qm/release/bl31.bin .
+    $ cp ../imx-seco-5.8.7/firmware/seco/mx8qmb0-ahab-container.img mx8qm-ahab-container.img
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ make apalis-imx8_defconfig
+    $ make u-boot-dtb.imx
+
+Load the U-Boot Binary Using UUU
+--------------------------------
+
+Get the latest version of the universal update utility (uuu) aka ``mfgtools 3.0``:
+
+https://github.com/nxp-imx/mfgtools/releases
+
+Put the module into USB recovery aka serial downloader mode, connect the USB
+device to your host and execute ``uuu``:
+
+.. code-block:: bash
+
+    sudo ./uuu u-boot/u-boot-dtb.imx
+
+Flash the U-Boot Binary into the eMMC
+-------------------------------------
+
+Burn the ``u-boot-dtb.imx`` binary to the primary eMMC hardware boot area
+partition and boot:
+
+.. code-block:: bash
+
+    load mmc 1:1 $loadaddr u-boot-dtb.imx
+    setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    mmc dev 0 1
+    mmc write ${loadaddr} 0x0 ${blkcnt}
+
+As a convenience, instead of the last three commands, one may also use the
+update U-Boot wrapper:
+
+.. code-block:: bash
+
+    > run update_uboot
diff --git a/doc/board/toradex/colibri-imx8x.rst b/doc/board/toradex/colibri-imx8x.rst
new file mode 100644
index 00000000000..378b259abd0
--- /dev/null
+++ b/doc/board/toradex/colibri-imx8x.rst
@@ -0,0 +1,93 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+.. sectionauthor:: Marcel Ziswiler <marcel.ziswiler@toradex.com>
+
+Colibri iMX8X Module
+====================
+
+- SoM: https://www.toradex.com/computer-on-modules/colibri-arm-family/nxp-imx-8x
+- Carrier board: https://www.toradex.com/products/carrier-board/colibri-evaluation-board
+
+Quick Start
+-----------
+
+- Build the ARM trusted firmware binary
+- Get scfw_tcm.bin and ahab-container.img
+- Build U-Boot
+- Load U-Boot binary using uuu
+- Flash U-Boot binary into the eMMC
+- Boot
+
+Get and Build the ARM Trusted Firmware
+--------------------------------------
+
+Download the imx-atf repository:
+
+.. code-block:: bash
+
+    $ git clone -b lf_v2.6 https://github.com/nxp-imx/imx-atf.git
+
+Compile it with an aarch64 toolchain:
+
+.. code-block:: bash
+
+    $ make PLAT=imx8qx bl31 -C imx-atf
+
+Get scfw_tcm.bin and ahab-container.img
+---------------------------------------
+
+Download imx-seco firmware and extract it:
+
+.. code-block:: bash
+
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/imx-seco-5.8.7.bin
+    $ sh imx-seco-5.8.7.bin --auto-accept
+
+Copy the following firmware to the U-Boot folder:
+
+.. code-block:: bash
+
+    $ wget https://github.com/toradex/i.MX-System-Controller-Firmware/raw/master/src/scfw_export_mx8qx_b0/build_mx8qx_b0/mx8qx-colibri-scfw-tcm.bin
+    $ cp ../imx-atf/build/imx8qx/release/bl31.bin .
+    $ cp ../imx-seco-5.8.7/firmware/seco/mx8qxc0-ahab-container.img mx8qx-ahab-container.img
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ make colibri-imx8x_defconfig
+   $ make u-boot-dtb.imx
+
+Load the U-Boot Binary Using UUU
+--------------------------------
+
+Get the latest version of the universal update utility (uuu) aka ``mfgtools 3.0``:
+
+https://github.com/nxp-imx/mfgtools/releases
+
+Put the module into USB recovery aka serial downloader mode, connect the USB
+device to your host and execute ``uuu``:
+
+.. code-block:: bash
+
+    sudo ./uuu u-boot/u-boot-dtb.imx
+
+Flash the U-Boot Binary into the eMMC
+-------------------------------------
+
+Burn the ``u-boot-dtb.imx`` binary to the primary eMMC hardware boot area
+partition and boot:
+
+.. code-block:: bash
+
+    load mmc 1:1 $loadaddr u-boot-dtb.imx
+    setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    mmc dev 0 1
+    mmc write ${loadaddr} 0x0 ${blkcnt}
+
+As a convenience, instead of the last three commands, one may also use the
+update U-Boot wrapper:
+
+.. code-block:: bash
+
+    > run update_uboot
diff --git a/doc/board/toradex/colibri_imx7.rst b/doc/board/toradex/colibri_imx7.rst
new file mode 100644
index 00000000000..6532878932c
--- /dev/null
+++ b/doc/board/toradex/colibri_imx7.rst
@@ -0,0 +1,128 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+.. sectionauthor:: Igor Opaniuk <igor.opaniuk@toradex.com>
+
+Colibri iMX7 Modules
+====================
+
+- SoM: https://www.toradex.com/computer-on-modules/colibri-arm-family/nxp-freescale-imx7
+- Carrier board: https://www.toradex.com/products/carrier-board/colibri-evaluation-board
+
+Quick Start
+-----------
+
+- Build U-Boot
+- NAND IMX image adjustments before flashing
+- Flashing manually U-Boot to eMMC
+- Flashing manually U-Boot to NAND
+- Using ``update_uboot`` script
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ make colibri_imx7_emmc_defconfig # For NAND: colibri_imx7_defconfig
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb.imx`` IMX
+specific image, ready for flashing (but check next section for additional
+adjustments).
+
+The final IMX program image includes (section ``6.6.7`` from `IMX7DRM
+<https://www.nxp.com/webapp/Download?colCode=IMX7DRM>`_):
+
+* **Image vector table** (IVT) for BootROM
+* **Boot data** -indicates the program image location, program image size
+  in bytes, and the plugin flag.
+* **Device configuration data**
+* **User image**: U-Boot image (``u-boot-dtb.bin``)
+
+IMX image adjustments prior to flashing
+---------------------------------------
+
+1. U-Boot for both Colibri iMX7 NAND and eMMC versions
+is built with HABv4 support (`AN4581.pdf
+<https://www.nxp.com/docs/en/application-note/AN4581.pdf>`_)
+enabled by default, which requires generating a proper
+Command Sequence File (CSF) by srktool from NXP (not included in the
+U-Boot tree, check additional details in introduction_habv4.txt)
+and concatenate it to the final ``u-boot-dtb.imx``.
+
+2. In case you don't want to generate a proper ``CSF`` (for any reason),
+you still need to pad the IMX image so it has the same size as specified in
+the **Boot Data** section of the IMX image.
+To obtain this value, run:
+
+.. code-block:: bash
+
+    $ od -X -N 0x30 u-boot-dtb.imx
+    0000000    402000d1 87800000 00000000 877ff42c
+    0000020    877ff420 877ff400 878a5000 00000000
+                        ^^^^^^^^
+    0000040    877ff000 000a8060 00000000 40b401d2
+               ^^^^^^^^ ^^^^^^^^
+
+Where:
+
+* ``877ff400`` - IVT self address
+* ``877ff000`` - Program image address
+* ``000a8060`` - Program image size
+
+To calculate the padding:
+
+* IVT offset = ``0x877ff400`` - ``0x877ff000`` = ``0x400``
+* Program image size = ``0xa8060`` - ``0x400`` = ``0xa7c60``
+
+and then pad the image:
+
+.. code-block:: bash
+
+    $ objcopy -I binary -O binary --pad-to 0xa7c60 --gap-fill=0x00 \
+        u-boot-dtb.imx u-boot-dtb.imx.zero-padded
+
+3. Also, according to the requirement from ``6.6.7.1``, the final image
+should have ``0x400`` offset for the initial IVT table.
+
+For eMMC setup we handle this by flashing it to ``0x400``, however
+for NAND setup we adjust the image prior to flashing, adding padding at the
+beginning of the image.
+
+.. code-block:: bash
+
+    $ dd if=u-boot-dtb.imx.zero-padded of=u-boot-dtb.imx.ready bs=1024 seek=1
+
+Flash U-Boot IMX image to eMMC
+------------------------------
+
+Flash the ``u-boot-dtb.imx.zero-padded`` binary to the primary eMMC hardware
+boot area partition:
+
+.. code-block:: bash
+
+    => load mmc 1:1 $loadaddr u-boot-dtb.imx.zero-padded
+    => setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    => mmc dev 0 1
+    => mmc write ${loadaddr} 0x2 ${blkcnt}
+
+Flash U-Boot IMX image to NAND
+------------------------------
+
+.. code-block:: bash
+
+    => load mmc 1:1 $loadaddr u-boot-dtb.imx.ready
+    => nand erase.part u-boot1
+    => nand write ${loadaddr} u-boot1 ${filesize}
+    => nand erase.part u-boot2
+    => nand write ${loadaddr} u-boot2 ${filesize}
+
+Using update_uboot script
+-------------------------
+
+You can also use U-Boot env update_uboot script,
+which wraps all eMMC/NAND specific command invocations:
+
+.. code-block:: bash
+
+    => load mmc 1:1 $loadaddr u-boot-dtb.imx.ready
+    => run update_uboot
diff --git a/doc/board/toradex/index.rst b/doc/board/toradex/index.rst
new file mode 100644
index 00000000000..89fbdcbb9e9
--- /dev/null
+++ b/doc/board/toradex/index.rst
@@ -0,0 +1,14 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Toradex
+=======
+
+.. toctree::
+   :maxdepth: 2
+
+   apalis-imx8
+   colibri_imx7
+   colibri-imx8x
+   verdin-am62
+   verdin-imx8mm
+   verdin-imx8mp
diff --git a/doc/board/toradex/verdin-am62.rst b/doc/board/toradex/verdin-am62.rst
new file mode 100644
index 00000000000..e8d90273288
--- /dev/null
+++ b/doc/board/toradex/verdin-am62.rst
@@ -0,0 +1,147 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+.. sectionauthor:: Marcel Ziswiler <marcel.ziswiler@toradex.com>
+
+Verdin AM62 Module
+==================
+
+- SoM: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
+- Carrier board: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
+
+Quick Start
+-----------
+
+- Get the binary-only SYSFW
+- Get binary-only TI Linux firmware
+- Build the ARM trusted firmware binary
+- Build the OPTEE binary
+- Build U-Boot for the R5
+- Build U-Boot for the A53
+- Flash to eMMC
+- Boot
+
+For an overview of the TI AM62 SoC boot flow please head over to:
+:doc:`../ti/am62x_sk`
+
+Sources:
+--------
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_boot_sources
+    :end-before: .. k3_rst_include_end_boot_sources
+
+Build procedure:
+----------------
+
+0. Setup the environment variables:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_desc
+    :end-before: .. k3_rst_include_end_common_env_vars_desc
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_board_env_vars_desc
+    :end-before: .. k3_rst_include_end_board_env_vars_desc
+
+Set the variables corresponding to this platform:
+
+.. include::  ../ti/k3.rst
+    :start-after: .. k3_rst_include_start_common_env_vars_defn
+    :end-before: .. k3_rst_include_end_common_env_vars_defn
+.. code-block:: bash
+
+ $ export UBOOT_CFG_CORTEXR=verdin-am62_r5_defconfig
+ $ export UBOOT_CFG_CORTEXA=verdin-am62_a53_defconfig
+ $ export TFA_BOARD=lite
+ $ # we don't use any extra TFA parameters
+ $ unset TFA_EXTRA_ARGS
+ $ export OPTEE_PLATFORM=k3-am62x
+ $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
+
+.. include::  ../ti/am62x_sk.rst
+    :start-after: .. am62x_evm_rst_include_start_build_steps
+    :end-before: .. am62x_evm_rst_include_end_build_steps
+
+Flash to eMMC
+-------------
+
+.. code-block:: bash
+
+    => mmc dev 0 1
+    => fatload mmc 1 ${loadaddr} tiboot3.bin
+    => mmc write ${loadaddr} 0x0 0x400
+    => fatload mmc 1 ${loadaddr} tispl.bin
+    => mmc write ${loadaddr} 0x400 0x1000
+    => fatload mmc 1 ${loadaddr} u-boot.img
+    => mmc write ${loadaddr} 0x1400 0x2000
+
+As a convenience, instead of having to remember all those addresses and sizes,
+one may also use the update U-Boot wrappers:
+
+.. code-block:: bash
+
+    > tftpboot ${loadaddr} tiboot3-am62x-gp-verdin.bin
+    > run update_tiboot3
+
+    > tftpboot ${loadaddr} tispl.bin
+    > run update_tispl
+
+    > tftpboot ${loadaddr} u-boot.img
+    > run update_uboot
+
+Boot
+----
+
+Output::
+
+  U-Boot SPL 2023.10-rc1-00210-gb678170a34c (Aug 03 2023 - 00:09:14 +0200)
+  SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.1--v09.00.01 (Kool Koala)')
+  SPL initial stack usage: 13368 bytes
+  Trying to boot from MMC1
+  Authentication passed
+  Authentication passed
+  Authentication passed
+  Authentication passed
+  Authentication passed
+  Starting ATF on ARM64 core...
+
+  NOTICE:  BL31: v2.9(release):v2.9.0-73-g463655cc8
+  NOTICE:  BL31: Built : 14:51:42, Jun  5 2023
+  I/TC:
+  I/TC: OP-TEE version: 3.21.0-168-g322cf9e33 (gcc version 12.2.1 20221205 (Arm GNU Toolchain 12.2.Rel1 (Build arm-12.24))) #2 Mon Jun  5 13:04:15 UTC 2023 aarch64
+  I/TC: WARNING: This OP-TEE configuration might be insecure!
+  I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
+  I/TC: Primary CPU initializing
+  I/TC: SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.1--v09.00.01 (Kool Koala)')
+  I/TC: HUK Initialized
+  I/TC: Primary CPU switching to normal world boot
+
+  U-Boot SPL 2023.10-rc1-00210-gb678170a34c (Aug 03 2023 - 00:09:41 +0200)
+  SYSFW ABI: 3.1 (firmware rev 0x0009 '9.0.1--v09.00.01 (Kool Koala)')
+  SPL initial stack usage: 1840 bytes
+  Trying to boot from MMC1
+  Authentication passed
+  Authentication passed
+
+
+  U-Boot 2023.10-rc1-00210-gb678170a34c (Aug 03 2023 - 00:09:41 +0200)
+
+  SoC:   AM62X SR1.0 HS-FS
+  DRAM:  2 GiB
+  Core:  136 devices, 28 uclasses, devicetree: separate
+  MMC:   mmc@fa10000: 0, mmc@fa00000: 1
+  Loading Environment from MMC... OK
+  In:    serial@2800000
+  Out:   serial@2800000
+  Err:   serial@2800000
+  Model: Toradex 0076 Verdin AM62 Quad 2GB WB IT V1.0A
+  Serial#: 15037380
+  Carrier: Toradex Verdin Development Board V1.1A, Serial# 10754333
+  am65_cpsw_nuss ethernet@8000000: K3 CPSW: nuss_ver: 0x6BA01103 cpsw_ver: 0x6BA81103 ale_ver: 0x00290105 Ports:2 mdio_freq:1000000
+  Setting variant to wifi
+  Net:
+  Warning: ethernet@8000000port@1 MAC addresses don't match:
+  Address in ROM is		1c:63:49:22:5f:f9
+  Address in environment is	00:14:2d:e5:73:c4
+  eth0: ethernet@8000000port@1 [PRIME], eth1: ethernet@8000000port@2
+  Hit any key to stop autoboot:  0
+  Verdin AM62 #
diff --git a/doc/board/toradex/verdin-imx8mm.rst b/doc/board/toradex/verdin-imx8mm.rst
new file mode 100644
index 00000000000..6e150e9aec7
--- /dev/null
+++ b/doc/board/toradex/verdin-imx8mm.rst
@@ -0,0 +1,108 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+.. sectionauthor:: Marcel Ziswiler <marcel.ziswiler@toradex.com>
+
+Verdin iMX8M Mini Module
+========================
+
+- SoM: https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-mini-nano
+- Carrier board: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
+
+Quick Start
+-----------
+
+- Build the ARM trusted firmware binary
+- Get the DDR firmware
+- Build U-Boot
+- Flash to eMMC
+- Boot
+
+Get and Build the ARM Trusted Firmware (Trusted Firmware A)
+-----------------------------------------------------------
+
+.. code-block:: bash
+
+    $ echo "Downloading and building TF-A..."
+    $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+    $ cd trusted-firmware-a
+
+Then build ATF (TF-A):
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-linux-gnu-
+    $ make PLAT=imx8mm IMX_BOOT_UART_BASE=0x30860000 bl31
+    $ cp build/imx8mm/release/bl31.bin ../
+
+Get the DDR Firmware
+--------------------
+
+.. code-block:: bash
+
+    $ cd ..
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.10.1.bin
+    $ chmod +x firmware-imx-8.10.1.bin
+    $ ./firmware-imx-8.10.1.bin
+    $ cp firmware-imx-8.10.1/firmware/ddr/synopsys/lpddr4*.bin ./
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-linux-gnu-
+    $ make verdin-imx8mm_defconfig
+    $ make
+
+Flash to eMMC
+-------------
+
+.. code-block:: bash
+
+    > tftpboot ${loadaddr} flash.bin
+    > setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    > mmc dev 0 1 && mmc write ${loadaddr} 0x2 ${blkcnt}
+
+As a convenience, instead of the last two commands, one may also use the update
+U-Boot wrapper:
+
+.. code-block:: bash
+
+    > run update_uboot
+
+Boot
+----
+
+ATF, U-Boot proper and u-boot.dtb images are packed into a FIT image,
+which is loaded and parsed by SPL.
+
+Boot sequence is:
+
+* SPL ---> ATF (TF-A) ---> U-Boot proper
+
+Output::
+
+  U-Boot SPL 2021.10-rc2-00028-gee010ba1129 (Aug 23 2021 - 16:56:02 +0200)
+  Normal Boot
+  WDT:   Started with servicing (60s timeout)
+  Trying to boot from MMC1
+  NOTICE:  BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b
+  NOTICE:  BL31: Built : 18:02:12, Aug 16 2021
+
+
+  U-Boot 2021.10-rc2-00028-gee010ba1129 (Aug 23 2021 - 16:56:02 +0200)
+
+  CPU:   Freescale i.MX8MMQ rev1.0 at 1200 MHz
+  Reset cause: POR
+  DRAM:  2 GiB
+  WDT:   Started with servicing (60s timeout)
+  MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
+  Loading Environment from MMC... OK
+  In:    serial
+  Out:   serial
+  Err:   serial
+  Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.1A, Serial# 06760554
+  Carrier: Toradex Verdin Development Board V1.1A, Serial# 10754333
+  Setting variant to wifi
+  Net:   eth0: ethernet@30be0000
+  Hit any key to stop autoboot:  0
+  Verdin iMX8MM #
diff --git a/doc/board/toradex/verdin-imx8mp.rst b/doc/board/toradex/verdin-imx8mp.rst
new file mode 100644
index 00000000000..9ee605f64d5
--- /dev/null
+++ b/doc/board/toradex/verdin-imx8mp.rst
@@ -0,0 +1,114 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+.. sectionauthor:: Marcel Ziswiler <marcel.ziswiler@toradex.com>
+
+Verdin iMX8M Plus Module
+========================
+
+- SoM: https://www.toradex.com/computer-on-modules/verdin-arm-family/nxp-imx-8m-plus
+- Carrier board: https://www.toradex.com/products/carrier-board/verdin-development-board-kit
+
+Quick Start
+-----------
+
+- Build the ARM trusted firmware binary
+- Get the DDR firmware
+- Build U-Boot
+- Flash to eMMC
+- Boot
+
+Get and Build the ARM Trusted Firmware (Trusted Firmware A)
+-----------------------------------------------------------
+
+.. code-block:: bash
+
+    $ echo "Downloading and building TF-A..."
+    $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+    $ cd trusted-firmware-a
+
+Then build ATF (TF-A):
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-linux-gnu-
+    $ make PLAT=imx8mp IMX_BOOT_UART_BASE=0x30880000 bl31
+    $ cp build/imx8mp/release/bl31.bin ../
+
+Get the DDR Firmware
+--------------------
+
+.. code-block:: bash
+
+    $ cd ..
+    $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.10.1.bin
+    $ chmod +x firmware-imx-8.10.1.bin
+    $ ./firmware-imx-8.10.1.bin
+    $ cp firmware-imx-8.10.1/firmware/ddr/synopsys/lpddr4*_202006.bin ./
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=aarch64-linux-gnu-
+    $ make verdin-imx8mp_defconfig
+    $ make
+
+Flash to eMMC
+-------------
+
+.. code-block:: bash
+
+    > tftpboot ${loadaddr} flash.bin
+    > setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200
+    > mmc dev 2 1 && mmc write ${loadaddr} 0x0 ${blkcnt}
+
+As a convenience, instead of the last two commands, one may also use the update
+U-Boot wrapper:
+
+.. code-block:: bash
+
+    > run update_uboot
+
+Boot
+----
+
+ATF, U-Boot proper and u-boot.dtb images are packed into a FIT image,
+which is loaded and parsed by SPL.
+
+Boot sequence is:
+
+* SPL ---> ATF (TF-A) ---> U-Boot proper
+
+Output::
+
+  U-Boot SPL 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100)
+  Quad die, dual rank failed, attempting dual die, single rank configuration.
+  Normal Boot
+  WDT:   Started watchdog@30280000 with servicing (60s timeout)
+  Trying to boot from BOOTROM
+  Find img info 0x&48025a00, size 872
+  Need continue download 1024
+  Download 779264, Total size 780424
+  NOTICE:  BL31: v2.2(release):rel_imx_5.4.70_2.3.2_rc1-5-g835a8f67b
+  NOTICE:  BL31: Built : 16:52:37, Aug 26 2021
+
+
+  U-Boot 2022.04-rc1-00164-g21a0312611-dirty (Feb 07 2022 - 11:34:04 +0100)
+
+  CPU:   Freescale i.MX8MP[8] rev1.1 at 1200 MHz
+  Reset cause: POR
+  DRAM:  8 GiB
+  Core:  78 devices, 18 uclasses, devicetree: separate
+  WDT:   Started watchdog@30280000 with servicing (60s timeout)
+  MMC:   FSL_SDHC: 1, FSL_SDHC: 2
+  Loading Environment from MMC... OK
+  In:    serial
+  Out:   serial
+  Err:   serial
+  Model: Toradex Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT V1.0B, Serial# 06817281
+  Carrier: Toradex Verdin Development Board V1.1A, Serial# 10807609
+  Setting variant to wifi
+  Net:   Hard-coding pdata->enetaddr
+  eth1: ethernet@30be0000, eth0: ethernet@30bf0000 [PRIME]
+  Hit any key to stop autoboot:  0
+  Verdin iMX8MP #
diff --git a/doc/board/variscite/imx8mn_var_som.rst b/doc/board/variscite/imx8mn_var_som.rst
new file mode 100644
index 00000000000..aca881ea314
--- /dev/null
+++ b/doc/board/variscite/imx8mn_var_som.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx8mn_var_som
+==============
+
+U-Boot for the Variscite VAR-SOM-MX8MN Symphony evaluation board
+
+Quick Start
+-----------
+
+- Build the ARM Trusted firmware binary
+- Get firmware-imx package
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://github.com/ARM-software/arm-trusted-firmware
+tag: v2.5
+
+.. code-block:: bash
+
+   $ make PLAT=imx8mn IMX_BOOT_UART_BASE=0x30a60000 bl31
+   $ cp build/imx8mn/release/bl31.bin $(srctree)
+
+Get the ddr firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin
+   $ chmod +x firmware-imx-8.9.bin
+   $ ./firmware-imx-8.9
+   $ cp firmware-imx-8.9/firmware/ddr/synopsys/ddr4*.bin $(srctree)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-linux-gnu-
+   $ make imx8mn_var_som_defconfig
+   $ make
+
+Burn the flash.bin to MicroSD card offset 32KB:
+
+.. code-block:: bash
+
+   $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
+
+Boot
+----
+
+Set Boot switch to SD boot
diff --git a/doc/board/variscite/imx93_var_som.rst b/doc/board/variscite/imx93_var_som.rst
new file mode 100644
index 00000000000..02309f2ad87
--- /dev/null
+++ b/doc/board/variscite/imx93_var_som.rst
@@ -0,0 +1,68 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+imx93_var_som
+=============
+
+U-Boot for the Variscite VAR-SOM-MX93 Symphony evaluation board
+
+Quick Start
+-----------
+
+- Get and Build the ARM Trusted firmware
+- Get the DDR firmware
+- Get ahab-container.img
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+--------------------------------------
+
+Note: srctree is U-Boot source directory
+Get ATF from: https://github.com/nxp-imx/imx-atf/
+branch: lf_v2.8
+
+.. code-block:: bash
+
+   $ unset LDFLAGS
+   $ make PLAT=imx93 bl31
+   $ cp build/imx93/release/bl31.bin $(srctree)
+
+Get the DDR firmware
+--------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin
+   $ chmod +x firmware-imx-8.21.bin
+   $ ./firmware-imx-8.21.bin
+   $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
+
+Get ahab-container.img
+----------------------
+
+.. code-block:: bash
+
+   $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.11.bin
+   $ chmod +x firmware-sentinel-0.11.bin
+   $ ./firmware-sentinel-0.11.bin
+   $ cp firmware-sentinel-0.11/mx93a1-ahab-container.img $(srctree)
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+   $ export CROSS_COMPILE=aarch64-poky-linux-
+   $ make imx93_var_som_defconfig
+   $ make
+
+Burn the flash.bin to MicroSD card offset 32KB:
+
+.. code-block:: bash
+
+   $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc
+
+Boot
+----
+
+Set Boot switch to SD boot
diff --git a/doc/board/variscite/index.rst b/doc/board/variscite/index.rst
new file mode 100644
index 00000000000..f84ebe7eb62
--- /dev/null
+++ b/doc/board/variscite/index.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Variscite
+=========
+
+.. toctree::
+   :maxdepth: 2
+
+   imx8mn_var_som
+   imx93_var_som
diff --git a/doc/board/wexler/index.rst b/doc/board/wexler/index.rst
new file mode 100644
index 00000000000..308aad79e19
--- /dev/null
+++ b/doc/board/wexler/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+WEXLER
+======
+
+.. toctree::
+   :maxdepth: 2
+
+   qc750
diff --git a/doc/board/wexler/qc750.rst b/doc/board/wexler/qc750.rst
new file mode 100644
index 00000000000..b61e40176b0
--- /dev/null
+++ b/doc/board/wexler/qc750.rst
@@ -0,0 +1,125 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot for the WEXLER QC750 tablet
+==================================
+
+``DISCLAMER!`` Moving your WEXLER QC750 to use U-Boot assumes replacement
+of the vendor bootloader. Vendor Android firmwares will no longer be able
+to run on the device. This replacement IS reversible.
+
+Quick Start
+-----------
+
+- Build U-Boot
+- Process U-Boot
+- Flashing U-Boot into the eMMC
+- Boot
+- Self Upgrading
+
+Build U-Boot
+------------
+
+.. code-block:: bash
+
+    $ export CROSS_COMPILE=arm-linux-gnueabi-
+    $ make qc750_defconfig
+    $ make
+
+After the build succeeds, you will obtain the final ``u-boot-dtb-tegra.bin``
+image, ready for further processing.
+
+Process U-Boot
+--------------
+
+``DISCLAMER!`` All questions related to the re-crypt work should be asked
+in re-crypt repo issues. NOT HERE!
+
+re-crypt is a tool that processes the ``u-boot-dtb-tegra.bin`` binary into form
+usable by device. This process is required only on the first installation or
+to recover the device in case of a failed update.
+
+Permanent installation can be performed either by using the tegrarcm or by
+pre-loading just built U-Boot into RAM.
+
+Processing for the NV3P protocol
+********************************
+
+.. code-block:: bash
+
+    $ git clone https://gitlab.com/grate-driver/re-crypt.git
+    $ cd re-crypt # place your u-boot-dtb-tegra.bin here
+    $ ./re-crypt.py --dev qc750
+
+The script will produce a ``repart-block.bin`` ready to flash.
+
+Processing for pre-loaded U-Boot
+********************************
+
+The procedure is the same, but the ``--split`` argument is used with the
+``re-crypt.py``. The script will produce ``bct.img`` and ``ebt.img`` ready
+to flash.
+
+Flashing U-Boot into the eMMC
+-----------------------------
+
+``DISCLAMER!`` All questions related to tegrarcm should be asked in the proper
+place. NOT HERE! Flashing U-Boot will erase all eMMC, so make a backup before!
+
+Permanent installation can be performed either by using the nv3p protocol or by
+pre-loading just built U-Boot into RAM.
+
+Flashing with the NV3P protocol
+*******************************
+
+Nv3p is a custom Nvidia protocol used to recover bricked devices. Devices can
+enter it either by using ``wheelie`` with the correct ``blob.bin`` file or by
+pre-loading vendor bootloader with the Fusée Gelée.
+
+With nv3p, ``repart-block.bin`` is used. It contains BCT and a bootloader in
+encrypted state in form, which can just be written RAW at the start of eMMC.
+
+.. code-block:: bash
+
+    $ wheelie --bct qc750.bct --bl bootloader.bin
+    $ nvflash --resume --rawdevicewrite 0 1024 repart-block.bin
+
+When flashing is done, reboot the device.
+
+Flashing with a pre-loaded U-Boot
+*********************************
+
+U-Boot pre-loaded into RAM acts the same as when it was booted "cold". Currently
+U-Boot supports bootmenu entry fastboot, which allows to write a processed copy
+of U-Boot permanently into eMMC.
+
+While pre-loading U-Boot, hold the ``volume down`` button which will trigger
+the bootmenu. There, select ``fastboot`` using the volume and power buttons.
+After, on host PC, do:
+
+.. code-block:: bash
+
+    $ fastboot flash 0.1 bct.img
+    $ fastboot flash 0.2 ebt.img
+    $ fastboot reboot
+
+Device will reboot.
+
+Boot
+----
+
+To boot Linux, U-Boot will look for an ``extlinux.conf`` on MicroSD and then on
+eMMC. Additionally, if the Volume Down button is pressed while booting, the
+device will enter bootmenu. Bootmenu contains entries to mount MicroSD and eMMC
+as mass storage, fastboot, reboot, reboot RCM, poweroff, enter U-Boot console
+and update bootloader (check the next chapter).
+
+Flashing ``repart-block.bin`` eliminates vendor restrictions on eMMC and allows
+the user to use/partition it in any way the user desires.
+
+Self Upgrading
+--------------
+
+Place your ``u-boot-dtb-tegra.bin`` on the first partition of the MicroSD card
+and insert it into the tablet. Enter bootmenu, choose update the bootloader
+option with the Power button and U-Boot should update itself. Once the process
+is completed, U-Boot will ask to press any button to reboot.
diff --git a/doc/board/xen/index.rst b/doc/board/xen/index.rst
new file mode 100644
index 00000000000..e58fe9e3512
--- /dev/null
+++ b/doc/board/xen/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+XenGuestARM64
+=============
+
+.. toctree::
+   :maxdepth: 2
+
+   xenguest_arm64
diff --git a/doc/board/xen/xenguest_arm64.rst b/doc/board/xen/xenguest_arm64.rst
new file mode 100644
index 00000000000..92be9d43769
--- /dev/null
+++ b/doc/board/xen/xenguest_arm64.rst
@@ -0,0 +1,83 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Xen guest ARM64 board
+=====================
+
+This board specification
+------------------------
+
+This board is to be run as a virtual Xen [1] guest with U-Boot as its primary
+bootloader. Xen is a type 1 hypervisor that allows multiple operating systems
+to run simultaneously on a single physical server. Xen is capable of running
+virtual machines in both full virtualization and para-virtualization (PV)
+modes. Xen runs virtual machines, which are called “domains”.
+
+Paravirtualized drivers are a special type of device drivers that are used in
+a guest system in the Xen domain and perform I/O operations using a special
+interface provided by the virtualization system and the host system.
+
+Xen support for U-Boot is implemented by introducing a new Xen guest ARM64
+board and porting essential drivers from MiniOS [3] as well as some of the work
+previously done by NXP [4]:
+
+- PV block device frontend driver with XenStore based device enumeration and
+  UCLASS_PVBLOCK class;
+- PV serial console device frontend driver;
+- Virtio block device support;
+- Xen hypervisor support with minimal set of the essential headers adapted from
+  the Linux kernel;
+- Xen grant table support;
+- Xen event channel support in polling mode;
+- XenBus support;
+- dynamic RAM size as defined in the device tree instead of the statically
+  defined values;
+- position-independent pre-relocation code is used as we cannot statically
+  define any start addresses at compile time which is up to Xen to choose at
+  run-time;
+- new defconfig introduced: xenguest_arm64_defconfig.
+- new defconfig introduced: xenguest_arm64_virtio_defconfig.
+
+
+Board limitations
+-----------------
+
+1. U-Boot runs without MMU enabled at the early stages.
+   According to Xen on ARM ABI (xen/include/public/arch-arm.h): all memory
+   which is shared with other entities in the system (including the hypervisor
+   and other guests) must reside in memory which is mapped as Normal Inner
+   Write-Back Outer Write-Back Inner-Shareable.
+   Thus, page attributes must be equally set for all the entities working with
+   that page.
+   Before MMU is set up the data cache is turned off and pages are seen by the
+   vCPU and Xen in different ways - cacheable by Xen and non-cacheable by vCPU.
+   So it means that manual data cache maintenance is required at the early
+   stages.
+
+2. No serial console until MMU is up.
+   Because data cache maintenance is required until the MMU setup the
+   early/debug serial console is not implemented. Therefore, we do not have
+   usual prints like U-Boot’s banner etc. until the serial driver is
+   initialized.
+
+3. Single RAM bank supported.
+   If a Xen guest is given much memory it is possible that Xen allocates two
+   memory banks for it. The first one is allocated under 4GB address space and
+   in some cases may represent the whole guest’s memory. It is assumed that
+   U-Boot most likely won’t require high memory bank for its work andlaunching
+   OS, so it is enough to take the first one.
+
+
+Board default configuration
+---------------------------
+
+One can select the configuration as follows:
+
+ - make xenguest_arm64_defconfig
+
+[1] - https://xenproject.org/
+
+[2] - https://wiki.xenproject.org/wiki/Paravirtualization_(PV)
+
+[3] - https://wiki.xenproject.org/wiki/Mini-OS
+
+[4] - https://source.codeaurora.org/external/imx/uboot-imx/tree/?h=imx_v2018.03_4.14.98_2.0.0_ga
diff --git a/doc/board/xilinx/index.rst b/doc/board/xilinx/index.rst
new file mode 100644
index 00000000000..2e31fe3f3a4
--- /dev/null
+++ b/doc/board/xilinx/index.rst
@@ -0,0 +1,12 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Xilinx
+======
+
+.. toctree::
+   :maxdepth: 2
+
+   xilinx
+   zynq
+   zynqmp
+   zynqmp-r5
diff --git a/doc/board/xilinx/xilinx.rst b/doc/board/xilinx/xilinx.rst
new file mode 100644
index 00000000000..5464625ac12
--- /dev/null
+++ b/doc/board/xilinx/xilinx.rst
@@ -0,0 +1,48 @@
+.. SPDX-License-Identifier: GPL-2.0+
+..  (C) Copyright 2019 Xilinx, Inc.
+
+U-Boot device tree bindings
+---------------------------
+
+All the device tree bindings used in U-Boot are specified in Linux
+kernel. Please refer dt bindings from below specified paths in Linux
+kernel.
+
+* ata
+	- Documentation/devicetree/bindings/ata/ahci-ceva.txt
+* clock
+	- Documentation/devicetree/bindings/clock/xlnx,zynqmp-clk.txt
+* firmware
+	- Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.txt
+* fpga
+	- Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.txt
+* gpio
+	- Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
+	- Documentation/devicetree/bindings/gpio/gpio-zynq.txt
+* i2c
+	- Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml
+	- Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml
+* mmc
+	- Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml
+* net
+	- Documentation/devicetree/bindings/net/macb.txt
+	- Documentation/devicetree/bindings/net/xilinx_axienet.txt
+	- Documentation/devicetree/bindings/net/xilinx_emaclite.txt
+* nvmem
+	- Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
+* power
+	- Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.txt
+* serial
+	- Documentation/devicetree/bindings/serial/cdns,uart.txt
+	- Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
+* spi
+	- Documentation/devicetree/bindings/spi/spi-cadence.txt
+	- Documentation/devicetree/bindings/spi/spi-xilinx.txt
+	- Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.txt
+	- Documentation/devicetree/bindings/spi/spi-zynq-qspi.txt
+* usb
+	- Documentation/devicetree/bindings/usb/dwc3-xilinx.txt
+	- Documentation/devicetree/bindings/usb/dwc3.txt
+	- Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt
+* wdt
+	- Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt
diff --git a/doc/board/xilinx/zynq.rst b/doc/board/xilinx/zynq.rst
new file mode 100644
index 00000000000..76d67bd62ee
--- /dev/null
+++ b/doc/board/xilinx/zynq.rst
@@ -0,0 +1,110 @@
+.. SPDX-License-Identifier: GPL-2.0+
+..  (C) Copyright 2013 Xilinx, Inc.
+
+ZYNQ
+====
+
+About this
+----------
+
+This document describes the information about Xilinx Zynq U-Boot -
+like supported boards, ML status and TODO list.
+
+Zynq boards
+-----------
+
+Xilinx Zynq-7000 All Programmable SoCs enable extensive system level
+differentiation, integration, and flexibility through hardware, software,
+and I/O programmability.
+
+* zc702 (single qspi, gem0, mmc) [1]
+* zc706 (dual parallel qspi, gem0, mmc) [2]
+* zed (single qspi, gem0, mmc) [3]
+* microzed (single qspi, gem0, mmc) [4]
+* zc770
+     - zc770-xm010 (single qspi, gem0, mmc)
+     - zc770-xm011 (8 or 16 bit nand)
+     - zc770-xm012 (nor)
+     - zc770-xm013 (dual parallel qspi, gem1)
+
+Building
+--------
+
+configure and build for zc702 board::
+
+   $ export DEVICE_TREE=zynq-zc702
+   $ make xilinx_zynq_virt_defconfig
+   $ make
+
+Bootmode
+--------
+
+Zynq has a facility to read the bootmode from the slcr bootmode register
+once user is setting through jumpers on the board - see page no:1546 on [5]
+
+All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins
+on [5].
+
+board_late_init() will read the bootmode values using slcr bootmode register
+at runtime and assign the modeboot variable to specific bootmode string which
+is intern used in autoboot.
+
+SLCR bootmode register Bit[3:0] values
+
+.. code-block:: c
+
+   #define ZYNQ_BM_NOR		0x02
+   #define ZYNQ_BM_SD		0x05
+   #define ZYNQ_BM_JTAG		0x0
+
+"modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot"
+bootmode strings at runtime.
+
+Flashing
+--------
+
+SD Card
+^^^^^^^
+
+To write an image that boots from a SD card first create a FAT32 partition
+and a FAT32 filesystem on the SD card::
+
+        sudo fdisk /dev/sdx
+        sudo mkfs.vfat -F 32 /dev/sdx1
+
+Mount the SD card and copy the SPL and U-Boot to the root directory of the
+SD card::
+
+        sudo mount -t vfat /dev/sdx1 /mnt
+        sudo cp spl/boot.bin /mnt
+        sudo cp u-boot.img /mnt
+
+Mainline status
+---------------
+
+- Added basic board configurations support.
+- Added zynq U-Boot bsp code - arch/arm/mach-zynq
+- Added zynq boards named - zc70x, zed, microzed, zc770_xm010/xm011/xm012/xm013
+- Added zynq drivers:
+
+  :serial: drivers/serial/serial_zynq.c
+  :net: drivers/net/zynq_gem.c
+  :mmc: drivers/mmc/zynq_sdhci.c
+  :spi: drivers/spi/zynq_spi.c
+  :qspi: drivers/spi/zynq_qspi.c
+  :i2c: drivers/i2c/zynq_i2c.c
+  :nand: drivers/mtd/nand/raw/zynq_nand.c
+
+- Done proper cleanups on board configurations
+- Added basic FDT support for zynq boards
+- d-cache support for zynq_gem.c
+
+* [1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm
+* [2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
+* [3] http://zedboard.org/product/zedboard
+* [4] http://zedboard.org/product/microzed
+* [5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
+
+
+.. Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
+.. Sun Dec 15 14:52:41 IST 2013
diff --git a/doc/board/xilinx/zynqmp-r5.rst b/doc/board/xilinx/zynqmp-r5.rst
new file mode 100644
index 00000000000..266d07d1193
--- /dev/null
+++ b/doc/board/xilinx/zynqmp-r5.rst
@@ -0,0 +1,137 @@
+.. SPDX-License-Identifier: GPL-2.0
+..  (C) Copyright 2020 Xilinx, Inc.
+
+ZYNQMP-R5
+=========
+
+About this
+----------
+
+This document describes the information about Xilinx Zynq UltraScale+ MPSOC
+U-Boot Cortex R5 support.
+
+ZynqMP R5 boards
+----------------
+
+* zynqmp-r5 - U-Boot running on RPU Cortex-R5
+
+Building
+--------
+
+configure and build armv7 toolchain::
+
+   $ make xilinx_zynqmp_r5_defconfig
+   $ make
+
+Notes
+^^^^^
+
+Output fragment is U-Boot.
+
+Loading
+-------
+
+ZynqMP R5 U-Boot was created for supporting loading OS on RPU. There are two
+ways how to start U-Boot on R5.
+
+Bootgen
+^^^^^^^
+
+The first way is to use Xilinx FSBL (First stage
+bootloader) to load U-Boot and start it. The following bif can be used for boot
+image generation via Xilinx bootgen utility::
+
+
+  the_ROM_image:
+  {
+  	[bootloader,destination_cpu=r5-0] fsbl_rpu.elf
+  	[destination_cpu=r5-0]u-boot.elf
+  }
+
+Bootgen command for building boot.bin::
+
+  bootgen -image <bif>.bif -r -w -o i boot.bin
+
+
+U-Boot cpu command
+^^^^^^^^^^^^^^^^^^
+
+The second way to load U-Boot to Cortex R5 is from U-Boot running on A53 as is
+visible from the following log::
+
+  U-Boot SPL 2020.10-rc4-00090-g801b3d5c5757 (Sep 15 2020 - 14:07:24 +0200)
+  PMUFW:	v1.1
+  Loading new PMUFW cfg obj (2024 bytes)
+  EL Level:	EL3
+  Multiboot:	0
+  Trying to boot from MMC2
+  spl: could not initialize mmc. error: -19
+  Trying to boot from MMC1
+  spl_load_image_fat_os: error reading image u-boot.bin, err - -2
+  NOTICE:  ATF running on XCZU7EG/EV/silicon v4/RTL5.1 at 0xfffea000
+  NOTICE:  BL31: v2.2(release):v2.2-614-ged9dc512fb9c
+  NOTICE:  BL31: Built : 09:32:09, Mar 13 2020
+
+
+  U-Boot 2020.10-rc4-00090-g801b3d5c5757 (Sep 15 2020 - 14:07:24 +0200)
+
+  Model: ZynqMP ZCU104 RevC
+  Board: Xilinx ZynqMP
+  DRAM:  2 GiB
+  PMUFW:	v1.1
+  EL Level:	EL2
+  Chip ID:	zu7e
+  WDT:   Started with servicing (60s timeout)
+  NAND:  0 MiB
+  MMC:   mmc@ff170000: 0
+  Loading Environment from FAT... *** Warning - bad CRC, using default environment
+
+  In:    serial
+  Out:   serial
+  Err:   serial
+  Bootmode: LVL_SHFT_SD_MODE1
+  Reset reason:	SOFT
+  Net:
+  ZYNQ GEM: ff0e0000, mdio bus ff0e0000, phyaddr 12, interface rgmii-id
+  eth0: ethernet@ff0e0000
+  Hit any key to stop autoboot:  0
+  ZynqMP> setenv autoload no
+  ZynqMP> dhcp
+  BOOTP broadcast 1
+  DHCP client bound to address 192.168.0.167 (8 ms)
+  ZynqMP> tftpboot 20000000 192.168.0.105:u-boot-r5-2.elf
+  Using ethernet@ff0e0000 device
+  TFTP from server 192.168.0.105; our IP address is 192.168.0.167
+  Filename 'u-boot-r5-2.elf'.
+  Load address: 0x20000000
+  Loading: #################################################################
+  	 #################################################################
+  	 #################################################################
+  	 #################################################################
+  	 #################################################################
+  	 #################################################################
+  	 ################
+  	 376 KiB/s
+  done
+  Bytes transferred = 2075464 (1fab48 hex)
+  ZynqMP> setenv autostart no
+  ZynqMP> bootelf -p 20000000
+  ZynqMP> cpu 4 release 10000000 lockstep
+  Using TCM jump trampoline for address 0x10000000
+  R5 lockstep mode
+  ZynqMP>
+
+Then on second uart you can see U-Boot up and running on R5::
+
+  U-Boot 2020.10-rc4-00071-g7045622cc9ba (Sep 16 2020 - 13:38:53 +0200)
+
+  Model: Xilinx ZynqMP R5
+  DRAM:  512 MiB
+  MMC:
+  In:    serial@ff010000
+  Out:   serial@ff010000
+  Err:   serial@ff010000
+  Net:   No ethernet found.
+  ZynqMP r5>
+
+Please make sure MIO pins for uart are properly configured to see output.
diff --git a/doc/board/xilinx/zynqmp.rst b/doc/board/xilinx/zynqmp.rst
new file mode 100644
index 00000000000..a035cff1a5b
--- /dev/null
+++ b/doc/board/xilinx/zynqmp.rst
@@ -0,0 +1,115 @@
+.. SPDX-License-Identifier: GPL-2.0
+..  (C) Copyright 2020 Xilinx, Inc.
+
+ZYNQMP
+======
+
+About this
+----------
+
+This document describes the information about Xilinx Zynq UltraScale+ MPSOC
+U-Boot support. Core support is available in arch/arm/mach-zynqmp folder.
+
+ZynqMP boards
+-------------
+
+* zcu100 (ultra96 v1), zcu102, zcu104, zcu106 - Evaluation boards
+* zc1232 - Characterization boards
+* zcu111, zcu208, zcu216 - RFSOC evaluation boards
+* zcu1254, zcu1275, zcu1285 - RFSOC characterization boards
+* a2197 - System Controller on Versal boards
+* mini - Mini U-Boot running out of OCM
+* zc1751 - Characterization Processor boards
+     - zc1751-xm015-dc1
+     - zc1751-xm016-dc2
+     - zc1751-xm017-dc3
+     - zc1751-xm018-dc4
+     - zc1751-xm019-dc5
+
+Building
+--------
+
+Configure and build for zcu102 board::
+
+   $ source arm64 toolchain
+   $ export DEVICE_TREE=zynqmp-zcu102-revA
+   $ make xilinx_zynqmp_virt_defconfig
+   $ make
+
+U-Boot SPL flow
+---------------
+
+For getting U-Boot SPL flow up and running it is necessary to do some additional
+steps because booting device requires external images which are not the part of
+U-Boot repository.
+
+PMU firmware
+^^^^^^^^^^^^
+The Platform Management Unit (PMU) RAM can be loaded with a firmware (PMU
+Firmware) at run-time and can be used to extend or customize the functionality
+of PMU. The PMU firmware is the part of boot image (boot.bin) and it is
+automatically loaded by BootROM. boot.bin can be directly generated by mkimage
+tool as the part of make. If you want to create boot.bin with PMU Firmware
+include please point CONFIG_PMUFW_INIT_FILE to PMU firmware binary. For example:::
+
+  CONFIG_PMUFW_INIT_FILE="<path>/pmu.bin"
+
+If you see below message you need to load PMU Firmware::
+
+  PMUFW is not found - Please load it!
+
+The second external blob is PMU Configuration object which is object which is
+passed from U-Boot SPL to PMU Firmware for initial system configuration. PMU
+configuration object is the part of U-Boot SPL image. For pointing to this
+object please use CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE symbol. For example:::
+
+  CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE="<path>/pmu_obj.bin"
+
+
+PMU configuration object
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+Object can be obtain in several ways. The easiest way is to take pm_cfg_obj.c
+from SDK/Vitis design and build it:::
+
+  $ git clone https://github.com/Xilinx/embeddedsw.git
+  $ export EMBEDDED_SW=$PWD/embeddedsw
+  $ gcc -c pm_cfg_obj.c -I ${EMBEDDED_SW}/lib/bsp/standalone/src/common/ -I ${EMBEDDED_SW}/lib/sw_services/xilpm/src/zynqmp/client/common/
+  $ objcopy -O binary pm_cfg_obj.o pmu_obj.bin
+
+The second way is to use tools/zynqmp_pm_cfg_obj_convert.py. For more
+information about this tool please run it with -h parameter.
+
+The third way is to extract it from Xilinx FSBL elf file. Object is starting at
+XPm_ConfigObject symbol.
+
+
+Arm Trusted Firmware (ATF)
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+U-Boot itself can run from EL3 to EL1. Without ATF U-Boot runs in EL3. Boot flow
+is U-Boot SPL->U-Boot in EL3. When ATF is used U-Boot normally runs in EL2. Boot
+flow is U-Boot SPL->ATF->U-Boot in EL2. As the part of build process u-boot.itb
+is generated. When BL31 shell variable is present u-boot.itb is generated with
+ATF included. You can point to it by:::
+
+  $ export BL31=<path>/bl31.bin
+
+Flashing
+--------
+
+SD Card
+^^^^^^^
+
+To write an image that boots from a SD card first create a FAT32 partition
+and a FAT32 filesystem on the SD card::
+
+        sudo fdisk /dev/sdx
+        sudo mkfs.vfat -F 32 /dev/sdx1
+
+Mount the SD card and copy the SPL and U-Boot to the root directory of the
+SD card::
+
+        sudo mount -t vfat /dev/sdx1 /mnt
+        sudo cp spl/boot.bin /mnt
+        sudo cp u-boot.itb /mnt
diff --git a/doc/bounces b/doc/bounces
new file mode 100644
index 00000000000..d1c5f0d246e
--- /dev/null
+++ b/doc/bounces
@@ -0,0 +1,3 @@
+# List of addresses picked up by patman/get_maintainer.pl that are known to
+# bounce. Addresses are listed one per line and need to match the author
+# information recorded in git.
diff --git a/doc/build/buildman.rst b/doc/build/buildman.rst
new file mode 120000
index 00000000000..beeaa425720
--- /dev/null
+++ b/doc/build/buildman.rst
@@ -0,0 +1 @@
+../../tools/buildman/buildman.rst
\ No newline at end of file
diff --git a/doc/build/clang.rst b/doc/build/clang.rst
new file mode 100644
index 00000000000..09bb988e923
--- /dev/null
+++ b/doc/build/clang.rst
@@ -0,0 +1,110 @@
+Building with Clang
+===================
+
+The biggest problem when trying to compile U-Boot with Clang is that almost all
+archs rely on storing gd in a global register and the Clang 3.5 user manual
+states: "Clang does not support global register variables; this is unlikely to
+be implemented soon because it requires additional LLVM backend support."
+
+The ARM backend can be instructed not to use the r9 and x18 registers using
+-ffixed-r9 or -ffixed-x18 respectively. As global registers themselves are not
+supported inline assembly is needed to get and set the r9 or x18 value. This
+leads to larger code then strictly necessary, but at least works.
+
+Debian based
+------------
+
+Required packages can be installed via apt, e.g.
+
+.. code-block:: bash
+
+    sudo apt-get install clang
+
+We make use of the CROSS_COMPILE variable to derive the build target which is
+passed as the --target parameter to clang.
+
+The CROSS_COMPILE variable further determines the paths to other build
+tools. As assembler we use the binary pointed to by '$(CROSS_COMPILE)as'
+instead of the LLVM integrated assembler (IAS).
+
+Here is an example demonstrating building U-Boot for the Raspberry Pi 2
+using clang:
+
+.. code-block:: bash
+
+    make HOSTCC=clang rpi_2_defconfig
+    make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- CC=clang -j8
+
+It can also be used to compile sandbox:
+
+.. code-block:: bash
+
+    make HOSTCC=clang sandbox_defconfig
+    make HOSTCC=clang CC=clang -j8
+
+
+FreeBSD 11
+----------
+
+Since llvm 3.4 is currently in the base system, the integrated assembler as
+is incapable of building U-Boot. Therefore gas from devel/arm-gnueabi-binutils
+is used instead. It needs a symlink to be picked up correctly though:
+
+.. code-block:: bash
+
+    ln -s /usr/local/bin/arm-gnueabi-freebsd-as /usr/bin/arm-freebsd-eabi-as
+
+The following commands compile U-Boot using the Clang xdev toolchain.
+
+**NOTE:** CROSS_COMPILE and target differ on purpose!
+
+.. code-block:: bash
+
+    export CROSS_COMPILE=arm-gnueabi-freebsd-
+    gmake rpi_2_defconfig
+    gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd" -j8
+
+Given that U-Boot will default to gcc, above commands can be
+simplified with a simple wrapper script - saved as
+/usr/local/bin/arm-gnueabi-freebsd-gcc - listed below:
+
+.. code-block:: bash
+
+    #!/bin/sh
+    exec clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd "$@"
+
+
+Known Issues
+------------
+
+When build U-boot for `xenguest_arm64_defconfig` target, it reports linkage
+error:
+
+.. code-block:: bash
+
+    aarch64-linux-gnu-ld.bfd: drivers/xen/hypervisor.o: in function `do_hypervisor_callback':
+    /home/leoy/Dev2/u-boot/drivers/xen/hypervisor.c:188: undefined reference to `__aarch64_swp8_acq_rel'
+    aarch64-linux-gnu-ld.bfd: drivers/xen/hypervisor.o: in function `synch_test_and_set_bit':
+    /home/leoy/Dev2/u-boot/./arch/arm/include/asm/xen/system.h:40: undefined reference to `__aarch64_ldset1_acq_rel'
+    aarch64-linux-gnu-ld.bfd: drivers/xen/hypervisor.o: in function `synch_test_and_clear_bit':
+    /home/leoy/Dev2/u-boot/./arch/arm/include/asm/xen/system.h:28: undefined reference to `__aarch64_ldclr1_acq_rel'
+    aarch64-linux-gnu-ld.bfd: drivers/xen/hypervisor.o: in function `synch_test_and_set_bit':
+    /home/leoy/Dev2/u-boot/./arch/arm/include/asm/xen/system.h:40: undefined reference to `__aarch64_ldset1_acq_rel'
+    aarch64-linux-gnu-ld.bfd: drivers/xen/hypervisor.o: in function `synch_test_and_clear_bit':
+    /home/leoy/Dev2/u-boot/./arch/arm/include/asm/xen/system.h:28: undefined reference to `__aarch64_ldclr1_acq_rel'
+    aarch64-linux-gnu-ld.bfd: drivers/xen/events.o: in function `synch_test_and_clear_bit':
+    /home/leoy/Dev2/u-boot/./arch/arm/include/asm/xen/system.h:28: undefined reference to `__aarch64_ldclr1_acq_rel'
+    aarch64-linux-gnu-ld.bfd: drivers/xen/events.o: in function `synch_test_and_set_bit':
+    /home/leoy/Dev2/u-boot/./arch/arm/include/asm/xen/system.h:40: undefined reference to `__aarch64_ldset1_acq_rel'
+    aarch64-linux-gnu-ld.bfd: drivers/xen/gnttab.o: in function `gnttab_end_access':
+    /home/leoy/Dev2/u-boot/drivers/xen/gnttab.c:109: undefined reference to `__aarch64_cas2_acq_rel'
+    Segmentation fault
+
+To fix the failure, we need to append option `-mno-outline-atomics` in Clang
+command to not generate local calls to out-of-line atomic operations:
+
+.. code-block:: bash
+
+    make HOSTCC=clang xenguest_arm64_defconfig
+    make HOSTCC=clang CROSS_COMPILE=aarch64-linux-gnu- \
+         CC="clang -target aarch64-linux-gnueabi -mno-outline-atomics" -j8
diff --git a/doc/build/docker.rst b/doc/build/docker.rst
new file mode 100644
index 00000000000..45659b3b89d
--- /dev/null
+++ b/doc/build/docker.rst
@@ -0,0 +1,14 @@
+GitLab CI / U-Boot runner container
+===================================
+
+In order to have a reproducible and portable build environment for CI we use a container for building in.  This means that developers can also reproduce the CI environment, to a large degree at least, locally.  This file is located in the tools/docker directory.  To build the image yourself
+
+.. code-block:: bash
+
+    sudo docker build -t your-namespace:your-tag .
+
+Or to use an existing container
+
+.. code-block:: bash
+
+    sudo docker pull trini/u-boot-gitlab-ci-runner:jammy-20240227-14Mar2024
diff --git a/doc/build/documentation.rst b/doc/build/documentation.rst
new file mode 100644
index 00000000000..098c96a4c4f
--- /dev/null
+++ b/doc/build/documentation.rst
@@ -0,0 +1,104 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+Building documentation
+======================
+
+The U-Boot documentation is based on the Sphinx documentation generator.
+
+In addition to the Python packages listed in ``doc/sphinx/requirements.txt``,
+the following dependencies are needed to build the documentation:
+
+* fontconfig
+
+* graphviz
+
+* imagemagick
+
+* texinfo (if building the `Infodoc documentation`_)
+
+HTML documentation
+------------------
+
+The *htmldocs* target is used to build the HTML documentation. It uses the
+`Read the Docs Sphinx theme <https://sphinx-rtd-theme.readthedocs.io/en/stable/>`_.
+
+.. code-block:: bash
+
+    # Create Python environment 'myenv'
+    python3 -m venv myenv
+    # Activate the Python environment
+    . myenv/bin/activate
+    # Install build requirements
+    python3 -m pip install -r doc/sphinx/requirements.txt
+    # Build the documentation
+    make htmldocs
+    # Deactivate the Python environment
+    deactivate
+    # Display the documentation in a graphical web browser
+    x-www-browser doc/output/index.html
+
+The HTML documentation is published at https://docs.u-boot.org. The build
+process for that site is controlled by the file *.readthedocs.yml*.
+
+Infodoc documentation
+---------------------
+
+The *infodocs* target builds both a texinfo and an info file:
+
+.. code-block:: bash
+
+    # Create Python environment 'myenv'
+    python3 -m venv myenv
+    # Activate the Python environment
+    . myenv/bin/activate
+    # Install build requirements
+    python3 -m pip install -r doc/sphinx/requirements.txt
+    # Build the documentation
+    make infodocs
+    # Deactivate the Python environment
+    deactivate
+    # Display the documentation
+    info doc/output/texinfo/u-boot.info
+
+PDF documentation
+-----------------
+
+The *pdfdocs* target is meant to be used to build PDF documenation.
+As v2023.01 it fails with 'LaTeX Error: Too deeply nested'.
+
+We can use texi2pdf instead:
+
+.. code-block:: bash
+
+    # Create Python environment 'myenv'
+    python3 -m venv myenv
+    # Activate the Python environment
+    . myenv/bin/activate
+    # Install build requirements
+    python3 -m pip install -r doc/sphinx/requirements.txt
+    # Build the documentation
+    make texinfodocs
+    # Deactivate the Python environment
+    deactivate
+    # Convert to PDF
+    texi2pdf doc/output/texinfo/u-boot.texi
+
+Texinfo documentation
+---------------------
+
+To build only the texinfo documentation the *texinfodocs* target is used:
+
+.. code-block:: bash
+
+    # Create Python environment 'myenv'
+    python3 -m venv myenv
+    # Activate the Python environment
+    . myenv/bin/activate
+    # Install build requirements
+    python3 -m pip install -r doc/sphinx/requirements.txt
+    # Build the documentation
+    make texinfodocs
+    # Deactivate the Python environment
+    deactivate
+
+The output is in file *doc/output/texinfo/u-boot.texi*.
diff --git a/doc/build/gcc.rst b/doc/build/gcc.rst
new file mode 100644
index 00000000000..d8fcfdc4bf2
--- /dev/null
+++ b/doc/build/gcc.rst
@@ -0,0 +1,225 @@
+Building with GCC
+=================
+
+Dependencies
+------------
+
+For building U-Boot you need a GCC compiler for your host platform. If you
+are not building on the target platform you further need  a GCC cross compiler.
+
+Debian based
+~~~~~~~~~~~~
+
+On Debian based systems the cross compiler packages are named
+gcc-<architecture>-linux-gnu.
+
+You could install GCC and the GCC cross compiler for the ARMv8 architecture with
+
+.. code-block:: bash
+
+    sudo apt-get install gcc gcc-aarch64-linux-gnu
+
+Depending on the build targets further packages maybe needed
+
+.. code-block:: bash
+
+    sudo apt-get install bc bison build-essential coccinelle \
+      device-tree-compiler dfu-util efitools flex gdisk graphviz imagemagick \
+      liblz4-tool libgnutls28-dev libguestfs-tools libncurses-dev \
+      libpython3-dev libsdl2-dev libssl-dev lz4 lzma lzma-alone openssl \
+      pkg-config python3 python3-asteval python3-coverage python3-filelock \
+      python3-pkg-resources python3-pycryptodome python3-pyelftools \
+      python3-pytest python3-pytest-xdist python3-sphinxcontrib.apidoc \
+      python3-sphinx-rtd-theme python3-subunit python3-testtools \
+      python3-virtualenv swig uuid-dev
+
+SUSE based
+~~~~~~~~~~
+
+On suse based systems the cross compiler packages are named
+cross-<architecture>-gcc<version>.
+
+You could install GCC and the GCC 10 cross compiler for the ARMv8 architecture
+with
+
+.. code-block:: bash
+
+    sudo zypper install gcc cross-aarch64-gcc10
+
+Depending on the build targets further packages maybe needed.
+
+.. code-block:: bash
+
+    zypper install bc bison flex gcc libopenssl-devel libSDL2-devel make \
+      ncurses-devel python3-devel python3-pytest swig
+
+Alpine Linux
+~~~~~~~~~~~~
+
+For building U-Boot on Alpine Linux at least the following packages are needed:
+
+.. code-block:: bash
+
+    apk add alpine-sdk bc bison dtc flex gnutls-dev linux-headers ncurses-dev \
+      openssl-dev py3-elftools py3-setuptools python3-dev swig util-linux-dev
+
+Depending on the build target further packages may be needed:
+
+* sandbox with lcd: sdl2-dev
+* riscv64 S-mode targets: opensbi
+* some arm64 targets: arm-trusted-firmware
+
+Prerequisites
+-------------
+
+For some boards you have to build prerequisite files before you can build
+U-Boot, e.g. for the some boards you will need to build the ARM Trusted Firmware
+beforehand. Please, refer to the board specific documentation
+:doc:`../board/index`.
+
+Configuration
+-------------
+
+Directory configs/ contains the template configuration files for the maintained
+boards following the naming scheme::
+
+    <board name>_defconfig
+
+These files have been stripped of default settings. So you cannot use them
+directly. Instead their name serves as a make target to generate the actual
+configuration file .config. For instance the configuration template for the
+Odroid C2 board is called odroid-c2_defconfig. The corresponding .config file
+is generated by
+
+.. code-block:: bash
+
+    make odroid-c2_defconfig
+
+You can adjust the configuration using
+
+.. code-block:: bash
+
+    make menuconfig
+
+Building
+--------
+
+When cross compiling you will have to specify the prefix of the cross-compiler.
+You can either specify the value of the CROSS_COMPILE variable on the make
+command line or export it beforehand.
+
+.. code-block:: bash
+
+    CROSS_COMPILE=<compiler-prefix> make
+
+Assuming cross compiling on Debian for ARMv8 this would be
+
+.. code-block:: bash
+
+    CROSS_COMPILE=aarch64-linux-gnu- make
+
+Out-of-tree building
+~~~~~~~~~~~~~~~~~~~~
+
+By default building is performed locally and the objects are saved in the source
+directory. To build out-out-tree use one of the two methods below:
+
+Add O= parameter to the make command line:
+
+.. code-block:: bash
+
+    make O=/tmp/build distclean
+    make O=/tmp/build NAME_defconfig
+    make O=/tmp/build
+
+Use environment variable KBUILD_OUTPUT:
+
+.. code-block:: bash
+
+    export KBUILD_OUTPUT=/tmp/build
+    make distclean
+    make NAME_defconfig
+    make
+
+.. note::
+
+    The command line "O=" parameter overrides the KBUILD_OUTPUT environment
+    variable.
+
+Build parameters
+~~~~~~~~~~~~~~~~
+
+A list of available parameters for the make command can be obtained via
+
+.. code-block:: bash
+
+    make help
+
+You can speed up compilation by parallelization using the -j parameter, e.g.
+
+.. code-block:: bash
+
+    CROSS_COMPILE=aarch64-linux-gnu- make -j$(nproc)
+
+Further important build parameters are
+
+* O=<dir> - generate all output files in directory <dir>, including .config
+* V=1 - verbose build
+
+Devicetree compiler
+~~~~~~~~~~~~~~~~~~~
+
+Boards that use `CONFIG_OF_CONTROL` (i.e. almost all of them) need the
+devicetree compiler (dtc). Those with `CONFIG_PYLIBFDT` need pylibfdt, a Python
+library for accessing devicetree data. Suitable versions of these are included
+in the U-Boot tree in `scripts/dtc` and built automatically as needed.
+
+To use the system versions of these, use the DTC parameter, for example
+
+.. code-block:: bash
+
+    DTC=/usr/bin/dtc make
+
+In this case, dtc and pylibfdt are not built. The build checks that the version
+of dtc is new enough. It also makes sure that pylibfdt is present, if needed
+(see `scripts_dtc` in the Makefile).
+
+Note that the :doc:`tools` are always built with the included version of libfdt
+so it is not possible to build U-Boot tools with a system libfdt, at present.
+
+Link-time optimisation (LTO)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+U-Boot supports link-time optimisation which can reduce the size of the final
+U-Boot binaries, particularly with SPL.
+
+At present this can be enabled by ARM boards by adding `CONFIG_LTO=y` into the
+defconfig file. Other architectures are not supported. LTO is enabled by default
+for sandbox.
+
+This does incur a link-time penalty of several seconds. For faster incremental
+builds during development, you can disable it by setting `NO_LTO` to `1`.
+
+.. code-block:: bash
+
+    NO_LTO=1 make
+
+Other build targets
+~~~~~~~~~~~~~~~~~~~
+
+A list of all make targets can be obtained via
+
+.. code-block:: bash
+
+    make help
+
+Important ones are
+
+* clean - remove most generated files but keep the configuration
+* mrproper - remove all generated files + config + various backup files
+
+Installation
+------------
+
+The process for installing U-Boot on the target device is device specific.
+Please, refer to the board specific documentation :doc:`../board/index`.
diff --git a/doc/build/gen_compile_commands.rst b/doc/build/gen_compile_commands.rst
new file mode 100644
index 00000000000..d503764f9e3
--- /dev/null
+++ b/doc/build/gen_compile_commands.rst
@@ -0,0 +1,83 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+Create build database for IDEs
+==============================
+
+gen_compile_commands (scripts/gen_compile_commands.py) is a script used to
+generate a compilation database (compile_commands.json). This database consists
+of an array of "command objects" describing how each translation unit was
+compiled.
+
+Example::
+
+  {
+  "command": "gcc -Wp,-MD,arch/x86/cpu/.lapic.o.d -nostdinc -isystem (...)"
+  "directory": "/home/jmcosta/u-boot",
+  "file": "/home/jmcosta/u-boot/arch/x86/cpu/lapic.c"
+  }
+
+Such information comes from parsing the respective .cmd file of each translation
+unit. In the previous example, that would be `arch/x86/cpu/.lapic.o.cmd`.
+
+For more details on the database format, please refer to the official
+documentation at https://clang.llvm.org/docs/JSONCompilationDatabase.html.
+
+The compilation database is quite useful for text editors (and IDEs) that use
+Clangd LSP. It allows jumping to definitions and declarations. Since it relies
+on parsing .cmd files, one needs to have a target (e.g. configs/xxx_defconfig)
+built before running the script.
+
+Example::
+
+  make sandbox_defconfig
+  make
+  ./scripts/gen_compile_commands.py
+
+Beware that depending on the changes you made to the project's source code, you
+may need to run the script again (presuming you recompiled your target, of
+course) to have an up-to-date database.
+
+The database will be in the root of the repository. No further modifications are
+needed for it to be usable by the LSP, unless you set a name for the database
+other than it's default one (compile_commands.json).
+
+Compatible IDEs
+---------------
+
+Several popular integrated development environments (IDEs) support the use
+of JSON compilation databases for C/C++ development, making it easier to
+manage build configurations and code analysis. Some of these IDEs include:
+
+1. **Visual Studio Code (VS Code)**: IntelliSense in VS Code can be set up to
+   use compile_commands.json by following the instructions in
+   https://code.visualstudio.com/docs/cpp/faq-cpp#_how-do-i-get-intellisense-to-work-correctly.
+
+2. **CLion**: JetBrains' CLion IDE supports JSON compilation databases out
+   of the box. You can configure your project to use a compile_commands.json
+   file via the project settings. Details on setting up CLion with JSON
+   compilation databases can be found at
+   https://www.jetbrains.com/help/clion/compilation-database.html.
+
+3. **Qt Creator**: Qt Creator, a popular IDE for Qt development, also
+   supports compile_commands.json for C/C++ projects. Instructions on how to
+   use this feature can be found at
+   https://doc.qt.io/qtcreator/creator-clang-codemodel.html#using-compilation-databases.
+
+4. **Eclipse CDT**: Eclipse's C/C++ Development Tools (CDT) can be
+   configured to use JSON compilation databases for better project management.
+   You can find guidance on setting up JSON compilation database support at the
+   wiki: https://wiki.eclipse.org/CDT/User/NewIn910#Build.
+
+For Vim, Neovim, and Emacs, if you are using Clangd as your LSP, placing the
+compile_commands.json in the root of the repository should suffice to enable
+code navigation.
+
+Usage
+-----
+
+For further details on the script's options, please refer to its help message,
+as in the example below.
+
+Help::
+
+  ./scripts/gen_compile_commands.py --help
diff --git a/doc/build/index.rst b/doc/build/index.rst
new file mode 100644
index 00000000000..7a4507b5746
--- /dev/null
+++ b/doc/build/index.rst
@@ -0,0 +1,17 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Build U-Boot
+============
+
+.. toctree::
+   :maxdepth: 2
+
+   source
+   gcc
+   clang
+   reproducible
+   docker
+   tools
+   buildman
+   documentation
+   gen_compile_commands
diff --git a/doc/build/reproducible.rst b/doc/build/reproducible.rst
new file mode 100644
index 00000000000..8b030f469d7
--- /dev/null
+++ b/doc/build/reproducible.rst
@@ -0,0 +1,27 @@
+Reproducible builds
+===================
+
+In order to achieve reproducible builds, timestamps used in the U-Boot build
+process have to be set to a fixed value.
+
+This is done using the SOURCE_DATE_EPOCH environment variable which specifies
+the number of seconds since 1970-01-01T00:00:00Z.
+
+Example
+-------
+
+To build the sandbox with 2023-01-01T00:00:00Z as timestamp we can use:
+
+.. code-block:: bash
+
+    make sandbox_defconfig
+    SOURCE_DATE_EPOCH=1672531200 make
+
+This date is shown when we launch U-Boot:
+
+.. code-block:: console
+
+    ./u-boot -T
+    U-Boot 2023.01 (Jan 01 2023 - 00:00:00 +0000)
+
+The same effect can be obtained with buildman using the `-r` flag.
diff --git a/doc/build/source.rst b/doc/build/source.rst
new file mode 100644
index 00000000000..d21ee055f33
--- /dev/null
+++ b/doc/build/source.rst
@@ -0,0 +1,30 @@
+Obtaining the source
+====================
+
+The source of the U-Boot project is maintained in a Git repository.
+
+You can download the source via
+
+.. code-block:: bash
+
+    git clone https://source.denx.de/u-boot/u-boot.git
+
+A mirror of the source is maintained on Github
+
+.. code-block:: bash
+
+    git clone https://github.com/u-boot/u-boot
+
+The released versions are available as tags which use the naming scheme::
+
+    v<year>.<month>
+
+Release candidates are named::
+
+    v<year>.<month>-rc<number>
+
+To checkout the October 2020 release you would use:
+
+.. code-block:: bash
+
+    git checkout v2020.10
diff --git a/doc/build/tools.rst b/doc/build/tools.rst
new file mode 100644
index 00000000000..5bfa05b2325
--- /dev/null
+++ b/doc/build/tools.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+Host tools
+==========
+
+Building tools for Linux
+------------------------
+
+To allow distributions to distribute all possible tools in a generic way,
+avoiding the need of specific tools building for each machine, a tools only
+defconfig file is provided.
+
+Using this, we can build the tools by doing::
+
+   $ make tools-only_defconfig
+   $ make tools-only
+
+Building tools for Windows
+--------------------------
+If you wish to generate Windows versions of the utilities in the tools directory
+you can use MSYS2, a software distro and building platform for Windows.
+
+Download the MSYS2 installer from https://www.msys2.org. Make sure you have
+installed all required packages below in order to build these host tools::
+
+   * gcc (9.1.0)
+   * make (4.2.1)
+   * bison (3.4.2)
+   * diffutils (3.7)
+   * openssl-devel (1.1.1.d)
+
+Note the version numbers in these parentheses above are the package versions
+at the time being when writing this document. The MSYS2 installer tested is
+http://repo.msys2.org/distrib/x86_64/msys2-x86_64-20190524.exe.
+
+There are 3 MSYS subsystems installed: MSYS2, MinGW32 and MinGW64. Each
+subsystem provides an environment to build Windows applications. The MSYS2
+environment is for building POSIX compliant software on Windows using an
+emulation layer. The MinGW32/64 subsystems are for building native Windows
+applications using a linux toolchain (gcc, bash, etc), targeting respectively
+32 and 64 bit Windows.
+
+Launch the MSYS2 shell of the MSYS2 environment, and do the following::
+
+   $ make tools-only_defconfig
+   $ make tools-only
+
+
+Building without Python
+-----------------------
+
+The tools-only builds bytes pylibfdt by default. To disable this, use the
+NO_PYTHON variable::
+
+   NO_PYTHON=1 make tools-only_defconfig tools-only
diff --git a/doc/chromium/chainload.rst b/doc/chromium/chainload.rst
new file mode 100644
index 00000000000..b00ee94eaa4
--- /dev/null
+++ b/doc/chromium/chainload.rst
@@ -0,0 +1,257 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2020 Google LLC
+
+Running U-Boot from coreboot on Chromebooks
+===========================================
+
+U-Boot can be used as a secondary boot loader in a few situations such as from
+UEFI and coreboot (see README.x86). Recent Chromebooks use coreboot even on
+ARM platforms to start up the machine.
+
+This document aims to provide a guide to booting U-Boot on a Chromebook. It
+is only a starting point, and there are many guides on the interwebs. But
+placing this information in the U-Boot tree should make it easier to find for
+those who use U-Boot habitually.
+
+Most of these platforms are supported by U-Boot natively, but it is risky to
+replace the ROM unless you have a servo board and cable to restore it with.
+
+
+For all of these the standard U-Boot build instructions apply. For example on
+ARM::
+
+   sudo apt install gcc-arm-linux-gnueabi
+   mkdir b
+   make O=b/nyan_big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all
+
+You can obtain the vbutil_kernel utility here:
+
+   https://drive.google.com/open?id=0B7WYZbZ9zd-3dHlVVXo4VXE2T0U
+
+
+Snow (Samsung ARM Chromebook)
+-----------------------------
+
+See here:
+
+https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot-on-the-samsung-arm-chromebook
+
+
+Nyan-big
+--------
+
+Compiled based on information here::
+
+   https://lists.denx.de/pipermail/u-boot/2015-March/209530.html
+   https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big
+   https://lists.denx.de/pipermail/u-boot/2017-May/289491.html
+   https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13#copy-data-to-the-sd-card
+
+1. Build U-Boot
+
+Steps::
+
+   mkdir b
+   make -j8 O=b/nyan-big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all
+
+
+2. Select a .its file
+
+Select something from doc/chromium which matches your board, or create your
+own.
+
+Note that the device tree node is required, even though it is not actually
+used by U-Boot. This is because the Chromebook expects to pass it to the
+kernel, and crashes if it is not present.
+
+
+3. Build and sign an image
+
+Steps::
+
+   ./b/nyan-big/tools/mkimage -f doc/chromium/files/nyan-big.its u-boot-chromium.fit
+   echo test >dummy.txt
+   vbutil_kernel --arch arm \
+     --keyblock doc/chromium/files/devkeys/kernel.keyblock \
+     --signprivate doc/chromium/files/devkeys/kernel_data_key.vbprivk \
+     --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \
+     --bootloader dummy.txt --pack u-boot.kpart
+
+
+4. Prepare an SD card
+
+Steps::
+
+   DISK=/dev/sdc   # Replace with your actual SD card device
+   sudo cgpt create $DISK
+   sudo cgpt add -b 34 -s 32768 -P 1 -S 1 -t kernel $DISK
+   sudo cgpt add -b 32802 -s 2000000 -t rootfs $DISK
+   sudo gdisk $DISK   # Enter command 'w' to write a protective MBR to the disk
+
+
+5. Write U-Boot to the SD card
+
+Steps::
+
+   sudo dd if=u-boot.kpart of=/dev/sdc1; sync
+
+
+6. Start it up
+
+Reboot the device in dev mode. Make sure that you have USB booting enabled. To
+do this, login as root (via Ctrl-Alt-forward_arrow) and type
+'enable_dev_usb_boot'. You only need to do this once.
+
+Reboot the device with the SD card inserted. Press Clrl-U at the developer
+mode screen. It should show something like the following on the display::
+
+   U-Boot 2017.07-00637-g242eb42-dirty (May 22 2017 - 06:14:21 -0600)
+
+   Model: Acer Chromebook 13 CB5-311
+   Board: Google/NVIDIA Nyan-big, ID: 1
+
+   Net:   No ethernet found.
+   Hit any key to stop autoboot:  0
+   Tegra124 (Nyan-big) #
+
+
+7. Known problems
+
+On the serial console the word MMC is chopped at the start of the line::
+
+   C:   sdhci@700b0000: 2, sdhci@700b0400: 1, sdhci@700b0600: 0
+
+This is likely due to some problem with change-over of the serial driver
+during relocation (or perhaps updating the clock setup in board_init()).
+
+
+9. Notes
+
+To check that you copied the u-boot.its file correctly, use these commands.
+You should see that the data at 0x100 in u-boot-chromium.fit is the first few
+bytes of U-Boot::
+
+   hd u-boot-chromium.fit |head -20
+   ...
+   00000100  b8 00 00 ea 14 f0 9f e5  14 f0 9f e5 14 f0 9f e5  |................|
+
+   hd b/nyan-big/u-boot.bin |head
+   00000000  b8 00 00 ea 14 f0 9f e5  14 f0 9f e5 14 f0 9f e5  |................|
+
+
+The 'data' property of the FIT is set up to start at offset 0x100 bytes into
+the file. The change to CONFIG_TEXT_BASE is also an offset of 0x100 bytes
+from the load address. If this changes, you either need to modify U-Boot to be
+fully relocatable, or expect it to hang.
+
+
+chromebook_jerry
+----------------
+
+The instruction are similar to those for Nyan with changes as noted below:
+
+1. Patch U-Boot
+
+Open include/configs/rk3288_common.h
+
+Change::
+
+   #define CONFIG_TEXT_BASE		0x00100000
+
+to::
+
+   #define CONFIG_TEXT_BASE		0x02000100
+
+
+
+2. Build U-Boot
+
+Steps::
+
+   mkdir b
+   make -j8 O=b/chromebook_jerry CROSS_COMPILE=arm-linux-gnueabi- \
+      chromebook_jerry_defconfig all
+
+
+3. See above
+
+4. Build and sign an image
+
+Steps::
+
+   ./b/chromebook_jerry/tools/mkimage -f doc/chromium/chromebook_jerry.its \
+      u-boot-chromium.fit
+   echo test >dummy.txt
+   vbutil_kernel --arch arm \
+      --keyblock doc/chromium/files/devkeys/kernel.keyblock \
+      --signprivate doc/chromium/files/devkeys/kernel_data_key.vbprivk \
+      --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \
+      --bootloader dummy.txt --pack u-boot.kpart
+
+
+5. See above
+
+6. See above
+
+7. Start it up
+
+Reboot the device in dev mode. Make sure that you have USB booting enabled. To
+do this, login as root (via Ctrl-Alt-forward_arrow) and type
+'enable_dev_usb_boot'. You only need to do this once.
+
+Reboot the device with the SD card inserted. Press Clrl-U at the developer
+mode screen. It should show something like the following on the display::
+
+   U-Boot 2017.05-00649-g72acdbf-dirty (May 29 2017 - 14:57:05 -0600)
+
+   Model: Google Jerry
+   Net:   Net Initialization Skipped
+   No ethernet found.
+   Hit any key to stop autoboot:  0
+
+
+8. Known problems
+
+None as yet.
+
+
+9. Notes
+
+None as yet.
+
+
+Other notes
+-----------
+
+flashrom
+~~~~~~~~
+
+Used to make a backup of your firmware, or to replace it.
+
+See: https://www.chromium.org/chromium-os/packages/cros-flashrom
+
+
+coreboot
+~~~~~~~~
+
+Coreboot itself is not designed to actually boot an OS. Instead, a program
+called Depthcharge is used. This originally came out of U-Boot and was then
+heavily hacked and modified such that is is almost unrecognisable. It does
+include a very small part of the U-Boot command-line interface but is not
+usable as a general-purpose boot loader.
+
+In addition, it has a very unusual design in that it does not do device init
+itself, but instead relies on coreboot. This is similar to (in U-Boot) having
+a SPI driver with an empty probe() method, relying on whatever was set up
+beforehand. It can be quite hard to figure out between these two code bases
+what settings are actually used. When chain-loading into U-Boot we must be
+careful to reinit anything that U-Boot expects. If not, some peripherals (or
+the whole machine) may not work. This makes the process of chainloading more
+complicated than it could be on some platforms.
+
+Finally, it supports only a subset of the U-Boot's FIT format. In particular
+it uses a fixed address to load the FIT and does not support load/exec
+addresses. This means that U-Boot must be able to boot from whatever
+address Depthcharge happens to use (it is the CONFIG_KERNEL_START setting
+in Depthcharge). In practice this means that the data in the kernel@1 FIT node
+(see above) must start at the same address as U-Boot's CONFIG_TEXT_BASE.
diff --git a/doc/chromium/files/chromebook_jerry.its b/doc/chromium/files/chromebook_jerry.its
new file mode 100644
index 00000000000..02e5e1340f3
--- /dev/null
+++ b/doc/chromium/files/chromebook_jerry.its
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+/ {
+	description = "U-Boot mainline";
+	#address-cells = <1>;
+
+	images {
+		kernel {
+			description = "U-Boot mainline";
+			type = "kernel_noload";
+			arch = "arm";
+			os = "linux";
+			data = /incbin/("../../b/chromebook_jerry/u-boot.bin");
+			compression = "none";
+			load = <0>;
+			entry = <0>;
+			hash-2 {
+				algo = "sha256";
+			};
+		};
+
+		fdt-1{
+			description = "rk3288-veryron-jerry.dtb";
+			data = /incbin/("../../b/chromebook_jerry/u-boot.dtb");
+			type = "flat_dt";
+			arch = "arm";
+			compression = "none";
+			hash-1{
+				algo = "sha256";
+			};
+		};
+	};
+
+	configurations {
+		default = "config-1";
+		config-1 {
+			description = "Boot U-Boot";
+			kernel = "kernel";
+			fdt = "fdt-1";
+		};
+	};
+};
diff --git a/doc/chromium/files/devkeys/kernel.keyblock b/doc/chromium/files/devkeys/kernel.keyblock
new file mode 100644
index 00000000000..9740be4e600
--- /dev/null
+++ b/doc/chromium/files/devkeys/kernel.keyblock
diff --git a/doc/chromium/files/devkeys/kernel_data_key.vbprivk b/doc/chromium/files/devkeys/kernel_data_key.vbprivk
new file mode 100644
index 00000000000..8d392fb294c
--- /dev/null
+++ b/doc/chromium/files/devkeys/kernel_data_key.vbprivk
diff --git a/doc/chromium/files/nyan-big.its b/doc/chromium/files/nyan-big.its
new file mode 100644
index 00000000000..60bdffbb829
--- /dev/null
+++ b/doc/chromium/files/nyan-big.its
@@ -0,0 +1,42 @@
+/dts-v1/;
+
+/ {
+	description = "U-Boot mainline";
+	#address-cells = <1>;
+
+	images {
+		kernel {
+			description = "U-Boot mainline    ";
+			type = "kernel_noload";
+			arch = "arm";
+			os = "linux";
+			data = /incbin/("../.././b/nyan-big/u-boot.bin");
+			compression = "none";
+			load = <0>;
+			entry = <0>;
+			hash-2 {
+				algo = "sha256";
+			};
+		};
+
+		fdt-1{
+			description = "tegra124-nyan-big.dtb";
+			data = /incbin/("../.././b/nyan-big/u-boot.dtb");
+			type = "flat_dt";
+			arch = "arm";
+			compression = "none";
+			hash-1{
+				algo = "sha256";
+			};
+		};
+	};
+
+	configurations {
+		default = "config-1";
+		config-1 {
+			description = "Boot U-Boot";
+			kernel = "kernel";
+			fdt = "fdt-1";
+		};
+	};
+};
diff --git a/doc/chromium/index.rst b/doc/chromium/index.rst
new file mode 100644
index 00000000000..0722c250033
--- /dev/null
+++ b/doc/chromium/index.rst
@@ -0,0 +1,14 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2020 Google LLC
+
+Chromium OS-specific doc
+========================
+
+This provides some information about Chromium OS and U-Boot.
+
+.. toctree::
+   :maxdepth: 2
+
+   overview
+   run_vboot
+   chainload
diff --git a/doc/chromium/overview.rst b/doc/chromium/overview.rst
new file mode 100644
index 00000000000..790233cb668
--- /dev/null
+++ b/doc/chromium/overview.rst
@@ -0,0 +1,74 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2020 Google LLC
+
+Chromium OS Support in U-Boot
+=============================
+
+Introduction
+------------
+
+This describes how to use U-Boot with Chromium OS. Several options are
+available:
+
+   - Running U-Boot from the 'altfw' feature, which is available on selected
+     Chromebooks from 2019 onwards (initially Grunt). Press '1' from the
+     developer-mode screen to get into U-Boot. See here for details:
+     https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_mode.md
+
+   - Running U-Boot from the disk partition. This involves signing U-Boot and
+     placing it on the disk, for booting as a 'kernel'. See
+     :doc:`chainload` for information on this. This is the only
+     option on non-U-Boot Chromebooks from 2013 to 2018 and is somewhat
+     more involved.
+
+   - Running U-Boot with Chromium OS verified boot. This allows U-Boot to be
+     used instead of either or both of depthcharge (a bootloader which forked
+     from U-Boot in 2013) and coreboot. See :doc:`run_vboot` for more
+     information on this.
+
+   - Running U-Boot from coreboot. This allows U-Boot to run on more devices
+     since many of them only support coreboot as the bootloader and have
+     no bare-metal support in U-Boot. For this, use the 'coreboot' target.
+
+   - Running U-Boot and booting into a Chrome OS image, but without verified
+     boot. This can be useful for testing.
+
+
+Talks and documents
+-------------------
+
+Here is some material relevant to Chromium OS verified boot with U-Boot:
+
+   - "U-Boot with Chrome OS and firmware packaging"
+
+     - Author: Simon Glass
+     - Presented at Open Source Firmware Conference 2018, Erlangen
+     - Describes the work in progress as at the end of 2018
+     - Slides at `OSFC <https://2018.osfc.io/uploads/talk/paper/26/U-Boot_with_Chrome_OS_and_firmware_packaging.pdf>`_
+     - `Youtube video 'OSFC - U-Boot with Chrome OS and firmware packaging' <https://www.youtube.com/watch?v=1jknxUvmwpo>`_
+
+   - "Verified Boot in Chrome OS and how to make it work for you"
+
+     - Author: Simon Glass
+     - Presented at ELCE 2013, Edinburgh
+     - Describes the original 2013 implementation as shipped on snow (first
+       `ARM Chromebook was a Samsung Chromebook <https://www.cnet.com/products/samsung-series-3-chromebook-xe303c12-11-6-exynos-5250-2-gb-ram-16-gb-ssd-bilingual-english-french/>`_
+       with Samsung Exynos5250 `review <https://www.cnet.com/reviews/samsung-chromebook-series-3-review/>`_),
+       spring (`HP Chromebook 11 <https://www.cnet.com/products/hp-chromebook-11-g2-11-6-exynos-5250-4-gb-ram-16-gb-emmc/>`_)
+       and pit/pi (`Samsung Chromebook 2 <https://www.cnet.com/products/samsung-chromebook-2-xe503c12-11-6-exynos-5-octa-4-gb-ram-16-gb-ssd/>`_
+       with Exynos 5 Octa 5420 in 2014).
+     - Slides at `Google research <https://research.google/pubs/pub42038/>`_
+     - `Youtube video 'Verified Boot on Chrome OS and How to do it yourself' <https://www.youtube.com/watch?v=kdpZC9jFzZA>`_
+
+   - "Chrome University 2018: Chrome OS Firmware and Verified Boot 201"
+
+     - Author: Duncan Laurie
+     - Describes Chrome OS firmware as of 2018 and includes a wide range of
+       topics. This has no U-Boot information, but does cover coreboot and also
+       talks about the Chrome OS EC and Security chip. This is probably the
+       best introduction talk.
+     - `Youtube video 'Chrome University 2018: Chrome OS Firmware and Verified Boot 201' <https://www.youtube.com/watch?v=WY2sWpuda2g>`_
+
+   - `Chromium OS U-Boot <https://www.chromium.org/developers/u-boot>`_
+
+   - `Firmware porting Guide <https://www.chromium.org/chromium-os/firmware-porting-guide>`_
diff --git a/doc/chromium/run_vboot.rst b/doc/chromium/run_vboot.rst
new file mode 100644
index 00000000000..a9e4408d55f
--- /dev/null
+++ b/doc/chromium/run_vboot.rst
@@ -0,0 +1,203 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2020 Google LLC
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+
+Running U-Boot with Chromium OS verified boot
+=============================================
+
+Note: Once you use the source below you can obtain extra documentation with
+'make htmldocs'. See the 'Internal Documentation' link, under
+'Chromium OS-specific doc'.
+
+To obtain::
+
+   git clone https://github.com/sjg20/u-boot.git
+   cd u-boot
+   git checkout cros-2021.04
+
+   cd ..
+   git clone https://chromium.googlesource.com/chromiumos/platform/vboot_reference
+   cd vboot_reference
+   git checkout 45964294
+   #  futility: updater: Correct output version for Snow
+
+To build for sandbox::
+
+   UB=/tmp/b/chromeos_sandbox    # U-Boot build directory
+   cd u-boot
+   make O=$UB chromeos_sandbox_defconfig
+   make O=$UB -j20 -s VBOOT_SOURCE=/path/to/vboot_reference \
+     MAKEFLAGS_VBOOT=DEBUG=1 QUIET=1
+
+Replace sandbox with another supported target.
+
+This produces $UB/image.bin which contains the firmware binaries in a SPI
+flash image.
+
+To run on sandbox::
+
+   CROS=~/cosarm
+   IMG=$CROS/src/build/images/coral/latest/chromiumos_image.bin
+   $UB/tpl/u-boot-tpl -d $UB/u-boot.dtb.out \
+     -L6 -c "host bind 0 $IMG; vboot go auto" \
+     -l -w -s state.dtb -r -n -m $UB/ram
+
+   $UB/tpl/u-boot-tpl -d $UB/u-boot.dtb.out -L6 -l \
+     -c "host bind 0 $IMG; vboot go auto" -w -s $UB/state.dtb -r -n -m $UB/mem
+
+
+To run on other boards:
+
+   - Install image.bin in the SPI flash of your device
+   - Boot your system
+
+
+Sandbox
+-------
+
+Most Chromium OS development with U-Boot is undertaken using sandbox. There is
+a sandbox target available (chromeos_sandbox) which allows running U-Boot on
+a Linux machine completion with emulations of the display, TPM, disk, etc.
+
+Running sandbox starts TPL, which contains the first phase of vboot, providing
+a device tree and binding a Chromium OS disk image for use to find kernels
+(any Chromium OS image will do). It also saves driver state between U-Boot
+phases into state.dtb and will automatically ensure that memory is shared
+between all phases. TPL will jump to SPL and then on to U-Boot proper.
+
+It is possible to run with debugging on, e.g.::
+
+   gdb --args $UB/tpl/u-boot-tpl -d ....
+
+Breakpoints can be set in any U-Boot phase. Overall this is a good debugging
+environment for new verified-boot features.
+
+
+Samus
+-----
+
+Basic support is available for samus, using the chromeos_samus target. If you
+have an em100, use::
+
+   sudo em100 -s -c W25Q128FW -d $UB/image.bin -t -r
+
+to write the image and then boot samus (Power-Refresh).
+
+
+Boot flow
+---------
+
+Verified boot starts in TPL, which selects the A or B SPL, which in turn selects
+the A or B U-Boot. Then this jumps to the selected kernel. If anything goes
+wrong, the device reboots and the recovery SPL and U-Boot are used instead.
+
+More details are available here:
+
+   https://www.chromium.org/chromium-os/chromiumos-design-docs/firmware-boot-and-recovery
+
+
+New uclasses
+------------
+
+Several uclasses are provided in cros/:
+
+UCLASS_CROS_AUX_FW
+   Chrome OS auxiliary firmware
+
+UCLASS_CROS_FWSTORE
+   Chrome OS firmware storage
+
+UCLASS_CROS_NVDATA
+   Chrome OS non-volatile data device
+
+UCLASS_CROS_VBOOT_EC
+   Chrome OS vboot EC operations
+
+UCLASS_CROS_VBOOT_FLAG
+   Chrome OS verified boot flag
+
+The existing UCLASS_CROS_EC is also used.
+
+
+Commands
+--------
+
+A new 'vboot' command is provided to run particular vboot stages. The most
+useful command is 'vboot go auto', which continues where the last stage left
+off.
+
+Note that TPL and SPL do not supports commands as yet, so the vboot code is
+called directly from the SPL boot devices (BOOT_DEVICE_CROS_VBOOT). See
+cros_load_image_tpl() and cros_load_image_spl() which both call
+vboot_run_auto().
+
+
+Config options
+--------------
+
+The main option is CONFIG_CHROMEOS, which enables a wide array of other options
+so that the required features are present.
+
+
+Device-tree config
+------------------
+
+Various options are available which control the operation of verified boot.
+See cros/dts/bindings/config.txt for details. Most config is handled at run-
+time, although build-time config (with Kconfig) could also be added fairly
+easily.
+
+
+Porting to other hardware
+-------------------------
+
+A basic port to samus (Chromebook Pixel 2015) is in a basic working state,
+using the chromeos_samus target. Patches will likely be forthcoming in early
+2019. Ports to an ARM board and coreboot (for x86 Chromebooks) are in the
+dreaming state.
+
+
+Tests
+-----
+
+Chromium OS firmware has a very limited set of tests. The tests that originally
+existed in U-Boot were not brought over to coreboot or depthcharge.
+
+The U-Boot tests ('make check') do operate, but at present there are no
+Chromium OS tests available. These will hopefully come together over time. Of
+course the above sandbox feature provides a sort of functional test and can
+detect problems that affect the flow or particular vboot features.
+
+
+U-Boot without Chromium OS verified boot
+----------------------------------------
+
+The following script can be used to boot a Chrome OS image on coral. It is
+defined as the boot command in mainline::
+
+   # Read the image header and obtain the address of the kernel
+   # The offset 4f0 is defined by verified boot and may change for other
+   # Chromebooks
+   read mmc 2:2 100000 0 80; setexpr loader *001004f0;
+
+   # Get the kernel size and calculate the number of blocks (0x200 bytes each)
+   setexpr size *00100518; setexpr blocks $size / 200;
+
+   # Read the full kernel and calculate the address of the setup block
+   read mmc 2:2 100000 80 $blocks; setexpr setup $loader - 1000;
+
+   # Locate the command line
+   setexpr cmdline $loader - 2000;
+
+   # Start the zboot process with the loaded kernel, setup block and cmdline
+   zboot start 100000 0 0 0 $setup $cmdline;
+
+   # Load the kernel, fix up the 'setup' block, dump information
+   zboot load; zboot setup; zboot dump
+
+   # Boot into Chrome OS
+   zboot go
+
+
+7 October 2018
diff --git a/doc/conf.py b/doc/conf.py
new file mode 100644
index 00000000000..ced3a6723fc
--- /dev/null
+++ b/doc/conf.py
@@ -0,0 +1,582 @@
+# -*- coding: utf-8 -*-
+#
+# The U-Boot documentation build configuration file, created by
+# sphinx-quickstart on Fri Feb 12 13:51:46 2016.
+#
+# This file is execfile()d with the current directory set to its
+# containing dir.
+#
+# Note that not all possible configuration values are present in this
+# autogenerated file.
+#
+# All configuration values have a default; values that are commented out
+# serve to show the default.
+
+import sys
+import os
+import sphinx
+
+from subprocess import check_output
+
+# Get Sphinx version
+major, minor, patch = sphinx.version_info[:3]
+
+# Set canonical URL from the Read the Docs Domain
+html_baseurl = os.environ.get("READTHEDOCS_CANONICAL_URL", "")
+
+# Tell Jinja2 templates the build is running on Read the Docs
+if os.environ.get("READTHEDOCS", "") == "True":
+    html_context = {
+        'READTHEDOCS' : True,
+    }
+
+# If extensions (or modules to document with autodoc) are in another directory,
+# add these directories to sys.path here. If the directory is relative to the
+# documentation root, use os.path.abspath to make it absolute, like shown here.
+sys.path.insert(0, os.path.abspath('sphinx'))
+from load_config import loadConfig
+
+# -- General configuration ------------------------------------------------
+
+# If your documentation needs a minimal Sphinx version, state it here.
+needs_sphinx = '2.4.4'
+
+# Add any Sphinx extension module names here, as strings. They can be
+# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
+# ones.
+extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include',
+              'kfigure', 'sphinx.ext.ifconfig', # 'automarkup',
+              'maintainers_include', 'sphinx.ext.autosectionlabel',
+              'kernel_abi', 'kernel_feat', 'sphinx-prompt']
+
+#
+# cdomain is badly broken in Sphinx 3+.  Leaving it out generates *most*
+# of the docs correctly, but not all.  Scream bloody murder but allow
+# the process to proceed; hopefully somebody will fix this properly soon.
+#
+if major >= 3:
+    if (major > 3) or (minor > 0 or patch >= 2):
+        # Sphinx c function parser is more pedantic with regards to type
+        # checking. Due to that, having macros at c:function cause problems.
+        # Those needed to be scaped by using c_id_attributes[] array
+        c_id_attributes = [
+            # GCC Compiler types not parsed by Sphinx:
+            "__restrict__",
+
+            # include/linux/compiler_types.h:
+            "__iomem",
+            "__kernel",
+            "noinstr",
+            "notrace",
+            "__percpu",
+            "__rcu",
+            "__user",
+
+            # include/linux/compiler_attributes.h:
+            "__alias",
+            "__aligned",
+            "__aligned_largest",
+            "__always_inline",
+            "__assume_aligned",
+            "__cold",
+            "__attribute_const__",
+            "__copy",
+            "__pure",
+            "__designated_init",
+            "__visible",
+            "__printf",
+            "__scanf",
+            "__gnu_inline",
+            "__malloc",
+            "__mode",
+            "__no_caller_saved_registers",
+            "__noclone",
+            "__nonstring",
+            "__noreturn",
+            "__packed",
+            "__pure",
+            "__section",
+            "__always_unused",
+            "__maybe_unused",
+            "__used",
+            "__weak",
+            "noinline",
+
+            # include/efi.h
+            "EFIAPI",
+
+            # include/efi_loader.h
+            "__efi_runtime",
+
+            # include/linux/memblock.h:
+            "__init_memblock",
+            "__meminit",
+
+            # include/linux/init.h:
+            "__init",
+            "__ref",
+
+            # include/linux/linkage.h:
+            "asmlinkage",
+        ]
+
+else:
+    extensions.append('cdomain')
+
+# Ensure that autosectionlabel will produce unique names
+autosectionlabel_prefix_document = True
+autosectionlabel_maxdepth = 2
+
+extensions.append("sphinx.ext.imgmath")
+
+# Add any paths that contain templates here, relative to this directory.
+templates_path = ['_templates']
+
+# The suffix(es) of source filenames.
+# You can specify multiple suffix as a list of string:
+# source_suffix = ['.rst', '.md']
+source_suffix = '.rst'
+
+# The encoding of source files.
+#source_encoding = 'utf-8-sig'
+
+# The master toctree document.
+master_doc = 'index'
+
+# General information about the project.
+project = 'Das U-Boot'
+copyright = 'The U-Boot development community'
+author = 'The U-Boot development community'
+
+# The version info for the project you're documenting, acts as replacement for
+# |version| and |release|, also used in various other places throughout the
+# built documents.
+#
+# In a normal build, version and release are are set to KERNELVERSION and
+# KERNELRELEASE, respectively, from the Makefile via Sphinx command line
+# arguments.
+#
+# The following code tries to extract the information by reading the Makefile,
+# when Sphinx is run directly (e.g. by Read the Docs).
+try:
+    makefile_version = None
+    makefile_patchlevel = None
+    for line in open('../Makefile'):
+        key, val = [x.strip() for x in line.split('=', 2)]
+        if key == 'VERSION':
+            makefile_version = val
+        elif key == 'PATCHLEVEL':
+            makefile_patchlevel = val
+        if makefile_version and makefile_patchlevel:
+            break
+except:
+    pass
+finally:
+    if makefile_version and makefile_patchlevel:
+        version = release = makefile_version + '.' + makefile_patchlevel
+    else:
+        version = release = "unknown version"
+
+# The language for content autogenerated by Sphinx. Refer to documentation
+# for a list of supported languages.
+#
+# This is also used if you do content translation via gettext catalogs.
+# Usually you set "language" from the command line for these cases.
+language = 'en'
+
+# There are two options for replacing |today|: either, you set today to some
+# non-false value, then it is used:
+#today = ''
+# Else, today_fmt is used as the format for a strftime call.
+#today_fmt = '%B %d, %Y'
+
+# List of patterns, relative to source directory, that match files and
+# directories to ignore when looking for source files.
+exclude_patterns = ['output']
+
+# The reST default role (used for this markup: `text`) to use for all
+# documents.
+#default_role = None
+
+# If true, '()' will be appended to :func: etc. cross-reference text.
+#add_function_parentheses = True
+
+# If true, the current module name will be prepended to all description
+# unit titles (such as .. function::).
+#add_module_names = True
+
+# If true, sectionauthor and moduleauthor directives will be shown in the
+# output. They are ignored by default.
+#show_authors = False
+
+# The name of the Pygments (syntax highlighting) style to use.
+pygments_style = 'sphinx'
+
+# A list of ignored prefixes for module index sorting.
+#modindex_common_prefix = []
+
+# If true, keep warnings as "system message" paragraphs in the built documents.
+#keep_warnings = False
+
+# If true, `todo` and `todoList` produce output, else they produce nothing.
+todo_include_todos = False
+
+primary_domain = 'c'
+highlight_language = 'none'
+
+# -- Options for HTML output ----------------------------------------------
+
+# The theme to use for HTML and HTML Help pages.  See the documentation for
+# a list of builtin themes.
+
+# The Read the Docs theme is available from
+# - https://github.com/snide/sphinx_rtd_theme
+# - https://pypi.python.org/pypi/sphinx_rtd_theme
+# - python-sphinx-rtd-theme package (on Debian)
+try:
+    import sphinx_rtd_theme
+    html_theme = 'sphinx_rtd_theme'
+    extensions.append('sphinx_rtd_theme')
+except ImportError:
+    sys.stderr.write('Warning: The Sphinx \'sphinx_rtd_theme\' HTML theme was not found. Make sure you have the theme installed to produce pretty HTML output. Falling back to the default theme.\n')
+
+# Theme options are theme-specific and customize the look and feel of a theme
+# further.  For a list of options available for each theme, see the
+# documentation.
+#html_theme_options = {}
+
+# Add any paths that contain custom themes here, relative to this directory.
+#html_theme_path = []
+
+# The name for this set of Sphinx documents.  If None, it defaults to
+# "<project> v<release> documentation".
+#html_title = None
+
+# A shorter title for the navigation bar.  Default is the same as html_title.
+#html_short_title = None
+
+# The name of an image file (relative to this directory) to place at the top
+# of the sidebar.
+html_logo = '../tools/logos/u-boot_logo.svg'
+
+# The name of an image file (within the static path) to use as favicon of the
+# docs.  This file should be a Windows icon file (.ico) being 16x16 or 32x32
+# pixels large.
+#html_favicon = None
+
+# Add any paths that contain custom static files (such as style sheets) here,
+# relative to this directory. They are copied after the builtin static files,
+# so a file named "default.css" will overwrite the builtin "default.css".
+
+html_static_path = ['sphinx-static']
+
+html_context = {
+    'css_files': [
+        '_static/theme_overrides.css',
+    ],
+}
+
+# Add any extra paths that contain custom files (such as robots.txt or
+# .htaccess) here, relative to this directory. These files are copied
+# directly to the root of the documentation.
+#html_extra_path = []
+
+# If not '', a 'Last updated on:' timestamp is inserted at every page bottom,
+# using the given strftime format.
+#html_last_updated_fmt = '%b %d, %Y'
+
+# If true, SmartyPants will be used to convert quotes and dashes to
+# typographically correct entities.
+html_use_smartypants = False
+
+# Custom sidebar templates, maps document names to template names.
+#html_sidebars = {}
+
+# Additional templates that should be rendered to pages, maps page names to
+# template names.
+#html_additional_pages = {}
+
+# If false, no module index is generated.
+#html_domain_indices = True
+
+# If false, no index is generated.
+#html_use_index = True
+
+# If true, the index is split into individual pages for each letter.
+#html_split_index = False
+
+# If true, links to the reST sources are added to the pages.
+#html_show_sourcelink = True
+
+# If true, "Created using Sphinx" is shown in the HTML footer. Default is True.
+#html_show_sphinx = True
+
+# If true, "(C) Copyright ..." is shown in the HTML footer. Default is True.
+#html_show_copyright = True
+
+# If true, an OpenSearch description file will be output, and all pages will
+# contain a <link> tag referring to it.  The value of this option must be the
+# base URL from which the finished HTML is served.
+#html_use_opensearch = ''
+
+# This is the file name suffix for HTML files (e.g. ".xhtml").
+#html_file_suffix = None
+
+# Language to be used for generating the HTML full-text search index.
+# Sphinx supports the following languages:
+#   'da', 'de', 'en', 'es', 'fi', 'fr', 'h', 'it', 'ja'
+#   'nl', 'no', 'pt', 'ro', 'r', 'sv', 'tr'
+#html_search_language = 'en'
+
+# A dictionary with options for the search language support, empty by default.
+# Now only 'ja' uses this config value
+#html_search_options = {'type': 'default'}
+
+# The name of a javascript file (relative to the configuration directory) that
+# implements a search results scorer. If empty, the default will be used.
+#html_search_scorer = 'scorer.js'
+
+# Output file base name for HTML help builder.
+htmlhelp_basename = 'TheUBootdoc'
+
+# -- Options for LaTeX output ---------------------------------------------
+
+latex_elements = {
+    # The paper size ('letterpaper' or 'a4paper').
+    'papersize': 'a4paper',
+
+    # The font size ('10pt', '11pt' or '12pt').
+    'pointsize': '11pt',
+
+    # Latex figure (float) alignment
+    #'figure_align': 'htbp',
+
+    # Don't mangle with UTF-8 chars
+    'inputenc': '',
+    'utf8extra': '',
+
+    # Set document margins
+    'sphinxsetup': '''
+        hmargin=0.5in, vmargin=1in,
+        parsedliteralwraps=true,
+        verbatimhintsturnover=false,
+    ''',
+
+    # Additional stuff for the LaTeX preamble.
+    'preamble': '''
+        % Use some font with UTF-8 support with XeLaTeX
+        \\usepackage{fontspec}
+        \\setsansfont{DejaVu Sans}
+        \\setromanfont{DejaVu Serif}
+        \\setmonofont{DejaVu Sans Mono}
+     ''',
+}
+
+# At least one book (translations) may have Asian characters
+# with are only displayed if xeCJK is used
+
+cjk_cmd = check_output(['fc-list', '--format="%{family[0]}\n"']).decode('utf-8', 'ignore')
+if cjk_cmd.find("Noto Sans CJK SC") >= 0:
+    print ("enabling CJK for LaTeX builder")
+    latex_elements['preamble']  += '''
+	% This is needed for translations
+        \\usepackage{xeCJK}
+        \\setCJKmainfont{Noto Sans CJK SC}
+     '''
+
+# With Sphinx 1.6, it is possible to change the Bg color directly
+# by using:
+#	\definecolor{sphinxnoteBgColor}{RGB}{204,255,255}
+#	\definecolor{sphinxwarningBgColor}{RGB}{255,204,204}
+#	\definecolor{sphinxattentionBgColor}{RGB}{255,255,204}
+#	\definecolor{sphinximportantBgColor}{RGB}{192,255,204}
+#
+# However, it require to use sphinx heavy box with:
+#
+#	\renewenvironment{sphinxlightbox} {%
+#		\\begin{sphinxheavybox}
+#	}
+#		\\end{sphinxheavybox}
+#	}
+#
+# Unfortunately, the implementation is buggy: if a note is inside a
+# table, it isn't displayed well. So, for now, let's use boring
+# black and white notes.
+
+# Grouping the document tree into LaTeX files. List of tuples
+# (source start file, target name, title,
+#  author, documentclass [howto, manual, or own class]).
+# Sorted in alphabetical order
+latex_documents = [
+    ('index', 'u-boot-hacker-manual.tex', 'U-Boot Hacker Manual',
+     'The U-Boot development community', 'manual'),
+]
+
+# Add all other index files from Documentation/ subdirectories
+for fn in os.listdir('.'):
+    doc = os.path.join(fn, "index")
+    if os.path.exists(doc + ".rst"):
+        has = False
+        for l in latex_documents:
+            if l[0] == doc:
+                has = True
+                break
+        if not has:
+            latex_documents.append((doc, fn + '.tex',
+                                    'U-Boot %s Documentation' % fn.capitalize(),
+                                    'The U-Boot development community',
+                                    'manual'))
+
+# The name of an image file (relative to this directory) to place at the top of
+# the title page.
+#latex_logo = None
+
+# For "manual" documents, if this is true, then toplevel headings are parts,
+# not chapters.
+#latex_use_parts = False
+
+# If true, show page references after internal links.
+#latex_show_pagerefs = False
+
+# If true, show URL addresses after external links.
+#latex_show_urls = False
+
+# Documents to append as an appendix to all manuals.
+#latex_appendices = []
+
+# If false, no module index is generated.
+#latex_domain_indices = True
+
+
+# -- Options for manual page output ---------------------------------------
+
+# One entry per manual page. List of tuples
+# (source start file, name, description, authors, manual section).
+man_pages = [
+    (master_doc, 'u-boot', 'The U-Boot Documentation',
+     [author], 1)
+]
+
+# If true, show URL addresses after external links.
+#man_show_urls = False
+
+
+# -- Options for Texinfo output -------------------------------------------
+
+# Grouping the document tree into Texinfo files. List of tuples
+# (source start file, target name, title, author,
+#  dir menu entry, description, category)
+texinfo_documents = [
+    (master_doc, 'u-boot', 'The U-Boot Documentation',
+     author, 'U-Boot', 'Boot loader for embedded systems',
+     'Miscellaneous'),
+]
+
+# Documents to append as an appendix to all manuals.
+#texinfo_appendices = []
+
+# If false, no module index is generated.
+#texinfo_domain_indices = True
+
+# How to display URL addresses: 'footnote', 'no', or 'inline'.
+#texinfo_show_urls = 'footnote'
+
+# If true, do not generate a @detailmenu in the "Top" node's menu.
+#texinfo_no_detailmenu = False
+
+
+# -- Options for Epub output ----------------------------------------------
+
+# Bibliographic Dublin Core info.
+epub_title = project
+epub_author = author
+epub_publisher = author
+epub_copyright = copyright
+
+# The basename for the epub file. It defaults to the project name.
+#epub_basename = project
+
+# The HTML theme for the epub output. Since the default themes are not
+# optimized for small screen space, using the same theme for HTML and epub
+# output is usually not wise. This defaults to 'epub', a theme designed to save
+# visual space.
+#epub_theme = 'epub'
+
+# The language of the text. It defaults to the language option
+# or 'en' if the language is not set.
+#epub_language = ''
+
+# The scheme of the identifier. Typical schemes are ISBN or URL.
+#epub_scheme = ''
+
+# The unique identifier of the text. This can be a ISBN number
+# or the project homepage.
+#epub_identifier = ''
+
+# A unique identification for the text.
+#epub_uid = ''
+
+# A tuple containing the cover image and cover page html template filenames.
+#epub_cover = ()
+
+# A sequence of (type, uri, title) tuples for the guide element of content.opf.
+#epub_guide = ()
+
+# HTML files that should be inserted before the pages created by sphinx.
+# The format is a list of tuples containing the path and title.
+#epub_pre_files = []
+
+# HTML files that should be inserted after the pages created by sphinx.
+# The format is a list of tuples containing the path and title.
+#epub_post_files = []
+
+# A list of files that should not be packed into the epub file.
+epub_exclude_files = ['search.html']
+
+# The depth of the table of contents in toc.ncx.
+#epub_tocdepth = 3
+
+# Allow duplicate toc entries.
+#epub_tocdup = True
+
+# Choose between 'default' and 'includehidden'.
+#epub_tocscope = 'default'
+
+# Fix unsupported image types using the Pillow.
+#epub_fix_images = False
+
+# Scale large images.
+#epub_max_image_width = 0
+
+# How to display URL addresses: 'footnote', 'no', or 'inline'.
+#epub_show_urls = 'inline'
+
+# If false, no index is generated.
+#epub_use_index = True
+
+#=======
+# rst2pdf
+#
+# Grouping the document tree into PDF files. List of tuples
+# (source start file, target name, title, author, options).
+#
+# See the Sphinx chapter of https://ralsina.me/static/manual.pdf
+#
+# FIXME: Do not add the index file here; the result will be too big. Adding
+# multiple PDF files here actually tries to get the cross-referencing right
+# *between* PDF files.
+pdf_documents = [
+    ('uboot-documentation', u'U-Boot', u'U-Boot', u'J. Random Bozo'),
+]
+
+# kernel-doc extension configuration for running Sphinx directly (e.g. by Read
+# the Docs). In a normal build, these are supplied from the Makefile via command
+# line arguments.
+kerneldoc_bin = '../scripts/kernel-doc'
+kerneldoc_srctree = '..'
+
+# ------------------------------------------------------------------------------
+# Since loadConfig overwrites settings from the global namespace, it has to be
+# the last statement in the conf.py file
+# ------------------------------------------------------------------------------
+loadConfig(globals())
diff --git a/doc/develop/bloblist.rst b/doc/develop/bloblist.rst
new file mode 100644
index 00000000000..28431039adc
--- /dev/null
+++ b/doc/develop/bloblist.rst
@@ -0,0 +1,108 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Blob Lists - bloblist
+=====================
+
+Introduction
+------------
+
+A bloblist provides a way to store collections of binary information (blobs) in
+a central structure. Each record of information is assigned a tag so that its
+owner can find it and update it. Each record is generally described by a C
+structure defined by the code that owns it.
+
+For the design goals of bloblist, please see the comments at the top of the
+`bloblist.h` header file.
+
+Bloblist is an implementation with the `Firmware Handoff`_ protocol.
+
+Passing state through the boot process
+--------------------------------------
+
+The bloblist is created when the first U-Boot component runs (often SPL,
+sometimes TPL). It is passed through to each successive part of the boot and
+can be accessed as needed. This provides a way to transfer state from one part
+to the next. For example, TPL may determine that a watchdog reset occurred by
+reading an SoC register. Reading the register may reset the value, so that it
+cannot be read a second time. So TPL can store that in a bloblist record which
+can be passed through to SPL and U-Boot proper, which can print a message
+indicating that something went wrong and the watchdog fired.
+
+
+Blobs
+-----
+
+While each blob in the bloblist can be of any length, bloblists are designed to
+hold small amounts of data, typically a few KB at most. It is not possible to
+change the length of a blob once it has been written. Each blob is normally
+created from a C structure which can be used to access its fields.
+
+
+Blob tags
+---------
+
+Each blob has a tag which is a 32-bit number. This uniquely identifies the
+owner of the blob. Blob tags are listed in enum blob_tag_t and are named
+with a `BLOBT_` prefix.
+
+
+Single structure
+----------------
+
+There is normally only one bloblist in U-Boot. Since a bloblist can store
+multiple blobs it does not seem useful to allow multiple bloblists. Of course
+there could be reasons for this, such as needing to spread the blobs around in
+different memory areas due to fragmented memory, but it is simpler to just have
+a single bloblist.
+
+
+API
+---
+
+Bloblist provides a fairly simple API which allows blobs to be created and
+found. All access is via the blob's tag. Blob records are zeroed when added.
+
+
+Placing the bloblist
+--------------------
+
+The bloblist is typically positioned at a fixed address by TPL, or SPL. This
+is controlled by `CONFIG_BLOBLIST_ADDR`. But in some cases it is preferable to
+allocate the bloblist in the malloc() space. Use the `CONFIG_BLOBLIST_ALLOC`
+option to enable this.
+
+The bloblist is automatically relocated as part of U-Boot relocation. Sometimes
+it is useful to expand the bloblist in U-Boot proper, since it may want to add
+information for use by Linux. Note that this does not mean that Linux needs to
+know anything about the bloblist format, just that it is convenient to use
+bloblist to place things contiguously in memory. Set
+`CONFIG_BLOBLIST_SIZE_RELOC` to define the expanded size, if needed.
+
+
+Finishing the bloblist
+----------------------
+
+When a part of U-Boot is about to jump to the next part, it can 'finish' the
+bloblist in preparation for the next stage. This involves adding a checksum so
+that the next stage can make sure that the data arrived safely. While the
+bloblist is in use, changes can be made which will affect the checksum, so it
+is easier to calculate the checksum at the end after all changes are made.
+
+
+Future work
+-----------
+
+Bootstage has a mechanism to 'stash' its records for passing to the next part.
+This should move to using bloblist, to avoid having its own mechanism for
+passing information between U-Boot parts.
+
+
+API documentation
+-----------------
+
+.. kernel-doc:: include/bloblist.h
+.. _`Firmware Handoff`: https://github.com/FirmwareHandoff/firmware_handoff
+
+Simon Glass
+sjg@chromium.org
+12-Aug-2018
diff --git a/doc/develop/board_best_practices.rst b/doc/develop/board_best_practices.rst
new file mode 100644
index 00000000000..09632c80ce7
--- /dev/null
+++ b/doc/develop/board_best_practices.rst
@@ -0,0 +1,26 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+Best Practices for Board Ports
+==============================
+
+In addition to the regular best practices such as using :doc:`checkpatch` and
+following the :doc:`docstyle` and the :doc:`codingstyle` there are some things
+which are specific to creating a new board port.
+
+* Implement :doc:`bootstd/index` to ensure that most operating systems will be
+  supported by the platform.
+
+* The platform defconfig file must be generated via `make savedefconfig`.
+
+* The Kconfig and Kbuild infrastructure supports using "fragments" that can be
+  used to apply changes on top of a defconfig file. These can be useful for
+  many things such as:
+
+  * Supporting different firmware locations (e.g. eMMC, SD, QSPI).
+
+  * Multiple board variants when runtime detection is not desired.
+
+  * Supporting different build types such as production and development.
+
+  Kconfig fragments should reside in the board directory itself rather than in
+  the top-level `configs/` directory.
diff --git a/doc/develop/bootstd/cros.rst b/doc/develop/bootstd/cros.rst
new file mode 100644
index 00000000000..85af10588c1
--- /dev/null
+++ b/doc/develop/bootstd/cros.rst
@@ -0,0 +1,33 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+ChromiumOS Bootmeth
+===================
+
+ChromiumOS provides a mechanism for booting its Operating System from a block
+device, described
+`here <https://www.chromium.org/chromium-os/chromiumos-design-docs/verified-boot/>`_.
+
+U-Boot includes support for reading the associated data structures from the
+device and identifying a bootable ChromiumOS image. This structure includes the
+kernel itself, boot arguments (kernel command line), as well as the x86 setup
+block (for x86 only).
+
+When invoked on a bootdev, this bootmeth searches for kernel partitions with
+the appropriate GUID (Globally Unique Identifier). When found, the information
+is loaded and a bootflow is created.
+
+When the bootflow is booted, the bootmeth reads the kernel and boot arguments.
+It then boots the kernel using zboot (on x86) or bootm (on ARM). The boot
+arguments are adjusted to replace `%U` with the UUID of the selected kernel
+partition. This results in the correct root disk being used, which is the next
+partition after the kernel partition.
+
+For ARM, a :doc:`/usage/fit/index` is used. The `CONFIG_FIT_BEST_MATCH` option
+must be enabled for U-Boot to select the correct devicetree to boot with.
+
+Note that a ChromiumOS image typically has two copies of the Operating System,
+each with its own kernel and root disk. There is no initial ramdisk (initrd).
+This means that this bootmeth typically locates two separate images.
+
+The compatible string "u-boot,cros" is used for the driver. It is present
+if `CONFIG_BOOTMETH_CROS` is enabled.
diff --git a/doc/develop/bootstd/extlinux.rst b/doc/develop/bootstd/extlinux.rst
new file mode 100644
index 00000000000..bf27dc57aaa
--- /dev/null
+++ b/doc/develop/bootstd/extlinux.rst
@@ -0,0 +1,29 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+Extlinux Bootmeth
+=================
+
+`Extlinux <https://uapi-group.org/specifications/specs/boot_loader_specification>`_
+(sometimes called syslinux) allows U-Boot to provide a menu of available
+operating systems from which the user can choose.
+
+U-Boot includes a parser for the `extlinux.conf` file. It consists primarily of
+a list of named operating systems along with the kernel, initial ramdisk and
+other settings. The file is stored in the `extlinux/` subdirectory, possibly
+under the `boot/` subdirectory. This list of prefixes (``{"/", "/boot"}`` by
+default) can be selected with the `filename-prefixes` property in the bootstd
+device.
+
+Note that the :doc:`pxelinux` uses the same file format, but in a
+network context.
+
+When invoked on a bootdev, this bootmeth searches for the file and creates a
+bootflow if found.
+
+When the bootflow is booted, the bootmeth calls ``pxe_setup_ctx()`` to set up
+the context, then ``pxe_process()`` to process the file. Depending on the
+contents, this may boot an operating system or provide a list of options to
+the user, perhaps with a timeout.
+
+The compatible string "u-boot,extlinux" is used for the driver. It is present
+if `CONFIG_BOOTMETH_EXTLINUX` is enabled.
diff --git a/doc/develop/bootstd/index.rst b/doc/develop/bootstd/index.rst
new file mode 100644
index 00000000000..9d35b567d55
--- /dev/null
+++ b/doc/develop/bootstd/index.rst
@@ -0,0 +1,15 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+Standard Boot
+=============
+
+.. toctree::
+   :maxdepth: 2
+
+   overview
+   extlinux
+   pxelinux
+   qfw
+   cros
+   script
+   sandbox
diff --git a/doc/develop/bootstd/overview.rst b/doc/develop/bootstd/overview.rst
new file mode 100644
index 00000000000..ff3cc48eb64
--- /dev/null
+++ b/doc/develop/bootstd/overview.rst
@@ -0,0 +1,827 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+Standard Boot Overview
+======================
+
+Introduction
+------------
+
+Standard boot provides a built-in way for U-Boot to automatically boot
+an Operating System without custom scripting and other customisation. It
+introduces the following concepts:
+
+   - bootdev  - a device which can hold or access a distro (e.g. MMC, Ethernet)
+   - bootmeth - a method to scan a bootdev to find bootflows (e.g. distro boot)
+   - bootflow - a description of how to boot (provided by the distro)
+
+For Linux, the distro (Linux distribution, e.g. Debian, Fedora) is responsible
+for creating a bootflow for each kernel combination that it wants to offer.
+These bootflows are stored on media so they can be discovered by U-Boot. This
+feature is typically called `distro boot` (see :doc:`../distro`) because it is
+a way for distributions to boot on any hardware.
+
+Traditionally U-Boot has relied on scripts to implement this feature. See
+distro_bootcmd_ for details. This is done because U-Boot has no native support
+for scanning devices. While the scripts work remarkably well, they can be hard
+to understand and extend, and the feature does not include tests. They are also
+making it difficult to move away from ad-hoc CONFIGs, since they are implemented
+using the environment and a lot of #defines.
+
+Standard boot is a generalisation of distro boot. It provides a more built-in
+way to boot with U-Boot. The feature is extensible to different Operating
+Systems (such as Chromium OS) and devices (beyond just block and network
+devices). It supports EFI boot and EFI bootmgr too.
+
+Finally, standard boot supports the operation of :doc:`../vbe`.
+
+Bootflow
+--------
+
+A bootflow is a file that describes how to boot a distro. Conceptually there can
+be different formats for that file but at present U-Boot only supports the
+BootLoaderSpec_ format which looks something like this::
+
+   menu autoboot Welcome to Fedora-Workstation-armhfp-31-1.9. Automatic boot in # second{,s}. Press a key for options.
+   menu title Fedora-Workstation-armhfp-31-1.9 Boot Options.
+   menu hidden
+
+   label Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+       kernel /vmlinuz-5.3.7-301.fc31.armv7hl
+       append ro root=UUID=9732b35b-4cd5-458b-9b91-80f7047e0b8a rhgb quiet LANG=en_US.UTF-8 cma=192MB cma=256MB
+       fdtdir /dtb-5.3.7-301.fc31.armv7hl/
+       initrd /initramfs-5.3.7-301.fc31.armv7hl.img
+
+As you can see it specifies a kernel, a ramdisk (initrd) and a directory from
+which to load Device Tree files. The details are described in distro_bootcmd_.
+
+The bootflow is provided by the distro. It is not part of U-Boot. U-Boot's job
+is simply to interpret the file and carry out the instructions. This allows
+distros to boot on essentially any device supported by U-Boot.
+
+Typically the first available bootflow is selected and booted. If that fails,
+then the next one is tried.
+
+
+Bootdev
+-------
+
+Where does U-Boot find the media that holds the operating systems? That is the
+job of bootdev. A bootdev is simply a layer on top of a media device (such as
+MMC, NVMe). The bootdev accesses the device, including partitions and
+filesystems that might contain things related to an operating system.
+
+For example, an MMC bootdev provides access to the individual partitions on the
+MMC device. It scans through these to find filesystems with the boot flag set,
+then provides a list of these for consideration.
+
+Some bootdevs are not visible until a bus is enumerated, e.g. flash sticks
+attached via USB. To deal with this, each bootdev has an associated 'hunter'
+which can hunt for bootdevs of a particular uclass type. For example, the SCSI
+bootdev scans the SCSI bus looking for devices, creating a bootdev for each
+Logical Unit Number (LUN) that it finds.
+
+
+Bootmeth
+--------
+
+Once the list of filesystems is provided, how does U-Boot find the bootflow
+files in these filesystems? That is the job of bootmeth. Each boot method has
+its own way of doing this.
+
+For example, the distro bootmeth simply looks through the provided filesystem
+for a file called `extlinux/extlinux.conf`. This files constitutes a bootflow.
+If the distro bootmeth is used on multiple partitions it may produce multiple
+bootflows.
+
+Note: it is possible to have a bootmeth that uses a partition or a whole device
+directly, but it is more common to use a filesystem.
+For example, the Android bootmeth uses a whole device.
+
+Note that some bootmeths are 'global', meaning that they select the bootdev
+themselves. Examples include VBE and EFI boot manager. In this case, they
+provide a `read_bootflow()` method which checks whatever bootdevs it likes, then
+returns the bootflow, if found. Some of these bootmeths may be very slow, if
+they scan a lot of devices.
+
+
+Boot process
+------------
+
+U-Boot tries to use the 'lazy init' approach wherever possible and distro boot
+is no exception. The algorithm is::
+
+   while (get next bootdev)
+      while (get next bootmeth)
+          while (get next bootflow)
+              try to boot it
+
+So U-Boot works its way through the bootdevs, trying each bootmeth in turn to
+obtain bootflows, until it either boots or exhausts the available options.
+
+Instead of 500 lines of #defines and a 4KB boot script, all that is needed is
+the following command::
+
+   bootflow scan -lb
+
+which scans for available bootflows, optionally listing each find it finds (-l)
+and trying to boot it (-b).
+
+When global bootmeths are available, these are typically checked before the
+above bootdev scanning.
+
+
+Controlling ordering
+--------------------
+
+By default, faster bootdevs (or those which are assumed to be faster) are used
+first, since they are more likely to be able to boot the device quickly.
+
+Several options are available to control the ordering of boot scanning:
+
+
+boot_targets
+~~~~~~~~~~~~
+
+This environment variable can be used to control the list of bootdevs searched
+and their ordering, for example::
+
+   setenv boot_targets "mmc0 mmc1 usb pxe"
+
+Entries may be removed or re-ordered in this list to affect the boot order. If
+the variable is empty, the default ordering is used, based on the priority of
+bootdevs and their sequence numbers.
+
+
+bootmeths
+~~~~~~~~~
+
+By default bootmeths are checked in name order. Use `bootmeth list` to see the
+ordering. Note that the `extlinux` and `script` bootmeth is first, to preserve the behaviour
+used by the old distro scripts.
+
+This environment variable can be used to control the list of bootmeths used and
+their ordering for example::
+
+   setenv bootmeths "extlinux efi"
+
+Entries may be removed or re-ordered in this list to affect the order the
+bootmeths are tried on each bootdev. If the variable is empty, the default
+ordering is used, based on the bootmeth sequence numbers, which can be
+controlled by aliases.
+
+The :ref:`usage/cmd/bootmeth:bootmeth command` (`bootmeth order`) operates in
+the same way as setting this variable.
+
+Bootdev uclass
+--------------
+
+The bootdev uclass provides a simple API call to obtain a bootflow from a
+device::
+
+   int bootdev_get_bootflow(struct udevice *dev, struct bootflow_iter *iter,
+                            struct bootflow *bflow);
+
+This takes an iterator which indicates the bootdev, partition and bootmeth to
+use. It returns a bootflow. This is the core of the bootdev implementation. The
+bootdev drivers that implement this differ depending on the media they are
+reading from, but each is responsible for returning a valid bootflow if
+available.
+
+A helper called `bootdev_find_in_blk()` makes it fairly easy to implement this
+function for each media device uclass, in a few lines of code. For many types
+of bootdevs, the `get_bootflow` member can be NULL, indicating that the default
+handler is used. This is called `default_get_bootflow()` and it only works with
+block devices.
+
+
+Bootdev drivers
+---------------
+
+A bootdev driver is typically fairly simple. Here is one for MMC::
+
+    static int mmc_bootdev_bind(struct udevice *dev)
+    {
+        struct bootdev_uc_plat *ucp = dev_get_uclass_plat(dev);
+
+        ucp->prio = BOOTDEVP_2_INTERNAL_FAST;
+
+        return 0;
+    }
+
+    struct bootdev_ops mmc_bootdev_ops = {
+    };
+
+    static const struct udevice_id mmc_bootdev_ids[] = {
+        { .compatible = "u-boot,bootdev-mmc" },
+        { }
+    };
+
+    U_BOOT_DRIVER(mmc_bootdev) = {
+        .name        = "mmc_bootdev",
+        .id        = UCLASS_BOOTDEV,
+        .ops        = &mmc_bootdev_ops,
+        .bind        = mmc_bootdev_bind,
+        .of_match    = mmc_bootdev_ids,
+    };
+
+You may notice that the `get_bootflow` memory is not provided, so is NULL. This
+means that `default_get_bootflow()` is used. This simply obtains the
+block device and calls a bootdev helper function to do the rest. The
+implementation of `bootdev_find_in_blk()` checks the partition table, and
+attempts to read a file from a filesystem on the partition number given by the
+`@iter->part` parameter. If there are any bootable partitions in the table,
+then only bootable partitions are considered.
+
+Each bootdev has a priority, which indicates the order in which it is used,
+if `boot_targets` is not used. Faster bootdevs are used first, since they are
+more likely to be able to boot the device quickly.
+
+
+Environment Variables
+---------------------
+
+Various environment variables are used by standard boot. These allow the board
+to control where things are placed when booting the OS. You should ensure that
+your boards sets values for these.
+
+fdtfile
+    Name of the flattened device tree (FDT) file to load, e.g.
+    "rockchip/rk3399-rockpro64.dtb"
+
+fdt_addr_r
+    Address at which to load the FDT, e.g. 0x01f00000
+
+fdtoverlay_addr_r (needed if overlays are used)
+    Address at which to load the overlay for the FDT, e.g. 0x02000000
+
+kernel_addr_r
+    Address at which to load the kernel, e.g. 0x02080000
+
+kernel_comp_addr_r
+    Address to which to decompress the kernel, e.g. 0x08000000
+
+kernel_comp_size
+    Size of available space for decompressed kernel, e.g. 0x2000000
+
+pxefile_addr_r
+    Address at which to load the PXE file, e.g. 0x00600000
+
+ramdisk_addr_r
+    Address at which to load the ramdisk, e.g. 0x06000000
+
+scriptaddr
+    Address at which to load the U-Boot script, e.g. 0x00500000
+
+script_offset_f
+    SPI flash offset from which to load the U-Boot script, e.g. 0xffe000
+
+script_size_f
+    Size of the script to load, e.g. 0x2000
+
+vendor_boot_comp_addr_r
+    Address to which to load the vendor_boot Android image, e.g. 0xe0000000
+
+Some variables are set by script bootmeth:
+
+devtype
+    Device type being used for boot, e.g. mmc
+
+devnum
+    Device number being used for boot, e.g. 1
+
+distro_bootpart
+    Partition being used for boot, e.g. 2
+
+prefix
+    Directory containing the script
+
+mmc_bootdev
+    Device number being used for boot (e.g. 1). This is only used by MMC on
+    sunxi boards.
+
+
+Device hierarchy
+----------------
+
+A bootdev device is a child of the media device. In this example, you can see
+that the bootdev is a sibling of the block device and both are children of
+media device::
+
+    mmc           0  [ + ]   bcm2835-sdhost        |   |-- mmc@7e202000
+    blk           0  [ + ]   mmc_blk               |   |   |-- mmc@7e202000.blk
+    bootdev       0  [   ]   mmc_bootdev           |   |   `-- mmc@7e202000.bootdev
+    mmc           1  [ + ]   sdhci-bcm2835         |   |-- sdhci@7e300000
+    blk           1  [   ]   mmc_blk               |   |   |-- sdhci@7e300000.blk
+    bootdev       1  [   ]   mmc_bootdev           |   |   `-- sdhci@7e300000.bootdev
+
+The bootdev device is typically created automatically in the media uclass'
+`post_bind()` method by calling `bootdev_setup_for_dev()` or
+`bootdev_setup_for_sibling_blk()`. The code typically something like this::
+
+    /* dev is the Ethernet device */
+    ret = bootdev_setup_for_dev(dev, "eth_bootdev");
+    if (ret)
+        return log_msg_ret("bootdev", ret);
+
+or::
+
+    /* blk is the block device (child of MMC device)
+    ret = bootdev_setup_for_sibling_blk(blk, "mmc_bootdev");
+    if (ret)
+        return log_msg_ret("bootdev", ret);
+
+
+Here, `eth_bootdev` is the name of the Ethernet bootdev driver and `dev`
+is the Ethernet device. This function is safe to call even if standard boot is
+not enabled, since it does nothing in that case. It can be added to all uclasses
+which implement suitable media.
+
+
+The bootstd device
+------------------
+
+Standard boot requires a single instance of the bootstd device to make things
+work. This includes global information about the state of standard boot. See
+`struct bootstd_priv` for this structure, accessed with `bootstd_get_priv()`.
+
+Within the Device Tree, if you add bootmeth devices, they should be children of
+the bootstd device. See `arch/sandbox/dts/test.dts` for an example of this.
+
+
+.. _`Automatic Devices`:
+
+Automatic devices
+-----------------
+
+It is possible to define all the required devices in the Device Tree manually,
+but it is not necessary. The bootstd uclass includes a `dm_scan_other()`
+function which creates the bootstd device if not found. If no bootmeth devices
+are found at all, it creates one for each available bootmeth driver.
+
+If your Device Tree has any bootmeth device it must have all of them that you
+want to use, since no bootmeth devices will be created automatically in that
+case.
+
+
+Using devicetree
+----------------
+
+If a bootdev is complicated or needs configuration information, it can be
+added to the Device Tree as a child of the media device. For example, imagine a
+bootdev which reads a bootflow from SPI flash. The Device Tree fragment might
+look like this::
+
+    spi@0 {
+        flash@0 {
+            reg = <0>;
+            compatible = "spansion,m25p16", "jedec,spi-nor";
+            spi-max-frequency = <40000000>;
+
+            bootdev {
+                compatible = "u-boot,sf-bootdev";
+                offset = <0x2000>;
+                size = <0x1000>;
+            };
+        };
+    };
+
+The `sf-bootdev` driver can implement a way to read from the SPI flash, using
+the offset and size provided, and return that bootflow file back to the caller.
+When distro boot wants to read the kernel it calls distro_getfile() which must
+provide a way to read from the SPI flash. See `distro_boot()` at distro_boot_
+for more details.
+
+Of course this is all internal to U-Boot. All the distro sees is another way
+to boot.
+
+
+Configuration
+-------------
+
+Standard boot is enabled with `CONFIG_BOOTSTD`. Each bootmeth has its own CONFIG
+option also. For example, `CONFIG_BOOTMETH_EXTLINUX` enables support for
+booting from a disk using an `extlinux.conf` file.
+
+To enable all features of standard boot, use `CONFIG_BOOTSTD_FULL`. This
+includes the full set of commands, more error messages when things go wrong and
+bootmeth ordering with the bootmeths environment variable.
+
+You should probably also enable `CONFIG_BOOTSTD_DEFAULTS`, which provides
+several filesystem and network features (if `CONFIG_NET` is enabled) so that
+a good selection of boot options is available.
+
+Some devicetree properties are supported in the bootstd node when
+`CONFIG_BOOTSTD_FULL` is enabled:
+
+    filename-prefixes
+        List of prefixes to use when searching for files on block devices. This
+        defaults to {"/", "/boot/"} if not provided.
+
+    bootdev-order
+        Lists the bootdev ordering to use. Note that the deprecated
+        `boot_targets` environment variable overrides this, if present.
+
+    theme (subnode)
+        Sets the theme to use for menus. See :doc:`/develop/expo`.
+
+Available bootmeth drivers
+--------------------------
+
+Bootmeth drivers are provided for booting from various media:
+
+   - Android bootflow (boot image v4)
+   - :doc:`ChromiumOS <cros>` ChromiumOS boot from a disk
+   - EFI boot using bootefi from disk
+   - EFI boot using boot manager
+   - :doc:`extlinux / syslinux <extlinux>` boot from a storage device
+   - :doc:`extlinux / syslinux <extlinux>` boot from a network (PXE)
+   - :doc:`sandbox <sandbox>` used only for testing
+   - :doc:`U-Boot scripts <script>` from disk, network or SPI flash
+   - :doc:`QFW <qfw>`: QEMU firmware interface
+   - :doc:`VBE </develop/vbe>`: Verified Boot for Embedded
+
+Each driver is controlled by a Kconfig option. If no bootmeth driver is
+selected by a compatible string in the devicetree, all available bootmeth
+drivers are bound automatically.
+
+Command interface
+-----------------
+
+Three commands are available:
+
+`bootdev`
+    Allows listing of available bootdevs, selecting a particular one and
+    getting information about it. See :doc:`/usage/cmd/bootdev`
+
+`bootflow`
+    Allows scanning one or more bootdevs for bootflows, listing available
+    bootflows, selecting one, obtaining information about it and booting it.
+    See :doc:`/usage/cmd/bootflow`
+
+`bootmeth`
+    Allow listing of available bootmethds and setting the order in which they
+    are tried. See :doc:`/usage/cmd/bootmeth`
+
+.. _BootflowStates:
+
+Bootflow states
+---------------
+
+Here is a list of states that a bootflow can be in:
+
+=======  =======================================================================
+State    Meaning
+=======  =======================================================================
+base     Starting-out state, indicates that no media/partition was found. For an
+         SD card socket it may indicate that the card is not inserted.
+media    Media was found (e.g. SD card is inserted) but no partition information
+         was found. It might lack a partition table or have a read error.
+part     Partition was found but a filesystem could not be read. This could be
+         because the partition does not hold a filesystem or the filesystem is
+         very corrupted.
+fs       Filesystem was found but the file could not be read. It could be
+         missing or in the wrong subdirectory.
+file     File was found and its size detected, but it could not be read. This
+         could indicate filesystem corruption.
+ready    File was loaded and is ready for use. In this state the bootflow is
+         ready to be booted.
+=======  =======================================================================
+
+
+Migrating from distro_boot
+--------------------------
+
+To migrate from distro_boot:
+
+#. Update your board header files to remove the BOOTENV and BOOT_TARGET_xxx
+   defines. Standard boot finds available boot devices automatically.
+
+#. Remove the "boot_targets" variable unless you need it. Standard boot uses a
+   default order from fastest to slowest, which generally matches the order used
+   by boards.
+
+#. Make sure that CONFIG_BOOTSTD_DEFAULTS is enabled by your board, so it can
+   boot common Linux distributions.
+
+An example patch is at migrate_patch_.
+
+If you are using custom boot scripts for your board, consider creating your
+own bootmeth to hold the logic. There are various examples at
+`boot/bootmeth_...`.
+
+
+Theory of operation
+-------------------
+
+This describes how standard boot progresses through to booting an operating
+system.
+
+To start, all the necessary devices must be bound, including bootstd, which
+provides the top-level `struct bootstd_priv` containing optional configuration
+information. The bootstd device also holds the various lists used while
+scanning. This step is normally handled automatically by driver model, as
+described in `Automatic Devices`_.
+
+Bootdevs are also required, to provide access to the media to use. These are not
+useful by themselves: bootmeths are needed to provide the means of scanning
+those bootdevs. So, all up, we need a single bootstd device, one or more bootdev
+devices and one or more bootmeth devices.
+
+Once these are ready, typically a `bootflow scan` command is issued. This kicks
+off the iteration process, which involves hunting for bootdevs and looking
+through the bootdevs and their partitions one by one to find bootflows.
+
+Iteration is kicked off using `bootflow_scan_first()`.
+
+The iterator is set up with `bootflow_iter_init()`. This simply creates an
+empty one with the given flags. Flags are used to control whether each
+iteration is displayed, whether to return iterations even if they did not result
+in a valid bootflow, whether to iterate through just a single bootdev, etc.
+
+Then the iterator is set up to according to the parameters given:
+
+- When `dev` is provided, then a single bootdev is scanned. In this case,
+  `BOOTFLOWIF_SKIP_GLOBAL` and `BOOTFLOWIF_SINGLE_DEV` are set. No hunters are
+  used in this case
+
+- Otherwise, when `label` is provided, then a single label or named bootdev is
+  scanned. In this case `BOOTFLOWIF_SKIP_GLOBAL` is set and there are three
+  options (with an effect on the `iter_incr()` function described later):
+
+  - If `label` indicates a numeric bootdev number (e.g. "2") then
+    `BOOTFLOW_METHF_SINGLE_DEV` is set. In this case, moving to the next bootdev
+    simply stops, since there is only one. No hunters are used.
+  - If `label` indicates a particular media device (e.g. "mmc1") then
+    `BOOTFLOWIF_SINGLE_MEDIA` is set. In this case, moving to the next bootdev
+    processes just the children of the media device. Hunters are used, in this
+    example just the "mmc" hunter.
+  - If `label` indicates a particular partition in a particular media device
+    (e.g. "mmc1:3") then `BOOTFLOWIF_SINGLE_PARTITION` is set. In this case,
+    only a single partition within a bootdev is processed. Hunters are used, in
+    this example just the "mmc" hunter.
+  - If `label` indicates a media uclass (e.g. "mmc") then
+    `BOOTFLOWIF_SINGLE_UCLASS` is set. In this case, all bootdevs in that uclass
+    are used. Hunters are used, in this example just the "mmc" hunter
+
+- Otherwise, none of the above flags is set and iteration is set up to work
+  through `boot_targets` environment variable (or `bootdev-order` device tree
+  property) in order, running the relevant hunter first. In this case
+  `cur_label` is used to indicate the label being processed. If there is no list
+  of labels, then all bootdevs are processed in order of priority, running the
+  hunters as it goes.
+
+With the above it is therefore possible to iterate in a variety of ways.
+
+No attempt is made to determine the ordering of bootdevs, since this cannot be
+known in advance if we are using the hunters. Any hunter might discover a new
+bootdev and disturb the original ordering.
+
+Next, the ordering of bootmeths is determined, by `bootmeth_setup_iter_order()`.
+By default the ordering is again by sequence number, i.e. the `/aliases` node,
+or failing that the order in the Device Tree. But the `bootmeth order` command
+or `bootmeths` environment variable can be used to set up an ordering. If that
+has been done, the ordering is in `struct bootstd_priv`, so that ordering is
+simply copied into the iterator. Either way, the `method_order` array it set up,
+along with `num_methods`.
+
+Note that global bootmeths are always put at the end of the ordering. If any are
+present, `cur_method` is set to the first one, so that global bootmeths are done
+first. Once all have been used, these bootmeths are dropped from the iteration.
+When there are no global bootmeths, `cur_method` is set to 0.
+
+At this point the iterator is ready to use, with the first bootmeth selected.
+Most of the other fields are 0. This means that the current partition
+is 0, which is taken to mean the whole device, since partition numbers start at
+1. It also means that `max_part` is 0, i.e. the maximum partition number we know
+about is 0, meaning that, as far as we know, there is no partition table on this
+bootdev.
+
+With the iterator ready, `bootflow_scan_first()` checks whether the current
+settings produce a valid bootflow. This is handled by `bootflow_check()`, which
+either returns 0 (if it got something) or an error if not (more on that later).
+If the `BOOTFLOWIF_ALL` iterator flag is set, even errors are returned as
+incomplete bootflows, but normally an error results in moving onto the next
+iteration.
+
+Note that `bootflow_check()` handles global bootmeths explicitly, by calling
+`bootmeth_get_bootflow()` on each one. The `doing_global` flag indicates when
+the iterator is in that state.
+
+The `bootflow_scan_next()` function handles moving onto the next iteration and
+checking it. In fact it sits in a loop doing that repeatedly until it finds
+something it wants to return.
+
+The actual 'moving on' part is implemented in `iter_incr()`. This is a fairly
+simple function. It increments the first counter. If that hits its maximum, it
+sets it to zero and increments the second counter. You can think of all the
+counters together as a number with three digits which increment in order, with
+the least-sigificant digit on the right, counting like this:
+
+   ========    =======    =======
+   bootdev     part       method
+   ========    =======    =======
+   0           0          0
+   0           0          1
+   0           0          2
+   0           1          0
+   0           1          1
+   0           1          2
+   1           0          0
+   1           0          1
+   ...
+   ========    =======    =======
+
+The maximum value for `method` is `num_methods - 1` so when it exceeds that, it
+goes back to 0 and the next `part` is considered. The maximum value for that is
+`max_part`, which is initially zero for all bootdevs. If we find a partition
+table on that bootdev, `max_part` can be updated during the iteration to a
+higher value - see `bootdev_find_in_blk()` for that, described later. If that
+exceeds its maximum, then the next bootdev is used. In this way, iter_incr()
+works its way through all possibilities, moving forward one each time it is
+called.
+
+Note that global bootmeths introduce a subtlety into the above description.
+When `doing_global` is true, the iteration takes place only among the bootmeths,
+i.e. the last column above. The global bootmeths are at the end of the list.
+Assuming that they are entries 3 and 4 in the list, the iteration then looks
+like this:
+
+   ========    =======    =======   =======================================
+   bootdev     part       method    notes
+   ========    =======    =======   =======================================
+   .           .          3         doing_global = true, method_count = 5
+   .           .          4
+   0           0          0         doing_global = false, method_count = 3
+   0           0          1
+   0           0          2
+   0           1          0
+   0           1          1
+   0           1          2
+   1           0          0
+   1           0          1
+   ...
+   ========    =======    =======   =======================================
+
+The changeover of the value of `doing_global` from true to false is handled in
+`iter_incr()` as well.
+
+Note that the value in the `bootdev` column above is not actually stored - it is
+just for illustration. In practice, `iter_incr()` uses the flags to determine
+whether to move to the next bootdev in the uclass, the next child of the media
+device, the next label, or the next priority level, depending on the flag
+settings (see `BOOTFLOW_METHF_SINGLE_DEV`, etc. above).
+
+There is no expectation that iteration will actually finish. Quite often a
+valid bootflow is found early on. With `bootflow scan -b`, that causes the
+bootflow to be immediately booted. Assuming it is successful, the iteration never
+completes.
+
+Also note that the iterator holds the **current** combination being considered.
+So when `iter_incr()` is called, it increments to the next one and returns it,
+the new **current** combination.
+
+Note also the `err` field in `struct bootflow_iter`. This is normally 0 and has
+thus no effect on `iter_inc()`. But if it is non-zero, signalling an error,
+it indicates to the iterator what it should do when called. It can force moving
+to the next partition, or bootdev, for example. The special values
+`BF_NO_MORE_PARTS` and `BF_NO_MORE_DEVICES` handle this. When `iter_incr` sees
+`BF_NO_MORE_PARTS` it knows that it should immediately move to the next bootdev.
+When it sees `BF_NO_MORE_DEVICES` it knows that there is nothing more it can do
+so it should immediately return. The caller of `iter_incr()` is responsible for
+updating the `err` field, based on the return value it sees.
+
+The above describes the iteration process at a high level. It is basically a
+very simple increment function with a checker called `bootflow_check()` that
+checks the result of each iteration generated, to determine whether it can
+produce a bootflow.
+
+So what happens inside of `bootflow_check()`? It simply calls the uclass
+method `bootdev_get_bootflow()` to ask the bootdev to return a bootflow. It
+passes the iterator to the bootdev method, so that function knows what we are
+talking about. At first, the bootflow is set up in the state `BOOTFLOWST_BASE`,
+with just the `method` and `dev` initialised. But the bootdev may fill in more,
+e.g. updating the state, depending on what it finds. For global bootmeths the
+`bootmeth_get_bootflow()` function is called instead of
+`bootdev_get_bootflow()`.
+
+Based on what the bootdev or bootmeth responds with, `bootflow_check()` either
+returns a valid bootflow, or a partial one with an error. A partial bootflow
+is one that has some fields set up, but did not reach the `BOOTFLOWST_READY`
+state. As noted before, if the `BOOTFLOWIF_ALL` iterator flag is set, then all
+bootflows are returned, even partial ones. This can help with debugging.
+
+So at this point you can see that total control over whether a bootflow can
+be generated from a particular iteration, or not, rests with the bootdev (or
+global bootmeth). Each one can adopt its own approach.
+
+Going down a level, what does the bootdev do in its `get_bootflow()` method?
+Let us consider the MMC bootdev. In that case the call to
+`bootdev_get_bootflow()` ends up in `default_get_bootflow()`. It locates the
+parent device of the bootdev, i.e. the `UCLASS_MMC` device itself, then finds
+the block device associated with it. It then calls the helper function
+`bootdev_find_in_blk()` to do all the work. This is common with just about any
+bootdev that is based on a media device.
+
+The `bootdev_find_in_blk()` helper is implemented in the bootdev uclass. It
+names the bootflow and copies the partition number in from the iterator. Then it
+calls the bootmeth device to check if it can support this device. This is
+important since some bootmeths only work with network devices, for example. If
+that check fails, it stops.
+
+Assuming the bootmeth is happy, or at least indicates that it is willing to try
+(by returning 0 from its `check()` method), the next step is to try the
+partition. If that works it tries to detect a file system. If that works then it
+calls the bootmeth device once more, this time to read the bootflow.
+
+Note: Normally a filesystem is needed for the bootmeth to be called on block
+devices, but bootmeths which don't need that can set the BOOTMETHF_ANY_PART
+flag to indicate that they can scan any partition. An example is the ChromiumOS
+bootmeth which can store a kernel in a raw partition. Note also that sandbox is
+a special case, since in that case the host filesystem can be accessed even
+though the block device is NULL.
+
+If we take the example of the `bootmeth_extlinux` driver, this call ends up at
+`extlinux_read_bootflow()`. It has the filesystem ready, so tries various
+filenames to try to find the `extlinux.conf` file, reading it if possible. If
+all goes well the bootflow ends up in the `BOOTFLOWST_READY` state.
+
+At this point, we fall back from the bootmeth driver, to
+`bootdev_find_in_blk()`, then back to `default_get_bootflow()`, then to
+`bootdev_get_bootflow()`, then to `bootflow_check()` and finally to its caller,
+either `bootflow_scan_first()` or `bootflow_scan_next()`. In either case,
+the bootflow is returned as the result of this iteration, assuming it made it to
+the  `BOOTFLOWST_READY` state.
+
+That is the basic operation of scanning for bootflows. The process of booting a
+bootflow is handled by the bootmeth driver for that bootflow. In the case of
+extlinux boot, this parses and processes the `extlinux.conf` file that was read.
+See `extlinux_boot()` for how that works. The processing may involve reading
+additional files, which is handled by the `read_file()` method, which is
+`extlinux_read_file()` in this case. All bootmeths should support reading
+files, since the bootflow is typically only the basic instructions and does not
+include the operating system itself, ramdisk, device tree, etc.
+
+The vast majority of the bootstd code is concerned with iterating through
+partitions on bootdevs and using bootmeths to find bootflows.
+
+How about bootdevs which are not block devices? They are handled by the same
+methods as above, but with a different implementation. For example, the bootmeth
+for PXE boot (over a network) uses `tftp` to read files rather than `fs_read()`.
+But other than that it is very similar.
+
+
+Tests
+-----
+
+Tests are located in `test/boot` and cover the core functionality as well as
+the commands. All tests use sandbox so can be run on a standard Linux computer
+and in U-Boot's CI.
+
+For testing, a DOS-formatted disk image is used with a FAT partition on it and
+a second unused partition. This is created in `setup_bootflow_image()`, with a
+canned one from the source tree used if it cannot be created (e.g. in CI).
+
+
+Bootflow internals
+------------------
+
+The bootstd device holds a linked list of scanned bootflows as well as the
+currently selected bootdev and bootflow (for use by commands). This is in
+`struct bootstd_priv`.
+
+Each bootdev device has its own `struct bootdev_uc_plat` which holds a
+list of scanned bootflows just for that device.
+
+The bootflow itself is documented in bootflow_h_. It includes various bits of
+information about the bootflow and a buffer to hold the file.
+
+
+Future
+------
+
+Apart from the to-do items below, different types of bootflow files may be
+implemented in future, e.g. Chromium OS support which is currently only
+available as a script in chromebook_coral.
+
+
+To do
+-----
+
+Some things that need to be done to completely replace the distro-boot scripts:
+
+- implement extensions (devicetree overlays with add-on boards)
+- implement legacy (boot image v2) android boot flow
+
+Other ideas:
+
+- `bootflow prep` to load everything preparing for boot, so that `bootflow boot`
+  can just do the boot.
+- automatically load kernel, FDT, etc. to suitable addresses so the board does
+  not need to specify things like `pxefile_addr_r`
+
+
+.. _distro_bootcmd: https://github.com/u-boot/u-boot/blob/master/include/config_distro_bootcmd.h
+.. _BootLoaderSpec: http://www.freedesktop.org/wiki/Specifications/BootLoaderSpec/
+.. _distro_boot: https://github.com/u-boot/u-boot/blob/master/boot/distro.c
+.. _bootflow_h: https://github.com/u-boot/u-boot/blob/master/include/bootflow.h
+.. _migrate_patch: https://patchwork.ozlabs.org/project/uboot/patch/20230727215433.578830-2-sjg@chromium.org/
diff --git a/doc/develop/bootstd/pxelinux.rst b/doc/develop/bootstd/pxelinux.rst
new file mode 100644
index 00000000000..c4b7fbb4c9c
--- /dev/null
+++ b/doc/develop/bootstd/pxelinux.rst
@@ -0,0 +1,27 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+PXE Bootmeth
+============
+
+PXE (Preboot eXecution-Environment) provides a way to boot an operating system
+over a network interface. The PXE bootmeth supports PXELINUX and allows U-Boot to
+provide a menu of possible Operating Systems from which the user can choose.
+
+U-Boot includes a parser for the `extlinux.conf` file described
+`here <https://uapi-group.org/specifications/specs/boot_loader_specification>`_.
+It consists primarily of a list of named operating systems along with the
+kernel, initial ramdisk and other settings. The file is retrieved from a network
+server using the TFTP protocol.
+
+When invoked on a bootdev, this bootmeth searches for the file and creates a
+bootflow if found. See
+`PXELINUX <https://wiki.syslinux.org/wiki/index.php?title=PXELINUX>`_ for
+a full description of the search procedure.
+
+When the bootflow is booted, the bootmeth calls ``pxe_setup_ctx()`` to set up
+the context, then ``pxe_process()`` to process the file. Depending on the
+contents, this may boot an Operating System or provide a list of options to the
+user, perhaps with a timeout.
+
+The compatible string "u-boot,extlinux-pxe" is used for the driver. It is
+present if `CONFIG_BOOTMETH_EXTLINUX_PXE` is enabled.
diff --git a/doc/develop/bootstd/qfw.rst b/doc/develop/bootstd/qfw.rst
new file mode 100644
index 00000000000..70086ad1817
--- /dev/null
+++ b/doc/develop/bootstd/qfw.rst
@@ -0,0 +1,20 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+QFW Bootmeth
+============
+
+`QEMU <hhttps://www.qemu.org/>`_ is a system emulator which is able to boot
+Operating Systems. QEMU provides specific support for booting an OS image
+provided on the QEMU command line.
+
+When invoked on a bootdev for UCLASS_QFW, this bootmeth reads the kernel
+provided by the QEMU `-kernel` argument, the initial ramdisk provided by
+`-initrd` and the boot arguments (command line) provided by `-append` into
+memory ready for booting.
+
+When the bootflow is booted, the bootmeth tries the `booti` command first, then
+falls back to the `bootz` command. U-Boot's 'control' devicetree is passed
+through to the kernel.
+
+The compatible string "u-boot,qfw-bootmeth" is used for the driver. It is
+present if `CONFIG_QFW` is enabled.
diff --git a/doc/develop/bootstd/sandbox.rst b/doc/develop/bootstd/sandbox.rst
new file mode 100644
index 00000000000..d501518c39a
--- /dev/null
+++ b/doc/develop/bootstd/sandbox.rst
@@ -0,0 +1,17 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+Sandbox Bootmeth
+================
+
+The sandbox bootmeth is only used for testing. It does not provide any facility
+for booting an OS. While sandbox can do all the processing before the actual
+boot, it is not connected in this bootmeth.
+
+When invoked on a bootdev, this bootmeth pretends to find a bootflow and creates
+the associated structure.
+
+When the bootflow is booted, the bootmeth returns `-ENOTSUPP` indicating that it
+is not supported.
+
+The compatible string "u-boot,sandbox-bootmeth" is used for the driver. It is present
+if `CONFIG_BOOTMETH_SANDBOX` is enabled.
diff --git a/doc/develop/bootstd/script.rst b/doc/develop/bootstd/script.rst
new file mode 100644
index 00000000000..47f3684b86b
--- /dev/null
+++ b/doc/develop/bootstd/script.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+Script Bootmeth
+===============
+
+This bootmeth provides a way to locate and run a script on a block or network
+device. It can also support SPI flash.
+
+For a block device the file is read from the selected partition, which must use
+a supported filesystem. The subdirectory to search in is defined by the bootstd
+list of prefixes (``{"/", "/boot"}`` by default) and can be adjust with the
+`filename-prefixes` property in the bootstd device.
+
+For a network device, the filename is obtained from the `boot_script_dhcp`
+environment variable and the file is read using tftp. It must be in the
+top-level directory of the tftp server.
+
+In either case (file or network), the bootmeth searches for the file and creates
+a bootflow if found. The bootmeth searches for "boot.scr.uimg" first, then
+"boot.scr" if not found.
+
+For SPI flash, a script is read from flash using the offset provided by the
+"script_offset_f" environment variable.
+
+Some attempt is made to identify the Operating System: so far this only detects
+an `Armbian <https://www.armbian.com>`_
+distro. For block devices, if a file called "boot.bmp" exists in the same
+directory then it is used as the bootflow logo.
+
+When the bootflow is booted, the bootmeth sets these environment variables:
+
+    devtype
+        device type (e.g. "usb", "mmc", "ethernet" or "spi_flash")
+
+    devnum
+        device number, corresponding to the device 'sequence' number
+        ``dev_seq(dev)``
+
+    distro_bootpart
+        (block devices only) partition number on the device (numbered from 1)
+
+    prefix
+        prefix used to find the file
+
+    mmc_bootdev
+        device number (same as `devnum`), set for sunxi mmc devices only
+
+The script file must be a FIT or a legacy uImage. It is loaded into memory and
+executed.
+
+The compatible string "u-boot,script" is used for the driver. It is present
+if `CONFIG_BOOTMETH_SCRIPT` is enabled.
diff --git a/doc/develop/cedit.rst b/doc/develop/cedit.rst
new file mode 100644
index 00000000000..82305b921f0
--- /dev/null
+++ b/doc/develop/cedit.rst
@@ -0,0 +1,170 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Configuration Editor
+====================
+
+Introduction
+------------
+
+U-Boot provides a configuration editor which allows settings to be changed in
+a GUI or text environment.
+
+
+This feature is still in development and has a number of limitations. For
+example, cedit only supports menu items (there is no numeric or text entry),
+provides no support for colour text and does not support scrolling. Still it is
+possible to use it for simple applications.
+
+
+Overview
+--------
+
+The configuration editor makes use of :doc:`expo` to build a description of the
+configuration screens and allow user to interact with it.
+
+To create a single-scene cedit for your application:
+
+#. Design the scene, i.e. the objects that need to be present and what their
+   possible values are
+
+#. Enter this in .dts format
+
+#. Create a header file containing the IDs
+
+#. Run the 'expo.py' tool to generate a .dtb file containing the layout, which
+   can be used by U-Boot
+
+#. Use the :doc:`../usage/cmd/cedit` to create the cedit, read the settings,
+   present the cedit to the user and save the settings afterwards.
+
+Each of these is described in a separate section. See :ref:`expo_example` for
+an example file.
+
+
+Design a scene
+--------------
+
+Using a piece of paper or a drawing tool, lay out the objects you want in your
+scene. Typically you will use the default layout engine, which simply puts items
+one after the other from top to bottom. So use a single column and show the
+prompt and value for each object.
+
+For menu items, show one of the values, but keep in mind what else you need.
+
+
+Create an expo-format file
+--------------------------
+
+The description is in the form of a devicetree file, as documented at
+:ref:`expo_format`. Since everything in an expo has an ID number (an integer
+greater than 1) the description is written terms of these IDs. They each have
+an enum value. which is typically taken care of by the `expo.py` tool.
+
+The expo should have a `scenes` node with a named scene as a subnode. Within the
+scene, add properties for the scene, then a subnode for each object in the
+scene.
+
+All object nodes require an `id` value and a `type` property. Other properties
+depend on the type. For example, a menu has a `title` and an `item-label` list
+proving the text for the menu items, as well as an `item-id` list providing the
+ID of each menu item, so it can be selected.
+
+Text properties may have two variants. For example `title` specifies the title
+of a menu, but you can instead use `title-id` to specify the string ID to use as
+the title. String are defined in a separate area, common to the whole expo,
+which contains a subnode for each string. Within that subnode are the ID and the
+`value` (i.e. the text). For now only English is supported, but in future it may
+be possible to append a language identifier to provide other values (e.g.
+'value-es' for Spanish).
+
+
+Create an ID header-file
+------------------------
+
+Expo needs to know the integer value to use for every ID referenced in your
+expo-format file. For example, if you have defined a `cpu-speed` node with an
+id of `ID_CPU_SPEED`, then Expo needs to know the value of `ID_CPU_SPEED`.
+
+When you write C code to use the expo, you may need to know the IDs. For
+example, to find which value the user selected in `cpu-speed` menu, you must
+use the `ID_CPU_SPEED` ID. The ID is the only way to refer to anything in Expo.
+
+Since we need a shared set of IDs, it is best to have a header file containing
+them. Expo supports doing this with an enum, where every ID is listed in the
+enum::
+
+    enum {
+        ZERO,
+
+        ID_PROMPT,
+
+        ID_SCENE1,
+        ID_SCENE1_TITLE,
+        ...
+    };
+
+The C compiler can parse this directly. The `expo.py` tool parses it for expo.
+
+Create a header file containing every ID mentioned in your expo. Try to group
+related things together.
+
+
+Build the expo layout
+---------------------
+
+Use the `expo.py` tool to build a .dtb for your expo::
+
+    ./tools/expo.py -e expo_ids.h -l expo_layout.dts -o expo.dtb
+
+This uses the enum in the provided header file to get the ID numbers, grabs
+the `.dts` file, inserts the ID numbers and then uses the devicetree compiler to
+build a `.dtb` file.
+
+If you get an error::
+
+    Devicetree compiler error:
+    Error: <stdin>:9.19-20 syntax error
+    FATAL ERROR: Unable to parse input tree
+
+that means that something is wrong with your syntax, or perhaps you have an ID
+in the `.dts` file that is not mentioned in your enum. Check both files and try
+again.
+
+
+Use the command interface
+-------------------------
+
+See the :doc:`../usage/cmd/cedit` command for information on available commands.
+Typically you will use `cedit load` to load the `.dtb` file and `cedit run` to
+let the user interact with it.
+
+
+Multiple scenes
+---------------
+
+Expo supports multiple scenes but has no pre-determined way of moving between
+them. You could use selection of a menu item as a signal to change the scene,
+but this is not currently implemented in the cedit code (see `cedit_run()`).
+
+
+Themes
+------
+
+The configuration editor uses simple expo themes. The theme is read from
+`/bootstd/cedit-theme` in the devicetree.
+
+
+Reading and writing settings
+----------------------------
+
+Cedit provides several options for persistent settings:
+
+- Writing an FDT file to a filesystem
+- Writing to U-Boot's environment variables, which are then typically stored in
+  a persistent manner
+- Writing to CMOS RAM registers (common on x86 machines). Note that textline
+  objects do not appear in CMOS RAM registers
+
+For now, reading and writing settings is not automatic. See the
+:doc:`../usage/cmd/cedit` for how to do this on the command line or in a
+script.
diff --git a/doc/develop/checkpatch.rst b/doc/develop/checkpatch.rst
new file mode 100644
index 00000000000..b52452bc296
--- /dev/null
+++ b/doc/develop/checkpatch.rst
@@ -0,0 +1,1249 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+==========
+Checkpatch
+==========
+
+Checkpatch (scripts/checkpatch.pl) is a perl script which checks for trivial
+style violations in patches and optionally corrects them.  Checkpatch can
+also be run on file contexts and without the kernel tree.
+
+Checkpatch is not always right. Your judgement takes precedence over checkpatch
+messages.  If your code looks better with the violations, then its probably
+best left alone.
+
+
+Options
+=======
+
+This section will describe the options checkpatch can be run with.
+
+Usage::
+
+  ./scripts/checkpatch.pl [OPTION]... [FILE]...
+
+Available options:
+
+ - -q,  --quiet
+
+   Enable quiet mode.
+
+ - -v,  --verbose
+   Enable verbose mode.  Additional verbose test descriptions are output
+   so as to provide information on why that particular message is shown.
+
+ - --no-tree
+
+   Run checkpatch without the kernel tree.
+
+ - --no-signoff
+
+   Disable the 'Signed-off-by' line check.  The sign-off is a simple line at
+   the end of the explanation for the patch, which certifies that you wrote it
+   or otherwise have the right to pass it on as an open-source patch.
+
+   Example::
+
+	 Signed-off-by: Random J Developer <random@developer.example.org>
+
+   Setting this flag effectively stops a message for a missing signed-off-by
+   line in a patch context.
+
+ - --patch
+
+   Treat FILE as a patch.  This is the default option and need not be
+   explicitly specified.
+
+ - --emacs
+
+   Set output to emacs compile window format.  This allows emacs users to jump
+   from the error in the compile window directly to the offending line in the
+   patch.
+
+ - --terse
+
+   Output only one line per report.
+
+ - --showfile
+
+   Show the diffed file position instead of the input file position.
+
+ - -g,  --git
+
+   Treat FILE as a single commit or a git revision range.
+
+   Single commit with:
+
+   - <rev>
+   - <rev>^
+   - <rev>~n
+
+   Multiple commits with:
+
+   - <rev1>..<rev2>
+   - <rev1>...<rev2>
+   - <rev>-<count>
+
+ - -f,  --file
+
+   Treat FILE as a regular source file.  This option must be used when running
+   checkpatch on source files in the kernel.
+
+ - --subjective,  --strict
+
+   Enable stricter tests in checkpatch.  By default the tests emitted as CHECK
+   do not activate by default.  Use this flag to activate the CHECK tests.
+
+ - --list-types
+
+   Every message emitted by checkpatch has an associated TYPE.  Add this flag
+   to display all the types in checkpatch.
+
+   Note that when this flag is active, checkpatch does not read the input FILE,
+   and no message is emitted.  Only a list of types in checkpatch is output.
+
+ - --types TYPE(,TYPE2...)
+
+   Only display messages with the given types.
+
+   Example::
+
+     ./scripts/checkpatch.pl mypatch.patch --types EMAIL_SUBJECT,BRACES
+
+ - --ignore TYPE(,TYPE2...)
+
+   Checkpatch will not emit messages for the specified types.
+
+   Example::
+
+     ./scripts/checkpatch.pl mypatch.patch --ignore EMAIL_SUBJECT,BRACES
+
+ - --show-types
+
+   By default checkpatch doesn't display the type associated with the messages.
+   Set this flag to show the message type in the output.
+
+ - --max-line-length=n
+
+   Set the max line length (default 100).  If a line exceeds the specified
+   length, a LONG_LINE message is emitted.
+
+
+   The message level is different for patch and file contexts.  For patches,
+   a WARNING is emitted.  While a milder CHECK is emitted for files.  So for
+   file contexts, the --strict flag must also be enabled.
+
+ - --min-conf-desc-length=n
+
+   Set the Kconfig entry minimum description length, if shorter, warn.
+
+ - --tab-size=n
+
+   Set the number of spaces for tab (default 8).
+
+ - --root=PATH
+
+   PATH to the kernel tree root.
+
+   This option must be specified when invoking checkpatch from outside
+   the kernel root.
+
+ - --no-summary
+
+   Suppress the per file summary.
+
+ - --mailback
+
+   Only produce a report in case of Warnings or Errors.  Milder Checks are
+   excluded from this.
+
+ - --summary-file
+
+   Include the filename in summary.
+
+ - --debug KEY=[0|1]
+
+   Turn on/off debugging of KEY, where KEY is one of 'values', 'possible',
+   'type', and 'attr' (default is all off).
+
+ - --fix
+
+   This is an EXPERIMENTAL feature.  If correctable errors exists, a file
+   <inputfile>.EXPERIMENTAL-checkpatch-fixes is created which has the
+   automatically fixable errors corrected.
+
+ - --fix-inplace
+
+   EXPERIMENTAL - Similar to --fix but input file is overwritten with fixes.
+
+   DO NOT USE this flag unless you are absolutely sure and you have a backup
+   in place.
+
+ - --ignore-perl-version
+
+   Override checking of perl version.  Runtime errors maybe encountered after
+   enabling this flag if the perl version does not meet the minimum specified.
+
+ - --codespell
+
+   Use the codespell dictionary for checking spelling errors.
+
+ - --codespellfile
+
+   Use the specified codespell file.
+   Default is '/usr/share/codespell/dictionary.txt'.
+
+ - --typedefsfile
+
+   Read additional types from this file.
+
+ - --color[=WHEN]
+
+   Use colors 'always', 'never', or only when output is a terminal ('auto').
+   Default is 'auto'.
+
+ - --kconfig-prefix=WORD
+
+   Use WORD as a prefix for Kconfig symbols (default is `CONFIG_`).
+
+ - -h, --help, --version
+
+   Display the help text.
+
+Message Levels
+==============
+
+Messages in checkpatch are divided into three levels. The levels of messages
+in checkpatch denote the severity of the error. They are:
+
+ - ERROR
+
+   This is the most strict level.  Messages of type ERROR must be taken
+   seriously as they denote things that are very likely to be wrong.
+
+ - WARNING
+
+   This is the next stricter level.  Messages of type WARNING requires a
+   more careful review.  But it is milder than an ERROR.
+
+ - CHECK
+
+   This is the mildest level.  These are things which may require some thought.
+
+Type Descriptions
+=================
+
+This section contains a description of all the message types in checkpatch.
+
+.. Types in this section are also parsed by checkpatch.
+.. The types are grouped into subsections based on use.
+
+
+Allocation style
+----------------
+
+  **ALLOC_ARRAY_ARGS**
+    The first argument for kcalloc or kmalloc_array should be the
+    number of elements.  sizeof() as the first argument is generally
+    wrong.
+
+    See: https://www.kernel.org/doc/html/latest/core-api/memory-allocation.html
+
+  **ALLOC_SIZEOF_STRUCT**
+    The allocation style is bad.  In general for family of
+    allocation functions using sizeof() to get memory size,
+    constructs like::
+
+      p = alloc(sizeof(struct foo), ...)
+
+    should be::
+
+      p = alloc(sizeof(*p), ...)
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#allocating-memory
+
+  **ALLOC_WITH_MULTIPLY**
+    Prefer kmalloc_array/kcalloc over kmalloc/kzalloc with a
+    sizeof multiply.
+
+    See: https://www.kernel.org/doc/html/latest/core-api/memory-allocation.html
+
+
+API usage
+---------
+
+  **ARCH_DEFINES**
+    Architecture specific defines should be avoided wherever
+    possible.
+
+  **ARCH_INCLUDE_LINUX**
+    Whenever asm/file.h is included and linux/file.h exists, a
+    conversion can be made when linux/file.h includes asm/file.h.
+    However this is not always the case (See signal.h).
+    This message type is emitted only for includes from arch/.
+
+  **AVOID_BUG**
+    BUG() or BUG_ON() should be avoided totally.
+    Use WARN() and WARN_ON() instead, and handle the "impossible"
+    error condition as gracefully as possible.
+
+    See: https://www.kernel.org/doc/html/latest/process/deprecated.html#bug-and-bug-on
+
+  **CONSIDER_KSTRTO**
+    The simple_strtol(), simple_strtoll(), simple_strtoul(), and
+    simple_strtoull() functions explicitly ignore overflows, which
+    may lead to unexpected results in callers.  The respective kstrtol(),
+    kstrtoll(), kstrtoul(), and kstrtoull() functions tend to be the
+    correct replacements.
+
+    See: https://www.kernel.org/doc/html/latest/process/deprecated.html#simple-strtol-simple-strtoll-simple-strtoul-simple-strtoull
+
+  **CONSTANT_CONVERSION**
+    Use of __constant_<foo> form is discouraged for the following functions::
+
+      __constant_cpu_to_be[x]
+      __constant_cpu_to_le[x]
+      __constant_be[x]_to_cpu
+      __constant_le[x]_to_cpu
+      __constant_htons
+      __constant_ntohs
+
+    Using any of these outside of include/uapi/ is not preferred as using the
+    function without __constant_ is identical when the argument is a
+    constant.
+
+    In big endian systems, the macros like __constant_cpu_to_be32(x) and
+    cpu_to_be32(x) expand to the same expression::
+
+      #define __constant_cpu_to_be32(x) ((__force __be32)(__u32)(x))
+      #define __cpu_to_be32(x)          ((__force __be32)(__u32)(x))
+
+    In little endian systems, the macros __constant_cpu_to_be32(x) and
+    cpu_to_be32(x) expand to __constant_swab32 and __swab32.  __swab32
+    has a __builtin_constant_p check::
+
+      #define __swab32(x)				\
+        (__builtin_constant_p((__u32)(x)) ?	\
+        ___constant_swab32(x) :			\
+        __fswab32(x))
+
+    So ultimately they have a special case for constants.
+    Similar is the case with all of the macros in the list.  Thus
+    using the __constant_... forms are unnecessarily verbose and
+    not preferred outside of include/uapi.
+
+    See: https://lore.kernel.org/lkml/1400106425.12666.6.camel@joe-AO725/
+
+  **DEPRECATED_API**
+    Usage of a deprecated RCU API is detected.  It is recommended to replace
+    old flavourful RCU APIs by their new vanilla-RCU counterparts.
+
+    The full list of available RCU APIs can be viewed from the kernel docs.
+
+    See: https://www.kernel.org/doc/html/latest/RCU/whatisRCU.html#full-list-of-rcu-apis
+
+  **DEPRECATED_VARIABLE**
+    EXTRA_{A,C,CPP,LD}FLAGS are deprecated and should be replaced by the new
+    flags added via commit f77bf01425b1 ("kbuild: introduce ccflags-y,
+    asflags-y and ldflags-y").
+
+    The following conversion scheme maybe used::
+
+      EXTRA_AFLAGS    ->  asflags-y
+      EXTRA_CFLAGS    ->  ccflags-y
+      EXTRA_CPPFLAGS  ->  cppflags-y
+      EXTRA_LDFLAGS   ->  ldflags-y
+
+    See:
+
+      1. https://lore.kernel.org/lkml/20070930191054.GA15876@uranus.ravnborg.org/
+      2. https://lore.kernel.org/lkml/1313384834-24433-12-git-send-email-lacombar@gmail.com/
+      3. https://www.kernel.org/doc/html/latest/kbuild/makefiles.html#compilation-flags
+
+  **DEVICE_ATTR_FUNCTIONS**
+    The function names used in DEVICE_ATTR is unusual.
+    Typically, the store and show functions are used with <attr>_store and
+    <attr>_show, where <attr> is a named attribute variable of the device.
+
+    Consider the following examples::
+
+      static DEVICE_ATTR(type, 0444, type_show, NULL);
+      static DEVICE_ATTR(power, 0644, power_show, power_store);
+
+    The function names should preferably follow the above pattern.
+
+    See: https://www.kernel.org/doc/html/latest/driver-api/driver-model/device.html#attributes
+
+  **DEVICE_ATTR_RO**
+    The DEVICE_ATTR_RO(name) helper macro can be used instead of
+    DEVICE_ATTR(name, 0444, name_show, NULL);
+
+    Note that the macro automatically appends _show to the named
+    attribute variable of the device for the show method.
+
+    See: https://www.kernel.org/doc/html/latest/driver-api/driver-model/device.html#attributes
+
+  **DEVICE_ATTR_RW**
+    The DEVICE_ATTR_RW(name) helper macro can be used instead of
+    DEVICE_ATTR(name, 0644, name_show, name_store);
+
+    Note that the macro automatically appends _show and _store to the
+    named attribute variable of the device for the show and store methods.
+
+    See: https://www.kernel.org/doc/html/latest/driver-api/driver-model/device.html#attributes
+
+  **DEVICE_ATTR_WO**
+    The DEVICE_AATR_WO(name) helper macro can be used instead of
+    DEVICE_ATTR(name, 0200, NULL, name_store);
+
+    Note that the macro automatically appends _store to the
+    named attribute variable of the device for the store method.
+
+    See: https://www.kernel.org/doc/html/latest/driver-api/driver-model/device.html#attributes
+
+  **DUPLICATED_SYSCTL_CONST**
+    Commit d91bff3011cf ("proc/sysctl: add shared variables for range
+    check") added some shared const variables to be used instead of a local
+    copy in each source file.
+
+    Consider replacing the sysctl range checking value with the shared
+    one in include/linux/sysctl.h.  The following conversion scheme may
+    be used::
+
+      &zero     ->  SYSCTL_ZERO
+      &one      ->  SYSCTL_ONE
+      &int_max  ->  SYSCTL_INT_MAX
+
+    See:
+
+      1. https://lore.kernel.org/lkml/20190430180111.10688-1-mcroce@redhat.com/
+      2. https://lore.kernel.org/lkml/20190531131422.14970-1-mcroce@redhat.com/
+
+  **ENOSYS**
+    ENOSYS means that a nonexistent system call was called.
+    Earlier, it was wrongly used for things like invalid operations on
+    otherwise valid syscalls.  This should be avoided in new code.
+
+    See: https://lore.kernel.org/lkml/5eb299021dec23c1a48fa7d9f2c8b794e967766d.1408730669.git.luto@amacapital.net/
+
+  **ENOTSUPP**
+    ENOTSUPP is not a standard error code and should be avoided in new patches.
+    EOPNOTSUPP should be used instead.
+
+    See: https://lore.kernel.org/netdev/20200510182252.GA411829@lunn.ch/
+
+  **EXPORT_SYMBOL**
+    EXPORT_SYMBOL should immediately follow the symbol to be exported.
+
+  **IN_ATOMIC**
+    in_atomic() is not for driver use so any such use is reported as an ERROR.
+    Also in_atomic() is often used to determine if sleeping is permitted,
+    but it is not reliable in this use model.  Therefore its use is
+    strongly discouraged.
+
+    However, in_atomic() is ok for core kernel use.
+
+    See: https://lore.kernel.org/lkml/20080320201723.b87b3732.akpm@linux-foundation.org/
+
+  **LOCKDEP**
+    The lockdep_no_validate class was added as a temporary measure to
+    prevent warnings on conversion of device->sem to device->mutex.
+    It should not be used for any other purpose.
+
+    See: https://lore.kernel.org/lkml/1268959062.9440.467.camel@laptop/
+
+  **MALFORMED_INCLUDE**
+    The #include statement has a malformed path.  This has happened
+    because the author has included a double slash "//" in the pathname
+    accidentally.
+
+  **USE_LOCKDEP**
+    lockdep_assert_held() annotations should be preferred over
+    assertions based on spin_is_locked()
+
+    See: https://www.kernel.org/doc/html/latest/locking/lockdep-design.html#annotations
+
+  **UAPI_INCLUDE**
+    No #include statements in include/uapi should use a uapi/ path.
+
+  **USLEEP_RANGE**
+    usleep_range() should be preferred over udelay(). The proper way of
+    using usleep_range() is mentioned in the kernel docs.
+
+    See: https://www.kernel.org/doc/html/latest/timers/timers-howto.html#delays-information-on-the-various-kernel-delay-sleep-mechanisms
+
+
+Comments
+--------
+
+  **BLOCK_COMMENT_STYLE**
+    The comment style is incorrect.  The preferred style for multi-
+    line comments is::
+
+      /*
+      * This is the preferred style
+      * for multi line comments.
+      */
+
+    The networking comment style is a bit different, with the first line
+    not empty like the former::
+
+      /* This is the preferred comment style
+      * for files in net/ and drivers/net/
+      */
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting
+
+  **C99_COMMENTS**
+    C99 style single line comments (//) should not be used.
+    Prefer the block comment style instead.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting
+
+  **DATA_RACE**
+    Applications of data_race() should have a comment so as to document the
+    reasoning behind why it was deemed safe.
+
+    See: https://lore.kernel.org/lkml/20200401101714.44781-1-elver@google.com/
+
+  **FSF_MAILING_ADDRESS**
+    Kernel maintainers reject new instances of the GPL boilerplate paragraph
+    directing people to write to the FSF for a copy of the GPL, since the
+    FSF has moved in the past and may do so again.
+    So do not write paragraphs about writing to the Free Software Foundation's
+    mailing address.
+
+    See: https://lore.kernel.org/lkml/20131006222342.GT19510@leaf/
+
+
+Commit message
+--------------
+
+  **BAD_SIGN_OFF**
+    The signed-off-by line does not fall in line with the standards
+    specified by the community.
+
+    See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#developer-s-certificate-of-origin-1-1
+
+  **BAD_STABLE_ADDRESS_STYLE**
+    The email format for stable is incorrect.
+    Some valid options for stable address are::
+
+      1. stable@vger.kernel.org
+      2. stable@kernel.org
+
+    For adding version info, the following comment style should be used::
+
+      stable@vger.kernel.org # version info
+
+  **COMMIT_COMMENT_SYMBOL**
+    Commit log lines starting with a '#' are ignored by git as
+    comments.  To solve this problem addition of a single space
+    infront of the log line is enough.
+
+  **COMMIT_MESSAGE**
+    The patch is missing a commit description.  A brief
+    description of the changes made by the patch should be added.
+
+    See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
+
+  **EMAIL_SUBJECT**
+    Naming the tool that found the issue is not very useful in the
+    subject line.  A good subject line summarizes the change that
+    the patch brings.
+
+    See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
+
+  **FROM_SIGN_OFF_MISMATCH**
+    The author's email does not match with that in the Signed-off-by:
+    line(s). This can be sometimes caused due to an improperly configured
+    email client.
+
+    This message is emitted due to any of the following reasons::
+
+      - The email names do not match.
+      - The email addresses do not match.
+      - The email subaddresses do not match.
+      - The email comments do not match.
+
+  **MISSING_SIGN_OFF**
+    The patch is missing a Signed-off-by line.  A signed-off-by
+    line should be added according to Developer's certificate of
+    Origin.
+
+    See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin
+
+  **NO_AUTHOR_SIGN_OFF**
+    The author of the patch has not signed off the patch.  It is
+    required that a simple sign off line should be present at the
+    end of explanation of the patch to denote that the author has
+    written it or otherwise has the rights to pass it on as an open
+    source patch.
+
+    See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin
+
+  **DIFF_IN_COMMIT_MSG**
+    Avoid having diff content in commit message.
+    This causes problems when one tries to apply a file containing both
+    the changelog and the diff because patch(1) tries to apply the diff
+    which it found in the changelog.
+
+    See: https://lore.kernel.org/lkml/20150611134006.9df79a893e3636019ad2759e@linux-foundation.org/
+
+  **GERRIT_CHANGE_ID**
+    To be picked up by gerrit, the footer of the commit message might
+    have a Change-Id like::
+
+      Change-Id: Ic8aaa0728a43936cd4c6e1ed590e01ba8f0fbf5b
+      Signed-off-by: A. U. Thor <author@example.com>
+
+    The Change-Id line must be removed before submitting.
+
+  **GIT_COMMIT_ID**
+    The proper way to reference a commit id is:
+    commit <12+ chars of sha1> ("<title line>")
+
+    An example may be::
+
+      Commit e21d2170f36602ae2708 ("video: remove unnecessary
+      platform_set_drvdata()") removed the unnecessary
+      platform_set_drvdata(), but left the variable "dev" unused,
+      delete it.
+
+    See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
+
+
+Comparison style
+----------------
+
+  **ASSIGN_IN_IF**
+    Do not use assignments in if condition.
+    Example::
+
+      if ((foo = bar(...)) < BAZ) {
+
+    should be written as::
+
+      foo = bar(...);
+      if (foo < BAZ) {
+
+  **BOOL_COMPARISON**
+    Comparisons of A to true and false are better written
+    as A and !A.
+
+    See: https://lore.kernel.org/lkml/1365563834.27174.12.camel@joe-AO722/
+
+  **COMPARISON_TO_NULL**
+    Comparisons to NULL in the form (foo == NULL) or (foo != NULL)
+    are better written as (!foo) and (foo).
+
+  **CONSTANT_COMPARISON**
+    Comparisons with a constant or upper case identifier on the left
+    side of the test should be avoided.
+
+
+Indentation and Line Breaks
+---------------------------
+
+  **CODE_INDENT**
+    Code indent should use tabs instead of spaces.
+    Outside of comments, documentation and Kconfig,
+    spaces are never used for indentation.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#indentation
+
+  **DEEP_INDENTATION**
+    Indentation with 6 or more tabs usually indicate overly indented
+    code.
+
+    It is suggested to refactor excessive indentation of
+    if/else/for/do/while/switch statements.
+
+    See: https://lore.kernel.org/lkml/1328311239.21255.24.camel@joe2Laptop/
+
+  **SWITCH_CASE_INDENT_LEVEL**
+    switch should be at the same indent as case.
+    Example::
+
+      switch (suffix) {
+      case 'G':
+      case 'g':
+              mem <<= 30;
+              break;
+      case 'M':
+      case 'm':
+              mem <<= 20;
+              break;
+      case 'K':
+      case 'k':
+              mem <<= 10;
+              fallthrough;
+      default:
+              break;
+      }
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#indentation
+
+  **LONG_LINE**
+    The line has exceeded the specified maximum length.
+    To use a different maximum line length, the --max-line-length=n option
+    may be added while invoking checkpatch.
+
+    Earlier, the default line length was 80 columns.  Commit bdc48fa11e46
+    ("checkpatch/coding-style: deprecate 80-column warning") increased the
+    limit to 100 columns.  This is not a hard limit either and it's
+    preferable to stay within 80 columns whenever possible.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#breaking-long-lines-and-strings
+
+  **LONG_LINE_STRING**
+    A string starts before but extends beyond the maximum line length.
+    To use a different maximum line length, the --max-line-length=n option
+    may be added while invoking checkpatch.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#breaking-long-lines-and-strings
+
+  **LONG_LINE_COMMENT**
+    A comment starts before but extends beyond the maximum line length.
+    To use a different maximum line length, the --max-line-length=n option
+    may be added while invoking checkpatch.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#breaking-long-lines-and-strings
+
+  **SPLIT_STRING**
+    Quoted strings that appear as messages in userspace and can be
+    grepped, should not be split across multiple lines.
+
+    See: https://lore.kernel.org/lkml/20120203052727.GA15035@leaf/
+
+  **MULTILINE_DEREFERENCE**
+    A single dereferencing identifier spanned on multiple lines like::
+
+      struct_identifier->member[index].
+      member = <foo>;
+
+    is generally hard to follow. It can easily lead to typos and so makes
+    the code vulnerable to bugs.
+
+    If fixing the multiple line dereferencing leads to an 80 column
+    violation, then either rewrite the code in a more simple way or if the
+    starting part of the dereferencing identifier is the same and used at
+    multiple places then store it in a temporary variable, and use that
+    temporary variable only at all the places. For example, if there are
+    two dereferencing identifiers::
+
+      member1->member2->member3.foo1;
+      member1->member2->member3.foo2;
+
+    then store the member1->member2->member3 part in a temporary variable.
+    It not only helps to avoid the 80 column violation but also reduces
+    the program size by removing the unnecessary dereferences.
+
+    But if none of the above methods work then ignore the 80 column
+    violation because it is much easier to read a dereferencing identifier
+    on a single line.
+
+  **TRAILING_STATEMENTS**
+    Trailing statements (for example after any conditional) should be
+    on the next line.
+    Statements, such as::
+
+      if (x == y) break;
+
+    should be::
+
+      if (x == y)
+              break;
+
+
+Macros, Attributes and Symbols
+------------------------------
+
+  **ARRAY_SIZE**
+    The ARRAY_SIZE(foo) macro should be preferred over
+    sizeof(foo)/sizeof(foo[0]) for finding number of elements in an
+    array.
+
+    The macro is defined in include/linux/kernel.h::
+
+      #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+  **AVOID_EXTERNS**
+    Function prototypes don't need to be declared extern in .h
+    files.  It's assumed by the compiler and is unnecessary.
+
+  **AVOID_L_PREFIX**
+    Local symbol names that are prefixed with `.L` should be avoided,
+    as this has special meaning for the assembler; a symbol entry will
+    not be emitted into the symbol table.  This can prevent `objtool`
+    from generating correct unwind info.
+
+    Symbols with STB_LOCAL binding may still be used, and `.L` prefixed
+    local symbol names are still generally usable within a function,
+    but `.L` prefixed local symbol names should not be used to denote
+    the beginning or end of code regions via
+    `SYM_CODE_START_LOCAL`/`SYM_CODE_END`
+
+  **BIT_MACRO**
+    Defines like: 1 << <digit> could be BIT(digit).
+    The BIT() macro is defined via include/linux/bits.h::
+
+      #define BIT(nr)         (1UL << (nr))
+
+  **CONST_READ_MOSTLY**
+    When a variable is tagged with the __read_mostly annotation, it is a
+    signal to the compiler that accesses to the variable will be mostly
+    reads and rarely(but NOT never) a write.
+
+    const __read_mostly does not make any sense as const data is already
+    read-only.  The __read_mostly annotation thus should be removed.
+
+  **DATE_TIME**
+    It is generally desirable that building the same source code with
+    the same set of tools is reproducible, i.e. the output is always
+    exactly the same.
+
+    The kernel does *not* use the ``__DATE__`` and ``__TIME__`` macros,
+    and enables warnings if they are used as they can lead to
+    non-deterministic builds.
+
+    See: https://www.kernel.org/doc/html/latest/kbuild/reproducible-builds.html#timestamps
+
+  **DEFINE_ARCH_HAS**
+    The ARCH_HAS_xyz and ARCH_HAVE_xyz patterns are wrong.
+
+    For big conceptual features use Kconfig symbols instead.  And for
+    smaller things where we have compatibility fallback functions but
+    want architectures able to override them with optimized ones, we
+    should either use weak functions (appropriate for some cases), or
+    the symbol that protects them should be the same symbol we use.
+
+    See: https://lore.kernel.org/lkml/CA+55aFycQ9XJvEOsiM3txHL5bjUc8CeKWJNR_H+MiicaddB42Q@mail.gmail.com/
+
+  **DO_WHILE_MACRO_WITH_TRAILING_SEMICOLON**
+    do {} while(0) macros should not have a trailing semicolon.
+
+  **INIT_ATTRIBUTE**
+    Const init definitions should use __initconst instead of
+    __initdata.
+
+    Similarly init definitions without const require a separate
+    use of const.
+
+  **INLINE_LOCATION**
+    The inline keyword should sit between storage class and type.
+
+    For example, the following segment::
+
+      inline static int example_function(void)
+      {
+              ...
+      }
+
+    should be::
+
+      static inline int example_function(void)
+      {
+              ...
+      }
+
+  **MISPLACED_INIT**
+    It is possible to use section markers on variables in a way
+    which gcc doesn't understand (or at least not the way the
+    developer intended)::
+
+      static struct __initdata samsung_pll_clock exynos4_plls[nr_plls] = {
+
+    does not put exynos4_plls in the .initdata section. The __initdata
+    marker can be virtually anywhere on the line, except right after
+    "struct". The preferred location is before the "=" sign if there is
+    one, or before the trailing ";" otherwise.
+
+    See: https://lore.kernel.org/lkml/1377655732.3619.19.camel@joe-AO722/
+
+  **MULTISTATEMENT_MACRO_USE_DO_WHILE**
+    Macros with multiple statements should be enclosed in a
+    do - while block.  Same should also be the case for macros
+    starting with `if` to avoid logic defects::
+
+      #define macrofun(a, b, c)                 \
+        do {                                    \
+                if (a == 5)                     \
+                        do_this(b, c);          \
+        } while (0)
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#macros-enums-and-rtl
+
+  **PREFER_FALLTHROUGH**
+    Use the `fallthrough;` pseudo keyword instead of
+    `/* fallthrough */` like comments.
+
+  **TRAILING_SEMICOLON**
+    Macro definition should not end with a semicolon. The macro
+    invocation style should be consistent with function calls.
+    This can prevent any unexpected code paths::
+
+      #define MAC do_something;
+
+    If this macro is used within a if else statement, like::
+
+      if (some_condition)
+              MAC;
+
+      else
+              do_something;
+
+    Then there would be a compilation error, because when the macro is
+    expanded there are two trailing semicolons, so the else branch gets
+    orphaned.
+
+    See: https://lore.kernel.org/lkml/1399671106.2912.21.camel@joe-AO725/
+
+  **SINGLE_STATEMENT_DO_WHILE_MACRO**
+    For the multi-statement macros, it is necessary to use the do-while
+    loop to avoid unpredictable code paths. The do-while loop helps to
+    group the multiple statements into a single one so that a
+    function-like macro can be used as a function only.
+
+    But for the single statement macros, it is unnecessary to use the
+    do-while loop. Although the code is syntactically correct but using
+    the do-while loop is redundant. So remove the do-while loop for single
+    statement macros.
+
+  **WEAK_DECLARATION**
+    Using weak declarations like __attribute__((weak)) or __weak
+    can have unintended link defects.  Avoid using them.
+
+
+Functions and Variables
+-----------------------
+
+  **CAMELCASE**
+    Avoid CamelCase Identifiers.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#naming
+
+  **CONST_CONST**
+    Using `const <type> const *` is generally meant to be
+    written `const <type> * const`.
+
+  **CONST_STRUCT**
+    Using const is generally a good idea.  Checkpatch reads
+    a list of frequently used structs that are always or
+    almost always constant.
+
+    The existing structs list can be viewed from
+    `scripts/const_structs.checkpatch`.
+
+    See: https://lore.kernel.org/lkml/alpine.DEB.2.10.1608281509480.3321@hadrien/
+
+  **EMBEDDED_FUNCTION_NAME**
+    Embedded function names are less appropriate to use as
+    refactoring can cause function renaming.  Prefer the use of
+    "%s", __func__ to embedded function names.
+
+    Note that this does not work with -f (--file) checkpatch option
+    as it depends on patch context providing the function name.
+
+  **FUNCTION_ARGUMENTS**
+    This warning is emitted due to any of the following reasons:
+
+      1. Arguments for the function declaration do not follow
+         the identifier name.  Example::
+
+           void foo
+           (int bar, int baz)
+
+         This should be corrected to::
+
+           void foo(int bar, int baz)
+
+      2. Some arguments for the function definition do not
+         have an identifier name.  Example::
+
+           void foo(int)
+
+         All arguments should have identifier names.
+
+  **FUNCTION_WITHOUT_ARGS**
+    Function declarations without arguments like::
+
+      int foo()
+
+    should be::
+
+      int foo(void)
+
+  **GLOBAL_INITIALISERS**
+    Global variables should not be initialized explicitly to
+    0 (or NULL, false, etc.).  Your compiler (or rather your
+    loader, which is responsible for zeroing out the relevant
+    sections) automatically does it for you.
+
+  **INITIALISED_STATIC**
+    Static variables should not be initialized explicitly to zero.
+    Your compiler (or rather your loader) automatically does
+    it for you.
+
+  **MULTIPLE_ASSIGNMENTS**
+    Multiple assignments on a single line makes the code unnecessarily
+    complicated. So on a single line assign value to a single variable
+    only, this makes the code more readable and helps avoid typos.
+
+  **RETURN_PARENTHESES**
+    return is not a function and as such doesn't need parentheses::
+
+      return (bar);
+
+    can simply be::
+
+      return bar;
+
+
+Permissions
+-----------
+
+  **DEVICE_ATTR_PERMS**
+    The permissions used in DEVICE_ATTR are unusual.
+    Typically only three permissions are used - 0644 (RW), 0444 (RO)
+    and 0200 (WO).
+
+    See: https://www.kernel.org/doc/html/latest/filesystems/sysfs.html#attributes
+
+  **EXECUTE_PERMISSIONS**
+    There is no reason for source files to be executable.  The executable
+    bit can be removed safely.
+
+  **EXPORTED_WORLD_WRITABLE**
+    Exporting world writable sysfs/debugfs files is usually a bad thing.
+    When done arbitrarily they can introduce serious security bugs.
+    In the past, some of the debugfs vulnerabilities would seemingly allow
+    any local user to write arbitrary values into device registers - a
+    situation from which little good can be expected to emerge.
+
+    See: https://lore.kernel.org/linux-arm-kernel/cover.1296818921.git.segoon@openwall.com/
+
+  **NON_OCTAL_PERMISSIONS**
+    Permission bits should use 4 digit octal permissions (like 0700 or 0444).
+    Avoid using any other base like decimal.
+
+  **SYMBOLIC_PERMS**
+    Permission bits in the octal form are more readable and easier to
+    understand than their symbolic counterparts because many command-line
+    tools use this notation. Experienced kernel developers have been using
+    these traditional Unix permission bits for decades and so they find it
+    easier to understand the octal notation than the symbolic macros.
+    For example, it is harder to read S_IWUSR|S_IRUGO than 0644, which
+    obscures the developer's intent rather than clarifying it.
+
+    See: https://lore.kernel.org/lkml/CA+55aFw5v23T-zvDZp-MmD_EYxF8WbafwwB59934FV7g21uMGQ@mail.gmail.com/
+
+
+Spacing and Brackets
+--------------------
+
+  **ASSIGNMENT_CONTINUATIONS**
+    Assignment operators should not be written at the start of a
+    line but should follow the operand at the previous line.
+
+  **BRACES**
+    The placement of braces is stylistically incorrect.
+    The preferred way is to put the opening brace last on the line,
+    and put the closing brace first::
+
+      if (x is true) {
+              we do y
+      }
+
+    This applies for all non-functional blocks.
+    However, there is one special case, namely functions: they have the
+    opening brace at the beginning of the next line, thus::
+
+      int function(int x)
+      {
+              body of function
+      }
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+  **BRACKET_SPACE**
+    Whitespace before opening bracket '[' is prohibited.
+    There are some exceptions:
+
+    1. With a type on the left::
+
+        int [] a;
+
+    2. At the beginning of a line for slice initialisers::
+
+        [0...10] = 5,
+
+    3. Inside a curly brace::
+
+        = { [0...10] = 5 }
+
+  **CONCATENATED_STRING**
+    Concatenated elements should have a space in between.
+    Example::
+
+      printk(KERN_INFO"bar");
+
+    should be::
+
+      printk(KERN_INFO "bar");
+
+  **ELSE_AFTER_BRACE**
+    `else {` should follow the closing block `}` on the same line.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+  **LINE_SPACING**
+    Vertical space is wasted given the limited number of lines an
+    editor window can display when multiple blank lines are used.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+  **OPEN_BRACE**
+    The opening brace should be following the function definitions on the
+    next line.  For any non-functional block it should be on the same line
+    as the last construct.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+  **POINTER_LOCATION**
+    When using pointer data or a function that returns a pointer type,
+    the preferred use of * is adjacent to the data name or function name
+    and not adjacent to the type name.
+    Examples::
+
+      char *linux_banner;
+      unsigned long long memparse(char *ptr, char **retptr);
+      char *match_strdup(substring_t *s);
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+  **SPACING**
+    Whitespace style used in the kernel sources is described in kernel docs.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+  **TRAILING_WHITESPACE**
+    Trailing whitespace should always be removed.
+    Some editors highlight the trailing whitespace and cause visual
+    distractions when editing files.
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces
+
+  **UNNECESSARY_PARENTHESES**
+    Parentheses are not required in the following cases:
+
+      1. Function pointer uses::
+
+          (foo->bar)();
+
+        could be::
+
+          foo->bar();
+
+      2. Comparisons in if::
+
+          if ((foo->bar) && (foo->baz))
+          if ((foo == bar))
+
+        could be::
+
+          if (foo->bar && foo->baz)
+          if (foo == bar)
+
+      3. addressof/dereference single Lvalues::
+
+          &(foo->bar)
+          *(foo->bar)
+
+        could be::
+
+          &foo->bar
+          *foo->bar
+
+  **WHILE_AFTER_BRACE**
+    while should follow the closing bracket on the same line::
+
+      do {
+              ...
+      } while(something);
+
+    See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces
+
+
+Others
+------
+
+  **CONFIG_DESCRIPTION**
+    Kconfig symbols should have a help text which fully describes
+    it.
+
+  **CORRUPTED_PATCH**
+    The patch seems to be corrupted or lines are wrapped.
+    Please regenerate the patch file before sending it to the maintainer.
+
+  **CVS_KEYWORD**
+    Since linux moved to git, the CVS markers are no longer used.
+    So, CVS style keywords ($Id$, $Revision$, $Log$) should not be
+    added.
+
+  **DEFAULT_NO_BREAK**
+    switch default case is sometimes written as "default:;".  This can
+    cause new cases added below default to be defective.
+
+    A "break;" should be added after empty default statement to avoid
+    unwanted fallthrough.
+
+  **DOS_LINE_ENDINGS**
+    For DOS-formatted patches, there are extra ^M symbols at the end of
+    the line.  These should be removed.
+
+  **DT_SCHEMA_BINDING_PATCH**
+    DT bindings moved to a json-schema based format instead of
+    freeform text.
+
+    See: https://www.kernel.org/doc/html/latest/devicetree/bindings/writing-schema.html
+
+  **DT_SPLIT_BINDING_PATCH**
+    Devicetree bindings should be their own patch.  This is because
+    bindings are logically independent from a driver implementation,
+    they have a different maintainer (even though they often
+    are applied via the same tree), and it makes for a cleaner history in the
+    DT only tree created with git-filter-branch.
+
+    See: https://www.kernel.org/doc/html/latest/devicetree/bindings/submitting-patches.html#i-for-patch-submitters
+
+  **EMBEDDED_FILENAME**
+    Embedding the complete filename path inside the file isn't particularly
+    useful as often the path is moved around and becomes incorrect.
+
+  **FILE_PATH_CHANGES**
+    Whenever files are added, moved, or deleted, the MAINTAINERS file
+    patterns can be out of sync or outdated.
+
+    So MAINTAINERS might need updating in these cases.
+
+  **MEMSET**
+    The memset use appears to be incorrect.  This may be caused due to
+    badly ordered parameters.  Please recheck the usage.
+
+  **NOT_UNIFIED_DIFF**
+    The patch file does not appear to be in unified-diff format.  Please
+    regenerate the patch file before sending it to the maintainer.
+
+  **PRINTF_0XDECIMAL**
+    Prefixing 0x with decimal output is defective and should be corrected.
+
+  **SPDX_LICENSE_TAG**
+    The source file is missing or has an improper SPDX identifier tag.
+    The Linux kernel requires the precise SPDX identifier in all source files,
+    and it is thoroughly documented in the kernel docs.
+
+    See: https://www.kernel.org/doc/html/latest/process/license-rules.html
+
+  **TYPO_SPELLING**
+    Some words may have been misspelled.  Consider reviewing them.
diff --git a/doc/develop/ci_testing.rst b/doc/develop/ci_testing.rst
new file mode 100644
index 00000000000..ffaacedc3d8
--- /dev/null
+++ b/doc/develop/ci_testing.rst
@@ -0,0 +1,76 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Continuous Integration testing
+==============================
+
+All changes require passing our continuous integration tests prior to being
+merged in to mainline.  To help facilitate merges being accepted quickly,
+custodians are encouraged but not required to run a pipeline prior to sending a
+pull request.  Individual developers submitting significant or widespread
+changes are encouraged to run a pipeline themselves prior to posting.
+
+In order to make this process as easy as possible, the ability to run a CI
+pipeline is provided in both Azure and GitLab.  Both of these pipelines perform
+their Linux build jobs on the same Docker container image and to cover the same
+platforms.  In addition, Azure is also used to confirm that our host tools can
+be built with mingw to run on Windows.
+
+Each of the pipelines is written in such as way as to be a "world build" style
+test and as such we try and build all possible platforms.  In addition, for all
+platforms that support being run in QEMU we run them in QEMU and use our pytest
+suite.  See :doc:`py_testing` for more information about those tests.
+
+Azure Pipelines
+---------------
+
+This pipeline is defined in the top-level ``.azure-pipelines.yml`` file.
+Currently there are two ways to run a Microsoft Azure Pipeline test for U-Boot.
+
+The first way is to create an account with Microsoft at
+https://azure.microsoft.com/en-us/services/devops/ and then use the
+``.azure-pipelines.yml`` file in the U-Boot repository as the pipeline
+description.
+
+The second way is to use GitHub.  This requires a GitHub account
+and to fork the repository at https://github.com/u-boot/u-boot and to then
+submit a pull request as this will trigger an Azure pipeline run.  Clicking on
+your pull request on the list at https://github.com/u-boot/u-boot/pulls and
+then the "Checks" tab will show the results.
+
+GitLab CI Pipelines
+-------------------
+
+This pipeline is defined in the top-level ``.gitlab-ci.yml`` file.  Currently,
+we support running GitLab CI pipelines only for custodians, due to the
+resources the project has available.  For Custodians, it is a matter of
+enabling the pipeline feature in your project repository following the standard
+GitLab documentation.  For non-custodians, the pipeline itself is part of the
+tree and should be able to be used on any GitLab instance, with whatever
+runners you are able to provide.  While it is intended to be able to run this
+pipeline on the free public instances provided at https://gitlab.com/ a problem
+with our squashfs tests currently prevents this.
+
+To push to Gitlab without triggering a pipeline use:
+
+.. code-block:: bash
+
+    git push -o ci.skip
+
+Docker container
+----------------
+
+As previously stated, both of the above pipelines build using the same Docker
+container image.  This is maintained in the U-Boot source tree at
+``tools/docker/Dockerfile`` and new images are made as needed to support new
+tests or features.  This file needs to be updated whenever adding new external
+tool requirements to tests.
+
+Customizing CI
+--------------
+
+As noted above, the CI pipelines perform a world build.  While this is good for
+overall project testing, it can be less useful for testing specific cases or
+developing features.  In that case, it can be useful as part of your own
+testing cycle to edit these pipelines in separate local commits to pair them
+down to just the jobs you're interested in.  These changes must be removed
+prior to submission.
diff --git a/doc/develop/coccinelle.rst b/doc/develop/coccinelle.rst
new file mode 100644
index 00000000000..70274c3f5f5
--- /dev/null
+++ b/doc/develop/coccinelle.rst
@@ -0,0 +1,505 @@
+.. Copyright 2010 Nicolas Palix <npalix@diku.dk>
+.. Copyright 2010 Julia Lawall <julia@diku.dk>
+.. Copyright 2010 Gilles Muller <Gilles.Muller@lip6.fr>
+
+.. highlight:: none
+
+.. _devtools_coccinelle:
+
+Coccinelle
+==========
+
+Coccinelle is a tool for pattern matching and text transformation that has
+many uses in kernel development, including the application of complex,
+tree-wide patches and detection of problematic programming patterns.
+
+Getting Coccinelle
+------------------
+
+The semantic patches included in the kernel use features and options
+which are provided by Coccinelle version 1.0.0-rc11 and above.
+Using earlier versions will fail as the option names used by
+the Coccinelle files and coccicheck have been updated.
+
+Coccinelle is available through the package manager
+of many distributions, e.g. :
+
+ - Debian
+ - Fedora
+ - Ubuntu
+ - OpenSUSE
+ - Arch Linux
+ - NetBSD
+ - FreeBSD
+
+Some distribution packages are obsolete and it is recommended
+to use the latest version released from the Coccinelle homepage at
+http://coccinelle.lip6.fr/
+
+Or from Github at:
+
+https://github.com/coccinelle/coccinelle
+
+Once you have it, run the following commands::
+
+        ./autogen
+        ./configure
+        make
+
+as a regular user, and install it with::
+
+        sudo make install
+
+More detailed installation instructions to build from source can be
+found at:
+
+https://github.com/coccinelle/coccinelle/blob/master/install.txt
+
+Supplemental documentation
+--------------------------
+
+For supplemental documentation refer to the wiki:
+
+https://bottest.wiki.kernel.org/coccicheck
+
+The wiki documentation always refers to the linux-next version of the script.
+
+For Semantic Patch Language(SmPL) grammar documentation refer to:
+
+http://coccinelle.lip6.fr/documentation.php
+
+Using Coccinelle on the Linux kernel
+------------------------------------
+
+A Coccinelle-specific target is defined in the top level
+Makefile. This target is named ``coccicheck`` and calls the ``coccicheck``
+front-end in the ``scripts`` directory.
+
+Four basic modes are defined: ``patch``, ``report``, ``context``, and
+``org``. The mode to use is specified by setting the MODE variable with
+``MODE=<mode>``.
+
+- ``patch`` proposes a fix, when possible.
+
+- ``report`` generates a list in the following format:
+  file:line:column-column: message
+
+- ``context`` highlights lines of interest and their context in a
+  diff-like style.Lines of interest are indicated with ``-``.
+
+- ``org`` generates a report in the Org mode format of Emacs.
+
+Note that not all semantic patches implement all modes. For easy use
+of Coccinelle, the default mode is "report".
+
+Two other modes provide some common combinations of these modes.
+
+- ``chain`` tries the previous modes in the order above until one succeeds.
+
+- ``rep+ctxt`` runs successively the report mode and the context mode.
+  It should be used with the C option (described later)
+  which checks the code on a file basis.
+
+Examples
+~~~~~~~~
+
+To make a report for every semantic patch, run the following command::
+
+		make coccicheck MODE=report
+
+To produce patches, run::
+
+		make coccicheck MODE=patch
+
+
+The coccicheck target applies every semantic patch available in the
+sub-directories of ``scripts/coccinelle`` to the entire Linux kernel.
+
+For each semantic patch, a commit message is proposed.  It gives a
+description of the problem being checked by the semantic patch, and
+includes a reference to Coccinelle.
+
+As any static code analyzer, Coccinelle produces false
+positives. Thus, reports must be carefully checked, and patches
+reviewed.
+
+To enable verbose messages set the V= variable, for example::
+
+   make coccicheck MODE=report V=1
+
+Coccinelle parallelization
+--------------------------
+
+By default, coccicheck tries to run as parallel as possible. To change
+the parallelism, set the J= variable. For example, to run across 4 CPUs::
+
+   make coccicheck MODE=report J=4
+
+As of Coccinelle 1.0.2 Coccinelle uses Ocaml parmap for parallelization,
+if support for this is detected you will benefit from parmap parallelization.
+
+When parmap is enabled coccicheck will enable dynamic load balancing by using
+``--chunksize 1`` argument, this ensures we keep feeding threads with work
+one by one, so that we avoid the situation where most work gets done by only
+a few threads. With dynamic load balancing, if a thread finishes early we keep
+feeding it more work.
+
+When parmap is enabled, if an error occurs in Coccinelle, this error
+value is propagated back, the return value of the ``make coccicheck``
+captures this return value.
+
+Using Coccinelle with a single semantic patch
+---------------------------------------------
+
+The optional make variable COCCI can be used to check a single
+semantic patch. In that case, the variable must be initialized with
+the name of the semantic patch to apply.
+
+For instance::
+
+	make coccicheck COCCI=<my_SP.cocci> MODE=patch
+
+or::
+
+	make coccicheck COCCI=<my_SP.cocci> MODE=report
+
+
+Controlling Which Files are Processed by Coccinelle
+---------------------------------------------------
+
+By default the entire kernel source tree is checked.
+
+To apply Coccinelle to a specific directory, ``M=`` can be used.
+For example, to check drivers/net/wireless/ one may write::
+
+    make coccicheck M=drivers/net/wireless/
+
+To apply Coccinelle on a file basis, instead of a directory basis, the
+following command may be used::
+
+    make C=1 CHECK="scripts/coccicheck"
+
+To check only newly edited code, use the value 2 for the C flag, i.e.::
+
+    make C=2 CHECK="scripts/coccicheck"
+
+In these modes, which works on a file basis, there is no information
+about semantic patches displayed, and no commit message proposed.
+
+This runs every semantic patch in scripts/coccinelle by default. The
+COCCI variable may additionally be used to only apply a single
+semantic patch as shown in the previous section.
+
+The "report" mode is the default. You can select another one with the
+MODE variable explained above.
+
+Debugging Coccinelle SmPL patches
+---------------------------------
+
+Using coccicheck is best as it provides in the spatch command line
+include options matching the options used when we compile the kernel.
+You can learn what these options are by using V=1, you could then
+manually run Coccinelle with debug options added.
+
+Alternatively you can debug running Coccinelle against SmPL patches
+by asking for stderr to be redirected to stderr, by default stderr
+is redirected to /dev/null, if you'd like to capture stderr you
+can specify the ``DEBUG_FILE="file.txt"`` option to coccicheck. For
+instance::
+
+    rm -f cocci.err
+    make coccicheck COCCI=scripts/coccinelle/free/kfree.cocci MODE=report DEBUG_FILE=cocci.err
+    cat cocci.err
+
+You can use SPFLAGS to add debugging flags, for instance you may want to
+add both --profile --show-trying to SPFLAGS when debugging. For instance
+you may want to use::
+
+    rm -f err.log
+    export COCCI=scripts/coccinelle/misc/irqf_oneshot.cocci
+    make coccicheck DEBUG_FILE="err.log" MODE=report SPFLAGS="--profile --show-trying" M=./drivers/mfd/arizona-irq.c
+
+err.log will now have the profiling information, while stdout will
+provide some progress information as Coccinelle moves forward with
+work.
+
+DEBUG_FILE support is only supported when using coccinelle >= 1.0.2.
+
+.cocciconfig support
+--------------------
+
+Coccinelle supports reading .cocciconfig for default Coccinelle options that
+should be used every time spatch is spawned, the order of precedence for
+variables for .cocciconfig is as follows:
+
+- Your current user's home directory is processed first
+- Your directory from which spatch is called is processed next
+- The directory provided with the --dir option is processed last, if used
+
+Since coccicheck runs through make, it naturally runs from the kernel
+proper dir, as such the second rule above would be implied for picking up a
+.cocciconfig when using ``make coccicheck``.
+
+``make coccicheck`` also supports using M= targets. If you do not supply
+any M= target, it is assumed you want to target the entire kernel.
+The kernel coccicheck script has::
+
+    if [ "$KBUILD_EXTMOD" = "" ] ; then
+        OPTIONS="--dir $srctree $COCCIINCLUDE"
+    else
+        OPTIONS="--dir $KBUILD_EXTMOD $COCCIINCLUDE"
+    fi
+
+KBUILD_EXTMOD is set when an explicit target with M= is used. For both cases
+the spatch --dir argument is used, as such third rule applies when whether M=
+is used or not, and when M= is used the target directory can have its own
+.cocciconfig file. When M= is not passed as an argument to coccicheck the
+target directory is the same as the directory from where spatch was called.
+
+If not using the kernel's coccicheck target, keep the above precedence
+order logic of .cocciconfig reading. If using the kernel's coccicheck target,
+override any of the kernel's .coccicheck's settings using SPFLAGS.
+
+We help Coccinelle when used against Linux with a set of sensible defaults
+options for Linux with our own Linux .cocciconfig. This hints to coccinelle
+git can be used for ``git grep`` queries over coccigrep. A timeout of 200
+seconds should suffice for now.
+
+The options picked up by coccinelle when reading a .cocciconfig do not appear
+as arguments to spatch processes running on your system, to confirm what
+options will be used by Coccinelle run::
+
+      spatch --print-options-only
+
+You can override with your own preferred index option by using SPFLAGS. Take
+note that when there are conflicting options Coccinelle takes precedence for
+the last options passed. Using .cocciconfig is possible to use idutils, however
+given the order of precedence followed by Coccinelle, since the kernel now
+carries its own .cocciconfig, you will need to use SPFLAGS to use idutils if
+desired. See below section "Additional flags" for more details on how to use
+idutils.
+
+Additional flags
+----------------
+
+Additional flags can be passed to spatch through the SPFLAGS
+variable. This works as Coccinelle respects the last flags
+given to it when options are in conflict. ::
+
+    make SPFLAGS=--use-glimpse coccicheck
+
+Coccinelle supports idutils as well but requires coccinelle >= 1.0.6.
+When no ID file is specified coccinelle assumes your ID database file
+is in the file .id-utils.index on the top level of the kernel, coccinelle
+carries a script scripts/idutils_index.sh which creates the database with::
+
+    mkid -i C --output .id-utils.index
+
+If you have another database filename you can also just symlink with this
+name. ::
+
+    make SPFLAGS=--use-idutils coccicheck
+
+Alternatively you can specify the database filename explicitly, for
+instance::
+
+    make SPFLAGS="--use-idutils /full-path/to/ID" coccicheck
+
+See ``spatch --help`` to learn more about spatch options.
+
+Note that the ``--use-glimpse`` and ``--use-idutils`` options
+require external tools for indexing the code. None of them is
+thus active by default. However, by indexing the code with
+one of these tools, and according to the cocci file used,
+spatch could proceed the entire code base more quickly.
+
+SmPL patch specific options
+---------------------------
+
+SmPL patches can have their own requirements for options passed
+to Coccinelle. SmPL patch specific options can be provided by
+providing them at the top of the SmPL patch, for instance::
+
+	// Options: --no-includes --include-headers
+
+SmPL patch Coccinelle requirements
+----------------------------------
+
+As Coccinelle features get added some more advanced SmPL patches
+may require newer versions of Coccinelle. If an SmPL patch requires
+at least a version of Coccinelle, this can be specified as follows,
+as an example if requiring at least Coccinelle >= 1.0.5::
+
+	// Requires: 1.0.5
+
+Proposing new semantic patches
+------------------------------
+
+New semantic patches can be proposed and submitted by kernel
+developers. For sake of clarity, they should be organized in the
+sub-directories of ``scripts/coccinelle/``.
+
+
+Detailed description of the ``report`` mode
+-------------------------------------------
+
+``report`` generates a list in the following format::
+
+  file:line:column-column: message
+
+Example
+~~~~~~~
+
+Running::
+
+	make coccicheck MODE=report COCCI=scripts/coccinelle/api/err_cast.cocci
+
+will execute the following part of the SmPL script::
+
+   <smpl>
+   @r depends on !context && !patch && (org || report)@
+   expression x;
+   position p;
+   @@
+
+     ERR_PTR@p(PTR_ERR(x))
+
+   @script:python depends on report@
+   p << r.p;
+   x << r.x;
+   @@
+
+   msg="ERR_CAST can be used with %s" % (x)
+   coccilib.report.print_report(p[0], msg)
+   </smpl>
+
+This SmPL excerpt generates entries on the standard output, as
+illustrated below::
+
+    /home/user/linux/crypto/ctr.c:188:9-16: ERR_CAST can be used with alg
+    /home/user/linux/crypto/authenc.c:619:9-16: ERR_CAST can be used with auth
+    /home/user/linux/crypto/xts.c:227:9-16: ERR_CAST can be used with alg
+
+
+Detailed description of the ``patch`` mode
+------------------------------------------
+
+When the ``patch`` mode is available, it proposes a fix for each problem
+identified.
+
+Example
+~~~~~~~
+
+Running::
+
+	make coccicheck MODE=patch COCCI=scripts/coccinelle/api/err_cast.cocci
+
+will execute the following part of the SmPL script::
+
+    <smpl>
+    @ depends on !context && patch && !org && !report @
+    expression x;
+    @@
+
+    - ERR_PTR(PTR_ERR(x))
+    + ERR_CAST(x)
+    </smpl>
+
+This SmPL excerpt generates patch hunks on the standard output, as
+illustrated below::
+
+    diff -u -p a/crypto/ctr.c b/crypto/ctr.c
+    --- a/crypto/ctr.c 2010-05-26 10:49:38.000000000 +0200
+    +++ b/crypto/ctr.c 2010-06-03 23:44:49.000000000 +0200
+    @@ -185,7 +185,7 @@ static struct crypto_instance *crypto_ct
+ 	alg = crypto_attr_alg(tb[1], CRYPTO_ALG_TYPE_CIPHER,
+ 				  CRYPTO_ALG_TYPE_MASK);
+ 	if (IS_ERR(alg))
+    -		return ERR_PTR(PTR_ERR(alg));
+    +		return ERR_CAST(alg);
+
+ 	/* Block size must be >= 4 bytes. */
+ 	err = -EINVAL;
+
+Detailed description of the ``context`` mode
+--------------------------------------------
+
+``context`` highlights lines of interest and their context
+in a diff-like style.
+
+      **NOTE**: The diff-like output generated is NOT an applicable patch. The
+      intent of the ``context`` mode is to highlight the important lines
+      (annotated with minus, ``-``) and gives some surrounding context
+      lines around. This output can be used with the diff mode of
+      Emacs to review the code.
+
+Example
+~~~~~~~
+
+Running::
+
+	make coccicheck MODE=context COCCI=scripts/coccinelle/api/err_cast.cocci
+
+will execute the following part of the SmPL script::
+
+    <smpl>
+    @ depends on context && !patch && !org && !report@
+    expression x;
+    @@
+
+    * ERR_PTR(PTR_ERR(x))
+    </smpl>
+
+This SmPL excerpt generates diff hunks on the standard output, as
+illustrated below::
+
+    diff -u -p /home/user/linux/crypto/ctr.c /tmp/nothing
+    --- /home/user/linux/crypto/ctr.c	2010-05-26 10:49:38.000000000 +0200
+    +++ /tmp/nothing
+    @@ -185,7 +185,6 @@ static struct crypto_instance *crypto_ct
+ 	alg = crypto_attr_alg(tb[1], CRYPTO_ALG_TYPE_CIPHER,
+ 				  CRYPTO_ALG_TYPE_MASK);
+ 	if (IS_ERR(alg))
+    -		return ERR_PTR(PTR_ERR(alg));
+
+ 	/* Block size must be >= 4 bytes. */
+ 	err = -EINVAL;
+
+Detailed description of the ``org`` mode
+----------------------------------------
+
+``org`` generates a report in the Org mode format of Emacs.
+
+Example
+~~~~~~~
+
+Running::
+
+	make coccicheck MODE=org COCCI=scripts/coccinelle/api/err_cast.cocci
+
+will execute the following part of the SmPL script::
+
+    <smpl>
+    @r depends on !context && !patch && (org || report)@
+    expression x;
+    position p;
+    @@
+
+      ERR_PTR@p(PTR_ERR(x))
+
+    @script:python depends on org@
+    p << r.p;
+    x << r.x;
+    @@
+
+    msg="ERR_CAST can be used with %s" % (x)
+    msg_safe=msg.replace("[","@(").replace("]",")")
+    coccilib.org.print_todo(p[0], msg_safe)
+    </smpl>
+
+This SmPL excerpt generates Org entries on the standard output, as
+illustrated below::
+
+    * TODO [[view:/home/user/linux/crypto/ctr.c::face=ovl-face1::linb=188::colb=9::cole=16][ERR_CAST can be used with alg]]
+    * TODO [[view:/home/user/linux/crypto/authenc.c::face=ovl-face1::linb=619::colb=9::cole=16][ERR_CAST can be used with auth]]
+    * TODO [[view:/home/user/linux/crypto/xts.c::face=ovl-face1::linb=227::colb=9::cole=16][ERR_CAST can be used with alg]]
diff --git a/doc/develop/codingstyle.rst b/doc/develop/codingstyle.rst
new file mode 100644
index 00000000000..fa3cd6aec82
--- /dev/null
+++ b/doc/develop/codingstyle.rst
@@ -0,0 +1,254 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+U-Boot Coding Style
+===================
+
+The following Coding Style requirements shall be mandatory for all code contributed to
+the U-Boot project.
+
+Exceptions are only allowed if code from other projects is integrated with no
+or only minimal changes.
+
+The following rules apply:
+
+* All contributions to U-Boot should conform to the `Linux kernel
+  coding style <https://www.kernel.org/doc/html/latest/process/coding-style.html>`_
+  and the `Lindent script <https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/scripts/Lindent>`_.
+  * The exception for net files to the `multi-line comment
+  <https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting>`_
+  applies only to Linux, not to U-Boot. Only large hunks which are copied
+  unchanged from Linux may retain that comment format.
+
+* Python code shall conform to `PEP8 (Style Guide for Python Code)
+  <https://peps.python.org/pep-0008/>`_. Use `pylint
+  <https://github.com/pylint-dev/pylint>`_ for checking the code.
+
+* Use patman to send your patches (``tools/patman/patman -H`` for full
+  instructions). With a few tags in your commits this will check your patches
+  and take care of emailing them.
+
+* If you don't use patman, make sure to run ``scripts/checkpatch.pl``. For
+  more information, read :doc:`checkpatch`. Note that this should be done
+  *before* posting on the mailing list!
+
+* Source files originating from different projects (for example the MTD
+  subsystem or the hush shell code from the BusyBox project) may, after
+  careful consideration, be exempted from these rules. For such files, the
+  original coding style may be kept to ease subsequent migration to newer
+  versions of those sources.
+
+* Please also stick to the following formatting rules:
+
+  * Remove any trailing white space
+
+  * Use TAB characters for indentation and vertical alignment, not spaces
+
+    * The exception here is Python which requires 4 spaces instead.
+
+  * All source files need to be in "Unix" and not "DOS" or "Windows" format,
+    with respect to line ends.
+
+  * Do not add more than 2 consecutive empty lines to source files
+
+  * Do not add trailing empty lines to source files
+
+  * Using the option ``git config --global color.diff auto`` will help to
+    visually see whitespace problems in ``diff`` output from ``git``.
+
+  * In Emacs one can use ``=M-x whitespace-global-mode=`` to get visual
+    feedback on the nasty details. ``=M-x whitespace-cleanup=`` does The Right
+    Thing (tm)
+
+Submissions of new code or patches that do not conform to these requirements
+shall be rejected with a request to reformat the changes.
+
+U-Boot Code Documentation
+-------------------------
+
+U-Boot adopted the kernel-doc annotation style, this is the only exception from
+multi-line comment rule of Coding Style. While not mandatory, adding
+documentation is strongly advised. The Linux kernel `kernel-doc
+<https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html>`_
+documentation applies with no changes.
+
+Our Python code documentation follows `PEP257 (Docstring Conventions)
+<https://peps.python.org/pep-0257/>`_.
+
+Use structures for I/O access
+-----------------------------
+
+U-Boot typically uses a C structure to map out the registers in an I/O region,
+rather than offsets. The reasons for this are:
+
+* It dissociates the register location (offset) from the register type, which
+  means the developer has to make sure the type is right for each access,
+  whereas with the struct method, this is checked by the compiler;
+
+* It avoids actually writing all offsets, which is (more) error-prone;
+
+* It allows for better compile time sanity-checking of values we write to registers.
+
+Some reasons why you might not use C structures:
+
+* Where the registers appear at different offsets in different hardware
+  revisions supported by the same driver
+
+* Where the driver only uses a small subset of registers and it is not worth
+  defining a struct to cover them all, with large empty regions
+
+* Where the offset of a register might be hard to figure out when buried a long
+  way down a structure, possibly with embedded sub-structures
+
+* This may need to change to the kernel model if we allow for more run-time
+  detection of what drivers are appropriate for what we're running on.
+
+Please use the check_member() macro to verify that your structure is the
+expected size, or that particular members appear at the right offset.
+
+Include files
+-------------
+
+You should follow this ordering in U-Boot. In all cases, they should be listed
+in alphabetical order. First comes headers which are located directly in our
+top-level include diretory. Second are headers within subdirectories, Finally
+directory-local includes should be listed. See this example:
+
+.. code-block:: C
+
+   #include <bootstage.h>
+   #include <dm.h>
+   #include <others.h>
+   #include <asm/...>
+   #include <asm/arch/...>
+   #include <dm/device_compat.h>
+   #include <linux/...>
+   #include "local.h"
+
+For files that need to be compiled for the host (e.g. tools), you need to use
+``#ifndef USE_HOSTCC`` to avoid including U-Boot specific include files. See
+common/image.c for an example.
+
+If your file uses driver model, include <dm.h> in the C file. Do not include
+dm.h in a header file. Try to use forward declarations (e.g. ``struct
+udevice``) instead.
+
+Filenames
+---------
+
+For .c and .h files try to use underscore rather than hyphen unless you want
+the file to stand out (e.g. driver-model uclasses should be named xxx-uclass.h.
+Avoid upper case and keep the names fairly short.
+
+Function and struct comments
+----------------------------
+
+Non-trivial functions should have a comment which describes what they do. If it
+is an exported function, put the comment in the header file so the API is in
+one place. If it is a static function, put it in the C file.
+
+If the function returns errors, mention that and list the different errors that
+are returned. If it is merely passing errors back from a function it calls,
+then you can skip that.
+
+See `here
+<https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html#function-documentation>`_
+for style.
+
+Driver model
+------------
+
+When declaring a device, try to use ``struct udevice *dev``, i.e. ``dev`` as the name:
+
+.. code-block:: C
+
+   struct udevice *dev;
+
+Use ``ret`` as the return value:
+
+.. code-block:: C
+
+   struct udevice *dev;
+   int ret;
+
+   ret = uclass_first_device_err(UCLASS_ACPI_PMC, &dev);
+   if (ret)
+           return log_msg_ret("pmc", dev);
+
+Consider using log_ret() or log_msg_ret() to return a value (see above).
+
+Add a ``p`` suffix on return arguments:
+
+.. code-block:: C
+
+   int dm_pci_find_class(uint find_class, int index, struct udevice **devp)
+   {
+   ...
+           *devp = dev;
+
+           return 0;
+   }
+
+There are standard variable names that you should use in drivers:
+
+* ``struct xxx_priv`` and ``priv`` for dev_get_priv()
+
+* ``struct xxx_plat`` and ``plat`` for dev_get_platdata()
+
+For example:
+
+.. code-block:: C
+
+   struct simple_bus_plat {
+      u32 base;
+      u32 size;
+      u32 target;
+   };
+
+   /* Davinci MMC board definitions */
+   struct davinci_mmc_priv {
+      struct davinci_mmc_regs *reg_base;   /* Register base address */
+      uint input_clk;      /* Input clock to MMC controller */
+      struct gpio_desc cd_gpio;       /* Card Detect GPIO */
+      struct gpio_desc wp_gpio;       /* Write Protect GPIO */
+   };
+
+      struct rcar_gpio_priv *priv = dev_get_priv(dev);
+
+      struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
+
+Other
+-----
+
+Some minor things:
+
+* Put a blank line before the last ``return`` in a function unless it is the only line:
+
+.. code-block:: C
+
+   struct udevice *pci_get_controller(struct udevice *dev)
+   {
+      while (device_is_on_pci_bus(dev))
+         dev = dev->parent;
+
+      return dev;
+   }
+
+Tests
+-----
+
+Please add tests when you add code. Please change or expand tests when you change code.
+
+Run the tests with::
+
+   make check
+   make qcheck   (skips some tests)
+
+Python tests are in test/py/tests - see the docs in test/py for info.
+
+Try to write your tests in C if you can. For example, tests to check a command
+will be much faster (10-100x or more) if they can directly call run_command()
+and ut_check_console_line() instead of using Python to send commands over a
+pipe to U-Boot.
+
+Tests run all supported CI systems (GitLab, Azure) using scripts in the root of
+the U-Boot tree.
diff --git a/doc/develop/commands.rst b/doc/develop/commands.rst
new file mode 100644
index 00000000000..5ad4e59c838
--- /dev/null
+++ b/doc/develop/commands.rst
@@ -0,0 +1,226 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Implementing shell commands
+===========================
+
+Command definition
+------------------
+
+Commands are added to U-Boot by creating a new command structure.
+This is done by first including command.h, then using the U_BOOT_CMD() or the
+U_BOOT_CMD_COMPLETE macro to fill in a struct cmd_tbl structure.
+
+.. code-block:: c
+
+    U_BOOT_CMD(name, maxargs, repeatable, command, "usage", "help")
+    U_BOOT_CMD_COMPLETE(name, maxargs, repeatable, command, "usage, "help", comp)
+
+name
+    The name of the command. This is **not** a string.
+
+maxargs
+    The maximum number of arguments this function takes including
+    the command itself.
+
+repeatable
+    Either 0 or 1 to indicate if autorepeat is allowed.
+
+command
+    Pointer to the command function. This is the function that is
+    called when the command is issued.
+
+usage
+    Short description. This is a string.
+
+help
+    Long description. This is a string. The long description is
+    only available if CONFIG_SYS_LONGHELP is defined.
+
+comp
+    Pointer to the completion function. May be NULL.
+    This function is called if the user hits the TAB key while
+    entering the command arguments to complete the entry. Command
+    completion is only available if CONFIG_AUTO_COMPLETE is defined.
+
+Sub-command definition
+----------------------
+
+Likewise an array of struct cmd_tbl holding sub-commands can be created using
+either of the following macros:
+
+.. code-block:: c
+
+    U_BOOT_CMD_MKENT(name, maxargs, repeatable, command, "usage", "help")
+    U_BOOT_CMD_MKENTCOMPLETE(name, maxargs, repeatable, command, "usage, "help", comp)
+
+This table has to be evaluated in the command function of the main command, e.g.
+
+.. code-block:: c
+
+    static struct cmd_tbl cmd_sub[] = {
+        U_BOOT_CMD_MKENT(foo, CONFIG_SYS_MAXARGS, 1, do_foo, "", ""),
+        U_BOOT_CMD_MKENT(bar, CONFIG_SYS_MAXARGS, 1, do_bar, "", ""),
+    };
+
+    static int do_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+    {
+        struct cmd_tbl *cp;
+
+        if (argc < 2)
+                return CMD_RET_USAGE;
+
+        /* drop sub-command argument */
+        argc--;
+        argv++;
+
+        cp = find_cmd_tbl(argv[0], cmd_ut_sub, ARRAY_SIZE(cmd_sub));
+
+        if (cp)
+            return cp->cmd(cmdtp, flag, argc, argv);
+
+        return CMD_RET_USAGE;
+    }
+
+Command function
+----------------
+
+The command function pointer has to be of type
+
+.. code-block:: c
+
+    int (*cmd)(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+
+cmdtp
+    Table entry describing the command (see above).
+
+flag
+    A bitmap which may contain the following bits
+
+    * CMD_FLAG_REPEAT - The last command is repeated.
+    * CMD_FLAG_BOOTD  - The command is called by the bootd command.
+    * CMD_FLAG_ENV    - The command is called by the run command.
+
+argc
+    Number of arguments including the command.
+
+argv
+    Arguments.
+
+Allowable return value are:
+
+CMD_RET_SUCCESS
+    The command was successfully executed.
+
+CMD_RET_FAILURE
+    The command failed.
+
+CMD_RET_USAGE
+    The command was called with invalid parameters. This value
+    leads to the display of the usage string.
+
+Completion function
+-------------------
+
+The completion function pointer has to be of type
+
+.. code-block:: c
+
+    int (*complete)(int argc, char *const argv[], char last_char,
+                    int maxv, char *cmdv[]);
+
+argc
+    Number of arguments including the command.
+
+argv
+    Arguments.
+
+last_char
+    The last character in the command line buffer.
+
+maxv
+    Maximum number of possible completions that may be returned by
+    the function.
+
+cmdv
+    Used to return possible values for the last argument. The last
+    possible completion must be followed by NULL.
+
+The function returns the number of possible completions (without the terminating
+NULL value).
+
+Behind the scene
+----------------
+
+The structure created is named with a special prefix and placed by
+the linker in a special section using the linker lists mechanism
+(see include/linker_lists.h)
+
+This makes it possible for the final link to extract all commands
+compiled into any object code and construct a static array so the
+command array can be iterated over using the linker lists macros.
+
+The linker lists feature ensures that the linker does not discard
+these symbols when linking full U-Boot even though they are not
+referenced in the source code as such.
+
+If a new board is defined do not forget to define the command section
+by writing in u-boot.lds ($(srctree)/board/boardname/u-boot.lds) these
+3 lines:
+
+.. code-block:: c
+
+    __u_boot_list : {
+        KEEP(*(SORT(__u_boot_list*)));
+    }
+
+Writing tests
+-------------
+
+All new commands should have tests. Tests for existing commands are very
+welcome.
+
+It is fairly easy to write a test for a command. Enable it in sandbox, and
+then add code that runs the command and checks the output.
+
+Here is an example:
+
+.. code-block:: c
+
+    /* Test 'acpi items' command */
+    static int dm_test_acpi_cmd_items(struct unit_test_state *uts)
+    {
+        struct acpi_ctx ctx;
+        void *buf;
+
+        buf = malloc(BUF_SIZE);
+        ut_assertnonnull(buf);
+
+        ctx.current = buf;
+        ut_assertok(acpi_fill_ssdt(&ctx));
+        console_record_reset();
+        run_command("acpi items", 0);
+        ut_assert_nextline("dev 'acpi-test', type 1, size 2");
+        ut_assert_nextline("dev 'acpi-test2', type 1, size 2");
+        ut_assert_console_end();
+
+        ctx.current = buf;
+        ut_assertok(acpi_inject_dsdt(&ctx));
+        console_record_reset();
+        run_command("acpi items", 0);
+        ut_assert_nextline("dev 'acpi-test', type 2, size 2");
+        ut_assert_nextline("dev 'acpi-test2', type 2, size 2");
+        ut_assert_console_end();
+
+        console_record_reset();
+        run_command("acpi items -d", 0);
+        ut_assert_nextline("dev 'acpi-test', type 2, size 2");
+        ut_assert_nextlines_are_dump(2);
+        ut_assert_nextline("%s", "");
+        ut_assert_nextline("dev 'acpi-test2', type 2, size 2");
+        ut_assert_nextlines_are_dump(2);
+        ut_assert_nextline("%s", "");
+        ut_assert_console_end();
+
+        return 0;
+    }
+    DM_TEST(dm_test_acpi_cmd_items, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
diff --git a/doc/develop/config_binding.rst b/doc/develop/config_binding.rst
new file mode 100644
index 00000000000..c90e99c7baa
--- /dev/null
+++ b/doc/develop/config_binding.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot configuration node
+=========================
+
+U-Boot supports a number of runtime configuration options which can be selected
+in the devicetree.
+
+These are documented in
+:download:`The /config node <../../doc/device-tree-bindings/config.txt>`.
diff --git a/doc/develop/crash_dumps.rst b/doc/develop/crash_dumps.rst
new file mode 100644
index 00000000000..4237b073bc9
--- /dev/null
+++ b/doc/develop/crash_dumps.rst
@@ -0,0 +1,184 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2020 Heinrich Schuchardt
+
+Analyzing crash dumps
+=====================
+
+When the CPU detects an instruction that it cannot execute it raises an
+interrupt. U-Boot then writes a crash dump. This chapter describes how such
+dump can be analyzed.
+
+Creating a crash dump voluntarily
+---------------------------------
+
+For describing the analysis of a crash dump we need an example. U-Boot comes
+with a command :doc:`exception <../usage/cmd/exception>` that comes in handy
+here. The command is enabled by::
+
+    CONFIG_CMD_EXCEPTION=y
+
+The example output below was recorded when running qemu\_arm64\_defconfig on
+QEMU::
+
+    => exception undefined
+    "Synchronous Abort" handler, esr 0x02000000
+    elr: 00000000000101fc lr : 00000000000214ec (reloc)
+    elr: 000000007ff291fc lr : 000000007ff3a4ec
+    x0 : 000000007ffbd7f8 x1 : 0000000000000000
+    x2 : 0000000000000001 x3 : 000000007eedce18
+    x4 : 000000007ff291fc x5 : 000000007eedce50
+    x6 : 0000000000000064 x7 : 000000007eedce10
+    x8 : 0000000000000000 x9 : 0000000000000004
+    x10: 6db6db6db6db6db7 x11: 000000000000000d
+    x12: 0000000000000006 x13: 000000000001869f
+    x14: 000000007edd7dc0 x15: 0000000000000002
+    x16: 000000007ff291fc x17: 0000000000000000
+    x18: 000000007eed8dc0 x19: 0000000000000000
+    x20: 000000007ffbd7f8 x21: 0000000000000000
+    x22: 000000007eedce10 x23: 0000000000000002
+    x24: 000000007ffd4c80 x25: 0000000000000000
+    x26: 0000000000000000 x27: 0000000000000000
+    x28: 000000007eedce70 x29: 000000007edd7b40
+
+    Code: b00003c0 912ad000 940029d6 17ffff52 (e7f7defb)
+    Resetting CPU ...
+
+    resetting ...
+
+The first line provides us with the type of interrupt that occurred.
+On ARMv8 a synchronous abort is an exception thrown when hitting an unallocated
+instruction. The exception syndrome register ESR register contains information
+describing the reason for the exception. Bit 25 set here indicates that a 32 bit
+instruction led to the exception.
+
+The second line provides the contents of the elr and the lr register after
+subtracting the relocation offset. - U-Boot relocates itself after being
+loaded. - The relocation offset can also be displayed using the bdinfo command.
+
+After the contents of the registers we get a line indicating the machine
+code of the instructions preceding the crash and in parentheses the instruction
+leading to the dump.
+
+Analyzing the code location
+---------------------------
+
+We can convert the instructions in the line starting with 'Code:' into mnemonics
+using the objdump command. To make things easier scripts/decodecode is
+supplied::
+
+    $echo 'Code: b00003c0 912ad000 940029d6 17ffff52 (e7f7defb)' | \
+      CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm64 scripts/decodecode
+    Code: b00003c0 912ad000 940029d6 17ffff52 (e7f7defb)
+    All code
+    ========
+       0:   b00003c0     adrp   x0, 0x79000
+       4:   912ad000     add    x0, x0, #0xab4
+       8:   940029d6     bl     0xa760
+       c:   17ffff52     b      0xfffffffffffffd54
+      10:*  e7f7defb     .inst  0xe7f7defb ; undefined <-- trapping instruction
+
+    Code starting with the faulting instruction
+    ===========================================
+       0:   e7f7defb     .inst  0xe7f7defb ; undefined
+
+Now lets use the locations provided by the elr and lr registers after
+subtracting the relocation offset to find out where in the code the crash
+occurred and from where it was invoked.
+
+File u-boot.map contains the memory layout of the U-Boot binary. Here we find
+these lines::
+
+   .text.do_undefined
+                  0x00000000000101fc        0xc cmd/built-in.o
+   .text.exception_complete
+                  0x0000000000010208       0x90 cmd/built-in.o
+   ...
+   .text.cmd_process
+                  0x00000000000213b8      0x164 common/built-in.o
+                  0x00000000000213b8                cmd_process
+   .text.cmd_process_error
+                  0x000000000002151c       0x40 common/built-in.o
+                  0x000000000002151c                cmd_process_error
+
+So the error occurred at the start of function do\_undefined() and this
+function was invoked from somewhere inside function cmd\_process().
+
+If we want to dive deeper, we can disassemble the U-Boot binary::
+
+    $ aarch64-linux-gnu-objdump -S -D u-boot | less
+
+    00000000000101fc <do_undefined>:
+    {
+            /*
+             * 0xe7f...f.   is undefined in ARM mode
+             * 0xde..       is undefined in Thumb mode
+            */
+            asm volatile (".word 0xe7f7defb\n");
+       101fc:       e7f7defb        .inst   0xe7f7defb ; undefined
+            return CMD_RET_FAILURE;
+    }
+    10200:       52800020        mov     w0, #0x1        // #1
+    10204:       d65f03c0        ret
+
+This example is based on the ARMv8 architecture but the same procedures can be
+used on other architectures as well.
+
+Crashs in UEFI binaries
+-----------------------
+
+If UEFI images are loaded when a crash occurs, their load addresses are
+displayed. If the process counter points to an address in a loaded UEFI
+binary, the relative process counter position is indicated. Here is an
+example executed on the U-Boot sandbox::
+
+    => load host 0:1 $kernel_addr_r buggy.efi
+    5632 bytes read in 0 ms
+    => bootefi $kernel_addr_r
+    Booting /buggy.efi
+    Buggy world!
+
+    Segmentation violation
+    pc = 0x19fc264c, pc_reloc = 0xffffaa4688b1664c
+
+    UEFI image [0x0000000019fc0000:0x0000000019fc6137] pc=0x264c '/buggy.efi'
+
+The crash occured in UEFI binary buggy.efi at relative position 0x264c.
+Disassembly may be used to find the actual source code location::
+
+    $ x86_64-linux-gnu-objdump -S -D buggy_efi.so
+
+    0000000000002640 <memset>:
+        2640:       f3 0f 1e fa             endbr64
+        2644:       48 89 f8                mov    %rdi,%rax
+        2647:       48 89 f9                mov    %rdi,%rcx
+        264a:       eb 0b                   jmp    2657 <memset+0x17>
+        264c:       40 88 31                mov    %sil,(%rcx)
+
+Architecture specific details
+-----------------------------
+
+ARMv8
+~~~~~
+
+On the ARM 64-bit architecture CONFIG_ARMV8_SPL_EXCEPTION_VECTORS controls
+if the exception vector tables are set up in the Secondary Program Loader (SPL).
+Without initialization of the tables crash dumps cannot be shown. The feature is
+disabled by default on most boards to reduce the size of the SPL.
+
+RISC-V
+~~~~~~
+
+On the RISC-V architecture CONFIG_SHOW_REGS=y has to be specified to show
+all registers in crash dumps.
+
+Sandbox
+~~~~~~~
+
+The sandbox U-Boot binary must be invoked with parameter *-S* to display crash
+dumps:
+
+.. code-block:: bash
+
+    ./u-boot -S -T
+
+Only with CONFIG_SANDBOX_CRASH_RESET=y the sandbox reboots after a crash.
diff --git a/doc/develop/cyclic.rst b/doc/develop/cyclic.rst
new file mode 100644
index 00000000000..893c269099a
--- /dev/null
+++ b/doc/develop/cyclic.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Cyclic functions
+================
+
+The cyclic function execution infrastruture provides a way to periodically
+execute code, e.g. every 100ms. Examples for such functions might be LED
+blinking etc. The functions that are hooked into this cyclic list should
+be small timewise as otherwise the execution of the other code that relies
+on a high frequent polling (e.g. UART rx char ready check) might be
+delayed too much. To detect cyclic functions with an excessive execution
+time, the Kconfig option `CONFIG_CYCLIC_MAX_CPU_TIME_US` was introduced.
+It defines the maximum allowable execution time for such a cyclic function. The
+first time the execution of a cyclic function exceeds this interval, a warning
+will be displayed indicating the problem to the user.
+
+Registering a cyclic function
+-----------------------------
+
+To register a cyclic function, use something like this::
+
+    struct donkey {
+        struct cyclic_info cyclic;
+        void (*say)(const char *s);
+    };
+
+    static void cyclic_demo(struct cyclic_info *c)
+    {
+        struct donkey *donkey = container_of(c, struct donkey, cyclic);
+
+        donkey->say("Are we there yet?");
+    }
+
+    int donkey_init(void)
+    {
+        struct donkey *donkey;
+
+        /* Initialize donkey ... */
+
+        /* Register demo cyclic function */
+        cyclic_register(&donkey->cyclic, cyclic_demo, 10 * 1000, "cyclic_demo");
+        
+        return 0;
+    }
+
+This will register the function `cyclic_demo()` to be periodically
+executed all 10ms.
+
+How is this cyclic functionality integrated /  executed?
+--------------------------------------------------------
+
+The cyclic infrastructure integrates the main function responsible for
+calling all registered cyclic functions cyclic_run() into the common
+WATCHDOG_RESET macro. This guarantees that cyclic_run() is executed
+very often, which is necessary for the cyclic functions to get scheduled
+and executed at their configured periods.
diff --git a/doc/develop/designprinciples.rst b/doc/develop/designprinciples.rst
new file mode 100644
index 00000000000..f01d562d6f0
--- /dev/null
+++ b/doc/develop/designprinciples.rst
@@ -0,0 +1,205 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+U-Boot Design Principles
+========================
+
+The 10 Golden Rules of U-Boot design
+------------------------------------
+
+Keep it Small
+^^^^^^^^^^^^^
+
+U-Boot is a Boot Loader, i.e. its primary purpose in the shipping
+system is to load some operating system.
+That means that U-Boot is
+necessary to perform a certain task, but it's nothing you want to
+throw any significant resources at. Typically U-Boot is stored in
+relatively small NOR flash memory, which is expensive
+compared to the much larger NAND devices often used to store the
+operating system and the application.
+
+At the moment, U-Boot supports boards with just 128 KiB ROM or with
+256 KiB NOR flash. We should not easily ignore such configurations -
+they may be the exception in among all the other supported boards,
+but if a design uses such a resource-constrained hardware setup it is
+usually because costs are critical, i. e. because the number of
+manufactured boards might be tens or hundreds of thousands or even
+millions...
+
+A usable and useful configuration of U-Boot, including a basic
+interactive command interpreter, support for download over Ethernet
+and the capability to program the flash shall fit in no more than 128 KiB.
+
+Keep it Fast
+^^^^^^^^^^^^
+
+The end user is not interested in running U-Boot. In most embedded
+systems they are not even aware that U-Boot exists. The user wants to
+run some application code, and that as soon as possible after switching
+on their device.
+
+It is therefore essential that U-Boot is as fast as possible,
+especially that it loads and boots the operating system as fast as possible.
+
+To achieve this, the following design principles shall be followed:
+
+* Enable caches as soon and whenever possible
+
+* Initialize devices only when they are needed within U-Boot, i.e. don't
+  initialize the Ethernet interface(s) unless U-Boot performs a download over
+  Ethernet; don't  initialize any IDE or USB devices unless U-Boot actually
+  tries to load files from these, etc.  (and don't forget to shut down these
+  devices after using them  - otherwise nasty things may happen when you try to
+  boot your OS).
+
+Also, building of U-Boot shall be as fast as possible.
+This makes it easier to run a build for all supported configurations
+or at least for all configurations of a specific architecture,
+which is essential for quality assurance.
+If building is cumbersome and slow, most people will omit
+this important step.
+
+Keep it Simple
+^^^^^^^^^^^^^^
+
+U-Boot is a boot loader, but it is also a tool used for board
+bring-up, for production testing, and for other activities.
+
+Keep it Portable
+^^^^^^^^^^^^^^^^
+
+U-Boot is a boot loader, but it is also a tool used for board
+bring-up, for production testing, and for other activities that are
+very closely related to hardware development. So far, it has been
+ported to several hundreds of different boards on about 30 different
+processor families - please make sure that any code you add can be
+used on as many different platforms as possible.
+
+Avoid assembly language whenever possible - only the reset code with
+basic CPU initialization, maybe a static DRAM initialization and the C
+stack setup should be in assembly.
+All further initializations should be done in C using assembly/C
+subroutines or inline macros. These functions represent some
+kind of HAL functionality and should be defined consistently on all
+architectures, e.g. basic MMU and cache control, stack pointer manipulation.
+Non-existing functions should expand into empty macros or error codes.
+
+Don't make assumptions about the environment where U-Boot is running.
+It may be communicating with a human operator on directly attached
+serial console, but it may be through a GSM modem as well, or driven
+by some automatic test or control system. So don't output any fancy
+control character sequences or similar.
+
+Keep it Configurable
+^^^^^^^^^^^^^^^^^^^^
+
+Section "Keep it Small" already explains about the size restrictions
+for U-Boot on one side. On the other side, U-Boot is a powerful tool
+with many, many extremely useful features. The maintainer or user of
+each board will have to decide which features are important to them and
+what shall be included with their specific board configuration to meet
+their current requirements and restrictions.
+
+Please make sure that it is easy to add or remove features from a
+board configuration, so everybody can make the best use of U-Boot on
+their system.
+
+If a feature is not included, it should not have any residual code
+bloating the build.
+
+Keep it Debuggable
+^^^^^^^^^^^^^^^^^^
+
+Of course debuggable code is a big benefit for all of us contributing
+in one way or another to the development of the U-Boot project. But
+as already mentioned in section "Keep it Portable" above, U-Boot is
+not only a tool in itself, it is often also used for hardware
+bring-up, so debugging U-Boot often means that we don't know if we are
+tracking down a problem in the U-Boot software or in the hardware we
+are running on. Code that is clean and easy to understand and to
+debug is all the more important to many of us.
+
+* One important feature of U-Boot is to enable output to the (usually serial)
+  console as soon as possible in the boot process, even if this causes
+  tradeoffs in other areas like memory footprint.
+
+* All initialization steps shall print some "begin doing this" message before
+  they actually start, and some "done" message when they complete. For example,
+  RAM initialization and size detection may print a "RAM: " before they start,
+  and "256 MB\\n" when done.  The purpose of this is that you can always see
+  which initialization step was running if there should be any problem.  This
+  is important not only during software development, but also for the service
+  people dealing with broken hardware in the field.
+
+* U-Boot should be debuggable with simple JTAG or BDM equipment.  It shall use
+  a simple, single-threaded execution model.  Avoid any magic, which could
+  prevent easy debugging even when only 1 or 2 hardware breakpoints are
+  available.
+
+Keep it Usable
+^^^^^^^^^^^^^^
+
+Please always keep in mind that there are at least three different
+groups of users for U-Boot, with completely different expectations
+and requirements:
+
+* The end user of an embedded device just wants to run some application; they
+  do not even want to know that U-Boot exists and only rarely interacts with
+  it (for example to perform a reset to factory default settings etc.)
+
+* System designers and engineers working on the development of the application
+  and/or the operating system want a powerful tool that can boot from any boot
+  device they can imagine, they want it fast and scriptable and whatever - in
+  short, they want as many features supported as possible. And some more.
+
+* The engineer who ports U-Boot to a new board and the board maintainer want
+  U-Boot to be as simple as possible so porting it to and maintaining it on
+  their hardware is easy for them.
+
+* Make it easy to test. Add debug code (but don't re-invent the wheel - use
+  existing macros like log_debug() or debug() depending on context).
+
+Please always keep in mind that U-Boot tries to meet all these
+different requirements.
+
+Keep it Maintainable
+^^^^^^^^^^^^^^^^^^^^
+
+* Avoid ``#ifdefs`` where possible
+
+* Use "weak" functions
+
+* Always follow the :doc:`codingstyle` requirements.
+
+Keep it Beautiful
+^^^^^^^^^^^^^^^^^
+
+* Keep the source code clean: strictly follow the :doc:`codingstyle`,
+  keep lists (target names in the Makefiles, board names, etc.)
+  alphabetically sorted, etc.
+
+* Keep U-Boot console output clean: output only really necessary information,
+  be terse but precise, keep output vertically aligned, do not use control
+  character sequences (e.g. backspaces or \\r to do "spinning wheel" activity
+  indicators), etc.
+
+Keep it Open
+^^^^^^^^^^^^
+
+Contribute your work back to the whole community. Submit your changes
+and extensions as patches to the U-Boot mailing list.
+
+Lemmas from the golden rules
+----------------------------
+
+Generic Code is Good Code
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+New code shall be as generic as possible and added to the U-Boot
+abstraction hierarchy as high as possible. As few code as possible shall be
+added in board directories as people usually do not expect re-usable code
+there.  Thus peripheral drivers should be put below
+"drivers" even if they start out supporting only one specific
+configuration.  Note that it is not a requirement for such a first
+instance to be generic as genericity generally cannot be extrapolated
+from a single data point.
diff --git a/doc/develop/devicetree/control.rst b/doc/develop/devicetree/control.rst
new file mode 100644
index 00000000000..ca4fb0b5b10
--- /dev/null
+++ b/doc/develop/devicetree/control.rst
@@ -0,0 +1,345 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Copyright 2011 The Chromium OS Authors
+.. Copyright 2023-2024 Linaro Ltd.
+
+Devicetree Control in U-Boot
+============================
+
+This feature provides for run-time configuration of U-Boot via a flattened
+devicetree (fdt).
+
+This feature aims to make it possible for a single U-Boot binary to support
+multiple boards, with the exact configuration of each board controlled by
+a flattened devicetree (fdt). This is the approach  taken by Linux kernel for
+ARM and RISC-V and has been used by PowerPC for some time.
+
+The fdt is a convenient vehicle for implementing run-time configuration
+for three reasons:
+
+- There is already excellent infrastructure for the fdt: a compiler checks
+  the text file and converts it to a compact binary format, and a library
+  is already available in U-Boot (libfdt) for handling this format
+- It is extensible since it consists of nodes and properties in a nice
+  hierarchical format
+- It is fairly efficient to read incrementally
+
+The U-Boot Makefile infrastructure allows for building the devicetree blob
+and embedding it in the U-Boot image. This is useful since it allows U-Boot
+to configure itself according to what it finds there. If you have a number
+of similar boards with different peripherals, you can describe the features
+of each board in the devicetree file, and have a single generic source base.
+
+To enable this feature, select `OF_CONTROL` via Kconfig.
+
+
+What is a Flattened Devicetree?
+-------------------------------
+
+An fdt can be specified in source format as a text file. To read about
+the fdt syntax, take a look at `the devicetree specification`_.
+
+There is also a `devicetree compiler mailing list`_ for the compiler and
+associated tools.
+
+In case you are wondering, OF stands for Open Firmware. This follows the
+convention used in Linux.
+
+
+Tools
+-----
+
+To create flattened device trees the device tree compiler is used. This is
+provided by U-Boot automatically. If you have a system version of dtc
+(typically in the 'device-tree-compiler' package), that system version is
+currently not used.
+
+If you want to build your own dtc, it is kept here::
+
+    git://git.kernel.org/pub/scm/utils/dtc/dtc.git
+
+You can decode a binary file with::
+
+    dtc -I dtb -O dts <filename.dtb>
+
+That repo also includes `fdtget`/`fdtput` for reading and writing properties in
+a binary file. U-Boot adds its own `fdtgrep` for creating subsets of the file.
+
+
+Where do I get a devicetree file for my board?
+----------------------------------------------
+
+The devicetree files and devicetree bindings are maintained as part of the Linux
+kernel git repository. Traditionally, U-Boot placed copies of devicetree source
+files from the Linux kernel into `arch/<arch>/dts/<name>.dts`. However, this
+required each board maintainer to manually keep their devicetree in sync with
+the Linux kernel and often led to divergence between these copies.
+
+U-Boot rather maintains a Git subtree as `dts/upstream/` sub-directory. It is
+regularly synced with the Linux kernel and hence no need for manual devicetree
+sync. You may find that the `dts/upstream/` already has a suitable devicetree
+file for your board. Look in `dts/upstream/src/<arch>/<vendor>`.
+
+If not you might find other boards with suitable files that you can
+modify to your needs. Look in the board directories for files with a
+.dts extension.
+
+Failing that, you could write one from scratch yourself!
+
+
+Resyncing with devicetree-rebasing
+----------------------------------
+
+The `devicetree-rebasing repository`_ maintains a fork cum mirror copy of
+devicetree files along with the bindings synced at every Linux kernel major
+release or intermediate release candidates. The U-Boot maintainers regularly
+sync the `dts/upstream/` subtree from the devicetree-rebasing repo whenever
+the next branch opens (refer: :doc:`../release_cycle`) with the latest mainline
+Linux kernel release. To sync the `dts/upstream/` subtree, run::
+
+    ./dts/update-dts-subtree.sh pull <devicetree-rebasing-release-tag>
+
+If required it is also possible to cherry-pick fixes from the
+devicetree-rebasing repository prior to next sync, usage::
+
+    ./dts/update-dts-subtree.sh pick <devicetree-rebasing-commit-id>
+
+
+Configuration
+-------------
+
+SoC/board maintainers are encouraged to migrate to use synced copies from
+`dts/upstream/src/<arch>/<vendor>`. To do that add `imply OF_UPSTREAM` for the
+SoC being used via Kconfig and set `DEFAULT_DEVICE_TREE=<vendor>/<name>` when
+prompted by Kconfig.
+
+However, if `dts/upstream/` hasn't yet received devicetree source file for your
+newly added board support then one option is that you can add the corresponding
+devicetree source file as `arch/<arch>/dts/<name>.dts`. To select that add `#
+CONFIG_OF_UPSTREAM is not set` and set `DEFAULT_DEVICE_TREE=<name>` when
+prompted by Kconfig. Another option is that you can use use the "pick" option of
+`dts/update-dts-subtree.sh` mentioned above to bring in the commits that you
+need.
+
+This should include your CPU or SoC's devicetree file. On top of that any U-Boot
+specific tweaks (see: :ref:`dttweaks`) can be made for your board.
+
+If `OF_EMBED` is selected by Kconfig, then it will be picked up and built into
+the U-Boot image (including u-boot.bin). This is suitable for debugging
+and development only and is not recommended for production devices.
+
+If `OF_SEPARATE` is selected by Kconfig, then it will be built and placed in
+a u-boot.dtb file alongside u-boot-nodtb.bin with the combined result placed
+in u-boot.bin so you can still just flash u-boot.bin onto your board. If Kconfig
+option `SPL_FRAMEWORK` is enabled, then u-boot.img will be built to include the
+device tree binary.
+
+If `OF_BOARD` is selected by Kconfig, a board-specific routine will provide the
+devicetree at runtime, for example if an earlier bootloader stage creates
+it and passes it to U-Boot.
+
+If `BLOBLIST` is selected by Kconfig, the devicetree may come from a bloblist
+passed from a previous stage, if present.
+
+If `SANDBOX` is selected by Kconfig, then it will be read from a file on
+startup. Use the -d flag to U-Boot to specify the file to read, -D for the
+default and -T for the test devicetree, used to run sandbox unit tests.
+
+You cannot use more than one of these options at the same time.
+
+To use a devicetree file that you have compiled yourself, pass
+EXT_DTB=<filename> to 'make', as in::
+
+   make EXT_DTB=boot/am335x-boneblack-pubkey.dtb
+
+Then U-Boot will copy that file to u-boot.dtb, put it in the .img file
+if used, and u-boot-dtb.bin.
+
+If you wish to put the fdt at a different address in memory, you can
+define the "fdtcontroladdr" environment variable. This is the hex
+address of the fdt binary blob, and will override either of the options.
+Be aware that this environment variable is checked prior to relocation,
+when only the compiled-in environment is available. Therefore it is not
+possible to define this variable in the saved SPI/NAND flash
+environment, for example (it will be ignored). After relocation, this
+variable will be set to the address of the newly relocated fdt blob.
+It is read-only and cannot be changed. It can optionally be used to
+control the boot process of Linux with bootm/bootz commands.
+
+To use this, put something like this in your board header file::
+
+   #define CFG_EXTRA_ENV_SETTINGS	"fdtcontroladdr=10000\0"
+
+Build:
+
+After the board configuration is done, fdt supported u-boot can be built in two
+ways:
+
+#  build the default dts which is selected by DEFAULT_DEVICE_TREE Kconfig::
+
+    $ make
+
+#  build the user specified dts file::
+
+    $ make DEVICE_TREE=<dts-file-name>
+
+
+.. _dttweaks:
+
+Adding tweaks for U-Boot
+------------------------
+
+With `dts/upstream` Git subtree, it is ensured that devicetree files in U-Boot
+are an exact copy of those in Linux kernel available under
+`dts/upstream/src/<arch>/<vendor>`.
+
+U-Boot is of course a very different project from Linux, e.g. it operates under
+much more restrictive memory and code-size constraints. Where Linux may use a
+full clock driver with Common Clock Format (CCF) to find the input clock to the
+UART, U-Boot typically wants to output a banner as early as possible before too
+much code has run.
+
+A second difference is that U-Boot includes different phases. For SPL,
+constraints are even more extreme and the devicetree is shrunk to remove
+unwanted nodes, or even turned into C code to avoid access overhead.
+
+U-Boot automatically looks for and includes a file with updates to the standard
+devicetree for your board, searching for them in `arch/<arch>/dts/` in this
+order::
+
+   <orig_filename>-u-boot.dtsi
+   <CONFIG_SYS_SOC>-u-boot.dtsi
+   <CONFIG_SYS_CPU>-u-boot.dtsi
+   <CONFIG_SYS_VENDOR>-u-boot.dtsi
+   u-boot.dtsi
+
+Only one of these is selected but of course you can #include another one within
+that file, to create a hierarchy of shared files.
+
+
+External .dtsi fragments
+------------------------
+
+Apart from describing the hardware present, U-Boot also uses its
+control dtb for various configuration purposes. For example, the
+public key(s) used for Verified Boot are embedded in a specific format
+in a /signature node.
+
+As mentioned above, the U-Boot build system automatically includes a
+`*-u-boot.dtsi` file, if found, containing U-Boot specific
+quirks. However, some data, such as the mentioned public keys, are not
+appropriate for upstream U-Boot but are better kept and maintained
+outside the U-Boot repository. You can use `DEVICE_TREE_INCLUDES` Kconfig
+option to specify a list of .dtsi files that will also be included when
+building .dtb files.
+
+
+Devicetree bindings schema checks
+---------------------------------
+
+With devicetee-rebasing Git subtree, the devicetree bindings are also regularly
+synced with Linux kernel as `dts/upstream/Bindings/` sub-directory. This
+allows U-Boot to run devicetree bindings schema checks which will bring
+compliance to U-Boot core/drivers regarding usage of devicetree.
+
+Dependencies
+~~~~~~~~~~~~
+
+The DT schema project must be installed in order to validate the DT schema
+binding documents and validate DTS files using the DT schema. For installation
+instructions, refer to the `DT schema project page`_.
+
+Several executables (dt-doc-validate, dt-mk-schema, dt-validate) will be
+installed. Ensure they are in your PATH (~/.local/bin by default).
+
+You should also install yamllint (used by dtschema when present). On Debian/
+Ubuntu systems::
+
+    apt install yamllint
+
+Running checks
+~~~~~~~~~~~~~~
+
+In order to perform validation of DTB files, use the ``dtbs_check`` target::
+
+    make dtbs_check
+
+It is also possible to run checks with a subset of matching schema files by
+setting the ``DT_SCHEMA_FILES`` variable to 1 or more specific schema files or
+patterns (partial match of a fixed string). Each file or pattern should be
+separated by ':'.
+
+::
+
+    make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml:rtc.yaml
+    make dtbs_check DT_SCHEMA_FILES=/gpio/
+    make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml
+
+
+Relocation, SPL and TPL
+-----------------------
+
+U-Boot can be divided into three phases: TPL, SPL and U-Boot proper.
+
+The full devicetree is available to U-Boot proper, but normally only a subset
+(or none at all) is available to TPL and SPL. See 'Pre-Relocation Support' and
+'SPL Support' in doc/driver-model/design.rst for more details.
+
+
+Using several DTBs in the SPL (SPL_MULTI_DTB_FIT Kconfig option)
+----------------------------------------------------------------
+In some rare cases it is desirable to let SPL be able to select one DTB among
+many. This usually not very useful as the DTB for the SPL is small and usually
+fits several platforms. However the DTB sometimes include information that do
+work on several platforms (like IO tuning parameters).
+In this case it is possible to use SPL_MULTI_DTB_FIT Kconfig option. This option
+appends to the SPL a FIT image containing several DTBs listed in SPL_OF_LIST.
+board_fit_config_name_match() is called to select the right DTB.
+
+If board_fit_config_name_match() relies on DM (DM driver to access an EEPROM
+containing the board ID for example), it possible to start with a generic DTB
+and then switch over to the right DTB after the detection. For this purpose,
+the platform code must call fdtdec_resetup(). Based on the returned flag, the
+platform may have to re-initialise the DM subsystem using dm_uninit() and
+dm_init_and_scan().
+
+
+Limitations
+-----------
+
+Devicetrees can help reduce the complexity of supporting variants of boards
+which use the same SOC / CPU.
+
+However U-Boot is designed to build for a single architecture type and CPU
+type. So for example it is not possible to build a single ARM binary
+which runs on your AT91 and OMAP boards, relying on an fdt to configure
+the various features. This is because you must select one of
+the CPU families within arch/arm/cpu/arm926ejs (omap or at91) at build
+time. Similarly U-Boot cannot be built for multiple cpu types or
+architectures.
+
+It is important to understand that the fdt only selects options
+available in the platform / drivers. It cannot add new drivers (yet). So
+you must still have the Kconfig option to enable the driver. For example,
+you need to enable SYS_NS16550 Kconfig option to bring in the NS16550 driver,
+but can use the fdt to specific the UART clock, peripheral address, etc.
+In very broad terms, the Kconfig options in general control *what* driver
+files are pulled in, and the fdt controls *how* those files work.
+
+History
+-------
+
+U-Boot configuration was previous done using CONFIG options in the board
+config file. This eventually got out of hand with nearly 10,000 options.
+
+U-Boot adopted devicetrees around the same time as Linux and early boards
+used it before Linux (e.g. snow). The two projects developed in parallel
+and there are still some differences in the bindings for certain boards.
+While there has been discussion of having a separate repository for devicetree
+files, in practice the Linux kernel Git repository has become the place where
+these are stored, with U-Boot taking copies via
+`devicetree-rebasing repository`_ and adding tweaks with u-boot.dtsi files.
+
+.. _the devicetree specification: https://www.devicetree.org/specifications/
+.. _devicetree compiler mailing list: https://www.spinics.net/lists/devicetree-compiler/
+.. _devicetree-rebasing repository: https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
+.. _DT schema project page: https://github.com/devicetree-org/dt-schema/tree/main
diff --git a/doc/develop/devicetree/dt_qemu.rst b/doc/develop/devicetree/dt_qemu.rst
new file mode 100644
index 00000000000..8ba2b225590
--- /dev/null
+++ b/doc/develop/devicetree/dt_qemu.rst
@@ -0,0 +1,48 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Devicetree in QEMU
+==================
+
+For QEMU on ARM, RISC-V and one PPC target, the devicetree is created on-the-fly
+by QEMU. It is intended for use in Linux but can be used by U-Boot also, so long
+as any nodes/properties needed by U-Boot are merged in.
+
+When `CONFIG_OF_BOARD` is enabled
+
+
+Obtaining the QEMU devicetree
+-----------------------------
+
+Where QEMU generates its own devicetree to pass to U-Boot you can use
+`-dtb u-boot.dtb` to force QEMU to use U-Boot's in-tree version.
+
+To obtain the devicetree that qemu generates, add `-machine dumpdtb=qemu.dtb`,
+e.g.::
+
+    qemu-system-arm -machine virt -machine dumpdtb=qemu.dtb
+
+    qemu-system-aarch64 -machine virt -machine dumpdtb=qemu.dtb
+
+    qemu-system-riscv64 -machine virt -machine dumpdtb=qemu.dtb
+
+
+Merging in U-Boot nodes/properties
+----------------------------------
+
+Various U-Boot features require nodes and properties in the U-Boot devicetree
+and at present QEMU is unaware of these. To use these you must manually merge
+in the appropriate pieces.
+
+One way to do this is with dtc. This command runs dtc on each .dtb file in turn,
+to produce a text file. It drops the duplicate header on the qemu one. Then it
+joins them up and runs them through dtc to compile the output::
+
+    qemu-system-arm -machine virt -machine dumpdtb=qemu.dtb
+    cat  <(dtc -I dtb qemu.dtb) <(dtc -I dtb u-boot.dtb | grep -v /dts-v1/) | dtc - -o merged.dtb
+
+You can then run qemu with the merged devicetree, e.g.::
+
+    qemu-system-arm -machine virt -nographic -bios u-boot.bin -dtb merged.dtb
+
+Note that there seems to be a bug in some versions of qemu where the output of
+dumpdtb does not quite match what is provided to U-Boot.
diff --git a/doc/develop/devicetree/index.rst b/doc/develop/devicetree/index.rst
new file mode 100644
index 00000000000..2edb69572dd
--- /dev/null
+++ b/doc/develop/devicetree/index.rst
@@ -0,0 +1,14 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Devicetree in U-Boot
+====================
+
+The following holds information on how U-Boot makes use of devicetree for
+build-time and runtime configuration.
+
+.. toctree::
+   :maxdepth: 2
+
+   intro
+   control
+   dt_qemu
diff --git a/doc/develop/devicetree/intro.rst b/doc/develop/devicetree/intro.rst
new file mode 100644
index 00000000000..36e8cc0d440
--- /dev/null
+++ b/doc/develop/devicetree/intro.rst
@@ -0,0 +1,44 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Devicetree Introduction
+=======================
+
+U-Boot uses a devicetree for configuration. This includes the devices used by
+the board, the format of the image created with binman, which UART to use for
+the console, public keys used for secure boot and many other things.
+
+See :doc:`control` for more information.
+
+Why does U-Boot put <thing> in the devicetree?
+----------------------------------------------
+
+This question comes up a lot with people new to U-Boot, particular those coming
+from Linux who are used to quite strict rules about what can go into the
+devicetree.
+
+U-Boot uses the same devicetree as Linux but adds more things necessary for the
+bootloader environment (see :ref:`dttweaks`).
+
+U-Boot does not have a user space to provide policy and configuration. It cannot
+do what Linux does and run programs and look up filesystems to figure out how to
+boot. So configuration and runtime information goes into the devicetree in
+U-Boot.
+
+Of course it is possible to:
+
+- add tables into the rodata section of the U-Boot binary
+- append some info to the end of U-Boot in a different format
+- modify the linker script to bring in a file with some info in it
+- put things in ACPI tables
+- link in a UEFI hand-off block structure and put things in there
+
+but *please don't*. In general, devicetree is the sane place to hold U-Boot's
+configuration.
+
+So, please, do NOT ask why U-Boot puts <thing> in the devicetree. It is the only
+place it can go. It is a highly suitable data structure for just about anything
+that U-Boot needs to know at runtime.
+
+Note, it is possible to use platdata directly so drivers avoid devicetreee in
+SPL. But of-platdata is the modern way of avoiding devicetree overhead, so
+please use that instead.
diff --git a/doc/develop/directories.rst b/doc/develop/directories.rst
new file mode 100644
index 00000000000..112b5655f6e
--- /dev/null
+++ b/doc/develop/directories.rst
@@ -0,0 +1,76 @@
+Directory hierarchy
+===================
+
+.. list-table::
+   :header-rows: 1
+
+   * - Directory path
+     - Usage
+   * - /arch
+     - Architecture-specific files
+   * - /arch/arc
+     - Files relating to ARC architecture
+   * - /arch/arm
+     - Files relating to ARM architecture
+   * - /arch/m68k
+     - Files relating to m68k architecture
+   * - /arch/microblaze
+     - Files relating to microblaze architecture
+   * - /arch/mips
+     - Files relating to MIPS architecture
+   * - /arch/nios2
+     - Files relating to Altera NIOS2 architecture
+   * - /arch/powerpc
+     - Files relating to PowerPC architecture
+   * - /arch/riscv
+     - Files relating to RISC-V architecture
+   * - /arch/sandbox
+     - Files relating to HW-independent "sandbox"
+   * - /arch/sh
+     - Files relating to SH architecture
+   * - /arch/x86
+     - Files relating to x86 architecture
+   * - /arch/xtensa
+     - Files relating to Xtensa architecture
+   * - /api
+     - Machine/arch-independent API for external apps
+   * - /board
+     - Board-dependent files
+   * - /boot
+     - Support for images and booting
+   * - /cmd
+     - U-Boot commands functions
+   * - /common
+     - Misc architecture-independent functions
+   * - /configs
+     - Board default configuration files
+   * - /disk
+     - Code for disk drive partition handling
+   * - /doc
+     - Documentation (a mix of ReST and READMEs)
+   * - /drivers
+     - Device drivers
+   * - /dts
+     - Makefile for building internal U-Boot fdt.
+   * - /env
+     - Environment support
+   * - /examples
+     - Example code for standalone applications, etc.
+   * - /fs
+     - Filesystem code (cramfs, ext2, jffs2, etc.)
+   * - /include
+     - Header Files
+   * - /lib
+     - Library routines relating to all architectures
+   * - /Licenses
+     - Various license files
+   * - /net
+     - Networking code
+   * - /post
+     - Power On Self Test
+   * - /scripts
+     - Various build scripts and Makefiles
+   * - /test
+     - Various unit test files
+   * - /tools
+     - Tools to build and sign FIT images, etc.
diff --git a/doc/develop/distro.rst b/doc/develop/distro.rst
new file mode 100644
index 00000000000..9e715b23ebb
--- /dev/null
+++ b/doc/develop/distro.rst
@@ -0,0 +1,447 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Generic Distro Configuration Concept
+====================================
+
+Linux distributions are faced with supporting a variety of boot mechanisms,
+environments or bootloaders (PC BIOS, EFI, U-Boot, Barebox, ...). This makes
+life complicated. Worse, bootloaders such as U-Boot have a configurable set
+of features, and each board chooses to enable a different set of features.
+Hence, distros typically need to have board-specific knowledge in order to
+set up a bootable system.
+
+This document defines a common set of U-Boot features that are required for
+a distro to support the board in a generic fashion. Any board wishing to
+allow distros to install and boot in an out-of-the-box fashion should enable
+all these features. Linux distros can then create a single set of boot
+support/install logic that targets these features. This will allow distros
+to install on many boards without the need for board-specific logic.
+
+In fact, some of these features can be implemented by any bootloader, thus
+decoupling distro install/boot logic from any knowledge of the bootloader.
+
+This model assumes that boards will load boot configuration files from a
+regular storage mechanism (eMMC, SD card, USB Disk, SATA disk, etc.) with
+a standard partitioning scheme (MBR, GPT). Boards that cannot support this
+storage model are outside the scope of this document, and may still need
+board-specific installer/boot-configuration support in a distro.
+
+To some extent, this model assumes that a board has a separate boot flash
+that contains U-Boot, and that the user has somehow installed U-Boot to this
+flash before running the distro installer. Even on boards that do not conform
+to this aspect of the model, the extent of the board-specific support in the
+distro installer logic would be to install a board-specific U-Boot package to
+the boot partition during installation. This distro-supplied U-Boot can still
+implement the same features as on any other board, and hence the distro's boot
+configuration file generation logic can still be board-agnostic.
+
+Locating Bootable Disks
+-----------------------
+
+Typical desktop/server PCs search all (or a user-defined subset of) attached
+storage devices for a bootable partition, then load the bootloader or boot
+configuration files from there. A U-Boot board port that enables the features
+mentioned in this document will search for boot configuration files in the
+same way.
+
+Thus, distros do not need to manipulate any kind of bootloader-specific
+configuration data to indicate which storage device the system should boot
+from.
+
+Distros simply need to install the boot configuration files (see next
+section) in an ext2/3/4 or FAT partition, mark the partition bootable (via
+the MBR bootable flag, or GPT legacy_bios_bootable attribute), and U-Boot (or
+any other bootloader) will find those boot files and execute them. This is
+conceptually identical to creating a grub2 configuration file on a desktop
+PC.
+
+Note that in the absence of any partition that is explicitly marked bootable,
+U-Boot falls back to searching the first valid partition of a disk for boot
+configuration files. Other bootloaders are recommended to do the same, since
+I believe that partition table bootable flags aren't so commonly used outside
+the realm of x86 PCs.
+
+U-Boot can also search for boot configuration files from a TFTP server.
+
+Boot Configuration Files
+------------------------
+
+The standard format for boot configuration files is that of extlinux.conf, as
+handled by U-Boot's "syslinux" (disk) or "pxe boot" (network). This is roughly
+as specified at `Boot Loader Specification`_:
+
+
+... with the exceptions that the Boot Loader Specification document:
+
+* Prescribes a separate configuration per boot menu option, whereas U-Boot
+  lumps all options into a single extlinux.conf file. Hence, U-Boot searches
+  for /extlinux/extlinux.conf then /boot/extlinux/extlinux.conf on disk, or
+  pxelinux.cfg/default over the network.
+
+* Does not document the fdtdir option, which automatically selects the DTB to
+  pass to the kernel.
+
+* If no fdt/fdtdir is provided, the U-Boot will pass its own currently used
+  device tree.
+
+* If ``-`` is passed as fdt argument and ``CONFIG_SUPPORT_PASSING_ATAGS`` is
+  enabled, then no device tree will be used (legacy booting / pre-dtb kernel).
+
+See also doc/README.pxe under 'pxe file format'.
+
+One example extlinux.conf generated by the Fedora installer is::
+
+    # extlinux.conf generated by anaconda
+
+    ui menu.c32
+
+    menu autoboot Welcome to Fedora. Automatic boot in # second{,s}. Press a key for options.
+    menu title Fedora Boot Options.
+    menu hidden
+
+    timeout 50
+    #totaltimeout 9000
+
+    default Fedora (3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae) 22 (Rawhide)
+
+    label Fedora (3.17.0-0.rc4.git2.1.fc22.armv7hl) 22 (Rawhide)
+        kernel /boot/vmlinuz-3.17.0-0.rc4.git2.1.fc22.armv7hl
+        append ro root=UUID=8eac677f-8ea8-4270-8479-d5ddbb797450 console=ttyS0,115200n8 LANG=en_US.UTF-8 drm.debug=0xf
+        fdtdir /boot/dtb-3.17.0-0.rc4.git2.1.fc22.armv7hl
+        initrd /boot/initramfs-3.17.0-0.rc4.git2.1.fc22.armv7hl.img
+
+    label Fedora (3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae) 22 (Rawhide)
+        kernel /boot/vmlinuz-3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae
+        append ro root=UUID=8eac677f-8ea8-4270-8479-d5ddbb797450 console=ttyS0,115200n8 LANG=en_US.UTF-8 drm.debug=0xf
+        fdtdir /boot/dtb-3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae
+        initrd /boot/initramfs-3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae.img
+
+    label Fedora-0-rescue-8f6ba7b039524e0eb957d2c9203f04bc (0-rescue-8f6ba7b039524e0eb957d2c9203f04bc)
+        kernel /boot/vmlinuz-0-rescue-8f6ba7b039524e0eb957d2c9203f04bc
+        initrd /boot/initramfs-0-rescue-8f6ba7b039524e0eb957d2c9203f04bc.img
+        append ro root=UUID=8eac677f-8ea8-4270-8479-d5ddbb797450 console=ttyS0,115200n8
+        fdtdir /boot/dtb-3.16.0-0.rc6.git1.1.fc22.armv7hl+lpae
+
+
+One example of hand-crafted extlinux.conf::
+
+   menu title Select kernel
+   timeout 100
+
+   label Arch with uart devicetree overlay
+       kernel /arch/Image.gz
+       initrd /arch/initramfs-linux.img
+       fdt /dtbs/arch/board.dtb
+       fdtoverlays /dtbs/arch/overlay/uart0-gpio0-1.dtbo
+       append console=ttyS0,115200 console=tty1 rw root=UUID=fc0d0284-ca84-4194-bf8a-4b9da8d66908
+
+   label Arch with uart devicetree overlay but with Boot Loader Specification keys
+       kernel /arch/Image.gz
+       initrd /arch/initramfs-linux.img
+       devicetree /dtbs/arch/board.dtb
+       devicetree-overlay /dtbs/arch/overlay/uart0-gpio0-1.dtbo
+       append console=ttyS0,115200 console=tty1 rw root=UUID=fc0d0284-ca84-4194-bf8a-4b9da8d66908
+
+Another hand-crafted network boot configuration file is::
+
+    TIMEOUT 100
+
+    MENU TITLE TFTP boot options
+
+    LABEL jetson-tk1-emmc
+            MENU LABEL ../zImage root on Jetson TK1 eMMC
+            LINUX ../zImage
+            FDTDIR ../
+            APPEND console=ttyS0,115200n8 console=tty1 loglevel=8 rootwait rw earlyprintk root=PARTUUID=80a5a8e9-c744-491a-93c1-4f4194fd690b
+
+    LABEL venice2-emmc
+            MENU LABEL ../zImage root on Venice2 eMMC
+            LINUX ../zImage
+            FDTDIR ../
+            APPEND console=ttyS0,115200n8 console=tty1 loglevel=8 rootwait rw earlyprintk root=PARTUUID=5f71e06f-be08-48ed-b1ef-ee4800cc860f
+
+    LABEL sdcard
+            MENU LABEL ../zImage, root on 2GB sdcard
+            LINUX ../zImage
+            FDTDIR ../
+            APPEND console=ttyS0,115200n8 console=tty1 loglevel=8 rootwait rw earlyprintk root=PARTUUID=b2f82cda-2535-4779-b467-094a210fbae7
+
+    LABEL fedora-installer-fk
+            MENU LABEL Fedora installer w/ Fedora kernel
+            LINUX fedora-installer/vmlinuz
+            INITRD fedora-installer/initrd.img.orig
+            FDTDIR fedora-installer/dtb
+            APPEND loglevel=8 ip=dhcp inst.repo=http://10.0.0.2/mirrors/fedora/linux/development/rawhide/armhfp/os/ rd.shell cma=64M
+
+U-Boot Implementation
+=====================
+
+Enabling the distro options
+---------------------------
+
+In your board's defconfig, enable the DISTRO_DEFAULTS option by adding
+a line with "CONFIG_DISTRO_DEFAULTS=y". If you want to enable this
+from Kconfig itself, for e.g. all boards using a specific SoC then
+add a "imply DISTRO_DEFAULTS" to your SoC CONFIG option.
+
+
+TO BE UPDATED:
+
+In your board configuration file, include the following::
+
+    #ifndef CONFIG_SPL_BUILD
+    #include <config_distro_bootcmd.h>
+    #endif
+
+The first of those headers primarily enables a core set of U-Boot features,
+such as support for MBR and GPT partitions, ext* and FAT filesystems, booting
+raw zImage and initrd (rather than FIT- or uImage-wrapped files), etc. Network
+boot support is also enabled here, which is useful in order to boot distro
+installers given that distros do not commonly distribute bootable install
+media for non-PC targets at present.
+
+Finally, a few options that are mostly relevant only when using U-Boot-
+specific boot.scr scripts are enabled. This enables distros to generate a
+U-Boot-specific boot.scr script rather than extlinux.conf as the boot
+configuration file. While doing so is fully supported, and
+CONFIG_DISTRO_DEFAULTS exposes enough parameterization to boot.scr to
+allow for board-agnostic boot.scr content, this document recommends that
+distros generate extlinux.conf rather than boot.scr. extlinux.conf is intended
+to work across multiple bootloaders, whereas boot.scr will only work with
+U-Boot. TODO: document the contract between U-Boot and boot.scr re: which
+environment variables a generic boot.scr may rely upon.
+
+The second of those headers sets up the default environment so that $bootcmd
+is defined in a way that searches attached disks for boot configuration files,
+and executes them if found.
+
+Required Environment Variables
+------------------------------
+
+The U-Boot "syslinux" and "pxe boot" commands require a number of environment
+variables be set. Default values for these variables are often hard-coded into
+CFG_EXTRA_ENV_SETTINGS in the board's U-Boot configuration file, so that
+the user doesn't have to configure them.
+
+fdt_addr:
+  Mandatory for any system that provides the DTB in HW (e.g. ROM) and wishes
+  to pass that DTB to Linux, rather than loading a DTB from the boot
+  filesystem. Prohibited for any other system.
+
+  If specified a DTB to boot the system must be available at the given
+  address.
+
+fdt_addr_r:
+  Mandatory. The location in RAM where the DTB will be loaded or copied to when
+  processing the fdtdir/devicetreedir or fdt/devicetree options in
+  extlinux.conf.
+
+  This is mandatory even when fdt_addr is provided, since extlinux.conf must
+  always be able to provide a DTB which overrides any copy provided by the HW.
+
+  A size of 1MB for the FDT/DTB seems reasonable.
+
+fdtoverlay_addr_r:
+  Mandatory. The location in RAM where DTB overlays will be temporarily
+  stored and then applied in the load order to the fdt blob stored at the
+  address indicated in the fdt_addr_r environment variable.
+
+fdtfile:
+  Mandatory. the name of the DTB file for the specific board for instance
+  the espressobin v5 board the value is "marvell/armada-3720-espressobin.dtb"
+  while on a clearfog pro it is "armada-388-clearfog-pro.dtb" in the case of
+  a board providing its firmware based DTB this value can be used to override
+  the DTB with a different DTB. fdtfile will automatically be set for you if
+  it matches the format ${soc}-${board}.dtb which covers most 32 bit use cases.
+  AArch64 generally does not match as the Linux kernel put the dtb files under
+  SoC vendor directories.
+
+ramdisk_addr_r:
+  Mandatory. The location in RAM where the initial ramdisk will be loaded to
+  when processing the initrd option in extlinux.conf.
+
+  It is recommended that this location be highest in RAM out of fdt_addr_r,
+  kernel_addr_r, and ramdisk_addr_r, so that the RAM disk can vary in size
+  and use any available RAM.
+
+kernel_addr_r:
+  Mandatory. The location in RAM where the kernel will be loaded to when
+  processing the kernel option in the extlinux.conf.
+
+  The kernel should be located within the first 128M of RAM in order for the
+  kernel CONFIG_AUTO_ZRELADDR option to work, which is likely enabled on any
+  distro kernel. Since the kernel will decompress itself to 0x8000 after the
+  start of RAM, kernel_addr_r should not overlap that area, or the kernel will
+  have to copy itself somewhere else first before decompression.
+
+  A size of 16MB for the kernel is likely adequate.
+
+kernel_comp_addr_r:
+  Optional. This is only required if user wants to boot Linux from a compressed
+  Image(.gz, .bz2, .lzma, .lzo) using the booti command. It represents the
+  location in RAM where the compressed Image will be decompressed temporarily.
+  Once the decompression is complete, the decompressed data will be moved to
+  kernel_addr_r for booting.
+
+kernel_comp_size:
+  Optional. This is only required if user wants to boot Linux from a compressed
+  Image using booti command. It represents the size of the compressed file. The
+  size has to at least the size of loaded image for decompression to succeed.
+
+pxefile_addr_r:
+  Mandatory. The location in RAM where extlinux.conf will be loaded to prior
+  to processing.
+
+  A size of 1MB for extlinux.conf is more than adequate.
+
+scriptaddr:
+  Mandatory, if the boot script is boot.scr rather than extlinux.conf. The
+  location in RAM where boot.scr will be loaded to prior to execution.
+
+  A size of 1MB for extlinux.conf is more than adequate.
+
+For suggestions on memory locations for ARM systems, you must follow the
+guidelines specified in Documentation/arm/Booting in the Linux kernel tree.
+
+For a commented example of setting these values, please see the definition of
+MEM_LAYOUT_ENV_SETTINGS in include/configs/tegra124-common.h.
+
+Boot Target Configuration
+-------------------------
+
+The `config_distro_bootcmd.h` file defines $bootcmd and many helper command
+variables that automatically search attached disks for boot configuration files
+and execute them. Boards must provide configure <config_distro_bootcmd.h> so
+that it supports the correct set of possible boot device types. To provide this
+configuration, simply define macro BOOT_TARGET_DEVICES prior to including
+<config_distro_bootcmd.h>. For example::
+
+    #ifndef CONFIG_SPL_BUILD
+    #define BOOT_TARGET_DEVICES(func) \
+            func(MMC, mmc, 1) \
+            func(MMC, mmc, 0) \
+            func(USB, usb, 0) \
+            func(PXE, pxe, na) \
+            func(DHCP, dhcp, na)
+    #include <config_distro_bootcmd.h>
+    #endif
+
+Each entry in the macro defines a single boot device (e.g. a specific eMMC
+device or SD card) or type of boot device (e.g. USB disk). The parameters to
+the func macro (passed in by the internal implementation of the header) are:
+
+- Upper-case disk type (DHCP, HOST, IDE, MMC, NVME, PXE, SATA, SCSI, UBIFS, USB,
+  VIRTIO).
+- Lower-case disk type (same options as above).
+- ID of the specific disk (MMC only) or ignored for other types.
+
+User Configuration
+==================
+
+Once the user has installed U-Boot, it is expected that the environment will
+be reset to the default values in order to enable $bootcmd and friends, as set
+up by <config_distro_bootcmd.h>. After this, various environment variables may
+be altered to influence the boot process:
+
+boot_targets:
+  The list of boot locations searched.
+
+  Example: mmc0, mmc1, usb, pxe
+
+  Entries may be removed or re-ordered in this list to affect the boot order.
+
+boot_prefixes:
+  For disk-based booting, the list of directories within a partition that are
+  searched for boot configuration files (extlinux.conf, boot.scr).
+
+  Example: / /boot/
+
+  Entries may be removed or re-ordered in this list to affect the set of
+  directories which are searched.
+
+boot_scripts:
+  The name of U-Boot style boot.scr files that $bootcmd searches for.
+
+  Example: boot.scr.uimg boot.scr
+
+  (Typically we expect extlinux.conf to be used, but execution of boot.scr is
+  maintained for backwards-compatibility.)
+
+  Entries may be removed or re-ordered in this list to affect the set of
+  filenames which are supported.
+
+scan_dev_for_extlinux:
+  If you want to disable extlinux.conf on all disks, set the value to something
+  innocuous, e.g. setenv scan_dev_for_extlinux true.
+
+scan_dev_for_scripts:
+  If you want to disable boot.scr on all disks, set the value to something
+  innocuous, e.g. setenv scan_dev_for_scripts true.
+
+boot_net_usb_start:
+  If you want to prevent USB enumeration by distro boot commands which execute
+  network operations, set the value to something innocuous, e.g. setenv
+  boot_net_usb_start true. This would be useful if you know your Ethernet
+  device is not attached to USB, and you wish to increase boot speed by
+  avoiding unnecessary actions.
+
+boot_net_pci_enum:
+  If you want to prevent PCI enumeration by distro boot commands which execute
+  network operations, set the value to something innocuous, e.g. setenv
+  boot_net_pci_enum true. This would be useful if you know your Ethernet
+  device is not attached to PCI, and you wish to increase boot speed by
+  avoiding unnecessary actions.
+
+Interactively booting from a specific device at the u-boot prompt
+=================================================================
+
+For interactively booting from a user-selected device at the u-boot command
+prompt, the environment provides predefined bootcmd_<target> variables for
+every target defined in boot_targets, which can be run be the user.
+
+If the target is a storage device, the format of the target is always
+<device type><device number>, e.g. mmc0.  Specifying the device number is
+mandatory for storage devices, even if only support for a single instance
+of the storage device is actually implemented.
+
+For network targets (dhcp, pxe), only the device type gets specified;
+they do not have a device number.
+
+Examples:
+
+ - run bootcmd_usb0
+   boots from the first USB mass storage device
+
+ - run bootcmd_mmc1
+   boots from the second MMC device
+
+ - run bootcmd_pxe
+   boots by tftp using a pxelinux.cfg
+
+The list of possible targets consists of:
+
+- network targets
+
+  * dhcp
+  * pxe
+
+- storage targets (to which a device number must be appended)
+
+  * mmc
+  * sata
+  * scsi
+  * ide
+  * usb
+  * virtio
+
+Other *boot* variables than the ones defined above are only for internal use
+of the boot environment and are not guaranteed to exist or work in the same
+way in future u-boot versions.  In particular the <device type>_boot
+variables (e.g. mmc_boot, usb_boot) are a strictly internal implementation
+detail and must not be used as a public interface.
+
+.. _`Boot Loader Specification`: https://systemd.io/BOOT_LOADER_SPECIFICATION/
+
+.. sectionauthor:: (C) Copyright 2014 Red Hat Inc.
+.. sectionauthor:: Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
+.. sectionauthor:: Copyright (C) 2015 K. Merker <merker@debian.org>
diff --git a/doc/develop/docstyle.rst b/doc/develop/docstyle.rst
new file mode 100644
index 00000000000..50506d68574
--- /dev/null
+++ b/doc/develop/docstyle.rst
@@ -0,0 +1,29 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+Documentation Style
+===================
+
+Documentation is crucial for the U-Boot project. It has to encompass the needs
+of different reader groups from first time users to developers and maintainers.
+This requires different types of documentation like tutorials, how-to-guides,
+explanatory texts, and reference.
+
+We want to be able to generate documentation in different target formats. We
+therefore use `Sphinx <https://www.sphinx-doc.org>`_ for the generation of
+documents from reStructured text.
+
+We apply the following rules:
+
+* Documentation files are located in *doc/* or its sub-directories.
+* Each documentation file is added to an index page to allow navigation
+  to the document.
+* For documentation we use reStructured text conforming to the requirements
+  of `Sphinx <https://www.sphinx-doc.org>`_.
+* For documentation within code we follow the Linux kernel guide
+  `Writing kernel-doc comments <https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html>`_.
+* We try to stick to 80 columns per line in documents.
+* For tables we prefer simple tables over grid tables. We avoid list tables
+  as they make the reStructured text documents hard to read.
+* Before submitting documentation patches we build the HTML documentation and
+  fix all warnings. The build process is described in
+  :doc:`/build/documentation`.
diff --git a/doc/develop/driver-model/bind.rst b/doc/develop/driver-model/bind.rst
new file mode 100644
index 00000000000..0d0d40734c9
--- /dev/null
+++ b/doc/develop/driver-model/bind.rst
@@ -0,0 +1,49 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Patrice Chotard <patrice.chotard@foss.st.com>
+
+Binding/unbinding a driver
+==========================
+
+This document aims to describe the bind and unbind commands.
+
+For debugging purpose, it should be useful to bind or unbind a driver from
+the U-Boot command line.
+
+The unbind command calls the remove device driver callback and unbind the
+device from its driver.
+
+The bind command binds a device to its driver.
+
+In some cases it can be useful to be able to bind a device to a driver from
+the command line.
+The obvious example is for versatile devices such as USB gadget.
+Another use case is when the devices are not yet ready at startup and
+require some setup before the drivers are bound (ex: FPGA which bitsream is
+fetched from a mass storage or ethernet)
+
+usage:
+
+bind <node path> <driver>
+bind <class> <index> <driver>
+
+unbind <node path>
+unbind <class> <index>
+unbind <class> <index> <driver>
+
+Where:
+ - <node path> is the node's device tree path
+ - <class> is one of the class available in the list given by the "dm uclass"
+   command or first column of "dm tree" command.
+ - <index> is the index of the parent's node (second column of "dm tree" output).
+ - <driver> is the driver name to bind given by the "dm drivers" command or the by
+   the fourth column of "dm tree" output.
+
+example:
+
+bind usb_dev_generic 0 usb_ether
+unbind usb_dev_generic 0 usb_ether
+or
+unbind eth 1
+
+bind /ocp/omap_dwc3@48380000/usb@48390000 usb_ether
+unbind /ocp/omap_dwc3@48380000/usb@48390000
diff --git a/doc/develop/driver-model/debugging.rst b/doc/develop/driver-model/debugging.rst
new file mode 100644
index 00000000000..e13abddae66
--- /dev/null
+++ b/doc/develop/driver-model/debugging.rst
@@ -0,0 +1,62 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Debugging driver model
+======================
+
+This document aims to provide help when you cannot work out why driver model is
+not doing what you expect.
+
+
+Useful techniques in general
+----------------------------
+
+Here are some useful debugging features generally.
+
+   - If you are writing a new feature, consider doing it in sandbox instead of
+     on your board. Sandbox has no limits, allows easy debugging (e.g. gdb) and
+     you can write emulators for most common devices.
+   - Put '#define DEBUG' at the top of a file, to activate all the debug() and
+     log_debug() statements in that file.
+   - Where logging is used, change the logging level, e.g. in SPL with
+     CONFIG_SPL_LOG_MAX_LEVEL=7 (which is LOGL_DEBUG) and
+     CONFIG_LOG_DEFAULT_LEVEL=7
+   - Where logging of return values is implemented with log_msg_ret(), set
+     CONFIG_LOG_ERROR_RETURN=y to see exactly where the error is happening
+   - Make sure you have a debug UART enabled - see CONFIG_DEBUG_UART. With this
+     you can get serial output (printf(), etc.) before the serial driver is
+     running.
+   - Use a JTAG emulator to set breakpoints and single-step through code
+
+Not that most of these increase code/data size somewhat when enabled.
+
+
+Failure to locate a device
+--------------------------
+
+Let's say you have uclass_first_device_err() and it is not finding anything.
+
+If it is returning an error, then that gives you a clue. Look up linux/errno.h
+to see errors. Common ones are:
+
+   - -ENOMEM which indicates that memory is short. If it happens in SPL or
+     before relocation in U-Boot, check CONFIG_SPL_SYS_MALLOC_F_LEN and
+     CONFIG_SYS_MALLOC_F_LEN as they may need to be larger. Add '#define DEBUG'
+     at the very top of malloc_simple.c to get an idea of where your memory is
+     going.
+   - -EINVAL which typically indicates that something was missing or wrong in
+     the device tree node. Check that everything is correct and look at the
+     of_to_plat() method in the driver.
+
+If there is no error, you should check if the device is actually bound. Call
+dm_dump_tree() just before you locate the device to make sure it exists.
+
+If it does not exist, check your device tree compatible strings match up with
+what the driver expects (in the struct udevice_id array).
+
+If you are using of-platdata (e.g. CONFIG_SPL_OF_PLATDATA), check that the
+driver name is the same as the first compatible string in the device tree (with
+invalid-variable characters converted to underscore).
+
+If you are really stuck, putting '#define LOG_DEBUG' at the top of
+drivers/core/lists.c should show you what is going on.
diff --git a/doc/develop/driver-model/design.rst b/doc/develop/driver-model/design.rst
new file mode 100644
index 00000000000..8c2c81d7ac9
--- /dev/null
+++ b/doc/develop/driver-model/design.rst
@@ -0,0 +1,1190 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Design Details
+==============
+
+This README contains high-level information about driver model, a unified
+way of declaring and accessing drivers in U-Boot. The original work was done
+by:
+
+   * Marek Vasut <marex@denx.de>
+   * Pavel Herrmann <morpheus.ibis@gmail.com>
+   * Viktor Křivák <viktor.krivak@gmail.com>
+   * Tomas Hlavacek <tmshlvck@gmail.com>
+
+This has been both simplified and extended into the current implementation
+by:
+
+   * Simon Glass <sjg@chromium.org>
+
+
+Terminology
+-----------
+
+Uclass
+  a group of devices which operate in the same way. A uclass provides
+  a way of accessing individual devices within the group, but always
+  using the same interface. For example a GPIO uclass provides
+  operations for get/set value. An I2C uclass may have 10 I2C ports,
+  4 with one driver, and 6 with another.
+
+Driver
+  some code which talks to a peripheral and presents a higher-level
+  interface to it.
+
+Device
+  an instance of a driver, tied to a particular port or peripheral.
+
+
+How to try it
+-------------
+
+Build U-Boot sandbox and run it::
+
+   make sandbox_defconfig
+   make
+   ./u-boot -d u-boot.dtb
+
+   (type 'reset' to exit U-Boot)
+
+
+There is a uclass called 'demo'. This uclass handles
+saying hello, and reporting its status. There are two drivers in this
+uclass:
+
+   - simple: Just prints a message for hello, doesn't implement status
+   - shape: Prints shapes and reports number of characters printed as status
+
+The demo class is pretty simple, but not trivial. The intention is that it
+can be used for testing, so it will implement all driver model features and
+provide good code coverage of them. It does have multiple drivers, it
+handles parameter data and plat (data which tells the driver how
+to operate on a particular platform) and it uses private driver data.
+
+To try it, see the example session below::
+
+   =>demo hello 1
+   Hello '@' from 07981110: red 4
+   =>demo status 2
+   Status: 0
+   =>demo hello 2
+   g
+   r@
+   e@@
+   e@@@
+   n@@@@
+   g@@@@@
+   =>demo status 2
+   Status: 21
+   =>demo hello 4 ^
+     y^^^
+    e^^^^^
+   l^^^^^^^
+   l^^^^^^^
+    o^^^^^
+     w^^^
+   =>demo status 4
+   Status: 36
+   =>
+
+
+Running the tests
+-----------------
+
+The intent with driver model is that the core portion has 100% test coverage
+in sandbox, and every uclass has its own test. As a move towards this, tests
+are provided in test/dm. To run them, try::
+
+   ./test/py/test.py --bd sandbox --build -k ut_dm -v
+
+You should see something like this::
+
+   (venv)$ ./test/py/test.py --bd sandbox --build -k ut_dm -v
+   +make O=/root/u-boot/build-sandbox -s sandbox_defconfig
+   +make O=/root/u-boot/build-sandbox -s -j8
+   ============================= test session starts ==============================
+   platform linux2 -- Python 2.7.5, pytest-2.9.0, py-1.4.31, pluggy-0.3.1 -- /root/u-boot/venv/bin/python
+   cachedir: .cache
+   rootdir: /root/u-boot, inifile:
+   collected 199 items
+
+   test/py/tests/test_ut.py::test_ut_dm_init PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_adc_bind] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_adc_multi_channel_conversion] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_adc_multi_channel_shot] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_adc_single_channel_conversion] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_adc_single_channel_shot] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_adc_supply] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_adc_wrong_channel_selection] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_autobind] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_autobind_uclass_pdata_alloc] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_autobind_uclass_pdata_valid] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_autoprobe] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_child_post_bind] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_child_post_bind_uclass] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_child_pre_probe_uclass] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_children] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_children_funcs] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_children_iterators] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_parent_data] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_parent_data_uclass] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_parent_ops] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_parent_platdata] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_bus_parent_platdata_uclass] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_children] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_clk_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_clk_periph] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_device_get_uclass_id] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_eth] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_eth_act] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_eth_alias] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_eth_prime] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_eth_rotate] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_fdt] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_fdt_offset] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_fdt_pre_reloc] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_fdt_uclass_seq] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_gpio] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_gpio_anon] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_gpio_copy] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_gpio_leak] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_gpio_phandles] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_gpio_requestf] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_i2c_bytewise] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_i2c_find] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_i2c_offset] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_i2c_offset_len] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_i2c_probe_empty] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_i2c_read_write] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_i2c_speed] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_leak] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_led_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_led_gpio] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_led_label] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_lifecycle] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_mmc_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_net_retry] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_operations] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_ordering] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_pci_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_pci_busnum] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_pci_swapcase] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_platdata] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_power_pmic_get] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_power_pmic_io] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_power_regulator_autoset] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_power_regulator_autoset_list] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_power_regulator_get] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_power_regulator_set_get_current] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_power_regulator_set_get_enable] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_power_regulator_set_get_mode] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_power_regulator_set_get_voltage] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_pre_reloc] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_ram_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_regmap_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_regmap_syscon] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_remoteproc_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_remove] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_reset_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_reset_walk] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_rtc_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_rtc_dual] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_rtc_reset] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_rtc_set_get] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_spi_find] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_spi_flash] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_spi_xfer] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_syscon_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_syscon_by_driver_data] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_timer_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_uclass] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_uclass_before_ready] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_uclass_devices_find] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_uclass_devices_find_by_name] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_uclass_devices_get] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_uclass_devices_get_by_name] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_usb_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_usb_flash] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_usb_keyb] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_usb_multi] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_usb_remove] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_usb_tree] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_usb_tree_remove] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_usb_tree_reorder] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_base] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_bmp] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_bmp_comp] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_chars] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_context] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_rotation1] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_rotation2] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_rotation3] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_text] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_truetype] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_truetype_bs] PASSED
+   test/py/tests/test_ut.py::test_ut[ut_dm_video_truetype_scroll] PASSED
+
+   ======================= 84 tests deselected by '-kut_dm' =======================
+   ================== 115 passed, 84 deselected in 3.77 seconds ===================
+
+What is going on?
+-----------------
+
+Let's start at the top. The demo command is in cmd/demo.c. It does
+the usual command processing and then:
+
+.. code-block:: c
+
+	struct udevice *demo_dev;
+
+	ret = uclass_get_device(UCLASS_DEMO, devnum, &demo_dev);
+
+UCLASS_DEMO means the class of devices which implement 'demo'. Other
+classes might be MMC, or GPIO, hashing or serial. The idea is that the
+devices in the class all share a particular way of working. The class
+presents a unified view of all these devices to U-Boot.
+
+This function looks up a device for the demo uclass. Given a device
+number we can find the device because all devices have registered with
+the UCLASS_DEMO uclass.
+
+The device is automatically activated ready for use by uclass_get_device().
+
+Now that we have the device we can do things like:
+
+.. code-block:: c
+
+	return demo_hello(demo_dev, ch);
+
+This function is in the demo uclass. It takes care of calling the 'hello'
+method of the relevant driver. Bearing in mind that there are two drivers,
+this particular device may use one or other of them.
+
+The code for demo_hello() is in drivers/demo/demo-uclass.c:
+
+.. code-block:: c
+
+	int demo_hello(struct udevice *dev, int ch)
+	{
+		const struct demo_ops *ops = device_get_ops(dev);
+
+		if (!ops->hello)
+			return -ENOSYS;
+
+		return ops->hello(dev, ch);
+	}
+
+As you can see it just calls the relevant driver method. One of these is
+in drivers/demo/demo-simple.c:
+
+.. code-block:: c
+
+	static int simple_hello(struct udevice *dev, int ch)
+	{
+		const struct dm_demo_pdata *pdata = dev_get_plat(dev);
+
+		printf("Hello from %08x: %s %d\n", map_to_sysmem(dev),
+		       pdata->colour, pdata->sides);
+
+		return 0;
+	}
+
+
+So that is a trip from top (command execution) to bottom (driver action)
+but it leaves a lot of topics to address.
+
+
+Declaring Drivers
+-----------------
+
+A driver declaration looks something like this (see
+drivers/demo/demo-shape.c):
+
+.. code-block:: c
+
+	static const struct demo_ops shape_ops = {
+		.hello = shape_hello,
+		.status = shape_status,
+	};
+
+	U_BOOT_DRIVER(demo_shape_drv) = {
+		.name	= "demo_shape_drv",
+		.id	= UCLASS_DEMO,
+		.ops	= &shape_ops,
+		.priv_data_size = sizeof(struct shape_data),
+	};
+
+
+This driver has two methods (hello and status) and requires a bit of
+private data (accessible through dev_get_priv(dev) once the driver has
+been probed). It is a member of UCLASS_DEMO so will register itself
+there.
+
+In U_BOOT_DRIVER it is also possible to specify special methods for bind
+and unbind, and these are called at appropriate times. For many drivers
+it is hoped that only 'probe' and 'remove' will be needed.
+
+The U_BOOT_DRIVER macro creates a data structure accessible from C,
+so driver model can find the drivers that are available.
+
+The methods a device can provide are documented in the device.h header.
+Briefly, they are:
+
+   * bind - make the driver model aware of a device (bind it to its driver)
+   * unbind - make the driver model forget the device
+   * of_to_plat - convert device tree data to plat - see later
+   * probe - make a device ready for use
+   * remove - remove a device so it cannot be used until probed again
+
+The sequence to get a device to work is bind, of_to_plat (if using
+device tree) and probe.
+
+
+Platform Data
+-------------
+
+Note: platform data is the old way of doing things. It is
+basically a C structure which is passed to drivers to tell them about
+platform-specific settings like the address of its registers, bus
+speed, etc. Device tree is now the preferred way of handling this.
+Unless you have a good reason not to use device tree (the main one
+being you need serial support in SPL and don't have enough SRAM for
+the cut-down device tree and libfdt libraries) you should stay away
+from platform data.
+
+Platform data is like Linux platform data, if you are familiar with that.
+It provides the board-specific information to start up a device.
+
+Why is this information not just stored in the device driver itself? The
+idea is that the device driver is generic, and can in principle operate on
+any board that has that type of device. For example, with modern
+highly-complex SoCs it is common for the IP to come from an IP vendor, and
+therefore (for example) the MMC controller may be the same on chips from
+different vendors. It makes no sense to write independent drivers for the
+MMC controller on each vendor's SoC, when they are all almost the same.
+Similarly, we may have 6 UARTs in an SoC, all of which are mostly the same,
+but lie at different addresses in the address space.
+
+Using the UART example, we have a single driver and it is instantiated 6
+times by supplying 6 lots of platform data. Each lot of platform data
+gives the driver name and a pointer to a structure containing information
+about this instance - e.g. the address of the register space. It may be that
+one of the UARTS supports RS-485 operation - this can be added as a flag in
+the platform data, which is set for this one port and clear for the rest.
+
+Think of your driver as a generic piece of code which knows how to talk to
+a device, but needs to know where it is, any variant/option information and
+so on. Platform data provides this link between the generic piece of code
+and the specific way it is bound on a particular board.
+
+Examples of platform data include:
+
+   - The base address of the IP block's register space
+   - Configuration options, like:
+      - the SPI polarity and maximum speed for a SPI controller
+      - the I2C speed to use for an I2C device
+      - the number of GPIOs available in a GPIO device
+
+Where does the platform data come from? It is either held in a structure
+which is compiled into U-Boot, or it can be parsed from the Device Tree
+(see 'Device Tree' below).
+
+For an example of how it can be compiled in, see demo-pdata.c which
+sets up a table of driver names and their associated platform data.
+The data can be interpreted by the drivers however they like - it is
+basically a communication scheme between the board-specific code and
+the generic drivers, which are intended to work on any board.
+
+Drivers can access their data via dev->info->plat. Here is
+the declaration for the platform data, which would normally appear
+in the board file.
+
+.. code-block:: c
+
+	static const struct dm_demo_pdata red_square = {
+		.colour = "red",
+		.sides = 4.
+	};
+
+	static const struct driver_info info[] = {
+		{
+			.name = "demo_shape_drv",
+			.plat = &red_square,
+		},
+	};
+
+	demo1 = driver_bind(root, &info[0]);
+
+
+Device Tree
+-----------
+
+While plat is useful, a more flexible way of providing device data is
+by using device tree. In U-Boot you should use this where possible. Avoid
+sending patches which make use of the U_BOOT_DRVINFO() macro unless strictly
+necessary.
+
+With device tree we replace the above code with the following device tree
+fragment:
+
+.. code-block:: c
+
+	red-square {
+		compatible = "demo-shape";
+		colour = "red";
+		sides = <4>;
+	};
+
+This means that instead of having lots of U_BOOT_DRVINFO() declarations in
+the board file, we put these in the device tree. This approach allows a lot
+more generality, since the same board file can support many types of boards
+(e,g. with the same SoC) just by using different device trees. An added
+benefit is that the Linux device tree can be used, thus further simplifying
+the task of board-bring up either for U-Boot or Linux devs (whoever gets to
+the board first!).
+
+The easiest way to make this work it to add a few members to the driver:
+
+.. code-block:: c
+
+	.plat_auto = sizeof(struct dm_test_pdata),
+	.of_to_plat = testfdt_of_to_plat,
+
+The 'auto' feature allowed space for the plat to be allocated
+and zeroed before the driver's of_to_plat() method is called. The
+of_to_plat() method, which the driver write supplies, should parse
+the device tree node for this device and place it in dev->plat. Thus
+when the probe method is called later (to set up the device ready for use)
+the platform data will be present.
+
+Note that both methods are optional. If you provide an of_to_plat
+method then it will be called first (during activation). If you provide a
+probe method it will be called next. See Driver Lifecycle below for more
+details.
+
+If you don't want to have the plat automatically allocated then you
+can leave out plat_auto. In this case you can use malloc
+in your of_to_plat (or probe) method to allocate the required memory,
+and you should free it in the remove method.
+
+The driver model tree is intended to mirror that of the device tree. The
+root driver is at device tree offset 0 (the root node, '/'), and its
+children are the children of the root node.
+
+In order for a device tree to be valid, the content must be correct with
+respect to either device tree specification
+(https://www.devicetree.org/specifications/) or the device tree bindings that
+are found in the doc/device-tree-bindings directory.  When not U-Boot specific
+the bindings in this directory tend to come from the Linux Kernel.  As such
+certain design decisions may have been made already for us in terms of how
+specific devices are described and bound.  In most circumstances we wish to
+retain compatibility without additional changes being made to the device tree
+source files.
+
+Declaring Uclasses
+------------------
+
+The demo uclass is declared like this:
+
+.. code-block:: c
+
+	UCLASS_DRIVER(demo) = {
+		.id		= UCLASS_DEMO,
+	};
+
+It is also possible to specify special methods for probe, etc. The uclass
+numbering comes from include/dm/uclass-id.h. To add a new uclass, add to the
+end of the enum there, then declare your uclass as above.
+
+
+Device Sequence Numbers
+-----------------------
+
+U-Boot numbers devices from 0 in many situations, such as in the command
+line for I2C and SPI buses, and the device names for serial ports (serial0,
+serial1, ...). Driver model supports this numbering and permits devices
+to be locating by their 'sequence'. This numbering uniquely identifies a
+device in its uclass, so no two devices within a particular uclass can have
+the same sequence number.
+
+Sequence numbers start from 0 but gaps are permitted. For example, a board
+may have I2C buses 1, 4, 5 but no 0, 2 or 3. The choice of how devices are
+numbered is up to a particular board, and may be set by the SoC in some
+cases. While it might be tempting to automatically renumber the devices
+where there are gaps in the sequence, this can lead to confusion and is
+not the way that U-Boot works.
+
+Where a device gets its sequence number is controlled by the DM_SEQ_ALIAS
+Kconfig option, which can have a different value in U-Boot proper and SPL.
+If this option is not set, aliases are ignored.
+
+Even if CONFIG_DM_SEQ_ALIAS is enabled, the uclass must still have the
+DM_UC_FLAG_SEQ_ALIAS flag set, for its devices to be sequenced by aliases.
+
+With those options set, devices with an alias (e.g. "serial2") will get that
+sequence number (e.g. 2). Other devices get the next available number after all
+aliases and all existing numbers. This means that if there is just a single
+alias "serial2", unaliased serial devices will be assigned 3 or more, with 0 and
+1 being unused.
+
+If CONFIG_DM_SEQ_ALIAS or DM_UC_FLAG_SEQ_ALIAS are not set, all devices will get
+sequence numbers in a simple ordering starting from 0. To find the next number
+to allocate, driver model scans through to find the maximum existing number,
+then uses the next one. It does not attempt to fill in gaps.
+
+.. code-block:: none
+
+	aliases {
+		serial2 = "/serial@22230000";
+	};
+
+This indicates that in the uclass called "serial", the named node
+("/serial@22230000") will be given sequence number 2. Any command or driver
+which requests serial device 2 will obtain this device.
+
+More commonly you can use node references, which expand to the full path:
+
+.. code-block:: none
+
+	aliases {
+		serial2 = &serial_2;
+	};
+	...
+	serial_2: serial@22230000 {
+	...
+	};
+
+The alias resolves to the same string in this case, but this version is
+easier to read.
+
+Device sequence numbers are resolved when a device is bound and the number does
+not change for the life of the device.
+
+There are some situations where the uclass must allocate sequence numbers,
+since a strictly increase sequence (with devicetree nodes bound first) is not
+suitable. An example of this is the PCI bus. In this case, you can set the
+uclass DM_UC_FLAG_NO_AUTO_SEQ flag. With this flag set, only devices with an
+alias will be assigned a number by driver model. The rest is left to the uclass
+to sort out, e.g. when enumerating the bus.
+
+Note that changing the sequence number for a device (e.g. in a driver) is not
+permitted. If it is felt to be necessary, ask on the mailing list.
+
+Bus Drivers
+-----------
+
+A common use of driver model is to implement a bus, a device which provides
+access to other devices. Example of buses include SPI and I2C. Typically
+the bus provides some sort of transport or translation that makes it
+possible to talk to the devices on the bus.
+
+Driver model provides some useful features to help with implementing buses.
+Firstly, a bus can request that its children store some 'parent data' which
+can be used to keep track of child state. Secondly, the bus can define
+methods which are called when a child is probed or removed. This is similar
+to the methods the uclass driver provides. Thirdly, per-child platform data
+can be provided to specify things like the child's address on the bus. This
+persists across child probe()/remove() cycles.
+
+For consistency and ease of implementation, the bus uclass can specify the
+per-child platform data, so that it can be the same for all children of buses
+in that uclass. There are also uclass methods which can be called when
+children are bound and probed.
+
+Here an explanation of how a bus fits with a uclass may be useful. Consider
+a USB bus with several devices attached to it, each from a different (made
+up) uclass::
+
+   xhci_usb (UCLASS_USB)
+      eth (UCLASS_ETH)
+      camera (UCLASS_CAMERA)
+      flash (UCLASS_FLASH_STORAGE)
+
+Each of the devices is connected to a different address on the USB bus.
+The bus device wants to store this address and some other information such
+as the bus speed for each device.
+
+To achieve this, the bus device can use dev->parent_plat in each of its
+three children. This can be auto-allocated if the bus driver (or bus uclass)
+has a non-zero value for per_child_plat_auto. If not, then
+the bus device or uclass can allocate the space itself before the child
+device is probed.
+
+Also the bus driver can define the child_pre_probe() and child_post_remove()
+methods to allow it to do some processing before the child is activated or
+after it is deactivated.
+
+Similarly the bus uclass can define the child_post_bind() method to obtain
+the per-child platform data from the device tree and set it up for the child.
+The bus uclass can also provide a child_pre_probe() method. Very often it is
+the bus uclass that controls these features, since it avoids each driver
+having to do the same processing. Of course the driver can still tweak and
+override these activities.
+
+Note that the information that controls this behaviour is in the bus's
+driver, not the child's. In fact it is possible that child has no knowledge
+that it is connected to a bus. The same child device may even be used on two
+different bus types. As an example. the 'flash' device shown above may also
+be connected on a SATA bus or standalone with no bus::
+
+   xhci_usb (UCLASS_USB)
+      flash (UCLASS_FLASH_STORAGE)  - parent data/methods defined by USB bus
+
+   sata (UCLASS_AHCI)
+      flash (UCLASS_FLASH_STORAGE)  - parent data/methods defined by SATA bus
+
+   flash (UCLASS_FLASH_STORAGE)  - no parent data/methods (not on a bus)
+
+Above you can see that the driver for xhci_usb/sata controls the child's
+bus methods. In the third example the device is not on a bus, and therefore
+will not have these methods at all. Consider the case where the flash
+device defines child methods. These would be used for *its* children, and
+would be quite separate from the methods defined by the driver for the bus
+that the flash device is connetced to. The act of attaching a device to a
+parent device which is a bus, causes the device to start behaving like a
+bus device, regardless of its own views on the matter.
+
+The uclass for the device can also contain data private to that uclass.
+But note that each device on the bus may be a member of a different
+uclass, and this data has nothing to do with the child data for each child
+on the bus. It is the bus' uclass that controls the child with respect to
+the bus.
+
+
+Driver Lifecycle
+----------------
+
+Here are the stages that a device goes through in driver model. Note that all
+methods mentioned here are optional - e.g. if there is no probe() method for
+a device then it will not be called. A simple device may have very few
+methods actually defined.
+
+Bind stage
+^^^^^^^^^^
+
+U-Boot discovers devices using one of these two methods:
+
+- Scan the U_BOOT_DRVINFO() definitions. U-Boot looks up the name specified
+  by each, to find the appropriate U_BOOT_DRIVER() definition. In this case,
+  there is no path by which driver_data may be provided, but the U_BOOT_DRVINFO()
+  may provide plat.
+
+- Scan through the device tree definitions. U-Boot looks at top-level
+  nodes in the the device tree. It looks at the compatible string in each node
+  and uses the of_match table of the U_BOOT_DRIVER() structure to find the
+  right driver for each node. In this case, the of_match table may provide a
+  driver_data value, but plat cannot be provided until later.
+
+For each device that is discovered, U-Boot then calls device_bind() to create a
+new device, initializes various core fields of the device object such as name,
+uclass & driver, initializes any optional fields of the device object that are
+applicable such as of_offset, driver_data & plat, and finally calls the
+driver's bind() method if one is defined.
+
+At this point all the devices are known, and bound to their drivers. There
+is a 'struct udevice' allocated for all devices. However, nothing has been
+activated (except for the root device). Each bound device that was created
+from a U_BOOT_DRVINFO() declaration will hold the plat pointer specified
+in that declaration. For a bound device created from the device tree,
+plat will be NULL, but of_offset will be the offset of the device tree
+node that caused the device to be created. The uclass is set correctly for
+the device.
+
+The device's sequence number is assigned, either the requested one or the next
+available one (after all aliases are processed) if nothing particular is
+requested.
+
+The device's bind() method is permitted to perform simple actions, but
+should not scan the device tree node, not initialise hardware, nor set up
+structures or allocate memory. All of these tasks should be left for
+the probe() method.
+
+Note that compared to Linux, U-Boot's driver model has a separate step of
+probe/remove which is independent of bind/unbind. This is partly because in
+U-Boot it may be expensive to probe devices and we don't want to do it until
+they are needed, or perhaps until after relocation.
+
+Reading ofdata
+^^^^^^^^^^^^^^
+
+Most devices have data in the device tree which they can read to find out the
+base address of hardware registers and parameters relating to driver
+operation. This is called 'ofdata' (Open-Firmware data).
+
+The device's of_to_plat() implemnents allocation and reading of
+plat. A parent's ofdata is always read before a child.
+
+The steps are:
+
+   1. If priv_auto is non-zero, then the device-private space
+   is allocated for the device and zeroed. It will be accessible as
+   dev->priv. The driver can put anything it likes in there, but should use
+   it for run-time information, not platform data (which should be static
+   and known before the device is probed).
+
+   2. If plat_auto is non-zero, then the platform data space
+   is allocated. This is only useful for device tree operation, since
+   otherwise you would have to specify the platform data in the
+   U_BOOT_DRVINFO() declaration. The space is allocated for the device and
+   zeroed. It will be accessible as dev->plat.
+
+   3. If the device's uclass specifies a non-zero per_device_auto,
+   then this space is allocated and zeroed also. It is allocated for and
+   stored in the device, but it is uclass data. owned by the uclass driver.
+   It is possible for the device to access it.
+
+   4. If the device's immediate parent specifies a per_child_auto
+   then this space is allocated. This is intended for use by the parent
+   device to keep track of things related to the child. For example a USB
+   flash stick attached to a USB host controller would likely use this
+   space. The controller can hold information about the USB state of each
+   of its children.
+
+   5. If the driver provides an of_to_plat() method, then this is
+   called to convert the device tree data into platform data. This should
+   do various calls like dev_read_u32(dev, ...) to access the node and store
+   the resulting information into dev->plat. After this point, the device
+   works the same way whether it was bound using a device tree node or
+   U_BOOT_DRVINFO() structure. In either case, the platform data is now stored
+   in the plat structure. Typically you will use the
+   plat_auto feature to specify the size of the platform data
+   structure, and U-Boot will automatically allocate and zero it for you before
+   entry to of_to_plat(). But if not, you can allocate it yourself in
+   of_to_plat(). Note that it is preferable to do all the device tree
+   decoding in of_to_plat() rather than in probe(). (Apart from the
+   ugliness of mixing configuration and run-time data, one day it is possible
+   that U-Boot will cache platform data for devices which are regularly
+   de/activated).
+
+   6. The device is marked 'plat valid'.
+
+Note that ofdata reading is always done (for a child and all its parents)
+before probing starts. Thus devices go through two distinct states when
+probing: reading platform data and actually touching the hardware to bring
+the device up.
+
+Having probing separate from ofdata-reading helps deal with of-platdata, where
+the probe() method is common to both DT/of-platdata operation, but the
+of_to_plat() method is implemented differently.
+
+Another case has come up where this separate is useful. Generation of ACPI
+tables uses the of-platdata but does not want to probe the device. Probing
+would cause U-Boot to violate one of its design principles, viz that it
+should only probe devices that are used. For ACPI we want to generate a
+table for each device, even if U-Boot does not use it. In fact it may not
+even be possible to probe the device - e.g. an SD card which is not
+present will cause an error on probe, yet we still must tell Linux about
+the SD card connector in case it is used while Linux is running.
+
+It is important that the of_to_plat() method does not actually probe
+the device itself. However there are cases where other devices must be probed
+in the of_to_plat() method. An example is where a device requires a
+GPIO for it to operate. To select a GPIO obviously requires that the GPIO
+device is probed. This is OK when used by common, core devices such as GPIO,
+clock, interrupts, reset and the like.
+
+If your device relies on its parent setting up a suitable address space, so
+that dev_read_addr() works correctly, then make sure that the parent device
+has its setup code in of_to_plat(). If it has it in the probe method,
+then you cannot call dev_read_addr() from the child device's
+of_to_plat() method. Move it to probe() instead. Buses like PCI can
+fall afoul of this rule.
+
+Activation/probe
+^^^^^^^^^^^^^^^^
+
+To save resources devices in U-Boot are probed lazily. U-Boot is a bootloader,
+not an operating system. Many devices are never used during an U-Boot run, and
+probing them takes time, requires memory, may add delays to the main loop, etc.
+
+The device should be probed by the uclass code or generic device code (e.g.
+device_find_global_by_ofnode()). Uclasses differ but two common use cases can be
+seen:
+
+   1. The uclass is asked to look up a specific device, such as SPI bus 0,
+      first chip select - in this case the returned device should be
+      activated.
+
+   2. The uclass is asked to perform a specific function on any device that
+      supports it, eg. reset the board using any sysreset that can be found -
+      for this case the core uclass code provides iterators that activate
+      each device before returning it, and the uclass typically implements a
+      walk function that iterates over all devices of the uclass and tries
+      to perform the requested function on each in turn until succesful.
+
+To activate a device U-Boot first reads ofdata as above and then follows these
+steps (see device_probe()):
+
+   1. All parent devices are probed. It is not possible to activate a device
+      unless its predecessors (all the way up to the root device) are activated.
+      This means (for example) that an I2C driver will require that its bus
+      be activated.
+
+   2. The device's probe() method is called. This should do anything that
+      is required by the device to get it going. This could include checking
+      that the hardware is actually present, setting up clocks for the
+      hardware and setting up hardware registers to initial values. The code
+      in probe() can access:
+
+      - platform data in dev->plat (for configuration)
+      - private data in dev->priv (for run-time state)
+      - uclass data in dev->uclass_priv (for things the uclass stores
+        about this device)
+
+      Note: If you don't use priv_auto then you will need to
+      allocate the priv space here yourself. The same applies also to
+      plat_auto. Remember to free them in the remove() method.
+
+   3. The device is marked 'activated'
+
+   4. The uclass's post_probe() method is called, if one exists. This may
+      cause the uclass to do some housekeeping to record the device as
+      activated and 'known' by the uclass.
+
+Running stage
+^^^^^^^^^^^^^
+
+The device is now activated and can be used. From now until it is removed
+all of the above structures are accessible. The device appears in the
+uclass's list of devices (so if the device is in UCLASS_GPIO it will appear
+as a device in the GPIO uclass). This is the 'running' state of the device.
+
+Removal stage
+^^^^^^^^^^^^^
+
+When the device is no-longer required, you can call device_remove() to
+remove it. This performs the probe steps in reverse:
+
+   1. The uclass's pre_remove() method is called, if one exists. This may
+   cause the uclass to do some housekeeping to record the device as
+   deactivated and no-longer 'known' by the uclass.
+
+   2. All the device's children are removed. It is not permitted to have
+   an active child device with a non-active parent. This means that
+   device_remove() is called for all the children recursively at this point.
+
+   3. The device's remove() method is called. At this stage nothing has been
+   deallocated so platform data, private data and the uclass data will all
+   still be present. This is where the hardware can be shut down. It is
+   intended that the device be completely inactive at this point, For U-Boot
+   to be sure that no hardware is running, it should be enough to remove
+   all devices.
+
+   4. The device memory is freed (platform data, private data, uclass data,
+   parent data).
+
+   Note: Because the platform data for a U_BOOT_DRVINFO() is defined with a
+   static pointer, it is not de-allocated during the remove() method. For
+   a device instantiated using the device tree data, the platform data will
+   be dynamically allocated, and thus needs to be deallocated during the
+   remove() method, either:
+
+      - if the plat_auto is non-zero, the deallocation happens automatically
+        within the driver model core in the unbind stage; or
+
+      - when plat_auto is 0, both the allocation (in probe()
+        or preferably of_to_plat()) and the deallocation in remove()
+        are the responsibility of the driver author.
+
+   5. The device is marked inactive. Note that it is still bound, so the
+   device structure itself is not freed at this point. Should the device be
+   activated again, then the cycle starts again at step 2 above.
+
+Unbind stage
+^^^^^^^^^^^^
+
+The device is unbound. This is the step that actually destroys the device.
+If a parent has children these will be destroyed first. After this point
+the device does not exist and its memory has be deallocated.
+
+
+Special cases for removal
+-------------------------
+
+Some devices need to do clean-up before the OS is called. For example, a USB
+driver may want to stop the bus. This can be done in the remove() method.
+Some special flags are used to determine whether to remove the device:
+
+   DM_FLAG_OS_PREPARE - indicates that the device needs to get ready for OS
+          boot. The device will be removed just before the OS is booted
+   DM_REMOVE_ACTIVE_DMA - indicates that the device uses DMA. This is
+          effectively the same as DM_FLAG_OS_PREPARE, so the device is removed
+          before the OS is booted
+   DM_FLAG_VITAL - indicates that the device is 'vital' to the operation of
+          other devices. It is possible to remove this device after all regular
+          devices are removed. This is useful e.g. for a clock, which need to
+          be active during the device-removal phase.
+
+The dm_remove_devices_flags() function can be used to remove devices based on
+their driver flags.
+
+
+Error codes
+-----------
+
+Driver model tries to use errors codes in a consistent way, as follows:
+
+\-EAGAIN
+   Try later, e.g. dependencies not ready
+
+\-EINVAL
+   Invalid argument, such as `dev_read_...()` failed or any other
+   devicetree-related access. Also used when a driver method is passed an
+   argument it considers invalid or does not support.
+
+\-EIO
+   Failed to perform an I/O operation. This is used when a local device
+   (i.e. part of the SOC) does not work as expected. Use -EREMOTEIO for
+   failures to talk to a separate device, e.g. over an I2C or SPI
+   channel.
+
+\-ENODEV
+   Do not bind the device. This should not be used to indicate an
+   error probing the device or for any other purpose, lest driver model get
+   confused. Using `-ENODEV` inside a driver method makes no sense, since
+   clearly there is a device.
+
+\-ENOENT
+   Entry or object not found. This is used when a device, file or directory
+   cannot be found (e.g. when looked up by name), It can also indicate a
+   missing devicetree subnode.
+
+\-ENOMEM
+   Out of memory
+
+\-ENOSPC
+   Ran out of space (e.g. in a buffer or limited-size array)
+
+\-ENOSYS
+   Function not implemented. This is returned by uclasses where the driver does
+   not implement a particular method. It can also be returned by drivers when
+   a particular sub-method is not implemented. This is widely checked in the
+   wider code base, where a feature may or may not be compiled into U-Boot. It
+   indicates that the feature is not available, but this is often just normal
+   operation. Please do not use -ENOSUPP. If an incorrect or unknown argument
+   is provided to a method (e.g. an unknown clock ID), return -EINVAL.
+
+\-ENXIO
+   Couldn't find device/address. This is used when a device or address
+   could not be obtained or is not valid. It is often used to indicate a
+   different type of problem, if -ENOENT is already used for something else in
+   the driver.
+
+\-EPERM
+   This is -1 so some older code may use it as a generic error. This indicates
+   that an operation is not permitted, e.g. a security violation or policy
+   constraint. It is returned internally when binding devices before relocation,
+   if the device is not marked for pre-relocation use.
+
+\-EPFNOSUPPORT
+   Missing uclass. This is deliberately an uncommon error code so that it can
+   easily be distinguished. If you see this very early in U-Boot, it means that
+   a device exists with a particular uclass but the uclass does not (mostly
+   likely because it is not compiled in). Enable DEBUG in uclass.c or lists.c
+   to see which uclass ID or driver is causing the problem.
+
+\-EREMOTEIO
+   This indicates an error in talking to a peripheral over a comms link, such
+   as I2C or SPI. It might indicate that the device is not present or is not
+   responding as expected.
+
+\-ETIMEDOUT
+   Hardware access or some other operation has timed out. This is used where
+   there is an expected time of response and that was exceeded by enough of
+   a margin that there is probably something wrong.
+
+
+Less common ones:
+
+\-ECOMM
+   Not widely used, but similar to -EREMOTEIO. Can be useful as a secondary
+   error to distinguish the problem from -EREMOTEIO.
+
+\-EKEYREJECTED
+   Attempt to remove a device which does not match the removal flags. See
+   device_remove().
+
+\-EILSEQ
+   Devicetree read failure, specifically trying to read a string index which
+   does not exist, in a string-listg property
+
+\-ENOEXEC
+   Attempt to use a uclass method on a device not in that uclass. This is
+   seldom checked at present, since it is generally a programming error and a
+   waste of code space. A DEBUG-only check would be useful here.
+
+\-ENODATA
+   Devicetree read error, where a property exists but has no data associated
+   with it
+
+\-EOVERFLOW
+   Devicetree read error, where the property is longer than expected
+
+\-EPROBE_DEFER
+   Attempt to remove a non-vital device when the removal flags indicate that
+   only vital devices should be removed
+
+\-ERANGE
+   Returned by regmap functions when arguments are out of range. This can be
+   useful for disinguishing regmap errors from other errors obtained while
+   probing devices.
+
+Drivers should use the same conventions so that things function as expected.
+In particular, if a driver fails to probe, or a uclass operation fails, the
+error code is the primary way to indicate what actually happened.
+
+Printing error messages in drivers is discouraged due to code size bloat and
+since it can result in messages appearing in normal operation. For example, if
+a command tries two different devices and uses whichever one probes correctly,
+we don't want an error message displayed, even if the command itself might show
+a warning or informational message. Ideally, messages in drivers should only be
+displayed when debugging, e.g. by using log_debug() although in extreme cases
+log_warning() or log_error() may be used.
+
+Error messages can be logged using `log_msg_ret()`, so that enabling
+`CONFIG_LOG` and `CONFIG_LOG_ERROR_RETURN` shows a trace of error codes returned
+through the call stack. That can be a handy way of quickly figuring out where
+an error occurred. Get into the habit of return errors with
+`return log_msg_ret("here", ret)` instead of just `return ret`. The string
+just needs to be long enough to find in a single function, since a log record
+stores (and can print with `CONFIG_LOGF_FUNC`) the function where it was
+generated.
+
+
+Data Structures
+---------------
+
+Driver model uses a doubly-linked list as the basic data structure. Some
+nodes have several lists running through them. Creating a more efficient
+data structure might be worthwhile in some rare cases, once we understand
+what the bottlenecks are.
+
+
+Tag Support
+-----------
+
+It is sometimes useful for a subsystem to associate its own private
+data (or object) to a DM device, i.e. struct udevice, to support
+additional features.
+
+Tag support in driver model will give us the ability to do so dynamically
+instead of modifying "udevice" data structure. In the initial release, we
+will support two type of attributes:
+
+- a pointer with dm_tag_set_ptr(), and
+- an unsigned long with dm_tag_set_val()
+
+For example, UEFI subsystem utilizes the feature to maintain efi_disk
+objects depending on linked udevice's lifecycle.
+
+While the current implementation is quite simple, it will get evolved
+as the feature is more extensively used in U-Boot subsystems.
+
+
+Changes since v1
+----------------
+
+For the record, this implementation uses a very similar approach to the
+original patches, but makes at least the following changes:
+
+- Tried to aggressively remove boilerplate, so that for most drivers there
+  is little or no 'driver model' code to write.
+- Moved some data from code into data structure - e.g. store a pointer to
+  the driver operations structure in the driver, rather than passing it
+  to the driver bind function.
+- Rename some structures to make them more similar to Linux (struct udevice
+  instead of struct instance, struct plat, etc.)
+- Change the name 'core' to 'uclass', meaning U-Boot class. It seems that
+  this concept relates to a class of drivers (or a subsystem). We shouldn't
+  use 'class' since it is a C++ reserved word, so U-Boot class (uclass) seems
+  better than 'core'.
+- Remove 'struct driver_instance' and just use a single 'struct udevice'.
+  This removes a level of indirection that doesn't seem necessary.
+- Built in device tree support, to avoid the need for plat
+- Removed the concept of driver relocation, and just make it possible for
+  the new driver (created after relocation) to access the old driver data.
+  I feel that relocation is a very special case and will only apply to a few
+  drivers, many of which can/will just re-init anyway. So the overhead of
+  dealing with this might not be worth it.
+- Implemented a GPIO system, trying to keep it simple
+
+
+Pre-Relocation Support
+----------------------
+
+For pre-relocation we simply call the driver model init function. Only
+drivers marked with DM_FLAG_PRE_RELOC or the device tree 'bootph-all'
+property are initialised prior to relocation. This helps to reduce the driver
+model overhead. This flag applies to SPL and TPL as well, if device tree is
+enabled (CONFIG_OF_CONTROL) there.
+
+Note when device tree is enabled, the device tree 'bootph-all'
+property can provide better control granularity on which device is bound
+before relocation. While with DM_FLAG_PRE_RELOC flag of the driver all
+devices with the same driver are bound, which requires allocation a large
+amount of memory. When device tree is not used, DM_FLAG_PRE_RELOC is the
+only way for statically declared devices via U_BOOT_DRVINFO() to be bound
+prior to relocation.
+
+It is possible to limit this to specific relocation steps, by using
+the more specialized 'bootph-pre-ram' and 'bootph-pre-sram' flags
+in the device tree node. For U-Boot proper you can use 'bootph-some-ram'
+which means that it will be processed (and a driver bound) in U-Boot proper
+prior to relocation, but will not be available in SPL or TPL.
+
+To reduce the size of SPL and TPL, only the nodes with pre-relocation
+properties ('bootph-all', 'bootph-pre-ram' or 'bootph-pre-sram') are kept in
+their device trees (see README.SPL for details); the remaining nodes are
+always bound.
+
+Then post relocation we throw that away and re-init driver model again.
+For drivers which require some sort of continuity between pre- and
+post-relocation devices, we can provide access to the pre-relocation
+device pointers, but this is not currently implemented (the root device
+pointer is saved but not made available through the driver model API).
+
+
+SPL Support
+-----------
+
+Driver model can operate in SPL. Its efficient implementation and small code
+size provide for a small overhead which is acceptable for all but the most
+constrained systems.
+
+To enable driver model in SPL, define CONFIG_SPL_DM. You might want to
+consider the following option also. See the main README for more details.
+
+   - CONFIG_SPL_SYS_MALLOC_SIMPLE
+   - CONFIG_DM_WARN
+   - CONFIG_DM_DEVICE_REMOVE
+   - CONFIG_DM_STDIO
+
+
+Enabling Driver Model
+---------------------
+
+Driver model is being brought into U-Boot gradually. As each subsystems gets
+support, a uclass is created and a CONFIG to enable use of driver model for
+that subsystem.
+
+For example CONFIG_DM_SERIAL enables driver model for serial. With that
+defined, the old serial support is not enabled, and your serial driver must
+conform to driver model. With that undefined, the old serial support is
+enabled and driver model is not available for serial. This means that when
+you convert a driver, you must either convert all its boards, or provide for
+the driver to be compiled both with and without driver model (generally this
+is not very hard).
+
+See the main README for full details of the available driver model CONFIG
+options.
+
+
+Things to punt for later
+------------------------
+
+Uclasses are statically numbered at compile time. It would be possible to
+change this to dynamic numbering, but then we would require some sort of
+lookup service, perhaps searching by name. This is slightly less efficient
+so has been left out for now. One small advantage of dynamic numbering might
+be fewer merge conflicts in uclass-id.h.
diff --git a/doc/develop/driver-model/ethernet.rst b/doc/develop/driver-model/ethernet.rst
new file mode 100644
index 00000000000..73c3a728dbf
--- /dev/null
+++ b/doc/develop/driver-model/ethernet.rst
@@ -0,0 +1,321 @@
+Ethernet Driver Guide
+=====================
+
+The networking stack in Das U-Boot is designed for multiple network devices
+to be easily added and controlled at runtime.  This guide is meant for people
+who wish to review the net driver stack with an eye towards implementing your
+own ethernet device driver.  Here we will describe a new pseudo 'APE' driver.
+
+Most existing drivers do already - and new network driver MUST - use the
+U-Boot core driver model. Generic information about this can be found in
+doc/driver-model/design.rst, this document will thus focus on the network
+specific code parts.
+Some drivers are still using the old Ethernet interface, differences between
+the two and hints about porting will be handled at the end.
+
+Driver framework
+----------------
+
+A network driver following the driver model must declare itself using
+the UCLASS_ETH .id field in the U-Boot driver struct:
+
+.. code-block:: c
+
+	U_BOOT_DRIVER(eth_ape) = {
+		.name			= "eth_ape",
+		.id			= UCLASS_ETH,
+		.of_match		= eth_ape_ids,
+		.of_to_plat	= eth_ape_of_to_plat,
+		.probe			= eth_ape_probe,
+		.ops			= &eth_ape_ops,
+		.priv_auto	= sizeof(struct eth_ape_priv),
+		.plat_auto = sizeof(struct eth_ape_pdata),
+		.flags			= DM_FLAG_ALLOC_PRIV_DMA,
+	};
+
+struct eth_ape_priv contains runtime per-instance data, like buffers, pointers
+to current descriptors, current speed settings, pointers to PHY related data
+(like struct mii_dev) and so on. Declaring its size in .priv_auto
+will let the driver framework allocate it at the right time.
+It can be retrieved using a dev_get_priv(dev) call.
+
+struct eth_ape_pdata contains static platform data, like the MMIO base address,
+a hardware variant, the MAC address. ``struct eth_pdata eth_pdata``
+as the first member of this struct helps to avoid duplicated code.
+If you don't need any more platform data beside the standard member,
+just use sizeof(struct eth_pdata) for the plat_auto.
+
+PCI devices add a line pointing to supported vendor/device ID pairs:
+
+.. code-block:: c
+
+	static struct pci_device_id supported[] = {
+		{ PCI_DEVICE(PCI_VENDOR_ID_APE, 0x4223) },
+		{}
+	};
+
+	U_BOOT_PCI_DEVICE(eth_ape, supported);
+
+It is also possible to declare support for a whole class of PCI devices::
+
+	{ PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDHCI << 8, 0xffff00) },
+
+Device probing and instantiation will be handled by the driver model framework,
+so follow the guidelines there. The probe() function would initialise the
+platform specific parts of the hardware, like clocks, resets, GPIOs, the MDIO
+bus. Also it would take care of any special PHY setup (power rails, enable
+bits for internal PHYs, etc.).
+
+Driver methods
+--------------
+
+The real work will be done in the driver method functions the driver provides
+by defining the members of struct eth_ops:
+
+.. code-block:: c
+
+	struct eth_ops {
+		int (*start)(struct udevice *dev);
+		int (*send)(struct udevice *dev, void *packet, int length);
+		int (*recv)(struct udevice *dev, int flags, uchar **packetp);
+		int (*free_pkt)(struct udevice *dev, uchar *packet, int length);
+		void (*stop)(struct udevice *dev);
+		int (*mcast)(struct udevice *dev, const u8 *enetaddr, int join);
+		int (*write_hwaddr)(struct udevice *dev);
+		int (*read_rom_hwaddr)(struct udevice *dev);
+	};
+
+An up-to-date version of this struct together with more information can be
+found in include/net.h.
+
+Only start, stop, send and recv are required, the rest are optional and are
+handled by generic code or ignored if not provided.
+
+The **start** function initialises the hardware and gets it ready for send/recv
+operations.  You often do things here such as resetting the MAC
+and/or PHY, and waiting for the link to autonegotiate.  You should also take
+the opportunity to program the device's MAC address with the enetaddr member
+of the generic struct eth_pdata (which would be the first member of your
+own plat struct). This allows the rest of U-Boot to dynamically change
+the MAC address and have the new settings be respected.
+
+The **send** function does what you think -- transmit the specified packet
+whose size is specified by length (in bytes). The packet buffer can (and
+will!) be reused for subsequent calls to send(), so it must be no longer
+used when the send() function returns. The easiest way to achieve this is
+to wait until the transmission is complete. Alternatively, if supported by
+the hardware, just waiting for the buffer to be consumed (by some DMA engine)
+might be an option as well.
+Another way of consuming the buffer could be to copy the data to be send,
+then just queue the copied packet (for instance handing it over to a DMA
+engine), and return immediately afterwards.
+In any case you should leave the state such that the send function can be
+called multiple times in a row.
+
+The **recv** function polls for availability of a new packet. If none is
+available, it must return with -EAGAIN.
+If a packet has been received, make sure it is accessible to the CPU
+(invalidate caches if needed), then write its address to the packetp pointer,
+and return the length. If there is an error (receive error, too short or too
+long packet), return 0 if you require the packet to be cleaned up normally,
+or a negative error code otherwise (cleanup not necessary or already done).
+The U-Boot network stack will then process the packet.
+
+If **free_pkt** is defined, U-Boot will call it after a received packet has
+been processed, so the packet buffer can be freed or recycled. Typically you
+would hand it back to the hardware to acquire another packet. free_pkt() will
+be called after recv(), for the same packet, so you don't necessarily need
+to infer the buffer to free from the ``packet`` pointer, but can rely on that
+being the last packet that recv() handled.
+The common code sets up packet buffers for you already in the .bss
+(net_rx_packets), so there should be no need to allocate your own. This doesn't
+mean you must use the net_rx_packets array however; you're free to use any
+buffer you wish.
+
+The **stop** function should turn off / disable the hardware and place it back
+in its reset state.  It can be called at any time (before any call to the
+related start() function), so make sure it can handle this sort of thing.
+
+The (optional) **write_hwaddr** function should program the MAC address stored
+in pdata->enetaddr into the Ethernet controller.
+
+So the call graph at this stage would look something like:
+
+.. code-block:: c
+
+	(some net operation (ping / tftp / whatever...))
+	eth_init()
+		ops->start()
+	eth_send()
+		ops->send()
+	eth_rx()
+		ops->recv()
+		(process packet)
+		if (ops->free_pkt)
+			ops->free_pkt()
+	eth_halt()
+		ops->stop()
+
+
+CONFIG_PHYLIB / CONFIG_CMD_MII
+------------------------------
+
+If your device supports banging arbitrary values on the MII bus (pretty much
+every device does), you should add support for the mii command.  Doing so is
+fairly trivial and makes debugging mii issues a lot easier at runtime.
+
+In your driver's ``probe()`` function, add a call to mdio_alloc() and
+mdio_register() like so:
+
+.. code-block:: c
+
+	bus = mdio_alloc();
+	if (!bus) {
+		...
+		return -ENOMEM;
+	}
+
+	bus->read = ape_mii_read;
+	bus->write = ape_mii_write;
+	mdio_register(bus);
+
+And then define the mii_read and mii_write functions if you haven't already.
+Their syntax is straightforward::
+
+	int mii_read(struct mii_dev *bus, int addr, int devad, int reg);
+	int mii_write(struct mii_dev *bus, int addr, int devad, int reg,
+		      u16 val);
+
+The read function should read the register 'reg' from the phy at address 'addr'
+and return the result to its caller.  The implementation for the write function
+should logically follow.
+
+................................................................
+
+Legacy network drivers
+----------------------
+
+!!! WARNING !!!
+
+This section below describes the old way of doing things. No new Ethernet
+drivers should be implemented this way. All new drivers should be written
+against the U-Boot core driver model, as described above.
+
+The actual callback functions are fairly similar, the differences are:
+
+- ``start()`` is called ``init()``
+- ``stop()`` is called ``halt()``
+- The ``recv()`` function must loop until all packets have been received, for
+  each packet it must call the net_process_received_packet() function,
+  handing it over the pointer and the length. Afterwards it should free
+  the packet, before checking for new data.
+
+For porting an old driver to the new driver model, split the existing recv()
+function into the actual new recv() function, just fetching **one** packet,
+remove the call to net_process_received_packet(), then move the packet
+cleanup into the ``free_pkt()`` function.
+
+Registering the driver and probing a device is handled very differently,
+follow the recommendations in the driver model design documentation for
+instructions on how to port this over. For the records, the old way of
+initialising a network driver is as follows:
+
+Old network driver registration
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+When U-Boot initializes, it will call the common function eth_initialize().
+This will in turn call the board-specific board_eth_init() (or if that fails,
+the cpu-specific cpu_eth_init()).  These board-specific functions can do random
+system handling, but ultimately they will call the driver-specific register
+function which in turn takes care of initializing that particular instance.
+
+Keep in mind that you should code the driver to avoid storing state in global
+data as someone might want to hook up two of the same devices to one board.
+Any such information that is specific to an interface should be stored in a
+private, driver-defined data structure and pointed to by eth->priv (see below).
+
+So the call graph at this stage would look something like:
+
+.. code-block:: c
+
+	board_init()
+		eth_initialize()
+			board_eth_init() / cpu_eth_init()
+				driver_register()
+					initialize eth_device
+					eth_register()
+
+At this point in time, the only thing you need to worry about is the driver's
+register function.  The pseudo code would look something like:
+
+.. code-block:: c
+
+	int ape_register(struct bd_info *bis, int iobase)
+	{
+		struct ape_priv *priv;
+		struct eth_device *dev;
+		struct mii_dev *bus;
+
+		priv = malloc(sizeof(*priv));
+		if (priv == NULL)
+			return -ENOMEM;
+
+		dev = malloc(sizeof(*dev));
+		if (dev == NULL) {
+			free(priv);
+			return -ENOMEM;
+		}
+
+		/* setup whatever private state you need */
+
+		memset(dev, 0, sizeof(*dev));
+		sprintf(dev->name, "APE");
+
+		/*
+		 * if your device has dedicated hardware storage for the
+		 * MAC, read it and initialize dev->enetaddr with it
+		 */
+		ape_mac_read(dev->enetaddr);
+
+		dev->iobase = iobase;
+		dev->priv = priv;
+		dev->init = ape_init;
+		dev->halt = ape_halt;
+		dev->send = ape_send;
+		dev->recv = ape_recv;
+		dev->write_hwaddr = ape_write_hwaddr;
+
+		eth_register(dev);
+
+	#ifdef CONFIG_PHYLIB
+		bus = mdio_alloc();
+		if (!bus) {
+			free(priv);
+			free(dev);
+			return -ENOMEM;
+		}
+
+		bus->read = ape_mii_read;
+		bus->write = ape_mii_write;
+		mdio_register(bus);
+	#endif
+
+		return 1;
+	}
+
+The exact arguments needed to initialize your device are up to you.  If you
+need to pass more/less arguments, that's fine.  You should also add the
+prototype for your new register function to include/netdev.h.
+
+The return value for this function should be as follows:
+< 0 - failure (hardware failure, not probe failure)
+>=0 - number of interfaces detected
+
+You might notice that many drivers seem to use xxx_initialize() rather than
+xxx_register().  This is the old naming convention and should be avoided as it
+causes confusion with the driver-specific init function.
+
+Other than locating the MAC address in dedicated hardware storage, you should
+not touch the hardware in anyway.  That step is handled in the driver-specific
+init function.  Remember that we are only registering the device here, we are
+not checking its state or doing random probing.
diff --git a/doc/develop/driver-model/fdt-fixup.rst b/doc/develop/driver-model/fdt-fixup.rst
new file mode 100644
index 00000000000..974c09031ed
--- /dev/null
+++ b/doc/develop/driver-model/fdt-fixup.rst
@@ -0,0 +1,132 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. 2017-01-06, Mario Six <mario.six@gdsys.cc>
+
+Pre-relocation device tree manipulation
+=======================================
+
+Purpose
+-------
+
+In certain markets, it is beneficial for manufacturers of embedded devices to
+offer certain ranges of products, where the functionality of the devices within
+one series either don't differ greatly from another, or can be thought of as
+"extensions" of each other, where one device only differs from another in the
+addition of a small number of features (e.g. an additional output connector).
+
+To realize this in hardware, one method is to have a motherboard, and several
+possible daughter boards that can be attached to this mother board. Different
+daughter boards then either offer the slightly different functionality, or the
+addition of the daughter board to the device realizes the "extension" of
+functionality to the device described previously.
+
+For the software, we obviously want to reuse components for all these
+variations of the device. This means that the software somehow needs to cope
+with the situation that certain ICs may or may not be present on any given
+system, depending on which daughter boards are connected to the motherboard.
+
+In the Linux kernel, one possible solution to this problem is to employ the
+device tree overlay mechanism: There exists one "base" device tree, which
+features only the components guaranteed to exist in all varieties of the
+device. At the start of the kernel, the presence and type of the daughter
+boards is then detected, and the corresponding device tree overlays are applied
+to support the components on the daughter boards.
+
+Note that the components present on every variety of the board must, of course,
+provide a way to find out if and which daughter boards are installed for this
+mechanism to work.
+
+In the U-Boot boot loader, support for device tree overlays has recently been
+integrated, and is used on some boards to alter the device tree that is later
+passed to Linux. But since U-Boot's driver model, which is device tree-based as
+well, is being used in more and more drivers, the same problem of altering the
+device tree starts cropping up in U-Boot itself as well.
+
+An additional problem with the device tree in U-Boot is that it is read-only,
+and the current mechanisms don't allow easy manipulation of the device tree
+after the driver model has been initialized. While migrating to a live device
+tree (at least after the relocation) would greatly simplify the solution of
+this problem, it is a non-negligible task to implement it, an a interim
+solution is needed to address the problem at least in the medium-term.
+
+Hence, we propose a solution to this problem by offering a board-specific
+call-back function, which is passed a writeable pointer to the device tree.
+This function is called before the device tree is relocated, and specifically
+before the main U-Boot's driver model is instantiated, hence the main U-Boot
+"sees" all modifications to the device tree made in this function. Furthermore,
+we have the pre-relocation driver model at our disposal at this stage, which
+means that we can query the hardware for the existence and variety of the
+components easily.
+
+Implementation
+--------------
+
+To take advantage of the pre-relocation device tree manipulation mechanism,
+boards have to implement the function board_fix_fdt, which has the following
+signature:
+
+.. code-block:: c
+
+   int board_fix_fdt (void *rw_fdt_blob)
+
+The passed-in void pointer is a writeable pointer to the device tree, which can
+be used to manipulate the device tree using e.g. functions from
+include/fdt_support.h. The return value should either be 0 in case of
+successful execution of the device tree manipulation or something else for a
+failure. Note that returning a non-null value from the function will
+unrecoverably halt the boot process, as with any function from init_sequence_f
+(in common/board_f.c).
+
+Furthermore, the Kconfig option OF_BOARD_FIXUP has to be set for the function
+to be called::
+
+   Device Tree Control
+   -> [*] Board-specific manipulation of Device Tree
+
++----------------------------------------------------------+
+| WARNING: The actual manipulation of the device tree has  |
+| to be the _last_ set of operations in board_fix_fdt!     |
+| Since the pre-relocation driver model does not adapt to  |
+| changes made to the device tree either, its references   |
+| into the device tree will be invalid after manipulating  |
+| it, and unpredictable behavior might occur when          |
+| functions that rely on them are executed!                |
++----------------------------------------------------------+
+
+Hence, the recommended layout of the board_fixup_fdt call-back function is the
+following:
+
+.. code-block:: c
+
+	int board_fix_fdt(void *rw_fdt_blob)
+	{
+		/*
+		 * Collect information about device's hardware and store
+		 * them in e.g. local variables
+		 */
+
+		/* Do device tree manipulation using the values previously collected */
+
+		/* Return 0 on successful manipulation and non-zero otherwise */
+	}
+
+If this convention is kept, both an "additive" approach, meaning that nodes for
+detected components are added to the device tree, as well as a "subtractive"
+approach, meaning that nodes for absent components are removed from the tree,
+as well as a combination of both approaches should work.
+
+Example
+-------
+
+The controlcenterdc board (board/gdsys/a38x/controlcenterdc.c) features a
+board_fix_fdt function, in which six GPIO expanders (which might be present or
+not, since they are on daughter boards) on a I2C bus are queried for, and
+subsequently deactivated in the device tree if they are not present.
+
+Note that the dm_i2c_simple_probe function does not use the device tree, hence
+it is safe to call it after the tree has already been manipulated.
+
+Work to be done
+---------------
+
+* The application of device tree overlay should be possible in board_fixup_fdt,
+  but has not been tested at this stage.
diff --git a/doc/develop/driver-model/fs_firmware_loader.rst b/doc/develop/driver-model/fs_firmware_loader.rst
new file mode 100644
index 00000000000..149b8b436ec
--- /dev/null
+++ b/doc/develop/driver-model/fs_firmware_loader.rst
@@ -0,0 +1,154 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2018-2019 Intel Corporation <www.intel.com>
+
+File System Firmware Loader
+===========================
+
+This is file system firmware loader for U-Boot framework, which has very close
+to some Linux Firmware API. For the details of Linux Firmware API, you can refer
+to https://01.org/linuxgraphics/gfx-docs/drm/driver-api/firmware/index.html.
+
+File system firmware loader can be used to load whatever(firmware, image,
+and binary) from the storage device in file system format into target location
+such as memory, then consumer driver such as FPGA driver can program FPGA image
+from the target location into FPGA.
+
+To enable firmware loader, CONFIG_FS_LOADER need to be set at
+<board_name>_defconfig such as "CONFIG_FS_LOADER=y".
+
+Firmware Loader API core features
+---------------------------------
+
+Firmware storage device described in device tree source
+-------------------------------------------------------
+For passing data like storage device phandle and partition where the
+firmware loading from to the firmware loader driver, those data could be
+defined in fs-loader node as shown in below:
+
+Example for block device::
+
+	fs_loader0: fs-loader {
+		bootph-all;
+		compatible = "u-boot,fs-loader";
+		phandlepart = <&mmc 1>;
+	};
+
+<&mmc 1> means block storage device pointer and its partition.
+
+Above example is a description for block storage, but for UBI storage
+device, it can be described in FDT as shown in below:
+
+Example for ubi::
+
+	fs_loader1: fs-loader {
+		bootph-all;
+		compatible = "u-boot,fs-loader";
+		mtdpart = "UBI",
+		ubivol = "ubi0";
+	};
+
+Then, firmware-loader property can be added with any device node, which
+driver would use the firmware loader for loading.
+
+The value of the firmware-loader property should be set with phandle
+of the fs-loader node. For example::
+
+	firmware-loader = <&fs_loader0>;
+
+If there are majority of devices using the same fs-loader node, then
+firmware-loader property can be added under /chosen node instead of
+adding to each of device node.
+
+For example::
+
+	/{
+		chosen {
+			firmware-loader = <&fs_loader0>;
+		};
+	};
+
+In each respective driver of devices using firmware loader, the firmware
+loaded instance	should be created by DT phandle.
+
+For example of getting DT phandle from /chosen and creating instance:
+
+.. code-block:: c
+
+	chosen_node = ofnode_path("/chosen");
+	if (!ofnode_valid(chosen_node)) {
+		debug("/chosen node was not found.\n");
+		return -ENOENT;
+	}
+
+	phandle_p = ofnode_get_property(chosen_node, "firmware-loader", &size);
+	if (!phandle_p) {
+		debug("firmware-loader property was not found.\n");
+		return -ENOENT;
+	}
+
+	phandle = fdt32_to_cpu(*phandle_p);
+	ret = uclass_get_device_by_phandle_id(UCLASS_FS_FIRMWARE_LOADER,
+					     phandle, &dev);
+	if (ret)
+		return ret;
+
+Firmware loader driver is also designed to support U-Boot environment
+variables, so all these data from FDT can be overwritten
+through the U-Boot environment variable during run time.
+
+For examples:
+
+storage_interface:
+  Storage interface, it can be "mmc", "usb", "sata" or "ubi".
+fw_dev_part:
+  Block device number and its partition, it can be "0:1".
+fw_ubi_mtdpart:
+  UBI device mtd partition, it can be "UBI".
+fw_ubi_volume:
+  UBI volume, it can be "ubi0".
+
+When above environment variables are set, environment values would be
+used instead of data from FDT.
+The benefit of this design allows user to change storage attribute data
+at run time through U-Boot console and saving the setting as default
+environment values in the storage for the next power cycle, so no
+compilation is required for both driver and FDT.
+
+File system firmware Loader API
+-------------------------------
+
+.. code-block:: c
+
+	int request_firmware_into_buf(struct udevice *dev,
+				      const char *name,
+				      void *buf, size_t size, u32 offset)
+
+Load firmware into a previously allocated buffer
+
+Parameters:
+
+* struct udevice \*dev: An instance of a driver
+* const char \*name: name of firmware file
+* void \*buf: address of buffer to load firmware into
+* size_t size: size of buffer
+* u32 offset: offset of a file for start reading into buffer
+
+Returns:
+	size of total read
+	-ve when error
+
+Description:
+	The firmware is loaded directly into the buffer pointed to by buf
+
+Example of calling request_firmware_into_buf API after creating firmware loader
+instance:
+
+.. code-block:: c
+
+	ret = uclass_get_device_by_phandle_id(UCLASS_FS_FIRMWARE_LOADER,
+					     phandle, &dev);
+	if (ret)
+		return ret;
+
+	request_firmware_into_buf(dev, filename, buffer_location, buffer_size,
+				 offset_ofreading);
diff --git a/doc/develop/driver-model/i2c-howto.rst b/doc/develop/driver-model/i2c-howto.rst
new file mode 100644
index 00000000000..27e7440cd46
--- /dev/null
+++ b/doc/develop/driver-model/i2c-howto.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+How to port an I2C driver to driver model
+=========================================
+
+Over half of the I2C drivers have been converted as at November 2016. These
+ones remain:
+
+   * adi_i2c
+   * davinci_i2c
+   * fti2c010
+   * ihs_i2c
+   * kona_i2c
+   * lpc32xx_i2c
+   * pca9564_i2c
+   * ppc4xx_i2c
+   * rcar_i2c
+   * sh_i2c
+   * soft_i2c
+   * zynq_i2c
+
+The deadline for this work is the end of June 2017. If no one steps
+forward to convert these, at some point there may come a patch to remove them!
+
+Here is a suggested approach for converting your I2C driver over to driver
+model. Please feel free to update this file with your ideas and suggestions.
+
+- #ifdef out all your own I2C driver code (#if !CONFIG_IS_ENABLED(DM_I2C))
+- Define CONFIG_DM_I2C for your board, vendor or architecture
+- If the board does not already use driver model, you need CONFIG_DM also
+- Your board should then build, but will not work fully since there will be
+  no I2C driver
+- Add the U_BOOT_DRIVER piece at the end (e.g. copy tegra_i2c.c for example)
+- Add a private struct for the driver data - avoid using static variables
+- Implement each of the driver methods, perhaps by calling your old methods
+- You may need to adjust the function parameters so that the old and new
+  implementations can share most of the existing code
+- If you convert all existing users of the driver, remove the pre-driver-model
+  code
+
+In terms of patches a conversion series typically has these patches:
+- clean up / prepare the driver for conversion
+- add driver model code
+- convert at least one existing board to use driver model serial
+- (if no boards remain that don't use driver model) remove the old code
+
+This may be a good time to move your board to use device tree also. Mostly
+this involves these steps:
+
+- define CONFIG_OF_CONTROL and CONFIG_OF_SEPARATE
+- add your device tree files to arch/<arch>/dts
+- update the Makefile there
+- Add stdout-path to your /chosen device tree node if it is not already there
+- build and get u-boot-dtb.bin so you can test it
+- Your drivers can now use device tree
+- For device tree in SPL, define CONFIG_SPL_OF_CONTROL
diff --git a/doc/develop/driver-model/index.rst b/doc/develop/driver-model/index.rst
new file mode 100644
index 00000000000..8e12bbd9366
--- /dev/null
+++ b/doc/develop/driver-model/index.rst
@@ -0,0 +1,32 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Driver Model
+============
+
+The following holds information on the U-Boot device driver framework:
+driver-model, including the design details of itself and several driver
+subsystems
+
+.. toctree::
+   :maxdepth: 2
+
+   bind
+   debugging
+   design
+   ethernet
+   fdt-fixup
+   fs_firmware_loader
+   i2c-howto
+   livetree
+   migration
+   nvme
+   nvmxip
+   of-plat
+   pci-info
+   pmic-framework
+   remoteproc-framework
+   serial-howto
+   soc-framework
+   spi-howto
+   usb-info
+   virtio
diff --git a/doc/develop/driver-model/livetree.rst b/doc/develop/driver-model/livetree.rst
new file mode 100644
index 00000000000..20055d559a6
--- /dev/null
+++ b/doc/develop/driver-model/livetree.rst
@@ -0,0 +1,329 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Live Device Tree
+================
+
+
+Introduction
+------------
+
+Traditionally U-Boot has used a 'flat' device tree. This means that it
+reads directly from the device tree binary structure. It is called a flat
+device tree because nodes are listed one after the other, with the
+hierarchy detected by tags in the format.
+
+This document describes U-Boot's support for a 'live' device tree, meaning
+that the tree is loaded into a hierarchical data structure within U-Boot.
+
+
+Motivation
+----------
+
+The flat device tree has several advantages:
+
+- it is the format produced by the device tree compiler, so no translation
+  is needed
+
+- it is fairly compact (e.g. there is no need for pointers)
+
+- it is accessed by the libfdt library, which is well tested and stable
+
+
+However the flat device tree does have some limitations. Adding new
+properties can involve copying large amounts of data around to make room.
+The overall tree has a fixed maximum size so sometimes the tree must be
+rebuilt in a new location to create more space. Even if not adding new
+properties or nodes, scanning the tree can be slow. For example, finding
+the parent of a node is a slow process. Reading from nodes involves a
+small amount parsing which takes a little time.
+
+Driver model scans the entire device tree sequentially on start-up which
+avoids the worst of the flat tree's limitations. But if the tree is to be
+modified at run-time, a live tree is much faster. Even if no modification
+is necessary, parsing the tree once and using a live tree from then on
+seems to save a little time.
+
+
+Implementation
+--------------
+
+In U-Boot a live device tree ('livetree') is currently supported only
+after relocation. Therefore we need a mechanism to specify a device
+tree node regardless of whether it is in the flat tree or livetree.
+
+The 'ofnode' type provides this. An ofnode can point to either a flat tree
+node (when the live tree node is not yet set up) or a livetree node. The
+caller of an ofnode function does not need to worry about these details.
+
+The main users of the information in a device tree are drivers. These have
+a 'struct udevice \*' which is attached to a device tree node. Therefore it
+makes sense to be able to read device tree  properties using the
+'struct udevice \*', rather than having to obtain the ofnode first.
+
+The 'dev_read\_...()' interface provides this. It allows properties to be
+easily read from the device tree using only a device pointer. Under the
+hood it uses ofnode so it works with both flat and live device trees.
+
+
+Enabling livetree
+-----------------
+
+CONFIG_OF_LIVE enables livetree. When this option is enabled, the flat
+tree will be used in SPL and before relocation in U-Boot proper. Just
+before relocation a livetree is built, and this is used for U-Boot proper
+after relocation.
+
+Most checks for livetree use CONFIG_IS_ENABLED(OF_LIVE). This means that
+for SPL, the CONFIG_SPL_OF_LIVE option is checked. At present this does
+not exist, since SPL does not support livetree.
+
+
+Porting drivers
+---------------
+
+Many existing drivers use the fdtdec interface to read device tree
+properties. This only works with a flat device tree. The drivers should be
+converted to use the dev_read_() interface.
+
+For example, the old code may be like this:
+
+.. code-block:: c
+
+    struct udevice *bus;
+    const void *blob = gd->fdt_blob;
+    int node = dev_of_offset(bus);
+
+    i2c_bus->regs = (struct i2c_ctlr *)devfdt_get_addr(dev);
+    plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", 500000);
+
+The new code is:
+
+.. code-block:: c
+
+    struct udevice *bus;
+
+    i2c_bus->regs = dev_read_addr_ptr(dev);
+    plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", 500000);
+
+The dev_read\_...() interface is more convenient and works with both the
+flat and live device trees. See include/dm/read.h for a list of functions.
+
+Where properties must be read from sub-nodes or other nodes, you must fall
+back to using ofnode. For example, for old code like this:
+
+.. code-block:: c
+
+    const void *blob = gd->fdt_blob;
+    int subnode;
+
+    fdt_for_each_subnode(subnode, blob, dev_of_offset(dev)) {
+        freq = fdtdec_get_int(blob, node, "spi-max-frequency", 500000);
+        ...
+    }
+
+you should use:
+
+.. code-block:: c
+
+    ofnode subnode;
+
+    ofnode_for_each_subnode(subnode, dev_ofnode(dev)) {
+        freq = ofnode_read_u32(node, "spi-max-frequency", 500000);
+        ...
+    }
+
+
+Useful ofnode functions
+-----------------------
+
+The internal data structures of the livetree are defined in include/dm/of.h :
+
+   :struct device_node: holds information about a device tree node
+   :struct property: holds information about a property within a node
+
+Nodes have pointers to their first property, their parent, their first child
+and their sibling. This allows nodes to be linked together in a hierarchical
+tree.
+
+Properties have pointers to the next property. This allows all properties of
+a node to be linked together in a chain.
+
+It should not be necessary to use these data structures in normal code. In
+particular, you should refrain from using functions which access the livetree
+directly, such as of_read_u32(). Use ofnode functions instead, to allow your
+code to work with a flat tree also.
+
+Some conversion functions are used internally. Generally these are not needed
+for driver code. Note that they will not work if called in the wrong context.
+For example it is invalid to call ofnode_to_no() when a flat tree is being
+used. Similarly it is not possible to call ofnode_to_offset() on a livetree
+node.
+
+ofnode_to_np():
+   converts ofnode to struct device_node *
+ofnode_to_offset():
+   converts ofnode to offset
+
+no_to_ofnode():
+   converts node pointer to ofnode
+offset_to_ofnode():
+   converts offset to ofnode
+
+
+Other useful functions:
+
+of_live_active():
+   returns true if livetree is in use, false if flat tree
+ofnode_valid():
+   return true if a given node is valid
+ofnode_is_np():
+   returns true if a given node is a livetree node
+ofnode_equal():
+   compares two ofnodes
+ofnode_null():
+   returns a null ofnode (for which ofnode_valid() returns false)
+
+
+Phandles
+--------
+
+There is full phandle support for live tree. All functions make use of
+struct ofnode_phandle_args, which has an ofnode within it. This supports both
+livetree and flat tree transparently. See for example
+ofnode_parse_phandle_with_args().
+
+
+Reading addresses
+-----------------
+
+You should use dev_read_addr() and friends to read addresses from device-tree
+nodes.
+
+
+fdtdec
+------
+
+The existing fdtdec interface will eventually be retired. Please try to avoid
+using it in new code.
+
+
+Modifying the livetree
+----------------------
+
+This is supported in a limited way, with ofnode_write_prop() and related
+functions.
+
+The unflattening algorithm results in a single block of memory being
+allocated for the whole tree. When writing new properties, these are
+allocated new memory outside that block. When the block is freed, the
+allocated properties remain. This can result in a memory leak.
+
+The solution to this leak would be to add a flag for properties (and nodes when
+support is provided for adding those) that indicates that they should be
+freed. Then the tree can be scanned for these 'separately allocated' nodes and
+properties before freeing the memory block.
+
+The ofnode_write\_...() functions also support writing to the flat tree. Care
+should be taken however, since this can change the position of node names and
+properties in the flat tree, thus affecting the live tree. Generally this does
+not matter, since when we fire up the live tree we don't ever use the flat tree
+again. But in the case of tests, this can cause a problem.
+
+The sandbox tests typically run with OF_LIVE enabled but with the actual live
+tree either present or absent. This is to make sure that the flat tree functions
+work correctly even with OF_LIVE is enabled. But if a test modifies the flat
+device tree, then the live tree can become invalid. Any live tree tests that run
+after that point will use a corrupted tree, e.g. with an incorrect property name
+or worse. To deal with this we take a copy of the device tree and restore it
+after any test that modifies it. Note that this copy is not made on other
+boards, only sandbox.
+
+
+Multiple livetrees
+------------------
+
+The livetree implementation was originally designed for use with the control
+FDT. This means that the FDT fix-ups (ft_board_setup() and the like, must use
+a flat tree.
+
+It would be helpful to use livetree for fixups, since adding a lot of nodes and
+properties would involve less memory copying and be more efficient. As a step
+towards this, an `oftree` type has been introduced. It is normally set to
+oftree_default() but can be set to other values using oftree_from_fdt().
+So long as OF_LIVE is disabled, it is possible to do fixups using the ofnode
+interface. The OF_LIVE support required addition of the flattening step at the
+end.
+
+See dm_test_ofnode_root() for some examples. The oftree_from_fdt() function
+causes a flat device tree to be 'registered' such that it can be used by the
+ofnode interface.
+
+
+Internal implementation
+-----------------------
+
+The dev_read\_...() functions have two implementations. When
+CONFIG_DM_DEV_READ_INLINE is enabled, these functions simply call the ofnode
+functions directly. This is useful when livetree is not enabled. The ofnode
+functions call ofnode_is_np(node) which will always return false if livetree
+is disabled, just falling back to flat tree code.
+
+This optimisation means that without livetree enabled, the dev_read\_...() and
+ofnode interfaces do not noticeably add to code size.
+
+The CONFIG_DM_DEV_READ_INLINE option defaults to enabled when livetree is
+disabled.
+
+Most livetree code comes directly from Linux and is modified as little as
+possible. This is deliberate since this code is fairly stable and does what
+we want. Some features (such as get/put) are not supported. Internal macros
+take care of removing these features silently.
+
+Within the of_access.c file there are pointers to the alias node, the chosen
+node and the stdout-path alias.
+
+
+Errors
+------
+
+With a flat device tree, libfdt errors are returned (e.g. -FDT_ERR_NOTFOUND).
+For livetree normal 'errno' errors are returned (e.g. -ENOTFOUND). At present
+the ofnode and dev_read\_...() functions return either one or other type of
+error. This is clearly not desirable. Once tests are added for all the
+functions this can be tidied up.
+
+
+Adding new access functions
+---------------------------
+
+Adding a new function for device-tree access involves the following steps:
+
+   - Add two dev_read() functions:
+      - inline version in the read.h header file, which calls an ofnode function
+      - standard version in the read.c file (or perhaps another file), which
+        also calls an ofnode function
+
+        The implementations of these functions can be the same. The purpose
+        of the inline version is purely to reduce code size impact.
+
+   - Add an ofnode function. This should call ofnode_is_np() to work out
+     whether a livetree or flat tree is used. For the livetree it should
+     call an of\_...() function. For the flat tree it should call an
+     fdt\_...() function. The livetree version will be optimised out at
+     compile time if livetree is not enabled.
+
+   - Add an of\_...() function for the livetree implementation. If a similar
+     function is available in Linux, the implementation should be taken
+     from there and modified as little as possible (generally not at all).
+
+
+Future work
+-----------
+
+Live tree support was introduced in U-Boot 2017.07. Some possible enhancements
+are:
+
+- support for livetree in SPL and before relocation (if desired)
+- freeing leaked memory caused by writing new nodes / property values to the
+  livetree (ofnode_write_prop())
diff --git a/doc/develop/driver-model/migration.rst b/doc/develop/driver-model/migration.rst
new file mode 100644
index 00000000000..b40a6af9d11
--- /dev/null
+++ b/doc/develop/driver-model/migration.rst
@@ -0,0 +1,120 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Migration Schedule
+==================
+
+U-Boot has been migrating to a new driver model since its introduction in
+2014. This file describes the schedule for deprecation of pre-driver-model
+features.
+
+CONFIG_DM
+---------
+
+* Status: In progress
+* Deadline: 2020.01
+
+Starting with the 2020.01 release CONFIG_DM will be enabled for all boards.
+This does not concern CONFIG_DM_SPL and CONFIG_DM_TPL. The conversion date for
+these configuration items still needs to be defined.
+
+CONFIG_DM_MMC
+-------------
+
+* Status: In progress
+* Deadline: 2019.04
+
+The subsystem itself has been converted and maintainers should submit patches
+switching over to using CONFIG_DM_MMC and other base driver model options in
+time for inclusion in the 2019.04 rerelease.
+
+CONFIG_DM_USB
+-------------
+
+* Status: In progress
+* Deadline: 2019.07
+
+The subsystem itself has been converted along with many of the host controller
+and maintainers should submit patches switching over to using CONFIG_DM_USB and
+other base driver model options in time for inclusion in the 2019.07 rerelease.
+
+CONFIG_SATA
+-----------
+
+* Status: In progress
+* Deadline: 2019.07
+
+The subsystem itself has been converted along with many of the host controller
+and maintainers should submit patches switching over to using CONFIG_AHCI and
+other base driver model options in time for inclusion in the 2019.07 rerelease.
+
+CONFIG_BLK
+----------
+
+* Status: In progress
+* Deadline: 2019.07
+
+In concert with maintainers migrating their block device usage to the
+appropriate DM driver, CONFIG_BLK needs to be set as well.  The final deadline
+here coincides with the final deadline for migration of the various block
+subsystems.  At this point we will be able to audit and correct the logic in
+Kconfig around using CONFIG_PARTITIONS and CONFIG_SPL_LEGACY_BLOCK and make
+use of CONFIG_BLK / CONFIG_SPL_BLK as needed.
+
+CONFIG_DM_SPI / CONFIG_DM_SPI_FLASH
+-----------------------------------
+
+Board Maintainers should submit the patches for enabling DM_SPI and DM_SPI_FLASH
+to move the migration with in the deadline.
+
+Partially converted::
+
+	drivers/spi/fsl_espi.c
+	drivers/spi/mxc_spi.c
+	drivers/spi/sh_qspi.c
+
+* Status: In progress
+* Deadline: 2019.07
+
+CONFIG_DM_VIDEO
+---------------
+Deadline: 2019.07
+
+The video subsystem has supported driver model since early 2016. Maintainers
+should submit patches switching over to using CONFIG_VIDEO and other base
+driver model options in time for inclusion in the 2019.07 release.
+
+CONFIG_DM_ETH
+-------------
+Deadline: 2020.07
+
+The network subsystem has supported the driver model since early 2015.
+Maintainers should submit patches switching over to using CONFIG_DM_ETH and
+other base driver model options in time for inclusion in the 2020.07 release.
+
+CONFIG_DM_I2C
+-------------
+Deadline: 2021.10
+
+The I2C subsystem has supported the driver model since early 2015.
+Maintainers should submit patches switching over to using CONFIG_DM_I2C and
+other base driver model options in time for inclusion in the 2021.10 release.
+
+CFG_SYS_TIMER_RATE and CFG_SYS_TIMER_COUNTER
+--------------------------------------------
+Deadline: 2023.01
+
+These are legacy options which have been replaced by driver model.
+Maintainers should submit patches switching over to using CONFIG_TIMER and
+other base driver model options in time for inclusion in the 2022.10 release.
+
+There is only one method to implement, unless you want to support bootstage,
+in which case you need an early timer also. For example drivers, see
+sandbox_timer.c and rockchip_timer.c
+
+CONFIG_DM_SERIAL
+----------------
+Deadline: 2023.04
+
+The serial subsystem has supported the driver model since late 2014.
+Maintainers should submit patches switching over to using CONFIG_DM_SERIAL and
+other base driver model options in time for inclusion in the 2022.10 release.
diff --git a/doc/develop/driver-model/nvme.rst b/doc/develop/driver-model/nvme.rst
new file mode 100644
index 00000000000..75518133121
--- /dev/null
+++ b/doc/develop/driver-model/nvme.rst
@@ -0,0 +1,98 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2017 NXP Semiconductors
+.. Copyright (C) 2017 Bin Meng <bmeng.cn@gmail.com>
+
+NVMe Support
+============
+
+What is NVMe
+------------
+
+NVM Express (NVMe) is a register level interface that allows host software to
+communicate with a non-volatile memory subsystem. This interface is optimized
+for enterprise and client solid state drives, typically attached to the PCI
+express interface. It is a scalable host controller interface designed to
+address the needs of enterprise and client systems that utilize PCI express
+based solid state drives (SSD). The interface provides optimized command
+submission and completion paths. It includes support for parallel operation by
+supporting up to 64K I/O queues with up to 64K commands per I/O queue.
+
+The device is comprised of some number of controllers, where each controller
+is comprised of some number of namespaces, where each namespace is comprised
+of some number of logical blocks. A namespace is a quantity of non-volatile
+memory that is formatted into logical blocks. An NVMe namespace is equivalent
+to a SCSI LUN. Each namespace is operated as an independent "device".
+
+How it works
+------------
+There is an NVMe uclass driver (driver name "nvme"), an NVMe host controller
+driver (driver name "nvme") and an NVMe namespace block driver (driver name
+"nvme_blk"). The host controller driver is supposed to probe the hardware and
+do necessary initialization to put the controller into a ready state at which
+it is able to scan all available namespaces attached to it. Scanning namespace
+is triggered by the NVMe uclass driver and the actual work is done in the NVMe
+namespace block driver.
+
+Status
+------
+It only support basic block read/write functions in the NVMe driver.
+
+Config options
+--------------
+CONFIG_NVME	Enable NVMe device support
+CONFIG_NVME_PCI	Enable PCIe NVMe device support
+CONFIG_CMD_NVME	Enable basic NVMe commands
+
+Usage in U-Boot
+---------------
+To use an NVMe hard disk from U-Boot shell, a 'nvme scan' command needs to
+be executed for all NVMe hard disks attached to the NVMe controller to be
+identified.
+
+To list all of the NVMe hard disks, try:
+
+.. code-block:: none
+
+  => nvme info
+  Device 0: Vendor: 0x8086 Rev: 8DV10131 Prod: CVFT535600LS400BGN
+	    Type: Hard Disk
+	    Capacity: 381554.0 MB = 372.6 GB (781422768 x 512)
+
+and print out detailed information for controller and namespaces via:
+
+.. code-block:: none
+
+  => nvme detail
+
+Raw block read/write to can be done via the 'nvme read/write' commands:
+
+.. code-block:: none
+
+  => nvme read a0000000 0 11000
+
+  => tftp 80000000 /tftpboot/kernel.itb
+  => nvme write 80000000 0 11000
+
+Of course, file system command can be used on the NVMe hard disk as well:
+
+.. code-block:: none
+
+  => fatls nvme 0:1
+	32376967   kernel.itb
+	22929408   100m
+
+	2 file(s), 0 dir(s)
+
+  => fatload nvme 0:1 a0000000 /kernel.itb
+  => bootm a0000000
+
+Testing NVMe with QEMU x86
+--------------------------
+QEMU supports NVMe emulation and we can test NVMe driver with QEMU x86 running
+U-Boot. Please see README.x86 for how to build u-boot.rom image for QEMU x86.
+
+Example command line to call QEMU x86 below with emulated NVMe device:
+
+.. code-block:: bash
+
+  $ ./qemu-system-i386 -drive file=nvme.img,if=none,id=drv0 -device nvme,drive=drv0,serial=QEMUNVME0001 -bios u-boot.rom
diff --git a/doc/develop/driver-model/nvmxip.rst b/doc/develop/driver-model/nvmxip.rst
new file mode 100644
index 00000000000..4a7650c8d2f
--- /dev/null
+++ b/doc/develop/driver-model/nvmxip.rst
@@ -0,0 +1,91 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+NVM XIP Block Storage Emulation Driver
+======================================
+
+Summary
+-------
+
+Non-Volatile Memory devices with addressable memory (e.g: QSPI NOR flash) could
+be used for block storage needs (e.g: parsing a GPT layout in a raw QSPI NOR flash).
+
+The NVMXIP Uclass provides this functionality and can be used for any 64-bit platform.
+
+The NVMXIP Uclass provides the following drivers:
+
+      nvmxip-blk block driver:
+
+        A generic block driver allowing to read from the XIP flash.
+	The driver belongs to UCLASS_BLK.
+	The driver implemented by drivers/mtd/nvmxip/nvmxip.c
+
+      nvmxip Uclass driver:
+
+        When a device is described in the DT and associated with UCLASS_NVMXIP,
+        the Uclass creates a block device and binds it with the nvmxip-blk.
+	The Uclass driver implemented by drivers/mtd/nvmxip/nvmxip-uclass.c
+
+      nvmxip_qspi driver :
+
+        The driver probed with the DT and is the parent of the blk#<id> device.
+        nvmxip_qspi can be reused by other platforms. If the platform
+        has custom settings to apply before using the flash, then the platform
+        can provide its own parent driver belonging to UCLASS_NVMXIP and reuse
+        nvmxip-blk. The custom driver can be implemented like nvmxip_qspi in
+        addition to the platform custom settings.
+	The nvmxip_qspi driver belongs to UCLASS_NVMXIP.
+	The driver implemented by drivers/mtd/nvmxip/nvmxip_qspi.c
+
+	For example, if we have two NVMXIP devices described in the DT
+	The devices hierarchy is as follows:
+
+::
+
+   => dm tree
+
+        Class     Index  Probed  Driver                Name
+    -----------------------------------------------------------
+    ...
+     nvmxip        0  [ + ]   nvmxip_qspi           |-- nvmxip-qspi1@08000000
+     blk           3  [ + ]   nvmxip-blk                    |   `-- nvmxip-qspi1@08000000.blk#1
+     nvmxip        1  [ + ]   nvmxip_qspi           |-- nvmxip-qspi2@08200000
+     blk           4  [ + ]   nvmxip-blk                    |   `-- nvmxip-qspi2@08200000.blk#2
+
+The implementation is generic and can be used by different platforms.
+
+Supported hardware
+------------------
+
+Any plaform supporting readq().
+
+Configuration
+-------------
+
+config NVMXIP
+	  This option allows the emulation of a block storage device
+	  on top of a direct access non volatile memory XIP flash devices.
+	  This support provides the read operation.
+	  This option provides the block storage driver nvmxip-blk which
+	  handles the read operation. This driver is HW agnostic and can support
+	  multiple flash devices at the same time.
+
+config NVMXIP_QSPI
+	  This option allows the emulation of a block storage device on top of a QSPI XIP flash.
+	  Any platform that needs to emulate one or multiple QSPI XIP flash devices can turn this
+	  option on to enable the functionality. NVMXIP config is selected automatically.
+	  Platforms that need to add custom treatments before accessing to the flash, can
+	  write their own driver (same as nvmxip_qspi in addition to the custom settings).
+
+Device Tree nodes
+-----------------
+
+Multiple QSPI XIP flash devices can be used at the same time by describing them through DT
+nodes.
+
+Please refer to the documentation of the DT binding at:
+
+doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
+
+Contributors
+------------
+   * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
diff --git a/doc/develop/driver-model/of-plat.rst b/doc/develop/driver-model/of-plat.rst
new file mode 100644
index 00000000000..01724ba72ce
--- /dev/null
+++ b/doc/develop/driver-model/of-plat.rst
@@ -0,0 +1,1099 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Compiled-in Device Tree / Platform Data
+=======================================
+
+
+Introduction
+------------
+
+Device tree is the standard configuration method in U-Boot. It is used to
+define what devices are in the system and provide configuration information
+to these devices.
+
+The overhead of adding devicetree access to U-Boot is fairly modest,
+approximately 3KB on Thumb 2 (plus the size of the DT itself). This means
+that in most cases it is best to use devicetree for configuration.
+
+However there are some very constrained environments where U-Boot needs to
+work. These include SPL with severe memory limitations. For example, some
+SoCs require a 16KB SPL image which must include a full MMC stack. In this
+case the overhead of devicetree access may be too great.
+
+It is possible to create platform data manually by defining C structures
+for it, and reference that data in a `U_BOOT_DRVINFO()` declaration. This
+bypasses the use of devicetree completely, effectively creating a parallel
+configuration mechanism. But it is an available option for SPL.
+
+As an alternative, the 'of-platdata' feature is provided. This converts the
+devicetree contents into C code which can be compiled into the SPL binary.
+This saves the 3KB of code overhead and perhaps a few hundred more bytes due
+to more efficient storage of the data.
+
+
+How it works
+------------
+
+The feature is enabled by CONFIG OF_PLATDATA. This is only available in
+SPL/TPL and should be tested with:
+
+.. code-block:: c
+
+    #if CONFIG_IS_ENABLED(OF_PLATDATA)
+
+A tool called 'dtoc' converts a devicetree file either into a set of
+struct declarations, one for each compatible node, and a set of
+`U_BOOT_DRVINFO()` declarations along with the actual platform data for each
+device. As an example, consider this MMC node:
+
+.. code-block:: none
+
+    sdmmc: dwmmc@ff0c0000 {
+            compatible = "rockchip,rk3288-dw-mshc";
+            clock-freq-min-max = <400000 150000000>;
+            clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+                     <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+            clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+            fifo-depth = <0x100>;
+            interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+            reg = <0xff0c0000 0x4000>;
+            bus-width = <4>;
+            cap-mmc-highspeed;
+            cap-sd-highspeed;
+            card-detect-delay = <200>;
+            disable-wp;
+            num-slots = <1>;
+            pinctrl-names = "default";
+            pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+                vmmc-supply = <&vcc_sd>;
+                status = "okay";
+                bootph-all;
+        };
+
+
+Some of these properties are dropped by U-Boot under control of the
+CONFIG_OF_SPL_REMOVE_PROPS option. The rest are processed. This will produce
+the following C struct declaration:
+
+.. code-block:: c
+
+    struct dtd_rockchip_rk3288_dw_mshc {
+            fdt32_t         bus_width;
+            bool            cap_mmc_highspeed;
+            bool            cap_sd_highspeed;
+            fdt32_t         card_detect_delay;
+            fdt32_t         clock_freq_min_max[2];
+            struct phandle_1_arg clocks[4];
+            bool            disable_wp;
+            fdt32_t         fifo_depth;
+            fdt32_t         interrupts[3];
+            fdt32_t         num_slots;
+            fdt32_t         reg[2];
+            fdt32_t         vmmc_supply;
+    };
+
+and the following device declarations:
+
+.. code-block:: c
+
+    /* Node /clock-controller@ff760000 index 0 */
+    ...
+
+    /* Node /dwmmc@ff0c0000 index 2 */
+    static struct dtd_rockchip_rk3288_dw_mshc dtv_dwmmc_at_ff0c0000 = {
+            .fifo_depth             = 0x100,
+            .cap_sd_highspeed       = true,
+            .interrupts             = {0x0, 0x20, 0x4},
+            .clock_freq_min_max     = {0x61a80, 0x8f0d180},
+            .vmmc_supply            = 0xb,
+            .num_slots              = 0x1,
+            .clocks                 = {{0, 456},
+                                       {0, 68},
+                                       {0, 114},
+                                       {0, 118}},
+            .cap_mmc_highspeed      = true,
+            .disable_wp             = true,
+            .bus_width              = 0x4,
+            .u_boot_dm_pre_reloc    = true,
+            .reg                    = {0xff0c0000, 0x4000},
+            .card_detect_delay      = 0xc8,
+    };
+
+    U_BOOT_DRVINFO(dwmmc_at_ff0c0000) = {
+            .name           = "rockchip_rk3288_dw_mshc",
+            .plat       = &dtv_dwmmc_at_ff0c0000,
+            .plat_size  = sizeof(dtv_dwmmc_at_ff0c0000),
+            .parent_idx     = -1,
+    };
+
+The device is then instantiated at run-time and the platform data can be
+accessed using:
+
+.. code-block:: c
+
+    struct udevice *dev;
+    struct dtd_rockchip_rk3288_dw_mshc *plat = dev_get_plat(dev);
+
+This avoids the code overhead of converting the devicetree data to
+platform data in the driver. The `of_to_plat()` method should
+therefore do nothing in such a driver.
+
+Note that for the platform data to be matched with a driver, the 'name'
+property of the `U_BOOT_DRVINFO()` declaration has to match a driver declared
+via `U_BOOT_DRIVER()`. This effectively means that a `U_BOOT_DRIVER()` with a
+'name' corresponding to the devicetree 'compatible' string (after converting
+it to a valid name for C) is needed, so a dedicated driver is required for
+each 'compatible' string.
+
+In order to make this a bit more flexible, the `DM_DRIVER_ALIAS()` macro can be
+used to declare an alias for a driver name, typically a 'compatible' string.
+This macro produces no code, but is used by dtoc tool. It must be located in the
+same file as its associated driver, ideally just after it.
+
+The parent_idx is the index of the parent `driver_info` structure within its
+linker list (instantiated by the `U_BOOT_DRVINFO()` macro). This is used to
+support `dev_get_parent()`.
+
+During the build process dtoc parses both `U_BOOT_DRIVER()` and
+`DM_DRIVER_ALIAS()` to build a list of valid driver names and driver aliases.
+If the 'compatible' string used for a device does not not match a valid driver
+name, it will be checked against the list of driver aliases in order to get the
+right driver name to use. If in this step there is no match found a warning is
+issued to avoid run-time failures.
+
+Where a node has multiple compatible strings, dtoc generates a `#define` to
+make them equivalent, e.g.:
+
+.. code-block:: c
+
+    #define dtd_rockchip_rk3299_dw_mshc dtd_rockchip_rk3288_dw_mshc
+
+
+Converting of-platdata to a useful form
+---------------------------------------
+
+Of course it would be possible to use the of-platdata directly in your driver
+whenever configuration information is required. However this means that the
+driver will not be able to support devicetree, since the of-platdata
+structure is not available when devicetree is used. It would make no sense
+to use this structure if devicetree were available, since the structure has
+all the limitations metioned in caveats below.
+
+Therefore it is recommended that the of-platdata structure should be used
+only in the `probe()` method of your driver. It cannot be used in the
+`of_to_plat()` method since this is not called when platform data is
+already present.
+
+
+How to structure your driver
+----------------------------
+
+Drivers should always support devicetree as an option. The of-platdata
+feature is intended as a add-on to existing drivers.
+
+Your driver should convert the plat struct in its `probe()` method. The
+existing devicetree decoding logic should be kept in the
+`of_to_plat()` method and wrapped with `#if`.
+
+For example:
+
+.. code-block:: c
+
+    #include <dt-structs.h>
+
+    struct mmc_plat {
+    #if CONFIG_IS_ENABLED(OF_PLATDATA)
+            /* Put this first since driver model will copy the data here */
+            struct dtd_mmc dtplat;
+    #endif
+            /*
+             * Other fields can go here, to be filled in by decoding from
+             * the devicetree (or the C structures when of-platdata is used).
+             */
+            int fifo_depth;
+    };
+
+    static int mmc_of_to_plat(struct udevice *dev)
+    {
+        if (CONFIG_IS_ENABLED(OF_REAL)) {
+            /* Decode the devicetree data */
+            struct mmc_plat *plat = dev_get_plat(dev);
+            const void *blob = gd->fdt_blob;
+            int node = dev_of_offset(dev);
+
+            plat->fifo_depth = fdtdec_get_int(blob, node, "fifo-depth", 0);
+        }
+
+        return 0;
+    }
+
+    static int mmc_probe(struct udevice *dev)
+    {
+            struct mmc_plat *plat = dev_get_plat(dev);
+
+    #if CONFIG_IS_ENABLED(OF_PLATDATA)
+            /* Decode the of-platdata from the C structures */
+            struct dtd_mmc *dtplat = &plat->dtplat;
+
+            plat->fifo_depth = dtplat->fifo_depth;
+    #endif
+            /* Set up the device from the plat data */
+            writel(plat->fifo_depth, ...)
+    }
+
+    static const struct udevice_id mmc_ids[] = {
+            { .compatible = "vendor,mmc" },
+            { }
+    };
+
+    U_BOOT_DRIVER(mmc_drv) = {
+            .name           = "mmc_drv",
+            .id             = UCLASS_MMC,
+            .of_match       = mmc_ids,
+            .of_to_plat = mmc_of_to_plat,
+            .probe          = mmc_probe,
+            .priv_auto = sizeof(struct mmc_priv),
+            .plat_auto = sizeof(struct mmc_plat),
+    };
+
+    DM_DRIVER_ALIAS(mmc_drv, vendor_mmc) /* matches compatible string */
+
+Note that `struct mmc_plat` is defined in the C file, not in a header. This
+is to avoid needing to include dt-structs.h in a header file. The idea is to
+keep the use of each of-platdata struct to the smallest possible code area.
+There is just one driver C file for each struct, that can convert from the
+of-platdata struct to the standard one used by the driver.
+
+In the case where SPL_OF_PLATDATA is enabled, `plat_auto` is
+still used to allocate space for the platform data. This is different from
+the normal behaviour and is triggered by the use of of-platdata (strictly
+speaking it is a non-zero `plat_size` which triggers this).
+
+The of-platdata struct contents is copied from the C structure data to the
+start of the newly allocated area. In the case where devicetree is used,
+the platform data is allocated, and starts zeroed. In this case the
+`of_to_plat()` method should still set up the platform data (and the
+of-platdata struct will not be present).
+
+SPL must use either of-platdata or devicetree. Drivers cannot use both at
+the same time, but they must support devicetree. Supporting of-platdata is
+optional.
+
+The devicetree becomes inaccessible when CONFIG_SPL_OF_PLATDATA is enabled,
+since the devicetree access code is not compiled in. A corollary is that
+a board can only move to using of-platdata if all the drivers it uses support
+it. There would be little point in having some drivers require the device
+tree data, since then libfdt would still be needed for those drivers and
+there would be no code-size benefit.
+
+
+Build-time instantiation
+------------------------
+
+Even with of-platdata there is a fair amount of code required in driver model.
+It is possible to have U-Boot handle the instantiation of devices at build-time,
+so avoiding the need for the `device_bind()` code and some parts of
+`device_probe()`.
+
+The feature is enabled by CONFIG_OF_PLATDATA_INST.
+
+Here is an example device, as generated by dtoc::
+
+   /*
+    * Node /serial index 6
+    * driver sandbox_serial parent root_driver
+   */
+
+   #include <asm/serial.h>
+   struct sandbox_serial_plat __attribute__ ((section (".priv_data")))
+      _sandbox_serial_plat_serial = {
+      .dtplat = {
+         .sandbox_text_colour   = "cyan",
+      },
+   };
+   #include <asm/serial.h>
+   u8 _sandbox_serial_priv_serial[sizeof(struct sandbox_serial_priv)]
+      __attribute__ ((section (".priv_data")));
+   #include <serial.h>
+   u8 _sandbox_serial_uc_priv_serial[sizeof(struct serial_dev_priv)]
+      __attribute__ ((section (".priv_data")));
+
+   DM_DEVICE_INST(serial) = {
+      .driver     = DM_DRIVER_REF(sandbox_serial),
+      .name       = "sandbox_serial",
+      .plat_      = &_sandbox_serial_plat_serial,
+      .priv_      = _sandbox_serial_priv_serial,
+      .uclass     = DM_UCLASS_REF(serial),
+      .uclass_priv_ = _sandbox_serial_uc_priv_serial,
+      .uclass_node   = {
+         .prev = &DM_UCLASS_REF(serial)->dev_head,
+         .next = &DM_UCLASS_REF(serial)->dev_head,
+      },
+      .child_head   = {
+         .prev = &DM_DEVICE_REF(serial)->child_head,
+         .next = &DM_DEVICE_REF(serial)->child_head,
+      },
+      .sibling_node   = {
+         .prev = &DM_DEVICE_REF(i2c_at_0)->sibling_node,
+         .next = &DM_DEVICE_REF(spl_test)->sibling_node,
+      },
+      .seq_ = 0,
+   };
+
+Here is part of the driver, for reference::
+
+   static const struct udevice_id sandbox_serial_ids[] = {
+      { .compatible = "sandbox,serial" },
+      { }
+   };
+
+   U_BOOT_DRIVER(sandbox_serial) = {
+      .name   = "sandbox_serial",
+      .id   = UCLASS_SERIAL,
+      .of_match    = sandbox_serial_ids,
+      .of_to_plat  = sandbox_serial_of_to_plat,
+      .plat_auto   = sizeof(struct sandbox_serial_plat),
+      .priv_auto   = sizeof(struct sandbox_serial_priv),
+      .probe = sandbox_serial_probe,
+      .remove = sandbox_serial_remove,
+      .ops   = &sandbox_serial_ops,
+      .flags = DM_FLAG_PRE_RELOC,
+   };
+
+
+The `DM_DEVICE_INST()` macro declares a struct udevice so you can see that the
+members are from that struct. The private data is declared immediately above,
+as `_sandbox_serial_priv_serial`, so there is no need for run-time memory
+allocation. The #include lines are generated as well, since dtoc searches the
+U-Boot source code for the definition of `struct sandbox_serial_priv` and adds
+the relevant header so that the code will compile without errors.
+
+The `plat_` member is set to the dtv data which is declared immediately above
+the device. This is similar to how it would look without of-platdata-inst, but
+node that the `dtplat` member inside is part of the wider
+`_sandbox_serial_plat_serial` struct. This is because the driver declares its
+own platform data, and the part generated by dtoc can only be a portion of it.
+The `dtplat` part is always first in the struct. If the device has no
+`.plat_auto` field, then a simple dtv struct can be used as with this example::
+
+   static struct dtd_sandbox_clk dtv_clk_sbox = {
+      .assigned_clock_rates   = 0x141,
+      .assigned_clocks   = {0x7, 0x3},
+   };
+
+   #include <asm/clk.h>
+   u8 _sandbox_clk_priv_clk_sbox[sizeof(struct sandbox_clk_priv)]
+      __attribute__ ((section (".priv_data")));
+
+   DM_DEVICE_INST(clk_sbox) = {
+      .driver    = DM_DRIVER_REF(sandbox_clk),
+      .name      = "sandbox_clk",
+      .plat_     = &dtv_clk_sbox,
+
+Here is part of the driver, for reference::
+
+   static const struct udevice_id sandbox_clk_ids[] = {
+      { .compatible = "sandbox,clk" },
+      { }
+   };
+
+   U_BOOT_DRIVER(sandbox_clk) = {
+      .name       = "sandbox_clk",
+      .id         = UCLASS_CLK,
+      .of_match   = sandbox_clk_ids,
+      .ops        = &sandbox_clk_ops,
+      .probe      = sandbox_clk_probe,
+      .priv_auto  = sizeof(struct sandbox_clk_priv),
+   };
+
+
+You can see that `dtv_clk_sbox` just has the devicetree contents and there is
+no need for the `dtplat` separation, since the driver has no platform data of
+its own, besides that provided by the devicetree (i.e. no `.plat_auto` field).
+
+The doubly linked lists are handled by explicitly declaring the value of each
+node, as you can see with the `.prev` and `.next` values in the example above.
+Since dtoc knows the order of devices it can link them into the appropriate
+lists correctly.
+
+One of the features of driver model is the ability for a uclass to have a
+small amount of private data for each device in that uclass. This is used to
+provide a generic data structure that the uclass can use for all devices, thus
+allowing generic features to be implemented in common code. An example is I2C,
+which stores the bus speed there.
+
+Similarly, parent devices can have data associated with each of their children.
+This is used to provide information common to all children of a particular bus.
+For an I2C bus, this is used to store the I2C address of each child on the bus.
+
+This is all handled automatically by dtoc::
+
+   #include <asm/i2c.h>
+   u8 _sandbox_i2c_priv_i2c_at_0[sizeof(struct sandbox_i2c_priv)]
+      __attribute__ ((section (".priv_data")));
+   #include <i2c.h>
+   u8 _sandbox_i2c_uc_priv_i2c_at_0[sizeof(struct dm_i2c_bus)]
+      __attribute__ ((section (".priv_data")));
+
+   DM_DEVICE_INST(i2c_at_0) = {
+      .driver      = DM_DRIVER_REF(sandbox_i2c),
+      .name      = "sandbox_i2c",
+      .plat_   = &dtv_i2c_at_0,
+      .priv_      = _sandbox_i2c_priv_i2c_at_0,
+      .uclass   = DM_UCLASS_REF(i2c),
+      .uclass_priv_ = _sandbox_i2c_uc_priv_i2c_at_0,
+     ...
+
+Part of driver, for reference::
+
+   static const struct udevice_id sandbox_i2c_ids[] = {
+      { .compatible = "sandbox,i2c" },
+      { }
+   };
+
+   U_BOOT_DRIVER(sandbox_i2c) = {
+      .name   = "sandbox_i2c",
+      .id   = UCLASS_I2C,
+      .of_match = sandbox_i2c_ids,
+      .ops   = &sandbox_i2c_ops,
+      .priv_auto   = sizeof(struct sandbox_i2c_priv),
+   };
+
+Part of I2C uclass, for reference::
+
+   UCLASS_DRIVER(i2c) = {
+      .id         = UCLASS_I2C,
+      .name       = "i2c",
+      .flags      = DM_UC_FLAG_SEQ_ALIAS,
+      .post_bind  = i2c_post_bind,
+      .pre_probe  = i2c_pre_probe,
+      .post_probe = i2c_post_probe,
+      .per_device_auto   = sizeof(struct dm_i2c_bus),
+      .per_child_plat_auto   = sizeof(struct dm_i2c_chip),
+      .child_post_bind = i2c_child_post_bind,
+   };
+
+Here, `_sandbox_i2c_uc_priv_i2c_at_0` is required by the uclass but is declared
+in the device, as required by driver model. The required header file is included
+so that the code will compile without errors. A similar mechanism is used for
+child devices, but is not shown by this example.
+
+It would not be that useful to avoid binding devices but still need to allocate
+uclasses at runtime. So dtoc generates uclass instances as well::
+
+   struct list_head uclass_head = {
+      .prev = &DM_UCLASS_REF(serial)->sibling_node,
+      .next = &DM_UCLASS_REF(clk)->sibling_node,
+   };
+
+   DM_UCLASS_INST(clk) = {
+      .uc_drv      = DM_UCLASS_DRIVER_REF(clk),
+      .sibling_node   = {
+         .prev = &uclass_head,
+         .next = &DM_UCLASS_REF(i2c)->sibling_node,
+      },
+      .dev_head   = {
+         .prev = &DM_DEVICE_REF(clk_sbox)->uclass_node,
+         .next = &DM_DEVICE_REF(clk_fixed)->uclass_node,
+      },
+   };
+
+At the top is the list head. Driver model uses this on start-up, instead of
+creating its own.
+
+Below that are a set of `DM_UCLASS_INST()` macros, each declaring a
+`struct uclass`. The doubly linked lists work as for devices.
+
+All private data is placed into a `.priv_data` section so that it is contiguous
+in the resulting output binary.
+
+
+Indexes
+-------
+
+U-Boot stores drivers, devices and many other things in linker_list structures.
+These are sorted by name, so dtoc knows the order that they will appear when
+the linker runs. Each driver_info / udevice is referenced by its index in the
+linker_list array, called 'idx' in the code.
+
+When CONFIG_OF_PLATDATA_INST is enabled, idx is the udevice index, otherwise it
+is the driver_info index. In either case, indexes are used to reference devices
+using device_get_by_ofplat_idx(). This allows phandles to work as expected.
+
+
+Phases
+------
+
+U-Boot operates in several phases, typically TPL, SPL and U-Boot proper.
+The latter does not use dtoc.
+
+In some rare cases different drivers are used for two phases. For example,
+in TPL it may not be necessary to use the full PCI subsystem, so a simple
+driver can be used instead.
+
+This works in the build system simply by compiling in one driver or the
+other (e.g. PCI driver + uclass for SPL; simple_bus for TPL). But dtoc has
+no way of knowing which code is compiled in for which phase, since it does
+not inspect Makefiles or dependency graphs.
+
+So to make this work for dtoc, we need to be able to explicitly mark
+drivers with their phase. This is done by adding a macro to the driver::
+
+   /* code in tpl.c only compiled into TPL */
+   U_BOOT_DRIVER(pci_x86) = {
+      .name   = "pci_x86",
+      .id   = UCLASS_SIMPLE_BUS,
+      .of_match = of_match_ptr(tpl_fake_pci_ids),
+      DM_PHASE(tpl)
+   };
+
+
+   /* code in pci_x86.c compiled into SPL and U-Boot proper */
+   U_BOOT_DRIVER(pci_x86) = {
+      .name   = "pci_x86",
+      .id   = UCLASS_PCI,
+      .of_match = pci_x86_ids,
+      .ops   = &pci_x86_ops,
+   };
+
+
+Notice that the second driver has the same name but no DM_PHASE(), so it will be
+used for SPL and U-Boot.
+
+Note also that this only affects the code generated by dtoc. You still need to
+make sure that only the required driver is build into each phase.
+
+
+Header files
+------------
+
+With OF_PLATDATA_INST, dtoc must include the correct header file in the
+generated code for any structs that are used, so that the code will compile.
+For example, if `struct ns16550_plat` is used, the code must include the
+`ns16550.h` header file.
+
+Typically dtoc can detect the header file needed for a driver by looking
+for the structs that it uses. For example, if a driver as a `.priv_auto`
+that uses `struct ns16550_plat`, then dtoc can search header files for the
+definition of that struct and use the file.
+
+In some cases, enums are used in drivers, typically with the `.data` field
+of `struct udevice_id`. Since dtoc does not support searching for these,
+you must use the `DM_HDR()` macro to tell dtoc which header to use. This works
+as a macro included in the driver definition::
+
+   static const struct udevice_id apl_syscon_ids[] = {
+      { .compatible = "intel,apl-punit", .data = X86_SYSCON_PUNIT },
+      { }
+   };
+
+   U_BOOT_DRIVER(intel_apl_punit) = {
+      .name       = "intel_apl_punit",
+      .id         = UCLASS_SYSCON,
+      .of_match   = apl_syscon_ids,
+      .probe      = apl_punit_probe,
+      DM_HEADER(<asm/cpu.h>)    /* for X86_SYSCON_PUNIT */
+   };
+
+
+
+Problems
+--------
+
+This section shows some common problems and how to fix them.
+
+Driver not found
+~~~~~~~~~~~~~~~~
+
+In some cases you will you see something like this::
+
+   WARNING: the driver rockchip_rk3188_grf was not found in the driver list
+
+The driver list is a list of drivers, each with a name. The name is in the
+U_BOOT_DRIVER() declaration, repeated twice, one in brackets and once as the
+.name member. For example, in the following declaration the driver name is
+`rockchip_rk3188_grf`::
+
+  U_BOOT_DRIVER(rockchip_rk3188_grf) = {
+       .name = "rockchip_rk3188_grf",
+       .id = UCLASS_SYSCON,
+       .of_match = rk3188_syscon_ids + 1,
+       .bind = rk3188_syscon_bind_of_plat,
+  };
+
+The first name U_BOOT_DRIVER(xx) is used to create a linker symbol so that the
+driver can be accessed at build-time without any overhead. The second one
+(.name = "xx") is used at runtime when something wants to print out the driver
+name.
+
+The dtoc tool expects to be able to find a driver for each compatible string in
+the devicetree. For example, if the devicetree has::
+
+   grf: grf@20008000 {
+      compatible = "rockchip,rk3188-grf", "syscon";
+      reg = <0x20008000 0x200>;
+      bootph-pre-ram;
+   };
+
+then dtoc looks at the first compatible string ("rockchip,rk3188-grf"),
+converts that to a C identifier (rockchip_rk3188_grf) and then looks for that.
+
+Missing .compatible or Missing .id
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Various things can cause dtoc to fail to find the driver and it tries to
+warn about these. For example::
+
+   rockchip_rk3188_uart: Missing .compatible in drivers/serial/serial_rockchip.c
+                    : WARNING: the driver rockchip_rk3188_uart was not found in the driver list
+
+Without a compatible string a driver cannot be used by dtoc, even if the
+compatible string is not actually needed at runtime.
+
+If the problem is simply that there are multiple compatible strings, the
+DM_DRIVER_ALIAS() macro can be used to tell dtoc about this and avoid a problem.
+
+Checks are also made to confirm that the referenced driver has a .compatible
+member and a .id member. The first provides the array of compatible strings and
+the second provides the uclass ID.
+
+Missing parent
+~~~~~~~~~~~~~~
+
+When a device is used, its parent must be present as well. If you see an error
+like::
+
+   Node '/i2c@0/emul/emul0' requires parent node '/i2c@0/emul' but it is not in
+      the valid list
+
+it indicates that you are using a node whose parent is not present in the
+devicetree. In this example, if you look at the device tree output
+(e.g. fdtdump tpl/u-boot-tpl.dtb in your build directory), you may see something
+like this::
+
+   emul {
+       emul0 {
+           compatible = "sandbox,i2c-rtc-emul";
+           #emul-cells = <0x00000000>;
+           phandle = <0x00000003>;
+       };
+   };
+
+In this example, 'emul0' exists but its parent 'emul' has no properties. These
+have been dropped by fdtgrep in an effort to reduce the devicetree size. This
+indicates that the two nodes have different phase settings. Looking at the
+source .dts::
+
+   i2c_emul: emul {
+      bootph-pre-ram;
+      reg = <0xff>;
+      compatible = "sandbox,i2c-emul-parent";
+      emul0: emul0 {
+         bootph-all;
+         compatible = "sandbox,i2c-rtc-emul";
+         #emul-cells = <0>;
+      };
+   };
+
+you can see that the child node 'emul0' usees 'bootph-all', indicating
+that the node is present in all SPL builds, but its parent uses
+'bootph-pre-ram' indicating it is only present in SPL, not TPL. For a TPL
+build, this will fail with the above message. The fix is to change 'emul0' to
+use the same 'bootph-pre-ram' condition, so that it is not present in TPL,
+like its parent.
+
+Link errors / undefined reference
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Sometimes dtoc does not find the problem for you, but something is wrong and
+you get a link error, e.g.::
+
+   :(__u_boot_list_2_udevice_2_spl_test5+0x0): undefined reference to
+      `_u_boot_list_2_driver_2_sandbox_spl_test'
+   /usr/bin/ld: dts/dt-uclass.o:(__u_boot_list_2_uclass_2_misc+0x8):
+        undefined reference to `_u_boot_list_2_uclass_driver_2_misc'
+
+The first one indicates that the device cannot find its driver. This means that
+there is a driver 'sandbox_spl_test' but it is not compiled into the build.
+Check your Kconfig settings to make sure it is. If you don't want that in the
+build, adjust your phase settings, e.g. by using 'bootph-pre-ram' in the node
+to exclude it from the TPL build::
+
+	spl-test5 {
+		bootph-pre-sram;
+		compatible = "sandbox,spl-test";
+		stringarray = "tpl";
+	};
+
+We can drop the 'bootph-pre-sram' line so this node won't appear in the TPL
+devicetree and thus the driver won't be needed.
+
+The second error above indicates that the MISC uclass is needed by the driver
+(since it is in the MISC uclass) but that uclass is not compiled in the build.
+The fix above would fix this error too. But if you do want this uclass in the
+build, check your Kconfig settings to make sure the uclass is being built
+(CONFIG_MISC in this case).
+
+Another error that can crop up is something like::
+
+   spl/dts/dt-device.c:257:38: error: invalid application of ‘sizeof’ to
+         incomplete type ‘struct sandbox_irq_priv’
+      257 | u8 _sandbox_irq_priv_irq_sbox[sizeof(struct sandbox_irq_priv)]
+          |                                      ^~~~~~
+
+This indicates that `struct sandbox_irq_priv` is not defined anywhere. The
+solution is to add a DM_HEADER() line, as below, so this is included in the
+dt-device.c file::
+
+   U_BOOT_DRIVER(sandbox_irq) = {
+      .name		= "sandbox_irq",
+      .id		= UCLASS_IRQ,
+      .of_match	= sandbox_irq_ids,
+      .ops		= &sandbox_irq_ops,
+      .priv_auto	= sizeof(struct sandbox_irq_priv),
+      DM_HEADER(<asm/irq.h>)
+   };
+
+Note that there is no dependency checking on the above, so U-Boot will not
+regenerate the dt-device.c file when you update the source file (here,
+`irq_sandbox.c`). You need to run `make mrproper` first to get a fresh build.
+
+Another error that can crop up is something like::
+
+   spl/dts/dt-device.c:257:38: error: invalid application of ‘sizeof’ to
+         incomplete type ‘struct sandbox_irq_priv’
+      257 | u8 _sandbox_irq_priv_irq_sbox[sizeof(struct sandbox_irq_priv)]
+          |                                      ^~~~~~
+
+This indicates that `struct sandbox_irq_priv` is not defined anywhere. The
+solution is to add a DM_HEADER() line, as below, so this is included in the
+dt-device.c file::
+
+   U_BOOT_DRIVER(sandbox_irq) = {
+      .name		= "sandbox_irq",
+      .id		= UCLASS_IRQ,
+      .of_match	= sandbox_irq_ids,
+      .ops		= &sandbox_irq_ops,
+      .priv_auto	= sizeof(struct sandbox_irq_priv),
+      DM_HEADER(<asm/irq.h>)
+   };
+
+Note that there is no dependency checking on the above, so U-Boot will not
+regenerate the dt-device.c file when you update the source file (here,
+`irq_sandbox.c`). You need to run `make mrproper` first to get a fresh build.
+
+
+Caveats
+-------
+
+There are various complications with this feature which mean it should only
+be used when strictly necessary, i.e. in SPL with limited memory. Notable
+caveats include:
+
+   - Device tree does not describe data types. But the C code must define a
+     type for each property. These are guessed using heuristics which
+     are wrong in several fairly common cases. For example an 8-byte value
+     is considered to be a 2-item integer array, and is byte-swapped. A
+     boolean value that is not present means 'false', but cannot be
+     included in the structures since there is generally no mention of it
+     in the devicetree file.
+
+   - Naming of nodes and properties is automatic. This means that they follow
+     the naming in the devicetree, which may result in C identifiers that
+     look a bit strange.
+
+   - It is not possible to find a value given a property name. Code must use
+     the associated C member variable directly in the code. This makes
+     the code less robust in the face of devicetree changes. To avoid having
+     a second struct with similar members and names you need to explicitly
+     declare it as an alias with `DM_DRIVER_ALIAS()`.
+
+   - The platform data is provided to drivers as a C structure. The driver
+     must use the same structure to access the data. Since a driver
+     normally also supports devicetree it must use `#ifdef` to separate
+     out this code, since the structures are only available in SPL. This could
+     be fixed fairly easily by making the structs available outside SPL, so
+     that `IS_ENABLED()` could be used.
+
+   - With CONFIG_OF_PLATDATA_INST all binding happens at build-time, meaning
+     that (by default) it is not possible to call `device_bind()` from C code.
+     This means that all devices must have an associated devicetree node and
+     compatible string. For example if a GPIO device currently creates child
+     devices in its `bind()` method, it will not work with
+     CONFIG_OF_PLATDATA_INST. Arguably this is bad practice anyway and the
+     devicetree binding should be updated to declare compatible strings for
+     the child devices. It is possible to disable OF_PLATDATA_NO_BIND but this
+     is not recommended since it increases code size.
+
+
+Internals
+---------
+
+Generated files
+~~~~~~~~~~~~~~~
+
+When enabled, dtoc generates the following five files:
+
+include/generated/dt-decl.h (OF_PLATDATA_INST only)
+   Contains declarations for all drivers, devices and uclasses. This allows
+   any `struct udevice`, `struct driver` or `struct uclass` to be located by its
+   name
+
+include/generated/dt-structs-gen.h
+   Contains the struct definitions for the devicetree nodes that are used. This
+   is the same as without OF_PLATDATA_INST
+
+spl/dts/dt-plat.c (only with !OF_PLATDATA_INST)
+   Contains the `U_BOOT_DRVINFO()` declarations that U-Boot uses to bind devices
+   at start-up. See above for an example
+
+spl/dts/dt-device.c (only with OF_PLATDATA_INST)
+   Contains `DM_DEVICE_INST()` declarations for each device that can be used at
+   run-time. These are declared in the file along with any private/platform data
+   that they use. Every device has an idx, as above. Since each device must be
+   part of a double-linked list, the nodes are declared in the code as well.
+
+spl/dts/dt-uclass.c (only with OF_PLATDATA_INST)
+   Contains `DM_UCLASS_INST()` declarations for each uclass that can be used at
+   run-time. These are declared in the file along with any private data
+   associated with the uclass itself (the `.priv_auto` member). Since each
+   uclass must be part of a double-linked list, the nodes are declared in the
+   code as well.
+
+The dt-structs.h file includes the generated file
+`(include/generated/dt-structs.h`) if CONFIG_SPL_OF_PLATDATA is enabled.
+Otherwise (such as in U-Boot proper) these structs are not available. This
+prevents them being used inadvertently. All usage must be bracketed with
+`#if CONFIG_IS_ENABLED(OF_PLATDATA)`.
+
+The dt-plat.c file contains the device declarations and is is built in
+spl/dt-plat.c.
+
+
+CONFIG options
+~~~~~~~~~~~~~~
+
+Several CONFIG options are used to control the behaviour of of-platdata, all
+available for both SPL and TPL:
+
+OF_PLATDATA
+   This is the main option which enables the of-platdata feature
+
+OF_PLATDATA_PARENT
+   This allows `device_get_parent()` to work. Without this, all devices exist as
+   direct children of the root node. This option is highly desirable (if not
+   always absolutely essential) for buses such as I2C.
+
+OF_PLATDATA_INST
+   This controls the instantiation of devices at build time. With it disabled,
+   only `U_BOOT_DRVINFO()` records are created, with U-Boot handling the binding
+   in `device_bind()` on start-up. With it enabled, only `DM_DEVICE_INST()` and
+   `DM_UCLASS_INST()` records are created, and `device_bind()` is not needed at
+   runtime.
+
+OF_PLATDATA_NO_BIND
+   This controls whether `device_bind()` is supported. It is enabled by default
+   with OF_PLATDATA_INST since code-size reduction is really the main point of
+   the feature. It can be disabled if needed but is not likely to be supported
+   in the long term.
+
+OF_PLATDATA_DRIVER_RT
+   This controls whether the `struct driver_rt` records are used by U-Boot.
+   Normally when a device is bound, U-Boot stores the device pointer in one of
+   these records. There is one for every `struct driver_info` in the system,
+   i.e. one for every device that is bound from those records. It provides a
+   way to locate a device in the code and is used by
+   `device_get_by_ofplat_idx()`. This option is always enabled with of-platdata,
+   provided OF_PLATDATA_INST is not. In that case the records are useless since
+   we don't have any `struct driver_info` records.
+
+OF_PLATDATA_RT
+   This controls whether the `struct udevice_rt` records are used by U-Boot.
+   It moves the updatable fields from `struct udevice` (currently only `flags`)
+   into a separate structure, allowing the records to be kept in read-only
+   memory. It is generally enabled if OF_PLATDATA_INST is enabled. This option
+   also controls whether the private data is used in situ, or first copied into
+   an allocated region. Again this is to allow the private data declared by
+   dtoc-generated code to be in read-only memory. Note that access to private
+   data must be done via accessor functions, such as `dev_get_priv()`, so that
+   the relocation is handled.
+
+READ_ONLY
+   This indicates that the data generated by dtoc should not be modified. Only
+   a few fields actually do get changed in U-Boot, such as device flags. This
+   option causes those to move into an allocated space (see OF_PLATDATA_RT).
+   Also, since updating doubly linked lists is generally impossible when some of
+   the nodes cannot be updated, OF_PLATDATA_NO_BIND is enabled.
+
+Data structures
+~~~~~~~~~~~~~~~
+
+A few extra data structures are used with of-platdata:
+
+`struct udevice_rt`
+   Run-time information for devices. When OF_PLATDATA_RT is enabled, this holds
+   the flags for each device, so that `struct udevice` can remain unchanged by
+   U-Boot, and potentially reside in read-only memory. Access to flags is then
+   via functions like `dev_get_flags()` and `dev_or_flags()`. This data
+   structure is allocated on start-up, where the private data is also copied.
+   All flags values start at 0 and any changes are handled by `dev_or_flags()`
+   and `dev_bic_flags()`. It would be more correct for the flags to be set to
+   `DM_FLAG_BOUND`, or perhaps `DM_FLAG_BOUND | DM_FLAG_ALLOC_PDATA`, but since
+   there is no code to bind/unbind devices and no code to allocate/free
+   private data / platform data, it doesn't matter.
+
+`struct driver_rt`
+   Run-time information for `struct driver_info` records. When
+   OF_PLATDATA_DRIVER_RT is enabled, this holds a pointer to the device
+   created by each record. This is needed so that is it possible to locate a
+   device from C code. Specifically, the code can use `DM_DRVINFO_GET(name)` to
+   get a reference to a particular `struct driver_info`, with `name` being the
+   name of the devicetree node. This is very convenient. It is also fast, since
+   no    searching or string comparison is needed. This data structure is
+   allocated    on start-up, filled out by `device_bind()` and used by
+   `device_get_by_ofplat_idx()`.
+
+Other changes
+~~~~~~~~~~~~~
+
+Some other changes are made with of-platdata:
+
+Accessor functions
+   Accessing private / platform data via functions such as `dev_get_priv()` has
+   always been encouraged. With OF_PLATDATA_RT this is essential, since the
+   `priv_` and `plat_`  (etc.) values point to the data generated by dtoc, not
+   the read-write copy that is sometimes made on start-up. Changing the
+   private / platform data  pointers has always been discouraged (the API is
+   marked internal) but with OF_PLATDATA_RT this is not currently supported in
+   general, since it assumes that all such pointers point to the relocated data.
+   Note also that the renaming of struct members to have a trailing underscore
+   was partly done to make people aware that they should not be accessed
+   directly.
+
+`gd->uclass_root_s`
+   Normally U-Boot sets up the head of the uclass list here and makes
+   `gd->uclass_root` point to it. With OF_PLATDATA_INST, dtoc generates a
+   declaration of `uclass_head` in `dt-uclass.c` since it needs to link the
+   head node into the list. In that case, `gd->uclass_root_s` is not used and
+   U-Boot just makes `gd->uclass_root` point to `uclass_head`.
+
+`gd->dm_driver_rt`
+   This holds a pointer to a list of `struct driver_rt` records, one for each
+   `struct driver_info`. The list is in alphabetical order by the name used
+   in `U_BOOT_DRVINFO(name)` and indexed by idx, with the first record having
+   an index of 0. It is only used if OF_PLATDATA_INST is not enabled. This is
+   accessed via macros so that it can be used inside IS_ENABLED(), rather than
+   requiring #ifdefs in the C code when it is not present.
+
+`gd->dm_udevice_rt`
+   This holds a pointer to a list of `struct udevice_rt` records, one for each
+   `struct udevice`. The list is in alphabetical order by the name used
+   in `DM_DEVICE_INST(name)` (a C version of the devicetree node) and indexed by
+   idx, with the first record having an index of 0. It is only used if
+   OF_PLATDATA_INST is enabled. This is accessed via macros so that it can be
+   used inside `IS_ENABLED()`, rather than requiring #ifdefs in the C code when
+   it is not present.
+
+`gd->dm_priv_base`
+   When OF_PLATDATA_RT is enabled, the private/platform data for each device is
+   copied into an allocated region by U-Boot on start-up. This points to that
+   region. All calls to accessor functions (e.g. `dev_get_priv()`) then
+   translate from the pointer provided by the caller (assumed to lie between
+   `__priv_data_start` and `__priv_data_end`) to the new allocated region. This
+   member is accessed via macros so that it can be used inside IS_ENABLED(),
+   rather than required #ifdefs in the C code when it is not present.
+
+`struct udevice->flags_`
+   When OF_PLATDATA_RT is enabled, device flags are no-longer part of
+   `struct udevice`, but are instead kept in `struct udevice_rt`, as described
+   above. Flags are accessed via functions, such as `dev_get_flags()` and
+   `dev_or_flags()`.
+
+`struct udevice->node_`
+   When OF_PLATDATA is enabled, there is no devicetree at runtime, so no need
+   for this field. It is removed, just to save space.
+
+`DM_PHASE`
+   This macro is used to indicate which phase of U-Boot a driver is intended
+   for. See above for details.
+
+`DM_HDR`
+   This macro is used to indicate which header file dtoc should use to allow
+   a driver declaration to compile correctly. See above for details.
+
+`device_get_by_ofplat_idx()`
+   There used to be a function called `device_get_by_driver_info()` which
+   looked up a `struct driver_info` pointer and returned the `struct udevice`
+   that was created from it. It was only available for use with of-platdata.
+   This has been removed in favour of `device_get_by_ofplat_idx()` which uses
+   `idx`, the index of the `struct driver_info` or `struct udevice` in the
+   linker_list. Similarly, the `struct phandle_0_arg` (etc.) structs have been
+   updated to use this index instead of a pointer to `struct driver_info`.
+
+`DM_DRVINFO_GET`
+   This has been removed since we now use indexes to obtain a driver from
+   `struct phandle_0_arg` and the like.
+
+Two-pass binding
+   The original of-platdata tried to order `U_BOOT_DRVINFO()` in the generated
+   files so as to have parents declared ahead of children. This was convenient
+   as it avoided any special code in U-Boot. With OF_PLATDATA_INST this does
+   not work as the idx value relies on using alphabetical order for everything,
+   so that dtoc and U-Boot's linker_lists agree on the idx value. Devices are
+   then bound in order of idx, having no regard to parent/child relationships.
+   For this reason, device binding now hapens in multiple passes, with parents
+   being bound before their children. This is important so that children can
+   find their parents in the bind() method if needed.
+
+Root device
+   The root device is generally bound by U-Boot but with OF_PLATDATA_INST it
+   cannot be, since binding needs to be done at build time. So in this case
+   dtoc sets up a root device using `DM_DEVICE_INST()` in `dt-device.c` and
+   U-Boot makes use of that. When OF_PLATDATA_INST is not enabled, U-Boot
+   generally ignores the root node and does not create a `U_BOOT_DRVINFO()`
+   record for it. This means that the idx numbers used by `struct driver_info`
+   (when OF_PLATDATA_INST is disabled) and the idx numbers used by
+   `struct udevice` (when OF_PLATDATA_INST is enabled) differ, since one has a
+   root node and the other does not. This does not actually matter, since only
+   one of them is actually used for any particular build, but it is worth
+   keeping in mind if comparing index values and switching OF_PLATDATA_INST on
+   and off.
+
+`__priv_data_start` and `__priv_data_end`
+   The private/platform data declared by dtoc is all collected together in
+   a linker section and these symbols mark the start and end of it. This allows
+   U-Boot to relocate the area to a new location if needed (with
+   OF_PLATDATA_RT)
+
+`dm_priv_to_rw()`
+   This function converts a private- or platform-data pointer value generated by
+   dtoc into one that can be used by U-Boot. It is a NOP unless OF_PLATDATA_RT
+   is enabled, in which case it translates the address to the relocated
+   region. See above for more information.
+
+The dm_populate_phandle_data() function that was previous needed has now been
+removed, since dtoc can address the drivers directly from dt-plat.c and does
+not need to fix up things at runtime.
+
+The pylibfdt Python module is used to access the devicetree.
+
+
+Credits
+-------
+
+This is an implementation of an idea by Tom Rini <trini@konsulko.com>.
+
+
+Future work
+-----------
+- Consider programmatically reading binding files instead of devicetree
+  contents
+- Allow IS_ENABLED() to be used in the C code instead of #if
+
+
+.. Simon Glass <sjg@chromium.org>
+.. Google, Inc
+.. 6/6/16
+.. Updated Independence Day 2016
+.. Updated 1st October 2020
+.. Updated 5th February 2021
diff --git a/doc/develop/driver-model/pci-info.rst b/doc/develop/driver-model/pci-info.rst
new file mode 100644
index 00000000000..dea595b6cff
--- /dev/null
+++ b/doc/develop/driver-model/pci-info.rst
@@ -0,0 +1,172 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+PCI with Driver Model
+=====================
+
+How busses are scanned
+----------------------
+
+Any config read will end up at pci_read_config(). This uses
+uclass_get_device_by_seq() to get the PCI bus for a particular bus number.
+Bus number 0 will need to be requested first, and the alias in the device
+tree file will point to the correct device::
+
+	aliases {
+		pci0 = &pcic;
+	};
+
+	pcic: pci@0 {
+		compatible = "sandbox,pci";
+		...
+	};
+
+
+If there is no alias the devices will be numbered sequentially in the device
+tree.
+
+The call to uclass_get_device() will cause the PCI bus to be probed.
+This does a scan of the bus to locate available devices. These devices are
+bound to their appropriate driver if available. If there is no driver, then
+they are bound to a generic PCI driver which does nothing.
+
+After probing a bus, the available devices will appear in the device tree
+under that bus.
+
+Note that this is all done on a lazy basis, as needed, so until something is
+touched on PCI (eg: a call to pci_find_devices()) it will not be probed.
+
+PCI devices can appear in the flattened device tree. If they do, their node
+often contains extra information which cannot be derived from the PCI IDs or
+PCI class of the device. Each PCI device node must have a <reg> property, as
+defined by the IEEE Std 1275-1994 PCI bus binding document v2.1. Compatible
+string list is optional and generally not needed, since PCI is discoverable
+bus, albeit there are justified exceptions. If the compatible string is
+present, matching on it takes precedence over PCI IDs and PCI classes.
+
+Note we must describe PCI devices with the same bus hierarchy as the
+hardware, otherwise driver model cannot detect the correct parent/children
+relationship during PCI bus enumeration thus PCI devices won't be bound to
+their drivers accordingly. A working example like below::
+
+	pci {
+		#address-cells = <3>;
+		#size-cells = <2>;
+		compatible = "pci-x86";
+		bootph-all;
+		ranges = <0x02000000 0x0 0x40000000 0x40000000 0 0x80000000
+			  0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
+			  0x01000000 0x0 0x2000 0x2000 0 0xe000>;
+
+		pcie@17,0 {
+			#address-cells = <3>;
+			#size-cells = <2>;
+			compatible = "pci-bridge";
+			bootph-all;
+			reg = <0x0000b800 0x0 0x0 0x0 0x0>;
+
+			topcliff@0,0 {
+				#address-cells = <3>;
+				#size-cells = <2>;
+				compatible = "pci-bridge";
+				bootph-all;
+				reg = <0x00010000 0x0 0x0 0x0 0x0>;
+
+				pciuart0: uart@a,1 {
+					compatible = "pci8086,8811.00",
+							"pci8086,8811",
+							"pciclass,070002",
+							"pciclass,0700",
+							"x86-uart";
+					bootph-all;
+					reg = <0x00025100 0x0 0x0 0x0 0x0
+					       0x01025110 0x0 0x0 0x0 0x0>;
+					......
+				};
+
+				......
+			};
+		};
+
+		......
+	};
+
+In this example, the root PCI bus node is the "/pci" which matches "pci-x86"
+driver. It has a subnode "pcie@17,0" with driver "pci-bridge". "pcie@17,0"
+also has subnode "topcliff@0,0" which is a "pci-bridge" too. Under that bridge,
+a PCI UART device "uart@a,1" is described. This exactly reflects the hardware
+bus hierarchy: on the root PCI bus, there is a PCIe root port which connects
+to a downstream device Topcliff chipset. Inside Topcliff chipset, it has a
+PCIe-to-PCI bridge and all the chipset integrated devices like the PCI UART
+device are on the PCI bus. Like other devices in the device tree, if we want
+to bind PCI devices before relocation, "bootph-all" must be declared
+in each of these nodes.
+
+If PCI devices are not listed in the device tree, U_BOOT_PCI_DEVICE can be used
+to specify the driver to use for the device. The device tree takes precedence
+over U_BOOT_PCI_DEVICE. Please note with U_BOOT_PCI_DEVICE, only drivers with
+DM_FLAG_PRE_RELOC will be bound before relocation. If neither device tree nor
+U_BOOT_PCI_DEVICE is provided, the built-in driver (either pci_bridge_drv or
+pci_generic_drv) will be used.
+
+
+Sandbox
+-------
+
+With sandbox we need a device emulator for each device on the bus since there
+is no real PCI bus. This works by looking in the device tree node for an
+emulator driver. For example::
+
+	pci@1f,0 {
+		compatible = "pci-generic";
+		reg = <0xf800 0 0 0 0>;
+		sandbox,emul = <&emul_1f>;
+	};
+	pci-emul {
+		compatible = "sandbox,pci-emul-parent";
+		emul_1f: emul@1f,0 {
+			compatible = "sandbox,swap-case";
+			#emul-cells = <0>;
+		};
+	};
+
+This means that there is a 'sandbox,swap-case' driver at that bus position.
+Note that the first cell in the 'reg' value is the bus/device/function. See
+PCI_BDF() for the encoding (it is also specified in the IEEE Std 1275-1994
+PCI bus binding document, v2.1)
+
+The pci-emul node should go outside the pci bus node, since otherwise it will
+be scanned as a PCI device, causing confusion.
+
+When this bus is scanned we will end up with something like this::
+
+   `- * pci@0 @ 05c660c8, 0
+    `-   pci@1f,0 @ 05c661c8, 63488
+   `-   emul@1f,0 @ 05c662c8
+
+When accesses go to the pci@1f,0 device they are forwarded to its emulator.
+
+The sandbox PCI drivers also support dynamic driver binding, allowing device
+driver to declare the driver binding information via U_BOOT_PCI_DEVICE(),
+eliminating the need to provide any device tree node under the host controller
+node. It is required a "sandbox,dev-info" property must be provided in the
+host controller node for this functionality to work.
+
+.. code-block:: none
+
+	pci1: pci@1 {
+		compatible = "sandbox,pci";
+		...
+		sandbox,dev-info = <0x08 0x00 0x1234 0x5678
+				    0x0c 0x00 0x1234 0x5678>;
+	};
+
+The "sandbox,dev-info" property specifies all dynamic PCI devices on this bus.
+Each dynamic PCI device is encoded as 4 cells a group. The first and second
+cells are PCI device number and function number respectively. The third and
+fourth cells are PCI vendor ID and device ID respectively.
+
+When this bus is scanned we will end up with something like this::
+
+ pci        [ + ]   pci_sandbo  |-- pci1
+ pci_emul   [   ]   sandbox_sw  |   |-- sandbox_swap_case_emul
+ pci_emul   [   ]   sandbox_sw  |   `-- sandbox_swap_case_emul
diff --git a/doc/develop/driver-model/pmic-framework.rst b/doc/develop/driver-model/pmic-framework.rst
new file mode 100644
index 00000000000..d24a1badd64
--- /dev/null
+++ b/doc/develop/driver-model/pmic-framework.rst
@@ -0,0 +1,143 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. (C) Copyright 2014-2015 Samsung Electronics
+.. sectionauthor:: Przemyslaw Marczak <p.marczak@samsung.com>
+
+PMIC framework based on Driver Model
+====================================
+
+Introduction
+------------
+This is an introduction to driver-model multi uclass PMIC IC's support.
+At present it's based on two uclass types:
+
+UCLASS_PMIC:
+  basic uclass type for PMIC I/O, which provides common
+  read/write interface.
+UCLASS_REGULATOR:
+  additional uclass type for specific PMIC features, which are
+  Voltage/Current regulators.
+
+New files:
+
+UCLASS_PMIC:
+  - drivers/power/pmic/pmic-uclass.c
+  - include/power/pmic.h
+UCLASS_REGULATOR:
+  - drivers/power/regulator/regulator-uclass.c
+  - include/power/regulator.h
+
+Commands:
+- common/cmd_pmic.c
+- common/cmd_regulator.c
+
+How doees it work
+-----------------
+The Power Management Integrated Circuits (PMIC) are used in embedded systems
+to provide stable, precise and specific voltage power source with over-voltage
+and thermal protection circuits.
+
+The single PMIC can provide various functions by single or multiple interfaces,
+like in the example below::
+
+   -- SoC
+    |
+    |            ______________________________________
+    | BUS 0     |       Multi interface PMIC IC        |--> LDO out 1
+    | e.g.I2C0  |                                      |--> LDO out N
+    |-----------|---- PMIC device 0 (READ/WRITE ops)   |
+    | or SPI0   |    |_ REGULATOR device (ldo/... ops) |--> BUCK out 1
+    |           |    |_ CHARGER device (charger ops)   |--> BUCK out M
+    |           |    |_ MUIC device (microUSB con ops) |
+    | BUS 1     |    |_ ...                            |---> BATTERY
+    | e.g.I2C1  |                                      |
+    |-----------|---- PMIC device 1 (READ/WRITE ops)   |---> USB in 1
+    . or SPI1   |    |_ RTC device (rtc ops)           |---> USB in 2
+    .           |______________________________________|---> USB out
+    .
+
+Since U-Boot provides driver model features for I2C and SPI bus drivers,
+the PMIC devices should also support this. By the pmic and regulator API's,
+PMIC drivers can simply provide a common functions, for multi-interface and
+and multi-instance device support.
+
+Basic design assumptions:
+
+- Common I/O API:
+    UCLASS_PMIC. For the multi-function PMIC devices, this can be used as
+    parent I/O device for each IC's interface. Then, each children uses the
+    same dev for read/write.
+
+- Common regulator API:
+    UCLASS_REGULATOR. For driving the regulator attributes, auto setting
+    function or command line interface, based on kernel-style regulator device
+    tree constraints.
+
+For simple implementations, regulator drivers are not required, so the code can
+use pmic read/write directly.
+
+Pmic uclass
+-----------
+The basic information:
+
+* Uclass:   'UCLASS_PMIC'
+* Header:   'include/power/pmic.h'
+* Core:     'drivers/power/pmic/pmic-uclass.c' (config 'CONFIG_DM_PMIC')
+* Command:  'common/cmd_pmic.c' (config 'CONFIG_CMD_PMIC')
+* Example:  'drivers/power/pmic/max77686.c'
+
+For detailed API description, please refer to the header file.
+
+As an example of the pmic driver, please refer to the MAX77686 driver.
+
+Please pay attention for the driver's bind() method. Exactly the function call:
+'pmic_bind_children()', which is used to bind the regulators by using the array
+of regulator's node, compatible prefixes.
+
+The 'pmic; command also supports the new API. So the pmic command can be enabled
+by adding CONFIG_CMD_PMIC.
+The new pmic command allows to:
+- list pmic devices
+- choose the current device (like the mmc command)
+- read or write the pmic register
+- dump all pmic registers
+
+This command can use only UCLASS_PMIC devices, since this uclass is designed
+for pmic I/O operations only.
+
+For more information, please refer to the core file.
+
+Regulator uclass
+----------------
+The basic information:
+
+* Uclass: 'UCLASS_REGULATOR'
+
+* Header: 'include/power/regulator.h'
+
+* Core: 'drivers/power/regulator/regulator-uclass.c'
+  (config 'CONFIG_DM_REGULATOR')
+
+* Binding: 'doc/device-tree-bindings/regulator/regulator.txt'
+
+* Command: 'common/cmd_regulator.c' (config 'CONFIG_CMD_REGULATOR')
+
+* Example: 'drivers/power/regulator/max77686.c'
+  'drivers/power/pmic/max77686.c' (required I/O driver for the above)
+
+* Example: 'drivers/power/regulator/fixed.c'
+  (config 'CONFIG_DM_REGULATOR_FIXED')
+
+For detailed API description, please refer to the header file.
+
+For the example regulator driver, please refer to the MAX77686 regulator driver,
+but this driver can't operate without pmic's example driver, which provides an
+I/O interface for MAX77686 regulator.
+
+The second example is a fixed Voltage/Current regulator for a common use.
+
+The 'regulator' command also supports the new API. The command allow:
+- list regulator devices
+- choose the current device (like the mmc command)
+- do all regulator-specific operations
+
+For more information, please refer to the command file.
diff --git a/doc/develop/driver-model/remoteproc-framework.rst b/doc/develop/driver-model/remoteproc-framework.rst
new file mode 100644
index 00000000000..03a0bd0f4b4
--- /dev/null
+++ b/doc/develop/driver-model/remoteproc-framework.rst
@@ -0,0 +1,169 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. (C) Copyright 2015
+.. Texas Instruments Incorporated - https://www.ti.com/
+
+Remote Processor Framework
+==========================
+
+Introduction
+------------
+
+This is an introduction to driver-model for Remote Processors found
+on various System on Chip(SoCs). The term remote processor is used to
+indicate that this is not the processor on which U-Boot is operating
+on, instead is yet another processing entity that may be controlled by
+the processor on which we are functional.
+
+The simplified model depends on a single UCLASS - UCLASS_REMOTEPROC
+
+UCLASS_REMOTEPROC:
+  - drivers/remoteproc/rproc-uclass.c
+  - include/remoteproc.h
+
+Commands:
+  - common/cmd_remoteproc.c
+
+Configuration:
+  - CONFIG_REMOTEPROC is selected by drivers as needed
+  - CONFIG_CMD_REMOTEPROC for the commands if required.
+
+How does it work - The driver
+-----------------------------
+
+Overall, the driver statemachine transitions are typically as follows::
+
+           (entry)
+           +-------+
+       +---+ init  |
+       |   |       | <---------------------+
+       |   +-------+                       |
+       |                                   |
+       |                                   |
+       |   +--------+                      |
+   Load|   |  reset |                      |
+       |   |        | <----------+         |
+       |   +--------+            |         |
+       |        |Load            |         |
+       |        |                |         |
+       |   +----v----+   reset   |         |
+       +-> |         |    (opt)  |         |
+           |  Loaded +-----------+         |
+           |         |                     |
+           +----+----+                     |
+                | Start                    |
+            +---v-----+        (opt)       |
+         +->| Running |        Stop        |
+   Ping  +- |         +--------------------+
+   (opt)    +---------+
+
+(is_running does not change state)
+opt: Optional state transition implemented by driver.
+
+NOTE: It depends on the remote processor as to the exact behavior
+of the statemachine, remoteproc core does not intent to implement
+statemachine logic. Certain processors may allow start/stop without
+reloading the image in the middle, certain other processors may only
+allow us to start the processor(image from a EEPROM/OTP) etc.
+
+It is hence the responsibility of the driver to handle the requisite
+state transitions of the device as necessary.
+
+Basic design assumptions:
+
+Remote processor can operate on a certain firmware that maybe loaded
+and released from reset.
+
+The driver follows a standard UCLASS DM.
+
+in the bare minimum form:
+
+.. code-block:: c
+
+	static const struct dm_rproc_ops sandbox_testproc_ops = {
+		.load = sandbox_testproc_load,
+		.start = sandbox_testproc_start,
+	};
+
+	static const struct udevice_id sandbox_ids[] = {
+		{.compatible = "sandbox,test-processor"},
+		{}
+	};
+
+	U_BOOT_DRIVER(sandbox_testproc) = {
+		.name = "sandbox_test_proc",
+		.of_match = sandbox_ids,
+		.id = UCLASS_REMOTEPROC,
+		.ops = &sandbox_testproc_ops,
+		.probe = sandbox_testproc_probe,
+	};
+
+This allows for the device to be probed as part of the "init" command
+or invocation of 'rproc_init()' function as the system dependencies define.
+
+The driver is expected to maintain it's own statemachine which is
+appropriate for the device it maintains. It must, at the very least
+provide a load and start function. We assume here that the device
+needs to be loaded and started, else, there is no real purpose of
+using the remoteproc framework.
+
+Describing the device using platform data
+-----------------------------------------
+
+*IMPORTANT* NOTE: THIS SUPPORT IS NOT MEANT FOR USE WITH NEWER PLATFORM
+SUPPORT. THIS IS ONLY FOR LEGACY DEVICES. THIS MODE OF INITIALIZATION
+*WILL* BE EVENTUALLY REMOVED ONCE ALL NECESSARY PLATFORMS HAVE MOVED
+TO DM/FDT.
+
+Considering that many platforms are yet to move to device-tree model,
+a simplified definition of a device is as follows:
+
+.. code-block:: c
+
+	struct dm_rproc_uclass_pdata proc_3_test = {
+		.name = "proc_3_legacy",
+		.mem_type = RPROC_INTERNAL_MEMORY_MAPPED,
+		.driver_plat_data = &mydriver_data;
+	};
+
+	U_BOOT_DRVINFO(proc_3_demo) = {
+		.name = "sandbox_test_proc",
+		.plat = &proc_3_test,
+	};
+
+There can be additional data that may be desired depending on the
+remoteproc driver specific needs (for example: SoC integration
+details such as clock handle or something similar). See appropriate
+documentation for specific remoteproc driver for further details.
+These are passed via driver_plat_data.
+
+Describing the device using device tree
+---------------------------------------
+
+.. code-block: none
+
+	/ {
+		...
+		aliases {
+			...
+			remoteproc0 = &rproc_1;
+			remoteproc1 = &rproc_2;
+
+		};
+		...
+
+		rproc_1: rproc@1 {
+			compatible = "sandbox,test-processor";
+			remoteproc-name = "remoteproc-test-dev1";
+		};
+
+		rproc_2: rproc@2 {
+			compatible = "sandbox,test-processor";
+			internal-memory-mapped;
+			remoteproc-name = "remoteproc-test-dev2";
+		};
+		...
+	};
+
+aliases usage is optional, but it is usually recommended to ensure the
+users have a consistent usage model for a platform.
+the compatible string used here is specific to the remoteproc driver involved.
diff --git a/doc/develop/driver-model/serial-howto.rst b/doc/develop/driver-model/serial-howto.rst
new file mode 100644
index 00000000000..17b53e3cabf
--- /dev/null
+++ b/doc/develop/driver-model/serial-howto.rst
@@ -0,0 +1,188 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+How to port a serial driver to driver model
+===========================================
+
+Here is a suggested approach for converting your serial driver over to driver
+model. Please feel free to update this file with your ideas and suggestions.
+
+- #ifdef out all your own serial driver code (#ifndef CONFIG_DM_SERIAL)
+- Define CONFIG_DM_SERIAL for your board, vendor or architecture
+- If the board does not already use driver model, you need CONFIG_DM also
+- Your board should then build, but will not boot since there will be no serial
+  driver
+- Add the U_BOOT_DRIVER piece at the end (e.g. copy serial_s5p.c for example)
+- Add a private struct for the driver data - avoid using static variables
+- Implement each of the driver methods, perhaps by calling your old methods
+- You may need to adjust the function parameters so that the old and new
+  implementations can share most of the existing code
+- If you convert all existing users of the driver, remove the pre-driver-model
+  code
+
+In terms of patches a conversion series typically has these patches:
+- clean up / prepare the driver for conversion
+- add driver model code
+- convert at least one existing board to use driver model serial
+- (if no boards remain that don't use driver model) remove the old code
+
+This may be a good time to move your board to use the device tree too. Mostly
+this involves these steps:
+
+- define CONFIG_OF_CONTROL and CONFIG_OF_SEPARATE
+- add your device tree files to arch/<arch>/dts
+- update the Makefile there
+- Add stdout-path to your /chosen device tree node if it is not already there
+- build and get u-boot-dtb.bin so you can test it
+- Your drivers can now use device tree
+- For device tree in SPL, define CONFIG_SPL_OF_CONTROL
+
+
+Converting boards to CONFIG_DM_SERIAL
+-------------------------------------
+
+If your SoC has a serial driver that uses driver model (has U_BOOT_DRIVER() in
+it), then you may still find that your board has not been converted. To convert
+your board, enable the option and see if you can get it working.
+
+Firstly you will have a lot more success if you have a method of debugging your
+board, such as a JTAG connection. Failing that the debug UART is useful,
+although since you are trying to get the UART driver running, it will interfere
+with your efforts eventually.
+
+Secondly, while the UART is a relatively simple peripheral, it may need quite a
+few pieces to be up and running before it will work, such as the correct pin
+muxing, clocks, power domains and possibly even GPIOs, if an external
+transceiver is used. Look at other boards that use the same SoC, for clues as to
+what is needed.
+
+Thirdly, when added tags, put them in a xxx-u-boot.dtsi file, where xxx is your
+board name, or SoC name. There may already be a file for your SoC which contains
+what you need. U-Boot automatically includes these files: see :ref:`dttweaks`.
+
+Here are some things you might need to consider:
+
+1. The serial driver itself needs to be present before relocation, so that the
+   U-Boot banner appears. Make sure it has a bootph-all tag in the device
+   tree, so that the serial driver is bound when U-Boot starts.
+
+   For example, on iMX8::
+
+       lpuart3: serial@5a090000 {
+           compatible = "fsl,imx8qm-lpuart";
+           ...
+       };
+
+   put this in your xxx-u-boot.dtsi file::
+
+       &lpuart3 {
+           bootph-some-ram;
+       };
+
+2. If your serial port requires a particular pinmux configuration, you may need
+   a pinctrl driver. This needs to have a bootph-all tag also. Take care
+   that any subnodes have the same tag, if they are needed to make the correct
+   pinctrl available.
+
+   For example, on RK3288, the UART2 uses uart2_xfer::
+
+       uart2: serial@ff690000 {
+           ...
+           pinctrl-0 = <&uart2_xfer>;
+       };
+
+   which is defined as follows::
+
+       pinctrl: pinctrl {
+           compatible = "rockchip,rk3228-pinctrl";
+
+           uart2: uart2 {
+               uart2_xfer: uart2-xfer {
+                   rockchip,pins = <1 RK_PC2 RK_FUNC_2 &pcfg_pull_up>,
+                         <1 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
+           };
+           ...
+       };
+
+   This means you must make the uart2-xfer node available as well as all its
+   parents, so put this in your xxx-u-boot.dtsi file::
+
+       &pinctrl {
+           bootph-all;
+       };
+
+       &uart2 {
+           bootph-all;
+       };
+
+       &uart2_xfer {
+           bootph-all;
+       };
+
+3. The same applies to power domains. For example, if a particular power domain
+   must be enabled for the serial port to work, you need to ensure it is
+   available before relocation:
+
+   For example, on iMX8, put this in your xxx-u-boot.dtsi file::
+
+       &pd_dma {
+           bootph-some-ram;
+       };
+
+       &pd_dma_lpuart3 {
+           bootph-some-ram;
+       };
+
+4. The same applies to clocks, in the same way. Make sure that when your driver
+   requests a clock, typically with clk_get_by_index(), it is available.
+
+
+Generally a failure to find a required device will cause an error which you can
+catch, if you have the debug UART working. U-Boot outputs serial data to the
+debug UART until the point where the real serial driver takes over. This point
+is marked by gd->flags having the GD_FLG_SERIAL_READY flag set. This change
+happens in serial_init() in serial-uclass.c so until that point the debug UART
+is used. You can see the relevant code in putc()
+, for example::
+
+   /* if we don't have a console yet, use the debug UART */
+   if (IS_ENABLED(CONFIG_DEBUG_UART) && !(gd->flags & GD_FLG_SERIAL_READY)) {
+      printch(c);
+      return;
+   }
+   ... carries on to use the console / serial driver
+
+Note that in device_probe() the call to pinctrl_select_state() silently fails
+if the pinctrl driver fails. You can add a temporary check there if needed.
+
+Why do we have all these tags? The problem is that before relocation we don't
+want to bind all the drivers since memory is limited and the CPU may be running
+at a slow speed. So many boards will fail to boot without this optimisation, or
+may take a long time to start up (e.g. hundreds of milliseconds). The tags tell
+U-Boot which drivers to bind.
+
+The good news is that this problem is normally solved by the SoC, so that any
+boards that use it will work as normal. But in some cases there are multiple
+UARTs or multiple pinmux options, which means that each board may need to do
+some customisation.
+
+Serial in SPL
+-------------
+
+A similar process is needed in SPL, but in this case the bootph-pre-ram or
+bootph-pre-sram tags are used. Add these in the same way as above, to ensure
+that the SPL device tree contains the required nodes (see spl/u-boot-spl.dtb
+for what it actually contains).
+
+Removing old code
+-----------------
+
+In some cases there may be initialisation code that is no-longer needed when
+driver model is used, such as setting up the pin muxing, or enabling a clock.
+Be sure to remove this.
+
+Example patch
+-------------
+
+See this serial_patch_ for iMX7.
+
+.. _serial_patch: https://patchwork.ozlabs.org/project/uboot/patch/20220314232406.1945308-1-festevam@gmail.com/
diff --git a/doc/develop/driver-model/soc-framework.rst b/doc/develop/driver-model/soc-framework.rst
new file mode 100644
index 00000000000..357e7fc8c90
--- /dev/null
+++ b/doc/develop/driver-model/soc-framework.rst
@@ -0,0 +1,68 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. (C) Copyright 2020
+.. Texas Instruments Incorporated - https://www.ti.com/
+
+SOC ID Framework
+================
+
+Introduction
+------------
+
+The driver-model SOC ID framework is able to provide identification
+information about a specific SoC in use at runtime, and also provide matching
+from a set of identification information from an array. This can be useful for
+enabling small quirks in drivers that exist between SoC variants that are
+impractical to implement using device tree flags. It is based on UCLASS_SOC.
+
+UCLASS_SOC:
+  - drivers/soc/soc-uclass.c
+  - include/soc.h
+
+Configuration:
+  - CONFIG_SOC_DEVICE is selected by drivers as needed.
+
+Implementing a UCLASS_SOC provider
+----------------------------------
+
+The purpose of this framework is to allow UCLASS_SOC provider drivers to supply
+identification information about the SoC in use at runtime. The framework
+allows drivers to define soc_ops that return identification strings.  All
+soc_ops need not be defined and can be left as NULL, in which case the
+framework will return -ENOSYS and not consider the value when doing an
+soc_device_match.
+
+It is left to the driver implementor to decide how the information returned is
+determined, but in general the same SOC should always return the same set of
+identifying information. Information returned must be in the form of a NULL
+terminated string.
+
+See include/soc.h for documentation of the available soc_ops and the intended
+meaning of the values that can be returned. See drivers/soc/soc_sandbox.c for
+an example UCLASS_SOC provider driver.
+
+Using a UCLASS_SOC driver
+-------------------------
+
+The framework provides the ability to retrieve and use the identification
+strings directly. It also has the ability to return a match from a list of
+different sets of SoC data using soc_device_match.
+
+An array of 'struct soc_attr' can be defined, each containing ID information
+for a specific SoC, and when passed to soc_device_match, the identifier values
+for each entry in the list will be compared against the values provided by the
+UCLASS_SOC driver that is in use. The first entry in the list that matches all
+non-null values will be returned by soc_device_match.
+
+An example of various uses of the framework can be found at test/dm/soc.c.
+
+Describing the device using device tree
+---------------------------------------
+
+.. code-block:: none
+
+   chipid: chipid {
+        compatible = "sandbox,soc";
+   };
+
+All that is required in a DT node is a compatible for a corresponding
+UCLASS_SOC driver.
diff --git a/doc/develop/driver-model/spi-howto.rst b/doc/develop/driver-model/spi-howto.rst
new file mode 100644
index 00000000000..9dc3b9b4aac
--- /dev/null
+++ b/doc/develop/driver-model/spi-howto.rst
@@ -0,0 +1,692 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+How to port a SPI driver to driver model
+========================================
+
+Here is a rough step-by-step guide. It is based around converting the
+exynos SPI driver to driver model (DM) and the example code is based
+around U-Boot v2014.10-rc2 (commit be9f643). This has been updated for
+v2015.04.
+
+It is quite long since it includes actual code examples.
+
+Before driver model, SPI drivers have their own private structure which
+contains 'struct spi_slave'. With driver model, 'struct spi_slave' still
+exists, but now it is 'per-child data' for the SPI bus. Each child of the
+SPI bus is a SPI slave. The information that was stored in the
+driver-specific slave structure can now be port in private data for the
+SPI bus.
+
+For example, struct tegra_spi_slave looks like this:
+
+.. code-block:: c
+
+	struct tegra_spi_slave {
+		struct spi_slave slave;
+		struct tegra_spi_ctrl *ctrl;
+	};
+
+In this case 'slave' will be in per-child data, and 'ctrl' will be in the
+SPI's buses private data.
+
+
+How long does this take?
+------------------------
+
+You should be able to complete this within 2 hours, including testing but
+excluding preparing the patches. The API is basically the same as before
+with only minor changes:
+
+- methods to set speed and mode are separated out
+- cs_info is used to get information on a chip select
+
+
+Enable driver mode for SPI and SPI flash
+----------------------------------------
+
+Add these to your board config:
+
+* CONFIG_DM_SPI
+* CONFIG_DM_SPI_FLASH
+
+
+Add the skeleton
+----------------
+
+Put this code at the bottom of your existing driver file:
+
+.. code-block:: c
+
+	struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,
+					  unsigned int max_hz, unsigned int mode)
+	{
+		return NULL;
+	}
+
+	struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node,
+					      int spi_node)
+	{
+		return NULL;
+	}
+
+	static int exynos_spi_of_to_plat(struct udevice *dev)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_spi_probe(struct udevice *dev)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_spi_remove(struct udevice *dev)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_spi_claim_bus(struct udevice *dev)
+	{
+
+		return -ENODEV;
+	}
+
+	static int exynos_spi_release_bus(struct udevice *dev)
+	{
+
+		return -ENODEV;
+	}
+
+	static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen,
+				   const void *dout, void *din, unsigned long flags)
+	{
+
+		return -ENODEV;
+	}
+
+	static int exynos_spi_set_speed(struct udevice *dev, uint speed)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_spi_set_mode(struct udevice *dev, uint mode)
+	{
+		return -ENODEV;
+	}
+
+	static int exynos_cs_info(struct udevice *bus, uint cs,
+				  struct spi_cs_info *info)
+	{
+		return -EINVAL;
+	}
+
+	static const struct dm_spi_ops exynos_spi_ops = {
+		.claim_bus	= exynos_spi_claim_bus,
+		.release_bus	= exynos_spi_release_bus,
+		.xfer		= exynos_spi_xfer,
+		.set_speed	= exynos_spi_set_speed,
+		.set_mode	= exynos_spi_set_mode,
+		.cs_info	= exynos_cs_info,
+	};
+
+	static const struct udevice_id exynos_spi_ids[] = {
+		{ .compatible = "samsung,exynos-spi" },
+		{ }
+	};
+
+	U_BOOT_DRIVER(exynos_spi) = {
+		.name	= "exynos_spi",
+		.id	= UCLASS_SPI,
+		.of_match = exynos_spi_ids,
+		.ops	= &exynos_spi_ops,
+		.of_to_plat = exynos_spi_of_to_plat,
+		.probe	= exynos_spi_probe,
+		.remove	= exynos_spi_remove,
+	};
+
+
+Replace 'exynos' in the above code with your driver name
+--------------------------------------------------------
+
+
+#ifdef out all of the code in your driver except for the above
+--------------------------------------------------------------
+
+This will allow you to get it building, which means you can work
+incrementally. Since all the methods return an error initially, there is
+less chance that you will accidentally leave something in.
+
+Also, even though your conversion is basically a rewrite, it might help
+reviewers if you leave functions in the same place in the file,
+particularly for large drivers.
+
+
+Add some includes
+-----------------
+
+Add these includes to your driver:
+
+.. code-block:: c
+
+	#include <dm.h>
+	#include <errno.h>
+
+
+Build
+-----
+
+At this point you should be able to build U-Boot for your board with the
+empty SPI driver. You still have empty methods in your driver, but we will
+write these one by one.
+
+Set up your platform data structure
+-----------------------------------
+
+This will hold the information your driver to operate, like its hardware
+address or maximum frequency.
+
+You may already have a struct like this, or you may need to create one
+from some of the #defines or global variables in the driver.
+
+Note that this information is not the run-time information. It should not
+include state that changes. It should be fixed throughout the live of
+U-Boot. Run-time information comes later.
+
+Here is what was in the exynos spi driver:
+
+.. code-block:: c
+
+	struct spi_bus {
+		enum periph_id periph_id;
+		s32 frequency;		/* Default clock frequency, -1 for none */
+		struct exynos_spi *regs;
+		int inited;		/* 1 if this bus is ready for use */
+		int node;
+		uint deactivate_delay_us;	/* Delay to wait after deactivate */
+	};
+
+Of these, inited is handled by DM and node is the device tree node, which
+DM tells you. The name is not quite right. So in this case we would use:
+
+.. code-block:: c
+
+	struct exynos_spi_plat {
+		enum periph_id periph_id;
+		s32 frequency;		/* Default clock frequency, -1 for none */
+		struct exynos_spi *regs;
+		uint deactivate_delay_us;	/* Delay to wait after deactivate */
+	};
+
+
+Write of_to_plat() [for device tree only]
+-----------------------------------------
+
+This method will convert information in the device tree node into a C
+structure in your driver (called platform data). If you are not using
+device tree, go to 8b.
+
+DM will automatically allocate the struct for us when we are using device
+tree, but we need to tell it the size:
+
+.. code-block:: c
+
+	U_BOOT_DRIVER(spi_exynos) = {
+	...
+		.plat_auto = sizeof(struct exynos_spi_plat),
+
+
+Here is a sample function. It gets a pointer to the platform data and
+fills in the fields from device tree.
+
+.. code-block:: c
+
+	static int exynos_spi_of_to_plat(struct udevice *bus)
+	{
+		struct exynos_spi_plat *plat = bus->plat;
+		const void *blob = gd->fdt_blob;
+		int node = dev_of_offset(bus);
+
+		plat->regs = (struct exynos_spi *)fdtdec_get_addr(blob, node, "reg");
+		plat->periph_id = pinmux_decode_periph_id(blob, node);
+
+		if (plat->periph_id == PERIPH_ID_NONE) {
+			debug("%s: Invalid peripheral ID %d\n", __func__,
+				plat->periph_id);
+			return -FDT_ERR_NOTFOUND;
+		}
+
+		/* Use 500KHz as a suitable default */
+		plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency",
+						500000);
+		plat->deactivate_delay_us = fdtdec_get_int(blob, node,
+						"spi-deactivate-delay", 0);
+		debug("%s: regs=%p, periph_id=%d, max-frequency=%d, deactivate_delay=%d\n",
+		      __func__, plat->regs, plat->periph_id, plat->frequency,
+		      plat->deactivate_delay_us);
+
+		return 0;
+	}
+
+
+Add the platform data [non-device-tree only]
+--------------------------------------------
+
+Specify this data in a U_BOOT_DRVINFO() declaration in your board file:
+
+.. code-block:: c
+
+	struct exynos_spi_plat platdata_spi0 = {
+		.periph_id = ...
+		.frequency = ...
+		.regs = ...
+		.deactivate_delay_us = ...
+	};
+
+	U_BOOT_DRVINFO(board_spi0) = {
+		.name = "exynos_spi",
+		.plat = &platdata_spi0,
+	};
+
+You will unfortunately need to put the struct definition into a header file
+in this case so that your board file can use it.
+
+
+Add the device private data
+---------------------------
+
+Most devices have some private data which they use to keep track of things
+while active. This is the run-time information and needs to be stored in
+a structure. There is probably a structure in the driver that includes a
+'struct spi_slave', so you can use that.
+
+.. code-block:: c
+
+	struct exynos_spi_slave {
+		struct spi_slave slave;
+		struct exynos_spi *regs;
+		unsigned int freq;		/* Default frequency */
+		unsigned int mode;
+		enum periph_id periph_id;	/* Peripheral ID for this device */
+		unsigned int fifo_size;
+		int skip_preamble;
+		struct spi_bus *bus;		/* Pointer to our SPI bus info */
+		ulong last_transaction_us;	/* Time of last transaction end */
+	};
+
+
+We should rename this to make its purpose more obvious, and get rid of
+the slave structure, so we have:
+
+.. code-block:: c
+
+	struct exynos_spi_priv {
+		struct exynos_spi *regs;
+		unsigned int freq;		/* Default frequency */
+		unsigned int mode;
+		enum periph_id periph_id;	/* Peripheral ID for this device */
+		unsigned int fifo_size;
+		int skip_preamble;
+		ulong last_transaction_us;	/* Time of last transaction end */
+	};
+
+
+DM can auto-allocate this also:
+
+.. code-block:: c
+
+	U_BOOT_DRIVER(spi_exynos) = {
+	...
+		.priv_auto = sizeof(struct exynos_spi_priv),
+
+
+Note that this is created before the probe method is called, and destroyed
+after the remove method is called. It will be zeroed when the probe
+method is called.
+
+
+Add the probe() and remove() methods
+------------------------------------
+
+Note: It's a good idea to build repeatedly as you are working, to avoid a
+huge amount of work getting things compiling at the end.
+
+The probe method is supposed to set up the hardware. U-Boot used to use
+spi_setup_slave() to do this. So take a look at this function and see
+what you can copy out to set things up.
+
+.. code-block:: c
+
+	static int exynos_spi_probe(struct udevice *bus)
+	{
+		struct exynos_spi_plat *plat = dev_get_plat(bus);
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+
+		priv->regs = plat->regs;
+		if (plat->periph_id == PERIPH_ID_SPI1 ||
+		    plat->periph_id == PERIPH_ID_SPI2)
+			priv->fifo_size = 64;
+		else
+			priv->fifo_size = 256;
+
+		priv->skip_preamble = 0;
+		priv->last_transaction_us = timer_get_us();
+		priv->freq = plat->frequency;
+		priv->periph_id = plat->periph_id;
+
+		return 0;
+	}
+
+This implementation doesn't actually touch the hardware, which is somewhat
+unusual for a driver. In this case we will do that when the device is
+claimed by something that wants to use the SPI bus.
+
+For remove we could shut down the clocks, but in this case there is
+nothing to do. DM frees any memory that it allocated, so we can just
+remove exynos_spi_remove() and its reference in U_BOOT_DRIVER.
+
+
+Implement set_speed()
+---------------------
+
+This should set up clocks so that the SPI bus is running at the right
+speed. With the old API spi_claim_bus() would normally do this and several
+of the following functions, so let's look at that function:
+
+.. code-block:: c
+
+	int spi_claim_bus(struct spi_slave *slave)
+	{
+		struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
+		struct exynos_spi *regs = spi_slave->regs;
+		u32 reg = 0;
+		int ret;
+
+		ret = set_spi_clk(spi_slave->periph_id,
+						spi_slave->freq);
+		if (ret < 0) {
+			debug("%s: Failed to setup spi clock\n", __func__);
+			return ret;
+		}
+
+		exynos_pinmux_config(spi_slave->periph_id, PINMUX_FLAG_NONE);
+
+		spi_flush_fifo(slave);
+
+		reg = readl(&regs->ch_cfg);
+		reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L);
+
+		if (spi_slave->mode & SPI_CPHA)
+			reg |= SPI_CH_CPHA_B;
+
+		if (spi_slave->mode & SPI_CPOL)
+			reg |= SPI_CH_CPOL_L;
+
+		writel(reg, &regs->ch_cfg);
+		writel(SPI_FB_DELAY_180, &regs->fb_clk);
+
+		return 0;
+	}
+
+
+It sets up the speed, mode, pinmux, feedback delay and clears the FIFOs.
+With DM these will happen in separate methods.
+
+
+Here is an example for the speed part:
+
+.. code-block:: c
+
+	static int exynos_spi_set_speed(struct udevice *bus, uint speed)
+	{
+		struct exynos_spi_plat *plat = bus->plat;
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+		int ret;
+
+		if (speed > plat->frequency)
+			speed = plat->frequency;
+		ret = set_spi_clk(priv->periph_id, speed);
+		if (ret)
+			return ret;
+		priv->freq = speed;
+		debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq);
+
+		return 0;
+	}
+
+
+Implement set_mode()
+--------------------
+
+This should adjust the SPI mode (polarity, etc.). Again this code probably
+comes from the old spi_claim_bus(). Here is an example:
+
+.. code-block:: c
+
+	static int exynos_spi_set_mode(struct udevice *bus, uint mode)
+	{
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+		uint32_t reg;
+
+		reg = readl(&priv->regs->ch_cfg);
+		reg &= ~(SPI_CH_CPHA_B | SPI_CH_CPOL_L);
+
+		if (mode & SPI_CPHA)
+			reg |= SPI_CH_CPHA_B;
+
+		if (mode & SPI_CPOL)
+			reg |= SPI_CH_CPOL_L;
+
+		writel(reg, &priv->regs->ch_cfg);
+		priv->mode = mode;
+		debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode);
+
+		return 0;
+	}
+
+
+Implement claim_bus()
+---------------------
+
+This is where a client wants to make use of the bus, so claims it first.
+At this point we need to make sure everything is set up ready for data
+transfer. Note that this function is wholly internal to the driver - at
+present the SPI uclass never calls it.
+
+Here again we look at the old claim function and see some code that is
+needed. It is anything unrelated to speed and mode:
+
+.. code-block:: c
+
+	static int exynos_spi_claim_bus(struct udevice *bus)
+	{
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+
+		exynos_pinmux_config(priv->periph_id, PINMUX_FLAG_NONE);
+		spi_flush_fifo(priv->regs);
+
+		writel(SPI_FB_DELAY_180, &priv->regs->fb_clk);
+
+		return 0;
+	}
+
+The spi_flush_fifo() function is in the removed part of the code, so we
+need to expose it again (perhaps with an #endif before it and '#if 0'
+after it). It only needs access to priv->regs which is why we have
+passed that in:
+
+.. code-block:: c
+
+	/**
+	 * Flush spi tx, rx fifos and reset the SPI controller
+	 *
+	 * @param regs	Pointer to SPI registers
+	 */
+	static void spi_flush_fifo(struct exynos_spi *regs)
+	{
+		clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST);
+		clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
+		setbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON);
+	}
+
+
+Implement release_bus()
+-----------------------
+
+This releases the bus - in our example the old code in spi_release_bus()
+is a call to spi_flush_fifo, so we add:
+
+.. code-block:: c
+
+	static int exynos_spi_release_bus(struct udevice *bus)
+	{
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+
+		spi_flush_fifo(priv->regs);
+
+		return 0;
+	}
+
+
+Implement xfer()
+----------------
+
+This is the final method that we need to create, and it is where all the
+work happens. The method parameters are the same as the old spi_xfer() with
+the addition of a 'struct udevice' so conversion is pretty easy. Start
+by copying the contents of spi_xfer() to your new xfer() method and proceed
+from there.
+
+If (flags & SPI_XFER_BEGIN) is non-zero then xfer() normally calls an
+activate function, something like this:
+
+.. code-block:: c
+
+	void spi_cs_activate(struct spi_slave *slave)
+	{
+		struct exynos_spi_slave *spi_slave = to_exynos_spi(slave);
+
+		/* If it's too soon to do another transaction, wait */
+		if (spi_slave->bus->deactivate_delay_us &&
+		    spi_slave->last_transaction_us) {
+			ulong delay_us;		/* The delay completed so far */
+			delay_us = timer_get_us() - spi_slave->last_transaction_us;
+			if (delay_us < spi_slave->bus->deactivate_delay_us)
+				udelay(spi_slave->bus->deactivate_delay_us - delay_us);
+		}
+
+		clrbits_le32(&spi_slave->regs->cs_reg, SPI_SLAVE_SIG_INACT);
+		debug("Activate CS, bus %d\n", spi_slave->slave.bus);
+		spi_slave->skip_preamble = spi_slave->mode & SPI_PREAMBLE;
+	}
+
+The new version looks like this:
+
+.. code-block:: c
+
+	static void spi_cs_activate(struct udevice *dev)
+	{
+		struct udevice *bus = dev->parent;
+		struct exynos_spi_plat *pdata = dev_get_plat(bus);
+		struct exynos_spi_priv *priv = dev_get_priv(bus);
+
+		/* If it's too soon to do another transaction, wait */
+		if (pdata->deactivate_delay_us &&
+		    priv->last_transaction_us) {
+			ulong delay_us;		/* The delay completed so far */
+			delay_us = timer_get_us() - priv->last_transaction_us;
+			if (delay_us < pdata->deactivate_delay_us)
+				udelay(pdata->deactivate_delay_us - delay_us);
+		}
+
+		clrbits_le32(&priv->regs->cs_reg, SPI_SLAVE_SIG_INACT);
+		debug("Activate CS, bus '%s'\n", bus->name);
+		priv->skip_preamble = priv->mode & SPI_PREAMBLE;
+	}
+
+All we have really done here is change the pointers and print the device name
+instead of the bus number. Other local static functions can be treated in
+the same way.
+
+
+Set up the per-child data and child pre-probe function
+------------------------------------------------------
+
+To minimise the pain and complexity of the SPI subsystem while the driver
+model change-over is in place, struct spi_slave is used to reference a
+SPI bus slave, even though that slave is actually a struct udevice. In fact
+struct spi_slave is the device's child data. We need to make sure this space
+is available. It is possible to allocate more space that struct spi_slave
+needs, but this is the minimum.
+
+.. code-block:: c
+
+	U_BOOT_DRIVER(exynos_spi) = {
+	...
+		.per_child_auto	= sizeof(struct spi_slave),
+	}
+
+
+Optional: Set up cs_info() if you want it
+-----------------------------------------
+
+Sometimes it is useful to know whether a SPI chip select is valid, but this
+is not obvious from outside the driver. In this case you can provide a
+method for cs_info() to deal with this. If you don't provide it, then the
+device tree will be used to determine what chip selects are valid.
+
+Return -EINVAL if the supplied chip select is invalid, or 0 if it is valid.
+If you don't provide the cs_info() method, 0 is assumed for all chip selects
+that do not appear in the device tree.
+
+
+Test it
+-------
+
+Now that you have the code written and it compiles, try testing it using
+the 'sf test' command. You may need to enable CONFIG_CMD_SF_TEST for your
+board.
+
+
+Prepare patches and send them to the mailing lists
+--------------------------------------------------
+
+You can use 'tools/patman/patman' to prepare, check and send patches for
+your work. See tools/patman/README for details.
+
+A little note about SPI uclass features
+---------------------------------------
+
+The SPI uclass keeps some information about each device 'dev' on the bus:
+
+   struct dm_spi_slave_plat:
+     This is device_get_parent_plat(dev).
+     This is where the chip select number is stored, along with
+     the default bus speed and mode. It is automatically read
+     from the device tree in spi_child_post_bind(). It must not
+     be changed at run-time after being set up because platform
+     data is supposed to be immutable at run-time.
+   struct spi_slave:
+     This is device_get_parentdata(dev).
+     Already mentioned above. It holds run-time information about
+     the device.
+
+There are also some SPI uclass methods that get called behind the scenes:
+
+   spi_post_bind():
+     Called when a new bus is bound.
+     This scans the device tree for devices on the bus, and binds
+     each one. This in turn causes spi_child_post_bind() to be
+     called for each, which reads the device tree information
+     into the parent (per-child) platform data.
+   spi_child_post_bind():
+     Called when a new child is bound.
+     As mentioned above this reads the device tree information
+     into the per-child platform data
+   spi_child_pre_probe():
+     Called before a new child is probed.
+     This sets up the mode and speed in struct spi_slave by
+     copying it from the parent's platform data for this child.
+     It also sets the 'dev' pointer, needed to permit passing
+     'struct spi_slave' around the place without needing a
+     separate 'struct udevice' pointer.
+
+The above housekeeping makes it easier to write your SPI driver.
diff --git a/doc/develop/driver-model/usb-info.rst b/doc/develop/driver-model/usb-info.rst
new file mode 100644
index 00000000000..24d1e81a6c6
--- /dev/null
+++ b/doc/develop/driver-model/usb-info.rst
@@ -0,0 +1,423 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+How USB works with driver model
+===============================
+
+Introduction
+------------
+
+Driver model USB support makes use of existing features but changes how
+drivers are found. This document provides some information intended to help
+understand how things work with USB in U-Boot when driver model is enabled.
+
+
+Enabling driver model for USB
+-----------------------------
+
+A new CONFIG_DM_USB option is provided to enable driver model for USB. This
+causes the USB uclass to be included, and drops the equivalent code in
+usb.c. In particular the usb_init() function is then implemented by the
+uclass.
+
+
+Support for EHCI and XHCI
+-------------------------
+
+So far OHCI is not supported. Both EHCI and XHCI drivers should be declared
+as drivers in the USB uclass. For example:
+
+.. code-block:: c
+
+	static const struct udevice_id ehci_usb_ids[] = {
+		{ .compatible = "nvidia,tegra20-ehci", .data = USB_CTLR_T20 },
+		{ .compatible = "nvidia,tegra30-ehci", .data = USB_CTLR_T30 },
+		{ .compatible = "nvidia,tegra114-ehci", .data = USB_CTLR_T114 },
+		{ }
+	};
+
+	U_BOOT_DRIVER(usb_ehci) = {
+		.name	= "ehci_tegra",
+		.id	= UCLASS_USB,
+		.of_match = ehci_usb_ids,
+		.of_to_plat = ehci_usb_of_to_plat,
+		.probe = tegra_ehci_usb_probe,
+		.remove = tegra_ehci_usb_remove,
+		.ops	= &ehci_usb_ops,
+		.plat_auto = sizeof(struct usb_plat),
+		.priv_auto = sizeof(struct fdt_usb),
+		.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+	};
+
+Here ehci_usb_ids is used to list the controllers that the driver supports.
+Each has its own data value. Controllers must be in the UCLASS_USB uclass.
+
+The of_to_plat() method allows the controller driver to grab any
+necessary settings from the device tree.
+
+The ops here are ehci_usb_ops. All EHCI drivers will use these same ops in
+most cases, since they are all EHCI-compatible. For EHCI there are also some
+special operations that can be overridden when calling ehci_register().
+
+The driver can use priv_auto to set the size of its private data.
+This can hold run-time information needed by the driver for operation. It
+exists when the device is probed (not when it is bound) and is removed when
+the driver is removed.
+
+Note that usb_plat is currently only used to deal with setting up a bus
+in USB device mode (OTG operation). It can be omitted if that is not
+supported.
+
+The driver's probe() method should do the basic controller init and then
+call ehci_register() to register itself as an EHCI device. It should call
+ehci_deregister() in the remove() method. Registering a new EHCI device
+does not by itself cause the bus to be scanned.
+
+The old ehci_hcd_init() function is no-longer used. Nor is it necessary to
+set up the USB controllers from board init code. When 'usb start' is used,
+each controller will be probed and its bus scanned.
+
+XHCI works in a similar way.
+
+
+Data structures
+---------------
+
+The following primary data structures are in use:
+
+- struct usb_device:
+	This holds information about a device on the bus. All devices have
+	this structure, even the root hub. The controller itself does not
+	have this structure. You can access it for a device 'dev' with
+	dev_get_parent_priv(dev). It matches the old structure except that the
+	parent and child information is not present (since driver model
+	handles that). Once the device is set up, you can find the device
+	descriptor and current configuration descriptor in this structure.
+
+- struct usb_plat:
+	This holds platform data for a controller. So far this is only used
+	as a work-around for controllers which can act as USB devices in OTG
+	mode, since the gadget framework does not use driver model.
+
+- struct usb_dev_plat:
+	This holds platform data for a device. You can access it for a
+	device 'dev' with dev_get_parent_plat(dev). It holds the device
+	address and speed - anything that can be determined before the device
+	driver is actually set up. When probing the bus this structure is
+	used to provide essential information to the device driver.
+
+- struct usb_bus_priv:
+	This is private information for each controller, maintained by the
+	controller uclass. It is mostly used to keep track of the next
+	device address to use.
+
+Of these, only struct usb_device was used prior to driver model.
+
+
+USB buses
+---------
+
+Given a controller, you know the bus - it is the one attached to the
+controller. Each controller handles exactly one bus. Every controller has a
+root hub attached to it. This hub, which is itself a USB device, can provide
+one or more 'ports' to which additional devices can be attached. It is
+possible to power up a hub and find out which of its ports have devices
+attached.
+
+Devices are given addresses starting at 1. The root hub is always address 1,
+and from there the devices are numbered in sequence. The USB uclass takes
+care of this numbering automatically during enumeration.
+
+USB devices are enumerated by finding a device on a particular hub, and
+setting its address to the next available address. The USB bus stretches out
+in a tree structure, potentially with multiple hubs each with several ports
+and perhaps other hubs. Some hubs will have their own power since otherwise
+the 5V 500mA power supplied by the controller will not be sufficient to run
+very many devices.
+
+Enumeration in U-Boot takes a long time since devices are probed one at a
+time, and each is given sufficient time to wake up and announce itself. The
+timeouts are set for the slowest device.
+
+Up to 127 devices can be on each bus. USB has four bus speeds: low
+(1.5Mbps), full (12Mbps), high (480Mbps) which is only available with USB2
+and newer (EHCI), and super (5Gbps) which is only available with USB3 and
+newer (XHCI). If you connect a super-speed device to a high-speed hub, you
+will only get high-speed.
+
+
+USB operations
+--------------
+
+As before driver model, messages can be sent using submit_bulk_msg() and the
+like. These are now implemented by the USB uclass and route through the
+controller drivers. Note that messages are not sent to the driver of the
+device itself - i.e. they don't pass down the stack to the controller.
+U-Boot simply finds the controller to which the device is attached, and sends
+the message there with an appropriate 'pipe' value so it can be addressed
+properly. Having said that, the USB device which should receive the message
+is passed in to the driver methods, for use by sandbox. This design decision
+is open for review and the code impact of changing it is small since the
+methods are typically implemented by the EHCI and XHCI stacks.
+
+Controller drivers (in UCLASS_USB) themselves provide methods for sending
+each message type. For XHCI an additional alloc_device() method is provided
+since XHCI needs to allocate a device context before it can even read the
+device's descriptor.
+
+These methods use a 'pipe' which is a collection of bit fields used to
+describe the type of message, direction of transfer and the intended
+recipient (device number).
+
+
+USB Devices
+-----------
+
+USB devices are found using a simple algorithm which works through the
+available hubs in a depth-first search. Devices can be in any uclass, but
+are attached to a parent hub (or controller in the case of the root hub) and
+so have parent data attached to them (this is struct usb_device).
+
+By the time the device's probe() method is called, it is enumerated and is
+ready to talk to the host.
+
+The enumeration process needs to work out which driver to attach to each USB
+device. It does this by examining the device class, interface class, vendor
+ID, product ID, etc. See struct usb_driver_entry for how drivers are matched
+with USB devices - you can use the USB_DEVICE() macro to declare a USB
+driver. For example, usb_storage.c defines a USB_DEVICE() to handle storage
+devices, and it will be used for all USB devices which match.
+
+
+
+Technical details on enumeration flow
+-------------------------------------
+
+It is useful to understand precisely how a USB bus is enumerating to avoid
+confusion when dealing with USB devices.
+
+Device initialisation happens roughly like this:
+
+- At some point the 'usb start' command is run
+- This calls usb_init() which works through each controller in turn
+- The controller is probed(). This does no enumeration.
+- Then usb_scan_bus() is called. This calls usb_scan_device() to scan the
+  (only) device that is attached to the controller - a root hub
+- usb_scan_device() sets up a fake struct usb_device and calls
+  usb_setup_device(), passing the port number to be scanned, in this case
+  port 0
+- usb_setup_device() first calls usb_prepare_device() to set the device
+  address, then usb_select_config() to select the first configuration
+- at this point the device is enumerated but we do not have a real struct
+  udevice for it. But we do have the descriptor in struct usb_device so we can
+  use this to figure out what driver to use
+- back in usb_scan_device(), we call usb_find_child() to try to find an
+  existing device which matches the one we just found on the bus. This can
+  happen if the device is mentioned in the device tree, or if we previously
+  scanned the bus and so the device was created before
+- if usb_find_child() does not find an existing device, we call
+  usb_find_and_bind_driver() which tries to bind one
+- usb_find_and_bind_driver() searches all available USB drivers (declared
+  with USB_DEVICE()). If it finds a match it binds that driver to create a
+  new device.
+- If it does not, it binds a generic driver. A generic driver is good enough
+  to allow access to the device (sending it packets, etc.) but all
+  functionality will need to be implemented outside the driver model.
+- in any case, when usb_find_child() and/or usb_find_and_bind_driver() are
+  done, we have a device with the correct uclass. At this point we want to
+  probe the device
+- first we store basic information about the new device (address, port,
+  speed) in its parent platform data. We cannot store it its private data
+  since that will not exist until the device is probed.
+- then we call device_probe() which probes the device
+- the first probe step is actually the USB controller's (or USB hubs's)
+  child_pre_probe() method. This gets called before anything else and is
+  intended to set up a child device ready to be used with its parent bus. For
+  USB this calls usb_child_pre_probe() which grabs the information that was
+  stored in the parent platform data and stores it in the parent private data
+  (which is struct usb_device, a real one this time). It then calls
+  usb_select_config() again to make sure that everything about the device is
+  set up
+- note that we have called usb_select_config() twice. This is inefficient
+  but the alternative is to store additional information in the platform data.
+  The time taken is minimal and this way is simpler
+- at this point the device is set up and ready for use so far as the USB
+  subsystem is concerned
+- the device's probe() method is then called. It can send messages and do
+  whatever else it wants to make the device work.
+
+Note that the first device is always a root hub, and this must be scanned to
+find any devices. The above steps will have created a hub (UCLASS_USB_HUB),
+given it address 1 and set the configuration.
+
+For hubs, the hub uclass has a post_probe() method. This means that after
+any hub is probed, the uclass gets to do some processing. In this case
+usb_hub_post_probe() is called, and the following steps take place:
+
+- usb_hub_post_probe() calls usb_hub_scan() to scan the hub, which in turn
+  calls usb_hub_configure()
+- hub power is enabled
+- we loop through each port on the hub, performing the same steps for each
+- first, check if there is a device present. This happens in
+  usb_hub_port_connect_change(). If so, then usb_scan_device() is called to
+  scan the device, passing the appropriate port number.
+- you will recognise usb_scan_device() from the steps above. It sets up the
+  device ready for use. If it is a hub, it will scan that hub before it
+  continues here (recursively, depth-first)
+- once all hub ports are scanned in this way, the hub is ready for use and
+  all of its downstream devices also
+- additional controllers are scanned in the same way
+
+The above method has some nice properties:
+
+- the bus enumeration happens by virtue of driver model's natural device flow
+- most logic is in the USB controller and hub uclasses; the actual device
+  drivers do not need to know they are on a USB bus, at least so far as
+  enumeration goes
+- hub scanning happens automatically after a hub is probed
+
+
+Hubs
+----
+
+USB hubs are scanned as in the section above. While hubs have their own
+uclass, they share some common elements with controllers:
+
+- they both attach private data to their children (struct usb_device,
+  accessible for a child with dev_get_parent_priv(child))
+- they both use usb_child_pre_probe() to set up their children as proper USB
+  devices
+
+
+Example - Mass Storage
+----------------------
+
+As an example of a USB device driver, see usb_storage.c. It uses its own
+uclass and declares itself as follows:
+
+.. code-block:: c
+
+	U_BOOT_DRIVER(usb_mass_storage) = {
+		.name	= "usb_mass_storage",
+		.id	= UCLASS_MASS_STORAGE,
+		.of_match = usb_mass_storage_ids,
+		.probe = usb_mass_storage_probe,
+	};
+
+	static const struct usb_device_id mass_storage_id_table[] = {
+		{ .match_flags = USB_DEVICE_ID_MATCH_INT_CLASS,
+		  .bInterfaceClass = USB_CLASS_MASS_STORAGE},
+		{ }	/* Terminating entry */
+	};
+
+	USB_DEVICE(usb_mass_storage, mass_storage_id_table);
+
+The USB_DEVICE() macro attaches the given table of matching information to
+the given driver. Note that the driver is declared in U_BOOT_DRIVER() as
+'usb_mass_storage' and this must match the first parameter of USB_DEVICE.
+
+When usb_find_and_bind_driver() is called on a USB device with the
+bInterfaceClass value of USB_CLASS_MASS_STORAGE, it will automatically find
+this driver and use it.
+
+
+Counter-example: USB Ethernet
+-----------------------------
+
+As an example of the old way of doing things, see usb_ether.c. When the bus
+is scanned, all Ethernet devices will be created as generic USB devices (in
+uclass UCLASS_USB_DEV_GENERIC). Then, when the scan is completed,
+usb_host_eth_scan() will be called. This looks through all the devices on
+each bus and manually figures out which are Ethernet devices in the ways of
+yore.
+
+In fact, usb_ether should be moved to driver model. Each USB Ethernet driver
+(e.g drivers/usb/eth/asix.c) should include a USB_DEVICE() declaration, so
+that it will be found as part of normal USB enumeration. Then, instead of a
+generic USB driver, a real (driver-model-aware) driver will be used. Since
+Ethernet now supports driver model, this should be fairly easy to achieve,
+and then usb_ether.c and the usb_host_eth_scan() will melt away.
+
+
+Sandbox
+-------
+
+All driver model uclasses must have tests and USB is no exception. To
+achieve this, a sandbox USB controller is provided. This can make use of
+emulation drivers which pretend to be USB devices. Emulations are provided
+for a hub and a flash stick. These are enough to create a pretend USB bus
+(defined by the sandbox device tree sandbox.dts) which can be scanned and
+used.
+
+Tests in test/dm/usb.c make use of this feature. It allows much of the USB
+stack to be tested without real hardware being needed.
+
+Here is an example device tree fragment:
+
+.. code-block:: none
+
+	usb@1 {
+		compatible = "sandbox,usb";
+		hub {
+			compatible = "usb-hub";
+			usb,device-class = <USB_CLASS_HUB>;
+			hub-emul {
+				compatible = "sandbox,usb-hub";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				flash-stick {
+					reg = <0>;
+					compatible = "sandbox,usb-flash";
+					sandbox,filepath = "flash.bin";
+				};
+			};
+		};
+	};
+
+This defines a single controller, containing a root hub (which is required).
+The hub is emulated by a hub emulator, and the emulated hub has a single
+flash stick to emulate on one of its ports.
+
+When 'usb start' is used, the following 'dm tree' output will be available::
+
+   usb         [ + ]    `-- usb@1
+   usb_hub     [ + ]        `-- hub
+   usb_emul    [ + ]            |-- hub-emul
+   usb_emul    [ + ]            |   `-- flash-stick
+   usb_mass_st [ + ]            `-- usb_mass_storage
+
+
+This may look confusing. Most of it mirrors the device tree, but the
+'usb_mass_storage' device is not in the device tree. This is created by
+usb_find_and_bind_driver() based on the USB_DRIVER in usb_storage.c. While
+'flash-stick' is the emulation device, 'usb_mass_storage' is the real U-Boot
+USB device driver that talks to it.
+
+
+Future work
+-----------
+
+It is pretty uncommon to have a large USB bus with lots of hubs on an
+embedded system. In fact anything other than a root hub is uncommon. Still
+it would be possible to speed up enumeration in two ways:
+
+- breadth-first search would allow devices to be reset and probed in
+  parallel to some extent
+- enumeration could be lazy, in the sense that we could enumerate just the
+  root hub at first, then only progress to the next 'level' when a device is
+  used that we cannot find. This could be made easier if the devices were
+  statically declared in the device tree (which is acceptable for production
+  boards where the same, known, things are on each bus).
+
+But in common cases the current algorithm is sufficient.
+
+Other things that need doing:
+- Convert usb_ether to use driver model as described above
+- Test that keyboards work (and convert to driver model)
+- Move the USB gadget framework to driver model
+- Implement OHCI in driver model
+- Implement USB PHYs in driver model
+- Work out a clever way to provide lazy init for USB devices
+
+
+.. Simon Glass <sjg@chromium.org>
+.. 23-Mar-15
diff --git a/doc/develop/driver-model/virtio.rst b/doc/develop/driver-model/virtio.rst
new file mode 100644
index 00000000000..8ac9c94cafe
--- /dev/null
+++ b/doc/develop/driver-model/virtio.rst
@@ -0,0 +1,287 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
+
+VirtIO Support
+==============
+
+This document describes the information about U-Boot support for VirtIO_
+devices, including supported boards, build instructions, driver details etc.
+
+What's VirtIO?
+--------------
+VirtIO is a virtualization standard for network and disk device drivers where
+just the guest's device driver "knows" it is running in a virtual environment,
+and cooperates with the hypervisor. This enables guests to get high performance
+network and disk operations, and gives most of the performance benefits of
+paravirtualization. In the U-Boot case, the guest is U-Boot itself, while the
+virtual environment are normally QEMU_ targets like ARM, RISC-V and x86.
+
+Status
+------
+VirtIO can use various different buses, aka transports as described in the
+spec. While VirtIO devices are commonly implemented as PCI devices on x86,
+embedded devices models like ARM/RISC-V, which does not normally come with
+PCI support might use simple memory mapped device (MMIO) instead of the PCI
+device. The memory mapped virtio device behaviour is based on the PCI device
+specification. Therefore most operations including device initialization,
+queues configuration and buffer transfers are nearly identical. Both MMIO
+and PCI transport options are supported in U-Boot.
+
+The VirtIO spec defines a lots of VirtIO device types, however at present only
+network and block device, the most two commonly used devices, are supported.
+
+The following QEMU targets are supported.
+
+  - qemu_arm_defconfig
+  - qemu_arm64_defconfig
+  - qemu-riscv32_defconfig
+  - qemu-riscv64_defconfig
+  - qemu-x86_defconfig
+  - qemu-x86_64_defconfig
+
+Note ARM and RISC-V targets are configured with VirtIO MMIO transport driver,
+and on x86 it's the PCI transport driver.
+
+Build Instructions
+------------------
+Building U-Boot for pre-configured QEMU targets is no different from others.
+For example, we can do the following with the CROSS_COMPILE environment
+variable being properly set to a working toolchain for ARM:
+
+.. code-block:: bash
+
+  $ make qemu_arm_defconfig
+  $ make
+
+You can even create a QEMU ARM target with VirtIO devices showing up on both
+MMIO and PCI buses. In this case, you can enable the PCI transport driver
+from 'make menuconfig':
+
+.. code-block:: none
+
+  Device Drivers  --->
+  	...
+  	VirtIO Drivers  --->
+  		...
+  		[*] PCI driver for virtio devices
+
+Other drivers are at the same location and can be tuned to suit the needs.
+
+Requirements
+------------
+It is required that QEMU v2.5.0+ should be used to test U-Boot VirtIO support
+on QEMU ARM and x86, and v2.12.0+ on QEMU RISC-V.
+
+Testing
+-------
+The following QEMU command line is used to get U-Boot up and running with
+VirtIO net and block devices on ARM.
+
+.. code-block:: bash
+
+  $ qemu-system-arm -nographic -machine virt -bios u-boot.bin \
+    -netdev tap,ifname=tap0,id=net0 \
+    -device virtio-net-device,netdev=net0 \
+    -drive if=none,file=test.img,format=raw,id=hd0 \
+    -device virtio-blk-device,drive=hd0
+
+On x86, command is slightly different to create PCI VirtIO devices.
+
+.. code-block:: bash
+
+  $ qemu-system-i386 -nographic -bios u-boot.rom \
+    -netdev tap,ifname=tap0,id=net0 \
+    -device virtio-net-pci,netdev=net0 \
+    -drive if=none,file=test.img,format=raw,id=hd0 \
+    -device virtio-blk-pci,drive=hd0
+
+Additional net and block devices can be created by appending more '-device'
+parameters. It is also possible to specify both MMIO and PCI VirtIO devices.
+For example, the following commnad creates 3 VirtIO devices, with 1 on MMIO
+and 2 on PCI bus.
+
+.. code-block:: bash
+
+  $ qemu-system-arm -nographic -machine virt -bios u-boot.bin \
+    -netdev tap,ifname=tap0,id=net0 \
+    -device virtio-net-pci,netdev=net0 \
+    -drive if=none,file=test0.img,format=raw,id=hd0 \
+    -device virtio-blk-device,drive=hd0 \
+    -drive if=none,file=test1.img,format=raw,id=hd1 \
+    -device virtio-blk-pci,drive=hd1
+
+By default QEMU creates VirtIO legacy devices by default. To create non-legacy
+(aka modern) devices, pass additional device property/value pairs like below:
+
+.. code-block:: bash
+
+  $ qemu-system-i386 -nographic -bios u-boot.rom \
+    -netdev tap,ifname=tap0,id=net0 \
+    -device virtio-net-pci,netdev=net0,disable-legacy=true,disable-modern=false \
+    -drive if=none,file=test.img,format=raw,id=hd0 \
+    -device virtio-blk-pci,drive=hd0,disable-legacy=true,disable-modern=false
+
+A 'virtio' command is provided in U-Boot shell.
+
+.. code-block:: none
+
+  => virtio
+  virtio - virtio block devices sub-system
+
+  Usage:
+  virtio scan - initialize virtio bus
+  virtio info - show all available virtio block devices
+  virtio device [dev] - show or set current virtio block device
+  virtio part [dev] - print partition table of one or all virtio block devices
+  virtio read addr blk# cnt - read `cnt' blocks starting at block
+       `blk#' to memory address `addr'
+  virtio write addr blk# cnt - write `cnt' blocks starting at block
+       `blk#' from memory address `addr'
+
+To probe all the VirtIO devices, type:
+
+.. code-block:: none
+
+  => virtio scan
+
+Then we can show the connected block device details by:
+
+.. code-block:: none
+
+  => virtio info
+  Device 0: QEMU VirtIO Block Device
+              Type: Hard Disk
+              Capacity: 4096.0 MB = 4.0 GB (8388608 x 512)
+
+And list the directories and files on the disk by:
+
+.. code-block:: none
+
+  => ls virtio 0 /
+  <DIR>       4096 .
+  <DIR>       4096 ..
+  <DIR>      16384 lost+found
+  <DIR>       4096 dev
+  <DIR>       4096 proc
+  <DIR>       4096 sys
+  <DIR>       4096 var
+  <DIR>       4096 etc
+  <DIR>       4096 usr
+  <SYM>          7 bin
+  <SYM>          8 sbin
+  <SYM>          7 lib
+  <SYM>          9 lib64
+  <DIR>       4096 run
+  <DIR>       4096 boot
+  <DIR>       4096 home
+  <DIR>       4096 media
+  <DIR>       4096 mnt
+  <DIR>       4096 opt
+  <DIR>       4096 root
+  <DIR>       4096 srv
+  <DIR>       4096 tmp
+                 0 .autorelabel
+
+Driver Internals
+----------------
+There are 3 level of drivers in the VirtIO driver family.
+
+.. code-block:: none
+
+	+---------------------------------------+
+	|	 virtio device drivers		|
+	|    +-------------+ +------------+	|
+	|    | virtio-net  | | virtio-blk |	|
+	|    +-------------+ +------------+	|
+	+---------------------------------------+
+	+---------------------------------------+
+	|	virtio transport drivers	|
+	|    +-------------+ +------------+	|
+	|    | virtio-mmio | | virtio-pci |	|
+	|    +-------------+ +------------+	|
+	+---------------------------------------+
+		+----------------------+
+		| virtio uclass driver |
+		+----------------------+
+
+The root one is the virtio uclass driver (virtio-uclass.c), which does lots of
+common stuff for the transport drivers (virtio_mmio.c, virtio_pci.c). The real
+virtio device is discovered in the transport driver's probe() method, and its
+device ID is saved in the virtio uclass's private data of the transport device.
+Then in the virtio uclass's post_probe() method, the real virtio device driver
+(virtio_net.c, virtio_blk.c) is bound if there is a match on the device ID.
+
+The child_post_bind(), child_pre_probe() and child_post_probe() methods of the
+virtio uclass driver help bring the virtio device driver online. They do things
+like acknowledging device, feature negotiation, etc, which are really common
+for all virtio devices.
+
+The transport drivers provide a set of ops (struct dm_virtio_ops) for the real
+virtio device driver to call. These ops APIs's parameter is designed to remind
+the caller to pass the correct 'struct udevice' id of the virtio device, eg:
+
+.. code-block:: C
+
+  int virtio_get_status(struct udevice *vdev, u8 *status)
+
+So the parameter 'vdev' indicates the device should be the real virtio device.
+But we also have an API like:
+
+.. code-block:: C
+
+  struct virtqueue *vring_create_virtqueue(unsigned int index, unsigned int num,
+  					 unsigned int vring_align,
+  					 struct udevice *udev)
+
+Here the parameter 'udev' indicates the device should be the transport device.
+Similar naming is applied in other functions that are even not APIs, eg:
+
+.. code-block:: C
+
+  static int virtio_uclass_post_probe(struct udevice *udev)
+  static int virtio_uclass_child_pre_probe(struct udevice *vdev)
+
+So it's easy to tell which device these functions are operating on.
+
+Development Flow
+----------------
+At present only VirtIO network card (device ID 1) and block device (device
+ID 2) are supported. If you want to develop new driver for new devices,
+please follow the guideline below.
+
+1. add new device ID in virtio.h
+
+.. code-block:: C
+
+  #define VIRTIO_ID_XXX		X
+
+2. update VIRTIO_ID_MAX_NUM to be the largest device ID plus 1
+
+3. add new driver name string in virtio.h
+
+.. code-block:: C
+
+  #define VIRTIO_XXX_DRV_NAME	"virtio-xxx"
+
+4. create a new driver with name set to the name string above
+
+.. code-block:: C
+
+  U_BOOT_DRIVER(virtio_xxx) = {
+  	.name = VIRTIO_XXX_DRV_NAME,
+  	...
+  	.remove = virtio_reset,
+  	.flags = DM_FLAG_ACTIVE_DMA,
+  }
+
+Note the driver needs to provide the remove method and normally this can be
+hooked to virtio_reset(). The driver flags should contain DM_FLAG_ACTIVE_DMA
+for the remove method to be called before jumping to OS.
+
+5. provide bind() method in the driver, where virtio_driver_features_init()
+   should be called for driver to negotiate feature support with the device.
+
+6. do funny stuff with the driver
+
+.. _VirtIO: http://docs.oasis-open.org/virtio/virtio/v1.0/virtio-v1.0.pdf
+.. _QEMU: https://www.qemu.org
diff --git a/doc/develop/environment.rst b/doc/develop/environment.rst
new file mode 100644
index 00000000000..e1783462bb0
--- /dev/null
+++ b/doc/develop/environment.rst
@@ -0,0 +1,51 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Environment implementation
+==========================
+
+See :doc:`../usage/environment` for usage information.
+
+Callback functions for environment variables
+--------------------------------------------
+
+For some environment variables, the behavior of u-boot needs to change
+when their values are changed.  This functionality allows functions to
+be associated with arbitrary variables.  On creation, overwrite, or
+deletion, the callback will provide the opportunity for some side
+effect to happen or for the change to be rejected.
+
+The callbacks are named and associated with a function using the
+U_BOOT_ENV_CALLBACK macro in your board or driver code.
+
+These callbacks are associated with variables in one of two ways.  The
+static list can be added to by defining CFG_ENV_CALLBACK_LIST_STATIC
+in the board configuration to a string that defines a list of
+associations.  The list must be in the following format::
+
+    entry = variable_name[:callback_name]
+    list = entry[,list]
+
+If the callback name is not specified, then the callback is deleted.
+Spaces are also allowed anywhere in the list.
+
+Callbacks can also be associated by defining the ".callbacks" variable
+with the same list format above.  Any association in ".callbacks" will
+override any association in the static list. You can define
+CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the
+".callbacks" environment variable in the default or embedded environment.
+
+If CONFIG_REGEX is defined, the variable_name above is evaluated as a
+regular expression. This allows multiple variables to be connected to
+the same callback without explicitly listing them all out.
+
+The signature of the callback functions is::
+
+    int callback(const char *name, const char *value, enum env_op op, int flags)
+
+* name - changed environment variable
+* value - new value of the environment variable
+* op - operation (create, overwrite, or delete)
+* flags - attributes of the environment variable change, see flags H_* in
+  include/search.h
+
+The return value is 0 if the variable change is accepted and 1 otherwise.
diff --git a/doc/develop/event.rst b/doc/develop/event.rst
new file mode 100644
index 00000000000..d5043ec4f4c
--- /dev/null
+++ b/doc/develop/event.rst
@@ -0,0 +1,108 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Events
+======
+
+U-Boot supports a way for various events to be handled by interested
+subsystems. This provide a generic way to handle 'hooks' like setting up the
+CPUs after driver model is active, or reading a partition table after a new
+block device is probed.
+
+Rather than using weak functions and direct calls across subsystemss, it is
+often easier to use an event.
+
+An event consists of a type (e.g. EVT_DM_POST_INIT_F) and some optional data,
+in `union event_data`. An event spy can be created to watch for events of a
+particular type. When the event is created, it is sent to each spy in turn.
+
+
+Declaring a spy
+---------------
+
+To declare a spy, use something like this::
+
+    static int snow_check_temperature(void)
+    {
+        /* do something */
+        return 0;
+    }
+    EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, snow_check_temperature);
+
+This function is called when EVT_DM_POST_INIT_F is emitted, i.e. after the
+driver model is initialized (in U-Boot proper before and after relocation).
+
+If you need access to the event data, use `EVENT_SPY_FULL`, like this::
+
+    static int snow_setup_cpus(void *ctx, struct event *event)
+    {
+        /* do something that uses event->data*/
+        return 0;
+    }
+    EVENT_SPY_FULL(EVT_DM_POST_INIT_F, snow_setup_cpus);
+
+Note that the context is always NULL for a static spy. See below for information
+about how to use a dynamic spy.
+
+The return value is handled by the event emitter. If non-zero, then the error
+is returned to the function which emitted the event, i.e. the one that called
+`event_notify()`.
+
+Debugging
+---------
+
+To assist with debugging events, enable `CONFIG_EVENT_DEBUG` and
+`CONFIG_CMD_EVENT`. The :doc:`../usage/cmd/event` command can then be used to
+provide a spy list.
+
+It is also possible to list spy information from the U-Boot executable,, using
+the `event_dump.py` script::
+
+    $ scripts/event_dump.py /tmp/b/sandbox/u-boot
+    Event type            Id                              Source location
+    --------------------  ------------------------------  ------------------------------
+    EVT_MISC_INIT_F       f:sandbox_misc_init_f           arch/sandbox/cpu/start.c:125
+
+This shows each event spy in U-Boot, along with the event type, function name
+(or ID) and source location.
+
+Note that if `CONFIG_EVENT_DEBUG` is not enabled, the event ID is missing, so
+the function is shown instead (with an `f:` prefix as above). Since the ID is
+generally the same as the function name, this does not matter much.
+
+The event type is decoded by the symbol used by U-Boot for the event linker
+list. Symbols have the form::
+
+    _u_boot_list_2_evspy_info_2_EVT_MISC_INIT_F
+
+so the event type can be read from the end. To manually list spy information
+in an image, use $(CROSS_COMPILE)nm::
+
+    nm u-boot |grep evspy |grep list
+    00000000002d6300 D _u_boot_list_2_evspy_info_2_EVT_MISC_INIT_F
+
+Logging is also available. Events use category `LOGC_EVENT`, so you can enable
+logging on that, or add `#define LOG_DEBUG` to the top of `common/event.c` to
+see events being sent.
+
+
+Dynamic events
+--------------
+
+Static events provide a way of dealing with events known at build time. In some
+cases we want to attach an event handler at runtime. For example, we may wish
+to be notified when a particular device is probed or removed.
+
+This can be handled by enabling `CONFIG_EVENT_DYNAMIC`. It is then possible to
+call `event_register()` to register a new handler for a particular event.
+
+If some context is need for the spy, you can pass a pointer to
+`event_register()` to provide that. Note that the context is only passed to
+a spy registered with `EVENT_SPY_FULL`.
+
+Dynamic event handlers are called after all the static event spy handlers have
+been processed. Of course, since dynamic event handlers are created at runtime
+it is not possible to use the `event_dump.py` to see them.
+
+At present there is no way to list dynamic event handlers from the command line,
+nor to deregister a dynamic event handler. These features can be added when
+needed.
diff --git a/doc/develop/expo.rst b/doc/develop/expo.rst
new file mode 100644
index 00000000000..c87b6ec8128
--- /dev/null
+++ b/doc/develop/expo.rst
@@ -0,0 +1,529 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Expo menu
+=========
+
+U-Boot provides a menu implementation for use with selecting bootflows and
+changing U-Boot settings. This is in early stages of development.
+
+Motivation
+----------
+
+U-Boot already has a text-based menu system accessed via the
+:doc:`../usage/cmd/bootmenu`. This works using environment variables, or via
+some EFI-specific hacks.
+
+The command makes use of a lower-level `menu` implementation, which is quite
+flexible and can be used to make menu hierarchies.
+
+However this system is not flexible enough for use with standard boot. It does
+not support a graphical user interface and cannot currently support anything
+more than a very simple list of items. While it does support multiple menus in
+hierarchies, these are implemented by the caller. See for example `eficonfig.c`.
+
+Another challenge with the current menu implementation is that it controls
+the event loop, such that bootmenu_loop() does not return until a key is
+pressed. This makes it difficult to implement dynamic displays or to do other
+things while the menu is running, such as searching for more bootflows.
+
+For these reasons an attempt has been made to develop a more flexible system
+which can handle menus as well as other elements. This is called 'expo', short
+for exposition, in an attempt to avoid common words like display, screen, menu
+and the like. The primary goal is to support Verified Boot for Embedded (VBE),
+although it is available to any boot method, using the 'bootflow menu' command.
+
+Efforts have been made to use common code with the existing menu, including
+key processing in particular.
+
+Previous work looked at integrating Nuklear into U-Boot. This works fine and
+could provide a way to provide a more flexible UI, perhaps with expo dealing
+with the interface to Nuklear. But this is quite a big step and it may be years
+before this becomes desirable, if at all. For now, U-Boot only needs a fairly
+simple set of menus and options, so rendering them directly is fairly
+straightforward.
+
+Concepts
+--------
+
+The creator of the expo is here called a `controller` and it controls most
+aspects of the expo. This is the code that you must write to use expo.
+
+An `expo` is a set of scenes which can be presented to the user one at a time,
+to show information and obtain input from the user.
+
+A `scene` is a collection of objects which are displayed together on the screen.
+Only one scene is visible at a time and scenes do not share objects.
+
+A `scene object` is something that appears in the scene, such as some text, an
+image or a menu. Objects can be positioned and hidden.
+
+A `menu object` contains a title, a set of `menu items` and a pointer to the
+current item. Menu items consist of a keypress (indicating what to press to
+select the item), label and description. All three are shown in a single line
+within the menu. Items can also have a preview image, which is shown when the
+item is highlighted.
+
+A `textline object` contains a label and an editable string.
+
+All components have a name. This is mostly for debugging, so it is easy to see
+what object is referred to, although the name is also used for saving values.
+Of course the ID numbers can help as well, but they are less easy to
+distinguish.
+
+While the expo implementation provides support for handling keypresses and
+rendering on the display or serial port, it does not actually deal with reading
+input from the user, nor what should be done when a particular menu item is
+selected. This is deliberate since having the event loop outside the expo is
+more flexible, particularly in a single-threaded environment like U-Boot.
+
+Everything within an expo has a unique ID number. This is done so that it is
+easy to refer to things after the expo has been created. The expectation is that
+the controller declares an enum containing all of the elements in the expo,
+passing the ID of each object as it is created. When a menu item is selected,
+its ID is returned. When a object's font or position needs to change, the ID is
+passed to expo functions to indicate which object it is. It is possible for expo
+to auto-allocate IDs, but this is not recommended. The use of IDs is a
+convenience, removing the need for the controller to store pointers to objects,
+or even the IDs of objects. Programmatic creation of many items in a loop can be
+handled by allocating space in the enum for a maximum number of items, then
+adding the loop count to the enum values to obtain unique IDs.
+
+Where dynamic IDs are need, use expo_set_dynamic_start() to set the start value,
+so that they are allocated above the starting (enum) IDs.
+
+All text strings are stored in a structure attached to the expo, referenced by
+a text ID. This makes it easier at some point to implement multiple languages or
+to support Unicode strings.
+
+Menu objects do not have their own text and image objects. Instead they simply
+refer to objects which have been created. So a menu item is just a collection
+of IDs of text and image objects. When adding a menu item you must create these
+objects first, then create the menu item, passing in the relevant IDs.
+
+Creating an expo
+----------------
+
+To create an expo programmatically, use `expo_new()` followed by `scene_new()`
+to create a scene. Then add objects to the scene, using functions like
+`scene_txt_str()` and `scene_menu()`. For every menu item, add text and image
+objects, then create the menu item with `scene_menuitem()`, referring to those
+objects.
+
+To create an expo using a description file, see :ref:`expo_format` below.
+
+Layout
+------
+
+Individual objects can be positioned using `scene_obj_set_pos()`. Menu items
+cannot be positioned manually: this is done by `scene_arrange()` which is called
+automatically when something changes. The menu itself determines the position of
+its items.
+
+Rendering
+---------
+
+Rendering is performed by calling `expo_render()`. This uses either the
+vidconsole, if present, or the serial console in `text mode`. Expo handles
+presentation automatically in either case, without any change in how the expo is
+created.
+
+For the vidconsole, Truetype fonts can be used if enabled, to enhance the
+quality of the display. For text mode, each menu item is shown in a single line,
+allowing easy selection using arrow keys.
+
+Input
+-----
+
+The controller is responsible for collecting keyboard input. A good way to do
+this is to use `cli_ch_process()`, since it handles conversion of escape
+sequences into keys. However, expo has some special menu-key codes for
+navigating the interface. These are defined in `enum bootmenu_key` and include
+`BKEY_UP` for moving up and `BKEY_SELECT` for selecting an item. You can use
+`bootmenu_conv_key()` to convert an ASCII key into one of these, but if it
+returns a value >= `BKEY_FIRST_EXTRA` then you should pass the unmodified ASCII
+key to the expo, since it may be used by textline objects.
+
+Once a keypress is decoded, call `expo_send_key()` to send it to the expo. This
+may cause an update to the expo state and may produce an action.
+
+Actions
+-------
+
+Call `expo_action_get()` in the event loop to check for any actions that the
+expo wants to report. These can include selecting a particular menu item, or
+quitting the menu. Processing of these is the responsibility of your controller.
+
+Event loop
+----------
+
+Expo is intended to be used in an event loop. For an example loop, see
+`bootflow_menu_run()`. It is possible to perform other work in your event loop,
+such as scanning devices for more bootflows.
+
+Themes
+------
+
+Expo supports simple themes, for setting the font size, for example. Use the
+expo_apply_theme() function to load a theme, passing a node with the required
+properties:
+
+font-size
+    Font size to use for all text (type: u32)
+
+menu-inset
+    Number of pixels to inset the menu on the sides and top (type: u32)
+
+menuitem-gap-y
+    Number of pixels between menu items
+
+Pop-up mode
+-----------
+
+Expos support two modes. The simple mode is used for selecting from a single
+menu, e.g. when choosing with OS to boot. In this mode the menu items are shown
+in a list (label, > pointer, key and description) and can be chosen using arrow
+keys and enter::
+
+   U-Boot Boot Menu
+
+   UP and DOWN to choose, ENTER to select
+
+   mmc1           > 0  Fedora-Workstation-armhfp-31-1.9
+   mmc3             1  Armbian
+
+The popup mode allows multiple menus to be present in a scene. Each is shown
+just as its title and label, as with the `CPU Speed` and `AC Power` menus here::
+
+              Test Configuration
+
+
+   CPU Speed        <2 GHz>  (highlighted)
+
+   AC Power         Always Off
+
+
+     UP and DOWN to choose, ENTER to select
+
+
+.. _expo_format:
+
+Expo Format
+-----------
+
+It can be tedious to create a complex expo using code. Expo supports a
+data-driven approach, where the expo description is in a devicetree file. This
+makes it easier and faster to create and edit the description. An expo builder
+is provided to convert this format into an expo structure.
+
+Layout of the expo scenes is handled automatically, based on a set of simple
+rules. The :doc:`../usage/cmd/cedit` can be used to load a configuration
+and create an expo from it.
+
+Top-level node
+~~~~~~~~~~~~~~
+
+The top-level node has the following properties:
+
+dynamic-start
+    type: u32, optional
+
+    Specifies the start of the dynamically allocated objects. This results in
+    a call to expo_set_dynamic_start().
+
+The top-level node has the following subnodes:
+
+scenes
+    Specifies the scenes in the expo, each one being a subnode
+
+strings
+    Specifies the strings in the expo, each one being a subnode
+
+`scenes` node
+~~~~~~~~~~~~~
+
+Contains a list of scene subnodes. The name of each subnode is passed as the
+name to `scene_new()`.
+
+`strings` node
+~~~~~~~~~~~~~~
+
+Contains a list of string subnodes. The name of each subnode is ignored.
+
+`strings` subnodes
+~~~~~~~~~~~~~~~~~~
+
+Each subnode defines a string which can be used by scenes and objects. Each
+string has an ID number which is used to refer to it.
+
+The `strings` subnodes have the following properties:
+
+id
+    type: u32, required
+
+    Specifies the ID number for the string.
+
+value:
+    type: string, required
+
+    Specifies the string text. For now only a single value is supported. Future
+    work may add support for multiple languages by using a value for each
+    language.
+
+Scene nodes (`scenes` subnodes)
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Each subnode of the `scenes` node contains a scene description.
+
+Most properties can use either a string or a string ID. For example, a `title`
+property can be used to provide the title for a menu; alternatively a `title-id`
+property can provide the string ID of the title. If both are present, the
+ID takes preference, except that if a string with that ID does not exist, it
+falls back to using the string from the property (`title` in this example). The
+description below shows these are alternative properties with the same
+description.
+
+The scene nodes have the following properties:
+
+id
+    type: u32, required
+
+    Specifies the ID number for the string.
+
+title / title-id
+    type: string / u32, required
+
+    Specifies the title of the scene. This is shown at the top of the scene.
+
+prompt / prompt-id
+    type: string / u32, required
+
+    Specifies a prompt for the scene. This is shown at the bottom of the scene.
+
+The scene nodes have a subnode for each object in the scene.
+
+Object nodes
+~~~~~~~~~~~~
+
+The object-node name is used as the name of the object, e.g. when calling
+`scene_menu()` to create a menu.
+
+Object nodes have the following common properties:
+
+type
+    type: string, required
+
+    Specifies the type of the object. Valid types are:
+
+    "menu"
+        Menu containing items which can be selected by the user
+
+    "textline"
+        A line of text which can be edited
+
+id
+    type: u32, required
+
+    Specifies the ID of the object. This is used when referring to the object.
+
+Where CMOS RAM is used for reading and writing settings, the following
+additional properties are required:
+
+start-bit
+    Specifies the first bit in the CMOS RAM to use for this setting. For a RAM
+    with 0x100 bytes, there are 0x800 bit locations. For example, register 0x80
+    holds bits 0x400 to 0x407.
+
+bit-length
+    Specifies the number of CMOS RAM bits to use for this setting. The bits
+    extend from `start-bit` to `start-bit + bit-length - 1`. Note that the bits
+    must be contiguous.
+
+Menu nodes have the following additional properties:
+
+title / title-id
+    type: string / u32, required
+
+    Specifies the title of the menu. This is shown to the left of the area for
+    this menu.
+
+item-id
+    type: u32 list, required
+
+    Specifies the ID for each menu item. These are used for checking which item
+    has been selected.
+
+item-label / item-label-id
+    type: string list / u32 list, required
+
+    Specifies the label for each item in the menu. These are shown to the user.
+    In 'popup' mode these form the items in the menu.
+
+key-label / key-label-id
+    type: string list / u32 list, optional
+
+    Specifies the key for each item in the menu. These are currently only
+    intended for use in simple mode.
+
+desc-label / desc-label-id
+    type: string list / u32 list, optional
+
+    Specifies the description for each item in the menu. These are currently
+    only intended for use in simple mode.
+
+Textline nodes have the following additional properties:
+
+label / label-id
+    type: string / u32, required
+
+    Specifies the label of the textline. This is shown to the left of the area
+    for this textline.
+
+edit-id
+    type: u32, required
+
+    Specifies the ID of the of the editable text object. This can be used to
+    obtain the text from the textline
+
+max-chars:
+    type: u32, required
+
+    Specifies the maximum number of characters permitted to be in the textline.
+    The user will be prevented from adding more.
+
+
+Expo layout
+~~~~~~~~~~~
+
+The `expo_arrange()` function can be called to arrange the expo objects in a
+suitable manner. For each scene it puts the title at the top, the prompt at the
+bottom and the objects in order from top to bottom.
+
+
+.. _expo_example:
+
+Expo format example
+~~~~~~~~~~~~~~~~~~~
+
+This example shows an expo with a single scene consisting of two menus. The
+scene title is specified using a string from the strings table, but all other
+strings are provided inline in the nodes where they are used.
+
+::
+
+    /* this comment is parsed by the expo.py tool to insert the values below
+
+    enum {
+        ZERO,
+        ID_PROMPT,
+        ID_SCENE1,
+        ID_SCENE1_TITLE,
+
+        ID_CPU_SPEED,
+        ID_CPU_SPEED_TITLE,
+        ID_CPU_SPEED_1,
+        ID_CPU_SPEED_2,
+        ID_CPU_SPEED_3,
+
+        ID_POWER_LOSS,
+        ID_AC_OFF,
+        ID_AC_ON,
+        ID_AC_MEMORY,
+
+        ID_MACHINE_NAME,
+        ID_MACHINE_NAME_EDIT,
+
+        ID_DYNAMIC_START,
+    */
+
+    &cedit {
+        dynamic-start = <ID_DYNAMIC_START>;
+
+        scenes {
+            main {
+                id = <ID_SCENE1>;
+
+                /* value refers to the matching id in /strings */
+                title-id = <ID_SCENE1_TITLE>;
+
+                /* simple string is used as it is */
+                prompt = "UP and DOWN to choose, ENTER to select";
+
+                /* defines a menu within the scene */
+                cpu-speed {
+                    type = "menu";
+                    id = <ID_CPU_SPEED>;
+
+                    /*
+                     * has both string and ID. The string is ignored
+                     * if the ID is present and points to a string
+                     */
+                    title = "CPU speed";
+                    title-id = <ID_CPU_SPEED_TITLE>;
+
+                    /* menu items as simple strings */
+                    item-label = "2 GHz", "2.5 GHz", "3 GHz";
+
+                    /* IDs for the menu items */
+                    item-id = <ID_CPU_SPEED_1 ID_CPU_SPEED_2
+                        ID_CPU_SPEED_3>;
+                };
+
+                power-loss {
+                    type = "menu";
+                    id = <ID_POWER_LOSS>;
+
+                    title = "AC Power";
+                    item-label = "Always Off", "Always On",
+                        "Memory";
+
+                    item-id = <ID_AC_OFF ID_AC_ON ID_AC_MEMORY>;
+                };
+
+            machine-name {
+                id = <ID_MACHINE_NAME>;
+                type = "textline";
+                max-chars = <20>;
+                title = "Machine name";
+                edit-id = <ID_MACHINE_NAME_EDIT>;
+            };
+        };
+
+        strings {
+            title {
+                id = <ID_SCENE1_TITLE>;
+                value = "Test Configuration";
+                value-es = "configuración de prueba";
+            };
+        };
+    };
+
+
+API documentation
+-----------------
+
+.. kernel-doc:: include/expo.h
+
+Future ideas
+------------
+
+Some ideas for future work:
+
+- Default menu item and a timeout
+- Image formats other than BMP
+- Use of ANSI sequences to control a serial terminal
+- Colour selection
+- Support for more widgets, e.g. numeric, radio/option
+- Mouse support
+- Integrate Nuklear, NxWidgets or some other library for a richer UI
+- Optimise rendering by only updating the display with changes since last render
+- Use expo to replace the existing menu implementation
+- Add a Kconfig option to drop the names to save code / data space
+- Add a Kconfig option to disable vidconsole support to save code / data space
+- Support both graphical and text menus at the same time on different devices
+- Support unicode
+- Support curses for proper serial-terminal menus
+- Add support for large menus which need to scroll
+- Update expo.py tool to check for overlapping names and CMOS locations
+
+.. Simon Glass <sjg@chromium.org>
+.. 7-Oct-22
diff --git a/doc/develop/falcon.rst b/doc/develop/falcon.rst
new file mode 100644
index 00000000000..244b4ccb5c2
--- /dev/null
+++ b/doc/develop/falcon.rst
@@ -0,0 +1,416 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Falcon Mode
+===========
+
+Introduction
+------------
+
+This document provides an overview of how to add support for Falcon Mode
+to a board.
+
+Falcon Mode is introduced to speed up the booting process, allowing
+to boot a Linux kernel (or whatever image) without a full blown U-Boot.
+
+Falcon Mode relies on the SPL framework. In fact, to make booting faster,
+U-Boot is split into two parts: the SPL (Secondary Program Loader) and U-Boot
+image. In most implementations, SPL is used to start U-Boot when booting from
+a mass storage, such as NAND or SD-Card. SPL has now support for other media,
+and can generally be seen as a way to start an image performing the minimum
+required initialization. SPL mainly initializes the RAM controller, and then
+copies U-Boot image into the memory.
+
+The Falcon Mode extends this way allowing to start the Linux kernel directly
+from SPL. A new command is added to U-Boot to prepare the parameters that SPL
+must pass to the kernel, using ATAGS or Device Tree.
+
+In normal mode, these parameters are generated each time before
+loading the kernel, passing to Linux the address in memory where
+the parameters can be read.
+With Falcon Mode, this snapshot can be saved into persistent storage and SPL is
+informed to load it before running the kernel.
+
+To boot the kernel, these steps under a Falcon-aware U-Boot are required:
+
+1. Boot the board into U-Boot.
+    After loading the desired legacy-format kernel image into memory (and DT as
+    well, if used), use the "spl export" command to generate the kernel
+    parameters area or the DT.  U-Boot runs as when it boots the kernel, but
+    stops before passing the control to the kernel.
+
+2. Save the prepared snapshot into persistent media.
+    The address where to save it must be configured into board configuration
+    file (CONFIG_CMD_SPL_NAND_OFS for NAND).
+
+3. Boot the board into Falcon Mode. SPL will load the kernel and copy
+    the parameters which are saved in the persistent area to the required
+    address. If a valid uImage is not found at the defined location, U-Boot
+    will be booted instead.
+
+It is required to implement a custom mechanism to select if SPL loads U-Boot
+or another image.
+
+The value of a GPIO is a simple way to operate the selection, as well as
+reading a character from the SPL console if CONFIG_SPL_CONSOLE is set.
+
+Falcon Mode is generally activated by setting CONFIG_SPL_OS_BOOT. This tells
+SPL that U-Boot is not the only available image that SPL is able to start.
+
+Configuration
+-------------
+
+CONFIG_CMD_SPL
+    Enable the "spl export" command.
+    The command "spl export" is then available in U-Boot mode.
+
+CONFIG_SPL_PAYLOAD_ARGS_ADDR
+    Address in RAM where the parameters must be copied by SPL.
+    In most cases, it is <start_of_ram> + 0x100.
+
+CONFIG_SYS_NAND_SPL_KERNEL_OFFS
+    Offset in NAND where the kernel is stored
+
+CONFIG_CMD_SPL_NAND_OFS
+    Offset in NAND where the parameters area was saved.
+
+CONFIG_CMD_SPL_NOR_OFS
+    Offset in NOR where the parameters area was saved.
+
+CONFIG_CMD_SPL_WRITE_SIZE
+    Size of the parameters area to be copied
+
+CONFIG_SPL_OS_BOOT
+    Activate Falcon Mode.
+
+Function that a board must implement
+------------------------------------
+
+void spl_board_prepare_for_linux(void)
+    optional, called from SPL before starting the kernel
+
+spl_start_uboot()
+    required, returns "0" if SPL should start the kernel, "1" if U-Boot
+    must be started.
+
+Environment variables
+---------------------
+
+A board may chose to look at the environment for decisions about falcon
+mode.  In this case the following variables may be supported:
+
+boot_os
+    Set to yes/Yes/true/True/1 to enable booting to OS,
+    any other value to fall back to U-Boot (including unset)
+
+falcon_args_file
+    Filename to load as the 'args' portion of falcon mode rather than the
+    hard-coded value.
+
+falcon_image_file
+    Filename to load as the OS image portion of falcon mode rather than the
+    hard-coded value.
+
+Using spl command
+-----------------
+
+spl - SPL configuration
+
+Usage::
+
+    spl export <img=atags|fdt> [kernel_addr] [initrd_addr] [fdt_addr ]
+
+img
+    "atags" or "fdt"
+
+kernel_addr
+    kernel is loaded as part of the boot process, but it is not started.
+    This is the address where a kernel image is stored.
+
+initrd_addr
+    Address of initial ramdisk
+    can be set to "-" if fdt_addr without initrd_addr is used
+
+fdt_addr
+    in case of fdt, the address of the device tree.
+
+The *spl export* command does not write to a storage media. The user is
+responsible to transfer the gathered information (assembled ATAGS list
+or prepared FDT) from temporary storage in RAM into persistent storage
+after each run of *spl export*. Unfortunately the position of temporary
+storage can not be predicted nor provided at command line, it depends
+highly on your system setup and your provided data (ATAGS or FDT).
+However at the end of an successful *spl export* run it will print the
+RAM address of temporary storage. The RAM address of FDT will also be
+set in the environment variable *fdtargsaddr*, the new length of the
+prepared FDT will be set in the environment variable *fdtargslen*.
+These environment variables can be used in scripts for writing updated
+FDT to persistent storage.
+
+Now the user have to save the generated BLOB from that printed address
+to the pre-defined address in persistent storage
+(CONFIG_CMD_SPL_NAND_OFS in case of NAND).
+The following example shows how to prepare the data for Falcon Mode on
+twister board with ATAGS BLOB.
+
+The *spl export* command is prepared to work with ATAGS and FDT. However,
+using FDT is at the moment untested. The ppc port (see a3m071 example
+later) prepares the fdt blob with the fdt command instead.
+
+
+Usage on the twister board
+--------------------------
+
+Using mtd names with the following (default) configuration
+for mtdparts::
+
+    device nand0 <omap2-nand.0>, # parts = 9
+     #: name        size        offset      mask_flags
+     0: MLO                 0x00080000      0x00000000      0
+     1: u-boot              0x00100000      0x00080000      0
+     2: env1                0x00040000      0x00180000      0
+     3: env2                0x00040000      0x001c0000      0
+     4: kernel              0x00600000      0x00200000      0
+     5: bootparms           0x00040000      0x00800000      0
+     6: splashimg           0x00200000      0x00840000      0
+     7: mini                0x02800000      0x00a40000      0
+     8: rootfs              0x1cdc0000      0x03240000      0
+
+::
+
+    twister => nand read 82000000 kernel
+
+    NAND read: device 0 offset 0x200000, size 0x600000
+    6291456 bytes read: OK
+
+Now the kernel is in RAM at address 0x82000000::
+
+    twister => spl export atags 0x82000000
+    ## Booting kernel from Legacy Image at 82000000 ...
+       Image Name:   Linux-3.5.0-rc4-14089-gda0b7f4
+       Image Type:   ARM Linux Kernel Image (uncompressed)
+       Data Size:    3654808 Bytes = 3.5 MiB
+       Load Address: 80008000
+       Entry Point:  80008000
+       Verifying Checksum ... OK
+       Loading Kernel Image ... OK
+    OK
+    cmdline subcommand not supported
+    bdt subcommand not supported
+    Argument image is now in RAM at: 0x80000100
+
+The result can be checked at address 0x80000100::
+
+    twister => md 0x80000100
+    80000100: 00000005 54410001 00000000 00000000    ......AT........
+    80000110: 00000000 00000067 54410009 746f6f72    ....g.....ATroot
+    80000120: 65642f3d 666e2f76 77722073 73666e20    =/dev/nfs rw nfs
+
+The parameters generated with this step can be saved into NAND at the offset
+0x800000 (value for twister for CONFIG_CMD_SPL_NAND_OFS)::
+
+    nand erase.part bootparms
+    nand write 0x80000100 bootparms 0x4000
+
+Now the parameters are stored into the NAND flash at the address
+CONFIG_CMD_SPL_NAND_OFS (=0x800000).
+
+Next time, the board can be started into Falcon Mode moving the
+setting the GPIO (on twister GPIO 55 is used) to kernel mode.
+
+The kernel is loaded directly by the SPL without passing through U-Boot.
+
+Example with FDT: a3m071 board
+------------------------------
+
+To boot the Linux kernel from the SPL, the DT blob (fdt) needs to get
+prepared/patched first. U-Boot usually inserts some dynamic values into
+the DT binary (blob), e.g. autodetected memory size, MAC addresses,
+clocks speeds etc. To generate this patched DT blob, you can use
+the following command:
+
+1. Load fdt blob to SDRAM::
+
+        => tftp 1800000 a3m071/a3m071.dtb
+
+2. Set bootargs as desired for Linux booting (e.g. flash_mtd)::
+
+        => run mtdargs addip2 addtty
+
+3. Use "fdt" commands to patch the DT blob::
+
+        => fdt addr 1800000
+        => fdt boardsetup
+        => fdt chosen
+
+4. Display patched DT blob (optional)::
+
+        => fdt print
+
+5. Save fdt to NOR flash::
+
+        => erase fc060000 fc07ffff
+        => cp.b 1800000 fc060000 10000
+        ...
+
+
+Falcon Mode was presented at the RMLL 2012. Slides are available at:
+
+http://schedule2012.rmll.info/IMG/pdf/LSM2012_UbootFalconMode_Babic.pdf
+
+Falcon Mode Boot on RISC-V
+--------------------------
+
+Introduction
+~~~~~~~~~~~~
+
+In the RISC-V environment, OpenSBI is required to enable a supervisor mode
+binary to execute certain privileged operations. The typical boot sequence on
+RISC-V is SPL -> OpenSBI -> U-Boot -> Linux kernel. SPL will load and start
+the OpenSBI initializations, then OpenSBI will bring up the next image, U-Boot
+proper. The OpenSBI binary must be prepared in advance of the U-Boot build
+process and it will be packed together with U-Boot into a file called
+u-boot.itb.
+
+The Falcon Mode on RISC-V platforms is a distinct boot sequence. Borrowing
+ideas from the U-Boot Falcon Mode on ARM, it skips the U-Boot proper phase
+in the normal boot process and allows OpenSBI to load and start the Linux
+kernel. Its boot sequence is SPL -> OpenSBI -> Linux kernel. The OpenSBI
+binary and Linux kernel binary must be prepared prior to the U-Boot build
+process and they will be packed together as a FIT image named linux.itb in
+this process.
+
+CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT enables the Falcon Mode boot on RISC-V.
+This configuration setting tells OpenSBI that Linux kernel is its next OS
+image and makes it load and start the kernel afterwards.
+
+Note that the Falcon Mode boot bypasses a lot of initializations by U-Boot.
+If the Linux kernel expects hardware initializations by U-Boot, make sure to
+port the relevant code to the SPL build process.
+
+Configuration
+~~~~~~~~~~~~~
+
+CONFIG_SPL_LOAD_FIT_ADDRESS
+    Specifies the address to load u-boot.itb in a normal boot. When the Falcon
+    Mode boot is enabled, it specifies the load address of linux.itb.
+
+CONFIG_SYS_TEXT_BASE
+    Specifies the address of the text section for a u-boot proper in a normal
+    boot. When the Falcon Mode boot is enabled, it specifies the text section
+    address for the Linux kernel image.
+
+CONFIG_SPL_PAYLOAD_ARGS_ADDR
+    The address in the RAM to which the FDT blob is to be moved by the SPL.
+    SPL places the FDT blob right after the kernel. As the kernel does not
+    include the BSS section in its size calculation, SPL ends up placing
+    the FDT blob within the BSS section of the kernel. This may cause the
+    FDT blob to be cleared during kernel BSS initialization. To avoid the
+    issue, be sure to move the FDT blob out of the kernel first.
+
+CONFIG_SPL_LOAD_FIT_OPENSBI_OS_BOOT
+    Activates the Falcon Mode boot on RISC-V.
+
+Example for Andes AE350 Board
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+A FDT blob is required to boot the Linux kernel from the SPL. Andes AE350
+platforms generally come with a builtin dtb. To load a custom DTB, follow
+these steps:
+
+1. Load the custom DTB to SDRAM::
+
+        => fatload mmc 0:1 0x20000000 user_custom.dtb
+
+2. Set the SPI speed::
+
+        => sf probe 0:0 50000000 0
+
+3. Erase sectors from the SPI Flash::
+
+        => sf erase 0xf0000 0x10000
+
+4. Write the FDT blob to the erased sectors of the Flash::
+
+        => sf write 0x20000000 0xf0000 0x10000
+
+Console Log of AE350 Falcon Mode Boot
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+::
+
+        U-Boot SPL 2023.01-00031-g777ecdea66 (Oct 31 2023 - 18:41:36 +0800)
+        Trying to boot from RAM
+
+        OpenSBI v1.2-51-g7304e42
+           ____                    _____ ____ _____
+          / __ \                  / ____|  _ \_   _|
+         | |  | |_ __   ___ _ __ | (___ | |_) || |
+         | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
+         | |__| | |_) |  __/ | | |____) | |_) || |_
+          \____/| .__/ \___|_| |_|_____/|____/_____|
+                | |
+                |_|
+
+        Platform Name             : andestech,ax25
+        Platform Features         : medeleg
+        Platform HART Count       : 1
+        Platform IPI Device       : andes_plicsw
+        Platform Timer Device     : andes_plmt @ 60000000Hz
+        Platform Console Device   : uart8250
+        Platform HSM Device       : andes_smu
+        Platform PMU Device       : andes_pmu
+        Platform Reboot Device    : atcwdt200
+        Platform Shutdown Device  : ---
+        Firmware Base             : 0x0
+        Firmware Size             : 196 KB
+        Runtime SBI Version       : 1.0
+
+        Domain0 Name              : root
+        Domain0 Boot HART         : 0
+        Domain0 HARTs             : 0*
+        Domain0 Region00          : 0x0000000000000000-0x000000000003ffff ()
+        Domain0 Region01          : 0x00000000e6000000-0x00000000e60fffff (I,R)
+        Domain0 Region02          : 0x00000000e6400000-0x00000000e67fffff (I)
+        Domain0 Region03          : 0x0000000000000000-0xffffffffffffffff (R,W,X)
+        Domain0 Next Address      : 0x0000000001800000
+        Domain0 Next Arg1         : 0x0000000001700000
+        Domain0 Next Mode         : S-mode
+        Domain0 SysReset          : yes
+
+        Boot HART ID              : 0
+        Boot HART Domain          : root
+        Boot HART Priv Version    : v1.11
+        Boot HART Base ISA        : rv64imafdcx
+        Boot HART ISA Extensions  : none
+        Boot HART PMP Count       : 8
+        Boot HART PMP Granularity : 4
+        Boot HART PMP Address Bits: 31
+        Boot HART MHPM Count      : 4
+        Boot HART MHPM Bits       : 64
+        Boot HART MIDELEG         : 0x0000000000000222
+        Boot HART MEDELEG         : 0x000000000000b109
+        [    0.000000] Linux version 6.1.47-09019-g0584b09ad862-dirty
+        [    0.000000] OF: fdt: Ignoring memory range 0x0 - 0x1800000
+        [    0.000000] Machine model: andestech,ax25
+        [    0.000000] earlycon: sbi0 at I/O port 0x0 (options '')
+        [    0.000000] printk: bootconsole [sbi0] enabled
+        [    0.000000] Disabled 4-level and 5-level paging
+        [    0.000000] efi: UEFI not found.
+        [    0.000000] Zone ranges:
+        [    0.000000]   DMA32    [mem 0x0000000001800000-0x000000003fffffff]
+        [    0.000000]   Normal   empty
+        [    0.000000] Movable zone start for each node
+        [    0.000000] Early memory node ranges
+        [    0.000000]   node   0: [mem 0x0000000001800000-0x000000003fffffff]
+        [    0.000000] Initmem setup node 0 [mem 0x0000000001800000-0x000000003fffffff]
+        [    0.000000] SBI specification v1.0 detected
+        [    0.000000] SBI implementation ID=0x1 Version=0x10002
+        [    0.000000] SBI TIME extension detected
+        [    0.000000] SBI IPI extension detected
+        [    0.000000] SBI RFENCE extension detected
+        [    0.000000] SBI SRST extension detected
+        [    0.000000] SBI HSM extension detected
+        [    0.000000] riscv: base ISA extensions acim
+        [    0.000000] riscv: ELF capabilities acim
+        [    0.000000] percpu: Embedded 18 pages/cpu s35000 r8192 d30536 u73728
+        [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 252500
diff --git a/doc/develop/gdb.rst b/doc/develop/gdb.rst
new file mode 100644
index 00000000000..4e359c7f226
--- /dev/null
+++ b/doc/develop/gdb.rst
@@ -0,0 +1,171 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2024 Alexander Dahl
+
+Debugging U-Boot with GDB
+=========================
+
+Using a JTAG adapter it is possible to debug a running U-Boot with GDB.
+A common way is to connect a debug adapter to the JTAG connector of your
+board, run a GDB server, connect GDB to the GDB server, and use GDB as usual.
+
+Similarly QEMU can provide a GDB server.
+
+Preparing build
+---------------
+
+Building U-Boot with with reduced optimization (-Og) and without link time
+optimization is recommended for easier debugging::
+
+    CONFIG_CC_OPTIMIZE_FOR_DEBUG=y
+    CONFIG_LTO=n
+
+Otherwise build, install, and run U-Boot as usual.
+
+Using OpenOCD as GDB server
+---------------------------
+
+`OpenOCD <https://openocd.org/>`_ is an open source tool supporting hardware
+debug probes, and providing a GDB server. It is readily available in major Linux
+distributions or you can build it from source.
+
+Here is example of starting OpenOCD on Debian using a J-Link adapter and a
+board with an AT91 SAMA5D2 SoC:
+
+.. code-block:: console
+
+    $ openocd -f interface/jlink.cfg -f target/at91sama5d2.cfg -c 'adapter speed 4000'
+    Open On-Chip Debugger 0.12.0
+    Licensed under GNU GPL v2
+    For bug reports, read
+            http://openocd.org/doc/doxygen/bugs.html
+    Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
+    adapter speed: 4000 kHz
+
+    Info : Listening on port 6666 for tcl connections
+    Info : Listening on port 4444 for telnet connections
+    Info : J-Link V10 compiled Jan 30 2023 11:28:07
+    Info : Hardware version: 10.10
+    Info : VTarget = 3.244 V
+    Info : clock speed 4000 kHz
+    Info : JTAG tap: at91sama5d2.cpu tap/device found: 0x5ba00477 (mfg: 0x23b (ARM Ltd), part: 0xba00, ver: 0x5)
+    Info : at91sama5d2.cpu_a5.0: hardware has 3 breakpoints, 2 watchpoints
+    Info : at91sama5d2.cpu_a5.0: MPIDR level2 0, cluster 0, core 0, mono core, no SMT
+    Info : starting gdb server for at91sama5d2.cpu_a5.0 on 3333
+    Info : Listening on port 3333 for gdb connections
+
+Notice that OpenOCD is listening on port 3333 for GDB connections.
+
+Using QEMU as GDB server
+------------------------
+
+When running U-Boot on QEMU you can used the '-gdb' parameter to provide a
+GDB server:
+
+     qemu-system-riscv64 -M virt -nographic -gdb tcp::3333 -kernel u-boot
+
+Running a GDB session
+----------------------
+
+You need a GDB suited for your target. This can be the GDB coming with your
+toolchain or *gdb-multiarch* available in your Linux distribution.
+
+.. prompt:: bash $
+
+    gdb-multiarch u-boot
+
+In the above command-line *u-boot* is the U-boot binary in your build
+directory. You may need to adjust the path when calling GDB.
+
+Connect to the GDB server like this:
+
+.. code-block:: console
+
+    (gdb) target extended-remote :3333
+    Remote debugging using :3333
+    0x27fa9ac6 in ?? ()
+    (gdb)
+
+This is fine for debugging before U-Boot relocates itself.
+
+For debugging U-Boot after relocation you need to indicate the relocation
+address to GDB. You can retrieve the relocation address from the U-Boot shell
+with the command *bdinfo*:
+
+.. code-block:: console
+
+    U-Boot> bdinfo
+    boot_params = 0x20000100
+    DRAM bank   = 0x00000000
+    -> start    = 0x20000000
+    -> size     = 0x08000000
+    flashstart  = 0x00000000
+    flashsize   = 0x00000000
+    flashoffset = 0x00000000
+    baudrate    = 115200 bps
+    relocaddr   = 0x27f7a000
+    reloc off   = 0x0607a000
+    Build       = 32-bit
+    current eth = ethernet@f8008000
+    ethaddr     = 00:50:c2:31:58:d4
+    IP addr     = <NULL>
+    fdt_blob    = 0x27b36060
+    new_fdt     = 0x27b36060
+    fdt_size    = 0x00003e40
+    lmb_dump_all:
+     memory.cnt = 0x1 / max = 0x10
+     memory[0]      [0x20000000-0x27ffffff], 0x08000000 bytes flags: 0
+     reserved.cnt = 0x1 / max = 0x10
+     reserved[0]    [0x27b31d00-0x27ffffff], 0x004ce300 bytes flags: 0
+    devicetree  = separate
+    arch_number = 0x00000000
+    TLB addr    = 0x27ff0000
+    irq_sp      = 0x27b36050
+    sp start    = 0x27b36040
+    Early malloc usage: cd8 / 2000
+
+Look out for the line starting with *relocaddr* which has the address
+you need, ``0x27f7a000`` in this case.
+
+On most architectures (not sandbox, x86, Xtensa) the global data pointer is
+stored in a fixed register:
+
+============ ========
+Architecture Register
+============ ========
+arc          r25
+arm          r9
+arm64        x18
+m68k         d7
+microblaze   r31
+mips         k0
+nios2        gp
+powerpc      r2
+riscv        gp
+sh           r13
+============ ========
+
+On these architecture the relocation address cat be determined by
+dereferencing the global data pointer stored in register, *r9* in the example:
+
+.. code-block:: console
+
+     (gdb) p/x (*(struct global_data*)$r9)->relocaddr
+     $1 = 0x27f7a000
+
+In the GDB shell discard the previously loaded symbol file and add it once
+again with the relocation address like this:
+
+.. code-block:: console
+
+    (gdb) symbol-file
+    Discard symbol table from `/home/adahl/build/u-boot/v2024.04.x/u-boot'? (y or n) y
+    No symbol file now.
+    (gdb) add-symbol-file u-boot 0x27f7a000
+    add symbol table from file "u-boot" at
+            .text_addr = 0x27f7a000
+    (y or n) y
+    Reading symbols from u-boot...
+    (gdb)
+
+You can now use GDB as usual, setting breakpoints, printing backtraces,
+inspecting variables, stepping through the code, etc.
diff --git a/doc/develop/global_data.rst b/doc/develop/global_data.rst
new file mode 100644
index 00000000000..d143f27eedd
--- /dev/null
+++ b/doc/develop/global_data.rst
@@ -0,0 +1,58 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Global data
+===========
+
+Globally required fields are held in the global data structure. A pointer to the
+structure is available as symbol gd. The symbol is made available by the macro
+%DECLARE_GLOBAL_DATA_PTR.
+
+Register pointing to global data
+--------------------------------
+
+On most architectures the global data pointer is stored in a register.
+
++------------+----------+
+| ARC        | r25      |
++------------+----------+
+| ARM 32bit  | r9       |
++------------+----------+
+| ARM 64bit  | x18      |
++------------+----------+
+| M68000     | d7       |
++------------+----------+
+| MicroBlaze | r31      |
++------------+----------+
+| Nios II    | gp       |
++------------+----------+
+| PowerPC    | r2       |
++------------+----------+
+| RISC-V     | gp (x3)  |
++------------+----------+
+| SuperH     | r13      |
++------------+----------+
+| x86 32bit  | fs       |
++------------+----------+
+
+The sandbox, x86_64, and Xtensa are notable exceptions.
+
+Current implementation uses a register for the GD pointer because this results
+in smaller code. However, using plain global data for the GD pointer would be
+possible too (and simpler, as it does not require the reservation of a specific
+register for it), but the resulting code is bigger.
+
+Clang for ARM does not support assigning a global register. When using Clang
+gd is defined as an inline function using assembly code. This adds a few bytes
+to the code size.
+
+Binaries called by U-Boot are not aware of the register usage and will not
+conserve gd. UEFI binaries call the API provided by U-Boot and may return to
+U-Boot. The value of gd has to be saved every time U-Boot is left and restored
+whenever U-Boot is reentered. This is also relevant for the implementation of
+function tracing. For setting the value of gd function set_gd() can be used.
+
+Global data structure
+---------------------
+
+.. kernel-doc:: include/asm-generic/global_data.h
+   :internal:
diff --git a/doc/develop/ide_integration.rst b/doc/develop/ide_integration.rst
new file mode 100644
index 00000000000..455e09959c3
--- /dev/null
+++ b/doc/develop/ide_integration.rst
@@ -0,0 +1,12 @@
+Integration with IDEs
+=====================
+
+IDEs and text editors (e.g., VSCode, Emacs, Vim, Neovim) typically offer
+plugins to enhance the development experience, such as Clangd LSP. These
+plugins provide features like code navigation (i.e., jumping to definitions
+and declarations), code completion, and code formatting.
+
+U-Boot provides a script (i.e., scripts/gen_compile_commands.py) that
+generates a compilation database to be utilized by Clangd LSP for code
+navigation. For detailed usage instructions, please refer to the script's
+documentation: :doc:`../build/gen_compile_commands`.
diff --git a/doc/develop/index.rst b/doc/develop/index.rst
new file mode 100644
index 00000000000..c0107a783fc
--- /dev/null
+++ b/doc/develop/index.rst
@@ -0,0 +1,101 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Develop U-Boot
+==============
+
+General
+-------
+
+.. toctree::
+   :maxdepth: 1
+
+   board_best_practices
+   codingstyle
+   designprinciples
+   docstyle
+   patman
+   process
+   release_cycle
+   security
+   sending_patches
+   system_configuration
+   ide_integration
+
+Implementation
+--------------
+
+.. toctree::
+   :maxdepth: 1
+
+   directories
+   bloblist
+   bootstd/index
+   ci_testing
+   commands
+   config_binding
+   cyclic
+   devicetree/index
+   distro
+   driver-model/index
+   environment
+   expo
+   cedit
+   event
+   global_data
+   logging
+   makefiles
+   menus
+   printf
+   smbios
+   spl
+   falcon
+   uefi/index
+   vbe
+   version
+
+Debugging
+---------
+
+.. toctree::
+   :maxdepth: 1
+
+   crash_dumps
+   gdb
+   trace
+
+Packaging
+---------
+
+.. toctree::
+   :maxdepth: 1
+
+   package/index
+
+Testing
+-------
+
+.. toctree::
+   :maxdepth: 1
+
+   testing
+   py_testing
+   tests_writing
+   tests_sandbox
+
+Refactoring
+-----------
+
+.. toctree::
+   :maxdepth: 1
+
+   checkpatch
+   coccinelle
+   qconfig
+
+Code quality
+------------
+
+.. toctree::
+   :maxdepth: 1
+
+   python_cq
diff --git a/doc/develop/logging.rst b/doc/develop/logging.rst
new file mode 100644
index 00000000000..704a6bf1d84
--- /dev/null
+++ b/doc/develop/logging.rst
@@ -0,0 +1,316 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2017 Simon Glass <sjg@chromium.org>
+
+Logging in U-Boot
+=================
+
+Introduction
+------------
+
+U-Boot's internal operation involves many different steps and actions. From
+setting up the board to displaying a start-up screen to loading an Operating
+System, there are many component parts each with many actions.
+
+Most of the time this internal detail is not useful. Displaying it on the
+console would delay booting (U-Boot's primary purpose) and confuse users.
+
+But for digging into what is happening in a particular area, or for debugging
+a problem it is often useful to see what U-Boot is doing in more detail than
+is visible from the basic console output.
+
+U-Boot's logging feature aims to satisfy this goal for both users and
+developers.
+
+Logging levels
+--------------
+
+There are a number logging levels available.
+
+See enum :c:type:`log_level_t`
+
+Logging category
+----------------
+
+Logging can come from a wide variety of places within U-Boot. Each log message
+has a category which is intended to allow messages to be filtered according to
+their source.
+
+See enum :c:type:`log_category_t`
+
+Enabling logging
+----------------
+
+The following options are used to enable logging at compile time:
+
+* CONFIG_LOG - Enables the logging system
+* CONFIG_LOG_MAX_LEVEL - Max log level to build (anything higher is compiled
+  out)
+* CONFIG_LOG_CONSOLE - Enable writing log records to the console
+
+If CONFIG_LOG is not set, then no logging will be available.
+
+The above have SPL and TPL versions also, e.g. CONFIG_SPL_LOG_MAX_LEVEL and
+CONFIG_TPL_LOG_MAX_LEVEL.
+
+If logging is disabled, the default behaviour is to output any message at
+level LOGL_INFO and below. If logging is disabled and DEBUG is defined (at
+the very top of a C file) then any message at LOGL_DEBUG will be written.
+
+Temporary logging within a single file
+--------------------------------------
+
+Sometimes it is useful to turn on logging just in one file. You can use this
+
+.. code-block:: c
+
+   #define LOG_DEBUG
+
+to enable building in of all logging statements in a single file. Put it at
+the top of the file, before any #includes and any message in the file will be
+written, regardless of the value of CONFIG_LOG_DEFAULT_LEVEL.
+
+Using DEBUG
+-----------
+
+U-Boot has traditionally used a #define called DEBUG to enable debugging on a
+file-by-file basis but LOG_DEBUG are intended to replace it with the logging
+facilities; DEBUG is activated when LOG_DEBUG is activated.
+
+With logging enabled, debug() statements are interpreted as logging output
+with a level of LOGL_DEBUG and a category of LOG_CATEGORY.
+
+With logging disabled, the debug() macro compiles to a printf() statement
+if DEBUG is enabled and to an empty statement if not.
+
+Logging statements
+------------------
+
+The main logging function is:
+
+.. code-block:: c
+
+   log(category, level, format_string, ...)
+
+Also debug() and error() will generate log records  - these use LOG_CATEGORY
+as the category, so you should #define this right at the top of the source
+file to ensure the category is correct.
+
+Generally each log format_string ends with a newline. If it does not, then the
+next log statement will have the LOGRECF_CONT flag set. This can be used to
+continue the statement on the same line as the previous one without emitting
+new header information (such as category/level). This behaviour is implemented
+with log_console. Here is an example that prints a list all on one line with
+the tags at the start:
+
+.. code-block:: c
+
+   log_debug("Here is a list:");
+   for (i = 0; i < count; i++)
+      log_debug(" item %d", i);
+   log_debug("\n");
+
+Also see the special category LOGL_CONT and level LOGC_CONT.
+
+You can also define CONFIG_LOG_ERROR_RETURN to enable the log_ret() macro. This
+can be used whenever your function returns an error value:
+
+.. code-block:: c
+
+   return log_ret(uclass_first_device_err(UCLASS_MMC, &dev));
+
+This will write a log record when an error code is detected (a value < 0). This
+can make it easier to trace errors that are generated deep in the call stack.
+
+The log_msg_ret() variant will print a short string if CONFIG_LOG_ERROR_RETURN
+is enabled. So long as the string is unique within the function you can normally
+determine exactly which call failed:
+
+.. code-block:: c
+
+   ret = gpio_request_by_name(dev, "cd-gpios", 0, &desc, GPIOD_IS_IN);
+   if (ret)
+      return log_msg_ret("gpio", ret);
+
+Some functions return 0 for success and any other value is an error. For these,
+log_retz() and log_msg_retz() are available.
+
+Convenience functions
+~~~~~~~~~~~~~~~~~~~~~
+
+A number of convenience functions are available to shorten the code needed
+for logging:
+
+* log_err(_fmt...)
+* log_warning(_fmt...)
+* log_notice(_fmt...)
+* log_info(_fmt...)
+* log_debug(_fmt...)
+* log_content(_fmt...)
+* log_io(_fmt...)
+
+With these the log level is implicit in the name. The category is set by
+LOG_CATEGORY, which you can only define once per file, above all #includes, e.g.
+
+.. code-block:: c
+
+	#define LOG_CATEGORY LOGC_ALLOC
+
+or
+
+.. code-block:: c
+
+	#define LOG_CATEGORY UCLASS_SPI
+
+Remember that all uclasses IDs are log categories too.
+
+Logging destinations
+--------------------
+
+If logging information goes nowhere then it serves no purpose. U-Boot provides
+several possible determinations for logging information, all of which can be
+enabled or disabled independently:
+
+* console - goes to stdout
+* syslog - broadcast RFC 3164 messages to syslog servers on UDP port 514
+
+The syslog driver sends the value of environmental variable 'log_hostname' as
+HOSTNAME if available.
+
+Filters
+-------
+
+Filters are attached to log drivers to control what those drivers emit. FIlters
+can either allow or deny a log message when they match it. Only records which
+are allowed by a filter make it to the driver.
+
+Filters can be based on several criteria:
+
+* minimum or maximum log level
+* in a set of categories
+* in a set of files
+
+If no filters are attached to a driver then a default filter is used, which
+limits output to records with a level less than CONFIG_MAX_LOG_LEVEL.
+
+Log command
+-----------
+
+The 'log' command provides access to several features:
+
+* level - list log levels or set the default log level
+* categories - list log categories
+* drivers - list log drivers
+* filter-list - list filters
+* filter-add - add a new filter
+* filter-remove - remove filters
+* format - access the console log format
+* rec - output a log record
+
+Type 'help log' for details.
+
+Log format
+~~~~~~~~~~
+
+You can control the log format using the 'log format' command. The basic
+format is::
+
+   LEVEL.category,file.c:123-func() message
+
+In the above, file.c:123 is the filename where the log record was generated and
+func() is the function name. By default ('log format default') only the message
+is displayed on the console. You can control which fields are present, but not
+the field order.
+
+Adding Filters
+~~~~~~~~~~~~~~
+
+To add new filters at runtime, use the 'log filter-add' command. For example, to
+suppress messages from the SPI and MMC subsystems, run::
+
+    log filter-add -D -c spi -c mmc
+
+You will also need to add another filter to allow other messages (because the
+default filter no longer applies)::
+
+    log filter-add -A -l info
+
+Log levels may be either symbolic names (like above) or numbers. For example, to
+disable all debug and above (log level 7) messages from ``drivers/core/lists.c``
+and ``drivers/core/ofnode.c``, run::
+
+    log filter-add -D -f drivers/core/lists.c,drivers/core/ofnode.c -L 7
+
+To view active filters, use the 'log filter-list' command. Some example output
+is::
+
+    => log filter-list
+    num policy level            categories files
+      2   deny >= DEBUG                    drivers/core/lists.c,drivers/core/ofnode.c
+      0   deny <= IO                   spi
+                                       mmc
+      1  allow <= INFO
+
+Note that filters are processed in-order from top to bottom, not in the order of
+their filter number. Filters are added to the top of the list if they deny when
+they match, and to the bottom if they allow when they match. For more
+information, consult the usage of the 'log' command, by running 'help log'.
+
+Code size
+---------
+
+Code size impact depends largely on what is enabled. The following numbers are
+generated by 'buildman -S' for snow, which is a Thumb-2 board (all units in
+bytes)::
+
+    This series: adds bss +20.0 data +4.0 rodata +4.0 text +44.0
+    CONFIG_LOG: bss -52.0 data +92.0 rodata -635.0 text +1048.0
+    CONFIG_LOG_MAX_LEVEL=7: bss +188.0 data +4.0 rodata +49183.0 text +98124.0
+
+The last option turns every debug() statement into a logging call, which
+bloats the code hugely. The advantage is that it is then possible to enable
+all logging within U-Boot.
+
+To Do
+-----
+
+There are lots of useful additions that could be made. None of the below is
+implemented! If you do one, please add a test in test/log/log_test.c
+log filter-add -D -f drivers/core/lists.c,drivers/core/ofnode.c -l 6
+Convenience functions to support setting the category:
+
+* log_arch(level, format_string, ...) - category LOGC_ARCH
+* log_board(level, format_string, ...) - category LOGC_BOARD
+* log_core(level, format_string, ...) - category LOGC_CORE
+* log_dt(level, format_string, ...) - category LOGC_DT
+
+More logging destinations:
+
+* device - goes to a device (e.g. serial)
+* buffer - recorded in a memory buffer
+
+Convert debug() statements in the code to log() statements
+
+Convert error() statements in the code to log() statements
+
+Figure out what to do with BUG(), BUG_ON() and warn_non_spl()
+
+Add a way to browse log records
+
+Add a way to record log records for browsing using an external tool
+
+Add commands to add and remove log devices
+
+Allow sharing of printf format strings in log records to reduce storage size
+for large numbers of log records
+
+Consider making log() calls emit an automatic newline, perhaps with a logn()
+function to avoid that
+
+Passing log records through to linux (e.g. via device tree /chosen)
+
+Provide a command to access the number of log records generated, and the
+number dropped due to them being generated before the log system was ready.
+
+Add a printf() format string pragma so that log statements are checked properly
+
+Add a command to delete existing log records.
diff --git a/doc/develop/makefiles.rst b/doc/develop/makefiles.rst
new file mode 100644
index 00000000000..37a7deaca92
--- /dev/null
+++ b/doc/develop/makefiles.rst
@@ -0,0 +1,1675 @@
+=========
+Makefiles
+=========
+
+Note: This document mostly applies to U-Boot so is included here even
+though it refers to Linux.
+
+This document describes the Linux kernel Makefiles.
+
+.. Table of Contents
+
+	=== 1 Overview
+	=== 2 Who does what
+	=== 3 The kbuild files
+	   --- 3.1 Goal definitions
+	   --- 3.2 Built-in object goals - obj-y
+	   --- 3.3 Loadable module goals - obj-m
+	   --- 3.4 <deleted>
+	   --- 3.5 Library file goals - lib-y
+	   --- 3.6 Descending down in directories
+	   --- 3.7 Non-builtin vmlinux targets - extra-y
+	   --- 3.8 Always built goals - always-y
+	   --- 3.9 Compilation flags
+	   --- 3.10 Dependency tracking
+	   --- 3.11 Custom Rules
+	   --- 3.12 Command change detection
+	   --- 3.13 $(CC) support functions
+	   --- 3.14 $(LD) support functions
+	   --- 3.15 Script Invocation
+
+	=== 4 Host Program support
+	   --- 4.1 Simple Host Program
+	   --- 4.2 Composite Host Programs
+	   --- 4.3 Using C++ for host programs
+	   --- 4.4 Controlling compiler options for host programs
+	   --- 4.5 When host programs are actually built
+
+	=== 5 Userspace Program support
+	   --- 5.1 Simple Userspace Program
+	   --- 5.2 Composite Userspace Programs
+	   --- 5.3 Controlling compiler options for userspace programs
+	   --- 5.4 When userspace programs are actually built
+
+	=== 6 Kbuild clean infrastructure
+
+	=== 7 Architecture Makefiles
+	   --- 7.1 Set variables to tweak the build to the architecture
+	   --- 7.2 Add prerequisites to archheaders
+	   --- 7.3 Add prerequisites to archprepare
+	   --- 7.4 List directories to visit when descending
+	   --- 7.5 Architecture-specific boot images
+	   --- 7.6 Building non-kbuild targets
+	   --- 7.7 Commands useful for building a boot image
+	   --- 7.8 <deleted>
+	   --- 7.9 Preprocessing linker scripts
+	   --- 7.10 Generic header files
+	   --- 7.11 Post-link pass
+
+	=== 8 Kbuild syntax for exported headers
+		--- 8.1 no-export-headers
+		--- 8.2 generic-y
+		--- 8.3 generated-y
+		--- 8.4 mandatory-y
+
+	=== 9 Kbuild Variables
+	=== 10 Makefile language
+	=== 11 Credits
+	=== 12 TODO
+
+1 Overview
+==========
+
+The Makefiles have five parts::
+
+	Makefile                    the top Makefile.
+	.config                     the kernel configuration file.
+	arch/$(SRCARCH)/Makefile    the arch Makefile.
+	scripts/Makefile.*          common rules etc. for all kbuild Makefiles.
+	kbuild Makefiles            exist in every subdirectory
+
+The top Makefile reads the .config file, which comes from the kernel
+configuration process.
+
+The top Makefile is responsible for building two major products: vmlinux
+(the resident kernel image) and modules (any module files).
+It builds these goals by recursively descending into the subdirectories of
+the kernel source tree.
+The list of subdirectories which are visited depends upon the kernel
+configuration. The top Makefile textually includes an arch Makefile
+with the name arch/$(SRCARCH)/Makefile. The arch Makefile supplies
+architecture-specific information to the top Makefile.
+
+Each subdirectory has a kbuild Makefile which carries out the commands
+passed down from above. The kbuild Makefile uses information from the
+.config file to construct various file lists used by kbuild to build
+any built-in or modular targets.
+
+scripts/Makefile.* contains all the definitions/rules etc. that
+are used to build the kernel based on the kbuild makefiles.
+
+
+2 Who does what
+===============
+
+People have four different relationships with the kernel Makefiles.
+
+*Users* are people who build kernels.  These people type commands such as
+"make menuconfig" or "make".  They usually do not read or edit
+any kernel Makefiles (or any other source files).
+
+*Normal developers* are people who work on features such as device
+drivers, file systems, and network protocols.  These people need to
+maintain the kbuild Makefiles for the subsystem they are
+working on.  In order to do this effectively, they need some overall
+knowledge about the kernel Makefiles, plus detailed knowledge about the
+public interface for kbuild.
+
+*Arch developers* are people who work on an entire architecture, such
+as sparc or ia64.  Arch developers need to know about the arch Makefile
+as well as kbuild Makefiles.
+
+*Kbuild developers* are people who work on the kernel build system itself.
+These people need to know about all aspects of the kernel Makefiles.
+
+This document is aimed towards normal developers and arch developers.
+
+
+3 The kbuild files
+==================
+
+Most Makefiles within the kernel are kbuild Makefiles that use the
+kbuild infrastructure. This chapter introduces the syntax used in the
+kbuild makefiles.
+The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
+be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
+file will be used.
+
+Section 3.1 "Goal definitions" is a quick intro; further chapters provide
+more details, with real examples.
+
+3.1 Goal definitions
+--------------------
+
+	Goal definitions are the main part (heart) of the kbuild Makefile.
+	These lines define the files to be built, any special compilation
+	options, and any subdirectories to be entered recursively.
+
+	The most simple kbuild makefile contains one line:
+
+	Example::
+
+		obj-y += foo.o
+
+	This tells kbuild that there is one object in that directory, named
+	foo.o. foo.o will be built from foo.c or foo.S.
+
+	If foo.o shall be built as a module, the variable obj-m is used.
+	Therefore the following pattern is often used:
+
+	Example::
+
+		obj-$(CONFIG_FOO) += foo.o
+
+	$(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).
+	If CONFIG_FOO is neither y nor m, then the file will not be compiled
+	nor linked.
+
+3.2 Built-in object goals - obj-y
+---------------------------------
+
+	The kbuild Makefile specifies object files for vmlinux
+	in the $(obj-y) lists.  These lists depend on the kernel
+	configuration.
+
+	Kbuild compiles all the $(obj-y) files.  It then calls
+	"$(AR) rcSTP" to merge these files into one built-in.a file.
+	This is a thin archive without a symbol table. It will be later
+	linked into vmlinux by scripts/link-vmlinux.sh
+
+	The order of files in $(obj-y) is significant.  Duplicates in
+	the lists are allowed: the first instance will be linked into
+	built-in.a and succeeding instances will be ignored.
+
+	Link order is significant, because certain functions
+	(module_init() / __initcall) will be called during boot in the
+	order they appear. So keep in mind that changing the link
+	order may e.g. change the order in which your SCSI
+	controllers are detected, and thus your disks are renumbered.
+
+	Example::
+
+		#drivers/isdn/i4l/Makefile
+		# Makefile for the kernel ISDN subsystem and device drivers.
+		# Each configuration option enables a list of files.
+		obj-$(CONFIG_ISDN_I4L)         += isdn.o
+		obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
+
+3.3 Loadable module goals - obj-m
+---------------------------------
+
+	$(obj-m) specifies object files which are built as loadable
+	kernel modules.
+
+	A module may be built from one source file or several source
+	files. In the case of one source file, the kbuild makefile
+	simply adds the file to $(obj-m).
+
+	Example::
+
+		#drivers/isdn/i4l/Makefile
+		obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o
+
+	Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'
+
+	If a kernel module is built from several source files, you specify
+	that you want to build a module in the same way as above; however,
+	kbuild needs to know which object files you want to build your
+	module from, so you have to tell it by setting a $(<module_name>-y)
+	variable.
+
+	Example::
+
+		#drivers/isdn/i4l/Makefile
+		obj-$(CONFIG_ISDN_I4L) += isdn.o
+		isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o
+
+	In this example, the module name will be isdn.o. Kbuild will
+	compile the objects listed in $(isdn-y) and then run
+	"$(LD) -r" on the list of these files to generate isdn.o.
+
+	Due to kbuild recognizing $(<module_name>-y) for composite objects,
+	you can use the value of a `CONFIG_` symbol to optionally include an
+	object file as part of a composite object.
+
+	Example::
+
+		#fs/ext2/Makefile
+	        obj-$(CONFIG_EXT2_FS) += ext2.o
+		ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \
+			  namei.o super.o symlink.o
+	        ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \
+						xattr_trusted.o
+
+	In this example, xattr.o, xattr_user.o and xattr_trusted.o are only
+	part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)
+	evaluates to 'y'.
+
+	Note: Of course, when you are building objects into the kernel,
+	the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,
+	kbuild will build an ext2.o file for you out of the individual
+	parts and then link this into built-in.a, as you would expect.
+
+3.5 Library file goals - lib-y
+------------------------------
+
+	Objects listed with obj-* are used for modules, or
+	combined in a built-in.a for that specific directory.
+	There is also the possibility to list objects that will
+	be included in a library, lib.a.
+	All objects listed with lib-y are combined in a single
+	library for that directory.
+	Objects that are listed in obj-y and additionally listed in
+	lib-y will not be included in the library, since they will
+	be accessible anyway.
+	For consistency, objects listed in lib-m will be included in lib.a.
+
+	Note that the same kbuild makefile may list files to be built-in
+	and to be part of a library. Therefore the same directory
+	may contain both a built-in.a and a lib.a file.
+
+	Example::
+
+		#arch/x86/lib/Makefile
+		lib-y    := delay.o
+
+	This will create a library lib.a based on delay.o. For kbuild to
+	actually recognize that there is a lib.a being built, the directory
+	shall be listed in libs-y.
+
+	See also "7.4 List directories to visit when descending".
+
+	Use of lib-y is normally restricted to `lib/` and `arch/*/lib`.
+
+3.6 Descending down in directories
+----------------------------------
+
+	A Makefile is only responsible for building objects in its own
+	directory. Files in subdirectories should be taken care of by
+	Makefiles in these subdirs. The build system will automatically
+	invoke make recursively in subdirectories, provided you let it know of
+	them.
+
+	To do so, obj-y and obj-m are used.
+	ext2 lives in a separate directory, and the Makefile present in fs/
+	tells kbuild to descend down using the following assignment.
+
+	Example::
+
+		#fs/Makefile
+		obj-$(CONFIG_EXT2_FS) += ext2/
+
+	If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)
+	the corresponding obj- variable will be set, and kbuild will descend
+	down in the ext2 directory.
+
+	Kbuild uses this information not only to decide that it needs to visit
+	the directory, but also to decide whether or not to link objects from
+	the directory into vmlinux.
+
+	When Kbuild descends into the directory with 'y', all built-in objects
+	from that directory are combined into the built-in.a, which will be
+	eventually linked into vmlinux.
+
+	When Kbuild descends into the directory with 'm', in contrast, nothing
+	from that directory will be linked into vmlinux. If the Makefile in
+	that directory specifies obj-y, those objects will be left orphan.
+	It is very likely a bug of the Makefile or of dependencies in Kconfig.
+
+	Kbuild also supports dedicated syntax, subdir-y and subdir-m, for
+	descending into subdirectories. It is a good fit when you know they
+	do not contain kernel-space objects at all. A typical usage is to let
+	Kbuild descend into subdirectories to build tools.
+
+	Examples::
+
+		# scripts/Makefile
+		subdir-$(CONFIG_GCC_PLUGINS) += gcc-plugins
+		subdir-$(CONFIG_MODVERSIONS) += genksyms
+		subdir-$(CONFIG_SECURITY_SELINUX) += selinux
+
+	Unlike obj-y/m, subdir-y/m does not need the trailing slash since this
+	syntax is always used for directories.
+
+	It is good practice to use a `CONFIG_` variable when assigning directory
+	names. This allows kbuild to totally skip the directory if the
+	corresponding `CONFIG_` option is neither 'y' nor 'm'.
+
+3.7 Non-builtin vmlinux targets - extra-y
+-----------------------------------------
+
+	extra-y specifies targets which are needed for building vmlinux,
+	but not combined into built-in.a.
+
+	Examples are:
+
+	1) head objects
+
+	    Some objects must be placed at the head of vmlinux. They are
+	    directly linked to vmlinux without going through built-in.a
+	    A typical use-case is an object that contains the entry point.
+
+	    arch/$(SRCARCH)/Makefile should specify such objects as head-y.
+
+	    Discussion:
+	      Given that we can control the section order in the linker script,
+	      why do we need head-y?
+
+	2) vmlinux linker script
+
+	    The linker script for vmlinux is located at
+	    arch/$(SRCARCH)/kernel/vmlinux.lds
+
+	Example::
+
+		# arch/x86/kernel/Makefile
+		extra-y	:= head_$(BITS).o
+		extra-y	+= head$(BITS).o
+		extra-y	+= ebda.o
+		extra-y	+= platform-quirks.o
+		extra-y	+= vmlinux.lds
+
+	$(extra-y) should only contain targets needed for vmlinux.
+
+	Kbuild skips extra-y when vmlinux is apparently not a final goal.
+	(e.g. 'make modules', or building external modules)
+
+	If you intend to build targets unconditionally, always-y (explained
+	in the next section) is the correct syntax to use.
+
+3.8 Always built goals - always-y
+---------------------------------
+
+	always-y specifies targets which are literally always built when
+	Kbuild visits the Makefile.
+
+	Example::
+	  # ./Kbuild
+	  offsets-file := include/generated/asm-offsets.h
+	  always-y += $(offsets-file)
+
+3.9 Compilation flags
+---------------------
+
+    ccflags-y, asflags-y and ldflags-y
+	These three flags apply only to the kbuild makefile in which they
+	are assigned. They are used for all the normal cc, as and ld
+	invocations happening during a recursive build.
+	Note: Flags with the same behaviour were previously named:
+	EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.
+	They are still supported but their usage is deprecated.
+
+	ccflags-y specifies options for compiling with $(CC).
+
+	Example::
+
+		# drivers/acpi/acpica/Makefile
+		ccflags-y			:= -Os -D_LINUX -DBUILDING_ACPICA
+		ccflags-$(CONFIG_ACPI_DEBUG)	+= -DACPI_DEBUG_OUTPUT
+
+	This variable is necessary because the top Makefile owns the
+	variable $(KBUILD_CFLAGS) and uses it for compilation flags for the
+	entire tree.
+
+	asflags-y specifies assembler options.
+
+	Example::
+
+		#arch/sparc/kernel/Makefile
+		asflags-y := -ansi
+
+	ldflags-y specifies options for linking with $(LD).
+
+	Example::
+
+		#arch/cris/boot/compressed/Makefile
+		ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds
+
+    subdir-ccflags-y, subdir-asflags-y
+	The two flags listed above are similar to ccflags-y and asflags-y.
+	The difference is that the subdir- variants have effect for the kbuild
+	file where they are present and all subdirectories.
+	Options specified using subdir-* are added to the commandline before
+	the options specified using the non-subdir variants.
+
+	Example::
+
+		subdir-ccflags-y := -Werror
+
+    ccflags-remove-y, asflags-remove-y
+	These flags are used to remove particular flags for the compiler,
+	assembler invocations.
+
+	Example::
+
+		ccflags-remove-$(CONFIG_MCOUNT) += -pg
+
+    CFLAGS_$@, AFLAGS_$@
+	CFLAGS_$@ and AFLAGS_$@ only apply to commands in current
+	kbuild makefile.
+
+	$(CFLAGS_$@) specifies per-file options for $(CC).  The $@
+	part has a literal value which specifies the file that it is for.
+
+	CFLAGS_$@ has the higher priority than ccflags-remove-y; CFLAGS_$@
+	can re-add compiler flags that were removed by ccflags-remove-y.
+
+	Example::
+
+		# drivers/scsi/Makefile
+		CFLAGS_aha152x.o =   -DAHA152X_STAT -DAUTOCONF
+
+	This line specify compilation flags for aha152x.o.
+
+	$(AFLAGS_$@) is a similar feature for source files in assembly
+	languages.
+
+	AFLAGS_$@ has the higher priority than asflags-remove-y; AFLAGS_$@
+	can re-add assembler flags that were removed by asflags-remove-y.
+
+	Example::
+
+		# arch/arm/kernel/Makefile
+		AFLAGS_head.o        := -DTEXT_OFFSET=$(TEXT_OFFSET)
+		AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
+		AFLAGS_iwmmxt.o      := -Wa,-mcpu=iwmmxt
+
+
+3.10 Dependency tracking
+------------------------
+
+	Kbuild tracks dependencies on the following:
+
+	1) All prerequisite files (both `*.c` and `*.h`)
+	2) `CONFIG_` options used in all prerequisite files
+	3) Command-line used to compile target
+
+	Thus, if you change an option to $(CC) all affected files will
+	be re-compiled.
+
+3.11 Custom Rules
+-----------------
+
+	Custom rules are used when the kbuild infrastructure does
+	not provide the required support. A typical example is
+	header files generated during the build process.
+	Another example are the architecture-specific Makefiles which
+	need custom rules to prepare boot images etc.
+
+	Custom rules are written as normal Make rules.
+	Kbuild is not executing in the directory where the Makefile is
+	located, so all custom rules shall use a relative
+	path to prerequisite files and target files.
+
+	Two variables are used when defining custom rules:
+
+	$(src)
+	    $(src) is a relative path which points to the directory
+	    where the Makefile is located. Always use $(src) when
+	    referring to files located in the src tree.
+
+	$(obj)
+	    $(obj) is a relative path which points to the directory
+	    where the target is saved. Always use $(obj) when
+	    referring to generated files.
+
+	    Example::
+
+		#drivers/scsi/Makefile
+		$(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl
+			$(CPP) -DCHIP=810 - < $< | ... $(src)/script_asm.pl
+
+	    This is a custom rule, following the normal syntax
+	    required by make.
+
+	    The target file depends on two prerequisite files. References
+	    to the target file are prefixed with $(obj), references
+	    to prerequisites are referenced with $(src) (because they are not
+	    generated files).
+
+	$(kecho)
+	    echoing information to user in a rule is often a good practice
+	    but when execution "make -s" one does not expect to see any output
+	    except for warnings/errors.
+	    To support this kbuild defines $(kecho) which will echo out the
+	    text following $(kecho) to stdout except if "make -s" is used.
+
+	Example::
+
+		# arch/arm/Makefile
+		$(BOOT_TARGETS): vmlinux
+			$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@
+			@$(kecho) '  Kernel: $(boot)/$@ is ready'
+
+	When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand
+	of a command is normally displayed.
+	To enable this behaviour for custom commands kbuild requires
+	two variables to be set::
+
+		quiet_cmd_<command>	- what shall be echoed
+		      cmd_<command>	- the command to execute
+
+	Example::
+
+		# lib/Makefile
+		quiet_cmd_crc32 = GEN     $@
+		      cmd_crc32 = $< > $@
+
+		$(obj)/crc32table.h: $(obj)/gen_crc32table
+			$(call cmd,crc32)
+
+	When updating the $(obj)/crc32table.h target, the line:
+
+		  GEN     lib/crc32table.h
+
+	will be displayed with "make KBUILD_VERBOSE=0".
+
+3.12 Command change detection
+-----------------------------
+
+	When the rule is evaluated, timestamps are compared between the target
+	and its prerequisite files. GNU Make updates the target when any of the
+	prerequisites is newer than that.
+
+	The target should be rebuilt also when the command line has changed
+	since the last invocation. This is not supported by Make itself, so
+	Kbuild achieves this by a kind of meta-programming.
+
+	if_changed is the macro used for this purpose, in the following form::
+
+		quiet_cmd_<command> = ...
+		      cmd_<command> = ...
+
+		<target>: <source(s)> FORCE
+			$(call if_changed,<command>)
+
+	Any target that utilizes if_changed must be listed in $(targets),
+	otherwise the command line check will fail, and the target will
+	always be built.
+
+	If the target is already listed in the recognized syntax such as
+	obj-y/m, lib-y/m, extra-y/m, always-y/m, hostprogs, userprogs, Kbuild
+	automatically adds it to $(targets). Otherwise, the target must be
+	explicitly added to $(targets).
+
+	Assignments to $(targets) are without $(obj)/ prefix. if_changed may be
+	used in conjunction with custom rules as defined in "3.11 Custom Rules".
+
+	Note: It is a typical mistake to forget the FORCE prerequisite.
+	Another common pitfall is that whitespace is sometimes significant; for
+	instance, the below will fail (note the extra space after the comma)::
+
+		target: source(s) FORCE
+
+	**WRONG!**	$(call if_changed, objcopy)
+
+	Note:
+		if_changed should not be used more than once per target.
+		It stores the executed command in a corresponding .cmd
+		file and multiple calls would result in overwrites and
+		unwanted results when the target is up to date and only the
+		tests on changed commands trigger execution of commands.
+
+3.13 $(CC) support functions
+----------------------------
+
+	The kernel may be built with several different versions of
+	$(CC), each supporting a unique set of features and options.
+	kbuild provides basic support to check for valid options for $(CC).
+	$(CC) is usually the gcc compiler, but other alternatives are
+	available.
+
+    as-option
+	as-option is used to check if $(CC) -- when used to compile
+	assembler (`*.S`) files -- supports the given option. An optional
+	second option may be specified if the first option is not supported.
+
+	Example::
+
+		#arch/sh/Makefile
+		cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
+
+	In the above example, cflags-y will be assigned the option
+	-Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
+	The second argument is optional, and if supplied will be used
+	if first argument is not supported.
+
+    as-instr
+	as-instr checks if the assembler reports a specific instruction
+	and then outputs either option1 or option2
+	C escapes are supported in the test instruction
+	Note: as-instr-option uses KBUILD_AFLAGS for assembler options
+
+    cc-option
+	cc-option is used to check if $(CC) supports a given option, and if
+	not supported to use an optional second option.
+
+	Example::
+
+		#arch/x86/Makefile
+		cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
+
+	In the above example, cflags-y will be assigned the option
+	-march=pentium-mmx if supported by $(CC), otherwise -march=i586.
+	The second argument to cc-option is optional, and if omitted,
+	cflags-y will be assigned no value if first option is not supported.
+	Note: cc-option uses KBUILD_CFLAGS for $(CC) options
+
+   cc-option-yn
+	cc-option-yn is used to check if gcc supports a given option
+	and return 'y' if supported, otherwise 'n'.
+
+	Example::
+
+		#arch/ppc/Makefile
+		biarch := $(call cc-option-yn, -m32)
+		aflags-$(biarch) += -a32
+		cflags-$(biarch) += -m32
+
+	In the above example, $(biarch) is set to y if $(CC) supports the -m32
+	option. When $(biarch) equals 'y', the expanded variables $(aflags-y)
+	and $(cflags-y) will be assigned the values -a32 and -m32,
+	respectively.
+	Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options
+
+    cc-disable-warning
+	cc-disable-warning checks if gcc supports a given warning and returns
+	the commandline switch to disable it. This special function is needed,
+	because gcc 4.4 and later accept any unknown -Wno-* option and only
+	warn about it if there is another warning in the source file.
+
+	Example::
+
+		KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
+
+	In the above example, -Wno-unused-but-set-variable will be added to
+	KBUILD_CFLAGS only if gcc really accepts it.
+
+    cc-ifversion
+	cc-ifversion tests the version of $(CC) and equals the fourth parameter
+	if version expression is true, or the fifth (if given) if the version
+	expression is false.
+
+	Example::
+
+		#fs/reiserfs/Makefile
+		ccflags-y := $(call cc-ifversion, -lt, 0402, -O1)
+
+	In this example, ccflags-y will be assigned the value -O1 if the
+	$(CC) version is less than 4.2.
+	cc-ifversion takes all the shell operators:
+	-eq, -ne, -lt, -le, -gt, and -ge
+	The third parameter may be a text as in this example, but it may also
+	be an expanded variable or a macro.
+
+    cc-cross-prefix
+	cc-cross-prefix is used to check if there exists a $(CC) in path with
+	one of the listed prefixes. The first prefix where there exist a
+	prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found
+	then nothing is returned.
+	Additional prefixes are separated by a single space in the
+	call of cc-cross-prefix.
+	This functionality is useful for architecture Makefiles that try
+	to set CROSS_COMPILE to well-known values but may have several
+	values to select between.
+	It is recommended only to try to set CROSS_COMPILE if it is a cross
+	build (host arch is different from target arch). And if CROSS_COMPILE
+	is already set then leave it with the old value.
+
+	Example::
+
+		#arch/m68k/Makefile
+		ifneq ($(SUBARCH),$(ARCH))
+		        ifeq ($(CROSS_COMPILE),)
+		               CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)
+			endif
+		endif
+
+3.14 $(LD) support functions
+----------------------------
+
+    ld-option
+	ld-option is used to check if $(LD) supports the supplied option.
+	ld-option takes two options as arguments.
+	The second argument is an optional option that can be used if the
+	first option is not supported by $(LD).
+
+	Example::
+
+		#Makefile
+		LDFLAGS_vmlinux += $(call ld-option, -X)
+
+3.15 Script invocation
+----------------------
+
+	Make rules may invoke scripts to build the kernel. The rules shall
+	always provide the appropriate interpreter to execute the script. They
+	shall not rely on the execute bits being set, and shall not invoke the
+	script directly. For the convenience of manual script invocation, such
+	as invoking ./scripts/checkpatch.pl, it is recommended to set execute
+	bits on the scripts nonetheless.
+
+	Kbuild provides variables $(CONFIG_SHELL), $(AWK), $(PERL),
+	and $(PYTHON3) to refer to interpreters for the respective
+	scripts.
+
+	Example::
+
+		#Makefile
+		cmd_depmod = $(CONFIG_SHELL) $(srctree)/scripts/depmod.sh $(DEPMOD) \
+			     $(KERNELRELEASE)
+
+4 Host Program support
+======================
+
+Kbuild supports building executables on the host for use during the
+compilation stage.
+Two steps are required in order to use a host executable.
+
+The first step is to tell kbuild that a host program exists. This is
+done utilising the variable "hostprogs".
+
+The second step is to add an explicit dependency to the executable.
+This can be done in two ways. Either add the dependency in a rule,
+or utilise the variable "always-y".
+Both possibilities are described in the following.
+
+4.1 Simple Host Program
+-----------------------
+
+	In some cases there is a need to compile and run a program on the
+	computer where the build is running.
+	The following line tells kbuild that the program bin2hex shall be
+	built on the build host.
+
+	Example::
+
+		hostprogs := bin2hex
+
+	Kbuild assumes in the above example that bin2hex is made from a single
+	c-source file named bin2hex.c located in the same directory as
+	the Makefile.
+
+4.2 Composite Host Programs
+---------------------------
+
+	Host programs can be made up based on composite objects.
+	The syntax used to define composite objects for host programs is
+	similar to the syntax used for kernel objects.
+	$(<executable>-objs) lists all objects used to link the final
+	executable.
+
+	Example::
+
+		#scripts/lxdialog/Makefile
+		hostprogs     := lxdialog
+		lxdialog-objs := checklist.o lxdialog.o
+
+	Objects with extension .o are compiled from the corresponding .c
+	files. In the above example, checklist.c is compiled to checklist.o
+	and lxdialog.c is compiled to lxdialog.o.
+
+	Finally, the two .o files are linked to the executable, lxdialog.
+	Note: The syntax <executable>-y is not permitted for host-programs.
+
+4.3 Using C++ for host programs
+-------------------------------
+
+	kbuild offers support for host programs written in C++. This was
+	introduced solely to support kconfig, and is not recommended
+	for general use.
+
+	Example::
+
+		#scripts/kconfig/Makefile
+		hostprogs     := qconf
+		qconf-cxxobjs := qconf.o
+
+	In the example above the executable is composed of the C++ file
+	qconf.cc - identified by $(qconf-cxxobjs).
+
+	If qconf is composed of a mixture of .c and .cc files, then an
+	additional line can be used to identify this.
+
+	Example::
+
+		#scripts/kconfig/Makefile
+		hostprogs     := qconf
+		qconf-cxxobjs := qconf.o
+		qconf-objs    := check.o
+
+4.4 Controlling compiler options for host programs
+--------------------------------------------------
+
+	When compiling host programs, it is possible to set specific flags.
+	The programs will always be compiled utilising $(HOSTCC) passed
+	the options specified in $(KBUILD_HOSTCFLAGS).
+	To set flags that will take effect for all host programs created
+	in that Makefile, use the variable HOST_EXTRACFLAGS.
+
+	Example::
+
+		#scripts/lxdialog/Makefile
+		HOST_EXTRACFLAGS += -I/usr/include/ncurses
+
+	To set specific flags for a single file the following construction
+	is used:
+
+	Example::
+
+		#arch/ppc64/boot/Makefile
+		HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)
+
+	It is also possible to specify additional options to the linker.
+
+	Example::
+
+		#scripts/kconfig/Makefile
+		HOSTLDLIBS_qconf := -L$(QTDIR)/lib
+
+	When linking qconf, it will be passed the extra option
+	"-L$(QTDIR)/lib".
+
+4.5 When host programs are actually built
+-----------------------------------------
+
+	Kbuild will only build host-programs when they are referenced
+	as a prerequisite.
+	This is possible in two ways:
+
+	(1) List the prerequisite explicitly in a custom rule.
+
+	Example::
+
+		#drivers/pci/Makefile
+		hostprogs := gen-devlist
+		$(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
+			( cd $(obj); ./gen-devlist ) < $<
+
+	The target $(obj)/devlist.h will not be built before
+	$(obj)/gen-devlist is updated. Note that references to
+	the host programs in custom rules must be prefixed with $(obj).
+
+	(2) Use always-y
+
+	When there is no suitable custom rule, and the host program
+	shall be built when a makefile is entered, the always-y
+	variable shall be used.
+
+	Example::
+
+		#scripts/lxdialog/Makefile
+		hostprogs     := lxdialog
+		always-y      := $(hostprogs)
+
+	Kbuild provides the following shorthand for this:
+
+		hostprogs-always-y := lxdialog
+
+	This will tell kbuild to build lxdialog even if not referenced in
+	any rule.
+
+5 Userspace Program support
+===========================
+
+Just like host programs, Kbuild also supports building userspace executables
+for the target architecture (i.e. the same architecture as you are building
+the kernel for).
+
+The syntax is quite similar. The difference is to use "userprogs" instead of
+"hostprogs".
+
+5.1 Simple Userspace Program
+----------------------------
+
+	The following line tells kbuild that the program bpf-direct shall be
+	built for the target architecture.
+
+	Example::
+
+		userprogs := bpf-direct
+
+	Kbuild assumes in the above example that bpf-direct is made from a
+	single C source file named bpf-direct.c located in the same directory
+	as the Makefile.
+
+5.2 Composite Userspace Programs
+--------------------------------
+
+	Userspace programs can be made up based on composite objects.
+	The syntax used to define composite objects for userspace programs is
+	similar to the syntax used for kernel objects.
+	$(<executable>-objs) lists all objects used to link the final
+	executable.
+
+	Example::
+
+		#samples/seccomp/Makefile
+		userprogs      := bpf-fancy
+		bpf-fancy-objs := bpf-fancy.o bpf-helper.o
+
+	Objects with extension .o are compiled from the corresponding .c
+	files. In the above example, bpf-fancy.c is compiled to bpf-fancy.o
+	and bpf-helper.c is compiled to bpf-helper.o.
+
+	Finally, the two .o files are linked to the executable, bpf-fancy.
+	Note: The syntax <executable>-y is not permitted for userspace programs.
+
+5.3 Controlling compiler options for userspace programs
+-------------------------------------------------------
+
+	When compiling userspace programs, it is possible to set specific flags.
+	The programs will always be compiled utilising $(CC) passed
+	the options specified in $(KBUILD_USERCFLAGS).
+	To set flags that will take effect for all userspace programs created
+	in that Makefile, use the variable userccflags.
+
+	Example::
+
+		# samples/seccomp/Makefile
+		userccflags += -I usr/include
+
+	To set specific flags for a single file the following construction
+	is used:
+
+	Example::
+
+		bpf-helper-userccflags += -I user/include
+
+	It is also possible to specify additional options to the linker.
+
+	Example::
+
+		# net/bpfilter/Makefile
+		bpfilter_umh-userldflags += -static
+
+	When linking bpfilter_umh, it will be passed the extra option -static.
+
+5.4 When userspace programs are actually built
+----------------------------------------------
+
+	Kbuild builds userspace programs only when told to do so.
+	There are two ways to do this.
+
+	(1) Add it as the prerequisite of another file
+
+	Example::
+
+		#net/bpfilter/Makefile
+		userprogs := bpfilter_umh
+		$(obj)/bpfilter_umh_blob.o: $(obj)/bpfilter_umh
+
+	$(obj)/bpfilter_umh is built before $(obj)/bpfilter_umh_blob.o
+
+	(2) Use always-y
+
+	Example::
+
+		userprogs := binderfs_example
+		always-y := $(userprogs)
+
+	Kbuild provides the following shorthand for this:
+
+		userprogs-always-y := binderfs_example
+
+	This will tell Kbuild to build binderfs_example when it visits this
+	Makefile.
+
+6 Kbuild clean infrastructure
+=============================
+
+"make clean" deletes most generated files in the obj tree where the kernel
+is compiled. This includes generated files such as host programs.
+Kbuild knows targets listed in $(hostprogs), $(always-y), $(always-m),
+$(always-), $(extra-y), $(extra-) and $(targets). They are all deleted
+during "make clean". Files matching the patterns "*.[oas]", "*.ko", plus
+some additional files generated by kbuild are deleted all over the kernel
+source tree when "make clean" is executed.
+
+Additional files or directories can be specified in kbuild makefiles by use of
+$(clean-files).
+
+	Example::
+
+		#lib/Makefile
+		clean-files := crc32table.h
+
+When executing "make clean", the file "crc32table.h" will be deleted.
+Kbuild will assume files to be in the same relative directory as the
+Makefile, except if prefixed with $(objtree).
+
+To exclude certain files or directories from make clean, use the
+$(no-clean-files) variable.
+
+Usually kbuild descends down in subdirectories due to "obj-* := dir/",
+but in the architecture makefiles where the kbuild infrastructure
+is not sufficient this sometimes needs to be explicit.
+
+	Example::
+
+		#arch/x86/boot/Makefile
+		subdir- := compressed
+
+The above assignment instructs kbuild to descend down in the
+directory compressed/ when "make clean" is executed.
+
+To support the clean infrastructure in the Makefiles that build the
+final bootimage there is an optional target named archclean:
+
+	Example::
+
+		#arch/x86/Makefile
+		archclean:
+			$(Q)$(MAKE) $(clean)=arch/x86/boot
+
+When "make clean" is executed, make will descend down in arch/x86/boot,
+and clean as usual. The Makefile located in arch/x86/boot/ may use
+the subdir- trick to descend further down.
+
+Note 1: arch/$(SRCARCH)/Makefile cannot use "subdir-", because that file is
+included in the top level makefile, and the kbuild infrastructure
+is not operational at that point.
+
+Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will
+be visited during "make clean".
+
+7 Architecture Makefiles
+========================
+
+The top level Makefile sets up the environment and does the preparation,
+before starting to descend down in the individual directories.
+The top level makefile contains the generic part, whereas
+arch/$(SRCARCH)/Makefile contains what is required to set up kbuild
+for said architecture.
+To do so, arch/$(SRCARCH)/Makefile sets up a number of variables and defines
+a few targets.
+
+When kbuild executes, the following steps are followed (roughly):
+
+1) Configuration of the kernel => produce .config
+2) Store kernel version in include/linux/version.h
+3) Updating all other prerequisites to the target prepare:
+   - Additional prerequisites are specified in arch/$(SRCARCH)/Makefile
+4) Recursively descend down in all directories listed in
+   init-* core* drivers-* net-* libs-* and build all targets.
+   - The values of the above variables are expanded in arch/$(SRCARCH)/Makefile.
+5) All object files are then linked and the resulting file vmlinux is
+   located at the root of the obj tree.
+   The very first objects linked are listed in head-y, assigned by
+   arch/$(SRCARCH)/Makefile.
+6) Finally, the architecture-specific part does any required post processing
+   and builds the final bootimage.
+   - This includes building boot records
+   - Preparing initrd images and the like
+
+
+7.1 Set variables to tweak the build to the architecture
+--------------------------------------------------------
+
+    KBUILD_LDFLAGS
+	Generic $(LD) options
+
+	Flags used for all invocations of the linker.
+	Often specifying the emulation is sufficient.
+
+	Example::
+
+		#arch/s390/Makefile
+		KBUILD_LDFLAGS         := -m elf_s390
+
+	Note: ldflags-y can be used to further customise
+	the flags used. See section 3.7.
+
+    LDFLAGS_vmlinux
+	Options for $(LD) when linking vmlinux
+
+	LDFLAGS_vmlinux is used to specify additional flags to pass to
+	the linker when linking the final vmlinux image.
+	LDFLAGS_vmlinux uses the LDFLAGS_$@ support.
+
+	Example::
+
+		#arch/x86/Makefile
+		LDFLAGS_vmlinux := -e stext
+
+    OBJCOPYFLAGS
+	objcopy flags
+
+	When $(call if_changed,objcopy) is used to translate a .o file,
+	the flags specified in OBJCOPYFLAGS will be used.
+	$(call if_changed,objcopy) is often used to generate raw binaries on
+	vmlinux.
+
+	Example::
+
+		#arch/s390/Makefile
+		OBJCOPYFLAGS := -O binary
+
+		#arch/s390/boot/Makefile
+		$(obj)/image: vmlinux FORCE
+			$(call if_changed,objcopy)
+
+	In this example, the binary $(obj)/image is a binary version of
+	vmlinux. The usage of $(call if_changed,xxx) will be described later.
+
+    KBUILD_AFLAGS
+	Assembler flags
+
+	Default value - see top level Makefile
+	Append or modify as required per architecture.
+
+	Example::
+
+		#arch/sparc64/Makefile
+		KBUILD_AFLAGS += -m64 -mcpu=ultrasparc
+
+    KBUILD_CFLAGS
+	$(CC) compiler flags
+
+	Default value - see top level Makefile
+	Append or modify as required per architecture.
+
+	Often, the KBUILD_CFLAGS variable depends on the configuration.
+
+	Example::
+
+		#arch/x86/boot/compressed/Makefile
+		cflags-$(CONFIG_X86_32) := -march=i386
+		cflags-$(CONFIG_X86_64) := -mcmodel=small
+		KBUILD_CFLAGS += $(cflags-y)
+
+	Many arch Makefiles dynamically run the target C compiler to
+	probe supported options::
+
+		#arch/x86/Makefile
+
+		...
+		cflags-$(CONFIG_MPENTIUMII)     += $(call cc-option,\
+						-march=pentium2,-march=i686)
+		...
+		# Disable unit-at-a-time mode ...
+		KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)
+		...
+
+
+	The first example utilises the trick that a config option expands
+	to 'y' when selected.
+
+    KBUILD_AFLAGS_KERNEL
+	Assembler options specific for built-in
+
+	$(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile
+	resident kernel code.
+
+    KBUILD_AFLAGS_MODULE
+	Assembler options specific for modules
+
+	$(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that
+	are used for assembler.
+
+	From commandline AFLAGS_MODULE shall be used (see kbuild.rst).
+
+    KBUILD_CFLAGS_KERNEL
+	$(CC) options specific for built-in
+
+	$(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile
+	resident kernel code.
+
+    KBUILD_CFLAGS_MODULE
+	Options for $(CC) when building modules
+
+	$(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that
+	are used for $(CC).
+	From commandline CFLAGS_MODULE shall be used (see kbuild.rst).
+
+    KBUILD_LDFLAGS_MODULE
+	Options for $(LD) when linking modules
+
+	$(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options
+	used when linking modules. This is often a linker script.
+
+	From commandline LDFLAGS_MODULE shall be used (see kbuild.rst).
+
+    KBUILD_LDS
+
+	The linker script with full path. Assigned by the top-level Makefile.
+
+    KBUILD_LDS_MODULE
+
+	The module linker script with full path. Assigned by the top-level
+	Makefile and additionally by the arch Makefile.
+
+    KBUILD_VMLINUX_OBJS
+
+	All object files for vmlinux. They are linked to vmlinux in the same
+	order as listed in KBUILD_VMLINUX_OBJS.
+
+    KBUILD_VMLINUX_LIBS
+
+	All .a "lib" files for vmlinux. KBUILD_VMLINUX_OBJS and
+	KBUILD_VMLINUX_LIBS together specify all the object files used to
+	link vmlinux.
+
+7.2 Add prerequisites to archheaders
+------------------------------------
+
+	The archheaders: rule is used to generate header files that
+	may be installed into user space by "make header_install".
+
+	It is run before "make archprepare" when run on the
+	architecture itself.
+
+
+7.3 Add prerequisites to archprepare
+------------------------------------
+
+	The archprepare: rule is used to list prerequisites that need to be
+	built before starting to descend down in the subdirectories.
+	This is usually used for header files containing assembler constants.
+
+	Example::
+
+		#arch/arm/Makefile
+		archprepare: maketools
+
+	In this example, the file target maketools will be processed
+	before descending down in the subdirectories.
+	See also chapter XXX-TODO that describes how kbuild supports
+	generating offset header files.
+
+
+7.4 List directories to visit when descending
+---------------------------------------------
+
+	An arch Makefile cooperates with the top Makefile to define variables
+	which specify how to build the vmlinux file.  Note that there is no
+	corresponding arch-specific section for modules; the module-building
+	machinery is all architecture-independent.
+
+
+	head-y, core-y, libs-y, drivers-y
+	    $(head-y) lists objects to be linked first in vmlinux.
+
+	    $(libs-y) lists directories where a lib.a archive can be located.
+
+	    The rest list directories where a built-in.a object file can be
+	    located.
+
+	    Then the rest follows in this order:
+
+		$(core-y), $(libs-y), $(drivers-y)
+
+	    The top level Makefile defines values for all generic directories,
+	    and arch/$(SRCARCH)/Makefile only adds architecture-specific
+	    directories.
+
+	    Example::
+
+		# arch/sparc/Makefile
+		core-y                 += arch/sparc/
+
+		libs-y                 += arch/sparc/prom/
+		libs-y                 += arch/sparc/lib/
+
+		drivers-$(CONFIG_PM) += arch/sparc/power/
+
+7.5 Architecture-specific boot images
+-------------------------------------
+
+	An arch Makefile specifies goals that take the vmlinux file, compress
+	it, wrap it in bootstrapping code, and copy the resulting files
+	somewhere. This includes various kinds of installation commands.
+	The actual goals are not standardized across architectures.
+
+	It is common to locate any additional processing in a boot/
+	directory below arch/$(SRCARCH)/.
+
+	Kbuild does not provide any smart way to support building a
+	target specified in boot/. Therefore arch/$(SRCARCH)/Makefile shall
+	call make manually to build a target in boot/.
+
+	The recommended approach is to include shortcuts in
+	arch/$(SRCARCH)/Makefile, and use the full path when calling down
+	into the arch/$(SRCARCH)/boot/Makefile.
+
+	Example::
+
+		#arch/x86/Makefile
+		boot := arch/x86/boot
+		bzImage: vmlinux
+			$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
+
+	"$(Q)$(MAKE) $(build)=<dir>" is the recommended way to invoke
+	make in a subdirectory.
+
+	There are no rules for naming architecture-specific targets,
+	but executing "make help" will list all relevant targets.
+	To support this, $(archhelp) must be defined.
+
+	Example::
+
+		#arch/x86/Makefile
+		define archhelp
+		  echo  '* bzImage      - Compressed kernel image (arch/x86/boot/bzImage)'
+		endif
+
+	When make is executed without arguments, the first goal encountered
+	will be built. In the top level Makefile the first goal present
+	is all:.
+	An architecture shall always, per default, build a bootable image.
+	In "make help", the default goal is highlighted with a '*'.
+	Add a new prerequisite to all: to select a default goal different
+	from vmlinux.
+
+	Example::
+
+		#arch/x86/Makefile
+		all: bzImage
+
+	When "make" is executed without arguments, bzImage will be built.
+
+7.7 Commands useful for building a boot image
+---------------------------------------------
+
+    Kbuild provides a few macros that are useful when building a
+    boot image.
+
+    ld
+	Link target. Often, LDFLAGS_$@ is used to set specific options to ld.
+
+	Example::
+
+		#arch/x86/boot/Makefile
+		LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary
+		LDFLAGS_setup    := -Ttext 0x0 -s --oformat binary -e begtext
+
+		targets += setup setup.o bootsect bootsect.o
+		$(obj)/setup $(obj)/bootsect: %: %.o FORCE
+			$(call if_changed,ld)
+
+	In this example, there are two possible targets, requiring different
+	options to the linker. The linker options are specified using the
+	LDFLAGS_$@ syntax - one for each potential target.
+	$(targets) are assigned all potential targets, by which kbuild knows
+	the targets and will:
+
+		1) check for commandline changes
+		2) delete target during make clean
+
+	The ": %: %.o" part of the prerequisite is a shorthand that
+	frees us from listing the setup.o and bootsect.o files.
+
+	Note:
+	      It is a common mistake to forget the "targets :=" assignment,
+	      resulting in the target file being recompiled for no
+	      obvious reason.
+
+    objcopy
+	Copy binary. Uses OBJCOPYFLAGS usually specified in
+	arch/$(SRCARCH)/Makefile.
+	OBJCOPYFLAGS_$@ may be used to set additional options.
+
+    gzip
+	Compress target. Use maximum compression to compress target.
+
+	Example::
+
+		#arch/x86/boot/compressed/Makefile
+		$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
+			$(call if_changed,gzip)
+
+    dtc
+	Create flattened device tree blob object suitable for linking
+	into vmlinux. Device tree blobs linked into vmlinux are placed
+	in an init section in the image. Platform code *must* copy the
+	blob to non-init memory prior to calling unflatten_device_tree().
+
+	To use this command, simply add `*.dtb` into obj-y or targets, or make
+	some other target depend on `%.dtb`
+
+	A central rule exists to create `$(obj)/%.dtb` from `$(src)/%.dts`;
+	architecture Makefiles do no need to explicitly write out that rule.
+
+	Example::
+
+		targets += $(dtb-y)
+		DTC_FLAGS ?= -p 1024
+
+7.9 Preprocessing linker scripts
+--------------------------------
+
+	When the vmlinux image is built, the linker script
+	arch/$(SRCARCH)/kernel/vmlinux.lds is used.
+	The script is a preprocessed variant of the file vmlinux.lds.S
+	located in the same directory.
+	kbuild knows .lds files and includes a rule `*lds.S` -> `*lds`.
+
+	Example::
+
+		#arch/x86/kernel/Makefile
+		extra-y := vmlinux.lds
+
+	The assignment to extra-y is used to tell kbuild to build the
+	target vmlinux.lds.
+	The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the
+	specified options when building the target vmlinux.lds.
+
+	When building the `*.lds` target, kbuild uses the variables::
+
+		KBUILD_CPPFLAGS	: Set in top-level Makefile
+		cppflags-y	: May be set in the kbuild makefile
+		CPPFLAGS_$(@F)  : Target-specific flags.
+				Note that the full filename is used in this
+				assignment.
+
+	The kbuild infrastructure for `*lds` files is used in several
+	architecture-specific files.
+
+7.10 Generic header files
+-------------------------
+
+	The directory include/asm-generic contains the header files
+	that may be shared between individual architectures.
+	The recommended approach how to use a generic header file is
+	to list the file in the Kbuild file.
+	See "8.2 generic-y" for further info on syntax etc.
+
+7.11 Post-link pass
+-------------------
+
+	If the file arch/xxx/Makefile.postlink exists, this makefile
+	will be invoked for post-link objects (vmlinux and modules.ko)
+	for architectures to run post-link passes on. Must also handle
+	the clean target.
+
+	This pass runs after kallsyms generation. If the architecture
+	needs to modify symbol locations, rather than manipulate the
+	kallsyms, it may be easier to add another postlink target for
+	.tmp_vmlinux? targets to be called from link-vmlinux.sh.
+
+	For example, powerpc uses this to check relocation sanity of
+	the linked vmlinux file.
+
+8 Kbuild syntax for exported headers
+------------------------------------
+
+The kernel includes a set of headers that is exported to userspace.
+Many headers can be exported as-is but other headers require a
+minimal pre-processing before they are ready for user-space.
+The pre-processing does:
+
+- drop kernel-specific annotations
+- drop include of compiler.h
+- drop all sections that are kernel internal (guarded by `ifdef __KERNEL__`)
+
+All headers under include/uapi/, include/generated/uapi/,
+arch/<arch>/include/uapi/ and arch/<arch>/include/generated/uapi/
+are exported.
+
+A Kbuild file may be defined under arch/<arch>/include/uapi/asm/ and
+arch/<arch>/include/asm/ to list asm files coming from asm-generic.
+See subsequent chapter for the syntax of the Kbuild file.
+
+8.1 no-export-headers
+---------------------
+
+	no-export-headers is essentially used by include/uapi/linux/Kbuild to
+	avoid exporting specific headers (e.g. kvm.h) on architectures that do
+	not support it. It should be avoided as much as possible.
+
+8.2 generic-y
+-------------
+
+	If an architecture uses a verbatim copy of a header from
+	include/asm-generic then this is listed in the file
+	arch/$(SRCARCH)/include/asm/Kbuild like this:
+
+		Example::
+
+			#arch/x86/include/asm/Kbuild
+			generic-y += termios.h
+			generic-y += rtc.h
+
+	During the prepare phase of the build a wrapper include
+	file is generated in the directory::
+
+		arch/$(SRCARCH)/include/generated/asm
+
+	When a header is exported where the architecture uses
+	the generic header a similar wrapper is generated as part
+	of the set of exported headers in the directory::
+
+		usr/include/asm
+
+	The generated wrapper will in both cases look like the following:
+
+		Example: termios.h::
+
+			#include <asm-generic/termios.h>
+
+8.3 generated-y
+---------------
+
+	If an architecture generates other header files alongside generic-y
+	wrappers, generated-y specifies them.
+
+	This prevents them being treated as stale asm-generic wrappers and
+	removed.
+
+		Example::
+
+			#arch/x86/include/asm/Kbuild
+			generated-y += syscalls_32.h
+
+8.4 mandatory-y
+---------------
+
+	mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild
+	to define the minimum set of ASM headers that all architectures must have.
+
+	This works like optional generic-y. If a mandatory header is missing
+	in arch/$(SRCARCH)/include/(uapi/)/asm, Kbuild will automatically
+	generate a wrapper of the asm-generic one.
+
+9 Kbuild Variables
+==================
+
+The top Makefile exports the following variables:
+
+    VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION
+	These variables define the current kernel version.  A few arch
+	Makefiles actually use these values directly; they should use
+	$(KERNELRELEASE) instead.
+
+	$(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic
+	three-part version number, such as "2", "4", and "0".  These three
+	values are always numeric.
+
+	$(EXTRAVERSION) defines an even tinier sublevel for pre-patches
+	or additional patches.	It is usually some non-numeric string
+	such as "-pre4", and is often blank.
+
+    KERNELRELEASE
+	$(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable
+	for constructing installation directory names or showing in
+	version strings.  Some arch Makefiles use it for this purpose.
+
+    ARCH
+	This variable defines the target architecture, such as "i386",
+	"arm", or "sparc". Some kbuild Makefiles test $(ARCH) to
+	determine which files to compile.
+
+	By default, the top Makefile sets $(ARCH) to be the same as the
+	host system architecture.  For a cross build, a user may
+	override the value of $(ARCH) on the command line::
+
+	    make ARCH=m68k ...
+
+    SRCARCH
+	This variable specifies the directory in arch/ to build.
+
+	ARCH and SRCARCH may not necessarily match. A couple of arch
+	directories are biarch, that is, a single `arch/*/` directory supports
+	both 32-bit and 64-bit.
+
+	For example, you can pass in ARCH=i386, ARCH=x86_64, or ARCH=x86.
+	For all of them, SRCARCH=x86 because arch/x86/ supports	both i386 and
+	x86_64.
+
+    INSTALL_PATH
+	This variable defines a place for the arch Makefiles to install
+	the resident kernel image and System.map file.
+	Use this for architecture-specific install targets.
+
+    INSTALL_MOD_PATH, MODLIB
+	$(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module
+	installation.  This variable is not defined in the Makefile but
+	may be passed in by the user if desired.
+
+	$(MODLIB) specifies the directory for module installation.
+	The top Makefile defines $(MODLIB) to
+	$(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE).  The user may
+	override this value on the command line if desired.
+
+    INSTALL_MOD_STRIP
+	If this variable is specified, it will cause modules to be stripped
+	after they are installed.  If INSTALL_MOD_STRIP is '1', then the
+	default option --strip-debug will be used.  Otherwise, the
+	INSTALL_MOD_STRIP value will be used as the option(s) to the strip
+	command.
+
+
+10 Makefile language
+====================
+
+The kernel Makefiles are designed to be run with GNU Make.  The Makefiles
+use only the documented features of GNU Make, but they do use many
+GNU extensions.
+
+GNU Make supports elementary list-processing functions.  The kernel
+Makefiles use a novel style of list building and manipulation with few
+"if" statements.
+
+GNU Make has two assignment operators, ":=" and "=".  ":=" performs
+immediate evaluation of the right-hand side and stores an actual string
+into the left-hand side.  "=" is like a formula definition; it stores the
+right-hand side in an unevaluated form and then evaluates this form each
+time the left-hand side is used.
+
+There are some cases where "=" is appropriate.  Usually, though, ":="
+is the right choice.
+
+11 Credits
+==========
+
+- Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
+- Updates by Kai Germaschewski <kai@tp1.ruhr-uni-bochum.de>
+- Updates by Sam Ravnborg <sam@ravnborg.org>
+- Language QA by Jan Engelhardt <jengelh@gmx.de>
+
+12 TODO
+=======
+
+- Describe how kbuild supports shipped files with _shipped.
+- Generating offset header files.
+- Add more variables to chapters 7 or 9?
diff --git a/doc/develop/menus.rst b/doc/develop/menus.rst
new file mode 100644
index 00000000000..dda8f963fb5
--- /dev/null
+++ b/doc/develop/menus.rst
@@ -0,0 +1,131 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2010-2011 Calxeda, Inc.
+
+Menus
+=====
+
+U-Boot provides a set of interfaces for creating and using simple, text
+based menus. Menus are displayed as lists of labeled entries on the
+console, and an entry can be selected by entering its label.
+
+To use the menu code, enable CONFIG_MENU, and include "menu.h" where
+the interfaces should be available.
+
+Menus are composed of items. Each item has a key used to identify it in
+the menu, and an opaque pointer to data controlled by the consumer.
+
+If you want to show a menu, instead starting the shell, define
+CONFIG_AUTOBOOT_MENU_SHOW. You have to code the int menu_show(int bootdelay)
+function, which handle your menu. This function returns the remaining
+bootdelay.
+
+Interfaces
+----------
+
+.. code-block:: c
+
+    #include "menu.h"
+
+    /*
+     * Consumers of the menu interfaces will use a struct menu * as the
+     * handle for a menu. struct menu is only fully defined in menu.c,
+     * preventing consumers of the menu interfaces from accessing its
+     * contents directly.
+     */
+    struct menu;
+
+    /*
+     * NOTE: See comments in common/menu.c for more detailed documentation on
+     * these interfaces.
+     */
+
+    /*
+     * menu_create() - Creates a menu handle with default settings
+     */
+    struct menu *menu_create(char *title, int timeout, int prompt,
+                             void (*item_data_print)(void *),
+                             char *(*item_choice)(void *),
+                             void *item_choice_data);
+
+    /*
+     * menu_item_add() - Adds or replaces a menu item
+     */
+    int menu_item_add(struct menu *m, char *item_key, void *item_data);
+
+    /*
+     * menu_default_set() - Sets the default choice for the menu
+     */
+    int menu_default_set(struct menu *m, char *item_key);
+
+    /*
+     * menu_default_choice() - Set *choice to point to the default item's data
+     */
+    int menu_default_choice(struct menu *m, void **choice);
+
+    /*
+     * menu_get_choice() - Returns the user's selected menu entry, or the
+     * default if the menu is set to not prompt or the timeout expires.
+     */
+    int menu_get_choice(struct menu *m, void **choice);
+
+    /*
+     * menu_destroy() - frees the memory used by a menu and its items.
+     */
+    int menu_destroy(struct menu *m);
+
+    /*
+     * menu_display_statusline(struct menu *m);
+     * shows a statusline for every menu_display call.
+     */
+    void menu_display_statusline(struct menu *m);
+
+Example Code
+------------
+
+This example creates a menu that always prompts, and allows the user
+to pick from a list of tools.  The item key and data are the same.
+
+.. code-block:: c
+
+    #include "menu.h"
+
+    char *tools[] = {
+        "Hammer",
+        "Screwdriver",
+        "Nail gun",
+        NULL
+    };
+
+    char *pick_a_tool(void)
+    {
+        struct menu *m;
+        int i;
+        char *tool = NULL;
+
+        m = menu_create("Tools", 0, 1, NULL);
+
+        for(i = 0; tools[i]; i++) {
+            if (menu_item_add(m, tools[i], tools[i]) != 1) {
+                printf("failed to add item!");
+                menu_destroy(m);
+                return NULL;
+            }
+        }
+
+        if (menu_get_choice(m, (void **)&tool) != 1)
+            printf("Problem picking tool!\n");
+
+        menu_destroy(m);
+
+        return tool;
+    }
+
+    void caller(void)
+    {
+        char *tool = pick_a_tool();
+
+        if (tool) {
+            printf("picked a tool: %s\n", tool);
+            use_tool(tool);
+        }
+    }
diff --git a/doc/develop/package/binman.rst b/doc/develop/package/binman.rst
new file mode 120000
index 00000000000..2e26e84b7d2
--- /dev/null
+++ b/doc/develop/package/binman.rst
@@ -0,0 +1 @@
+../../../tools/binman/binman.rst
\ No newline at end of file
diff --git a/doc/develop/package/bintools.rst b/doc/develop/package/bintools.rst
new file mode 120000
index 00000000000..7ef3d75e935
--- /dev/null
+++ b/doc/develop/package/bintools.rst
@@ -0,0 +1 @@
+../../../tools/binman/bintools.rst
\ No newline at end of file
diff --git a/doc/develop/package/entries.rst b/doc/develop/package/entries.rst
new file mode 120000
index 00000000000..ecedcebaad4
--- /dev/null
+++ b/doc/develop/package/entries.rst
@@ -0,0 +1 @@
+../../../tools/binman/entries.rst
\ No newline at end of file
diff --git a/doc/develop/package/index.rst b/doc/develop/package/index.rst
new file mode 100644
index 00000000000..4f448313f95
--- /dev/null
+++ b/doc/develop/package/index.rst
@@ -0,0 +1,19 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Package U-Boot
+==============
+
+U-Boot uses Flat Image Tree (FIT) as a standard file format for packaging
+images that it reads and boots. Documentation about FIT is available at
+doc/uImage.FIT
+
+U-Boot also provides binman for cases not covered by FIT. Examples include
+initial execution (since FIT itself does not have an executable header) and
+dealing with device boundaries, such as the read-only/read-write separation in
+SPI flash.
+
+
+.. toctree::
+   :maxdepth: 2
+
+   binman
diff --git a/doc/develop/patman.rst b/doc/develop/patman.rst
new file mode 120000
index 00000000000..0fcb7d61d40
--- /dev/null
+++ b/doc/develop/patman.rst
@@ -0,0 +1 @@
+../../tools/patman/patman.rst
\ No newline at end of file
diff --git a/doc/develop/pics/flamegraph.png b/doc/develop/pics/flamegraph.png
new file mode 100644
index 00000000000..dbdd27e6d87
--- /dev/null
+++ b/doc/develop/pics/flamegraph.png
diff --git a/doc/develop/pics/flamegraph_timing.png b/doc/develop/pics/flamegraph_timing.png
new file mode 100644
index 00000000000..b388b8b9881
--- /dev/null
+++ b/doc/develop/pics/flamegraph_timing.png
diff --git a/doc/develop/pics/flamegraph_zoom.png b/doc/develop/pics/flamegraph_zoom.png
new file mode 100644
index 00000000000..38b68444b7b
--- /dev/null
+++ b/doc/develop/pics/flamegraph_zoom.png
diff --git a/doc/develop/pics/kernelshark.png b/doc/develop/pics/kernelshark.png
new file mode 100644
index 00000000000..3450c6b5fd3
--- /dev/null
+++ b/doc/develop/pics/kernelshark.png
diff --git a/doc/develop/pics/kernelshark_fg.png b/doc/develop/pics/kernelshark_fg.png
new file mode 100644
index 00000000000..a54efd1c4cf
--- /dev/null
+++ b/doc/develop/pics/kernelshark_fg.png
diff --git a/doc/develop/printf.rst b/doc/develop/printf.rst
new file mode 100644
index 00000000000..99d05061b14
--- /dev/null
+++ b/doc/develop/printf.rst
@@ -0,0 +1,199 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Printf() format codes
+=====================
+
+Each conversion specification consists of:
+
+* leading '%' character
+* zero or more flags
+* an optional minimum field width
+* an optional precision field preceded by '.'
+* an optional length modifier
+* a conversion specifier
+
+Flags
+-----
+
+'space'
+	fill up with spaces to reach the specified length
+
+\-
+	left justify
+
+\+
+	add sign field of decimal conversion
+
+#
+	convert to alternative form
+
+	* prepend 0 to octal output
+	* ignored for decimal output
+	* prepend 0X to hexadecimal output
+
+0
+	fill up with zeroes to reach the specified length
+
+
+Integer types
+-------------
+
+Length modifiers
+''''''''''''''''
+
+The optional length modifier specifies the size of the argument.
+
+no modifier
+	bool, enum, short, int are passed as int
+
+%h
+	convert to (unsigned) short before printing.
+	Only the low 16 bits are printed.
+
+%hh
+	**not implemented**
+
+%j
+	**not implemented**
+
+%l
+	long
+
+%ll, %L
+	long long
+
+%t
+	ptr_diff_t
+
+%z, %Z
+	size_t, ssize_t
+
+Conversion specifiers
+'''''''''''''''''''''
+
+Conversion specifiers control the output.
+
+%d
+	signed decimal
+
+%u
+	unsigned decimal
+
+%o
+	unsigned octal
+
+%x
+	unsigned lower case hexadecimal
+
+%X
+	unsigned upper case hexadecimal
+
+The floating point conversion specifiers are not implemented:
+
+* %a
+* %A
+* %e
+* %E
+* %f
+* %F
+* %g
+* %G
+
+The following tables shows the correct combinations of modifiers and specifiers
+for the individual integer types.
+
+=================== ==================
+Type                Format specifier
+=================== ==================
+bool                %d, %x
+char                %d, %x
+unsigned char       %u, %x
+short               %d, %x
+unsigned short      %u, %x
+int                 %d, %x
+unsigned int        %u, %x
+long                %ld, %lx
+unsigned long       %lu, %lx
+long long           %lld, %llx
+unsigned long long  %llu, %llx
+off_t               %llu, %llx
+ptr_diff_t          %td, %tx
+fdt_addr_t          %pa, see pointers
+fdt_size_t          %pa, see pointers
+phys_addr_t         %pa, see pointers
+phys_size_t         %pa, see pointers
+resource_size_t     %pa, see pointers
+size_t              %zu, %zx, %zX
+ssize_t             %zd, %zx, %zX
+=================== ==================
+
+Characters
+----------
+
+%%
+	a '%' character is written
+
+%c
+        prints a single character
+
+%lc
+	**not implemented**
+
+Strings
+-------
+
+%s
+        prints a UTF-8 string (char \*)
+
+%ls
+        prints a UTF-16 string (u16 \*)
+
+Pointers
+--------
+
+%p
+        prints the address the pointer points to hexadecimally
+
+%pa, %pap
+        prints the value of a phys_addr_t value that the pointer points to
+        preceded with 0x and zero padding according to the size of phys_addr_t.
+	The following types should be printed this way:
+
+	* fdt_addr_t
+	* fdt_size_t
+	* phys_addr_t
+	* phys_size_t
+	* resource_size_t
+
+%pD
+        prints a UEFI device path
+
+%pi4, %pI4
+        prints IPv4 address, e.g. '192.168.0.1'
+
+%pm
+        prints MAC address without separators, e.g. '001122334455'
+
+%pM
+        print MAC address colon separated, e.g. '00:01:02:03:04:05'
+
+%pUb
+        prints GUID big endian, lower case
+        e.g. '00112233-4455-6677-8899-aabbccddeeff'
+
+%pUB
+        prints GUID big endian, upper case
+        e.g. '00112233-4455-6677-8899-AABBCCDDEEFF'
+
+%pUl
+        prints GUID little endian, lower case
+        e.g. '33221100-5544-7766-8899-aabbccddeeff'
+
+%pUL
+        prints GUID little endian, upper case
+        e.g. '33221100-5544-7766-8899-AABBCCDDEEFF'
+
+%pUs
+        prints text description of a GUID or if such is not known little endian,
+        lower case, e.g. 'system' for a GUID identifying an EFI system
+	partition.
diff --git a/doc/develop/process.rst b/doc/develop/process.rst
new file mode 100644
index 00000000000..0542b3fc124
--- /dev/null
+++ b/doc/develop/process.rst
@@ -0,0 +1,274 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+U-Boot Development Process
+==========================
+
+Management Summary
+------------------
+
+* Development happens in Release Cycles of 3 months.
+
+* The first 3 weeks of the cycle are referred to as the Merge Window, which is
+  followed by a Stabilization Period.
+
+* Patches with new code get only accepted while the Merge Window is open.
+
+* A patch that is generally in good shape and that was submitted while the
+  Merge Window was open is eligible to go into the upcoming release, even if
+  changes and resubmits are needed.
+
+* During the Stabilization Period, only patches that contain bug fixes get
+  applied.
+
+Phases of the Development Process
+---------------------------------
+
+U-Boot development takes place in `Release Cycles
+<https://www.denx.de/wiki/U-Boot/ReleaseCycle>`_.  A Release Cycle lasts
+normally for three months.
+
+The first three weeks of each Release Cycle are called *Merge Window*.
+
+It is followed by a *Stabilization Period*.
+
+The end of a Release Cycle is marked by the release of a new U-Boot version.
+
+Merge Window
+^^^^^^^^^^^^
+
+The Merge Window is the period when new patches get submitted (and hopefully
+accepted) for inclusion into U-Boot mainline. This period lasts for 21 days (3
+weeks) and ends with the release of ``"-rc1"``.
+
+This is the only time when new code (like support for new processors or new
+boards, or other new features or reorganization of code) is accepted.
+
+Twilight Time
+^^^^^^^^^^^^^
+
+Usually patches do not get accepted as they are - the peer review that takes
+place will usually require changes and resubmissions of the patches before they
+are considered to be ripe for inclusion into mainline.
+
+Also the review often happens not immediately after a patch was submitted,
+but only when somebody (usually the responsible custodian) finds time to do
+this.
+
+The result is that the final version of such patches gets submitted after the
+merge window has been closed.
+
+It is current practice in U-Boot that such patches are eligible to go into the
+upcoming release.
+
+The result is that the release of the ``"-rc1"`` version and formal closing of
+the Merge Window does not preclude patches that were already posted from being
+merged for the upcoming release.
+
+Stabilization Period
+^^^^^^^^^^^^^^^^^^^^
+
+During the Stabilization Period only patches containing bug fixes get
+applied.
+
+Corner Cases
+^^^^^^^^^^^^
+
+Sometimes it is not clear if a patch contains a bug fix or not.
+For example, changes that remove dead code, unused macros etc. or
+that contain Coding Style fixes are not strict bug fixes.
+
+In such situations it is up to the responsible custodian to decide if they
+apply such patches even when the Merge Window is closed.
+
+Exception: at the end of the Stabilization Period only strict bug
+fixes my be applied.
+
+Sometimes patches miss the Merge Window slightly - say by a few
+hours or even a day. Patch acceptance is not as critical as a
+financial transaction, or such. So if there is such a slight delay,
+the custodian is free to turn a blind eye and accept it anyway. The
+idea of the development process is to make it foreseeable,
+but not to slow down development.
+
+It makes more sense if an engineer spends another day on testing and
+cleanup and submits the patch a couple of hours late, instead of
+submitting a green patch which will waste efforts from several people
+during several rounds of review and reposts.
+
+Differences to the Linux Development Process
+--------------------------------------------
+
+* In Linux, top-level maintainers will collect patches in their trees and send
+  pull requests to Linus as soon as the merge window opens.
+  So far, most U-Boot custodians do not work like that; they send pull requests
+  only at (or even after) the end of the merge window.
+
+* In Linux, the closing of the merge window is marked by the release of the
+  next ``"-rc1"``
+  In U-Boot, ``"-rc1"`` will only be released after all (or at least most of
+  the) patches that were submitted during the merge window have been applied.
+
+Resyncing of the device tree subtree
+------------------------------------
+
+As explained in :doc:`devicetree/control` some platforms make use of device tree
+files which come from a git subtree that mirrors the Linux Kernel sources
+itself. For our purposes, we only track releases and not release candidates for
+merging in our tree. These merges follow the normal merge window rules.
+
+In the case of specific changes, such as bug fixes or new platform support,
+these can be "cherry-picked" and are subject to the normal merge rules. For
+example, a bug fix can come in later in the window but a full re-sync only
+happens within the merge window itself.
+
+.. _custodians:
+
+Custodians
+----------
+
+The Custodians take responsibility for some area of the U-Boot code.  The
+in-tree ``MAINTAINERS`` files list who is responsible for which areas.
+
+It is their responsibility to pick up patches from the mailing list
+that fall into their responsibility, and to process these.
+
+A very important responsibility of each custodian is to provide
+feedback to the submitter of a patch about what is going on: if the
+patch was accepted, or if it was rejected (which exact list of
+reasons), if it needs to be reworked (with respective review
+comments). Even a "I have no time now, will look into it later"
+message is better than nothing. Also, if there are remarks to a
+patch, these should leave no doubt if they were just comments and the
+patch will be accepted anyway, or if the patch should be
+reworked/resubmitted, or if it was rejected.
+
+Review Process, Git Tags
+------------------------
+
+There are a number of *git tags* that are used to document the origin and the
+processing of patches on their way into the mainline U-Boot code. The following
+is an attempt to document how these are usually handled in the U-Boot project.
+
+In general, we try to follow the established procedures from other projects,
+especially the Linux kernel, but there may be smaller differences. For
+reference, see the Linux kernel's `Submitting patches
+<https://www.kernel.org/doc/html/latest/process/submitting-patches.html>`_
+document.
+
+.. _dco:
+
+* Signed-off-by: the *Signed-off-by:* is a line at the end of the commit
+  message by which the signer certifies that they were involved in the development
+  of the patch and that they accept the `Developer Certificate of Origin
+  <https://developercertificate.org/>`_. Following this and adding a
+  ``Signed-off-by:`` line that contains the developer's name and email address
+  is required.
+
+   * Please note that in U-Boot, we do not add a ``Signed-off-by`` tag if we
+     just pass on a patch without any changes.
+
+   * Please note that when importing code from other projects you must say
+     where it comes from, and what revision you are importing. You must not
+     however copy ``Signed-off-by`` or other tags.
+
+* Everybody who can is invited to review and test the changes. Typically, we
+  follow the same guidelines as the Linux kernel for `Acked-by
+  <https://www.kernel.org/doc/html/latest/process/submitting-patches.html#when-to-use-acked-by-cc-and-co-developed-by>`_
+  as well as `Reviewed-by
+  <https://www.kernel.org/doc/html/latest/process/submitting-patches.html#using-reported-by-tested-by-reviewed-by-suggested-by-and-fixes>`_
+  and similar additional tags.
+
+* Reviewed-by: The patch has been reviewed and found acceptable according to
+  the `Reviewer's statement of oversight
+  <https://www.kernel.org/doc/html/latest/process/submitting-patches.html#reviewer-s-statement-of-oversight>`_.
+  A *Reviewed-by:* tag is a statement of opinion that the patch is an
+  appropriate modification of the code without any remaining serious technical
+  issues. Any interested reviewer (who has done the work) can offer a
+  *Reviewed-by:* tag for a patch.
+
+* Acked-by: If a person was not directly involved in the preparation or
+  handling of a patch but wishes to signify and record their approval of it
+  then they can arrange to have an *Acked-by:* line added to the patch's
+  changelog.
+
+* Tested-by: A *Tested-by:* tag indicates that the patch has been successfully
+  tested (in some environment) by the person named. Andrew Morton: "I think
+  it's very useful information to have. For a start, it tells you who has the
+  hardware and knows how to build a kernel. So if you're making a change to a
+  driver and want it tested, you can troll the file's changelog looking for
+  people who might be able to help."
+
+* Reported-by: If this patch fixes a problem reported by somebody else,
+  consider adding a *Reported-by:* tag to credit the reporter for their
+  contribution. Please note that this tag should not be added without the
+  reporter's permission, especially if the problem was not reported in a public
+  forum.
+
+* Cc: If a person should have the opportunity to comment on a patch, you may
+  optionally add a *Cc:* tag to the patch. Git tools (git send-email) will then
+  automatically arrange that they receives a copy of the patch when you submit
+  it to the mailing list. This is the only tag which might be added without an
+  explicit action by the person it names. This tag documents that potentially
+  interested parties have been included in the discussion.
+  For example, when your change affects a specific board or driver, then makes
+  a lot of sense to put the respective maintainer of this code on Cc:
+
+Work flow of a Custodian
+------------------------
+
+The normal flow of work in the U-Boot development process will look
+like this:
+
+#. The responsible custodian inspects this patch, especially for:
+
+   #. The commit message is useful, descriptive and makes correct and
+      appropriate usage of required *git tags*.
+
+   #. :doc:`codingstyle`
+
+   #. Basic logic:
+
+      * The patch fixes a real problem.
+
+      * The patch does not introduce new problems, especially it does not break
+        other boards or architectures
+
+   #. U-Boot Philosophy, as documented in :doc:`designprinciples`.
+
+   #. Applies cleanly to the source tree.  The custodian is expected to put in
+      a "best effort" if a patch does not apply cleanly, but can be made to apply
+      still.  It is up to the custodian to decide how recent of a commit the
+      patch must be against.  It is acceptable to request patches against the
+      last officially released version of U-Boot or newer.  Of course a
+      custodian can also accept patches against older code.  It can be
+      difficult to find the correct balance between putting too much work on
+      the custodian or too much work on an individual submitting a patch when
+      something does not apply cleanly.
+
+   #. Passes :doc:`ci_testing` as this checks for new warnings and other issues.
+
+#. Note that in some cases more than one custodian may feel responsible for a
+   particular change.  To avoid duplicated efforts, the custodian who starts
+   processing the patch should follow up to the email saying they intend to
+   pick it up.
+
+#. Commits must show original author in the ``author`` field and include all of
+   the ``Signed-off-by``, ``Reviewed-by``, etc, tags that have been submitted.
+
+#. The final decision to accept or reject a patch comes down to the custodian
+   in question.
+
+#. If accepted, the custodian adds the patch to their public git repository.
+   Ideally, they will also follow up on the mailing list with some notification
+   that it has been applied.  This is not always easy given different custodian
+   workflows and environments however.
+
+#. Although a custodian is supposed to perform their own tests it is a
+   well-known and accepted fact that they need help from other developers who
+   - for example - have access to the required hardware or other relevant
+   environments.  Custodians are expected to ask for assistance with testing
+   when required.
+
+#. Custodians are expected to submit a timely pull request of their git
+   repository to the main repository.  It is strongly encouraged that a CI run
+   has been completed prior to submission, but not required.
diff --git a/doc/develop/py_testing.rst b/doc/develop/py_testing.rst
new file mode 100644
index 00000000000..6ff78103409
--- /dev/null
+++ b/doc/develop/py_testing.rst
@@ -0,0 +1,496 @@
+U-Boot pytest suite
+===================
+
+Introduction
+------------
+
+This tool aims to test U-Boot by executing U-Boot shell commands using the
+console interface. A single top-level script exists to execute or attach to the
+U-Boot console, run the entire script of tests against it, and summarize the
+results. Advantages of this approach are:
+
+- Testing is performed in the same way a user or script would interact with
+  U-Boot; there can be no disconnect.
+- There is no need to write or embed test-related code into U-Boot itself.
+  It is asserted that writing test-related code in Python is simpler and more
+  flexible than writing it all in C. But see :doc:`tests_writing` for caveats
+  and more discussion / analysis.
+- It is reasonably simple to interact with U-Boot in this way.
+
+Requirements
+------------
+
+The test suite is implemented using pytest. Interaction with the U-Boot console
+involves executing some binary and interacting with its stdin/stdout. You will
+need to implement various "hook" scripts that are called by the test suite at
+the appropriate time.
+
+In order to run the test suite at a minimum we require that both Python 3 and
+pip for Python 3 are installed. All of the required python modules are
+described in the requirements.txt file in the /test/py/ directory and can be
+installed via the command
+
+.. code-block:: bash
+
+   pip install -r requirements.txt
+
+In order to execute certain tests on their supported platforms other tools
+will be required. The following is an incomplete list:
+
+* gdisk
+* dfu-util
+* dtc
+* openssl
+* sudo OR guestmount
+* e2fsprogs
+* util-linux
+* coreutils
+* dosfstools
+* efitools
+* guestfs-tools
+* mount
+* mtools
+* sbsigntool
+* udisks2
+
+Please use the appropriate commands for your distribution to match these tools
+up with the package that provides them.
+
+The test script supports either:
+
+- Executing a sandbox port of U-Boot on the local machine as a sub-process,
+  and interacting with it over stdin/stdout.
+- Executing an external "hook" scripts to flash a U-Boot binary onto a
+  physical board, attach to the board's console stream, and reset the board.
+  Further details are described later.
+
+The usage of command 'sudo' should be avoided in tests. To create disk images
+use command virt-make-fs which is provided by package guestfs-tools. This
+command creates a virtual machine with QEMU in which the disk image is
+generated.
+
+Command virt-make-fs needs read access to the current kernel. On Ubuntu only
+root has this privilege. You can add a script /etc/initramfs-tools/hooks/vmlinuz
+with the following content to overcome the problem:
+
+.. code-block:: bash
+
+    #!/bin/sh
+    echo "chmod a+r vmlinuz-*"
+    chmod a+r /boot/vmlinuz-*
+
+The script should be chmod 755. It will be invoked whenever the initial RAM file
+system is updated.
+
+Using `virtualenv` to provide requirements
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The recommended way to run the test suite, in order to ensure reproducibility
+is to use `virtualenv` to set up the necessary environment.  This can be done
+via the following commands:
+
+
+.. code-block:: console
+
+    $ cd /path/to/u-boot
+    $ sudo apt-get install python3 python3-virtualenv
+    $ virtualenv -p /usr/bin/python3 venv
+    $ . ./venv/bin/activate
+    $ pip install -r test/py/requirements.txt
+
+Testing sandbox
+---------------
+
+To run the test suite on the sandbox port (U-Boot built as a native user-space
+application), simply execute:
+
+.. code-block:: bash
+
+    ./test/py/test.py --bd sandbox --build
+
+The `--bd` option tells the test suite which board type is being tested. This
+lets the test suite know which features the board has, and hence exactly what
+can be tested.
+
+The `--build` option tells U-Boot to compile U-Boot. Alternatively, you may
+omit this option and build U-Boot yourself, in whatever way you choose, before
+running the test script.
+
+The test script will attach to U-Boot, execute all valid tests for the board,
+then print a summary of the test process. A complete log of the test session
+will be written to `${build_dir}/test-log.html`. This is best viewed in a web
+browser, but may be read directly as plain text, perhaps with the aid of the
+`html2text` utility.
+
+If sandbox crashes (e.g. with a segfault) you will see message like this::
+
+
+    test/py/u_boot_spawn.py:171: in expect
+        c = os.read(self.fd, 1024).decode(errors='replace')
+    E   ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV)
+
+
+Controlling output
+~~~~~~~~~~~~~~~~~~
+
+By default a short backtrace is reported. If you would like a longer one,
+pass ``--tb=long`` when running the test. See the pytest documentation for
+more options.
+
+Running tests in parallel
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Note: Not all tests can run in parallel at present, so the usual approach is
+to just run those that can.
+
+First install support for parallel tests::
+
+    sudo apt install python3-pytest-xdist
+
+or:::
+
+    pip3 install pytest-xdist
+
+Then run the tests in parallel using the -n flag::
+
+    test/py/test.py -B sandbox --build --build-dir /tmp/b/sandbox -q -k \
+        'not slow and not bootstd and not spi_flash' -n16
+
+You can also use `make pcheck` to run all tests in parallel. This uses a maximum
+of 16 threads, since the setup time is significant and there are under 1000
+tests.
+
+Note that the `test-log.html` output does not work correctly at present with
+parallel testing. All the threads write to it at once, so it is garbled.
+
+Note that the `tools/` tests still run each tool's tests once after the other,
+although within that, they do run in parallel. So for example, the buildman
+tests run in parallel, then the binman tests run in parallel. There would be a
+significant advantage to running them all in parallel together, but that would
+require a large amount of refactoring, e.g. with more use of pytest fixtures.
+The code-coverage tests are omitted since they cannot run in parallel due to a
+Python limitation.
+
+
+Testing under a debugger
+~~~~~~~~~~~~~~~~~~~~~~~~
+
+If you need to run sandbox under a debugger, you may pass the command-line
+option `--gdbserver COMM`. This causes two things to happens:
+
+- Instead of running U-Boot directly, it will be run under gdbserver, with
+  debug communication via the channel `COMM`. You can attach a debugger to the
+  sandbox process in order to debug it. See `man gdbserver` and the example
+  below for details of valid values for `COMM`.
+- All timeouts in tests are disabled, allowing U-Boot an arbitrary amount of
+  time to execute commands. This is useful if U-Boot is stopped at a breakpoint
+  during debugging.
+
+A usage example is:
+
+Window 1:
+
+.. code-block:: bash
+
+    ./test/py/test.py --bd sandbox --gdbserver localhost:1234
+
+Window 2:
+
+.. code-block:: bash
+
+    gdb ./build-sandbox/u-boot -ex 'target remote localhost:1234'
+
+Alternatively, you could leave off the `-ex` option and type the command
+manually into gdb once it starts.
+
+You can use any debugger you wish, as long as it speaks the gdb remote
+protocol, or any graphical wrapper around gdb.
+
+Some tests deliberately cause the sandbox process to exit, e.g. to test the
+reset command, or sandbox's CTRL-C handling. When this happens, you will need
+to attach the debugger to the new sandbox instance. If these tests are not
+relevant to your debugging session, you can skip them using pytest's -k
+command-line option; see the next section.
+
+Command-line options
+--------------------
+
+--board-type, --bd, -B
+  set the type of the board to be tested. For example, `sandbox` or `seaboard`.
+
+--board-identity`, --id
+  sets the identity of the board to be tested. This allows differentiation
+  between multiple instances of the same type of physical board that are
+  attached to the same host machine. This parameter is not interpreted by th
+  test script in any way, but rather is simply passed to the hook scripts
+  described below, and may be used in any site-specific way deemed necessary.
+
+--build
+  indicates that the test script should compile U-Boot itself before running
+  the tests. If using this option, make sure that any environment variables
+  required by the build process are already set, such as `$CROSS_COMPILE`.
+
+--buildman
+  indicates that `--build` should use buildman to build U-Boot. There is no need
+  to set $CROSS_COMPILE` in this case since buildman handles it.
+
+--build-dir
+  sets the directory containing the compiled U-Boot binaries. If omitted, this
+  is `${source_dir}/build-${board_type}`.
+
+--result-dir
+  sets the directory to write results, such as log files, into.
+  If omitted, the build directory is used.
+
+--persistent-data-dir
+  sets the directory used to store persistent test data. This is test data that
+  may be re-used across test runs, such as file-system images.
+
+`pytest` also implements a number of its own command-line options. Commonly used
+options are mentioned below. Please see `pytest` documentation for complete
+details. Execute `py.test --version` for a brief summary. Note that U-Boot's
+test.py script passes all command-line arguments directly to `pytest` for
+processing.
+
+-k
+  selects which tests to run. The default is to run all known tests. This
+  option takes a single argument which is used to filter test names. Simple
+  logical operators are supported. For example:
+
+  - `'-k ums'` runs only tests with "ums" in their name.
+  - `'-k ut_dm'` runs only tests with "ut_dm" in their name. Note that in this
+    case, "ut_dm" is a parameter to a test rather than the test name. The full
+    test name is e.g. "test_ut[ut_dm_leak]".
+  - `'-k not reset'` runs everything except tests with "reset" in their name.
+  - `'-k ut or hush'` runs only tests with "ut" or "hush" in their name.
+  - `'-k not (ut or hush)'` runs everything except tests with "ut" or "hush" in
+    their name.
+
+-s
+  prevents pytest from hiding a test's stdout. This allows you to see
+  U-Boot's console log in real time on pytest's stdout.
+
+Testing real hardware
+---------------------
+
+The tools and techniques used to interact with real hardware will vary
+radically between different host and target systems, and the whims of the user.
+For this reason, the test suite does not attempt to directly interact with real
+hardware in any way. Rather, it executes a standardized set of "hook" scripts
+via `$PATH`. These scripts implement certain actions on behalf of the test
+suite. This keeps the test suite simple and isolated from system variances
+unrelated to U-Boot features.
+
+Hook scripts
+~~~~~~~~~~~~
+
+Environment variables
+'''''''''''''''''''''
+
+The following environment variables are set when running hook scripts:
+
+- `UBOOT_BOARD_TYPE` the board type being tested.
+- `UBOOT_BOARD_IDENTITY` the board identity being tested, or `na` if none was
+  specified.
+- `UBOOT_SOURCE_DIR` the U-Boot source directory.
+- `UBOOT_TEST_PY_DIR` the full path to `test/py/` in the source directory.
+- `UBOOT_BUILD_DIR` the U-Boot build directory.
+- `UBOOT_RESULT_DIR` the test result directory.
+- `UBOOT_PERSISTENT_DATA_DIR` the test persistent data directory.
+
+u-boot-test-console
+'''''''''''''''''''
+
+This script provides access to the U-Boot console. The script's stdin/stdout
+should be connected to the board's console. This process should continue to run
+indefinitely, until killed. The test suite will run this script in parallel
+with all other hooks.
+
+This script may be implemented e.g. by executing `cu`, `kermit`, `conmux`, etc.
+via exec().
+
+If you are able to run U-Boot under a hardware simulator such as QEMU, then
+you would likely spawn that simulator from this script. However, note that
+`u-boot-test-reset` may be called multiple times per test script run, and must
+cause U-Boot to start execution from scratch each time. Hopefully your
+simulator includes a virtual reset button! If not, you can launch the
+simulator from `u-boot-test-reset` instead, while arranging for this console
+process to always communicate with the current simulator instance.
+
+u-boot-test-flash
+'''''''''''''''''
+
+Prior to running the test suite against a board, some arrangement must be made
+so that the board executes the particular U-Boot binary to be tested. Often
+this involves writing the U-Boot binary to the board's flash ROM. The test
+suite calls this hook script for that purpose.
+
+This script should perform the entire flashing process synchronously; the
+script should only exit once flashing is complete, and a board reset will
+cause the newly flashed U-Boot binary to be executed.
+
+It is conceivable that this script will do nothing. This might be useful in
+the following cases:
+
+- Some other process has already written the desired U-Boot binary into the
+  board's flash prior to running the test suite.
+- The board allows U-Boot to be downloaded directly into RAM, and executed
+  from there. Use of this feature will reduce wear on the board's flash, so
+  may be preferable if available, and if cold boot testing of U-Boot is not
+  required. If this feature is used, the `u-boot-test-reset` script should
+  perform this download, since the board could conceivably be reset multiple
+  times in a single test run.
+
+It is up to the user to determine if those situations exist, and to code this
+hook script appropriately.
+
+This script will typically be implemented by calling out to some SoC- or
+board-specific vendor flashing utility.
+
+u-boot-test-reset
+'''''''''''''''''
+
+Whenever the test suite needs to reset the target board, this script is
+executed. This is guaranteed to happen at least once, prior to executing the
+first test function. If any test fails, the test infra-structure will execute
+this script again to restore U-Boot to an operational state before running the
+next test function.
+
+This script will likely be implemented by communicating with some form of
+relay or electronic switch attached to the board's reset signal.
+
+The semantics of this script require that when it is executed, U-Boot will
+start running from scratch. If the U-Boot binary to be tested has been written
+to flash, pulsing the board's reset signal is likely all this script needs to
+do. However, in some scenarios, this script may perform other actions. For
+example, it may call out to some SoC- or board-specific vendor utility in order
+to download the U-Boot binary directly into RAM and execute it. This would
+avoid the need for `u-boot-test-flash` to actually write U-Boot to flash, thus
+saving wear on the flash chip(s).
+
+Examples
+''''''''
+
+https://source.denx.de/u-boot/u-boot-test-hooks contains some working example hook
+scripts, and may be useful as a reference when implementing hook scripts for
+your platform. These scripts are not considered part of U-Boot itself.
+
+Board-type-specific configuration
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Each board has a different configuration and behaviour. Many of these
+differences can be automatically detected by parsing the `.config` file in the
+build directory. However, some differences can't yet be handled automatically.
+
+For each board, an optional Python module `u_boot_board_${board_type}` may exist
+to provide board-specific information to the test script. Any global value
+defined in these modules is available for use by any test function. The data
+contained in these scripts must be purely derived from U-Boot source code.
+Hence, these configuration files are part of the U-Boot source tree too.
+
+Execution environment configuration
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Each user's hardware setup may enable testing different subsets of the features
+implemented by a particular board's configuration of U-Boot. For example, a
+U-Boot configuration may support USB device mode and USB Mass Storage, but this
+can only be tested if a USB cable is connected between the board and the host
+machine running the test script.
+
+For each board, optional Python modules `u_boot_boardenv_${board_type}` and
+`u_boot_boardenv_${board_type}_${board_identity}` may exist to provide
+board-specific and board-identity-specific information to the test script. Any
+global value defined in these modules is available for use by any test
+function. The data contained in these is specific to a particular user's
+hardware configuration. Hence, these configuration files are not part of the
+U-Boot source tree, and should be installed outside of the source tree. Users
+should set `$PYTHONPATH` prior to running the test script to allow these
+modules to be loaded.
+
+Board module parameter usage
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The test scripts rely on the following variables being defined by the board
+module:
+
+- none at present
+
+U-Boot `.config` feature usage
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The test scripts rely on various U-Boot `.config` features, either directly in
+order to test those features, or indirectly in order to query information from
+the running U-Boot instance in order to test other features.
+
+One example is that testing of the `md` command requires knowledge of a RAM
+address to use for the test. This data is parsed from the output of the
+`bdinfo` command, and hence relies on CONFIG_CMD_BDI being enabled.
+
+For a complete list of dependencies, please search the test scripts for
+instances of:
+
+- `buildconfig.get(...`
+- `@pytest.mark.buildconfigspec(...`
+- `@pytest.mark.notbuildconfigspec(...`
+
+Complete invocation example
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Assuming that you have installed the hook scripts into $HOME/ubtest/bin, and
+any required environment configuration Python modules into $HOME/ubtest/py,
+then you would likely invoke the test script as follows:
+
+If U-Boot has already been built:
+
+.. code-block:: bash
+
+    PATH=$HOME/ubtest/bin:$PATH \
+    PYTHONPATH=${HOME}/ubtest/py/${HOSTNAME}:${PYTHONPATH} \
+    ./test/py/test.py --bd seaboard
+
+If you want the test script to compile U-Boot for you too, then you likely
+need to set `$CROSS_COMPILE` to allow this, and invoke the test script as
+follows:
+
+.. code-block:: bash
+
+    CROSS_COMPILE=arm-none-eabi- \
+    PATH=$HOME/ubtest/bin:$PATH \
+    PYTHONPATH=${HOME}/ubtest/py/${HOSTNAME}:${PYTHONPATH} \
+    ./test/py/test.py --bd seaboard --build
+
+or, using buildman to handle it:
+
+.. code-block:: bash
+
+    PATH=$HOME/ubtest/bin:$PATH \
+    PYTHONPATH=${HOME}/ubtest/py/${HOSTNAME}:${PYTHONPATH} \
+    ./test/py/test.py --bd seaboard --build --buildman
+
+Writing tests
+-------------
+
+Please refer to the pytest documentation for details of writing pytest tests.
+Details specific to the U-Boot test suite are described below.
+
+A test fixture named `u_boot_console` should be used by each test function. This
+provides the means to interact with the U-Boot console, and retrieve board and
+environment configuration information.
+
+The function `u_boot_console.run_command()` executes a shell command on the
+U-Boot console, and returns all output from that command. This allows
+validation or interpretation of the command output. This function validates
+that certain strings are not seen on the U-Boot console. These include shell
+error messages and the U-Boot sign-on message (in order to detect unexpected
+board resets). See the source of `u_boot_console_base.py` for a complete list of
+"bad" strings. Some test scenarios are expected to trigger these strings. Use
+`u_boot_console.disable_check()` to temporarily disable checking for specific
+strings. See `test_unknown_cmd.py` for an example.
+
+Board- and board-environment configuration values may be accessed as sub-fields
+of the `u_boot_console.config` object, for example
+`u_boot_console.config.ram_base`.
+
+Build configuration values (from `.config`) may be accessed via the dictionary
+`u_boot_console.config.buildconfig`, with keys equal to the Kconfig variable
+names.
diff --git a/doc/develop/python_cq.rst b/doc/develop/python_cq.rst
new file mode 100644
index 00000000000..1e209ff197d
--- /dev/null
+++ b/doc/develop/python_cq.rst
@@ -0,0 +1,91 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Python code quality
+===================
+
+U-Boot has about 60k lines of Python code, mainly in the following areas:
+
+- tests
+- pytest hooks
+- patman patch submission tool
+- buildman build / analysis tool
+- dtoc devicetree-to-C tool
+- binman firmware packaging tool
+
+`PEP 8`_ is used for the code style, with the single quote (') used by default for
+strings and double quote for doc strings. All non-trivial functions should be
+commented.
+
+Pylint is used to help check this code and keep a consistent code style. The
+build system tracks the current 'score' of the source code and detects
+regressions in any module.
+
+To run this locally you should use this version of pylint::
+
+    # pylint --version
+    pylint 2.11.1
+    astroid 2.8.6
+    Python 3.8.10 (default, Sep 28 2021, 16:10:42)
+    [GCC 9.3.0]
+
+
+You should be able to select and this install other required tools with::
+
+    pip install pylint==2.11.1
+    pip install -r test/py/requirements.txt
+    pip install asteval pyopenssl
+
+Note that if your distribution is a year or two old, you make need to use `pip3`
+instead.
+
+To configure pylint, make sure it has docparams enabled, e.g. with::
+
+    echo "[MASTER]" >> .pylintrc
+    echo "load-plugins=pylint.extensions.docparams" >> .pylintrc
+
+Once everything is ready, use this to check the code::
+
+    make pylint
+
+This creates a directory called `pylint.out` which contains the pylint output
+for each Python file in U-Boot. It also creates a summary file called
+`pylint.cur` which shows the pylint score for each module::
+
+    _testing 0.83
+    atf_bl31 -6.00
+    atf_fip 0.49
+    binman.cbfs_util 7.70
+    binman.cbfs_util_test 9.19
+    binman.cmdline 7.73
+    binman.control 4.39
+    binman.elf 6.42
+    binman.elf_test 5.41
+    ...
+
+This file is in alphabetical order. The build system compares the score of each
+module to `scripts/pylint.base` (which must also be sorted and have exactly the
+same modules in it) and reports any files where the score has dropped. Use
+pylint to check what is wrong and fix up the code before you send out your
+patches.
+
+New or removed files results in an error which can be resolved by updating the
+`scripts/pylint.base` file to add/remove lines for those files, e.g.::
+
+    meld pylint.cur scripts/pylint.base
+
+If the pylint version is updated in CI, this may result in needing to regenerate
+`scripts/pylint.base`.
+
+
+Checking for errors
+-------------------
+
+If you only want to check for pylint errors, use::
+
+   PYTHONPATH=/path/to/scripts/dtc/pylibfdt/ make pylint_err
+
+This will show only pylint errors. Note that you must set PYTHONPATH to point
+to the pylibfdt directory build by U-Boot (typically the sandbox_spl board). If
+you have used `make qcheck` then it sill be in `board-sandbox_spl`.
+
+.. _`PEP 8`: https://www.python.org/dev/peps/pep-0008/
diff --git a/doc/develop/qconfig.rst b/doc/develop/qconfig.rst
new file mode 100644
index 00000000000..8efb1eb2685
--- /dev/null
+++ b/doc/develop/qconfig.rst
@@ -0,0 +1,234 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+qconfig - Querying CONFIG options
+=================================
+
+It is not possible to see all the CONFIG options used by a board without
+building its `.config` file. This tool allows this to be done efficiently for
+all boards, or a subset, writing the results to a unified database file.
+
+This database can be queried, to find boards which used a certain combination
+of options, to aid in discovering Kconfig options which imply others.
+
+The tool also permits syncing of defconfigs, which corrects the ordering and
+drops options which are implied by others.
+
+Finally, it allows scanning the source code to look for inconsistencies in the
+use of Kconfig options.
+
+Installation
+------------
+
+You may need to install 'python3-asteval' for the 'asteval' module.
+
+How does it work?
+-----------------
+
+When building a database (`-b`), this tool runs configuration and builds
+include/autoconf.mk for every defconfig.  The config options defined in Kconfig
+appear in the .config file (unless they are hidden because of unmet dependency.)
+On the other hand, the config options defined by board headers are seen
+in include/autoconf.mk.
+
+When resyncing defconfigs (`-s`) the .config is synced by "make savedefconfig"
+and the defconfig is updated with it.
+
+For faster processing, this tool is multi-threaded.  It creates
+separate build directories where the out-of-tree build is run.  The
+temporary build directories are automatically created and deleted as
+needed.  The number of threads are chosen based on the number of the CPU
+cores of your system although you can change it via -j (--jobs) option.
+
+Note that `*.config` fragments are not supported.
+
+Toolchains
+----------
+
+Appropriate toolchains are necessary to generate include/autoconf.mk
+for all the architectures supported by U-Boot.  Most of them are available
+at the kernel.org site. This tool uses the same tools as
+:doc:`../build/buildman`, so you can use `buildman --fetch-arch` to fetch
+toolchains.
+
+
+Examples
+--------
+
+To sync only X86 defconfigs::
+
+   ./tools/qconfig.py -s -d <(grep -l X86 configs/*)
+
+or::
+
+   grep -l X86 configs/* | ./tools/qconfig.py -s -d -
+
+To process CONFIG_CMD_FPGAD only for a subset of configs based on path match::
+
+   ls configs/{hrcon*,iocon*,strider*} | \
+       ./tools/qconfig.py -C CONFIG_CMD_FPGAD -d -
+
+
+Finding boards with particular CONFIG combinations
+--------------------------------------------------
+
+You can use `qconfig.py` to figure out which boards have a CONFIG enabled, or
+which do not. To use it, first build a database::
+
+    ./tools/qconfig.py -b
+
+Then you can run queries using the `-f` flag followed by a list of CONFIG terms.
+Each term is CONFIG name, with or without a tilde (~) prefix. The tool searches
+for boards which match the CONFIG name, or do not match if tilde is used. For
+example, to find boards which enabled CONFIG_SCSI but not CONFIG_BLK::
+
+    tools/qconfig.py -f SCSI ~BLK
+    3 matches
+    pg_wcom_seli8_defconfig highbank_defconfig pg_wcom_expu1_defconfig
+
+
+Finding implied CONFIGs
+-----------------------
+
+Some CONFIG options can be implied by others and this can help to reduce
+the size of the defconfig files. For example, CONFIG_X86 implies
+CONFIG_CMD_IRQ, so we can put 'imply CMD_IRQ' under 'config X86' and
+all x86 boards will have that option, avoiding adding CONFIG_CMD_IRQ to
+each of the x86 defconfig files.
+
+This tool can help find such configs. To use it, first build a database::
+
+    ./tools/qconfig.py -b
+
+Then try to query it::
+
+   ./tools/qconfig.py -i CONFIG_I8042_KEYB
+   CONFIG_I8042_KEYB found in 33/5155 defconfigs
+   28 : CONFIG_X86
+   28 : CONFIG_SA_PCIEX_LENGTH
+   28 : CONFIG_HPET_ADDRESS
+   28 : CONFIG_MAX_PIRQ_LINKS
+   28 : CONFIG_I8254_TIMER
+   28 : CONFIG_I8259_PIC
+   28 : CONFIG_RAMBASE
+   28 : CONFIG_IRQ_SLOT_COUNT
+   28 : CONFIG_PCIE_ECAM_SIZE
+   28 : CONFIG_APIC
+   ...
+
+This shows a list of config options which might imply CONFIG_I8042_KEYB along
+with how many defconfigs they cover. From this you can see that CONFIG_X86
+generally implies CONFIG_I8042_KEYB but not always (28 out of 35). Therefore,
+instead of adding CONFIG_I8042_KEYB to
+the defconfig of every x86 board, you could add a single imply line to the
+Kconfig file::
+
+    config X86
+        bool "x86 architecture"
+        ...
+        imply CMD_EEPROM
+
+That will cover 28 defconfigs and you can perhaps find another condition that
+indicates that CONFIG_I8042_KEYB is not needed for the remaining 5 boards. Many
+of the options listed are not suitable as they are not related. E.g. it would be
+odd for CONFIG_RAMBASE to imply CONFIG_I8042_KEYB.
+
+Using this search you can reduce the size of qconfig patches.
+
+You can automatically add 'imply' statements in the Kconfig with the -a
+option::
+
+    ./tools/qconfig.py -s -i CONFIG_SCSI \
+            -a CONFIG_ARCH_LS1021A,CONFIG_ARCH_LS1043A
+
+This will add 'imply SCSI' to the two CONFIG options mentioned, assuming that
+the database indicates that they do actually imply CONFIG_SCSI and do not
+already have an 'imply SCSI'.
+
+The output shows where the imply is added::
+
+   18 : CONFIG_ARCH_LS1021A       arch/arm/cpu/armv7/ls102xa/Kconfig:1
+   13 : CONFIG_ARCH_LS1043A       arch/arm/cpu/armv8/fsl-layerscape/Kconfig:11
+   12 : CONFIG_ARCH_LS1046A       arch/arm/cpu/armv8/fsl-layerscape/Kconfig:31
+
+The first number is the number of boards which can avoid having a special
+CONFIG_SCSI option in their defconfig file if this 'imply' is added.
+The location at the right is the Kconfig file and line number where the config
+appears. For example, adding 'imply CONFIG_SCSI' to the 'config ARCH_LS1021A'
+in arch/arm/cpu/armv7/ls102xa/Kconfig at line 1 will help 18 boards to reduce
+the size of their defconfig files.
+
+If you want to add an 'imply' to every imply config in the list, you can use::
+
+    ./tools/qconfig.py -s -i CONFIG_SCSI -a all
+
+To control which ones are displayed, use -I <list> where list is a list of
+options (use '-I help' to see possible options and their meaning).
+
+To skip showing you options that already have an 'imply' attached, use -A.
+
+When you have finished adding 'imply' options you can regenerate the
+defconfig files for affected boards with something like::
+
+    git show --stat | ./tools/qconfig.py -s -d -
+
+This will regenerate only those defconfigs changed in the current commit.
+If you start with (say) 100 defconfigs being changed in the commit, and add
+a few 'imply' options as above, then regenerate, hopefully you can reduce the
+number of defconfigs changed in the commit.
+
+
+Available options
+-----------------
+
+ --nocolour
+   Disables colouring of output. This is normally used when writing to a
+   terminal.
+
+ -C, --commit
+   Create a git commit with the changes when the operation is complete. A
+   standard commit message is used which may need to be edited.
+
+ -d, --defconfigs
+  Specify a file containing a list of defconfigs to move.  The defconfig
+  files can be given with shell-style wildcards. Use '-' to read from stdin.
+
+ -f, --find
+   Find boards with a given config combination
+
+ -n, --dry-run
+   Perform a trial run that does not make any changes.  It is useful to
+   see what is going to happen before one actually runs it.
+
+ -e, --exit-on-error
+   Exit immediately if Make exits with a non-zero status while processing
+   a defconfig file.
+
+ -s, --force-sync
+   Do "make savedefconfig" forcibly for all the defconfig files.
+   If not specified, "make savedefconfig" only occurs for cases
+   where at least one CONFIG was moved.
+
+ -S, --spl
+   Look for moved config options in spl/include/autoconf.mk instead of
+   include/autoconf.mk.  This is useful for moving options for SPL build
+   because SPL related options (mostly prefixed with CONFIG_SPL\_) are
+   sometimes blocked by CONFIG_SPL_BUILD ifdef conditionals.
+
+ -j, --jobs
+   Specify the number of threads to run simultaneously.  If not specified,
+   the number of threads is the same as the number of CPU cores.
+
+ -r, --git-ref
+   Specify the git ref to clone for building the autoconf.mk. If unspecified
+   use the CWD. This is useful for when changes to the Kconfig affect the
+   default values and you want to capture the state of the defconfig from
+   before that change was in effect. If in doubt, specify a ref pre-Kconfig
+   changes (use HEAD if Kconfig changes are not committed). Worst case it will
+   take a bit longer to run, but will always do the right thing.
+
+ -v, --verbose
+   Show any build errors as boards are built
+
+To see the complete list of supported options, run::
+
+  tools/qconfig.py -h
diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst
new file mode 100644
index 00000000000..541ab0adaf8
--- /dev/null
+++ b/doc/develop/release_cycle.rst
@@ -0,0 +1,247 @@
+Release Cycle
+=============
+
+The U-Boot projects attempts to maintain a fixed, predictable Release
+Cycle as follows:
+
+* We will have U-Boot releases at a fixed release interval of (approximately)
+  every 3 months.
+
+* Under normal conditions the release date will be the first Monday of the month.
+
+* Immediately following each release, there will be a "merge window" of
+  normally 21 days, i. e. if the release was on a Monday, then the merge window
+  will close on the Monday in the 3rd week after the release.
+
+  While this merge window is open, new features can be added to the U-Boot
+  source tree. This is further expanded on in the :doc:`process`.
+
+* After the merge window closes, no new features may be added to allow for a
+  release candidate phase which is intended to fix bugs and regressions.
+
+* To help with late pull requests, the **next** branch will open when the
+  second release candidate is published.
+
+*Note:* While we try to adhere to the release schedule, we will
+not hesitate and take the liberty to delay a release if there are
+good reasons, for example if there are known bugs or other technical
+reasons.  The code will be released when it is considered ready
+without caring too much about the announced deadline.
+
+*Note 2:* Even though we follow Linux ways in many respects, there are
+differences in the actual procedures, which are documented in the
+:doc:`process`.
+
+Version Numbers
+---------------
+
+Starting with the release in October 2008, the names of the releases were
+changed from numerical release numbers without deeper meaning into a time stamp
+based numbering.  Regular releases are now identified by names consisting of
+the calendar year and month of the release date.  Additional fields are
+frequently used to denote the release candidates.  They are also used on rare
+occasions to note a bug fix release on top of the previous stable release.
+
+Examples::
+
+  U-Boot v2009.11	- Release November 2009
+  U-Boot v2009.11.1	- Bug fix release 1 on top of the November 2009 release
+  U-Boot v2010.09-rc1   - Release candidate 1 for September 2010 release
+
+Current Status
+--------------
+
+* U-Boot v2024.07 was released on Mon 01 July 2024.
+
+* The Merge Window for the next release (v2024.10) is **open** until the -rc1
+  release on Mon 22 July 2024.
+
+* The next branch is now **closed**.
+
+* Release "v2024.10" is scheduled for 07 October 2024.
+
+Future Releases
+---------------
+
+.. The following commented out dates are for when release candidates are
+   planned to be tagged.
+
+.. For the next scheduled release, release candidates were made on::
+
+.. * U-Boot v2024.10-rc1 was released on Mon 22 July 2024.
+
+.. * U-Boot v2024.10-rc2 was released on Mon 05 August 2024.
+
+.. * U-Boot v2024.10-rc3 was released on Mon 19 August 2024.
+
+.. * U-Boot v2024.10-rc4 was released on Mon 02 September 2024.
+
+.. * U-Boot v2024.10-rc5 was released on Mon 16 September 2024.
+
+.. * U-Boot v2024.10-rc6 was released on Mon 30 September 2024.
+
+Please note that the following dates are planned only and may be deviated from
+as needed.
+
+* "v2024.10": end of MW = Mon, Jul 22, 2024; release = Mon, Oct 07, 2024
+
+* "v2025.01": end of MW = Mon, Oct 21, 2024; release = Mon, Jan 06, 2025
+
+* "v2025.04": end of MW = Mon, Jan 27, 2025; release = Mon, Apr 07, 2025
+
+* "v2025.07": end of MW = Mon, Apr 21, 2025; release = Mon, Jul 07, 2025
+
+Previous Releases
+-----------------
+
+Note: these statistics are generated by our fork of `gitdm
+<https://source.denx.de/u-boot/gitdm>`_, which was originally created by
+Jonathan Corbet.
+
+* :doc:`statistics/u-boot-stats-v2024.07` which was released on 01 July 2024.
+
+* :doc:`statistics/u-boot-stats-v2024.04` which was released on 02 April 2024.
+
+* :doc:`statistics/u-boot-stats-v2024.01` which was released on 08 January 2024.
+
+* :doc:`statistics/u-boot-stats-v2023.10` which was released on 02 October 2023.
+
+* :doc:`statistics/u-boot-stats-v2023.07` which was released on 10 July 2023.
+
+* :doc:`statistics/u-boot-stats-v2023.04` which was released on 03 April 2023.
+
+* :doc:`statistics/u-boot-stats-v2023.01` which was released on 09 January 2023.
+
+* :doc:`statistics/u-boot-stats-v2022.10` which was released on 03 October 2022.
+
+* :doc:`statistics/u-boot-stats-v2022.07` which was released on 11 July 2022.
+
+* :doc:`statistics/u-boot-stats-v2022.04` which was released on 04 April 2022.
+
+* :doc:`statistics/u-boot-stats-v2022.01` which was released on 10 January 2022.
+
+* :doc:`statistics/u-boot-stats-v2021.10` which was released on 04 October 2021.
+
+* :doc:`statistics/u-boot-stats-v2021.07` which was released on 05 July 2021.
+
+* :doc:`statistics/u-boot-stats-v2021.04` which was released on 05 April 2021.
+
+* :doc:`statistics/u-boot-stats-v2021.01` which was released on 11 January 2021.
+
+* :doc:`statistics/u-boot-stats-v2020.10` which was released on 05 October 2020.
+
+* :doc:`statistics/u-boot-stats-v2020.07` which was released on 06 July 2020.
+
+* :doc:`statistics/u-boot-stats-v2020.04` which was released on 13 April 2020.
+
+* :doc:`statistics/u-boot-stats-v2020.01` which was released on 06 January 2020.
+
+* :doc:`statistics/u-boot-stats-v2019.10` which was released on 07 October 2019.
+
+* :doc:`statistics/u-boot-stats-v2019.07` which was released on 08 July 2019.
+
+* :doc:`statistics/u-boot-stats-v2019.04` which was released on 08 April 2019.
+
+* :doc:`statistics/u-boot-stats-v2019.01` which was released on 04 January 2019.
+
+* :doc:`statistics/u-boot-stats-v2018.11` which was released on 15 November 2018.
+
+* :doc:`statistics/u-boot-stats-v2018.09` which was released on 10 September 2018.
+
+* :doc:`statistics/u-boot-stats-v2018.07` which was released on 19 July 2018.
+
+* :doc:`statistics/u-boot-stats-v2018.05` which was released on 07 May 2018.
+
+* :doc:`statistics/u-boot-stats-v2018.03` which was released on 13 March 2018.
+
+* :doc:`statistics/u-boot-stats-v2018.01` which was released on 08 January 2018.
+
+* :doc:`statistics/u-boot-stats-v2017.11` which was released on 13 November 2017.
+
+* :doc:`statistics/u-boot-stats-v2017.09` which was released on 11 September 2017.
+
+* :doc:`statistics/u-boot-stats-v2017.07` which was released on 10 July 2017.
+
+* :doc:`statistics/u-boot-stats-v2017.05` which was released on 08 May 2017.
+
+* :doc:`statistics/u-boot-stats-v2017.03` which was released on 13 March 2017.
+
+* :doc:`statistics/u-boot-stats-v2017.01` which was released on 09 January 2017.
+
+* :doc:`statistics/u-boot-stats-v2016.11` which was released on 14 November 2016.
+
+* :doc:`statistics/u-boot-stats-v2016.09` which was released on 12 September 2016.
+
+* :doc:`statistics/u-boot-stats-v2016.07` which was released on 11 July 2016.
+
+* :doc:`statistics/u-boot-stats-v2016.05` which was released on 16 May 2016.
+
+* :doc:`statistics/u-boot-stats-v2016.03` which was released on 14 March 2016.
+
+* :doc:`statistics/u-boot-stats-v2016.01` which was released on 12 January 2016.
+
+* :doc:`statistics/u-boot-stats-v2015.10` which was released on 19 October 2015.
+
+* :doc:`statistics/u-boot-stats-v2015.07` which was released on 14 July 2015.
+
+* :doc:`statistics/u-boot-stats-v2015.04` which was released on 13 April 2015.
+
+* :doc:`statistics/u-boot-stats-v2015.01` which was released on 12 January 2015.
+
+* :doc:`statistics/u-boot-stats-v2014.10` which was released on 14 October 2014.
+
+* :doc:`statistics/u-boot-stats-v2014.07` which was released on 14 July 2014.
+
+* :doc:`statistics/u-boot-stats-v2014.04` which was released on 14 April 2014.
+
+* :doc:`statistics/u-boot-stats-v2014.01` which was released on 20 January 2014.
+
+* :doc:`statistics/u-boot-stats-v2013.10` which was released on 16 October 2013.
+
+* :doc:`statistics/u-boot-stats-v2013.07` which was released on 22 July 2013.
+
+* :doc:`statistics/u-boot-stats-v2013.04` which was released on 19 April 2013.
+
+* :doc:`statistics/u-boot-stats-v2013.01` which was released on 15 January 2013.
+
+* :doc:`statistics/u-boot-stats-v2012.10` which was released on 15 October 2012.
+
+* :doc:`statistics/u-boot-stats-v2012.07` which was released on 30 July 2012.
+
+* :doc:`statistics/u-boot-stats-v2012.04` which was released on 21 April 2012.
+
+* :doc:`statistics/u-boot-stats-v2011.12` which was released on 23 December 2011.
+
+* :doc:`statistics/u-boot-stats-v2011.09` which was released on 29 September 2011.
+
+* :doc:`statistics/u-boot-stats-v2011.06` which was released on 27 July 2011.
+
+* :doc:`statistics/u-boot-stats-v2011.03` which was released on 31 March 2011.
+
+* :doc:`statistics/u-boot-stats-v2010.12` which was released on 22 December 2010.
+
+* :doc:`statistics/u-boot-stats-v2010.09` which was released on 28 September 2010.
+
+* :doc:`statistics/u-boot-stats-v2010.06` which was released on 29 June 2010.
+
+* :doc:`statistics/u-boot-stats-v2010.03` which was released on 31 March 2010.
+
+* :doc:`statistics/u-boot-stats-v2009.11` which was released on 15 December 2009.
+
+* :doc:`statistics/u-boot-stats-v2009.08` which was released on 31 August 2009.
+
+* :doc:`statistics/u-boot-stats-v2009.06` which was released on 14 June 2009.
+
+* :doc:`statistics/u-boot-stats-v2009.03` which was released on 21 March 2009.
+
+* :doc:`statistics/u-boot-stats-v2009.01` which was released on 21 January 2009.
+
+* :doc:`statistics/u-boot-stats-v2008.10` which was released on 18 October 2008.
+
+* :doc:`statistics/u-boot-stats-v1.3.4` which was released on 12 August 2008.
+
+* :doc:`statistics/u-boot-stats-v1.3.3` which was released on 19 May 2008.
+
+* :doc:`statistics/u-boot-stats-v1.3.1` which was released on 06 December 2007. (St Nicholas release).
+
+* :doc:`statistics/u-boot-stats-v1.3.0` which was released on 19 November 2007.
diff --git a/doc/develop/security.rst b/doc/develop/security.rst
new file mode 100644
index 00000000000..84b130646f3
--- /dev/null
+++ b/doc/develop/security.rst
@@ -0,0 +1,32 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+Handling of security vulnerabilities
+====================================
+
+The U-Boot project takes security very seriously.  As such, we'd like to know
+when a security bug is found so that it can be fixed and disclosed as quickly
+as possible.
+
+Contact
+-------
+
+The preferred initial point of contact is to send email to
+`u-boot@lists.denx.de` and use `scripts/get_maintainers.pl` to also include any
+relevant custodians. In addition, Tom Rini should be contacted at
+`trini@konsulko.com`.
+
+CVE assignment
+--------------
+
+The U-Boot project cannot directly assign CVEs, nor do we require them for
+reports or fixes, as this can needlessly complicate the process and may delay
+the bug handling. If a reporter wishes to have a CVE identifier assigned ahead
+of public disclosure, they will need to coordinate this on their own.  When
+such a CVE identifier is known before a patch is provided, it is desirable to
+mention it in the commit message if the reporter agrees.
+
+Non-disclosure agreements
+-------------------------
+
+The U-Boot project is not a formal body and therefore unable to enter any
+non-disclosure agreements.
diff --git a/doc/develop/sending_patches.rst b/doc/develop/sending_patches.rst
new file mode 100644
index 00000000000..3f25b1d0466
--- /dev/null
+++ b/doc/develop/sending_patches.rst
@@ -0,0 +1,454 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sending patches
+===============
+
+*Before you begin* to implement any new ideas or concepts it is always a good
+idea to present your plans on the `U-Boot mailing list
+<https://lists.denx.de/listinfo/u-boot>`_. U-Boot supports a huge amount of
+very different systems, and it is often impossible for the individual developer
+to oversee the consequences of a specific change to all architectures.
+Discussing concepts early can help you to avoid spending effort on code which,
+when submitted as a patch, might be rejected and/or will need lots of rework
+because it does not fit for some reason. Early peer review is an important
+resource - use it. Being familiar with the :doc:`process` is also important.
+
+A good introduction how to prepare for submitting patches can be found in the
+LWN article `How to Get Your Change Into the Linux Kernel
+<http://lwn.net/Articles/139918/>`_ as the same rules apply to U-Boot, too.
+
+Using patman
+------------
+
+You can use a tool called patman to prepare, check and send patches. It creates
+change logs, cover letters and patch notes. It also simplifies the process of
+sending multiple versions of a series.
+
+See more details at :doc:`patman`.
+
+General Patch Submission Rules
+------------------------------
+
+* All patches must be sent to the `u-boot@lists.denx.de
+  <https://lists.denx.de/listinfo/u-boot>`_ mailing list.
+
+* If your patch affects the code maintained by one of the :ref:`custodians`, CC
+  them when emailing your patch. The easiest way to make sure you don't forget
+  this even when you resubmit the patch later is to add a ``Cc: name
+  <address>`` line after your ``Signed-off-by:`` line (see the example below).
+
+* Take a look at the commit logs of the files you are modifying. Authors of
+  past commits might have input to your change, so also CC them if you think
+  they may have feedback.
+
+* Patches should always contain exactly one complete logical change, i.e.
+
+   * Changes that contain different, unrelated modifications shall be submitted
+     as *separate* patches, one patch per changeset.
+
+   * If one logical set of modifications affects or creates several files, all
+     these changes shall be submitted in a *single* patch.
+
+* Non-functional changes, i.e. whitespace and reformatting changes, should be
+  done in separate patches marked as ``cosmetic``. This separation of functional
+  and cosmetic changes greatly facilitates the review process.
+
+* Some comments on running :doc:`checkpatch.pl <checkpatch>`:
+
+   * Checkpatch is a tool that can help you find some style problems, but is
+     imperfect, and the things it complains about are of varying importance.
+     So use common sense in interpreting the results.
+
+   * Warnings that clearly only make sense in the Linux kernel can be ignored.
+     This includes ``Use #include <linux/$file> instead of <asm/$file>`` for
+     example.
+
+   * If you encounter warnings for existing code, not modified by your patch,
+     consider submitting a separate, cosmetic-only patch -- clearly described
+     as such -- that *precedes* your substantive patch.
+
+   * For minor modifications (e.g. changed arguments of a function call),
+     adhere to the present coding style of the module. Relating checkpatch
+     warnings can be ignored in this case. A respective note in the commit or
+     cover letter why they are ignored is desired.
+
+* Send your patches as plain text messages: no HTML, no MIME, no links, no
+  compression, no attachments. Just plain text. The best way the generate
+  patches is by using the ``git format-patch`` command. Please use the
+  ``master`` branch of the mainline U-Boot git repository
+  (``https://source.denx.de/u-boot/u-boot.git``) as reference, unless (usually
+  late in a release cycle) there has been an announcement to use the ``next``
+  branch of this repository instead.
+
+* Make sure that your mailer does not mangle the patch by automatic changes
+  like wrapping of longer lines etc.
+  The best way to send patches is by not using your regular mail tool, but by
+  using either ``git send-email`` or the ``git imap-send`` command instead.
+  If you believe you need to use a mailing list for testing (instead of any
+  regular mail address you own), we have a special test list for such purposes.
+  It would be best to subscribe to the list for the duration of your tests to
+  avoid repeated moderation - see https://lists.denx.de/listinfo/test
+
+* Choose a meaningful Subject: - keep in mind that the Subject will also be
+  visible as headline of your commit message. Make sure the subject does not
+  exceed 60 characters or so.
+
+* The start of the subject should be a meaningful tag (arm:, ppc:, tegra:,
+  net:, ext2:, etc)
+
+* Include the string "PATCH" in the Subject: line of your message, e. g.
+  "[PATCH] Add support for feature X". ``git format-patch`` should automatically
+  do this.
+
+* If you are sending a patch series composed of multiple patches, make sure
+  their titles clearly state the patch order and total number of patches (``git
+  format-patch -n``). Also, often times an introductory email describing what
+  the patchset does is useful (``git format-patch -n --cover-letter``). As an
+  example::
+
+   [PATCH 0/3] Add support for new SuperCPU2000
+      (This email does not contain a patch, just a description)
+   [PATCH 1/3] Add core support for SuperCPU2000
+   [PATCH 2/3] Add support for SuperCPU2000's on-chip I2C controller
+   [PATCH 3/3] Add support for SuperCPU2000's on-chip UART
+
+* In the message body, include a description of your changes.
+
+   * For bug fixes: a description of the bug and how your patch fixes this bug.
+     Please try to include a way of demonstrating that the patch actually fixes
+     something.
+
+   * For new features: a description of the feature and your implementation.
+
+* Additional comments which you don't want included in U-Boot's history can be
+  included below the first "``---``" in the message body.
+
+* If your description gets too long, that's a strong indication that you should
+  split up your patch.
+
+* Remember that there is a size limit of 100 kB on the mailing list. In most
+  cases, you did something wrong if your patch exceeds this limit. Think again
+  if you should not split it into separate logical parts.
+
+Attributing Code, Copyrights, Signing
+-------------------------------------
+
+* Sign your changes, i. e. add a *Signed-off-by:* line to the message body.
+  This can be automated by using ``git commit -s``. Please see the
+  :ref:`Developer Certificate of Origin <dco>` section for more details here.
+
+* If you change or add *significant* parts to a file, then please make sure to
+  add your copyright to that file, for example like this::
+
+   (C) Copyright 2010  Joe Hacker <jh@hackers.paradise.com>
+
+	  Please do *not* include a detailed description of your
+	  changes. We use the *git* commit messages for this purpose.
+
+* If you add new files, please always make sure that these contain your
+  copyright note and a GPLv2+ SPDX-License-Identifier, for example like this::
+
+   (C) Copyright 2010  Joe Hacker <jh@hackers.paradise.com>
+
+   SPDX-License-Identifier:<TAB>GPL-2.0+
+
+* If you are copying or adapting code from other projects, like the Linux
+  kernel, or BusyBox, or similar, please make sure to state clearly where you
+  copied the code from, and provide terse but precise information which exact
+  version or even commit ID was used. Follow the ideas of this note from the
+  Linux "SubmittingPatches" document::
+
+   Special note to back-porters: It seems to be a common and useful practice
+   to insert an indication of the origin of a patch at the top of the commit
+   message (just after the subject line) to facilitate tracking. For instance,
+   here's what we see in 2.6-stable :
+
+	 Date:	Tue May 13 19:10:30 2008 +0000
+
+		  SCSI: libiscsi regression in 2.6.25: fix nop timer handling
+
+		  commit 4cf1043593db6a337f10e006c23c69e5fc93e722 upstream
+
+   And here's what appears in 2.4 :
+
+	 Date:	Tue May 13 22:12:27 2008 +0200
+
+		  wireless, airo: waitbusy() won't delay
+
+		  [backport of 2.6 commit b7acbdfbd1f277c1eb23f344f899cfa4cd0bf36a]
+
+Whatever the format, this information provides a valuable help to people
+tracking your trees, and to people trying to trouble-shoot bugs in your
+tree.
+
+Commit message conventions
+--------------------------
+
+Please adhere to the following conventions when writing your commit
+log messages.
+
+* The first line of the log message is the summary line. Keep this less than 70
+  characters long.
+
+* Don't use periods to end the summary line (e.g., don't do "Add support for
+  X.")
+
+* Use the present tense in your summary line (e.g., "Add support for X" rather
+  than "Added support for X"). Furthermore, use the present tense in your log
+  message to describe what the patch is doing. This isn't a strict rule -- it's
+  OK to use the past tense for describing things that were happening in the old
+  code for example.
+
+* Use the imperative tense in your summary line (e.g., "Add support for X"
+  rather than "Adds support for X"). In general, you can think of the summary
+  line as "this commit is meant to 'Add support for X'"
+
+* If applicable, prefix the summary line with a word describing what area of
+  code is being affected followed by a colon. This is a standard adopted by
+  both U-Boot and Linux. For example, if your change affects all mpc85xx
+  boards, prefix your summary line with "mpc85xx:". If your change affects the
+  PCI common code, prefix your summary line with "pci:". The best thing to do
+  is look at the "git log <file>" output to see what others have done so you
+  don't break conventions.
+
+* Insert a blank line after the summary line
+
+* For bug fixes, it's good practice to briefly describe how things behaved
+  before this commit
+
+* Put a detailed description after the summary and blank line. If the summary
+  line is sufficient to describe the change (e.g. it is a trivial spelling
+  correction or whitespace update), you can omit the blank line and detailed
+  description.
+
+* End your log message with S.O.B. (Signed-off-by) line. This is done
+  automatically when you use ``git commit -s``. Please see the
+  :ref:`Developer Certificate of Origin <dco>` section for more details here.
+
+* Keep EVERY line under 72 characters. That is, your message should be
+  line-wrapped with line-feeds. However, don't get carried away and wrap it too
+  short either since this also looks funny.
+
+* Detail level: The audience of the commit log message that you should cater to
+  is those familiar with the underlying source code you are modifying, but who
+  are _not_ familiar with the patch you are submitting. They should be able to
+  determine what is being changed and why. Avoid excessive low-level detail.
+  Before submitting, re-read your commit log message with this audience in mind
+  and adjust as needed.
+
+Sending updated patch versions
+------------------------------
+
+It is pretty normal that the first version of a patch you are submitting does
+not get accepted as is, and that you are asked to submit another, improved
+version.
+
+When re-posting such a new version of your patch(es), please always make sure
+to observe the following rules.
+
+* Make an appropriate note that this is a re-submission in the subject line,
+  e.g. "[PATCH v2] Add support for feature X". ``git format-patch
+  --subject-prefix="PATCH v2"`` can be used in this case (see the example
+  below).
+
+* Please make sure to keep a "change log", i.e. a description of what you have
+  changed compared to previous versions of this patch. This change log should
+  be added below the "``---``" line in the patch, which starts the "comment
+  section", i.e. which contains text that does not get included into the
+  actual commit message.
+  Note: it is *not* sufficient to provide a change log in some cover letter
+  that gets sent as a separate message with the patch series. The reason is
+  that such cover letters are not as easily reviewed in our `patchwork queue
+  <http://patchwork.ozlabs.org/project/uboot/list/>`_ so they are not helpful
+  to any reviewers using this tool. Example::
+
+   From: Joe Hacker <jh@hackers.paradise.com>
+   Date: Thu, 1 Jan 2222 12:21:22 +0200
+   Subject: [PATCH 1/2 v3] FOO: add timewarp-support
+
+   This patch adds timewarp-support for the FOO family of processors.
+
+   adapted for the current kernel structures.
+
+   Signed-off-by: Joe Hacker <jh@hackers.paradise.com>
+   Cc: Tom Maintainer <tm@u-boot.custodians.org>
+   ---
+   Changes for v2:
+   - Coding Style cleanup
+   - fixed miscalculation of time-space discontinuities
+   Changes for v3:
+   - fixed compiler warnings observed with GCC-17.3.5
+   - worked around integer overflow in warp driver
+
+    arch/foo/cpu/spacetime.c |	 8 +
+    drivers/warp/Kconfig     |	 7 +
+    drivers/warp/Makefile    |	42 +++
+    drivers/warp/warp-core.c | 255 +++++++++++++++++++++++++
+
+* Make sure that your mailer adds or keeps correct ``In-reply-to:`` and
+  ``References:`` headers, so threading of messages is working and everybody
+  can see that the new message refers to some older posting of the same topic.
+
+Uncommented and un-threaded repostings are extremely annoying and
+time-consuming, as we have to try to remember if anything similar has been
+posted before, look up the old threads, and then manually compare if anything
+has been changed, or what.
+
+If you have problems with your e-mail client, for example because it mangles
+white space or wraps long lines, then please read this article about `Email
+Clients and Patches <http://kerneltrap.org/Linux/Email_Clients_and_Patches>`_.
+
+Notes
+-----
+
+1. U-Boot is Free Software that can redistributed and/or modified under the
+   terms of the `GNU General Public License
+   <http://www.fsf.org/licensing/licenses/gpl.html>`_ (GPL). Currently (August
+   2022) version 2 of the GPL applies. Please see :download:`Licensing
+   <../../Licenses/README>` for details. To allow that later versions of U-Boot
+   may be released under a later version of the GPL, all new code that gets
+   added to U-Boot shall use a "GPL-2.0+" SPDX-License-Identifier.
+
+2. All code must follow the :doc:`codingstyle` requirements.
+
+3. Before sending the patch, you *must* run some form of local testing.
+   Submitting a patch that does not build or function correctly is a mistake. For
+   non-trivial patches, either building a number of platforms locally or making
+   use of :doc:`ci_testing` is strongly encouraged in order to avoid problems
+   that can be found when attempting to merge the patch.
+
+4. If you modify existing code, make sure that your new code does not add to
+   the memory footprint of the code. Remember: Small is beautiful! When adding
+   new features follow the guidelines laid out in :doc:`system_configuration`.
+
+Patch Tracking
+--------------
+
+Like some other projects, U-Boot uses `Patchwork <http://patchwork.ozlabs.org/>`_
+to track the state of patches. This is one of the reasons why it is mandatory
+to submit all patches to the U-Boot mailing list - only then they will be
+picked up by patchwork.
+
+At http://patchwork.ozlabs.org/project/uboot/list/ you can find the list of
+open U-Boot patches. By using the "Filters" link (Note: requires JavaScript)
+you can also select other views, for example, to include old patches that have,
+for example, already been applied or rejected.
+
+Note that Patchwork automatically tracks and collects a number of git tags from
+follow-up mails, so it is usually better to apply a patch through the Patchwork
+commandline interface than just manually applying it from a posting on the
+mailing list (in which case you have to do all the tracking and adding of git
+tags yourself). This also obviates the need of a developer to resubmit a patch
+only in order to collect these tags.
+
+A Custodian has additional privileges and can:
+
+* **Delegate** a patch
+
+* **Change the state** of a patch. The following states exist:
+
+   * New
+
+   * Under Review
+
+   * Accepted
+
+   * Rejected
+
+   * RFC
+
+   * Not Applicable
+
+   * Changes Requested
+
+   * Awaiting Upstream
+
+   * Superseded
+
+   * Deferred
+
+   * Archived
+
+Patchwork work-flow
+^^^^^^^^^^^^^^^^^^^
+
+The following are a "rule of thumb" as to how the states are used in patchwork
+today. Not all states are used by all custodians.
+
+* New: Patch has been submitted to the list, and none of the maintainers has
+  changed it's state since.
+
+* Under Review: A custodian is reviewing the patch currently.
+
+* Accepted: When a patch has been applied to a custodian repository that gets
+  used for pulling from into upstream, they are put into "accepted" state.
+
+* Rejected: Rejected means we just don't want to do what the patch does.
+
+* RFC: The patch is not intended to be applied to any of the mainline
+  repositories, but merely for discussing or testing some idea or new feature.
+
+* Not Applicable: The patch either was not intended to be applied, as it was
+  a debugging or discussion aide that patchwork picked up, or was cross-posted
+  to our list but intended for another project entirely.
+
+* Changes Requested: The patch looks mostly OK, but requires some rework before
+  it will be accepted for mainline.
+
+* Awaiting Upstream: A custodian may have applied this to the ``next`` branch
+  and has not merged yet to master, or has queued the patch up to be submitted
+  to be merged, but has not yet.
+
+* Superseded: Patches are marked as 'superseded' when the poster submits a
+  new version of these patches.
+
+* Deferred: Deferred usually means the patch depends on something else that
+  isn't upstream, such as patches that only apply against some specific other
+  repository. This is also used when a patch has been in patchwork for over a
+  year and it is unlikely to be applied as-is.
+
+* Archived: Archiving puts the patch away somewhere where it doesn't appear in
+  the normal pages and needs extra effort to get to.
+
+Apply patches
+^^^^^^^^^^^^^
+
+To apply a patch from the `patchwork queue
+<http://patchwork.ozlabs.org/project/uboot/list/>`_ using ``git``, download the
+mbox file and apply it using::
+
+   git am file
+
+The `openembedded wiki <http://wiki.openembedded.net/>`_ also provides a script
+named `pw-am.sh
+<http://cgit.openembedded.org/cgit.cgi/openembedded/tree/contrib/patchwork/pw-am.sh>`_
+which can be used to fetch an 'mbox' patch from patchwork and git am it::
+
+   usage: pw-am.sh <number>
+   example: 'pw-am.sh 71002' will get and apply the patch from http://patchwork.ozlabs.org/patch/71002/
+
+Update the state of patches
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+You have to register to be able to update the state of patches. You can use the
+Web interface, `pwclient`, or `pwparser`.
+
+pwclient
+^^^^^^^^
+
+The `pwclient` command line tool can be used for example to retrieve patches,
+search the queue or update the state.
+
+All necessary information for `pwclient` is linked from the bottom of
+http://patchwork.ozlabs.org/project/uboot/
+
+Use::
+
+   pwclient help
+
+for an overview on how to use it.
+
+pwparser
+^^^^^^^^
+
+See http://www.mail-archive.com/patchwork@lists.ozlabs.org/msg00057.html
diff --git a/doc/develop/smbios.rst b/doc/develop/smbios.rst
new file mode 100644
index 00000000000..a4efb0a0a38
--- /dev/null
+++ b/doc/develop/smbios.rst
@@ -0,0 +1,22 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+SMBIOS tables
+=============
+
+The System Management BIOS (SMBIOS) table is used to deliver management
+information from the firmware to the operating system. The content is
+standardized in [1]_.
+
+In Linux you can use the dmidecode command to view the contents of the SMBIOS
+table.
+
+When booting via UEFI the SMBIOS table is transferred as an UEFI configuration
+table to the operating system.
+
+To generate SMBIOS tables in U-Boot, the CONFIG_GENERATE_SMBIOS_TABLE option
+must be enabled. The easiest way to provide the values to use is via the device
+tree. For details see
+:download:`smbios.txt <../device-tree-bindings/sysinfo/smbios.txt>`.
+
+.. [1] `System Management BIOS (SMBIOS) Reference, version 3.5
+   <https://www.dmtf.org/content/dmtf-releases-smbios-35>`_
diff --git a/doc/develop/spl.rst b/doc/develop/spl.rst
new file mode 100644
index 00000000000..0a3e572310a
--- /dev/null
+++ b/doc/develop/spl.rst
@@ -0,0 +1,203 @@
+Generic SPL framework
+=====================
+
+Overview
+--------
+
+To unify all existing implementations for a secondary program loader (SPL)
+and to allow simply adding of new implementations this generic SPL framework
+has been created. With this framework almost all source files for a board
+can be reused. No code duplication or symlinking is necessary anymore.
+
+
+How it works
+------------
+
+The object files for SPL are built separately and placed in the "spl" directory.
+The final binaries which are generated are u-boot-spl, u-boot-spl.bin and
+u-boot-spl.map.
+
+A config option named CONFIG_SPL_BUILD is enabled by Kconfig for SPL.
+Source files can therefore be compiled for SPL with different settings.
+
+For example::
+
+   ifeq ($(CONFIG_SPL_BUILD),y)
+   obj-y += board_spl.o
+   else
+   obj-y += board.o
+   endif
+
+   obj-$(CONFIG_SPL_BUILD) += foo.o
+
+   #ifdef CONFIG_SPL_BUILD
+           foo();
+   #endif
+
+
+The building of SPL images can be enabled by CONFIG_SPL option in Kconfig.
+
+Because SPL images normally have a different text base, one has to be
+configured by defining CONFIG_SPL_TEXT_BASE. The linker script has to be
+defined with CONFIG_SPL_LDSCRIPT.
+
+To support generic U-Boot libraries and drivers in the SPL binary one can
+optionally define CONFIG_SPL_XXX_SUPPORT. Currently following options
+are supported:
+
+CONFIG_SPL_LIBCOMMON_SUPPORT (common/libcommon.o)
+CONFIG_SPL_LIBDISK_SUPPORT (disk/libdisk.o)
+CONFIG_SPL_I2C (drivers/i2c/libi2c.o)
+CONFIG_SPL_GPIO (drivers/gpio/libgpio.o)
+CONFIG_SPL_MMC (drivers/mmc/libmmc.o)
+CONFIG_SPL_SERIAL (drivers/serial/libserial.o)
+CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
+CONFIG_SPL_SPI (drivers/spi/libspi.o)
+CONFIG_SPL_FS_FAT (fs/fat/libfat.o)
+CONFIG_SPL_FS_EXT4
+CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER (drivers/power/libpower.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/raw/libnand.o)
+CONFIG_SPL_DRIVERS_MISC (drivers/misc)
+CONFIG_SPL_DMA (drivers/dma/libdma.o)
+CONFIG_SPL_POST_MEM_SUPPORT (post/drivers/memory.o)
+CONFIG_SPL_NAND_LOAD (drivers/mtd/nand/raw/nand_spl_load.o)
+CONFIG_SPL_SPI_LOAD (drivers/mtd/spi/spi_spl_load.o)
+CONFIG_SPL_RAM_DEVICE (common/spl/spl.c)
+CONFIG_SPL_WATCHDOG (drivers/watchdog/libwatchdog.o)
+CONFIG_SPL_SYSCON (drivers/core/syscon-uclass.o)
+CONFIG_SPL_GZIP (lib/gzip.o)
+CONFIG_SPL_VIDEO (drivers/video/video-uclass.o drivers/video/vidconsole-uclass.o)
+CONFIG_SPL_SPLASH_SCREEN (common/splash.o)
+CONFIG_SPL_SPLASH_SOURCE (common/splash_source.o)
+CONFIG_SPL_GPIO (drivers/gpio)
+CONFIG_SPL_DM_GPIO (drivers/gpio/gpio-uclass.o)
+CONFIG_SPL_BMP (drivers/video/bmp.o)
+CONFIG_SPL_BLOBLIST (common/bloblist.o)
+
+Adding SPL-specific code
+------------------------
+
+To check whether a feature is enabled, use CONFIG_IS_ENABLED()::
+
+  if (CONFIG_IS_ENABLED(CLK))
+      ...
+
+This checks CONFIG_CLK for the main build, CONFIG_SPL_CLK for the SPL build,
+CONFIG_TPL_CLK for the TPL build, etc.
+
+U-Boot Boot Phases
+------------------
+
+U-Boot goes through the following boot phases where TPL, VPL, SPL are optional.
+While many boards use SPL, less use TPL.
+
+TPL
+   Very early init, as tiny as possible. This loads SPL (or VPL if enabled).
+
+VPL
+   Optional verification step, which can select one of several SPL binaries,
+   if A/B verified boot is enabled. Implementation of the VPL logic is
+   work-in-progress. For now it just boots into SPL.
+
+SPL
+   Secondary program loader. Sets up SDRAM and loads U-Boot proper. It may also
+   load other firmware components.
+
+U-Boot
+   U-Boot proper, containing the command line and boot logic.
+
+Further usages of U-Boot SPL comprise:
+
+* Launching BL31 of ARM Trusted Firmware which invokes main U-Boot as BL33
+* launching EDK II
+* launching Linux kernel
+* launching RISC-V OpenSBI which invokes main U-Boot
+
+Checking the boot phase
+-----------------------
+
+Use `spl_phase()` to find the current U-Boot phase, e.g. `PHASE_SPL`. You can
+also find the previous and next phase and get the phase name.
+
+
+Device tree
+-----------
+The U-Boot device tree is filtered by the fdtgrep tools during the build
+process to generate a much smaller device tree used in SPL (spl/u-boot-spl.dtb)
+with:
+
+- the mandatory nodes (/alias, /chosen, /config)
+- the nodes with one pre-relocation property:
+  'bootph-all' or 'bootph-pre-ram'
+
+fdtgrep is also used to remove:
+
+- the properties defined in CONFIG_OF_SPL_REMOVE_PROPS
+- all the pre-relocation properties
+  ('bootph-all', 'bootph-pre-ram' (SPL), 'bootph-pre-sram' (TPL) and
+  'bootph-verify' (TPL))
+
+All the nodes remaining in the SPL devicetree are bound
+(see doc/driver-model/design.rst).
+
+NOTE: U-Boot migrated to a new schema for the u-boot,dm-* tags in 2023. Please
+update to use the new bootph-* tags as described in the
+doc/device-tree-bindings/bootph.yaml binding file.
+
+Debugging
+---------
+
+When building SPL with DEBUG set you may also need to set CONFIG_PANIC_HANG
+as in most cases do_reset is not defined within SPL.
+
+
+Estimating stack usage
+----------------------
+
+With gcc 4.6 (and later) and the use of GNU cflow it is possible to estimate
+stack usage at various points in run sequence of SPL.  The -fstack-usage option
+to gcc will produce '.su' files (such as arch/arm/cpu/armv7/syslib.su) that
+will give stack usage information and cflow can construct program flow.
+
+Must have gcc 4.6 or later, which supports -fstack-usage:
+
+#. Build normally
+#. Perform the following shell command to generate a list of C files used in
+   SPL:
+#. `find spl -name '*.su' | sed -e 's:^spl/::' -e 's:[.]su$:.c:' > used-spl.list`
+#. Execute cflow:
+   `$ cflow --main=board_init_r $(cat used-spl.list) 2>&1 | $PAGER`
+
+cflow will spit out a number of warnings as it does not parse
+the config files and picks functions based on #ifdef.  Parsing the '.i'
+files instead introduces another set of headaches.  These warnings are
+not usually important to understanding the flow, however.
+
+
+Reserving memory in SPL
+-----------------------
+
+If memory needs to be reserved in RAM during SPL stage with the requirement that
+the SPL reserved memory remains preserved across further boot stages too
+then it needs to be reserved mandatorily starting from end of RAM. This is to
+ensure that further stages can simply skip this region before carrying out
+further reservations or updating the relocation address.
+
+Also out of these regions which are to be preserved across further stages of
+boot, video framebuffer memory region must be reserved first starting from
+end of RAM for which helper function spl_reserve_video_from_ram_top is provided
+which makes sure that video memory is placed at top of reservation area with
+further reservations below it.
+
+The corresponding information of reservation for those regions can be passed to
+further boot stages using a bloblist. For e.g. the information for
+framebuffer area reserved by SPL can be passed onto U-boot using
+BLOBLISTT_U_BOOT_VIDEO.
+
+The further boot stages need to parse each of the bloblist passed from SPL stage
+starting from video bloblist and skip this whole SPL reserved memory area from
+end of RAM as per the bloblists received, before carrying out further
+reservations or updating the relocation address. For e.g, U-boot proper uses
+function "setup_relocaddr_from_bloblist" to parse the bloblists passed from
+previous stage and skip the memory reserved from previous stage accordingly.
diff --git a/doc/develop/statistics/u-boot-stats-v1.3.0.rst b/doc/develop/statistics/u-boot-stats-v1.3.0.rst
new file mode 100644
index 00000000000..cbf433f453e
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v1.3.0.rst
@@ -0,0 +1,539 @@
+:orphan:
+
+Release Statistics for U-Boot v1.3.0
+====================================
+
+* Processed 1153 changesets from 102 developers
+
+* 38 employers found
+
+* A total of 238271 lines added, 197375 removed (delta 40896)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      150 (13.0%)
+   Jon Loeliger                      123 (10.7%)
+   Wolfgang Denk                     110 (9.5%)
+   TsiChung Liew                     61 (5.3%)
+   Michal Simek                      57 (4.9%)
+   Grant Likely                      50 (4.3%)
+   Kim Phillips                      36 (3.1%)
+   Andy Fleming                      31 (2.7%)
+   Gerald Van Baren                  30 (2.6%)
+   Bartlomiej Sieka                  29 (2.5%)
+   Markus Klotzbuecher               28 (2.4%)
+   Roy Zang                          27 (2.3%)
+   Haavard Skinnemoen                26 (2.3%)
+   Ed Swarthout                      26 (2.3%)
+   Peter Pearse                      23 (2.0%)
+   Shinya Kuribayashi                20 (1.7%)
+   Heiko Schocher                    19 (1.6%)
+   Aubrey.Li                         19 (1.6%)
+   Jean-Christophe PLAGNIOL-VILLARD  16 (1.4%)
+   Matthias Fuchs                    15 (1.3%)
+   Jason Jin                         14 (1.2%)
+   Niklaus Giger                     14 (1.2%)
+   Dave Liu                          12 (1.0%)
+   Martin Krause                     11 (1.0%)
+   Grzegorz Bernacki                 11 (1.0%)
+   Kumar Gala                        11 (1.0%)
+   Timur Tabi                        9 (0.8%)
+   Scott Wood                        8 (0.7%)
+   Haiying Wang                      7 (0.6%)
+   Zhang Wei                         6 (0.5%)
+   Rodolfo Giometti                  6 (0.5%)
+   Rafal Jaworowski                  6 (0.5%)
+   Stefano Babic                     6 (0.5%)
+   Jeffrey Mann                      6 (0.5%)
+   Joe Hamman                        5 (0.4%)
+   Kyungmin Park                     4 (0.3%)
+   Detlev Zundel                     4 (0.3%)
+   Dirk Behme                        4 (0.3%)
+   Gary Jennejohn                    4 (0.3%)
+   Jerry Van Baren                   4 (0.3%)
+   Sergei Poselenov                  4 (0.3%)
+   Xie Xiaobo                        4 (0.3%)
+   Vlad Lungu                        3 (0.3%)
+   Marian Balakowicz                 3 (0.3%)
+   urwithsughosh@gmail.com           3 (0.3%)
+   Tony Li                           3 (0.3%)
+   Mike Frysinger                    3 (0.3%)
+   Sergei Shtylyov                   3 (0.3%)
+   Domen Puncer                      3 (0.3%)
+   Justin Flammia                    2 (0.2%)
+   Larry Johnson                     2 (0.2%)
+   Bruce Adler                       2 (0.2%)
+   Guennadi Liakhovetski             2 (0.2%)
+   Sergej Stepanov                   2 (0.2%)
+   Rune Torgersen                    2 (0.2%)
+   David Saada                       2 (0.2%)
+   Eirik Aanonsen                    2 (0.2%)
+   Sam Sparks                        2 (0.2%)
+   Hans-Christian Egtvedt            2 (0.2%)
+   Yuri Tikhonov                     2 (0.2%)
+   ksi@koi8.net                      2 (0.2%)
+   Benoit Monin                      2 (0.2%)
+   David Updegraff                   2 (0.2%)
+   Piotr Kruszynski                  2 (0.2%)
+   John Otken                        2 (0.2%)
+   Igor Lisitsin                     2 (0.2%)
+   Thomas Knobloch                   2 (0.2%)
+   Nikita V. Youshchenko             2 (0.2%)
+   Ladislav Michl                    2 (0.2%)
+   James Yang                        2 (0.2%)
+   mushtaq khan                      2 (0.2%)
+   Grzegorz Wianecki                 2 (0.2%)
+   Luotao Fu                         1 (0.1%)
+   Marcel Ziswiler                   1 (0.1%)
+   Dan Wilson                        1 (0.1%)
+   Jens Gehrlein                     1 (0.1%)
+   Timo Ketola                       1 (0.1%)
+   Sean MCGOOGAN                     1 (0.1%)
+   Semih Hazar                       1 (0.1%)
+   Ulf Samuelsson                    1 (0.1%)
+   Randy Vinson                      1 (0.1%)
+   Ebony Zhu                         1 (0.1%)
+   Wilson Callan                     1 (0.1%)
+   Mike Rapoport                     1 (0.1%)
+   Lee Nipper                        1 (0.1%)
+   Zach Sadecki                      1 (0.1%)
+   Eugene OBrien                     1 (0.1%)
+   Anatolij Gustschin                1 (0.1%)
+   Pavel Kolesnikov                  1 (0.1%)
+   TsiChung                          1 (0.1%)
+   Mushtaq Khan                      1 (0.1%)
+   Vadim Bendebury                   1 (0.1%)
+   Stephen Williams                  1 (0.1%)
+   Dan Malek                         1 (0.1%)
+   Denis Peter                       1 (0.1%)
+   Greg Lopp                         1 (0.1%)
+   Igor Marnat                       1 (0.1%)
+   Emilian Medve                     1 (0.1%)
+   Joakim Tjernlund                  1 (0.1%)
+   Paul Gortmaker                    1 (0.1%)
+   Sam Song                          1 (0.1%)
+   Reinhard Thies                    1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jason Jin                         125258 (32.7%)
+   Wolfgang Denk                     40869 (10.7%)
+   TsiChung Liew                     28857 (7.5%)
+   Aubrey.Li                         26630 (7.0%)
+   Stefan Roese                      25448 (6.6%)
+   Jon Loeliger                      13063 (3.4%)
+   Grant Likely                      10507 (2.7%)
+   Vadim Bendebury                   8369 (2.2%)
+   Roy Zang                          8255 (2.2%)
+   Peter Pearse                      8243 (2.2%)
+   Michal Simek                      8123 (2.1%)
+   Heiko Schocher                    6203 (1.6%)
+   Markus Klotzbuecher               5981 (1.6%)
+   ksi@koi8.net                      5467 (1.4%)
+   Rafal Jaworowski                  4963 (1.3%)
+   Dave Liu                          4502 (1.2%)
+   Gerald Van Baren                  4448 (1.2%)
+   Niklaus Giger                     3556 (0.9%)
+   Haavard Skinnemoen                3494 (0.9%)
+   Bartlomiej Sieka                  3279 (0.9%)
+   Gary Jennejohn                    2911 (0.8%)
+   Andy Fleming                      2643 (0.7%)
+   John Otken                        2626 (0.7%)
+   Kim Phillips                      2411 (0.6%)
+   Kyungmin Park                     2401 (0.6%)
+   Paul Gortmaker                    2077 (0.5%)
+   Rodolfo Giometti                  1943 (0.5%)
+   Matthias Fuchs                    1932 (0.5%)
+   Sergei Poselenov                  1918 (0.5%)
+   Ed Swarthout                      1782 (0.5%)
+   Scott Wood                        1667 (0.4%)
+   Joe Hamman                        1527 (0.4%)
+   Stefano Babic                     1519 (0.4%)
+   Dan Malek                         1316 (0.3%)
+   mushtaq khan                      1107 (0.3%)
+   Igor Lisitsin                     720 (0.2%)
+   Grzegorz Bernacki                 651 (0.2%)
+   Timur Tabi                        593 (0.2%)
+   Dirk Behme                        583 (0.2%)
+   David Updegraff                   453 (0.1%)
+   Xie Xiaobo                        451 (0.1%)
+   Shinya Kuribayashi                424 (0.1%)
+   Haiying Wang                      388 (0.1%)
+   Jean-Christophe PLAGNIOL-VILLARD  327 (0.1%)
+   Pavel Kolesnikov                  318 (0.1%)
+   Zhang Wei                         294 (0.1%)
+   Eugene OBrien                     248 (0.1%)
+   Larry Johnson                     244 (0.1%)
+   Tony Li                           176 (0.0%)
+   Kumar Gala                        153 (0.0%)
+   Sergej Stepanov                   139 (0.0%)
+   Martin Krause                     98 (0.0%)
+   Ladislav Michl                    86 (0.0%)
+   Jerry Van Baren                   85 (0.0%)
+   Domen Puncer                      77 (0.0%)
+   Randy Vinson                      75 (0.0%)
+   Anatolij Gustschin                73 (0.0%)
+   Timo Ketola                       72 (0.0%)
+   Marcel Ziswiler                   60 (0.0%)
+   James Yang                        57 (0.0%)
+   Yuri Tikhonov                     46 (0.0%)
+   Vlad Lungu                        39 (0.0%)
+   Piotr Kruszynski                  38 (0.0%)
+   Mike Rapoport                     38 (0.0%)
+   TsiChung                          38 (0.0%)
+   Thomas Knobloch                   37 (0.0%)
+   Rune Torgersen                    35 (0.0%)
+   Grzegorz Wianecki                 28 (0.0%)
+   Marian Balakowicz                 26 (0.0%)
+   Sergei Shtylyov                   25 (0.0%)
+   Bruce Adler                       25 (0.0%)
+   Jeffrey Mann                      23 (0.0%)
+   Eirik Aanonsen                    21 (0.0%)
+   Detlev Zundel                     20 (0.0%)
+   urwithsughosh@gmail.com           15 (0.0%)
+   Justin Flammia                    14 (0.0%)
+   Joakim Tjernlund                  14 (0.0%)
+   Nikita V. Youshchenko             12 (0.0%)
+   Mushtaq Khan                      12 (0.0%)
+   Reinhard Thies                    12 (0.0%)
+   Mike Frysinger                    9 (0.0%)
+   David Saada                       9 (0.0%)
+   Benoit Monin                      9 (0.0%)
+   Jens Gehrlein                     9 (0.0%)
+   Lee Nipper                        9 (0.0%)
+   Sam Sparks                        6 (0.0%)
+   Wilson Callan                     6 (0.0%)
+   Igor Marnat                       5 (0.0%)
+   Luotao Fu                         4 (0.0%)
+   Hans-Christian Egtvedt            3 (0.0%)
+   Greg Lopp                         3 (0.0%)
+   Guennadi Liakhovetski             2 (0.0%)
+   Ulf Samuelsson                    2 (0.0%)
+   Zach Sadecki                      2 (0.0%)
+   Denis Peter                       2 (0.0%)
+   Dan Wilson                        1 (0.0%)
+   Sean MCGOOGAN                     1 (0.0%)
+   Semih Hazar                       1 (0.0%)
+   Ebony Zhu                         1 (0.0%)
+   Stephen Williams                  1 (0.0%)
+   Emilian Medve                     1 (0.0%)
+   Sam Song                          1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jason Jin                         87019 (44.1%)
+   Grant Likely                      8023 (4.1%)
+   Vadim Bendebury                   700 (0.4%)
+   Dirk Behme                        564 (0.3%)
+   Matthias Fuchs                    126 (0.1%)
+   Shinya Kuribayashi                86 (0.0%)
+   Ladislav Michl                    68 (0.0%)
+   Jean-Christophe PLAGNIOL-VILLARD  31 (0.0%)
+   Vlad Lungu                        17 (0.0%)
+   Rune Torgersen                    11 (0.0%)
+   Detlev Zundel                     11 (0.0%)
+   Kumar Gala                        9 (0.0%)
+   TsiChung                          9 (0.0%)
+   Guennadi Liakhovetski             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 268)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      41 (15.3%)
+   Jon Loeliger                      30 (11.2%)
+   Alexandre Bounine                 21 (7.8%)
+   Kim Phillips                      21 (7.8%)
+   Grant Likely                      16 (6.0%)
+   Ed Swarthout                      13 (4.9%)
+   Ben Warren                        12 (4.5%)
+   Piotr Kruszynski                  7 (2.6%)
+   Grzegorz Bernacki                 7 (2.6%)
+   Gerald Van Baren                  7 (2.6%)
+   Zhang Wei                         6 (2.2%)
+   Haavard Skinnemoen                6 (2.2%)
+   Reinhard Arlt                     5 (1.9%)
+   Heiko Schocher                    5 (1.9%)
+   Jan Wrobel                        4 (1.5%)
+   Marian Balakowicz                 4 (1.5%)
+   Rafal Jaworowski                  4 (1.5%)
+   Wolfgang Grandegger               3 (1.1%)
+   James Yang                        3 (1.1%)
+   Haiying Wang                      3 (1.1%)
+   Andy Fleming                      3 (1.1%)
+   Bartlomiej Sieka                  3 (1.1%)
+   Jason Jin                         2 (0.7%)
+   Shinya Kuribayashi                2 (0.7%)
+   Benoit Monin                      2 (0.7%)
+   Igor Lisitsin                     2 (0.7%)
+   Markus Klotzbuecher               2 (0.7%)
+   Scott Wood                        2 (0.7%)
+   Dirk Behme                        1 (0.4%)
+   Ladislav Michl                    1 (0.4%)
+   Jean-Christophe PLAGNIOL-VILLARD  1 (0.4%)
+   Vlad Lungu                        1 (0.4%)
+   Detlev Zundel                     1 (0.4%)
+   Ebony Zhu                         1 (0.4%)
+   Emilian Medve                     1 (0.4%)
+   Alain Gravel                      1 (0.4%)
+   York Sun                          1 (0.4%)
+   Greg Davis                        1 (0.4%)
+   Michael Barkowski                 1 (0.4%)
+   Eran Liberty                      1 (0.4%)
+   Vitaly Bordug                     1 (0.4%)
+   Swarthout Edward                  1 (0.4%)
+   Nick Spence                       1 (0.4%)
+   Chereji Marian                    1 (0.4%)
+   Gridish Shlomi                    1 (0.4%)
+   Yuli Barcohen                     1 (0.4%)
+   Mike Frysinger                    1 (0.4%)
+   David Saada                       1 (0.4%)
+   Ulf Samuelsson                    1 (0.4%)
+   Justin Flammia                    1 (0.4%)
+   Martin Krause                     1 (0.4%)
+   Randy Vinson                      1 (0.4%)
+   Domen Puncer                      1 (0.4%)
+   Timur Tabi                        1 (0.4%)
+   Dave Liu                          1 (0.4%)
+   Sergei Poselenov                  1 (0.4%)
+   Kyungmin Park                     1 (0.4%)
+   Roy Zang                          1 (0.4%)
+   Wolfgang Denk                     1 (0.4%)
+   TsiChung Liew                     1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         335 (29.1%)
+   DENX Software Engineering         317 (27.5%)
+   (Unknown)                         139 (12.1%)
+   Xilinx                            57 (4.9%)
+   Semihalf Embedded Systems         51 (4.4%)
+   Secretlab                         50 (4.3%)
+   Custom IDEAS                      33 (2.9%)
+   Atmel                             29 (2.5%)
+   ARM                               23 (2.0%)
+   jcrosoft                          16 (1.4%)
+   ESD Electronics                   15 (1.3%)
+   TQ Systems                        12 (1.0%)
+   EmCraft Systems                   9 (0.8%)
+   NEC                               9 (0.8%)
+   Embedded Planet                   6 (0.5%)
+   Embedded Specialties              5 (0.4%)
+   Wind River                        4 (0.3%)
+   Samsung                           4 (0.3%)
+   Dirk Behme                        4 (0.3%)
+   Analog Devices                    3 (0.3%)
+   MontaVista                        3 (0.3%)
+   Netstal-Maschinen                 3 (0.3%)
+   Savant Systems                    3 (0.3%)
+   Telargo                           3 (0.3%)
+   Cray                              2 (0.2%)
+   Debian.org                        2 (0.2%)
+   ECI Telecom                       2 (0.2%)
+   IDS                               2 (0.2%)
+   Siemens                           2 (0.2%)
+   Sergey Kubushyn                   2 (0.2%)
+   Advantech                         1 (0.1%)
+   Google, Inc.                      1 (0.1%)
+   CompuLab                          1 (0.1%)
+   Embedded Alley Solutions          1 (0.1%)
+   Pengutronix                       1 (0.1%)
+   ST Microelectronics               1 (0.1%)
+   Transmode Systems                 1 (0.1%)
+   Cameron                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         186012 (48.6%)
+   DENX Software Engineering         81973 (21.4%)
+   (Unknown)                         42285 (11.0%)
+   Secretlab                         10507 (2.7%)
+   Semihalf Embedded Systems         8957 (2.3%)
+   Google, Inc.                      8369 (2.2%)
+   ARM                               8243 (2.2%)
+   Xilinx                            8123 (2.1%)
+   Sergey Kubushyn                   5467 (1.4%)
+   Custom IDEAS                      4517 (1.2%)
+   Atmel                             3499 (0.9%)
+   EmCraft Systems                   3002 (0.8%)
+   Samsung                           2401 (0.6%)
+   Wind River                        2116 (0.6%)
+   ESD Electronics                   1932 (0.5%)
+   Embedded Specialties              1527 (0.4%)
+   Embedded Alley Solutions          1316 (0.3%)
+   Dirk Behme                        583 (0.2%)
+   Cray                              453 (0.1%)
+   jcrosoft                          327 (0.1%)
+   NEC                               271 (0.1%)
+   Advantech                         248 (0.1%)
+   IDS                               139 (0.0%)
+   TQ Systems                        107 (0.0%)
+   Netstal-Maschinen                 90 (0.0%)
+   Telargo                           77 (0.0%)
+   CompuLab                          38 (0.0%)
+   Siemens                           37 (0.0%)
+   MontaVista                        25 (0.0%)
+   Embedded Planet                   23 (0.0%)
+   Savant Systems                    20 (0.0%)
+   Transmode Systems                 14 (0.0%)
+   Debian.org                        12 (0.0%)
+   Cameron                           12 (0.0%)
+   Analog Devices                    9 (0.0%)
+   ECI Telecom                       9 (0.0%)
+   Pengutronix                       4 (0.0%)
+   ST Microelectronics               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 268)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         94 (35.1%)
+   DENX Software Engineering         53 (19.8%)
+   Semihalf Embedded Systems         29 (10.8%)
+   (Unknown)                         21 (7.8%)
+   Tundra Semiconductor              21 (7.8%)
+   Secretlab                         16 (6.0%)
+   Custom IDEAS                      7 (2.6%)
+   Atmel                             7 (2.6%)
+   ESD Electronics                   5 (1.9%)
+   EmCraft Systems                   3 (1.1%)
+   MontaVista                        2 (0.7%)
+   Samsung                           1 (0.4%)
+   Wind River                        1 (0.4%)
+   jcrosoft                          1 (0.4%)
+   NEC                               1 (0.4%)
+   TQ Systems                        1 (0.4%)
+   Telargo                           1 (0.4%)
+   Embedded Planet                   1 (0.4%)
+   Savant Systems                    1 (0.4%)
+   Analog Devices                    1 (0.4%)
+   ECI Telecom                       1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 108)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         32 (29.6%)
+   Freescale                         19 (17.6%)
+   DENX Software Engineering         9 (8.3%)
+   Semihalf Embedded Systems         5 (4.6%)
+   EmCraft Systems                   4 (3.7%)
+   Atmel                             3 (2.8%)
+   Custom IDEAS                      2 (1.9%)
+   Wind River                        2 (1.9%)
+   TQ Systems                        2 (1.9%)
+   Savant Systems                    2 (1.9%)
+   Secretlab                         1 (0.9%)
+   ESD Electronics                   1 (0.9%)
+   MontaVista                        1 (0.9%)
+   Samsung                           1 (0.9%)
+   jcrosoft                          1 (0.9%)
+   NEC                               1 (0.9%)
+   Telargo                           1 (0.9%)
+   Embedded Planet                   1 (0.9%)
+   Analog Devices                    1 (0.9%)
+   ECI Telecom                       1 (0.9%)
+   Google, Inc.                      1 (0.9%)
+   ARM                               1 (0.9%)
+   Xilinx                            1 (0.9%)
+   Sergey Kubushyn                   1 (0.9%)
+   Embedded Specialties              1 (0.9%)
+   Embedded Alley Solutions          1 (0.9%)
+   Dirk Behme                        1 (0.9%)
+   Cray                              1 (0.9%)
+   Advantech                         1 (0.9%)
+   IDS                               1 (0.9%)
+   Netstal-Maschinen                 1 (0.9%)
+   CompuLab                          1 (0.9%)
+   Siemens                           1 (0.9%)
+   Transmode Systems                 1 (0.9%)
+   Debian.org                        1 (0.9%)
+   Cameron                           1 (0.9%)
+   Pengutronix                       1 (0.9%)
+   ST Microelectronics               1 (0.9%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v1.3.1.rst b/doc/develop/statistics/u-boot-stats-v1.3.1.rst
new file mode 100644
index 00000000000..6a5c592b007
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v1.3.1.rst
@@ -0,0 +1,153 @@
+:orphan:
+
+Release Statistics for U-Boot v1.3.1
+====================================
+
+* Processed 40 changesets from 5 developers
+
+* 5 employers found
+
+* A total of 3267 lines added, 1338 removed (delta 1929)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jean-Christophe PLAGNIOL-VILLARD  16 (40.0%)
+   Grant Likely                      11 (27.5%)
+   Kumar Gala                        8 (20.0%)
+   Wolfgang Denk                     4 (10.0%)
+   Gerald Van Baren                  1 (2.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        1942 (54.1%)
+   Grant Likely                      673 (18.7%)
+   Jean-Christophe PLAGNIOL-VILLARD  551 (15.3%)
+   Wolfgang Denk                     398 (11.1%)
+   Gerald Van Baren                  27 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jean-Christophe PLAGNIOL-VILLARD  1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   jcrosoft                          16 (40.0%)
+   Secretlab                         11 (27.5%)
+   Freescale                         8 (20.0%)
+   DENX Software Engineering         4 (10.0%)
+   Custom IDEAS                      1 (2.5%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         1942 (54.1%)
+   Secretlab                         673 (18.7%)
+   jcrosoft                          551 (15.3%)
+   DENX Software Engineering         398 (11.1%)
+   Custom IDEAS                      27 (0.8%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   jcrosoft                          1 (100.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   jcrosoft                          1 (20.0%)
+   Freescale                         1 (20.0%)
+   Secretlab                         1 (20.0%)
+   DENX Software Engineering         1 (20.0%)
+   Custom IDEAS                      1 (20.0%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v1.3.2.rst b/doc/develop/statistics/u-boot-stats-v1.3.2.rst
new file mode 100644
index 00000000000..21fc2df09a5
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v1.3.2.rst
@@ -0,0 +1,475 @@
+:orphan:
+
+Release Statistics for U-Boot v1.3.2
+====================================
+
+* Processed 744 changesets from 79 developers
+
+* 38 employers found
+
+* A total of 169710 lines added, 43975 removed (delta 125735)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      111 (14.9%)
+   Kumar Gala                        61 (8.2%)
+   Wolfgang Denk                     58 (7.8%)
+   Jean-Christophe PLAGNIOL-VILLARD  37 (5.0%)
+   Matthias Fuchs                    35 (4.7%)
+   Larry Johnson                     32 (4.3%)
+   Mike Frysinger                    32 (4.3%)
+   Haavard Skinnemoen                28 (3.8%)
+   Nobuhiro Iwamatsu                 25 (3.4%)
+   Dave Liu                          22 (3.0%)
+   Jon Loeliger                      22 (3.0%)
+   TsiChung Liew                     22 (3.0%)
+   Kim Phillips                      21 (2.8%)
+   Anatolij Gustschin                13 (1.7%)
+   Niklaus Giger                     13 (1.7%)
+   Heiko Schocher                    12 (1.6%)
+   Shinya Kuribayashi                12 (1.6%)
+   Michael Schwingen                 10 (1.3%)
+   Stelian Pop                       10 (1.3%)
+   Becky Bruce                       8 (1.1%)
+   Timur Tabi                        7 (0.9%)
+   Martin Krause                     7 (0.9%)
+   Rafal Jaworowski                  7 (0.9%)
+   Harald Welte                      7 (0.9%)
+   Guennadi Liakhovetski             6 (0.8%)
+   Gerald Van Baren                  6 (0.8%)
+   Anton Vorontsov                   6 (0.8%)
+   Andy Fleming                      5 (0.7%)
+   Peter Pearse                      5 (0.7%)
+   Grzegorz Bernacki                 5 (0.7%)
+   Jens Gehrlein                     5 (0.7%)
+   John Rigby                        4 (0.5%)
+   Ben Warren                        4 (0.5%)
+   Markus Klotzbuecher               4 (0.5%)
+   Marian Balakowicz                 4 (0.5%)
+   York Sun                          4 (0.5%)
+   Jason Jin                         4 (0.5%)
+   Stefano Babic                     3 (0.4%)
+   Kyungmin Park                     3 (0.4%)
+   Ladislav Michl                    3 (0.4%)
+   James Yang                        3 (0.4%)
+   Yoshihiro Shimoda                 3 (0.4%)
+   Zhang Wei                         3 (0.4%)
+   Paul Gortmaker                    3 (0.4%)
+   Detlev Zundel                     2 (0.3%)
+   Mike Nuss                         2 (0.3%)
+   Yuri Tikhonov                     2 (0.3%)
+   K R Gururaja Hebbar               2 (0.3%)
+   Vlad Lungu                        2 (0.3%)
+   Andreas Engel                     2 (0.3%)
+   Haiying Wang                      2 (0.3%)
+   Joakim Tjernlund                  2 (0.3%)
+   Roy Zang                          2 (0.3%)
+   robert lazarski                   2 (0.3%)
+   Joe Hamman                        2 (0.3%)
+   Marcel Ziswiler                   2 (0.3%)
+   David Gibson                      2 (0.3%)
+   Eugene O'Brien                    2 (0.3%)
+   Markus Brunner                    1 (0.1%)
+   Bernhard Nemec                    1 (0.1%)
+   Kim B. Heino                      1 (0.1%)
+   michael                           1 (0.1%)
+   Woodruff, Richard                 1 (0.1%)
+   Li Yang                           1 (0.1%)
+   Marcel Moolenaar                  1 (0.1%)
+   Uwe Kleine-König                  1 (0.1%)
+   Timo Tuunainen                    1 (0.1%)
+   Hiroshi Ito                       1 (0.1%)
+   Johannes Stezenbach               1 (0.1%)
+   michael.firth@bt.com              1 (0.1%)
+   Poonam Aggrwal                    1 (0.1%)
+   Jerry Van Baren                   1 (0.1%)
+   David Saada                       1 (0.1%)
+   Oliver Weber                      1 (0.1%)
+   Rodolfo Giometti                  1 (0.1%)
+   raptorbrino@aim.com               1 (0.1%)
+   Hans-Christian Egtvedt            1 (0.1%)
+   Upakul Barkakaty                  1 (0.1%)
+   Bartlomiej Sieka                  1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    61912 (33.7%)
+   Wolfgang Denk                     19704 (10.7%)
+   TsiChung Liew                     15764 (8.6%)
+   Stefan Roese                      9860 (5.4%)
+   Matthias Fuchs                    9204 (5.0%)
+   Larry Johnson                     7605 (4.1%)
+   Kumar Gala                        7203 (3.9%)
+   Nobuhiro Iwamatsu                 6268 (3.4%)
+   Michael Schwingen                 5797 (3.2%)
+   Haavard Skinnemoen                2916 (1.6%)
+   Rafal Jaworowski                  2889 (1.6%)
+   Dave Liu                          2871 (1.6%)
+   Peter Pearse                      2622 (1.4%)
+   Heiko Schocher                    2410 (1.3%)
+   Kim Phillips                      2088 (1.1%)
+   Jon Loeliger                      2035 (1.1%)
+   Stelian Pop                       1946 (1.1%)
+   York Sun                          1839 (1.0%)
+   Joe Hamman                        1654 (0.9%)
+   Yoshihiro Shimoda                 1466 (0.8%)
+   Andreas Engel                     1455 (0.8%)
+   robert lazarski                   1393 (0.8%)
+   Anton Vorontsov                   1269 (0.7%)
+   Niklaus Giger                     1088 (0.6%)
+   Anatolij Gustschin                1022 (0.6%)
+   Timo Tuunainen                    985 (0.5%)
+   Becky Bruce                       887 (0.5%)
+   Kyungmin Park                     742 (0.4%)
+   Guennadi Liakhovetski             689 (0.4%)
+   Jean-Christophe PLAGNIOL-VILLARD  613 (0.3%)
+   Marian Balakowicz                 574 (0.3%)
+   Vlad Lungu                        488 (0.3%)
+   Harald Welte                      487 (0.3%)
+   John Rigby                        435 (0.2%)
+   Timur Tabi                        403 (0.2%)
+   Stefano Babic                     390 (0.2%)
+   Paul Gortmaker                    339 (0.2%)
+   Ben Warren                        334 (0.2%)
+   David Gibson                      323 (0.2%)
+   Haiying Wang                      284 (0.2%)
+   Shinya Kuribayashi                224 (0.1%)
+   Ladislav Michl                    189 (0.1%)
+   Martin Krause                     161 (0.1%)
+   Joakim Tjernlund                  143 (0.1%)
+   James Yang                        142 (0.1%)
+   Markus Klotzbuecher               86 (0.0%)
+   Hans-Christian Egtvedt            85 (0.0%)
+   Grzegorz Bernacki                 84 (0.0%)
+   Gerald Van Baren                  65 (0.0%)
+   Andy Fleming                      61 (0.0%)
+   Marcel Ziswiler                   57 (0.0%)
+   David Saada                       45 (0.0%)
+   Jens Gehrlein                     39 (0.0%)
+   Zhang Wei                         39 (0.0%)
+   Detlev Zundel                     33 (0.0%)
+   Bernhard Nemec                    22 (0.0%)
+   Bartlomiej Sieka                  21 (0.0%)
+   K R Gururaja Hebbar               20 (0.0%)
+   michael.firth@bt.com              20 (0.0%)
+   Jason Jin                         19 (0.0%)
+   Poonam Aggrwal                    16 (0.0%)
+   Rodolfo Giometti                  16 (0.0%)
+   Yuri Tikhonov                     15 (0.0%)
+   Eugene O'Brien                    13 (0.0%)
+   Roy Zang                          9 (0.0%)
+   Uwe Kleine-König                  9 (0.0%)
+   Mike Nuss                         7 (0.0%)
+   Li Yang                           7 (0.0%)
+   michael                           6 (0.0%)
+   Woodruff, Richard                 6 (0.0%)
+   Hiroshi Ito                       6 (0.0%)
+   Oliver Weber                      4 (0.0%)
+   Upakul Barkakaty                  4 (0.0%)
+   Johannes Stezenbach               3 (0.0%)
+   Marcel Moolenaar                  2 (0.0%)
+   Markus Brunner                    1 (0.0%)
+   Kim B. Heino                      1 (0.0%)
+   Jerry Van Baren                   1 (0.0%)
+   raptorbrino@aim.com               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andreas Engel                     1422 (3.2%)
+   Kumar Gala                        1335 (3.0%)
+   Marian Balakowicz                 337 (0.8%)
+   Paul Gortmaker                    325 (0.7%)
+   Becky Bruce                       290 (0.7%)
+   Shinya Kuribayashi                145 (0.3%)
+   Ladislav Michl                    137 (0.3%)
+   Bernhard Nemec                    22 (0.1%)
+   Andy Fleming                      8 (0.0%)
+   michael.firth@bt.com              8 (0.0%)
+   Roy Zang                          3 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 127)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kim Phillips                      24 (18.9%)
+   Ben Warren                        17 (13.4%)
+   Stefan Roese                      14 (11.0%)
+   Kumar Gala                        5 (3.9%)
+   Jon Loeliger                      5 (3.9%)
+   Markus Klotzbuecher               4 (3.1%)
+   Ed Swarthout                      3 (2.4%)
+   Mahesh Jade                       3 (2.4%)
+   Jason Jin                         3 (2.4%)
+   Martin Krause                     3 (2.4%)
+   Jean-Christophe PLAGNIOL-VILLARD  3 (2.4%)
+   Andy Fleming                      2 (1.6%)
+   Joe D'Abbraccio                   2 (1.6%)
+   Rafal Zabdyr                      2 (1.6%)
+   Gerald Van Baren                  2 (1.6%)
+   Rodolfo Giometti                  2 (1.6%)
+   John Rigby                        2 (1.6%)
+   Rafal Jaworowski                  2 (1.6%)
+   Matthias Fuchs                    2 (1.6%)
+   Ladislav Michl                    1 (0.8%)
+   Andrew Morton                     1 (0.8%)
+   Olaf Hering                       1 (0.8%)
+   Michael Hennerich                 1 (0.8%)
+   Dmitry Rakhchev                   1 (0.8%)
+   James Mahan                       1 (0.8%)
+   Dirk Behme                        1 (0.8%)
+   Dmitry Ivanov                     1 (0.8%)
+   Kevin Lam                         1 (0.8%)
+   Michael Barkowski                 1 (0.8%)
+   Scott McNutt                      1 (0.8%)
+   Brian Miller                      1 (0.8%)
+   Piotr Kruszynski                  1 (0.8%)
+   Pravin M. Bathija                 1 (0.8%)
+   Tirumala R Marri                  1 (0.8%)
+   K R Gururaja Hebbar               1 (0.8%)
+   Joakim Tjernlund                  1 (0.8%)
+   Timur Tabi                        1 (0.8%)
+   Guennadi Liakhovetski             1 (0.8%)
+   Kyungmin Park                     1 (0.8%)
+   Haavard Skinnemoen                1 (0.8%)
+   Heiko Schocher                    1 (0.8%)
+   Dave Liu                          1 (0.8%)
+   Larry Johnson                     1 (0.8%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   Wolfgang Denk                     1 (0.8%)
+   Mike Frysinger                    1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         206 (27.7%)
+   Freescale                         191 (25.7%)
+   (Unknown)                         64 (8.6%)
+   jcrosoft                          37 (5.0%)
+   ESD Electronics                   35 (4.7%)
+   Analog Devices                    32 (4.3%)
+   Atmel                             28 (3.8%)
+   Nobuhiro Iwamatsu                 23 (3.1%)
+   Semihalf Embedded Systems         17 (2.3%)
+   ACM                               13 (1.7%)
+   TQ Systems                        12 (1.6%)
+   Netstal-Maschinen                 10 (1.3%)
+   Stelian Pop                       8 (1.1%)
+   Custom IDEAS                      7 (0.9%)
+   Openmoko                          7 (0.9%)
+   MontaVista                        6 (0.8%)
+   NEC                               6 (0.8%)
+   ARM                               5 (0.7%)
+   Wind River                        5 (0.7%)
+   Renesas Electronics               3 (0.4%)
+   Samsung                           3 (0.4%)
+   Funky                             3 (0.4%)
+   Advantech                         2 (0.3%)
+   Embedded Specialties              2 (0.3%)
+   EmCraft Systems                   2 (0.3%)
+   Ericsson                          2 (0.3%)
+   Sanyo LSI Technology India        2 (0.3%)
+   Terascala                         2 (0.3%)
+   Transmode Systems                 2 (0.3%)
+   Bluegiga Technologies             1 (0.1%)
+   BT Group                          1 (0.1%)
+   Digi International                1 (0.1%)
+   ECI Telecom                       1 (0.1%)
+   Ingenieurbuero Ganssloser         1 (0.1%)
+   Juniper Networks                  1 (0.1%)
+   Media Lab                         1 (0.1%)
+   Sysart Oy                         1 (0.1%)
+   Texas Instruments                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Analog Devices                    61912 (33.7%)
+   DENX Software Engineering         34164 (18.6%)
+   Freescale                         34101 (18.5%)
+   (Unknown)                         16949 (9.2%)
+   ESD Electronics                   9204 (5.0%)
+   Semihalf Embedded Systems         3568 (1.9%)
+   Nobuhiro Iwamatsu                 3532 (1.9%)
+   Atmel                             3000 (1.6%)
+   ARM                               2622 (1.4%)
+   Embedded Specialties              1654 (0.9%)
+   ACM                               1639 (0.9%)
+   Stelian Pop                       1480 (0.8%)
+   Renesas Electronics               1466 (0.8%)
+   Ericsson                          1455 (0.8%)
+   MontaVista                        1269 (0.7%)
+   Netstal-Maschinen                 1062 (0.6%)
+   Sysart Oy                         985 (0.5%)
+   Wind River                        827 (0.4%)
+   Samsung                           742 (0.4%)
+   jcrosoft                          613 (0.3%)
+   Openmoko                          487 (0.3%)
+   Funky                             467 (0.3%)
+   TQ Systems                        200 (0.1%)
+   NEC                               162 (0.1%)
+   Transmode Systems                 143 (0.1%)
+   Custom IDEAS                      66 (0.0%)
+   ECI Telecom                       45 (0.0%)
+   Ingenieurbuero Ganssloser         22 (0.0%)
+   Sanyo LSI Technology India        20 (0.0%)
+   BT Group                          20 (0.0%)
+   EmCraft Systems                   15 (0.0%)
+   Advantech                         13 (0.0%)
+   Digi International                9 (0.0%)
+   Terascala                         7 (0.0%)
+   Media Lab                         6 (0.0%)
+   Texas Instruments                 6 (0.0%)
+   Juniper Networks                  2 (0.0%)
+   Bluegiga Technologies             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 127)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         54 (42.5%)
+   (Unknown)                         23 (18.1%)
+   DENX Software Engineering         21 (16.5%)
+   Semihalf Embedded Systems         5 (3.9%)
+   jcrosoft                          3 (2.4%)
+   TQ Systems                        3 (2.4%)
+   Analog Devices                    2 (1.6%)
+   ESD Electronics                   2 (1.6%)
+   Custom IDEAS                      2 (1.6%)
+   AMCC                              2 (1.6%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   Atmel                             1 (0.8%)
+   ACM                               1 (0.8%)
+   Samsung                           1 (0.8%)
+   Transmode Systems                 1 (0.8%)
+   Sanyo LSI Technology India        1 (0.8%)
+   EmCraft Systems                   1 (0.8%)
+   Linux Foundation                  1 (0.8%)
+   Novell                            1 (0.8%)
+   Psyent                            1 (0.8%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 88)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         20 (22.7%)
+   Freescale                         17 (19.3%)
+   DENX Software Engineering         8 (9.1%)
+   Semihalf Embedded Systems         4 (4.5%)
+   TQ Systems                        2 (2.3%)
+   Custom IDEAS                      2 (2.3%)
+   Atmel                             2 (2.3%)
+   Wind River                        2 (2.3%)
+   Funky                             2 (2.3%)
+   jcrosoft                          1 (1.1%)
+   Analog Devices                    1 (1.1%)
+   ESD Electronics                   1 (1.1%)
+   Nobuhiro Iwamatsu                 1 (1.1%)
+   ACM                               1 (1.1%)
+   Samsung                           1 (1.1%)
+   Transmode Systems                 1 (1.1%)
+   Sanyo LSI Technology India        1 (1.1%)
+   EmCraft Systems                   1 (1.1%)
+   ARM                               1 (1.1%)
+   Embedded Specialties              1 (1.1%)
+   Stelian Pop                       1 (1.1%)
+   Renesas Electronics               1 (1.1%)
+   Ericsson                          1 (1.1%)
+   MontaVista                        1 (1.1%)
+   Netstal-Maschinen                 1 (1.1%)
+   Sysart Oy                         1 (1.1%)
+   Openmoko                          1 (1.1%)
+   NEC                               1 (1.1%)
+   ECI Telecom                       1 (1.1%)
+   Ingenieurbuero Ganssloser         1 (1.1%)
+   BT Group                          1 (1.1%)
+   Advantech                         1 (1.1%)
+   Digi International                1 (1.1%)
+   Terascala                         1 (1.1%)
+   Media Lab                         1 (1.1%)
+   Texas Instruments                 1 (1.1%)
+   Juniper Networks                  1 (1.1%)
+   Bluegiga Technologies             1 (1.1%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v1.3.3.rst b/doc/develop/statistics/u-boot-stats-v1.3.3.rst
new file mode 100644
index 00000000000..0464275424e
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v1.3.3.rst
@@ -0,0 +1,456 @@
+:orphan:
+
+Release Statistics for U-Boot v1.3.3
+====================================
+
+* Processed 646 changesets from 75 developers
+
+* 38 employers found
+
+* A total of 81810 lines added, 37342 removed (delta 44468)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marian Balakowicz                 68 (10.5%)
+   Wolfgang Denk                     63 (9.8%)
+   Stefan Roese                      63 (9.8%)
+   Kumar Gala                        35 (5.4%)
+   Jean-Christophe PLAGNIOL-VILLARD  28 (4.3%)
+   Yuri Tikhonov                     27 (4.2%)
+   Mike Frysinger                    21 (3.3%)
+   Shinya Kuribayashi                20 (3.1%)
+   Dave Liu                          19 (2.9%)
+   Guennadi Liakhovetski             18 (2.8%)
+   Bartlomiej Sieka                  18 (2.8%)
+   Anton Vorontsov                   18 (2.8%)
+   Matthias Fuchs                    15 (2.3%)
+   Michal Simek                      14 (2.2%)
+   Daniel Hellstrom                  14 (2.2%)
+   TsiChung Liew                     13 (2.0%)
+   Stelian Pop                       12 (1.9%)
+   Sascha Hauer                      12 (1.9%)
+   Nobuhiro Iwamatsu                 10 (1.5%)
+   Kim Phillips                      7 (1.1%)
+   Anatolij Gustschin                7 (1.1%)
+   Jon Loeliger                      7 (1.1%)
+   Sascha Laue                       6 (0.9%)
+   Yusuke Goda                       6 (0.9%)
+   David Gibson                      6 (0.9%)
+   James Yang                        5 (0.8%)
+   Detlev Zundel                     5 (0.8%)
+   Vlad Lungu                        5 (0.8%)
+   Andy Fleming                      5 (0.8%)
+   Timur Tabi                        5 (0.8%)
+   Michael Barkowski                 5 (0.8%)
+   Niklaus Giger                     5 (0.8%)
+   Markus Klotzbuecher               4 (0.6%)
+   Marcel Ziswiler                   4 (0.6%)
+   Magnus Lilja                      4 (0.6%)
+   Kyungmin Park                     4 (0.6%)
+   Grant Erickson                    3 (0.5%)
+   Andre Schwarz                     3 (0.5%)
+   Dirk Behme                        3 (0.5%)
+   Martin Krause                     3 (0.5%)
+   Joakim Tjernlund                  3 (0.5%)
+   Tor Krill                         3 (0.5%)
+   Jerry Van Baren                   3 (0.5%)
+   Larry Johnson                     3 (0.5%)
+   Pieter Voorthuijsen               3 (0.5%)
+   Nick Spence                       2 (0.3%)
+   Becky Bruce                       2 (0.3%)
+   Lee Nipper                        2 (0.3%)
+   Markus Brunner                    2 (0.3%)
+   Ulf Samuelsson                    2 (0.3%)
+   Matthew Fettke                    2 (0.3%)
+   David Brownell                    2 (0.3%)
+   Peter Pearse                      2 (0.3%)
+   Aras Vaichas                      2 (0.3%)
+   Mark Jonas                        2 (0.3%)
+   Bryan O'Donoghue                  2 (0.3%)
+   Adrian Filipi                     1 (0.2%)
+   Wheatley Travis                   1 (0.2%)
+   Ira Snyder                        1 (0.2%)
+   Dave Mitchell                     1 (0.2%)
+   Jeremy McNicoll                   1 (0.2%)
+   Ben Warren                        1 (0.2%)
+   Ed Swarthout                      1 (0.2%)
+   Roy Zang                          1 (0.2%)
+   Sergei Poselenov                  1 (0.2%)
+   Troy Kisky                        1 (0.2%)
+   Jason Wessel                      1 (0.2%)
+   Gururaja Hebbar K R               1 (0.2%)
+   eran liberty                      1 (0.2%)
+   Eugene O'Brien                    1 (0.2%)
+   Mike Nuss                         1 (0.2%)
+   Haavard Skinnemoen                1 (0.2%)
+   Joe D'Abbraccio                   1 (0.2%)
+   Scott Wood                        1 (0.2%)
+   Heiko Schocher                    1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Daniel Hellstrom                  15355 (15.5%)
+   Wolfgang Denk                     13136 (13.3%)
+   Mike Frysinger                    12077 (12.2%)
+   Marian Balakowicz                 10224 (10.3%)
+   Stefan Roese                      5181 (5.2%)
+   Sascha Hauer                      5161 (5.2%)
+   Matthias Fuchs                    4604 (4.6%)
+   Dave Liu                          3701 (3.7%)
+   Guennadi Liakhovetski             3447 (3.5%)
+   Yusuke Goda                       3133 (3.2%)
+   Stelian Pop                       2669 (2.7%)
+   Yuri Tikhonov                     2635 (2.7%)
+   Matthew Fettke                    1823 (1.8%)
+   Kumar Gala                        1799 (1.8%)
+   TsiChung Liew                     1477 (1.5%)
+   Niklaus Giger                     1438 (1.5%)
+   Shinya Kuribayashi                1189 (1.2%)
+   Michal Simek                      980 (1.0%)
+   Bartlomiej Sieka                  927 (0.9%)
+   Nobuhiro Iwamatsu                 869 (0.9%)
+   Jean-Christophe PLAGNIOL-VILLARD  759 (0.8%)
+   Pieter Voorthuijsen               688 (0.7%)
+   Mark Jonas                        645 (0.7%)
+   Anton Vorontsov                   517 (0.5%)
+   Larry Johnson                     507 (0.5%)
+   Timur Tabi                        462 (0.5%)
+   Kim Phillips                      437 (0.4%)
+   David Gibson                      427 (0.4%)
+   eran liberty                      324 (0.3%)
+   Jerry Van Baren                   283 (0.3%)
+   Tor Krill                         257 (0.3%)
+   Jason Wessel                      233 (0.2%)
+   Andy Fleming                      206 (0.2%)
+   Ulf Samuelsson                    150 (0.2%)
+   Detlev Zundel                     121 (0.1%)
+   Michael Barkowski                 118 (0.1%)
+   Andre Schwarz                     115 (0.1%)
+   Mike Nuss                         99 (0.1%)
+   Dirk Behme                        97 (0.1%)
+   Bryan O'Donoghue                  93 (0.1%)
+   Kyungmin Park                     82 (0.1%)
+   James Yang                        73 (0.1%)
+   Vlad Lungu                        72 (0.1%)
+   Sascha Laue                       54 (0.1%)
+   Jon Loeliger                      53 (0.1%)
+   Grant Erickson                    33 (0.0%)
+   Joakim Tjernlund                  33 (0.0%)
+   Ira Snyder                        32 (0.0%)
+   Magnus Lilja                      30 (0.0%)
+   Anatolij Gustschin                27 (0.0%)
+   Markus Klotzbuecher               27 (0.0%)
+   Aras Vaichas                      25 (0.0%)
+   Martin Krause                     22 (0.0%)
+   Wheatley Travis                   21 (0.0%)
+   Nick Spence                       12 (0.0%)
+   Lee Nipper                        12 (0.0%)
+   Becky Bruce                       10 (0.0%)
+   David Brownell                    10 (0.0%)
+   Markus Brunner                    9 (0.0%)
+   Troy Kisky                        9 (0.0%)
+   Marcel Ziswiler                   8 (0.0%)
+   Eugene O'Brien                    8 (0.0%)
+   Sergei Poselenov                  7 (0.0%)
+   Scott Wood                        5 (0.0%)
+   Haavard Skinnemoen                4 (0.0%)
+   Adrian Filipi                     3 (0.0%)
+   Jeremy McNicoll                   3 (0.0%)
+   Heiko Schocher                    3 (0.0%)
+   Peter Pearse                      2 (0.0%)
+   Dave Mitchell                     1 (0.0%)
+   Ben Warren                        1 (0.0%)
+   Ed Swarthout                      1 (0.0%)
+   Roy Zang                          1 (0.0%)
+   Gururaja Hebbar K R               1 (0.0%)
+   Joe D'Abbraccio                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    7579 (20.3%)
+   Matthias Fuchs                    443 (1.2%)
+   TsiChung Liew                     379 (1.0%)
+   Jason Wessel                      233 (0.6%)
+   Kim Phillips                      218 (0.6%)
+   Jerry Van Baren                   186 (0.5%)
+   David Gibson                      53 (0.1%)
+   Dirk Behme                        49 (0.1%)
+   Markus Klotzbuecher               13 (0.0%)
+   Eugene O'Brien                    7 (0.0%)
+   Nick Spence                       6 (0.0%)
+   Marcel Ziswiler                   3 (0.0%)
+   Troy Kisky                        1 (0.0%)
+   Adrian Filipi                     1 (0.0%)
+   Heiko Schocher                    1 (0.0%)
+   Gururaja Hebbar K R               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 117)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Dmitry Rakhchev                   15 (12.8%)
+   Kim Phillips                      14 (12.0%)
+   Guennadi Liakhovetski             13 (11.1%)
+   Ben Warren                        12 (10.3%)
+   Kumar Gala                        9 (7.7%)
+   Wolfgang Denk                     9 (7.7%)
+   Nobuhiro Iwamatsu                 6 (5.1%)
+   Stefan Roese                      5 (4.3%)
+   Gerald Van Baren                  4 (3.4%)
+   Jean-Christophe PLAGNIOL-VILLARD  3 (2.6%)
+   TsiChung Liew                     2 (1.7%)
+   Markus Klotzbuecher               2 (1.7%)
+   Bartlomiej Sieka                  2 (1.7%)
+   Mike Frysinger                    1 (0.9%)
+   Jerry Van Baren                   1 (0.9%)
+   Ebony Zhu                         1 (0.9%)
+   Luigi Comio Mantellini            1 (0.9%)
+   Kurt Mahan                        1 (0.9%)
+   Dejan Minic                       1 (0.9%)
+   Srikanth Srinivasan               1 (0.9%)
+   Michael Hennerich                 1 (0.9%)
+   Eran Liberty                      1 (0.9%)
+   Zachary P. Landau                 1 (0.9%)
+   Matt Wadel                        1 (0.9%)
+   Jon Loeliger                      1 (0.9%)
+   Markus Brunner                    1 (0.9%)
+   Sergei Poselenov                  1 (0.9%)
+   Detlev Zundel                     1 (0.9%)
+   Vlad Lungu                        1 (0.9%)
+   Andy Fleming                      1 (0.9%)
+   Tor Krill                         1 (0.9%)
+   Shinya Kuribayashi                1 (0.9%)
+   Yuri Tikhonov                     1 (0.9%)
+   Dave Liu                          1 (0.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kim Phillips                      1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         171 (26.5%)
+   Freescale                         112 (17.3%)
+   Semihalf Embedded Systems         86 (13.3%)
+   (Unknown)                         59 (9.1%)
+   jcrosoft                          28 (4.3%)
+   Analog Devices                    21 (3.3%)
+   MontaVista                        18 (2.8%)
+   ESD Electronics                   15 (2.3%)
+   Gaisler Research                  14 (2.2%)
+   Xilinx                            14 (2.2%)
+   EmCraft Systems                   12 (1.9%)
+   Pengutronix                       12 (1.9%)
+   Stelian Pop                       12 (1.9%)
+   Nobuhiro Iwamatsu                 10 (1.5%)
+   Wind River                        7 (1.1%)
+   Renesas Electronics               6 (0.9%)
+   Netstal-Maschinen                 5 (0.8%)
+   Samsung                           4 (0.6%)
+   ACM                               3 (0.5%)
+   Atmel                             3 (0.5%)
+   Custom IDEAS                      3 (0.5%)
+   Excito Elektronik                 3 (0.5%)
+   Matrix Vision                     3 (0.5%)
+   Nuovation System Designs          3 (0.5%)
+   TQ Systems                        3 (0.5%)
+   Transmode Systems                 3 (0.5%)
+   ARM                               2 (0.3%)
+   MagTech Systems                   2 (0.3%)
+   NEC                               2 (0.3%)
+   Dirk Behme                        2 (0.3%)
+   Advantech                         1 (0.2%)
+   AMCC                              1 (0.2%)
+   Boundary Devices                  1 (0.2%)
+   EuroTech                          1 (0.2%)
+   OVRO                              1 (0.2%)
+   Prodrive                          1 (0.2%)
+   Sanyo LSI Technology India        1 (0.2%)
+   Terascala                         1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         22112 (22.3%)
+   Gaisler Research                  15355 (15.5%)
+   Analog Devices                    12077 (12.2%)
+   Semihalf Embedded Systems         11151 (11.3%)
+   Freescale                         8389 (8.5%)
+   (Unknown)                         7280 (7.3%)
+   Pengutronix                       5161 (5.2%)
+   ESD Electronics                   4604 (4.6%)
+   Renesas Electronics               3133 (3.2%)
+   Stelian Pop                       2669 (2.7%)
+   Netstal-Maschinen                 1438 (1.5%)
+   Xilinx                            980 (1.0%)
+   Nobuhiro Iwamatsu                 869 (0.9%)
+   jcrosoft                          759 (0.8%)
+   MontaVista                        517 (0.5%)
+   ACM                               507 (0.5%)
+   EmCraft Systems                   495 (0.5%)
+   Wind River                        308 (0.3%)
+   Custom IDEAS                      283 (0.3%)
+   Excito Elektronik                 257 (0.3%)
+   Atmel                             154 (0.2%)
+   Matrix Vision                     115 (0.1%)
+   Terascala                         99 (0.1%)
+   Samsung                           82 (0.1%)
+   Dirk Behme                        50 (0.1%)
+   NEC                               35 (0.0%)
+   Nuovation System Designs          33 (0.0%)
+   Transmode Systems                 33 (0.0%)
+   OVRO                              32 (0.0%)
+   MagTech Systems                   25 (0.0%)
+   TQ Systems                        22 (0.0%)
+   Prodrive                          10 (0.0%)
+   Boundary Devices                  9 (0.0%)
+   Advantech                         8 (0.0%)
+   EuroTech                          3 (0.0%)
+   ARM                               2 (0.0%)
+   AMCC                              1 (0.0%)
+   Sanyo LSI Technology India        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 117)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         33 (28.2%)
+   DENX Software Engineering         30 (25.6%)
+   EmCraft Systems                   17 (14.5%)
+   (Unknown)                         14 (12.0%)
+   Nobuhiro Iwamatsu                 6 (5.1%)
+   Custom IDEAS                      4 (3.4%)
+   jcrosoft                          3 (2.6%)
+   Analog Devices                    2 (1.7%)
+   Semihalf Embedded Systems         2 (1.7%)
+   Wind River                        1 (0.9%)
+   Excito Elektronik                 1 (0.9%)
+   Extricom                          1 (0.9%)
+   General Electric                  1 (0.9%)
+   Industrie Dial Face               1 (0.9%)
+   Lab X Technologies                1 (0.9%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 80)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         17 (21.2%)
+   (Unknown)                         15 (18.8%)
+   DENX Software Engineering         8 (10.0%)
+   Wind River                        3 (3.8%)
+   EmCraft Systems                   2 (2.5%)
+   Semihalf Embedded Systems         2 (2.5%)
+   Atmel                             2 (2.5%)
+   Nobuhiro Iwamatsu                 1 (1.2%)
+   Custom IDEAS                      1 (1.2%)
+   jcrosoft                          1 (1.2%)
+   Analog Devices                    1 (1.2%)
+   Excito Elektronik                 1 (1.2%)
+   Gaisler Research                  1 (1.2%)
+   Pengutronix                       1 (1.2%)
+   ESD Electronics                   1 (1.2%)
+   Renesas Electronics               1 (1.2%)
+   Stelian Pop                       1 (1.2%)
+   Netstal-Maschinen                 1 (1.2%)
+   Xilinx                            1 (1.2%)
+   MontaVista                        1 (1.2%)
+   ACM                               1 (1.2%)
+   Matrix Vision                     1 (1.2%)
+   Terascala                         1 (1.2%)
+   Samsung                           1 (1.2%)
+   Dirk Behme                        1 (1.2%)
+   NEC                               1 (1.2%)
+   Nuovation System Designs          1 (1.2%)
+   Transmode Systems                 1 (1.2%)
+   OVRO                              1 (1.2%)
+   MagTech Systems                   1 (1.2%)
+   TQ Systems                        1 (1.2%)
+   Prodrive                          1 (1.2%)
+   Boundary Devices                  1 (1.2%)
+   Advantech                         1 (1.2%)
+   EuroTech                          1 (1.2%)
+   ARM                               1 (1.2%)
+   AMCC                              1 (1.2%)
+   Sanyo LSI Technology India        1 (1.2%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v1.3.4.rst b/doc/develop/statistics/u-boot-stats-v1.3.4.rst
new file mode 100644
index 00000000000..33ef9895f00
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v1.3.4.rst
@@ -0,0 +1,508 @@
+:orphan:
+
+Release Statistics for U-Boot v1.3.4
+====================================
+
+* Processed 511 changesets from 86 developers
+
+* 46 employers found
+
+* A total of 52636 lines added, 31679 removed (delta 20957)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     56 (11.0%)
+   Stefan Roese                      34 (6.7%)
+   Haavard Skinnemoen                33 (6.5%)
+   Kumar Gala                        27 (5.3%)
+   Stelian Pop                       27 (5.3%)
+   Nobuhiro Iwamatsu                 21 (4.1%)
+   Wolfgang Grandegger               19 (3.7%)
+   Jean-Christophe PLAGNIOL-VILLARD  18 (3.5%)
+   TsiChung Liew                     18 (3.5%)
+   Sergei Poselenov                  17 (3.3%)
+   Becky Bruce                       15 (2.9%)
+   Shinya Kuribayashi                12 (2.3%)
+   Andy Fleming                      11 (2.2%)
+   Remy Bohmer                       10 (2.0%)
+   Hugo Villeneuve                   10 (2.0%)
+   Andre Schwarz                     8 (1.6%)
+   Paul Gortmaker                    8 (1.6%)
+   Michal Simek                      7 (1.4%)
+   Yuri Tikhonov                     7 (1.4%)
+   Scott Wood                        6 (1.2%)
+   Kim Phillips                      6 (1.2%)
+   Gerald Van Baren                  6 (1.2%)
+   Anatolij Gustschin                5 (1.0%)
+   Marcel Ziswiler                   5 (1.0%)
+   Christian Eggers                  5 (1.0%)
+   York Sun                          5 (1.0%)
+   Magnus Lilja                      4 (0.8%)
+   Matvejchikov Ilya                 4 (0.8%)
+   Kyungmin Park                     4 (0.8%)
+   Rafal Jaworowski                  4 (0.8%)
+   Detlev Zundel                     4 (0.8%)
+   Jason McMullan                    4 (0.8%)
+   Anton Vorontsov                   4 (0.8%)
+   Grant Erickson                    4 (0.8%)
+   Ben Warren                        3 (0.6%)
+   Gururaja Hebbar K R               3 (0.6%)
+   Steven A. Falco                   3 (0.6%)
+   Kenneth Johansson                 3 (0.6%)
+   Mark Jackson                      3 (0.6%)
+   Harald Welte                      3 (0.6%)
+   Gary Jennejohn                    3 (0.6%)
+   Stuart Wood                       3 (0.6%)
+   Tor Krill                         3 (0.6%)
+   Dirk Behme                        2 (0.4%)
+   Peter Tyser                       2 (0.4%)
+   Sergey Lapin                      2 (0.4%)
+   John Rigby                        2 (0.4%)
+   Timur Tabi                        2 (0.4%)
+   Sebastian Siewior                 2 (0.4%)
+   Andrew Klossner                   2 (0.4%)
+   Martha Marx                       2 (0.4%)
+   Larry Johnson                     2 (0.4%)
+   Marian Balakowicz                 2 (0.4%)
+   Sascha Laue                       2 (0.4%)
+   Vasiliy Leoenenko                 2 (0.4%)
+   David Brownell                    2 (0.4%)
+   Jens Gehrlein                     1 (0.2%)
+   Steve Sakoman                     1 (0.2%)
+   Roy Zang                          1 (0.2%)
+   David Saada                       1 (0.2%)
+   Yoshihiro Shimoda                 1 (0.2%)
+   Markus Klotzbuecher               1 (0.2%)
+   Hunter, Jon                       1 (0.2%)
+   Guennadi Liakhovetski             1 (0.2%)
+   Frank Svendsbøe                   1 (0.2%)
+   Stefano Babic                     1 (0.2%)
+   Heiko Schocher                    1 (0.2%)
+   Adrian Filipi                     1 (0.2%)
+   Wolfgang Ocker                    1 (0.2%)
+   Ricardo Ribalda                   1 (0.2%)
+   Niklaus Giger                     1 (0.2%)
+   Juergen Kilb                      1 (0.2%)
+   Robin Getz                        1 (0.2%)
+   Jon Loeliger                      1 (0.2%)
+   Dave Liu                          1 (0.2%)
+   Daniel Hellstrom                  1 (0.2%)
+   Joakim Tjernlund                  1 (0.2%)
+   Jason Jin                         1 (0.2%)
+   Patrice Vilchez                   1 (0.2%)
+   Esben Haabendal                   1 (0.2%)
+   Philip Balister                   1 (0.2%)
+   Peter Ma                          1 (0.2%)
+   David Gibson                      1 (0.2%)
+   Matthias Fuchs                    1 (0.2%)
+   Hans-Christian Egtvedt            1 (0.2%)
+   Ron Madrid                        1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     22067 (35.6%)
+   Stefan Roese                      6880 (11.1%)
+   Stelian Pop                       3760 (6.1%)
+   Haavard Skinnemoen                2754 (4.4%)
+   Andre Schwarz                     2398 (3.9%)
+   Nobuhiro Iwamatsu                 2064 (3.3%)
+   Wolfgang Grandegger               2042 (3.3%)
+   Shinya Kuribayashi                1721 (2.8%)
+   Sergei Poselenov                  1706 (2.7%)
+   Yoshihiro Shimoda                 1589 (2.6%)
+   Adrian Filipi                     1320 (2.1%)
+   Kumar Gala                        1196 (1.9%)
+   Grant Erickson                    1196 (1.9%)
+   Hugo Villeneuve                   1193 (1.9%)
+   Tor Krill                         990 (1.6%)
+   Michal Simek                      795 (1.3%)
+   Becky Bruce                       786 (1.3%)
+   Gary Jennejohn                    690 (1.1%)
+   Gerald Van Baren                  642 (1.0%)
+   Anton Vorontsov                   602 (1.0%)
+   Jean-Christophe PLAGNIOL-VILLARD  441 (0.7%)
+   Timur Tabi                        407 (0.7%)
+   Martha Marx                       389 (0.6%)
+   Kenneth Johansson                 382 (0.6%)
+   Hans-Christian Egtvedt            360 (0.6%)
+   York Sun                          344 (0.6%)
+   Remy Bohmer                       304 (0.5%)
+   Kim Phillips                      254 (0.4%)
+   Andy Fleming                      191 (0.3%)
+   Jason McMullan                    167 (0.3%)
+   Scott Wood                        158 (0.3%)
+   Yuri Tikhonov                     157 (0.3%)
+   Ben Warren                        139 (0.2%)
+   John Rigby                        133 (0.2%)
+   Paul Gortmaker                    129 (0.2%)
+   Stuart Wood                       108 (0.2%)
+   Rafal Jaworowski                  94 (0.2%)
+   Matthias Fuchs                    93 (0.1%)
+   Marian Balakowicz                 89 (0.1%)
+   Larry Johnson                     86 (0.1%)
+   Matvejchikov Ilya                 85 (0.1%)
+   Marcel Ziswiler                   81 (0.1%)
+   Christian Eggers                  81 (0.1%)
+   Jon Loeliger                      75 (0.1%)
+   Peter Ma                          64 (0.1%)
+   Harald Welte                      59 (0.1%)
+   TsiChung Liew                     58 (0.1%)
+   David Gibson                      55 (0.1%)
+   David Saada                       53 (0.1%)
+   Anatolij Gustschin                52 (0.1%)
+   Magnus Lilja                      52 (0.1%)
+   Sascha Laue                       52 (0.1%)
+   Vasiliy Leoenenko                 36 (0.1%)
+   Jens Gehrlein                     34 (0.1%)
+   Jason Jin                         32 (0.1%)
+   Ron Madrid                        31 (0.0%)
+   Sergey Lapin                      30 (0.0%)
+   Andrew Klossner                   29 (0.0%)
+   Hunter, Jon                       25 (0.0%)
+   Heiko Schocher                    24 (0.0%)
+   Kyungmin Park                     22 (0.0%)
+   Mark Jackson                      22 (0.0%)
+   Steven A. Falco                   21 (0.0%)
+   Markus Klotzbuecher               18 (0.0%)
+   Dirk Behme                        16 (0.0%)
+   Patrice Vilchez                   16 (0.0%)
+   Detlev Zundel                     15 (0.0%)
+   Joakim Tjernlund                  15 (0.0%)
+   David Brownell                    13 (0.0%)
+   Gururaja Hebbar K R               12 (0.0%)
+   Sebastian Siewior                 8 (0.0%)
+   Dave Liu                          8 (0.0%)
+   Peter Tyser                       7 (0.0%)
+   Ricardo Ribalda                   5 (0.0%)
+   Esben Haabendal                   5 (0.0%)
+   Steve Sakoman                     4 (0.0%)
+   Roy Zang                          4 (0.0%)
+   Guennadi Liakhovetski             3 (0.0%)
+   Daniel Hellstrom                  3 (0.0%)
+   Stefano Babic                     2 (0.0%)
+   Niklaus Giger                     2 (0.0%)
+   Juergen Kilb                      2 (0.0%)
+   Robin Getz                        2 (0.0%)
+   Philip Balister                   2 (0.0%)
+   Frank Svendsbøe                   1 (0.0%)
+   Wolfgang Ocker                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      3095 (9.8%)
+   Adrian Filipi                     1320 (4.2%)
+   Michal Simek                      676 (2.1%)
+   Gerald Van Baren                  569 (1.8%)
+   Matthias Fuchs                    93 (0.3%)
+   Kumar Gala                        79 (0.2%)
+   Jon Loeliger                      75 (0.2%)
+   Kenneth Johansson                 53 (0.2%)
+   Harald Welte                      25 (0.1%)
+   David Gibson                      11 (0.0%)
+   Peter Tyser                       6 (0.0%)
+   Kyungmin Park                     5 (0.0%)
+   Heiko Schocher                    2 (0.0%)
+   Dirk Behme                        2 (0.0%)
+   Gururaja Hebbar K R               2 (0.0%)
+   Steve Sakoman                     2 (0.0%)
+   Robin Getz                        2 (0.0%)
+   Guennadi Liakhovetski             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 133)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jean-Christophe PLAGNIOL-VILLARD  30 (22.6%)
+   Ben Warren                        21 (15.8%)
+   Kim Phillips                      8 (6.0%)
+   Andy Fleming                      7 (5.3%)
+   Stefan Roese                      6 (4.5%)
+   Ilya Yanok                        6 (4.5%)
+   Markus Klotzbuecher               5 (3.8%)
+   Scott Wood                        5 (3.8%)
+   Rafal Czubak                      4 (3.0%)
+   Martin Krause                     4 (3.0%)
+   Thomas Waehner                    4 (3.0%)
+   Shinya Kuribayashi                4 (3.0%)
+   Haavard Skinnemoen                4 (3.0%)
+   Kurt Mahan                        3 (2.3%)
+   Wolfgang Denk                     3 (2.3%)
+   Alexey Korolev                    2 (1.5%)
+   Dirk Behme                        1 (0.8%)
+   Steve Sakoman                     1 (0.8%)
+   Manikandan Pillai                 1 (0.8%)
+   Ricardo Ribalda Delgado           1 (0.8%)
+   Grant Likely                      1 (0.8%)
+   Manuel Sahm                       1 (0.8%)
+   John Roberts                      1 (0.8%)
+   Philip Balister, OpenSDR          1 (0.8%)
+   Werner Almesberger                1 (0.8%)
+   Francesco Albanese                1 (0.8%)
+   Juergen Kilb                      1 (0.8%)
+   Philip Balister                   1 (0.8%)
+   Dave Liu                          1 (0.8%)
+   Jens Gehrlein                     1 (0.8%)
+   Timur Tabi                        1 (0.8%)
+   Sergei Poselenov                  1 (0.8%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Guennadi Liakhovetski             1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Haavard Skinnemoen                1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Gururaja Hebbar K R               1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Haavard Skinnemoen                1 (100.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         124 (24.3%)
+   Freescale                         96 (18.8%)
+   (Unknown)                         50 (9.8%)
+   Atmel                             35 (6.8%)
+   Stelian Pop                       27 (5.3%)
+   EmCraft Systems                   24 (4.7%)
+   jcrosoft                          18 (3.5%)
+   Renesas Electronics               17 (3.3%)
+   Lyrtech                           10 (2.0%)
+   Oce Technologies                  10 (2.0%)
+   Wind River                        8 (1.6%)
+   Matrix Vision                     8 (1.6%)
+   Xilinx                            7 (1.4%)
+   Custom IDEAS                      6 (1.2%)
+   Semihalf Embedded Systems         6 (1.2%)
+   Nobuhiro Iwamatsu                 5 (1.0%)
+   MontaVista                        4 (0.8%)
+   NetApp                            4 (0.8%)
+   Nuovation System Designs          4 (0.8%)
+   Samsung                           4 (0.8%)
+   Excito Elektronik                 3 (0.6%)
+   Harris Corporation                3 (0.6%)
+   Lab X Technologies                3 (0.6%)
+   Mercury IMC Ltd.                  3 (0.6%)
+   Sanyo LSI Technology India        3 (0.6%)
+   South Pole AB                     3 (0.6%)
+   ACM                               2 (0.4%)
+   Xerox                             2 (0.4%)
+   Liebherr                          2 (0.4%)
+   linutronix                        2 (0.4%)
+   Silicon Turnkey Express           2 (0.4%)
+   Extreme Engineering Solutions     2 (0.4%)
+   Analog Devices                    1 (0.2%)
+   ECI Telecom                       1 (0.2%)
+   ESD Electronics                   1 (0.2%)
+   EuroTech                          1 (0.2%)
+   Gaisler Research                  1 (0.2%)
+   Mediama Technologies              1 (0.2%)
+   Netstal-Maschinen                 1 (0.2%)
+   Reccoware Systems                 1 (0.2%)
+   Sakoman Inc.                      1 (0.2%)
+   Texas Instruments                 1 (0.2%)
+   TQ Systems                        1 (0.2%)
+   Transmode Systems                 1 (0.2%)
+   Dirk Behme                        1 (0.2%)
+   Sheldon Instruments               1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         31112 (50.1%)
+   Stelian Pop                       3760 (6.1%)
+   Freescale                         3646 (5.9%)
+   Renesas Electronics               3616 (5.8%)
+   Atmel                             3130 (5.0%)
+   (Unknown)                         3055 (4.9%)
+   Matrix Vision                     2398 (3.9%)
+   EmCraft Systems                   1863 (3.0%)
+   EuroTech                          1320 (2.1%)
+   Nuovation System Designs          1196 (1.9%)
+   Lyrtech                           1193 (1.9%)
+   Excito Elektronik                 990 (1.6%)
+   Xilinx                            795 (1.3%)
+   Custom IDEAS                      642 (1.0%)
+   MontaVista                        602 (1.0%)
+   jcrosoft                          441 (0.7%)
+   Silicon Turnkey Express           389 (0.6%)
+   South Pole AB                     382 (0.6%)
+   Oce Technologies                  304 (0.5%)
+   Semihalf Embedded Systems         183 (0.3%)
+   NetApp                            167 (0.3%)
+   Wind River                        129 (0.2%)
+   Lab X Technologies                108 (0.2%)
+   ESD Electronics                   93 (0.1%)
+   ACM                               86 (0.1%)
+   Mediama Technologies              64 (0.1%)
+   ECI Telecom                       53 (0.1%)
+   Liebherr                          52 (0.1%)
+   Nobuhiro Iwamatsu                 37 (0.1%)
+   TQ Systems                        34 (0.1%)
+   Sheldon Instruments               31 (0.0%)
+   Xerox                             29 (0.0%)
+   Texas Instruments                 25 (0.0%)
+   Samsung                           22 (0.0%)
+   Mercury IMC Ltd.                  22 (0.0%)
+   Harris Corporation                21 (0.0%)
+   Transmode Systems                 15 (0.0%)
+   Sanyo LSI Technology India        12 (0.0%)
+   Dirk Behme                        9 (0.0%)
+   linutronix                        8 (0.0%)
+   Extreme Engineering Solutions     7 (0.0%)
+   Sakoman Inc.                      4 (0.0%)
+   Gaisler Research                  3 (0.0%)
+   Analog Devices                    2 (0.0%)
+   Netstal-Maschinen                 2 (0.0%)
+   Reccoware Systems                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 133)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         31 (23.3%)
+   jcrosoft                          30 (22.6%)
+   Freescale                         25 (18.8%)
+   DENX Software Engineering         14 (10.5%)
+   TQ Systems                        9 (6.8%)
+   EmCraft Systems                   7 (5.3%)
+   Atmel                             4 (3.0%)
+   Semihalf Embedded Systems         4 (3.0%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   Texas Instruments                 1 (0.8%)
+   Sakoman Inc.                      1 (0.8%)
+   Feig Electronic                   1 (0.8%)
+   Openmoko                          1 (0.8%)
+   OpenSDR                           1 (0.8%)
+   Powerwave Technologies            1 (0.8%)
+   Secretlab                         1 (0.8%)
+   Universidad Autonoma de Madrid    1 (0.8%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 89)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         18 (20.2%)
+   Freescale                         13 (14.6%)
+   DENX Software Engineering         10 (11.2%)
+   Atmel                             3 (3.4%)
+   EmCraft Systems                   2 (2.2%)
+   Semihalf Embedded Systems         2 (2.2%)
+   Renesas Electronics               2 (2.2%)
+   jcrosoft                          1 (1.1%)
+   TQ Systems                        1 (1.1%)
+   Nobuhiro Iwamatsu                 1 (1.1%)
+   Texas Instruments                 1 (1.1%)
+   Sakoman Inc.                      1 (1.1%)
+   Stelian Pop                       1 (1.1%)
+   Matrix Vision                     1 (1.1%)
+   EuroTech                          1 (1.1%)
+   Nuovation System Designs          1 (1.1%)
+   Lyrtech                           1 (1.1%)
+   Excito Elektronik                 1 (1.1%)
+   Xilinx                            1 (1.1%)
+   Custom IDEAS                      1 (1.1%)
+   MontaVista                        1 (1.1%)
+   Silicon Turnkey Express           1 (1.1%)
+   South Pole AB                     1 (1.1%)
+   Oce Technologies                  1 (1.1%)
+   NetApp                            1 (1.1%)
+   Wind River                        1 (1.1%)
+   Lab X Technologies                1 (1.1%)
+   ESD Electronics                   1 (1.1%)
+   ACM                               1 (1.1%)
+   Mediama Technologies              1 (1.1%)
+   ECI Telecom                       1 (1.1%)
+   Liebherr                          1 (1.1%)
+   Sheldon Instruments               1 (1.1%)
+   Xerox                             1 (1.1%)
+   Samsung                           1 (1.1%)
+   Mercury IMC Ltd.                  1 (1.1%)
+   Harris Corporation                1 (1.1%)
+   Transmode Systems                 1 (1.1%)
+   Sanyo LSI Technology India        1 (1.1%)
+   Dirk Behme                        1 (1.1%)
+   linutronix                        1 (1.1%)
+   Extreme Engineering Solutions     1 (1.1%)
+   Gaisler Research                  1 (1.1%)
+   Analog Devices                    1 (1.1%)
+   Netstal-Maschinen                 1 (1.1%)
+   Reccoware Systems                 1 (1.1%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2008.10.rst b/doc/develop/statistics/u-boot-stats-v2008.10.rst
new file mode 100644
index 00000000000..0370c707455
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2008.10.rst
@@ -0,0 +1,897 @@
+:orphan:
+
+Release Statistics for U-Boot v2008.10
+======================================
+
+* Processed 2498 changesets from 174 developers
+
+* 85 employers found
+
+* A total of 402101 lines added, 156903 removed (delta 245198)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      245 (9.8%)
+   Wolfgang Denk                     211 (8.4%)
+   Kumar Gala                        185 (7.4%)
+   Jean-Christophe PLAGNIOL-VILLARD  175 (7.0%)
+   Nobuhiro Iwamatsu                 78 (3.1%)
+   TsiChung Liew                     78 (3.1%)
+   Marian Balakowicz                 74 (3.0%)
+   Matthias Fuchs                    73 (2.9%)
+   Haavard Skinnemoen                67 (2.7%)
+   Mike Frysinger                    56 (2.2%)
+   Stelian Pop                       49 (2.0%)
+   Shinya Kuribayashi                46 (1.8%)
+   Dave Liu                          42 (1.7%)
+   Yuri Tikhonov                     39 (1.6%)
+   Guennadi Liakhovetski             39 (1.6%)
+   Kim Phillips                      37 (1.5%)
+   Jon Loeliger                      37 (1.5%)
+   Anton Vorontsov                   37 (1.5%)
+   Larry Johnson                     37 (1.5%)
+   Ben Warren                        35 (1.4%)
+   Anatolij Gustschin                31 (1.2%)
+   Heiko Schocher                    27 (1.1%)
+   Andy Fleming                      27 (1.1%)
+   Becky Bruce                       25 (1.0%)
+   Michal Simek                      24 (1.0%)
+   Sergei Poselenov                  23 (0.9%)
+   Scott Wood                        22 (0.9%)
+   Bartlomiej Sieka                  21 (0.8%)
+   Wolfgang Grandegger               20 (0.8%)
+   Niklaus Giger                     19 (0.8%)
+   Hugo Villeneuve                   18 (0.7%)
+   David Gibson                      16 (0.6%)
+   Timur Tabi                        16 (0.6%)
+   Andre Schwarz                     15 (0.6%)
+   Gerald Van Baren                  15 (0.6%)
+   Remy Bohmer                       15 (0.6%)
+   Kyungmin Park                     15 (0.6%)
+   Daniel Hellstrom                  15 (0.6%)
+   Ricardo Ribalda                   14 (0.6%)
+   Detlev Zundel                     13 (0.5%)
+   Harald Welte                      12 (0.5%)
+   Marcel Ziswiler                   12 (0.5%)
+   Grant Erickson                    12 (0.5%)
+   Sascha Hauer                      12 (0.5%)
+   Gururaja Hebbar K R               11 (0.4%)
+   Rafal Jaworowski                  11 (0.4%)
+   Grant Likely                      11 (0.4%)
+   Paul Gortmaker                    11 (0.4%)
+   Peter Tyser                       10 (0.4%)
+   Nick Spence                       10 (0.4%)
+   Magnus Lilja                      10 (0.4%)
+   William Juul                      10 (0.4%)
+   Martin Krause                     10 (0.4%)
+   Michael Schwingen                 10 (0.4%)
+   Jason Jin                         9 (0.4%)
+   James Yang                        9 (0.4%)
+   Markus Klotzbuecher               9 (0.4%)
+   York Sun                          9 (0.4%)
+   Sascha Laue                       8 (0.3%)
+   Yoshihiro Shimoda                 7 (0.3%)
+   John Rigby                        7 (0.3%)
+   Jens Gehrlein                     7 (0.3%)
+   Vlad Lungu                        7 (0.3%)
+   Peter Pearse                      7 (0.3%)
+   Steven A. Falco                   6 (0.2%)
+   Joakim Tjernlund                  6 (0.2%)
+   Tor Krill                         6 (0.2%)
+   Yusuke Goda                       6 (0.2%)
+   Haiying Wang                      5 (0.2%)
+   Andrew Dyer                       5 (0.2%)
+   Mark Jackson                      5 (0.2%)
+   Dirk Behme                        5 (0.2%)
+   Christian Eggers                  5 (0.2%)
+   Michael Barkowski                 5 (0.2%)
+   Grzegorz Bernacki                 5 (0.2%)
+   Victor Gallardo                   4 (0.2%)
+   Jason McMullan                    4 (0.2%)
+   Andreas Engel                     4 (0.2%)
+   Ira W. Snyder                     4 (0.2%)
+   Roy Zang                          4 (0.2%)
+   Matvejchikov Ilya                 4 (0.2%)
+   Stefano Babic                     4 (0.2%)
+   David Brownell                    4 (0.2%)
+   Jerry Van Baren                   4 (0.2%)
+   Ed Swarthout                      3 (0.1%)
+   Adam Graham                       3 (0.1%)
+   Gary Jennejohn                    3 (0.1%)
+   Adrian Filipi                     3 (0.1%)
+   Andrew Klossner                   3 (0.1%)
+   Markus Heidelberg                 3 (0.1%)
+   Hans-Christian Egtvedt            3 (0.1%)
+   Kenneth Johansson                 3 (0.1%)
+   Feng Kan                          3 (0.1%)
+   Stuart Wood                       3 (0.1%)
+   Markus Brunner                    3 (0.1%)
+   Eugene O'Brien                    3 (0.1%)
+   Pieter Voorthuijsen               3 (0.1%)
+   Mike Nuss                         3 (0.1%)
+   Ladislav Michl                    3 (0.1%)
+   Zhang Wei                         3 (0.1%)
+   Selvamuthukumar                   2 (0.1%)
+   Luigi 'Comio' Mantellini          2 (0.1%)
+   Laurent Pinchart                  2 (0.1%)
+   u-boot@bugs.denx.de               2 (0.1%)
+   Wolfgang Ocker                    2 (0.1%)
+   Prodyut  Hazarika                 2 (0.1%)
+   Martha J Marx                     2 (0.1%)
+   Sebastian Siewior                 2 (0.1%)
+   Sergey Lapin                      2 (0.1%)
+   David Saada                       2 (0.1%)
+   Vasiliy Leoenenko                 2 (0.1%)
+   Lee Nipper                        2 (0.1%)
+   Ulf Samuelsson                    2 (0.1%)
+   Matthew Fettke                    2 (0.1%)
+   Aras Vaichas                      2 (0.1%)
+   Mark Jonas                        2 (0.1%)
+   Bryan O'Donoghue                  2 (0.1%)
+   robert lazarski                   2 (0.1%)
+   Joe Hamman                        2 (0.1%)
+   Lepcha Suchit                     1 (0.0%)
+   Nikita V. Youshchenko             1 (0.0%)
+   Louis Su                          1 (0.0%)
+   Rafal Czubak                      1 (0.0%)
+   gnusercn                          1 (0.0%)
+   Jens Scharsig                     1 (0.0%)
+   Claudio Scordino                  1 (0.0%)
+   Petri Lehtinen                    1 (0.0%)
+   Ryan CHEN                         1 (0.0%)
+   Nícolas Carneiro Lebedenco        1 (0.0%)
+   Graeme Russ                       1 (0.0%)
+   Jochen Friedrich                  1 (0.0%)
+   Sandeep Paulraj                   1 (0.0%)
+   Randy Vinson                      1 (0.0%)
+   Wolfram Sang                      1 (0.0%)
+   Tirumala R Marri                  1 (0.0%)
+   Axel Beierlein                    1 (0.0%)
+   Fathi BOUDRA                      1 (0.0%)
+   Ilya Yanok                        1 (0.0%)
+   Sergey Kubushyn                   1 (0.0%)
+   Steve Sakoman                     1 (0.0%)
+   Hunter, Jon                       1 (0.0%)
+   Rafael Campos                     1 (0.0%)
+   Julien May                        1 (0.0%)
+   Frank Svendsbøe                   1 (0.0%)
+   Juergen Kilb                      1 (0.0%)
+   Robin Getz                        1 (0.0%)
+   Patrice Vilchez                   1 (0.0%)
+   Esben Haabendal                   1 (0.0%)
+   Philip Balister                   1 (0.0%)
+   Peter Ma                          1 (0.0%)
+   Ron Madrid                        1 (0.0%)
+   Wheatley Travis                   1 (0.0%)
+   Dave Mitchell                     1 (0.0%)
+   Jeremy McNicoll                   1 (0.0%)
+   Troy Kisky                        1 (0.0%)
+   Jason Wessel                      1 (0.0%)
+   eran liberty                      1 (0.0%)
+   Joe D'Abbraccio                   1 (0.0%)
+   Bernhard Nemec                    1 (0.0%)
+   Kim B. Heino                      1 (0.0%)
+   michael                           1 (0.0%)
+   Woodruff, Richard                 1 (0.0%)
+   Li Yang                           1 (0.0%)
+   Marcel Moolenaar                  1 (0.0%)
+   Uwe Kleine-König                  1 (0.0%)
+   Timo Tuunainen                    1 (0.0%)
+   Hiroshi Ito                       1 (0.0%)
+   Johannes Stezenbach               1 (0.0%)
+   michael.firth@bt.com              1 (0.0%)
+   Poonam Aggrwal                    1 (0.0%)
+   Oliver Weber                      1 (0.0%)
+   Rodolfo Giometti                  1 (0.0%)
+   raptorbrino@aim.com               1 (0.0%)
+   Upakul Barkakaty                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    73997 (15.9%)
+   Wolfgang Denk                     64193 (13.8%)
+   William Juul                      40361 (8.7%)
+   Stefan Roese                      27101 (5.8%)
+   Kumar Gala                        25096 (5.4%)
+   TsiChung Liew                     22189 (4.8%)
+   Daniel Hellstrom                  15358 (3.3%)
+   Matthias Fuchs                    14568 (3.1%)
+   Nobuhiro Iwamatsu                 14165 (3.0%)
+   Jean-Christophe PLAGNIOL-VILLARD  12562 (2.7%)
+   Marian Balakowicz                 10887 (2.3%)
+   Guennadi Liakhovetski             8914 (1.9%)
+   Stelian Pop                       8375 (1.8%)
+   Larry Johnson                     8198 (1.8%)
+   Dave Liu                          6580 (1.4%)
+   Michael Schwingen                 5797 (1.2%)
+   Haavard Skinnemoen                5748 (1.2%)
+   Sascha Hauer                      5161 (1.1%)
+   Heiko Schocher                    4625 (1.0%)
+   Andre Schwarz                     4028 (0.9%)
+   Yoshihiro Shimoda                 3240 (0.7%)
+   Shinya Kuribayashi                3159 (0.7%)
+   Yusuke Goda                       3133 (0.7%)
+   Rafal Jaworowski                  2983 (0.6%)
+   Yuri Tikhonov                     2862 (0.6%)
+   Jon Loeliger                      2813 (0.6%)
+   Kim Phillips                      2792 (0.6%)
+   Peter Pearse                      2624 (0.6%)
+   Anton Vorontsov                   2572 (0.6%)
+   Luigi 'Comio' Mantellini          2540 (0.5%)
+   Niklaus Giger                     2528 (0.5%)
+   Scott Wood                        2456 (0.5%)
+   York Sun                          2183 (0.5%)
+   Wolfgang Grandegger               2044 (0.4%)
+   Kyungmin Park                     1928 (0.4%)
+   Michal Simek                      1885 (0.4%)
+   Ricardo Ribalda                   1849 (0.4%)
+   Grant Erickson                    1840 (0.4%)
+   Matthew Fettke                    1823 (0.4%)
+   Sergei Poselenov                  1815 (0.4%)
+   Hugo Villeneuve                   1777 (0.4%)
+   Becky Bruce                       1683 (0.4%)
+   Joe Hamman                        1654 (0.4%)
+   Andreas Engel                     1649 (0.4%)
+   Anatolij Gustschin                1626 (0.3%)
+   Ben Warren                        1437 (0.3%)
+   Timur Tabi                        1406 (0.3%)
+   robert lazarski                   1393 (0.3%)
+   Adam Graham                       1382 (0.3%)
+   Adrian Filipi                     1325 (0.3%)
+   Tor Krill                         1247 (0.3%)
+   Louis Su                          1140 (0.2%)
+   Feng Kan                          1122 (0.2%)
+   David Gibson                      1105 (0.2%)
+   Hans-Christian Egtvedt            1097 (0.2%)
+   Bartlomiej Sieka                  1011 (0.2%)
+   Timo Tuunainen                    985 (0.2%)
+   Andy Fleming                      803 (0.2%)
+   Gerald Van Baren                  737 (0.2%)
+   Harald Welte                      706 (0.2%)
+   Gary Jennejohn                    690 (0.1%)
+   Pieter Voorthuijsen               688 (0.1%)
+   Grant Likely                      673 (0.1%)
+   Mark Jonas                        645 (0.1%)
+   John Rigby                        574 (0.1%)
+   James Yang                        569 (0.1%)
+   Mark Jackson                      566 (0.1%)
+   Vlad Lungu                        560 (0.1%)
+   Paul Gortmaker                    468 (0.1%)
+   Ira W. Snyder                     455 (0.1%)
+   Detlev Zundel                     433 (0.1%)
+   Julien May                        416 (0.1%)
+   Stefano Babic                     392 (0.1%)
+   Martha J Marx                     389 (0.1%)
+   Kenneth Johansson                 382 (0.1%)
+   Remy Bohmer                       333 (0.1%)
+   eran liberty                      324 (0.1%)
+   Haiying Wang                      302 (0.1%)
+   Jerry Van Baren                   284 (0.1%)
+   Gururaja Hebbar K R               264 (0.1%)
+   Victor Gallardo                   247 (0.1%)
+   Jason Wessel                      233 (0.0%)
+   Nick Spence                       218 (0.0%)
+   Andrew Dyer                       202 (0.0%)
+   Joakim Tjernlund                  191 (0.0%)
+   Ladislav Michl                    189 (0.0%)
+   Martin Krause                     183 (0.0%)
+   Prodyut  Hazarika                 183 (0.0%)
+   Jason McMullan                    167 (0.0%)
+   Peter Tyser                       165 (0.0%)
+   Ulf Samuelsson                    150 (0.0%)
+   Marcel Ziswiler                   147 (0.0%)
+   Steven A. Falco                   132 (0.0%)
+   Magnus Lilja                      131 (0.0%)
+   Markus Klotzbuecher               131 (0.0%)
+   Michael Barkowski                 118 (0.0%)
+   Dirk Behme                        113 (0.0%)
+   Stuart Wood                       108 (0.0%)
+   Sascha Laue                       106 (0.0%)
+   Mike Nuss                         106 (0.0%)
+   David Saada                       98 (0.0%)
+   Graeme Russ                       96 (0.0%)
+   Jason Jin                         94 (0.0%)
+   Bryan O'Donoghue                  93 (0.0%)
+   Matvejchikov Ilya                 85 (0.0%)
+   Grzegorz Bernacki                 84 (0.0%)
+   Sandeep Paulraj                   82 (0.0%)
+   Christian Eggers                  81 (0.0%)
+   Jens Gehrlein                     75 (0.0%)
+   Peter Ma                          64 (0.0%)
+   u-boot@bugs.denx.de               48 (0.0%)
+   Rafael Campos                     43 (0.0%)
+   Zhang Wei                         39 (0.0%)
+   Andrew Klossner                   38 (0.0%)
+   Vasiliy Leoenenko                 36 (0.0%)
+   Ron Madrid                        31 (0.0%)
+   Sergey Lapin                      30 (0.0%)
+   Aras Vaichas                      25 (0.0%)
+   Hunter, Jon                       25 (0.0%)
+   David Brownell                    23 (0.0%)
+   Axel Beierlein                    22 (0.0%)
+   Bernhard Nemec                    22 (0.0%)
+   Ed Swarthout                      21 (0.0%)
+   Eugene O'Brien                    21 (0.0%)
+   Wheatley Travis                   21 (0.0%)
+   Fathi BOUDRA                      20 (0.0%)
+   michael.firth@bt.com              20 (0.0%)
+   Selvamuthukumar                   16 (0.0%)
+   Patrice Vilchez                   16 (0.0%)
+   Poonam Aggrwal                    16 (0.0%)
+   Rodolfo Giometti                  16 (0.0%)
+   Roy Zang                          14 (0.0%)
+   Wolfram Sang                      14 (0.0%)
+   Sergey Kubushyn                   14 (0.0%)
+   Laurent Pinchart                  12 (0.0%)
+   Lee Nipper                        12 (0.0%)
+   Lepcha Suchit                     12 (0.0%)
+   Markus Heidelberg                 10 (0.0%)
+   Markus Brunner                    10 (0.0%)
+   Jens Scharsig                     10 (0.0%)
+   Ilya Yanok                        9 (0.0%)
+   Troy Kisky                        9 (0.0%)
+   Uwe Kleine-König                  9 (0.0%)
+   Sebastian Siewior                 8 (0.0%)
+   Li Yang                           7 (0.0%)
+   Wolfgang Ocker                    6 (0.0%)
+   Nícolas Carneiro Lebedenco        6 (0.0%)
+   michael                           6 (0.0%)
+   Woodruff, Richard                 6 (0.0%)
+   Hiroshi Ito                       6 (0.0%)
+   Tirumala R Marri                  5 (0.0%)
+   Esben Haabendal                   5 (0.0%)
+   Steve Sakoman                     4 (0.0%)
+   Oliver Weber                      4 (0.0%)
+   Upakul Barkakaty                  4 (0.0%)
+   Nikita V. Youshchenko             3 (0.0%)
+   Petri Lehtinen                    3 (0.0%)
+   Jeremy McNicoll                   3 (0.0%)
+   Johannes Stezenbach               3 (0.0%)
+   gnusercn                          2 (0.0%)
+   Ryan CHEN                         2 (0.0%)
+   Jochen Friedrich                  2 (0.0%)
+   Randy Vinson                      2 (0.0%)
+   Juergen Kilb                      2 (0.0%)
+   Robin Getz                        2 (0.0%)
+   Philip Balister                   2 (0.0%)
+   Marcel Moolenaar                  2 (0.0%)
+   Rafal Czubak                      1 (0.0%)
+   Claudio Scordino                  1 (0.0%)
+   Frank Svendsbøe                   1 (0.0%)
+   Dave Mitchell                     1 (0.0%)
+   Joe D'Abbraccio                   1 (0.0%)
+   Kim B. Heino                      1 (0.0%)
+   raptorbrino@aim.com               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andreas Engel                     1535 (1.0%)
+   Adrian Filipi                     1321 (0.8%)
+   Gerald Van Baren                  556 (0.4%)
+   Paul Gortmaker                    241 (0.2%)
+   Jason Wessel                      233 (0.1%)
+   Jerry Van Baren                   185 (0.1%)
+   Becky Bruce                       158 (0.1%)
+   Ladislav Michl                    137 (0.1%)
+   Ira W. Snyder                     119 (0.1%)
+   Andrew Dyer                       80 (0.1%)
+   Kenneth Johansson                 53 (0.0%)
+   Peter Tyser                       51 (0.0%)
+   Dirk Behme                        51 (0.0%)
+   Bernhard Nemec                    22 (0.0%)
+   Laurent Pinchart                  9 (0.0%)
+   michael.firth@bt.com              8 (0.0%)
+   Steven A. Falco                   4 (0.0%)
+   Steve Sakoman                     2 (0.0%)
+   Robin Getz                        2 (0.0%)
+   Troy Kisky                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 580)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      82 (14.1%)
+   Ben Warren                        70 (12.1%)
+   Kim Phillips                      63 (10.9%)
+   Jean-Christophe PLAGNIOL-VILLARD  40 (6.9%)
+   Scott Wood                        26 (4.5%)
+   Kumar Gala                        21 (3.6%)
+   Wolfgang Denk                     20 (3.4%)
+   Dmitry Rakhchev                   16 (2.8%)
+   Ricardo Ribalda Delgado           15 (2.6%)
+   Guennadi Liakhovetski             14 (2.4%)
+   Markus Klotzbuecher               11 (1.9%)
+   Andy Fleming                      11 (1.9%)
+   Jon Loeliger                      10 (1.7%)
+   Haavard Skinnemoen                9 (1.6%)
+   Nobuhiro Iwamatsu                 9 (1.6%)
+   Gerald Van Baren                  7 (1.2%)
+   Martin Krause                     7 (1.2%)
+   Kurt Mahan                        6 (1.0%)
+   Ilya Yanok                        6 (1.0%)
+   Shinya Kuribayashi                6 (1.0%)
+   Jason Jin                         5 (0.9%)
+   Sergei Poselenov                  5 (0.9%)
+   Dave Liu                          5 (0.9%)
+   Rafal Czubak                      4 (0.7%)
+   Thomas Waehner                    4 (0.7%)
+   Ed Swarthout                      4 (0.7%)
+   David Woodhouse                   3 (0.5%)
+   Srikanth Srinivasan               3 (0.5%)
+   Dejan Minic                       3 (0.5%)
+   Mahesh Jade                       3 (0.5%)
+   James Yang                        3 (0.5%)
+   TsiChung Liew                     3 (0.5%)
+   Dirk Behme                        2 (0.3%)
+   Steven A. Falco                   2 (0.3%)
+   Joe D'Abbraccio                   2 (0.3%)
+   Werner Almesberger                2 (0.3%)
+   Stig Olsen                        2 (0.3%)
+   Alexey Korolev                    2 (0.3%)
+   Michael Hennerich                 2 (0.3%)
+   Rafal Zabdyr                      2 (0.3%)
+   Rodolfo Giometti                  2 (0.3%)
+   Detlev Zundel                     2 (0.3%)
+   Jason McMullan                    2 (0.3%)
+   John Rigby                        2 (0.3%)
+   Bartlomiej Sieka                  2 (0.3%)
+   Timur Tabi                        2 (0.3%)
+   Wolfgang Grandegger               2 (0.3%)
+   Yuri Tikhonov                     2 (0.3%)
+   Luigi 'Comio' Mantellini          2 (0.3%)
+   Rafal Jaworowski                  2 (0.3%)
+   Matthias Fuchs                    2 (0.3%)
+   Mike Frysinger                    2 (0.3%)
+   Jerry Van Baren                   1 (0.2%)
+   Becky Bruce                       1 (0.2%)
+   Ladislav Michl                    1 (0.2%)
+   Steve Sakoman                     1 (0.2%)
+   Tirumala R Marri                  1 (0.2%)
+   Andrew Morton                     1 (0.2%)
+   Peter Korsgaard                   1 (0.2%)
+   Morten Ebbell Hestnes             1 (0.2%)
+   Manikandan Pillai                 1 (0.2%)
+   Manuel Sahm                       1 (0.2%)
+   John Roberts                      1 (0.2%)
+   Philip Balister, OpenSDR          1 (0.2%)
+   Francesco Albanese                1 (0.2%)
+   Ebony Zhu                         1 (0.2%)
+   Eran Liberty                      1 (0.2%)
+   Zachary P. Landau                 1 (0.2%)
+   Matt Wadel                        1 (0.2%)
+   Olaf Hering                       1 (0.2%)
+   Dmitry Ivanov                     1 (0.2%)
+   Kevin Lam                         1 (0.2%)
+   Scott McNutt                      1 (0.2%)
+   Brian Miller                      1 (0.2%)
+   Piotr Kruszynski                  1 (0.2%)
+   Pravin M. Bathija                 1 (0.2%)
+   Juergen Kilb                      1 (0.2%)
+   Philip Balister                   1 (0.2%)
+   Sebastian Siewior                 1 (0.2%)
+   Wolfgang Ocker                    1 (0.2%)
+   Markus Brunner                    1 (0.2%)
+   Jens Gehrlein                     1 (0.2%)
+   Michael Barkowski                 1 (0.2%)
+   Gururaja Hebbar K R               1 (0.2%)
+   Joakim Tjernlund                  1 (0.2%)
+   Grant Likely                      1 (0.2%)
+   Victor Gallardo                   1 (0.2%)
+   Martha J Marx                     1 (0.2%)
+   David Gibson                      1 (0.2%)
+   Vlad Lungu                        1 (0.2%)
+   Gary Jennejohn                    1 (0.2%)
+   Tor Krill                         1 (0.2%)
+   Adam Graham                       1 (0.2%)
+   Anatolij Gustschin                1 (0.2%)
+   Kyungmin Park                     1 (0.2%)
+   Larry Johnson                     1 (0.2%)
+   Yoshihiro Shimoda                 1 (0.2%)
+   Heiko Schocher                    1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kim Phillips                      1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Guennadi Liakhovetski             1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Haavard Skinnemoen                1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Gururaja Hebbar K R               1 (50.0%)
+   Coray Tate                        1 (50.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Haavard Skinnemoen                1 (50.0%)
+   Kim Phillips                      1 (50.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         610 (24.4%)
+   Freescale                         539 (21.6%)
+   (Unknown)                         241 (9.6%)
+   jcrosoft                          175 (7.0%)
+   Semihalf Embedded Systems         112 (4.5%)
+   ESD Electronics                   73 (2.9%)
+   Atmel                             72 (2.9%)
+   Analog Devices                    57 (2.3%)
+   Nobuhiro Iwamatsu                 48 (1.9%)
+   EmCraft Systems                   47 (1.9%)
+   Stelian Pop                       47 (1.9%)
+   Renesas Electronics               41 (1.6%)
+   MontaVista                        38 (1.5%)
+   Xilinx                            24 (1.0%)
+   Wind River                        20 (0.8%)
+   Custom IDEAS                      19 (0.8%)
+   ACM                               18 (0.7%)
+   Lyrtech                           18 (0.7%)
+   TQ Systems                        17 (0.7%)
+   Netstal-Maschinen                 16 (0.6%)
+   Gaisler Research                  15 (0.6%)
+   Matrix Vision                     15 (0.6%)
+   Samsung                           15 (0.6%)
+   Oce Technologies                  15 (0.6%)
+   AMCC                              14 (0.6%)
+   Pengutronix                       13 (0.5%)
+   Nuovation System Designs          12 (0.5%)
+   Sanyo LSI Technology India        11 (0.4%)
+   Secretlab                         11 (0.4%)
+   Extreme Engineering Solutions     10 (0.4%)
+   NEC                               8 (0.3%)
+   Openmoko                          8 (0.3%)
+   ARM                               7 (0.3%)
+   Excito Elektronik                 6 (0.2%)
+   Harris Corporation                6 (0.2%)
+   Transmode Systems                 6 (0.2%)
+   Mercury IMC Ltd.                  5 (0.2%)
+   RightHand Technologies            5 (0.2%)
+   Ericsson                          4 (0.2%)
+   NetApp                            4 (0.2%)
+   OVRO                              4 (0.2%)
+   Advantech                         3 (0.1%)
+   Xerox                             3 (0.1%)
+   EuroTech                          3 (0.1%)
+   Lab X Technologies                3 (0.1%)
+   South Pole AB                     3 (0.1%)
+   Terascala                         3 (0.1%)
+   Texas Instruments                 3 (0.1%)
+   Dirk Behme                        3 (0.1%)
+   Funky                             3 (0.1%)
+   CSE Semaphore, Inc.               2 (0.1%)
+   e-con Infotech                    2 (0.1%)
+   ECI Telecom                       2 (0.1%)
+   Embedded Specialties              2 (0.1%)
+   Industrie Dial Face               2 (0.1%)
+   Liebherr                          2 (0.1%)
+   linutronix                        2 (0.1%)
+   MagTech Systems                   2 (0.1%)
+   Reccoware Systems                 2 (0.1%)
+   Silicon Turnkey Express           2 (0.1%)
+   ASIX                              1 (0.0%)
+   Bluegiga Technologies             1 (0.0%)
+   Boundary Devices                  1 (0.0%)
+   BT Group                          1 (0.0%)
+   BuS Elektronik                    1 (0.0%)
+   Debian.org                        1 (0.0%)
+   Digi International                1 (0.0%)
+   Evidence S.r.l.                   1 (0.0%)
+   Ingenieurbuero Ganssloser         1 (0.0%)
+   Hanscan                           1 (0.0%)
+   Inoi Oy                           1 (0.0%)
+   Juniper Networks                  1 (0.0%)
+   Mediama Technologies              1 (0.0%)
+   Micromico                         1 (0.0%)
+   Media Lab                         1 (0.0%)
+   Prodrive                          1 (0.0%)
+   Sakoman Inc.                      1 (0.0%)
+   scram! e.V.                       1 (0.0%)
+   ST Microelectronics               1 (0.0%)
+   Sysart Oy                         1 (0.0%)
+   TANDBERG                          1 (0.0%)
+   Task Sistemas                     1 (0.0%)
+   Graeme Russ                       1 (0.0%)
+   Sergey Kubushyn                   1 (0.0%)
+   Sheldon Instruments               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         109656 (23.5%)
+   Analog Devices                    73999 (15.9%)
+   Freescale                         70018 (15.0%)
+   (Unknown)                         60455 (13.0%)
+   Gaisler Research                  15358 (3.3%)
+   Semihalf Embedded Systems         14966 (3.2%)
+   ESD Electronics                   14568 (3.1%)
+   jcrosoft                          12562 (2.7%)
+   TANDBERG                          10446 (2.2%)
+   Renesas Electronics               9529 (2.0%)
+   Nobuhiro Iwamatsu                 8273 (1.8%)
+   Stelian Pop                       7909 (1.7%)
+   Atmel                             7010 (1.5%)
+   Pengutronix                       5175 (1.1%)
+   Matrix Vision                     4028 (0.9%)
+   AMCC                              2940 (0.6%)
+   ARM                               2624 (0.6%)
+   MontaVista                        2574 (0.6%)
+   Industrie Dial Face               2540 (0.5%)
+   EmCraft Systems                   2539 (0.5%)
+   Netstal-Maschinen                 2502 (0.5%)
+   ACM                               2232 (0.5%)
+   Samsung                           1928 (0.4%)
+   Xilinx                            1885 (0.4%)
+   Nuovation System Designs          1840 (0.4%)
+   Lyrtech                           1777 (0.4%)
+   Embedded Specialties              1654 (0.4%)
+   Ericsson                          1649 (0.4%)
+   EuroTech                          1325 (0.3%)
+   Wind River                        1264 (0.3%)
+   Excito Elektronik                 1247 (0.3%)
+   ASIX                              1140 (0.2%)
+   Custom IDEAS                      1021 (0.2%)
+   Sysart Oy                         985 (0.2%)
+   Secretlab                         673 (0.1%)
+   Openmoko                          610 (0.1%)
+   Mercury IMC Ltd.                  566 (0.1%)
+   Funky                             467 (0.1%)
+   OVRO                              455 (0.1%)
+   Micromico                         416 (0.1%)
+   Silicon Turnkey Express           389 (0.1%)
+   South Pole AB                     382 (0.1%)
+   Oce Technologies                  333 (0.1%)
+   Sanyo LSI Technology India        264 (0.1%)
+   TQ Systems                        258 (0.1%)
+   RightHand Technologies            202 (0.0%)
+   NEC                               197 (0.0%)
+   Transmode Systems                 191 (0.0%)
+   NetApp                            167 (0.0%)
+   Extreme Engineering Solutions     165 (0.0%)
+   Harris Corporation                132 (0.0%)
+   Texas Instruments                 113 (0.0%)
+   Lab X Technologies                108 (0.0%)
+   Terascala                         106 (0.0%)
+   ECI Telecom                       98 (0.0%)
+   Graeme Russ                       96 (0.0%)
+   Mediama Technologies              64 (0.0%)
+   Dirk Behme                        59 (0.0%)
+   Liebherr                          52 (0.0%)
+   Hanscan                           43 (0.0%)
+   Xerox                             38 (0.0%)
+   Sheldon Instruments               31 (0.0%)
+   MagTech Systems                   25 (0.0%)
+   Ingenieurbuero Ganssloser         22 (0.0%)
+   Advantech                         21 (0.0%)
+   BT Group                          20 (0.0%)
+   Debian.org                        20 (0.0%)
+   e-con Infotech                    16 (0.0%)
+   Sergey Kubushyn                   14 (0.0%)
+   CSE Semaphore, Inc.               12 (0.0%)
+   BuS Elektronik                    10 (0.0%)
+   Prodrive                          10 (0.0%)
+   Boundary Devices                  9 (0.0%)
+   Digi International                9 (0.0%)
+   linutronix                        8 (0.0%)
+   Reccoware Systems                 6 (0.0%)
+   Media Lab                         6 (0.0%)
+   Task Sistemas                     6 (0.0%)
+   Sakoman Inc.                      4 (0.0%)
+   Inoi Oy                           3 (0.0%)
+   Juniper Networks                  2 (0.0%)
+   scram! e.V.                       2 (0.0%)
+   ST Microelectronics               2 (0.0%)
+   Bluegiga Technologies             1 (0.0%)
+   Evidence S.r.l.                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 580)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         177 (30.5%)
+   DENX Software Engineering         134 (23.1%)
+   (Unknown)                         90 (15.5%)
+   jcrosoft                          40 (6.9%)
+   EmCraft Systems                   29 (5.0%)
+   Universidad Autonoma de Madrid    15 (2.6%)
+   TQ Systems                        12 (2.1%)
+   Semihalf Embedded Systems         11 (1.9%)
+   Nobuhiro Iwamatsu                 9 (1.6%)
+   Atmel                             9 (1.6%)
+   Custom IDEAS                      7 (1.2%)
+   Analog Devices                    4 (0.7%)
+   AMCC                              4 (0.7%)
+   TANDBERG                          3 (0.5%)
+   Intel                             3 (0.5%)
+   ESD Electronics                   2 (0.3%)
+   Industrie Dial Face               2 (0.3%)
+   Openmoko                          2 (0.3%)
+   NetApp                            2 (0.3%)
+   Harris Corporation                2 (0.3%)
+   Renesas Electronics               1 (0.2%)
+   ACM                               1 (0.2%)
+   Samsung                           1 (0.2%)
+   Wind River                        1 (0.2%)
+   Excito Elektronik                 1 (0.2%)
+   Secretlab                         1 (0.2%)
+   Silicon Turnkey Express           1 (0.2%)
+   Sanyo LSI Technology India        1 (0.2%)
+   Transmode Systems                 1 (0.2%)
+   Texas Instruments                 1 (0.2%)
+   Lab X Technologies                1 (0.2%)
+   linutronix                        1 (0.2%)
+   Reccoware Systems                 1 (0.2%)
+   Sakoman Inc.                      1 (0.2%)
+   Extricom                          1 (0.2%)
+   Feig Electronic                   1 (0.2%)
+   General Electric                  1 (0.2%)
+   Linux Foundation                  1 (0.2%)
+   Novell                            1 (0.2%)
+   OpenSDR                           1 (0.2%)
+   Psyent                            1 (0.2%)
+   Powerwave Technologies            1 (0.2%)
+   Barco                             1 (0.2%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 191)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         45 (23.6%)
+   Freescale                         25 (13.1%)
+   DENX Software Engineering         12 (6.3%)
+   AMCC                              6 (3.1%)
+   Semihalf Embedded Systems         5 (2.6%)
+   Atmel                             4 (2.1%)
+   Wind River                        4 (2.1%)
+   EmCraft Systems                   3 (1.6%)
+   Renesas Electronics               3 (1.6%)
+   Texas Instruments                 3 (1.6%)
+   TQ Systems                        2 (1.0%)
+   Custom IDEAS                      2 (1.0%)
+   Analog Devices                    2 (1.0%)
+   Pengutronix                       2 (1.0%)
+   MontaVista                        2 (1.0%)
+   Funky                             2 (1.0%)
+   jcrosoft                          1 (0.5%)
+   Nobuhiro Iwamatsu                 1 (0.5%)
+   TANDBERG                          1 (0.5%)
+   ESD Electronics                   1 (0.5%)
+   Industrie Dial Face               1 (0.5%)
+   Openmoko                          1 (0.5%)
+   NetApp                            1 (0.5%)
+   Harris Corporation                1 (0.5%)
+   ACM                               1 (0.5%)
+   Samsung                           1 (0.5%)
+   Excito Elektronik                 1 (0.5%)
+   Secretlab                         1 (0.5%)
+   Silicon Turnkey Express           1 (0.5%)
+   Sanyo LSI Technology India        1 (0.5%)
+   Transmode Systems                 1 (0.5%)
+   Lab X Technologies                1 (0.5%)
+   linutronix                        1 (0.5%)
+   Reccoware Systems                 1 (0.5%)
+   Sakoman Inc.                      1 (0.5%)
+   Gaisler Research                  1 (0.5%)
+   Stelian Pop                       1 (0.5%)
+   Matrix Vision                     1 (0.5%)
+   ARM                               1 (0.5%)
+   Netstal-Maschinen                 1 (0.5%)
+   Xilinx                            1 (0.5%)
+   Nuovation System Designs          1 (0.5%)
+   Lyrtech                           1 (0.5%)
+   Embedded Specialties              1 (0.5%)
+   Ericsson                          1 (0.5%)
+   EuroTech                          1 (0.5%)
+   ASIX                              1 (0.5%)
+   Sysart Oy                         1 (0.5%)
+   Mercury IMC Ltd.                  1 (0.5%)
+   OVRO                              1 (0.5%)
+   Micromico                         1 (0.5%)
+   South Pole AB                     1 (0.5%)
+   Oce Technologies                  1 (0.5%)
+   RightHand Technologies            1 (0.5%)
+   NEC                               1 (0.5%)
+   Extreme Engineering Solutions     1 (0.5%)
+   Terascala                         1 (0.5%)
+   ECI Telecom                       1 (0.5%)
+   Graeme Russ                       1 (0.5%)
+   Mediama Technologies              1 (0.5%)
+   Dirk Behme                        1 (0.5%)
+   Liebherr                          1 (0.5%)
+   Hanscan                           1 (0.5%)
+   Xerox                             1 (0.5%)
+   Sheldon Instruments               1 (0.5%)
+   MagTech Systems                   1 (0.5%)
+   Ingenieurbuero Ganssloser         1 (0.5%)
+   Advantech                         1 (0.5%)
+   BT Group                          1 (0.5%)
+   Debian.org                        1 (0.5%)
+   e-con Infotech                    1 (0.5%)
+   Sergey Kubushyn                   1 (0.5%)
+   CSE Semaphore, Inc.               1 (0.5%)
+   BuS Elektronik                    1 (0.5%)
+   Prodrive                          1 (0.5%)
+   Boundary Devices                  1 (0.5%)
+   Digi International                1 (0.5%)
+   Media Lab                         1 (0.5%)
+   Task Sistemas                     1 (0.5%)
+   Inoi Oy                           1 (0.5%)
+   Juniper Networks                  1 (0.5%)
+   scram! e.V.                       1 (0.5%)
+   ST Microelectronics               1 (0.5%)
+   Bluegiga Technologies             1 (0.5%)
+   Evidence S.r.l.                   1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2009.01.rst b/doc/develop/statistics/u-boot-stats-v2009.01.rst
new file mode 100644
index 00000000000..3495b6dadae
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2009.01.rst
@@ -0,0 +1,425 @@
+:orphan:
+
+Release Statistics for U-Boot v2009.01
+======================================
+
+* Processed 464 changesets from 69 developers
+
+* 33 employers found
+
+* A total of 102552 lines added, 74330 removed (delta 28222)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    37 (8.0%)
+   Kumar Gala                        33 (7.1%)
+   Jean-Christophe PLAGNIOL-VILLARD  30 (6.5%)
+   Heiko Schocher                    27 (5.8%)
+   Wolfgang Denk                     26 (5.6%)
+   Becky Bruce                       25 (5.4%)
+   Stefan Roese                      22 (4.7%)
+   Peter Tyser                       21 (4.5%)
+   Matthias Fuchs                    16 (3.4%)
+   Nobuhiro Iwamatsu                 15 (3.2%)
+   Dave Liu                          14 (3.0%)
+   Haiying Wang                      13 (2.8%)
+   Kyungmin Park                     12 (2.6%)
+   Ben Warren                        10 (2.2%)
+   TsiChung Liew                     10 (2.2%)
+   Scott Wood                        9 (1.9%)
+   Richard Retanubun                 8 (1.7%)
+   Anton Vorontsov                   8 (1.7%)
+   Remy Böhmer                       7 (1.5%)
+   Ilya Yanok                        7 (1.5%)
+   Trent Piepho                      6 (1.3%)
+   Ed Swarthout                      6 (1.3%)
+   Bartlomiej Sieka                  6 (1.3%)
+   Michal Simek                      5 (1.1%)
+   Niklaus Giger                     5 (1.1%)
+   Piotr Ziecik                      5 (1.1%)
+   Haavard Skinnemoen                5 (1.1%)
+   Graeme Russ                       4 (0.9%)
+   Anatolij Gustschin                4 (0.9%)
+   Gary Jennejohn                    4 (0.9%)
+   Stelian Pop                       4 (0.9%)
+   Roy Zang                          3 (0.6%)
+   Paul Gortmaker                    3 (0.6%)
+   Jon Loeliger                      3 (0.6%)
+   Ilko Iliev                        3 (0.6%)
+   Adam Graham                       3 (0.6%)
+   Peter Korsgaard                   2 (0.4%)
+   Nicolas Ferre                     2 (0.4%)
+   Timur Tabi                        2 (0.4%)
+   Yuri Tikhonov                     2 (0.4%)
+   Andy Fleming                      2 (0.4%)
+   Michael Trimarchi                 2 (0.4%)
+   Dave Mitchell                     2 (0.4%)
+   Roman Mashak                      2 (0.4%)
+   Jason Jin                         2 (0.4%)
+   Ricardo Ribalda                   2 (0.4%)
+   Dirk Eibach                       2 (0.4%)
+   Liu Yu                            2 (0.4%)
+   Kieran Bingham                    1 (0.2%)
+   Shinya Kuribayashi                1 (0.2%)
+   Martin Michlmayr                  1 (0.2%)
+   Sergei Poselenov                  1 (0.2%)
+   Sonic Zhang                       1 (0.2%)
+   Jerry Van Baren                   1 (0.2%)
+   Stefan Althoefer                  1 (0.2%)
+   Daniel Hellstrom                  1 (0.2%)
+   Jens Scharsig                     1 (0.2%)
+   Steven A. Falco                   1 (0.2%)
+   Dirk Behme                        1 (0.2%)
+   Howard Gregory                    1 (0.2%)
+   Selvamuthukumar                   1 (0.2%)
+   Clive Stubbings                   1 (0.2%)
+   Sergey Lapin                      1 (0.2%)
+   Tomohiro Masubuchi                1 (0.2%)
+   Alessandro Rubini                 1 (0.2%)
+   David Gibson                      1 (0.2%)
+   Karl Beldan                       1 (0.2%)
+   Georg Schardt                     1 (0.2%)
+   Ben Maan                          1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jean-Christophe PLAGNIOL-VILLARD  56116 (49.1%)
+   Kyungmin Park                     15163 (13.3%)
+   TsiChung Liew                     11218 (9.8%)
+   Wolfgang Denk                     6977 (6.1%)
+   Peter Tyser                       3736 (3.3%)
+   Kumar Gala                        1824 (1.6%)
+   Gary Jennejohn                    1805 (1.6%)
+   Heiko Schocher                    1569 (1.4%)
+   Matthias Fuchs                    1405 (1.2%)
+   Mike Frysinger                    1229 (1.1%)
+   Remy Böhmer                       1013 (0.9%)
+   Michal Simek                      935 (0.8%)
+   Becky Bruce                       882 (0.8%)
+   Richard Retanubun                 870 (0.8%)
+   Ricardo Ribalda                   842 (0.7%)
+   Haiying Wang                      823 (0.7%)
+   Dirk Eibach                       723 (0.6%)
+   Ilya Yanok                        643 (0.6%)
+   Bartlomiej Sieka                  599 (0.5%)
+   Sergey Lapin                      592 (0.5%)
+   Michael Trimarchi                 474 (0.4%)
+   Adam Graham                       458 (0.4%)
+   Niklaus Giger                     425 (0.4%)
+   Stefan Roese                      363 (0.3%)
+   Nobuhiro Iwamatsu                 282 (0.2%)
+   Scott Wood                        269 (0.2%)
+   Selvamuthukumar                   260 (0.2%)
+   Piotr Ziecik                      258 (0.2%)
+   Georg Schardt                     252 (0.2%)
+   Anton Vorontsov                   234 (0.2%)
+   Timur Tabi                        232 (0.2%)
+   Dave Liu                          228 (0.2%)
+   Haavard Skinnemoen                198 (0.2%)
+   Ben Warren                        190 (0.2%)
+   Nicolas Ferre                     171 (0.1%)
+   Dave Mitchell                     130 (0.1%)
+   Trent Piepho                      107 (0.1%)
+   Jason Jin                         105 (0.1%)
+   Liu Yu                            94 (0.1%)
+   Jon Loeliger                      88 (0.1%)
+   Stelian Pop                       77 (0.1%)
+   Alessandro Rubini                 69 (0.1%)
+   Dirk Behme                        67 (0.1%)
+   Graeme Russ                       65 (0.1%)
+   Tomohiro Masubuchi                45 (0.0%)
+   Andy Fleming                      33 (0.0%)
+   Ben Maan                          32 (0.0%)
+   Ed Swarthout                      31 (0.0%)
+   Roman Mashak                      24 (0.0%)
+   Kieran Bingham                    19 (0.0%)
+   Paul Gortmaker                    17 (0.0%)
+   Anatolij Gustschin                15 (0.0%)
+   Ilko Iliev                        15 (0.0%)
+   Yuri Tikhonov                     14 (0.0%)
+   Steven A. Falco                   12 (0.0%)
+   Shinya Kuribayashi                11 (0.0%)
+   Jens Scharsig                     11 (0.0%)
+   Roy Zang                          10 (0.0%)
+   Sergei Poselenov                  10 (0.0%)
+   Karl Beldan                       8 (0.0%)
+   David Gibson                      7 (0.0%)
+   Peter Korsgaard                   6 (0.0%)
+   Howard Gregory                    6 (0.0%)
+   Sonic Zhang                       3 (0.0%)
+   Jerry Van Baren                   2 (0.0%)
+   Daniel Hellstrom                  2 (0.0%)
+   Martin Michlmayr                  1 (0.0%)
+   Stefan Althoefer                  1 (0.0%)
+   Clive Stubbings                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   TsiChung Liew                     3057 (4.1%)
+   Michal Simek                      920 (1.2%)
+   Matthias Fuchs                    795 (1.1%)
+   Jean-Christophe PLAGNIOL-VILLARD  436 (0.6%)
+   Mike Frysinger                    279 (0.4%)
+   Timur Tabi                        170 (0.2%)
+   Dave Liu                          161 (0.2%)
+   Nobuhiro Iwamatsu                 127 (0.2%)
+   Alessandro Rubini                 68 (0.1%)
+   Jon Loeliger                      32 (0.0%)
+   Roman Mashak                      22 (0.0%)
+   Paul Gortmaker                    12 (0.0%)
+   Steven A. Falco                   9 (0.0%)
+   Andy Fleming                      8 (0.0%)
+   Dirk Behme                        3 (0.0%)
+   Ilko Iliev                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 170)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      47 (27.6%)
+   Ben Warren                        15 (8.8%)
+   Kim Phillips                      12 (7.1%)
+   Andy Fleming                      11 (6.5%)
+   Nobuhiro Iwamatsu                 10 (5.9%)
+   Wolfgang Denk                     8 (4.7%)
+   Shinya Kuribayashi                7 (4.1%)
+   Markus Klotzbuecher               6 (3.5%)
+   Remy Böhmer                       6 (3.5%)
+   Anatolij Gustschin                5 (2.9%)
+   Scott Wood                        5 (2.9%)
+   Jean-Christophe PLAGNIOL-VILLARD  4 (2.4%)
+   Alexey Neyman                     4 (2.4%)
+   Rafal Czubak                      4 (2.4%)
+   Kumar Gala                        4 (2.4%)
+   Ricardo Ribalda Delgado           3 (1.8%)
+   Victor Gallardo                   3 (1.8%)
+   Jason Jin                         3 (1.8%)
+   Mike Frysinger                    2 (1.2%)
+   James Yang                        2 (1.2%)
+   Yuri Tikhonov                     2 (1.2%)
+   Dave Liu                          1 (0.6%)
+   Vladimir Panfilov                 1 (0.6%)
+   Gerald Van Baren                  1 (0.6%)
+   Valeriy Glushkov                  1 (0.6%)
+   Nick Spence                       1 (0.6%)
+   Ilya Yanok                        1 (0.6%)
+   Haiying Wang                      1 (0.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Scott Wood                        1 (33.3%)
+   Alessandro Rubini                 1 (33.3%)
+   Martin Michlmayr                  1 (33.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Scott Wood                        1 (33.3%)
+   Alessandro Rubini                 1 (33.3%)
+   Martin Michlmayr                  1 (33.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         131 (28.2%)
+   DENX Software Engineering         83 (17.9%)
+   Analog Devices                    38 (8.2%)
+   (Unknown)                         32 (6.9%)
+   jcrosoft                          30 (6.5%)
+   Extreme Engineering Solutions     21 (4.5%)
+   ESD Electronics                   16 (3.4%)
+   Samsung                           12 (2.6%)
+   Semihalf Embedded Systems         11 (2.4%)
+   EmCraft Systems                   10 (2.2%)
+   Nobuhiro Iwamatsu                 9 (1.9%)
+   MontaVista                        8 (1.7%)
+   RuggedCom                         8 (1.7%)
+   Atmel                             7 (1.5%)
+   Oce Technologies                  7 (1.5%)
+   Renesas Electronics               6 (1.3%)
+   Xilinx                            5 (1.1%)
+   Graeme Russ                       4 (0.9%)
+   Stelian Pop                       4 (0.9%)
+   AMCC                              3 (0.6%)
+   Wind River                        3 (0.6%)
+   Ronetix                           3 (0.6%)
+   Guntermann & Drunck               2 (0.4%)
+   Barco                             2 (0.4%)
+   BuS Elektronik                    1 (0.2%)
+   Custom IDEAS                      1 (0.2%)
+   e-con Infotech                    1 (0.2%)
+   Gaisler Research                  1 (0.2%)
+   Harris Corporation                1 (0.2%)
+   Netstal-Maschinen                 1 (0.2%)
+   cTech                             1 (0.2%)
+   Xentech Solutions                 1 (0.2%)
+   Funky                             1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   jcrosoft                          56116 (49.1%)
+   Freescale                         15950 (13.9%)
+   Samsung                           15163 (13.3%)
+   DENX Software Engineering         10729 (9.4%)
+   Extreme Engineering Solutions     3736 (3.3%)
+   (Unknown)                         2600 (2.3%)
+   ESD Electronics                   1405 (1.2%)
+   Analog Devices                    1232 (1.1%)
+   Oce Technologies                  1013 (0.9%)
+   Xilinx                            935 (0.8%)
+   RuggedCom                         870 (0.8%)
+   Semihalf Embedded Systems         857 (0.7%)
+   Guntermann & Drunck               723 (0.6%)
+   EmCraft Systems                   667 (0.6%)
+   AMCC                              458 (0.4%)
+   Atmel                             369 (0.3%)
+   Netstal-Maschinen                 292 (0.3%)
+   Renesas Electronics               260 (0.2%)
+   e-con Infotech                    260 (0.2%)
+   cTech                             252 (0.2%)
+   MontaVista                        234 (0.2%)
+   Stelian Pop                       77 (0.1%)
+   Graeme Russ                       65 (0.1%)
+   Funky                             45 (0.0%)
+   Nobuhiro Iwamatsu                 22 (0.0%)
+   Wind River                        17 (0.0%)
+   Ronetix                           15 (0.0%)
+   Harris Corporation                12 (0.0%)
+   BuS Elektronik                    11 (0.0%)
+   Barco                             6 (0.0%)
+   Custom IDEAS                      2 (0.0%)
+   Gaisler Research                  2 (0.0%)
+   Xentech Solutions                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 170)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         66 (38.8%)
+   Freescale                         40 (23.5%)
+   (Unknown)                         23 (13.5%)
+   Nobuhiro Iwamatsu                 10 (5.9%)
+   EmCraft Systems                   8 (4.7%)
+   Oce Technologies                  6 (3.5%)
+   jcrosoft                          4 (2.4%)
+   Semihalf Embedded Systems         4 (2.4%)
+   AMCC                              3 (1.8%)
+   Universidad Autonoma de Madrid    3 (1.8%)
+   Analog Devices                    2 (1.2%)
+   Custom IDEAS                      1 (0.6%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 71)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         16 (22.5%)
+   Freescale                         15 (21.1%)
+   DENX Software Engineering         5 (7.0%)
+   EmCraft Systems                   3 (4.2%)
+   Semihalf Embedded Systems         2 (2.8%)
+   Analog Devices                    2 (2.8%)
+   Atmel                             2 (2.8%)
+   Nobuhiro Iwamatsu                 1 (1.4%)
+   Oce Technologies                  1 (1.4%)
+   jcrosoft                          1 (1.4%)
+   AMCC                              1 (1.4%)
+   Custom IDEAS                      1 (1.4%)
+   Samsung                           1 (1.4%)
+   Extreme Engineering Solutions     1 (1.4%)
+   ESD Electronics                   1 (1.4%)
+   Xilinx                            1 (1.4%)
+   RuggedCom                         1 (1.4%)
+   Guntermann & Drunck               1 (1.4%)
+   Netstal-Maschinen                 1 (1.4%)
+   Renesas Electronics               1 (1.4%)
+   e-con Infotech                    1 (1.4%)
+   cTech                             1 (1.4%)
+   MontaVista                        1 (1.4%)
+   Stelian Pop                       1 (1.4%)
+   Graeme Russ                       1 (1.4%)
+   Funky                             1 (1.4%)
+   Wind River                        1 (1.4%)
+   Ronetix                           1 (1.4%)
+   Harris Corporation                1 (1.4%)
+   BuS Elektronik                    1 (1.4%)
+   Barco                             1 (1.4%)
+   Gaisler Research                  1 (1.4%)
+   Xentech Solutions                 1 (1.4%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2009.03.rst b/doc/develop/statistics/u-boot-stats-v2009.03.rst
new file mode 100644
index 00000000000..bff94f07304
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2009.03.rst
@@ -0,0 +1,526 @@
+:orphan:
+
+Release Statistics for U-Boot v2009.03
+======================================
+
+* Processed 489 changesets from 90 developers
+
+* 46 employers found
+
+* A total of 55137 lines added, 8339 removed (delta 46798)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    92 (18.8%)
+   Heiko Schocher                    31 (6.3%)
+   Stefan Roese                      28 (5.7%)
+   Kumar Gala                        23 (4.7%)
+   Wolfgang Denk                     21 (4.3%)
+   Dirk Behme                        20 (4.1%)
+   Jean-Christophe PLAGNIOL-VILLARD  20 (4.1%)
+   Andy Fleming                      14 (2.9%)
+   Richard Retanubun                 12 (2.5%)
+   Becky Bruce                       12 (2.5%)
+   Peter Tyser                       12 (2.5%)
+   Anton Vorontsov                   10 (2.0%)
+   Graeme Russ                       10 (2.0%)
+   Guennadi Liakhovetski             9 (1.8%)
+   Wolfgang Grandegger               9 (1.8%)
+   Dave Liu                          8 (1.6%)
+   Michael Trimarchi                 8 (1.6%)
+   Yoshihiro Shimoda                 7 (1.4%)
+   Matthias Fuchs                    7 (1.4%)
+   Abraham, Thomas                   7 (1.4%)
+   Michal Simek                      6 (1.2%)
+   Nobuhiro Iwamatsu                 5 (1.0%)
+   TsiChung Liew                     5 (1.0%)
+   Dirk Eibach                       5 (1.0%)
+   Kim Phillips                      4 (0.8%)
+   Valeriy Glushkov                  4 (0.8%)
+   Alessandro Rubini                 4 (0.8%)
+   Ron Madrid                        4 (0.8%)
+   Ilya Yanok                        4 (0.8%)
+   Rafal Jaworowski                  4 (0.8%)
+   Shinya Kuribayashi                3 (0.6%)
+   Tom Rix                           3 (0.6%)
+   John Rigby                        3 (0.6%)
+   Bryan Wu                          3 (0.6%)
+   Remy Bohmer                       2 (0.4%)
+   Jon Smirl                         2 (0.4%)
+   Anatolij Gustschin                2 (0.4%)
+   Ladislav Michl                    2 (0.4%)
+   Scott Wood                        2 (0.4%)
+   Jerry Van Baren                   2 (0.4%)
+   ksi@koi8.net                      2 (0.4%)
+   Ben Warren                        2 (0.4%)
+   Jens Gehrlein                     2 (0.4%)
+   Nishanth Menon                    2 (0.4%)
+   Larry Johnson                     2 (0.4%)
+   michael                           2 (0.4%)
+   Gary Jennejohn                    2 (0.4%)
+   Haiying Wang                      2 (0.4%)
+   Kyungmin Park                     2 (0.4%)
+   Ira Snyder                        2 (0.4%)
+   Vivek Kutal                       1 (0.2%)
+   Grzegorz Bernacki                 1 (0.2%)
+   arun c                            1 (0.2%)
+   Mikhail Zolotaryov                1 (0.2%)
+   Norbert van Bolhuis               1 (0.2%)
+   Yusuke.Goda                       1 (0.2%)
+   Paul Gortmaker                    1 (0.2%)
+   Ed Swarthout                      1 (0.2%)
+   Mark Jackson                      1 (0.2%)
+   Pieter Henning                    1 (0.2%)
+   Hugo Villeneuve                   1 (0.2%)
+   Derek Ou                          1 (0.2%)
+   Peter Griffin                     1 (0.2%)
+   Minkyu Kang                       1 (0.2%)
+   Micha Kalfon                      1 (0.2%)
+   Petri Lehtinen                    1 (0.2%)
+   Poonam_Aggrwal-b10812             1 (0.2%)
+   Srikanth Srinivasan               1 (0.2%)
+   Atin Malaviya                     1 (0.2%)
+   Carolyn Smith                     1 (0.2%)
+   Adam Graham                       1 (0.2%)
+   Sonic Zhang                       1 (0.2%)
+   Simon Munton                      1 (0.2%)
+   derek@siconix.com                 1 (0.2%)
+   Ralph Kondziella                  1 (0.2%)
+   Martha Marx                       1 (0.2%)
+   Cliff Cai                         1 (0.2%)
+   Gunnar Rangoy                     1 (0.2%)
+   Olav Morken                       1 (0.2%)
+   Tomasz Figa                       1 (0.2%)
+   Andrew Dyer                       1 (0.2%)
+   Stefan Althoefer                  1 (0.2%)
+   Maxim Artamonov                   1 (0.2%)
+   Brad Bozarth                      1 (0.2%)
+   Yuri Tikhonov                     1 (0.2%)
+   Peter Korsgaard                   1 (0.2%)
+   Niklaus Giger                     1 (0.2%)
+   Sergei Poselenov                  1 (0.2%)
+   Schlaegl Manfred jun              1 (0.2%)
+   Haavard Skinnemoen                1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Dirk Behme                        11275 (19.9%)
+   Wolfgang Denk                     8001 (14.1%)
+   Stefan Roese                      5794 (10.2%)
+   Mike Frysinger                    4516 (8.0%)
+   Heiko Schocher                    3620 (6.4%)
+   Andy Fleming                      2180 (3.9%)
+   Sonic Zhang                       1595 (2.8%)
+   Abraham, Thomas                   1545 (2.7%)
+   Michael Trimarchi                 1538 (2.7%)
+   Alessandro Rubini                 1304 (2.3%)
+   Ilya Yanok                        1304 (2.3%)
+   Guennadi Liakhovetski             1303 (2.3%)
+   Peter Tyser                       1280 (2.3%)
+   Ron Madrid                        1243 (2.2%)
+   Dirk Eibach                       927 (1.6%)
+   Graeme Russ                       902 (1.6%)
+   Kumar Gala                        876 (1.5%)
+   Anton Vorontsov                   791 (1.4%)
+   Cliff Cai                         729 (1.3%)
+   Jean-Christophe PLAGNIOL-VILLARD  560 (1.0%)
+   Yoshihiro Shimoda                 481 (0.8%)
+   Martha Marx                       449 (0.8%)
+   Kyungmin Park                     439 (0.8%)
+   Becky Bruce                       369 (0.7%)
+   michael                           368 (0.7%)
+   Nobuhiro Iwamatsu                 358 (0.6%)
+   Matthias Fuchs                    342 (0.6%)
+   Wolfgang Grandegger               268 (0.5%)
+   Haiying Wang                      196 (0.3%)
+   Ralph Kondziella                  189 (0.3%)
+   Richard Retanubun                 176 (0.3%)
+   Michal Simek                      134 (0.2%)
+   Remy Bohmer                       108 (0.2%)
+   Hugo Villeneuve                   105 (0.2%)
+   Dave Liu                          103 (0.2%)
+   Rafal Jaworowski                  96 (0.2%)
+   Nishanth Menon                    93 (0.2%)
+   Tomasz Figa                       92 (0.2%)
+   Larry Johnson                     86 (0.2%)
+   Gary Jennejohn                    78 (0.1%)
+   Tom Rix                           67 (0.1%)
+   Ben Warren                        53 (0.1%)
+   Adam Graham                       47 (0.1%)
+   John Rigby                        43 (0.1%)
+   Mark Jackson                      41 (0.1%)
+   Micha Kalfon                      33 (0.1%)
+   Valeriy Glushkov                  32 (0.1%)
+   Srikanth Srinivasan               32 (0.1%)
+   Gunnar Rangoy                     31 (0.1%)
+   TsiChung Liew                     30 (0.1%)
+   Pieter Henning                    30 (0.1%)
+   Yuri Tikhonov                     30 (0.1%)
+   Poonam_Aggrwal-b10812             25 (0.0%)
+   Jon Smirl                         23 (0.0%)
+   Jens Gehrlein                     23 (0.0%)
+   Ladislav Michl                    22 (0.0%)
+   Petri Lehtinen                    22 (0.0%)
+   Andrew Dyer                       20 (0.0%)
+   Bryan Wu                          16 (0.0%)
+   Scott Wood                        16 (0.0%)
+   Jerry Van Baren                   16 (0.0%)
+   Peter Korsgaard                   14 (0.0%)
+   Niklaus Giger                     14 (0.0%)
+   Ira Snyder                        13 (0.0%)
+   Kim Phillips                      11 (0.0%)
+   Atin Malaviya                     11 (0.0%)
+   Sergei Poselenov                  10 (0.0%)
+   Anatolij Gustschin                8 (0.0%)
+   Haavard Skinnemoen                7 (0.0%)
+   Vivek Kutal                       6 (0.0%)
+   Carolyn Smith                     5 (0.0%)
+   Paul Gortmaker                    4 (0.0%)
+   Minkyu Kang                       4 (0.0%)
+   derek@siconix.com                 4 (0.0%)
+   Brad Bozarth                      4 (0.0%)
+   Schlaegl Manfred jun              4 (0.0%)
+   arun c                            3 (0.0%)
+   Shinya Kuribayashi                2 (0.0%)
+   ksi@koi8.net                      2 (0.0%)
+   Grzegorz Bernacki                 2 (0.0%)
+   Ed Swarthout                      2 (0.0%)
+   Mikhail Zolotaryov                1 (0.0%)
+   Norbert van Bolhuis               1 (0.0%)
+   Yusuke.Goda                       1 (0.0%)
+   Derek Ou                          1 (0.0%)
+   Peter Griffin                     1 (0.0%)
+   Simon Munton                      1 (0.0%)
+   Olav Morken                       1 (0.0%)
+   Stefan Althoefer                  1 (0.0%)
+   Maxim Artamonov                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Matthias Fuchs                    73 (0.9%)
+   Tom Rix                           64 (0.8%)
+   Ladislav Michl                    7 (0.1%)
+   Haavard Skinnemoen                5 (0.1%)
+   Becky Bruce                       4 (0.0%)
+   Hugo Villeneuve                   4 (0.0%)
+   Ben Warren                        4 (0.0%)
+   Carolyn Smith                     3 (0.0%)
+   Ira Snyder                        1 (0.0%)
+   Paul Gortmaker                    1 (0.0%)
+   Schlaegl Manfred jun              1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 207)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kim Phillips                      32 (15.5%)
+   Remy Bohmer                       29 (14.0%)
+   Stefan Roese                      24 (11.6%)
+   Ben Warren                        18 (8.7%)
+   Scott Wood                        15 (7.2%)
+   Nobuhiro Iwamatsu                 7 (3.4%)
+   Mike Frysinger                    7 (3.4%)
+   Jason Kridner                     5 (2.4%)
+   Ravi Babu                         5 (2.4%)
+   Swaminathan S                     5 (2.4%)
+   Ajay Kumar Gupta                  5 (2.4%)
+   Jean-Christophe PLAGNIOL-VILLARD  4 (1.9%)
+   Wolfgang Denk                     4 (1.9%)
+   Steve Sakoman                     3 (1.4%)
+   Rafal Czubak                      3 (1.4%)
+   Michael Trimarchi                 3 (1.4%)
+   Derek Ou                          2 (1.0%)
+   Gerald Van Baren                  2 (1.0%)
+   Grazvydas Ignotas                 2 (1.0%)
+   Paul Driveklepp                   2 (1.0%)
+   Shinya Kuribayashi                2 (1.0%)
+   Nishanth Menon                    2 (1.0%)
+   Jens Gehrlein                     2 (1.0%)
+   John Rigby                        2 (1.0%)
+   Kumar Gala                        2 (1.0%)
+   Matthias Fuchs                    1 (0.5%)
+   Becky Bruce                       1 (0.5%)
+   Olav Morken                       1 (0.5%)
+   Arun C                            1 (0.5%)
+   Poonam_Agarwal-b10812             1 (0.5%)
+   Travis Wheatley                   1 (0.5%)
+   Robin Getz                        1 (0.5%)
+   Manikandan Pillai                 1 (0.5%)
+   Stelian Pop                       1 (0.5%)
+   Syed Mohammed Khasim              1 (0.5%)
+   James Yang                        1 (0.5%)
+   Tony Li                           1 (0.5%)
+   Valeriy Glushkov                  1 (0.5%)
+   Gunnar Rangoy                     1 (0.5%)
+   Martha Marx                       1 (0.5%)
+   Peter Tyser                       1 (0.5%)
+   Dirk Eibach                       1 (0.5%)
+   Guennadi Liakhovetski             1 (0.5%)
+   Sonic Zhang                       1 (0.5%)
+   Heiko Schocher                    1 (0.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Joakim Tjernlund                  1 (33.3%)
+   Huang Changming                   1 (33.3%)
+   Suchit Lepcha                     1 (33.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Scott Wood                        1 (33.3%)
+   Dave Liu                          1 (33.3%)
+   Anton Vorontsov                   1 (33.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         102 (20.9%)
+   Analog Devices                    97 (19.8%)
+   Freescale                         76 (15.5%)
+   (Unknown)                         31 (6.3%)
+   jcrosoft                          20 (4.1%)
+   Dirk Behme                        20 (4.1%)
+   Renesas Electronics               13 (2.7%)
+   RuggedCom                         12 (2.5%)
+   Extreme Engineering Solutions     12 (2.5%)
+   MontaVista                        10 (2.0%)
+   Graeme Russ                       10 (2.0%)
+   Texas Instruments                 9 (1.8%)
+   ESD Electronics                   7 (1.4%)
+   EmCraft Systems                   6 (1.2%)
+   Xilinx                            6 (1.2%)
+   Guntermann & Drunck               5 (1.0%)
+   Semihalf Embedded Systems         5 (1.0%)
+   Wind River                        4 (0.8%)
+   Universita di Pavia               4 (0.8%)
+   Sheldon Instruments               4 (0.8%)
+   Samsung                           3 (0.6%)
+   ACM                               2 (0.4%)
+   Custom IDEAS                      2 (0.4%)
+   OVRO                              2 (0.4%)
+   Siconix Inc.                      2 (0.4%)
+   TQ Systems                        2 (0.4%)
+   Jon Smirl                         2 (0.4%)
+   Sergey Kubushyn                   2 (0.4%)
+   Oce Technologies                  2 (0.4%)
+   AMCC                              1 (0.2%)
+   Argos Meßtechnik GmbH             1 (0.2%)
+   Atmel                             1 (0.2%)
+   Azingo                            1 (0.2%)
+   Inoi Oy                           1 (0.2%)
+   Lyrtech                           1 (0.2%)
+   Mercury IMC Ltd.                  1 (0.2%)
+   MPC Data                          1 (0.2%)
+   NEC                               1 (0.2%)
+   Netstal-Maschinen                 1 (0.2%)
+   RightHand Technologies            1 (0.2%)
+   Silicon Turnkey Express           1 (0.2%)
+   Tektronix                         1 (0.2%)
+   VASTech SA                        1 (0.2%)
+   Radiient Technologies             1 (0.2%)
+   Barco                             1 (0.2%)
+   Micha Kalfon                      1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         19072 (33.7%)
+   Dirk Behme                        11275 (19.9%)
+   Analog Devices                    6856 (12.1%)
+   Freescale                         3883 (6.9%)
+   (Unknown)                         2161 (3.8%)
+   Texas Instruments                 1638 (2.9%)
+   EmCraft Systems                   1344 (2.4%)
+   Universita di Pavia               1304 (2.3%)
+   Extreme Engineering Solutions     1280 (2.3%)
+   Sheldon Instruments               1243 (2.2%)
+   Guntermann & Drunck               927 (1.6%)
+   Graeme Russ                       902 (1.6%)
+   Renesas Electronics               840 (1.5%)
+   MontaVista                        791 (1.4%)
+   jcrosoft                          560 (1.0%)
+   Silicon Turnkey Express           449 (0.8%)
+   Samsung                           443 (0.8%)
+   ESD Electronics                   342 (0.6%)
+   Argos Meßtechnik GmbH             189 (0.3%)
+   RuggedCom                         176 (0.3%)
+   Xilinx                            134 (0.2%)
+   Oce Technologies                  108 (0.2%)
+   Lyrtech                           105 (0.2%)
+   Semihalf Embedded Systems         98 (0.2%)
+   ACM                               86 (0.2%)
+   Wind River                        71 (0.1%)
+   AMCC                              47 (0.1%)
+   Mercury IMC Ltd.                  41 (0.1%)
+   Micha Kalfon                      33 (0.1%)
+   VASTech SA                        30 (0.1%)
+   TQ Systems                        23 (0.0%)
+   Jon Smirl                         23 (0.0%)
+   Inoi Oy                           22 (0.0%)
+   RightHand Technologies            20 (0.0%)
+   Custom IDEAS                      16 (0.0%)
+   Netstal-Maschinen                 14 (0.0%)
+   Barco                             14 (0.0%)
+   OVRO                              13 (0.0%)
+   Atmel                             7 (0.0%)
+   Azingo                            6 (0.0%)
+   Siconix Inc.                      5 (0.0%)
+   Tektronix                         5 (0.0%)
+   Radiient Technologies             4 (0.0%)
+   Sergey Kubushyn                   2 (0.0%)
+   MPC Data                          1 (0.0%)
+   NEC                               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 207)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         56 (27.1%)
+   DENX Software Engineering         30 (14.5%)
+   Oce Technologies                  29 (14.0%)
+   (Unknown)                         28 (13.5%)
+   Texas Instruments                 24 (11.6%)
+   Analog Devices                    9 (4.3%)
+   Nobuhiro Iwamatsu                 7 (3.4%)
+   jcrosoft                          4 (1.9%)
+   Semihalf Embedded Systems         3 (1.4%)
+   Sakoman Inc.                      3 (1.4%)
+   TQ Systems                        2 (1.0%)
+   Custom IDEAS                      2 (1.0%)
+   Siconix Inc.                      2 (1.0%)
+   Grazvydas Ignotas                 2 (1.0%)
+   Extreme Engineering Solutions     1 (0.5%)
+   Guntermann & Drunck               1 (0.5%)
+   Silicon Turnkey Express           1 (0.5%)
+   ESD Electronics                   1 (0.5%)
+   Mistral                           1 (0.5%)
+   Stelian Pop                       1 (0.5%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 91)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         17 (18.7%)
+   Freescale                         12 (13.2%)
+   DENX Software Engineering         7 (7.7%)
+   Analog Devices                    4 (4.4%)
+   EmCraft Systems                   3 (3.3%)
+   Renesas Electronics               3 (3.3%)
+   Texas Instruments                 2 (2.2%)
+   Semihalf Embedded Systems         2 (2.2%)
+   Siconix Inc.                      2 (2.2%)
+   Samsung                           2 (2.2%)
+   Wind River                        2 (2.2%)
+   Oce Technologies                  1 (1.1%)
+   jcrosoft                          1 (1.1%)
+   TQ Systems                        1 (1.1%)
+   Custom IDEAS                      1 (1.1%)
+   Extreme Engineering Solutions     1 (1.1%)
+   Guntermann & Drunck               1 (1.1%)
+   Silicon Turnkey Express           1 (1.1%)
+   ESD Electronics                   1 (1.1%)
+   Dirk Behme                        1 (1.1%)
+   Universita di Pavia               1 (1.1%)
+   Sheldon Instruments               1 (1.1%)
+   Graeme Russ                       1 (1.1%)
+   MontaVista                        1 (1.1%)
+   Argos Meßtechnik GmbH             1 (1.1%)
+   RuggedCom                         1 (1.1%)
+   Xilinx                            1 (1.1%)
+   Lyrtech                           1 (1.1%)
+   ACM                               1 (1.1%)
+   AMCC                              1 (1.1%)
+   Mercury IMC Ltd.                  1 (1.1%)
+   Micha Kalfon                      1 (1.1%)
+   VASTech SA                        1 (1.1%)
+   Jon Smirl                         1 (1.1%)
+   Inoi Oy                           1 (1.1%)
+   RightHand Technologies            1 (1.1%)
+   Netstal-Maschinen                 1 (1.1%)
+   Barco                             1 (1.1%)
+   OVRO                              1 (1.1%)
+   Atmel                             1 (1.1%)
+   Azingo                            1 (1.1%)
+   Tektronix                         1 (1.1%)
+   Radiient Technologies             1 (1.1%)
+   Sergey Kubushyn                   1 (1.1%)
+   MPC Data                          1 (1.1%)
+   NEC                               1 (1.1%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2009.06.rst b/doc/develop/statistics/u-boot-stats-v2009.06.rst
new file mode 100644
index 00000000000..9e2f3ba725d
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2009.06.rst
@@ -0,0 +1,432 @@
+:orphan:
+
+Release Statistics for U-Boot v2009.06
+======================================
+
+* Processed 433 changesets from 74 developers
+
+* 27 employers found
+
+* A total of 52469 lines added, 17023 removed (delta 35446)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    95 (21.9%)
+   Jean-Christophe PLAGNIOL-VILLARD  55 (12.7%)
+   Peter Tyser                       32 (7.4%)
+   Wolfgang Denk                     29 (6.7%)
+   Stefan Roese                      24 (5.5%)
+   Detlev Zundel                     15 (3.5%)
+   Kumar Gala                        12 (2.8%)
+   Ladislav Michl                    12 (2.8%)
+   Haavard Skinnemoen                9 (2.1%)
+   Haiying Wang                      8 (1.8%)
+   Scott Wood                        7 (1.6%)
+   Matthias Fuchs                    6 (1.4%)
+   Graeme Russ                       6 (1.4%)
+   Dave Liu                          5 (1.2%)
+   Rabin Vincent                     5 (1.2%)
+   Heiko Schocher                    5 (1.2%)
+   David Brownell                    5 (1.2%)
+   Wolfgang Grandegger               5 (1.2%)
+   Shinya Kuribayashi                4 (0.9%)
+   Kim Phillips                      4 (0.9%)
+   Graf Yang                         4 (0.9%)
+   Dirk Behme                        4 (0.9%)
+   Sanjeev Premi                     4 (0.9%)
+   Daniel Mack                       3 (0.7%)
+   Ricardo Ribalda                   3 (0.7%)
+   Minkyu Kang                       3 (0.7%)
+   Guennadi Liakhovetski             3 (0.7%)
+   Jon Smirl                         3 (0.7%)
+   Mark Jackson                      3 (0.7%)
+   Olav Morken                       3 (0.7%)
+   Remy Bohmer                       2 (0.5%)
+   RONETIX - Ilko Iliev              2 (0.5%)
+   Yoshihiro Shimoda                 2 (0.5%)
+   Manikandan Pillai                 2 (0.5%)
+   Yauhen Kharuzhy                   2 (0.5%)
+   Andreas Huber                     2 (0.5%)
+   Emil Medve                        2 (0.5%)
+   Sascha Hauer                      2 (0.5%)
+   Anatolij Gustschin                2 (0.5%)
+   Kyungmin Park                     2 (0.5%)
+   Tom Rix                           2 (0.5%)
+   Mingkai Hu                        2 (0.5%)
+   David Gibson                      2 (0.5%)
+   Ben Warren                        1 (0.2%)
+   Fredrik Arnerup                   1 (0.2%)
+   Felix Radensky                    1 (0.2%)
+   Ilya Yanok                        1 (0.2%)
+   Thomas Lange                      1 (0.2%)
+   Rohit Hagargundgi                 1 (0.2%)
+   Marco Stornelli                   1 (0.2%)
+   Sergey Lapin                      1 (0.2%)
+   Daniel Gorsulowski                1 (0.2%)
+   Adrian Hunter                     1 (0.2%)
+   Gao Guanhua                       1 (0.2%)
+   Michael Zaidman                   1 (0.2%)
+   Timur Tabi                        1 (0.2%)
+   Todor I Mollov                    1 (0.2%)
+   Becky Bruce                       1 (0.2%)
+   Peter Korsgaard                   1 (0.2%)
+   Alan Carvalho de Assis            1 (0.2%)
+   Artem Bityutskiy                  1 (0.2%)
+   Ulf Samuelsson                    1 (0.2%)
+   Nicolas Ferre                     1 (0.2%)
+   unsik Kim                         1 (0.2%)
+   apgmoorthy                        1 (0.2%)
+   Laurent Gregoire                  1 (0.2%)
+   Jens Scharsig                     1 (0.2%)
+   Nishanth Menon                    1 (0.2%)
+   Sonic Zhang                       1 (0.2%)
+   Eric Schumann                     1 (0.2%)
+   Michael Lawnick                   1 (0.2%)
+   Grzegorz Bernacki                 1 (0.2%)
+   Trent Piepho                      1 (0.2%)
+   Gunnar Rangoy                     1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      21338 (36.5%)
+   Mike Frysinger                    7887 (13.5%)
+   Wolfgang Denk                     5938 (10.2%)
+   Jean-Christophe PLAGNIOL-VILLARD  4888 (8.4%)
+   Detlev Zundel                     1771 (3.0%)
+   Haiying Wang                      1577 (2.7%)
+   RONETIX - Ilko Iliev              1344 (2.3%)
+   Graeme Russ                       1331 (2.3%)
+   Haavard Skinnemoen                1272 (2.2%)
+   unsik Kim                         1080 (1.8%)
+   Remy Bohmer                       1054 (1.8%)
+   Dave Liu                          868 (1.5%)
+   Kumar Gala                        830 (1.4%)
+   Grzegorz Bernacki                 788 (1.3%)
+   Peter Tyser                       751 (1.3%)
+   Ladislav Michl                    750 (1.3%)
+   Ulf Samuelsson                    747 (1.3%)
+   Trent Piepho                      738 (1.3%)
+   Matthias Fuchs                    678 (1.2%)
+   Marco Stornelli                   433 (0.7%)
+   Mingkai Hu                        374 (0.6%)
+   Sanjeev Premi                     177 (0.3%)
+   Scott Wood                        174 (0.3%)
+   Dirk Behme                        148 (0.3%)
+   Wolfgang Grandegger               127 (0.2%)
+   Heiko Schocher                    115 (0.2%)
+   Manikandan Pillai                 105 (0.2%)
+   David Gibson                      95 (0.2%)
+   Gunnar Rangoy                     88 (0.2%)
+   Graf Yang                         72 (0.1%)
+   Artem Bityutskiy                  71 (0.1%)
+   Minkyu Kang                       63 (0.1%)
+   Michael Zaidman                   59 (0.1%)
+   Olav Morken                       53 (0.1%)
+   Tom Rix                           53 (0.1%)
+   Kyungmin Park                     52 (0.1%)
+   Rabin Vincent                     47 (0.1%)
+   Adrian Hunter                     47 (0.1%)
+   Nicolas Ferre                     47 (0.1%)
+   apgmoorthy                        44 (0.1%)
+   Shinya Kuribayashi                35 (0.1%)
+   Anatolij Gustschin                35 (0.1%)
+   Kim Phillips                      29 (0.0%)
+   Ricardo Ribalda                   26 (0.0%)
+   Mark Jackson                      26 (0.0%)
+   Andreas Huber                     25 (0.0%)
+   Jon Smirl                         24 (0.0%)
+   David Brownell                    20 (0.0%)
+   Ben Warren                        19 (0.0%)
+   Yoshihiro Shimoda                 18 (0.0%)
+   Becky Bruce                       18 (0.0%)
+   Daniel Mack                       15 (0.0%)
+   Todor I Mollov                    15 (0.0%)
+   Guennadi Liakhovetski             14 (0.0%)
+   Sascha Hauer                      14 (0.0%)
+   Yauhen Kharuzhy                   9 (0.0%)
+   Felix Radensky                    6 (0.0%)
+   Jens Scharsig                     5 (0.0%)
+   Nishanth Menon                    5 (0.0%)
+   Sonic Zhang                       5 (0.0%)
+   Ilya Yanok                        4 (0.0%)
+   Thomas Lange                      4 (0.0%)
+   Michael Lawnick                   4 (0.0%)
+   Eric Schumann                     3 (0.0%)
+   Emil Medve                        2 (0.0%)
+   Sergey Lapin                      2 (0.0%)
+   Gao Guanhua                       2 (0.0%)
+   Fredrik Arnerup                   1 (0.0%)
+   Rohit Hagargundgi                 1 (0.0%)
+   Daniel Gorsulowski                1 (0.0%)
+   Timur Tabi                        1 (0.0%)
+   Peter Korsgaard                   1 (0.0%)
+   Alan Carvalho de Assis            1 (0.0%)
+   Laurent Gregoire                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Ladislav Michl                    550 (3.2%)
+   Trent Piepho                      405 (2.4%)
+   Matthias Fuchs                    262 (1.5%)
+   Kumar Gala                        232 (1.4%)
+   Dirk Behme                        103 (0.6%)
+   Michael Zaidman                   55 (0.3%)
+   David Gibson                      34 (0.2%)
+   Kyungmin Park                     33 (0.2%)
+   Adrian Hunter                     24 (0.1%)
+   Kim Phillips                      24 (0.1%)
+   Tom Rix                           17 (0.1%)
+   Scott Wood                        10 (0.1%)
+   Manikandan Pillai                 6 (0.0%)
+   David Brownell                    4 (0.0%)
+   Yauhen Kharuzhy                   4 (0.0%)
+   Jens Scharsig                     4 (0.0%)
+   Ilya Yanok                        4 (0.0%)
+   Sonic Zhang                       2 (0.0%)
+   Shinya Kuribayashi                1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 104)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      11 (10.6%)
+   Mike Frysinger                    10 (9.6%)
+   Kumar Gala                        9 (8.7%)
+   Ben Warren                        8 (7.7%)
+   Haavard Skinnemoen                8 (7.7%)
+   Scott Wood                        7 (6.7%)
+   Jean-Christophe PLAGNIOL-VILLARD  7 (6.7%)
+   Andreas Pfefferle                 4 (3.8%)
+   Paul Driveklepp                   4 (3.8%)
+   Kim Phillips                      3 (2.9%)
+   Andy Fleming                      3 (2.9%)
+   Steve Sakoman                     3 (2.9%)
+   Ricardo Ribalda Delgado           3 (2.9%)
+   Gunnar Rangoy                     3 (2.9%)
+   Remy Bohmer                       3 (2.9%)
+   Wolfgang Denk                     3 (2.9%)
+   Hillel Avni                       2 (1.9%)
+   Dirk Behme                        1 (1.0%)
+   Kyungmin Park                     1 (1.0%)
+   Shinya Kuribayashi                1 (1.0%)
+   Yu Liu                            1 (1.0%)
+   Vivek Kutal                       1 (1.0%)
+   Travis Wheatley                   1 (1.0%)
+   Justin Waters                     1 (1.0%)
+   Rohit Hagargundgi                 1 (1.0%)
+   Sascha Hauer                      1 (1.0%)
+   Olav Morken                       1 (1.0%)
+   Becky Bruce                       1 (1.0%)
+   Nicolas Ferre                     1 (1.0%)
+   Dave Liu                          1 (1.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   David Hawkins                     1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 8)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Nobuhiro Iwamatsu                 2 (25.0%)
+   Stefan Roese                      1 (12.5%)
+   Sergey Lapin                      1 (12.5%)
+   Mikhail Zaturenskiy               1 (12.5%)
+   Paul Gortmaker                    1 (12.5%)
+   Eric BENARD                       1 (12.5%)
+   Heiko Schocher                    1 (12.5%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 8)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     4 (50.0%)
+   Jean-Christophe PLAGNIOL-VILLARD  2 (25.0%)
+   Kim Phillips                      1 (12.5%)
+   Yoshihiro Shimoda                 1 (12.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     2 (66.7%)
+   Joakim Tjernlund                  1 (33.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Guennadi Liakhovetski             2 (66.7%)
+   Dave Liu                          1 (33.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Analog Devices                    100 (23.1%)
+   DENX Software Engineering         83 (19.2%)
+   jcrosoft                          55 (12.7%)
+   (Unknown)                         51 (11.8%)
+   Freescale                         44 (10.2%)
+   Extreme Engineering Solutions     32 (7.4%)
+   Atmel                             11 (2.5%)
+   ESD Electronics                   7 (1.6%)
+   Samsung                           7 (1.6%)
+   Texas Instruments                 7 (1.6%)
+   Graeme Russ                       6 (1.4%)
+   Dirk Behme                        4 (0.9%)
+   Mercury IMC Ltd.                  3 (0.7%)
+   Jon Smirl                         3 (0.7%)
+   Wind River                        2 (0.5%)
+   Keymile                           2 (0.5%)
+   Nokia                             2 (0.5%)
+   Pengutronix                       2 (0.5%)
+   Renesas Electronics               2 (0.5%)
+   Ronetix                           2 (0.5%)
+   Oce Technologies                  2 (0.5%)
+   BuS Elektronik                    1 (0.2%)
+   EmCraft Systems                   1 (0.2%)
+   NEC                               1 (0.2%)
+   Phytec                            1 (0.2%)
+   Semihalf Embedded Systems         1 (0.2%)
+   Barco                             1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         29338 (50.2%)
+   Analog Devices                    7964 (13.6%)
+   jcrosoft                          4888 (8.4%)
+   Freescale                         4613 (7.9%)
+   (Unknown)                         2763 (4.7%)
+   Atmel                             2066 (3.5%)
+   Ronetix                           1344 (2.3%)
+   Graeme Russ                       1331 (2.3%)
+   Oce Technologies                  1054 (1.8%)
+   Semihalf Embedded Systems         788 (1.3%)
+   Extreme Engineering Solutions     751 (1.3%)
+   ESD Electronics                   679 (1.2%)
+   Texas Instruments                 287 (0.5%)
+   Samsung                           160 (0.3%)
+   Dirk Behme                        148 (0.3%)
+   Nokia                             118 (0.2%)
+   Wind River                        53 (0.1%)
+   Mercury IMC Ltd.                  26 (0.0%)
+   Keymile                           25 (0.0%)
+   Jon Smirl                         24 (0.0%)
+   Renesas Electronics               18 (0.0%)
+   Pengutronix                       14 (0.0%)
+   BuS Elektronik                    5 (0.0%)
+   EmCraft Systems                   4 (0.0%)
+   Phytec                            3 (0.0%)
+   Barco                             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 104)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         28 (26.9%)
+   DENX Software Engineering         18 (17.3%)
+   (Unknown)                         18 (17.3%)
+   Analog Devices                    10 (9.6%)
+   Atmel                             9 (8.7%)
+   jcrosoft                          7 (6.7%)
+   Oce Technologies                  3 (2.9%)
+   Sakoman Inc.                      3 (2.9%)
+   Universidad Autonoma de Madrid    3 (2.9%)
+   Samsung                           2 (1.9%)
+   Dirk Behme                        1 (1.0%)
+   Pengutronix                       1 (1.0%)
+   Azingo                            1 (1.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 75)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         22 (29.3%)
+   Freescale                         11 (14.7%)
+   DENX Software Engineering         7 (9.3%)
+   Samsung                           4 (5.3%)
+   Analog Devices                    3 (4.0%)
+   Atmel                             3 (4.0%)
+   Texas Instruments                 3 (4.0%)
+   ESD Electronics                   2 (2.7%)
+   Nokia                             2 (2.7%)
+   jcrosoft                          1 (1.3%)
+   Oce Technologies                  1 (1.3%)
+   Dirk Behme                        1 (1.3%)
+   Pengutronix                       1 (1.3%)
+   Ronetix                           1 (1.3%)
+   Graeme Russ                       1 (1.3%)
+   Semihalf Embedded Systems         1 (1.3%)
+   Extreme Engineering Solutions     1 (1.3%)
+   Wind River                        1 (1.3%)
+   Mercury IMC Ltd.                  1 (1.3%)
+   Keymile                           1 (1.3%)
+   Jon Smirl                         1 (1.3%)
+   Renesas Electronics               1 (1.3%)
+   BuS Elektronik                    1 (1.3%)
+   EmCraft Systems                   1 (1.3%)
+   Phytec                            1 (1.3%)
+   Barco                             1 (1.3%)
+   NEC                               1 (1.3%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2009.08.rst b/doc/develop/statistics/u-boot-stats-v2009.08.rst
new file mode 100644
index 00000000000..f9711b833ed
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2009.08.rst
@@ -0,0 +1,514 @@
+:orphan:
+
+Release Statistics for U-Boot v2009.08
+======================================
+
+* Processed 657 changesets from 96 developers
+
+* 35 employers found
+
+* A total of 84239 lines added, 52495 removed (delta 31744)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     75 (11.4%)
+   Peter Tyser                       69 (10.5%)
+   Jean-Christophe PLAGNIOL-VILLARD  57 (8.7%)
+   Mike Frysinger                    56 (8.5%)
+   Stefan Roese                      40 (6.1%)
+   Prafulla Wadaskar                 23 (3.5%)
+   Tom Rix                           22 (3.3%)
+   David Brownell                    17 (2.6%)
+   Kumar Gala                        16 (2.4%)
+   Matthias Fuchs                    16 (2.4%)
+   Kim Phillips                      13 (2.0%)
+   Heiko Schocher                    12 (1.8%)
+   Simon Kagstrom                    10 (1.5%)
+   Alessandro Rubini                 10 (1.5%)
+   Haiying Wang                      10 (1.5%)
+   TsiChung Liew                     9 (1.4%)
+   Ilya Yanok                        8 (1.2%)
+   Dirk Behme                        8 (1.2%)
+   Vivek Mahajan                     8 (1.2%)
+   Ben Warren                        7 (1.1%)
+   Richard Retanubun                 7 (1.1%)
+   Anatolij Gustschin                7 (1.1%)
+   Mark Jackson                      6 (0.9%)
+   Sandeep Paulraj                   6 (0.9%)
+   Grzegorz Bernacki                 6 (0.9%)
+   Anton Vorontsov                   6 (0.9%)
+   Magnus Lilja                      5 (0.8%)
+   Michal Simek                      4 (0.6%)
+   Roy Zang                          4 (0.6%)
+   Detlev Zundel                     4 (0.6%)
+   Dirk Eibach                       4 (0.6%)
+   Nobuhiro Iwamatsu                 4 (0.6%)
+   Grazvydas Ignotas                 4 (0.6%)
+   Andre Schwarz                     3 (0.5%)
+   Albin Tonnerre                    3 (0.5%)
+   Paul Gortmaker                    3 (0.5%)
+   Scott Wood                        3 (0.5%)
+   Timur Tabi                        3 (0.5%)
+   Giuseppe CONDORELLI               3 (0.5%)
+   Po-Yu Chuang                      3 (0.5%)
+   Jens Scharsig                     3 (0.5%)
+   Robin Getz                        3 (0.5%)
+   Poonam Aggrwal                    3 (0.5%)
+   Valeriy Glushkov                  3 (0.5%)
+   Sedji Gaouaou                     3 (0.5%)
+   Harald Krapfenbauer               2 (0.3%)
+   Andrzej Wolski                    2 (0.3%)
+   Mingkai Hu                        2 (0.3%)
+   Luigi 'Comio' Mantellini          2 (0.3%)
+   Matthias Ludwig                   2 (0.3%)
+   Reinhard Arlt                     2 (0.3%)
+   Kyungmin Park                     2 (0.3%)
+   Alessio Centazzo                  2 (0.3%)
+   Minkyu Kang                       2 (0.3%)
+   Shinya Kuribayashi                2 (0.3%)
+   Daniel Mack                       2 (0.3%)
+   Felix Radensky                    2 (0.3%)
+   Guennadi Liakhovetski             2 (0.3%)
+   Stefano Babic                     2 (0.3%)
+   Daniel Gorsulowski                2 (0.3%)
+   Thomas Lange                      2 (0.3%)
+   Vivi Li                           2 (0.3%)
+   Feng Kan                          1 (0.2%)
+   Giulio Benetti                    1 (0.2%)
+   Ben Goska                         1 (0.2%)
+   John Schmoller                    1 (0.2%)
+   Josh Boyer                        1 (0.2%)
+   Penda Naveen Kumar                1 (0.2%)
+   Michael Evans                     1 (0.2%)
+   David Hunter                      1 (0.2%)
+   Eric Benard                       1 (0.2%)
+   Weirich, Bernhard                 1 (0.2%)
+   rhabarber1848@web.de              1 (0.2%)
+   Niklaus Giger                     1 (0.2%)
+   Remy Bohmer                       1 (0.2%)
+   Michael Zaidman                   1 (0.2%)
+   Andreas Pretzsch                  1 (0.2%)
+   Dieter Kiermaier                  1 (0.2%)
+   Piotr Ziecik                      1 (0.2%)
+   galak                             1 (0.2%)
+   Kazuaki Ichinohe                  1 (0.2%)
+   Matthias Weisser                  1 (0.2%)
+   Jerry Van Baren                   1 (0.2%)
+   Jon Smirl                         1 (0.2%)
+   Bryan Wu                          1 (0.2%)
+   HeungJun Kim                      1 (0.2%)
+   Kevin Morfitt                     1 (0.2%)
+   Kim, Heung Jun                    1 (0.2%)
+   Peter Meerwald                    1 (0.2%)
+   Ilko Iliev                        1 (0.2%)
+   Norbert van Bolhuis               1 (0.2%)
+   Zach LeRoy                        1 (0.2%)
+   Hoan Hoang                        1 (0.2%)
+   Srikanth Srinivasan               1 (0.2%)
+   Todor I Mollov                    1 (0.2%)
+   Sanjeev Premi                     1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     16728 (14.5%)
+   Jean-Christophe PLAGNIOL-VILLARD  14381 (12.5%)
+   Matthias Fuchs                    9733 (8.4%)
+   Mike Frysinger                    9358 (8.1%)
+   Scott Wood                        5624 (4.9%)
+   Prafulla Wadaskar                 5290 (4.6%)
+   Giuseppe CONDORELLI               4937 (4.3%)
+   Peter Tyser                       4350 (3.8%)
+   Stefan Roese                      4340 (3.8%)
+   Roy Zang                          3576 (3.1%)
+   Ilya Yanok                        2851 (2.5%)
+   Tom Rix                           2753 (2.4%)
+   Kazuaki Ichinohe                  2602 (2.3%)
+   TsiChung Liew                     2455 (2.1%)
+   Luigi 'Comio' Mantellini          2019 (1.7%)
+   Reinhard Arlt                     1933 (1.7%)
+   Srikanth Srinivasan               1882 (1.6%)
+   Dirk Eibach                       1761 (1.5%)
+   Kim Phillips                      1344 (1.2%)
+   Sedji Gaouaou                     1303 (1.1%)
+   David Brownell                    1261 (1.1%)
+   Ilko Iliev                        1087 (0.9%)
+   Michal Simek                      1060 (0.9%)
+   Magnus Lilja                      1040 (0.9%)
+   Jon Smirl                         855 (0.7%)
+   Jens Scharsig                     839 (0.7%)
+   Heiko Schocher                    772 (0.7%)
+   Haiying Wang                      619 (0.5%)
+   Nobuhiro Iwamatsu                 609 (0.5%)
+   Grzegorz Bernacki                 606 (0.5%)
+   Robin Getz                        582 (0.5%)
+   Ben Warren                        555 (0.5%)
+   Daniel Gorsulowski                518 (0.4%)
+   Po-Yu Chuang                      443 (0.4%)
+   Alessandro Rubini                 408 (0.4%)
+   Hoan Hoang                        408 (0.4%)
+   Andre Schwarz                     393 (0.3%)
+   Dirk Behme                        386 (0.3%)
+   Anton Vorontsov                   378 (0.3%)
+   Kumar Gala                        377 (0.3%)
+   Anatolij Gustschin                278 (0.2%)
+   Sandeep Paulraj                   208 (0.2%)
+   Dieter Kiermaier                  203 (0.2%)
+   Mark Jackson                      182 (0.2%)
+   Detlev Zundel                     173 (0.1%)
+   Vivek Mahajan                     146 (0.1%)
+   Simon Kagstrom                    139 (0.1%)
+   Todor I Mollov                    139 (0.1%)
+   Albin Tonnerre                    137 (0.1%)
+   Kim, Heung Jun                    108 (0.1%)
+   Matthias Ludwig                   94 (0.1%)
+   Matthias Weisser                  92 (0.1%)
+   Paul Gortmaker                    90 (0.1%)
+   galak                             81 (0.1%)
+   Minkyu Kang                       73 (0.1%)
+   Poonam Aggrwal                    66 (0.1%)
+   Remy Bohmer                       64 (0.1%)
+   Timur Tabi                        63 (0.1%)
+   Grazvydas Ignotas                 61 (0.1%)
+   Josh Boyer                        61 (0.1%)
+   Guennadi Liakhovetski             59 (0.1%)
+   Richard Retanubun                 51 (0.0%)
+   Stefano Babic                     50 (0.0%)
+   Valeriy Glushkov                  46 (0.0%)
+   Zach LeRoy                        43 (0.0%)
+   Jerry Van Baren                   36 (0.0%)
+   Bryan Wu                          35 (0.0%)
+   Weirich, Bernhard                 32 (0.0%)
+   Felix Radensky                    31 (0.0%)
+   rhabarber1848@web.de              30 (0.0%)
+   Kyungmin Park                     19 (0.0%)
+   Thomas Lange                      13 (0.0%)
+   Harald Krapfenbauer               7 (0.0%)
+   Daniel Mack                       7 (0.0%)
+   Mingkai Hu                        5 (0.0%)
+   Shinya Kuribayashi                5 (0.0%)
+   Vivi Li                           5 (0.0%)
+   Andrzej Wolski                    4 (0.0%)
+   Giulio Benetti                    4 (0.0%)
+   Penda Naveen Kumar                4 (0.0%)
+   Alessio Centazzo                  3 (0.0%)
+   Michael Zaidman                   3 (0.0%)
+   Feng Kan                          2 (0.0%)
+   Ben Goska                         2 (0.0%)
+   Andreas Pretzsch                  2 (0.0%)
+   Piotr Ziecik                      2 (0.0%)
+   Peter Meerwald                    2 (0.0%)
+   Norbert van Bolhuis               2 (0.0%)
+   Sanjeev Premi                     2 (0.0%)
+   John Schmoller                    1 (0.0%)
+   Michael Evans                     1 (0.0%)
+   David Hunter                      1 (0.0%)
+   Eric Benard                       1 (0.0%)
+   Niklaus Giger                     1 (0.0%)
+   HeungJun Kim                      1 (0.0%)
+   Kevin Morfitt                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Matthias Fuchs                    6924 (13.2%)
+   Scott Wood                        5607 (10.7%)
+   Jean-Christophe PLAGNIOL-VILLARD  3555 (6.8%)
+   Michal Simek                      1024 (2.0%)
+   Kim Phillips                      927 (1.8%)
+   Sandeep Paulraj                   70 (0.1%)
+   galak                             62 (0.1%)
+   Timur Tabi                        51 (0.1%)
+   Matthias Ludwig                   29 (0.1%)
+   Grazvydas Ignotas                 16 (0.0%)
+   Dirk Behme                        10 (0.0%)
+   Shinya Kuribayashi                4 (0.0%)
+   Thomas Lange                      2 (0.0%)
+   Piotr Ziecik                      2 (0.0%)
+   Alessio Centazzo                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 244)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      50 (20.5%)
+   Kumar Gala                        44 (18.0%)
+   Ben Warren                        37 (15.2%)
+   Scott Wood                        21 (8.6%)
+   Remy Bohmer                       14 (5.7%)
+   Kim Phillips                      13 (5.3%)
+   Mike Frysinger                    11 (4.5%)
+   Wolfgang Denk                     9 (3.7%)
+   Jean-Christophe PLAGNIOL-VILLARD  7 (2.9%)
+   Nobuhiro Iwamatsu                 6 (2.5%)
+   Anatolij Gustschin                5 (2.0%)
+   Matthias Ludwig                   3 (1.2%)
+   Dirk Behme                        2 (0.8%)
+   Phong Vo                          2 (0.8%)
+   Peter Pearse                      2 (0.8%)
+   HeungJun, Kim                     2 (0.8%)
+   Sandeep Paulraj                   1 (0.4%)
+   unsik Kim                         1 (0.4%)
+   Pieter Voorthuijsen               1 (0.4%)
+   Nate Case                         1 (0.4%)
+   Gerald Van Baren                  1 (0.4%)
+   Piyush Shah                       1 (0.4%)
+   Stelian Pop                       1 (0.4%)
+   Ed Swarthout                      1 (0.4%)
+   Maxim Artamonov                   1 (0.4%)
+   Thomas Smits                      1 (0.4%)
+   Travis Wheatley                   1 (0.4%)
+   Jean Pihet                        1 (0.4%)
+   Steve Sakoman                     1 (0.4%)
+   Peter Tyser                       1 (0.4%)
+   Ilko Iliev                        1 (0.4%)
+   Dirk Eibach                       1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 7)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Ronen Shitrit                     3 (42.9%)
+   Angelo Castello                   2 (28.6%)
+   Ira W. Snyder                     1 (14.3%)
+   Alessandro Rubini                 1 (14.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 12)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     2 (16.7%)
+   Jean-Christophe PLAGNIOL-VILLARD  2 (16.7%)
+   Ira W. Snyder                     1 (8.3%)
+   Mike Frysinger                    1 (8.3%)
+   Dirk Behme                        1 (8.3%)
+   Andrzej Wolski                    1 (8.3%)
+   Gaye Abdoulaye Walsimou           1 (8.3%)
+   Heiko Schocher                    1 (8.3%)
+   Magnus Lilja                      1 (8.3%)
+   Tom Rix                           1 (8.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 12)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     6 (50.0%)
+   Ben Warren                        1 (8.3%)
+   Kim Phillips                      1 (8.3%)
+   Peter Tyser                       1 (8.3%)
+   Weirich, Bernhard                 1 (8.3%)
+   Dieter Kiermaier                  1 (8.3%)
+   David Brownell                    1 (8.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andrzej Wolski                    1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    1 (100.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         140 (21.3%)
+   (Unknown)                         98 (14.9%)
+   Extreme Engineering Solutions     70 (10.7%)
+   Freescale                         63 (9.6%)
+   Analog Devices                    62 (9.4%)
+   jcrosoft                          57 (8.7%)
+   Wind River                        25 (3.8%)
+   Marvell                           23 (3.5%)
+   ESD Electronics                   20 (3.0%)
+   EmCraft Systems                   8 (1.2%)
+   Texas Instruments                 8 (1.2%)
+   Dirk Behme                        8 (1.2%)
+   RuggedCom                         7 (1.1%)
+   Semihalf Embedded Systems         7 (1.1%)
+   Mercury IMC Ltd.                  6 (0.9%)
+   MontaVista                        6 (0.9%)
+   Universita di Pavia               6 (0.9%)
+   Guntermann & Drunck               4 (0.6%)
+   Samsung                           4 (0.6%)
+   Xilinx                            4 (0.6%)
+   Grazvydas Ignotas                 4 (0.6%)
+   Atmel                             3 (0.5%)
+   BuS Elektronik                    3 (0.5%)
+   Free Electrons                    3 (0.5%)
+   Matrix Vision                     3 (0.5%)
+   ST Microelectronics               3 (0.5%)
+   Industrie Dial Face               2 (0.3%)
+   Renesas Electronics               2 (0.3%)
+   Nobuhiro Iwamatsu                 2 (0.3%)
+   AMCC                              1 (0.2%)
+   Custom IDEAS                      1 (0.2%)
+   IBM                               1 (0.2%)
+   Ronetix                           1 (0.2%)
+   Jon Smirl                         1 (0.2%)
+   Oce Technologies                  1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         22352 (19.4%)
+   jcrosoft                          14381 (12.5%)
+   Freescale                         13702 (11.9%)
+   ESD Electronics                   12184 (10.6%)
+   Analog Devices                    9980 (8.6%)
+   (Unknown)                         9938 (8.6%)
+   Marvell                           5290 (4.6%)
+   ST Microelectronics               4937 (4.3%)
+   Extreme Engineering Solutions     4350 (3.8%)
+   EmCraft Systems                   2851 (2.5%)
+   Wind River                        2843 (2.5%)
+   Industrie Dial Face               2019 (1.7%)
+   Guntermann & Drunck               1761 (1.5%)
+   Atmel                             1303 (1.1%)
+   Ronetix                           1087 (0.9%)
+   Xilinx                            1060 (0.9%)
+   Jon Smirl                         855 (0.7%)
+   BuS Elektronik                    839 (0.7%)
+   Semihalf Embedded Systems         608 (0.5%)
+   Renesas Electronics               576 (0.5%)
+   Matrix Vision                     393 (0.3%)
+   Dirk Behme                        386 (0.3%)
+   Universita di Pavia               381 (0.3%)
+   MontaVista                        378 (0.3%)
+   Texas Instruments                 214 (0.2%)
+   Mercury IMC Ltd.                  182 (0.2%)
+   Free Electrons                    137 (0.1%)
+   Samsung                           92 (0.1%)
+   Oce Technologies                  64 (0.1%)
+   Grazvydas Ignotas                 61 (0.1%)
+   IBM                               61 (0.1%)
+   RuggedCom                         51 (0.0%)
+   Custom IDEAS                      36 (0.0%)
+   Nobuhiro Iwamatsu                 33 (0.0%)
+   AMCC                              2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 244)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         80 (32.8%)
+   DENX Software Engineering         64 (26.2%)
+   (Unknown)                         43 (17.6%)
+   Oce Technologies                  14 (5.7%)
+   Analog Devices                    11 (4.5%)
+   jcrosoft                          7 (2.9%)
+   Nobuhiro Iwamatsu                 6 (2.5%)
+   Extreme Engineering Solutions     2 (0.8%)
+   Dirk Behme                        2 (0.8%)
+   Samsung                           2 (0.8%)
+   AMCC                              2 (0.8%)
+   ARM                               2 (0.8%)
+   Marvell                           1 (0.4%)
+   Guntermann & Drunck               1 (0.4%)
+   Ronetix                           1 (0.4%)
+   MontaVista                        1 (0.4%)
+   Texas Instruments                 1 (0.4%)
+   Custom IDEAS                      1 (0.4%)
+   Prodrive                          1 (0.4%)
+   Sakoman Inc.                      1 (0.4%)
+   Stelian Pop                       1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 100)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         39 (39.0%)
+   Freescale                         10 (10.0%)
+   DENX Software Engineering         7 (7.0%)
+   Analog Devices                    4 (4.0%)
+   Extreme Engineering Solutions     3 (3.0%)
+   Texas Instruments                 3 (3.0%)
+   ESD Electronics                   3 (3.0%)
+   Samsung                           2 (2.0%)
+   Wind River                        2 (2.0%)
+   Semihalf Embedded Systems         2 (2.0%)
+   Oce Technologies                  1 (1.0%)
+   jcrosoft                          1 (1.0%)
+   Nobuhiro Iwamatsu                 1 (1.0%)
+   Dirk Behme                        1 (1.0%)
+   AMCC                              1 (1.0%)
+   Marvell                           1 (1.0%)
+   Guntermann & Drunck               1 (1.0%)
+   Ronetix                           1 (1.0%)
+   MontaVista                        1 (1.0%)
+   Custom IDEAS                      1 (1.0%)
+   ST Microelectronics               1 (1.0%)
+   EmCraft Systems                   1 (1.0%)
+   Industrie Dial Face               1 (1.0%)
+   Atmel                             1 (1.0%)
+   Xilinx                            1 (1.0%)
+   Jon Smirl                         1 (1.0%)
+   BuS Elektronik                    1 (1.0%)
+   Renesas Electronics               1 (1.0%)
+   Matrix Vision                     1 (1.0%)
+   Universita di Pavia               1 (1.0%)
+   Mercury IMC Ltd.                  1 (1.0%)
+   Free Electrons                    1 (1.0%)
+   Grazvydas Ignotas                 1 (1.0%)
+   IBM                               1 (1.0%)
+   RuggedCom                         1 (1.0%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2009.11.rst b/doc/develop/statistics/u-boot-stats-v2009.11.rst
new file mode 100644
index 00000000000..2e1b2ea71ef
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2009.11.rst
@@ -0,0 +1,501 @@
+:orphan:
+
+Release Statistics for U-Boot v2009.11
+======================================
+
+* Processed 531 changesets from 90 developers
+
+* 39 employers found
+
+* A total of 51428 lines added, 26561 removed (delta 24867)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        54 (10.2%)
+   Peter Tyser                       46 (8.7%)
+   Wolfgang Denk                     37 (7.0%)
+   Mike Frysinger                    31 (5.8%)
+   Sandeep Paulraj                   29 (5.5%)
+   Stefan Roese                      22 (4.1%)
+   Paul Gortmaker                    20 (3.8%)
+   Poonam Aggrwal                    16 (3.0%)
+   Anton Vorontsov                   16 (3.0%)
+   Prafulla Wadaskar                 14 (2.6%)
+   Graeme Russ                       14 (2.6%)
+   Mingkai Hu                        12 (2.3%)
+   Simon Kagstrom                    11 (2.1%)
+   Matthias Fuchs                    8 (1.5%)
+   Eric Millbrandt                   8 (1.5%)
+   Alessandro Rubini                 8 (1.5%)
+   Michal Simek                      7 (1.3%)
+   Ben Warren                        7 (1.3%)
+   Remy Bohmer                       6 (1.1%)
+   Marcel Ziswiler                   6 (1.1%)
+   Tom Rix                           6 (1.1%)
+   Niklaus Giger                     6 (1.1%)
+   Robin Getz                        6 (1.1%)
+   Albin Tonnerre                    6 (1.1%)
+   Heiko Schocher                    5 (0.9%)
+   Minkyu Kang                       5 (0.9%)
+   Kevin Morfitt                     5 (0.9%)
+   Joakim Tjernlund                  5 (0.9%)
+   Scott Wood                        5 (0.9%)
+   Detlev Zundel                     4 (0.8%)
+   Nishanth Menon                    4 (0.8%)
+   Dipen Dudhat                      4 (0.8%)
+   Timur Tabi                        4 (0.8%)
+   Ed Swarthout                      3 (0.6%)
+   Kim Phillips                      3 (0.6%)
+   Robert P. J. Day                  3 (0.6%)
+   Mike Rapoport                     3 (0.6%)
+   Dave Liu                          3 (0.6%)
+   Nobuhiro Iwamatsu                 3 (0.6%)
+   Eric Benard                       3 (0.6%)
+   Martha Stan                       3 (0.6%)
+   Kyungmin Park                     3 (0.6%)
+   Olof Johansson                    3 (0.6%)
+   Luigi 'Comio' Mantellini          3 (0.6%)
+   Jean-Christophe PLAGNIOL-VILLARD  3 (0.6%)
+   Magnus Lilja                      2 (0.4%)
+   Becky Bruce                       2 (0.4%)
+   Scott McNutt                      2 (0.4%)
+   javier Martin                     2 (0.4%)
+   Vivek Mahajan                     2 (0.4%)
+   Steve Sakoman                     2 (0.4%)
+   Daniel Mack                       2 (0.4%)
+   Felix Radensky                    2 (0.4%)
+   Werner Pfister                    2 (0.4%)
+   Dirk Eibach                       2 (0.4%)
+   Roy Zang                          2 (0.4%)
+   Ilya Yanok                        2 (0.4%)
+   TsiChung Liew                     2 (0.4%)
+   Peter Korsgaard                   1 (0.2%)
+   Graeme Smecher                    1 (0.2%)
+   Daniel Hobi                       1 (0.2%)
+   Evan Samanas                      1 (0.2%)
+   Michael Brandt                    1 (0.2%)
+   Pratap Chandu                     1 (0.2%)
+   Sanjeev Premi                     1 (0.2%)
+   Ira W. Snyder                     1 (0.2%)
+   Grazvydas Ignotas                 1 (0.2%)
+   Renato Andreola                   1 (0.2%)
+   Jason McMullan                    1 (0.2%)
+   Po-Yu Chuang                      1 (0.2%)
+   Mark Jackson                      1 (0.2%)
+   Ron Lee                           1 (0.2%)
+   Hui.Tang                          1 (0.2%)
+   Sergey Mironov                    1 (0.2%)
+   Leon Woestenberg                  1 (0.2%)
+   Dirk Behme                        1 (0.2%)
+   Daniel Gorsulowski                1 (0.2%)
+   Mike Nuss                         1 (0.2%)
+   James Clough                      1 (0.2%)
+   Shinya Kuribayashi                1 (0.2%)
+   Ken MacLeod                       1 (0.2%)
+   Rupjyoti Sarmah                   1 (0.2%)
+   Paul Gibson                       1 (0.2%)
+   Ilko Iliev                        1 (0.2%)
+   Frederik Kriewitz                 1 (0.2%)
+   Giuseppe CONDORELLI               1 (0.2%)
+   Harald Krapfenbauer               1 (0.2%)
+   Michael Hennerich                 1 (0.2%)
+   Alex Dubov                        1 (0.2%)
+   Matthias Kaehlcke                 1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     9842 (16.2%)
+   Kumar Gala                        7427 (12.2%)
+   Stefan Roese                      4785 (7.9%)
+   Minkyu Kang                       3208 (5.3%)
+   Tom Rix                           2884 (4.7%)
+   Kevin Morfitt                     2483 (4.1%)
+   Peter Tyser                       2441 (4.0%)
+   Niklaus Giger                     2214 (3.6%)
+   Poonam Aggrwal                    2140 (3.5%)
+   Prafulla Wadaskar                 2052 (3.4%)
+   Olof Johansson                    1913 (3.1%)
+   Sandeep Paulraj                   1519 (2.5%)
+   Ilya Yanok                        1510 (2.5%)
+   Graeme Russ                       1455 (2.4%)
+   Albin Tonnerre                    1369 (2.3%)
+   Ben Warren                        1360 (2.2%)
+   Simon Kagstrom                    957 (1.6%)
+   Frederik Kriewitz                 921 (1.5%)
+   Mingkai Hu                        877 (1.4%)
+   Mike Frysinger                    874 (1.4%)
+   Michal Simek                      842 (1.4%)
+   Eric Millbrandt                   824 (1.4%)
+   Paul Gortmaker                    746 (1.2%)
+   Heiko Schocher                    695 (1.1%)
+   Luigi 'Comio' Mantellini          460 (0.8%)
+   Anton Vorontsov                   416 (0.7%)
+   Harald Krapfenbauer               411 (0.7%)
+   Dipen Dudhat                      368 (0.6%)
+   Remy Bohmer                       345 (0.6%)
+   Jason McMullan                    339 (0.6%)
+   Matthias Fuchs                    314 (0.5%)
+   Alessandro Rubini                 292 (0.5%)
+   Felix Radensky                    255 (0.4%)
+   Martha Stan                       241 (0.4%)
+   Kim Phillips                      234 (0.4%)
+   Scott McNutt                      198 (0.3%)
+   Matthias Kaehlcke                 151 (0.2%)
+   Marcel Ziswiler                   134 (0.2%)
+   Robin Getz                        130 (0.2%)
+   Joakim Tjernlund                  128 (0.2%)
+   Po-Yu Chuang                      125 (0.2%)
+   Timur Tabi                        78 (0.1%)
+   Becky Bruce                       78 (0.1%)
+   Nobuhiro Iwamatsu                 69 (0.1%)
+   Daniel Gorsulowski                66 (0.1%)
+   Kyungmin Park                     51 (0.1%)
+   Steve Sakoman                     44 (0.1%)
+   Vivek Mahajan                     38 (0.1%)
+   Detlev Zundel                     36 (0.1%)
+   Ed Swarthout                      33 (0.1%)
+   Peter Korsgaard                   32 (0.1%)
+   Dirk Behme                        28 (0.0%)
+   Dirk Eibach                       26 (0.0%)
+   Michael Hennerich                 24 (0.0%)
+   Scott Wood                        22 (0.0%)
+   Nishanth Menon                    20 (0.0%)
+   Roy Zang                          19 (0.0%)
+   Dave Liu                          16 (0.0%)
+   Ira W. Snyder                     15 (0.0%)
+   Ken MacLeod                       15 (0.0%)
+   Rupjyoti Sarmah                   15 (0.0%)
+   Robert P. J. Day                  14 (0.0%)
+   TsiChung Liew                     14 (0.0%)
+   Michael Brandt                    13 (0.0%)
+   Jean-Christophe PLAGNIOL-VILLARD  12 (0.0%)
+   javier Martin                     12 (0.0%)
+   Mike Rapoport                     9 (0.0%)
+   Ron Lee                           9 (0.0%)
+   James Clough                      9 (0.0%)
+   Pratap Chandu                     8 (0.0%)
+   Sanjeev Premi                     7 (0.0%)
+   Ilko Iliev                        7 (0.0%)
+   Evan Samanas                      6 (0.0%)
+   Werner Pfister                    5 (0.0%)
+   Renato Andreola                   5 (0.0%)
+   Leon Woestenberg                  5 (0.0%)
+   Eric Benard                       4 (0.0%)
+   Magnus Lilja                      4 (0.0%)
+   Daniel Mack                       4 (0.0%)
+   Hui.Tang                          4 (0.0%)
+   Giuseppe CONDORELLI               3 (0.0%)
+   Alex Dubov                        3 (0.0%)
+   Grazvydas Ignotas                 2 (0.0%)
+   Sergey Mironov                    2 (0.0%)
+   Graeme Smecher                    1 (0.0%)
+   Daniel Hobi                       1 (0.0%)
+   Mark Jackson                      1 (0.0%)
+   Mike Nuss                         1 (0.0%)
+   Shinya Kuribayashi                1 (0.0%)
+   Paul Gibson                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        2543 (9.6%)
+   Peter Tyser                       1595 (6.0%)
+   Kevin Morfitt                     888 (3.3%)
+   Michal Simek                      799 (3.0%)
+   Stefan Roese                      334 (1.3%)
+   Scott McNutt                      196 (0.7%)
+   Marcel Ziswiler                   96 (0.4%)
+   Becky Bruce                       78 (0.3%)
+   Nobuhiro Iwamatsu                 15 (0.1%)
+   Pratap Chandu                     8 (0.0%)
+   Peter Korsgaard                   3 (0.0%)
+   Robert P. J. Day                  3 (0.0%)
+   Shinya Kuribayashi                1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 200)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        76 (38.0%)
+   Stefan Roese                      24 (12.0%)
+   Ben Warren                        23 (11.5%)
+   Wolfgang Denk                     18 (9.0%)
+   Scott Wood                        9 (4.5%)
+   Kim Phillips                      9 (4.5%)
+   Mike Frysinger                    7 (3.5%)
+   Minkyu Kang                       5 (2.5%)
+   Tom Rix                           3 (1.5%)
+   HeungJun, Kim                     2 (1.0%)
+   Sneha Narnakaje                   2 (1.0%)
+   Eric Benard                       2 (1.0%)
+   Detlev Zundel                     2 (1.0%)
+   Peter Tyser                       1 (0.5%)
+   Michal Simek                      1 (0.5%)
+   Scott McNutt                      1 (0.5%)
+   Jean-Christophe PLAGNIOL-VILLARD  1 (0.5%)
+   Takashi Yoshii                    1 (0.5%)
+   Daniel Hellstrom                  1 (0.5%)
+   David Brownell                    1 (0.5%)
+   Kevin Morfitt                     1 (0.5%)
+   Stephen Neuendorffer              1 (0.5%)
+   Gao Guanhua                       1 (0.5%)
+   Dirk Behme                        1 (0.5%)
+   Nishanth Menon                    1 (0.5%)
+   Kyungmin Park                     1 (0.5%)
+   Mingkai Hu                        1 (0.5%)
+   Albin Tonnerre                    1 (0.5%)
+   Sandeep Paulraj                   1 (0.5%)
+   Prafulla Wadaskar                 1 (0.5%)
+   Poonam Aggrwal                    1 (0.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 1)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Roland Lezuo                      1 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 8)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     3 (37.5%)
+   Heiko Schocher                    2 (25.0%)
+   Kumar Gala                        1 (12.5%)
+   Peter Tyser                       1 (12.5%)
+   Mike Rapoport                     1 (12.5%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 8)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marcel Ziswiler                   2 (25.0%)
+   Peter Tyser                       1 (12.5%)
+   Ben Warren                        1 (12.5%)
+   Mike Frysinger                    1 (12.5%)
+   Kevin Morfitt                     1 (12.5%)
+   Michael Brandt                    1 (12.5%)
+   Timur Tabi                        1 (12.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Peter Gombos                      1 (33.3%)
+   Guenter Koellner                  1 (33.3%)
+   Ed Swarthout                      1 (33.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Peter Tyser                       1 (33.3%)
+   Mike Frysinger                    1 (33.3%)
+   Wolfgang Denk                     1 (33.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         110 (20.7%)
+   (Unknown)                         81 (15.3%)
+   DENX Software Engineering         68 (12.8%)
+   Extreme Engineering Solutions     47 (8.9%)
+   Analog Devices                    38 (7.2%)
+   Texas Instruments                 34 (6.4%)
+   Wind River                        26 (4.9%)
+   MontaVista                        16 (3.0%)
+   Marvell                           14 (2.6%)
+   Graeme Russ                       14 (2.6%)
+   ESD Electronics                   9 (1.7%)
+   Samsung                           8 (1.5%)
+   Xilinx                            7 (1.3%)
+   Free Electrons                    6 (1.1%)
+   Oce Technologies                  6 (1.1%)
+   Transmode Systems                 5 (0.9%)
+   Universita di Pavia               4 (0.8%)
+   CompuLab                          3 (0.6%)
+   IBM                               3 (0.6%)
+   Industrie Dial Face               3 (0.6%)
+   jcrosoft                          3 (0.6%)
+   Silicon Turnkey Express           3 (0.6%)
+   Nobuhiro Iwamatsu                 3 (0.6%)
+   EmCraft Systems                   2 (0.4%)
+   Guntermann & Drunck               2 (0.4%)
+   Psyent                            2 (0.4%)
+   Sakoman Inc.                      2 (0.4%)
+   AMCC                              1 (0.2%)
+   Debian.org                        1 (0.2%)
+   Mercury IMC Ltd.                  1 (0.2%)
+   NetApp                            1 (0.2%)
+   Netstal-Maschinen                 1 (0.2%)
+   OVRO                              1 (0.2%)
+   Ronetix                           1 (0.2%)
+   ST Microelectronics               1 (0.2%)
+   Terascala                         1 (0.2%)
+   Dirk Behme                        1 (0.2%)
+   Barco                             1 (0.2%)
+   Grazvydas Ignotas                 1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         15358 (25.3%)
+   Freescale                         11330 (18.6%)
+   (Unknown)                         10165 (16.7%)
+   Wind River                        3630 (6.0%)
+   Samsung                           3259 (5.4%)
+   Extreme Engineering Solutions     2447 (4.0%)
+   Marvell                           2052 (3.4%)
+   IBM                               1913 (3.1%)
+   Texas Instruments                 1546 (2.5%)
+   EmCraft Systems                   1510 (2.5%)
+   Graeme Russ                       1455 (2.4%)
+   Free Electrons                    1369 (2.3%)
+   Analog Devices                    1028 (1.7%)
+   Xilinx                            842 (1.4%)
+   Industrie Dial Face               460 (0.8%)
+   MontaVista                        416 (0.7%)
+   ESD Electronics                   380 (0.6%)
+   Oce Technologies                  345 (0.6%)
+   NetApp                            339 (0.6%)
+   Silicon Turnkey Express           241 (0.4%)
+   Psyent                            198 (0.3%)
+   Transmode Systems                 128 (0.2%)
+   Universita di Pavia               86 (0.1%)
+   Nobuhiro Iwamatsu                 69 (0.1%)
+   Sakoman Inc.                      44 (0.1%)
+   Barco                             32 (0.1%)
+   Dirk Behme                        28 (0.0%)
+   Guntermann & Drunck               26 (0.0%)
+   AMCC                              15 (0.0%)
+   OVRO                              15 (0.0%)
+   jcrosoft                          12 (0.0%)
+   CompuLab                          9 (0.0%)
+   Debian.org                        9 (0.0%)
+   Ronetix                           7 (0.0%)
+   ST Microelectronics               3 (0.0%)
+   Grazvydas Ignotas                 2 (0.0%)
+   Mercury IMC Ltd.                  1 (0.0%)
+   Netstal-Maschinen                 1 (0.0%)
+   Terascala                         1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 200)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         97 (48.5%)
+   DENX Software Engineering         44 (22.0%)
+   (Unknown)                         29 (14.5%)
+   Samsung                           8 (4.0%)
+   Analog Devices                    7 (3.5%)
+   Texas Instruments                 4 (2.0%)
+   Wind River                        3 (1.5%)
+   Extreme Engineering Solutions     1 (0.5%)
+   Marvell                           1 (0.5%)
+   Free Electrons                    1 (0.5%)
+   Xilinx                            1 (0.5%)
+   Psyent                            1 (0.5%)
+   Dirk Behme                        1 (0.5%)
+   jcrosoft                          1 (0.5%)
+   Gaisler Research                  1 (0.5%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 92)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         32 (34.8%)
+   Freescale                         12 (13.0%)
+   DENX Software Engineering         4 (4.3%)
+   Analog Devices                    3 (3.3%)
+   Texas Instruments                 3 (3.3%)
+   Samsung                           2 (2.2%)
+   Wind River                        2 (2.2%)
+   Extreme Engineering Solutions     2 (2.2%)
+   ESD Electronics                   2 (2.2%)
+   Marvell                           1 (1.1%)
+   Free Electrons                    1 (1.1%)
+   Xilinx                            1 (1.1%)
+   Psyent                            1 (1.1%)
+   Dirk Behme                        1 (1.1%)
+   jcrosoft                          1 (1.1%)
+   IBM                               1 (1.1%)
+   EmCraft Systems                   1 (1.1%)
+   Graeme Russ                       1 (1.1%)
+   Industrie Dial Face               1 (1.1%)
+   MontaVista                        1 (1.1%)
+   Oce Technologies                  1 (1.1%)
+   NetApp                            1 (1.1%)
+   Silicon Turnkey Express           1 (1.1%)
+   Transmode Systems                 1 (1.1%)
+   Universita di Pavia               1 (1.1%)
+   Nobuhiro Iwamatsu                 1 (1.1%)
+   Sakoman Inc.                      1 (1.1%)
+   Barco                             1 (1.1%)
+   Guntermann & Drunck               1 (1.1%)
+   AMCC                              1 (1.1%)
+   OVRO                              1 (1.1%)
+   CompuLab                          1 (1.1%)
+   Debian.org                        1 (1.1%)
+   Ronetix                           1 (1.1%)
+   ST Microelectronics               1 (1.1%)
+   Grazvydas Ignotas                 1 (1.1%)
+   Mercury IMC Ltd.                  1 (1.1%)
+   Netstal-Maschinen                 1 (1.1%)
+   Terascala                         1 (1.1%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2010.03.rst b/doc/develop/statistics/u-boot-stats-v2010.03.rst
new file mode 100644
index 00000000000..5a8b0d6b8ab
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2010.03.rst
@@ -0,0 +1,476 @@
+:orphan:
+
+Release Statistics for U-Boot v2010.03
+======================================
+
+* Processed 468 changesets from 92 developers
+
+* 29 employers found
+
+* A total of 55271 lines added, 73622 removed (delta -18351)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    43 (9.2%)
+   Kumar Gala                        31 (6.6%)
+   Stefan Roese                      24 (5.1%)
+   Wolfgang Denk                     20 (4.3%)
+   Heiko Schocher                    20 (4.3%)
+   Tom                               16 (3.4%)
+   Sandeep Paulraj                   15 (3.2%)
+   Stefano Babic                     14 (3.0%)
+   Vipin Kumar                       13 (2.8%)
+   Ladislav Michl                    13 (2.8%)
+   Peter Tyser                       12 (2.6%)
+   Nick Thompson                     12 (2.6%)
+   Jens Scharsig                     11 (2.4%)
+   Matthias Kaehlcke                 10 (2.1%)
+   Graeme Russ                       10 (2.1%)
+   Matthias Fuchs                    8 (1.7%)
+   Detlev Zundel                     8 (1.7%)
+   John Rigby                        8 (1.7%)
+   Alessandro Rubini                 7 (1.5%)
+   Robin Getz                        7 (1.5%)
+   Dave Liu                          6 (1.3%)
+   Wolfgang Wegner                   6 (1.3%)
+   Joakim Tjernlund                  6 (1.3%)
+   Nishanth Menon                    6 (1.3%)
+   Anatolij Gustschin                5 (1.1%)
+   Magnus Lilja                      5 (1.1%)
+   Cliff Cai                         5 (1.1%)
+   Bryan Wu                          5 (1.1%)
+   Ajay Kumar Gupta                  5 (1.1%)
+   Felix Radensky                    4 (0.9%)
+   Daniel Gorsulowski                4 (0.9%)
+   Kim Phillips                      4 (0.9%)
+   Sekhar Nori                       4 (0.9%)
+   Liu Yu                            4 (0.9%)
+   Frans Meulenbroeks                3 (0.6%)
+   Prafulla Wadaskar                 3 (0.6%)
+   Sanjeev Premi                     3 (0.6%)
+   Seunghyeon Rhee                   3 (0.6%)
+   Li Yang                           3 (0.6%)
+   Minkyu Kang                       3 (0.6%)
+   Chris Zhang                       3 (0.6%)
+   Reinhard Arlt                     3 (0.6%)
+   Mingkai Hu                        3 (0.6%)
+   Grazvydas Ignotas                 3 (0.6%)
+   Kevin Morfitt                     3 (0.6%)
+   Wolfgang Grandegger               3 (0.6%)
+   Renato Andreola                   2 (0.4%)
+   Thomas Weber                      2 (0.4%)
+   Ben Warren                        2 (0.4%)
+   Matthias Weisser                  2 (0.4%)
+   Michael Zaidman                   2 (0.4%)
+   Richard Retanubun                 2 (0.4%)
+   Remy Bohmer                       2 (0.4%)
+   Michal Simek                      2 (0.4%)
+   Michael Hennerich                 2 (0.4%)
+   Dirk Behme                        2 (0.4%)
+   Harald Krapfenbauer               2 (0.4%)
+   Valentin Yakovenkov               2 (0.4%)
+   Anton Vorontsov                   2 (0.4%)
+   Po-Yu Chuang                      2 (0.4%)
+   Amul Kumar Saha                   2 (0.4%)
+   Timur Tabi                        1 (0.2%)
+   Thomas Chou                       1 (0.2%)
+   Rupjyoti Sarmah                   1 (0.2%)
+   Asen Dimov                        1 (0.2%)
+   Jeff Angielski                    1 (0.2%)
+   Anders Darander                   1 (0.2%)
+   Siarhei Siamashka                 1 (0.2%)
+   Achim Ehrlich                     1 (0.2%)
+   Nobuhiro Iwamatsu                 1 (0.2%)
+   Eugene O'Brien                    1 (0.2%)
+   Hiremath Vaibhav                  1 (0.2%)
+   Scott Ellis                       1 (0.2%)
+   Siddarth Gore                     1 (0.2%)
+   Prathap Srinivas                  1 (0.2%)
+   Semih Hazar                       1 (0.2%)
+   Vivek Mahajan                     1 (0.2%)
+   James Yang                        1 (0.2%)
+   Shinya Kuribayashi                1 (0.2%)
+   Daniel Hobi                       1 (0.2%)
+   Becky Bruce                       1 (0.2%)
+   Sandeep Gopalpet                  1 (0.2%)
+   Robert P. J. Day                  1 (0.2%)
+   Mahavir Jain                      1 (0.2%)
+   John Ogness                       1 (0.2%)
+   Peter Korsgaard                   1 (0.2%)
+   Ingo van Lil                      1 (0.2%)
+   Scott Wood                        1 (0.2%)
+   Jean-Christophe PLAGNIOL-VILLARD  1 (0.2%)
+   Mark Asselstine                   1 (0.2%)
+   Hui.Tang                          1 (0.2%)
+   David Brownell                    1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Detlev Zundel                     46531 (38.5%)
+   Stefan Roese                      13363 (11.1%)
+   Wolfgang Denk                     10857 (9.0%)
+   Tom                               6089 (5.0%)
+   Vipin Kumar                       4871 (4.0%)
+   Jens Scharsig                     4100 (3.4%)
+   Stefano Babic                     4052 (3.4%)
+   Matthias Kaehlcke                 3070 (2.5%)
+   John Rigby                        2813 (2.3%)
+   Heiko Schocher                    2270 (1.9%)
+   Mike Frysinger                    1611 (1.3%)
+   Michael Hennerich                 1451 (1.2%)
+   Po-Yu Chuang                      1381 (1.1%)
+   Kumar Gala                        1223 (1.0%)
+   Robin Getz                        1211 (1.0%)
+   Bryan Wu                          1048 (0.9%)
+   Peter Tyser                       1005 (0.8%)
+   Nick Thompson                     917 (0.8%)
+   Sekhar Nori                       883 (0.7%)
+   Daniel Gorsulowski                851 (0.7%)
+   Wolfgang Grandegger               833 (0.7%)
+   Graeme Russ                       760 (0.6%)
+   Amul Kumar Saha                   715 (0.6%)
+   Joakim Tjernlund                  657 (0.5%)
+   Ladislav Michl                    616 (0.5%)
+   Kevin Morfitt                     616 (0.5%)
+   Valentin Yakovenkov               573 (0.5%)
+   Cliff Cai                         500 (0.4%)
+   Nishanth Menon                    480 (0.4%)
+   Harald Krapfenbauer               344 (0.3%)
+   Ajay Kumar Gupta                  338 (0.3%)
+   Liu Yu                            325 (0.3%)
+   Renato Andreola                   286 (0.2%)
+   Nobuhiro Iwamatsu                 283 (0.2%)
+   Reinhard Arlt                     261 (0.2%)
+   Kim Phillips                      232 (0.2%)
+   Dirk Behme                        228 (0.2%)
+   Sandeep Paulraj                   204 (0.2%)
+   Mingkai Hu                        196 (0.2%)
+   Alessandro Rubini                 188 (0.2%)
+   Anton Vorontsov                   185 (0.2%)
+   Wolfgang Wegner                   162 (0.1%)
+   Minkyu Kang                       158 (0.1%)
+   Ben Warren                        143 (0.1%)
+   Mahavir Jain                      123 (0.1%)
+   Scott Wood                        123 (0.1%)
+   Peter Korsgaard                   115 (0.1%)
+   Magnus Lilja                      112 (0.1%)
+   Ingo van Lil                      98 (0.1%)
+   David Brownell                    96 (0.1%)
+   Semih Hazar                       77 (0.1%)
+   Matthias Fuchs                    75 (0.1%)
+   Becky Bruce                       75 (0.1%)
+   Prafulla Wadaskar                 73 (0.1%)
+   Chris Zhang                       67 (0.1%)
+   Rupjyoti Sarmah                   66 (0.1%)
+   Prathap Srinivas                  58 (0.0%)
+   Timur Tabi                        53 (0.0%)
+   Sandeep Gopalpet                  52 (0.0%)
+   Dave Liu                          45 (0.0%)
+   Li Yang                           45 (0.0%)
+   Richard Retanubun                 45 (0.0%)
+   Anatolij Gustschin                44 (0.0%)
+   Remy Bohmer                       41 (0.0%)
+   Anders Darander                   34 (0.0%)
+   Achim Ehrlich                     34 (0.0%)
+   Sanjeev Premi                     27 (0.0%)
+   Hui.Tang                          27 (0.0%)
+   Shinya Kuribayashi                26 (0.0%)
+   Robert P. J. Day                  25 (0.0%)
+   Grazvydas Ignotas                 21 (0.0%)
+   Seunghyeon Rhee                   19 (0.0%)
+   Eugene O'Brien                    18 (0.0%)
+   Michal Simek                      17 (0.0%)
+   Scott Ellis                       16 (0.0%)
+   Matthias Weisser                  13 (0.0%)
+   Frans Meulenbroeks                9 (0.0%)
+   Felix Radensky                    8 (0.0%)
+   Michael Zaidman                   7 (0.0%)
+   Siddarth Gore                     7 (0.0%)
+   Thomas Chou                       6 (0.0%)
+   Siarhei Siamashka                 6 (0.0%)
+   Mark Asselstine                   5 (0.0%)
+   Daniel Hobi                       4 (0.0%)
+   Jean-Christophe PLAGNIOL-VILLARD  4 (0.0%)
+   Hiremath Vaibhav                  2 (0.0%)
+   James Yang                        2 (0.0%)
+   Thomas Weber                      1 (0.0%)
+   Asen Dimov                        1 (0.0%)
+   Jeff Angielski                    1 (0.0%)
+   Vivek Mahajan                     1 (0.0%)
+   John Ogness                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Detlev Zundel                     46285 (62.9%)
+   Stefan Roese                      12093 (16.4%)
+   Ladislav Michl                    302 (0.4%)
+   Cliff Cai                         260 (0.4%)
+   Joakim Tjernlund                  227 (0.3%)
+   Mingkai Hu                        130 (0.2%)
+   Semih Hazar                       44 (0.1%)
+   Li Yang                           31 (0.0%)
+   Scott Wood                        25 (0.0%)
+   Robert P. J. Day                  15 (0.0%)
+   Kumar Gala                        14 (0.0%)
+   Nishanth Menon                    4 (0.0%)
+   Seunghyeon Rhee                   4 (0.0%)
+   Jean-Christophe PLAGNIOL-VILLARD  3 (0.0%)
+   Michael Zaidman                   2 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 176)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Ben Warren                        26 (14.8%)
+   Mike Frysinger                    25 (14.2%)
+   Stefan Roese                      20 (11.4%)
+   Kumar Gala                        20 (11.4%)
+   Sandeep Paulraj                   20 (11.4%)
+   Kim Phillips                      7 (4.0%)
+   Wolfgang Denk                     6 (3.4%)
+   Cliff Cai                         5 (2.8%)
+   Fred Fan                          5 (2.8%)
+   Remy Bohmer                       5 (2.8%)
+   Swaminathan S                     4 (2.3%)
+   Minkyu Kang                       3 (1.7%)
+   Nick Thompson                     3 (1.7%)
+   Scott McNutt                      2 (1.1%)
+   Andreas Huber                     2 (1.1%)
+   Rohit Hagargundgi                 2 (1.1%)
+   Detlev Zundel                     1 (0.6%)
+   Li Yang                           1 (0.6%)
+   Scott Wood                        1 (0.6%)
+   Andrew Morton                     1 (0.6%)
+   FUJITA Kazutoshi                  1 (0.6%)
+   Ron Lee                           1 (0.6%)
+   Holger Brunck                     1 (0.6%)
+   Sudhakar Rajashekhara             1 (0.6%)
+   Daniel Hellstrom                  1 (0.6%)
+   Jin Qing                          1 (0.6%)
+   David Woodhouse                   1 (0.6%)
+   Hiremath Vaibhav                  1 (0.6%)
+   Thomas Chou                       1 (0.6%)
+   Sandeep Gopalpet                  1 (0.6%)
+   Anatolij Gustschin                1 (0.6%)
+   Dave Liu                          1 (0.6%)
+   Becky Bruce                       1 (0.6%)
+   Alessandro Rubini                 1 (0.6%)
+   Peter Tyser                       1 (0.6%)
+   Wolfgang Grandegger               1 (0.6%)
+   Sekhar Nori                       1 (0.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Minkyu Kang                       1 (33.3%)
+   Detlev Zundel                     1 (33.3%)
+   Tom                               1 (33.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Seunghyeon Rhee                   1 (33.3%)
+   Richard Retanubun                 1 (33.3%)
+   Heiko Schocher                    1 (33.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alessandro Rubini                 1 (33.3%)
+   Quentin Armitage                  1 (33.3%)
+   Himanshu Chauhan                  1 (33.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     1 (33.3%)
+   Anatolij Gustschin                1 (33.3%)
+   Shinya Kuribayashi                1 (33.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         104 (22.2%)
+   DENX Software Engineering         92 (19.7%)
+   Analog Devices                    62 (13.2%)
+   Freescale                         57 (12.2%)
+   Texas Instruments                 35 (7.5%)
+   Wind River                        16 (3.4%)
+   ESD Electronics                   15 (3.2%)
+   ST Microelectronics               13 (2.8%)
+   Extreme Engineering Solutions     12 (2.6%)
+   Graeme Russ                       10 (2.1%)
+   General Electric                  7 (1.5%)
+   Transmode Systems                 6 (1.3%)
+   GE Fanuc                          5 (1.1%)
+   Marvell                           5 (1.1%)
+   Samsung                           5 (1.1%)
+   Universita di Pavia               4 (0.9%)
+   Grazvydas Ignotas                 3 (0.6%)
+   MontaVista                        2 (0.4%)
+   RuggedCom                         2 (0.4%)
+   Xilinx                            2 (0.4%)
+   Dirk Behme                        2 (0.4%)
+   Oce Technologies                  2 (0.4%)
+   linutronix                        1 (0.2%)
+   NEC                               1 (0.2%)
+   Ronetix                           1 (0.2%)
+   taskit                            1 (0.2%)
+   Nobuhiro Iwamatsu                 1 (0.2%)
+   Barco                             1 (0.2%)
+   Funky                             1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         77046 (63.8%)
+   (Unknown)                         15732 (13.0%)
+   Wind River                        6089 (5.0%)
+   Analog Devices                    5821 (4.8%)
+   ST Microelectronics               4871 (4.0%)
+   Freescale                         2372 (2.0%)
+   Texas Instruments                 1992 (1.7%)
+   ESD Electronics                   1187 (1.0%)
+   Extreme Engineering Solutions     1005 (0.8%)
+   Samsung                           873 (0.7%)
+   Graeme Russ                       760 (0.6%)
+   Transmode Systems                 657 (0.5%)
+   General Electric                  528 (0.4%)
+   GE Fanuc                          389 (0.3%)
+   Nobuhiro Iwamatsu                 283 (0.2%)
+   Dirk Behme                        228 (0.2%)
+   Marvell                           203 (0.2%)
+   MontaVista                        185 (0.2%)
+   Universita di Pavia               179 (0.1%)
+   Barco                             115 (0.1%)
+   RuggedCom                         45 (0.0%)
+   Oce Technologies                  41 (0.0%)
+   taskit                            34 (0.0%)
+   NEC                               26 (0.0%)
+   Grazvydas Ignotas                 21 (0.0%)
+   Xilinx                            17 (0.0%)
+   Funky                             4 (0.0%)
+   linutronix                        1 (0.0%)
+   Ronetix                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 176)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         34 (19.3%)
+   Freescale                         33 (18.8%)
+   Analog Devices                    30 (17.0%)
+   DENX Software Engineering         29 (16.5%)
+   Texas Instruments                 27 (15.3%)
+   Samsung                           5 (2.8%)
+   Oce Technologies                  5 (2.8%)
+   GE Fanuc                          3 (1.7%)
+   Keymile                           3 (1.7%)
+   Psyent                            2 (1.1%)
+   Extreme Engineering Solutions     1 (0.6%)
+   Debian.org                        1 (0.6%)
+   Gaisler Research                  1 (0.6%)
+   Intel                             1 (0.6%)
+   Linux Foundation                  1 (0.6%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 95)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         35 (36.8%)
+   Freescale                         12 (12.6%)
+   DENX Software Engineering         7 (7.4%)
+   Texas Instruments                 7 (7.4%)
+   Analog Devices                    5 (5.3%)
+   ESD Electronics                   3 (3.2%)
+   Marvell                           3 (3.2%)
+   Samsung                           2 (2.1%)
+   Oce Technologies                  1 (1.1%)
+   GE Fanuc                          1 (1.1%)
+   Extreme Engineering Solutions     1 (1.1%)
+   Wind River                        1 (1.1%)
+   ST Microelectronics               1 (1.1%)
+   Graeme Russ                       1 (1.1%)
+   Transmode Systems                 1 (1.1%)
+   General Electric                  1 (1.1%)
+   Nobuhiro Iwamatsu                 1 (1.1%)
+   Dirk Behme                        1 (1.1%)
+   MontaVista                        1 (1.1%)
+   Universita di Pavia               1 (1.1%)
+   Barco                             1 (1.1%)
+   RuggedCom                         1 (1.1%)
+   taskit                            1 (1.1%)
+   NEC                               1 (1.1%)
+   Grazvydas Ignotas                 1 (1.1%)
+   Xilinx                            1 (1.1%)
+   Funky                             1 (1.1%)
+   linutronix                        1 (1.1%)
+   Ronetix                           1 (1.1%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2010.06.rst b/doc/develop/statistics/u-boot-stats-v2010.06.rst
new file mode 100644
index 00000000000..ddd59ee7c02
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2010.06.rst
@@ -0,0 +1,497 @@
+:orphan:
+
+Release Statistics for U-Boot v2010.06
+======================================
+
+* Processed 402 changesets from 100 developers
+
+* 31 employers found
+
+* A total of 42673 lines added, 22618 removed (delta 20055)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Thomas Chou                       28 (7.0%)
+   Graeme Russ                       26 (6.5%)
+   Wolfgang Denk                     23 (5.7%)
+   Peter Tyser                       22 (5.5%)
+   Stefano Babic                     19 (4.7%)
+   Kumar Gala                        16 (4.0%)
+   Frans Meulenbroeks                16 (4.0%)
+   Anatolij Gustschin                14 (3.5%)
+   Mike Frysinger                    14 (3.5%)
+   TsiChung Liew                     13 (3.2%)
+   Stefan Roese                      11 (2.7%)
+   Vaibhav Hiremath                  10 (2.5%)
+   Minkyu Kang                       9 (2.2%)
+   Michal Simek                      9 (2.2%)
+   Scott McNutt                      8 (2.0%)
+   Dave Liu                          8 (2.0%)
+   Kim Phillips                      7 (1.7%)
+   Cyril Chemparathy                 7 (1.7%)
+   Asen Dimov                        7 (1.7%)
+   Detlev Zundel                     7 (1.7%)
+   Sergei Shtylyov                   6 (1.5%)
+   Timur Tabi                        6 (1.5%)
+   Wolfgang Wegner                   6 (1.5%)
+   Heiko Schocher                    4 (1.0%)
+   Ron Madrid                        4 (1.0%)
+   Albert Aribaud                    4 (1.0%)
+   Naveen Krishna CH                 4 (1.0%)
+   Poonam Aggrwal                    3 (0.7%)
+   Sudhakar Rajashekhara             3 (0.7%)
+   Prafulla Wadaskar                 3 (0.7%)
+   Delio Brignoli                    2 (0.5%)
+   Tom                               2 (0.5%)
+   Matthias Kaehlcke                 2 (0.5%)
+   Serge Ziryukin                    2 (0.5%)
+   Matthias Fuchs                    2 (0.5%)
+   Jerry Huang                       2 (0.5%)
+   Andre Schwarz                     2 (0.5%)
+   Larry Johnson                     2 (0.5%)
+   Michael Zaidman                   2 (0.5%)
+   Fabio Estevam                     2 (0.5%)
+   John Rigby                        2 (0.5%)
+   Richard Retanubun                 2 (0.5%)
+   Ed Swarthout                      2 (0.5%)
+   Kim B. Heino                      2 (0.5%)
+   John Schmoller                    2 (0.5%)
+   Becky Bruce                       1 (0.2%)
+   Remy Bohmer                       1 (0.2%)
+   Dipen Dudhat                      1 (0.2%)
+   Felix Radensky                    1 (0.2%)
+   Sandeep Gopalpet                  1 (0.2%)
+   Peter Horton                      1 (0.2%)
+   Guennadi Liakhovetski             1 (0.2%)
+   Ilya Yanok                        1 (0.2%)
+   Terry Lv                          1 (0.2%)
+   Vitaly Kuzmichev                  1 (0.2%)
+   Ben Warren                        1 (0.2%)
+   Fillod Stephane                   1 (0.2%)
+   Marek Vasut                       1 (0.2%)
+   Grazvydas Ignotas                 1 (0.2%)
+   George G. Davis                   1 (0.2%)
+   Andrew Caldwell                   1 (0.2%)
+   Andreas Bießmann                  1 (0.2%)
+   Michael Weiss                     1 (0.2%)
+   Mahavir Jain                      1 (0.2%)
+   Horst Kronstorfer                 1 (0.2%)
+   Nick Thompson                     1 (0.2%)
+   York Sun                          1 (0.2%)
+   Ender.Dai                         1 (0.2%)
+   Trübenbach, Ralf                  1 (0.2%)
+   Reinhard Arlt                     1 (0.2%)
+   Norbert van Bolhuis               1 (0.2%)
+   Magnus Lilja                      1 (0.2%)
+   Valentin Yakovenkov               1 (0.2%)
+   Eric Jarrige                      1 (0.2%)
+   Andy Fleming                      1 (0.2%)
+   Robin Getz                        1 (0.2%)
+   Siddarth Gore                     1 (0.2%)
+   Alexander Holler                  1 (0.2%)
+   trix                              1 (0.2%)
+   Lan Chunhe                        1 (0.2%)
+   Roy Zang                          1 (0.2%)
+   Srikanth Srinivasan               1 (0.2%)
+   Rini van Zetten                   1 (0.2%)
+   Arun Bhanu                        1 (0.2%)
+   Jens Scharsig                     1 (0.2%)
+   karl.beldan@gmail.com             1 (0.2%)
+   Albin Tonnerre                    1 (0.2%)
+   Brent Kandetzki                   1 (0.2%)
+   Harald Krapfenbauer               1 (0.2%)
+   Alessandro Rubini                 1 (0.2%)
+   Achim Ehrlich                     1 (0.2%)
+   Daniel Gorsulowski                1 (0.2%)
+   Joonyoung Shim                    1 (0.2%)
+   Vipin KUMAR                       1 (0.2%)
+   Philippe De Muyter                1 (0.2%)
+   Michael Durrant                   1 (0.2%)
+   Florian Fainelli                  1 (0.2%)
+   Nikolay Petukhov                  1 (0.2%)
+   Renato Andreola                   1 (0.2%)
+   Matthias Weisser                  1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Thomas Chou                       16355 (28.2%)
+   Wolfgang Denk                     5566 (9.6%)
+   Cyril Chemparathy                 4714 (8.1%)
+   Graeme Russ                       3048 (5.3%)
+   Vaibhav Hiremath                  2844 (4.9%)
+   Stefan Roese                      2607 (4.5%)
+   Anatolij Gustschin                2373 (4.1%)
+   Minkyu Kang                       1632 (2.8%)
+   Albert Aribaud                    1534 (2.6%)
+   Wolfgang Wegner                   1375 (2.4%)
+   Peter Tyser                       1363 (2.4%)
+   Detlev Zundel                     1323 (2.3%)
+   Stefano Babic                     1270 (2.2%)
+   Tom                               1165 (2.0%)
+   Andre Schwarz                     1095 (1.9%)
+   TsiChung Liew                     1038 (1.8%)
+   trix                              974 (1.7%)
+   Scott McNutt                      863 (1.5%)
+   Asen Dimov                        859 (1.5%)
+   Siddarth Gore                     652 (1.1%)
+   Frans Meulenbroeks                515 (0.9%)
+   Timur Tabi                        421 (0.7%)
+   Mike Frysinger                    399 (0.7%)
+   Kumar Gala                        389 (0.7%)
+   Sudhakar Rajashekhara             363 (0.6%)
+   Heiko Schocher                    355 (0.6%)
+   Nikolay Petukhov                  301 (0.5%)
+   Brent Kandetzki                   294 (0.5%)
+   Renato Andreola                   282 (0.5%)
+   Michal Simek                      225 (0.4%)
+   Michael Zaidman                   216 (0.4%)
+   Naveen Krishna CH                 164 (0.3%)
+   Reinhard Arlt                     159 (0.3%)
+   Dave Liu                          87 (0.2%)
+   Kim Phillips                      87 (0.2%)
+   Dipen Dudhat                      87 (0.2%)
+   Delio Brignoli                    86 (0.1%)
+   Richard Retanubun                 76 (0.1%)
+   Fabio Estevam                     69 (0.1%)
+   Ron Madrid                        56 (0.1%)
+   Jerry Huang                       46 (0.1%)
+   Ed Swarthout                      37 (0.1%)
+   Matthias Kaehlcke                 34 (0.1%)
+   Arun Bhanu                        34 (0.1%)
+   Matthias Fuchs                    32 (0.1%)
+   Ben Warren                        31 (0.1%)
+   Srikanth Srinivasan               25 (0.0%)
+   Sergei Shtylyov                   24 (0.0%)
+   Lan Chunhe                        20 (0.0%)
+   Prafulla Wadaskar                 19 (0.0%)
+   Michael Durrant                   19 (0.0%)
+   Poonam Aggrwal                    15 (0.0%)
+   Sandeep Gopalpet                  15 (0.0%)
+   Vitaly Kuzmichev                  15 (0.0%)
+   Felix Radensky                    14 (0.0%)
+   Alessandro Rubini                 12 (0.0%)
+   Matthias Weisser                  12 (0.0%)
+   Kim B. Heino                      11 (0.0%)
+   Andreas Bießmann                  11 (0.0%)
+   Achim Ehrlich                     11 (0.0%)
+   Magnus Lilja                      10 (0.0%)
+   Grazvydas Ignotas                 9 (0.0%)
+   Harald Krapfenbauer               9 (0.0%)
+   Larry Johnson                     8 (0.0%)
+   Mahavir Jain                      8 (0.0%)
+   Nick Thompson                     8 (0.0%)
+   Florian Fainelli                  8 (0.0%)
+   Serge Ziryukin                    7 (0.0%)
+   Terry Lv                          7 (0.0%)
+   York Sun                          7 (0.0%)
+   Alexander Holler                  7 (0.0%)
+   Vipin KUMAR                       7 (0.0%)
+   Guennadi Liakhovetski             6 (0.0%)
+   Andrew Caldwell                   6 (0.0%)
+   Ender.Dai                         6 (0.0%)
+   Roy Zang                          6 (0.0%)
+   Albin Tonnerre                    6 (0.0%)
+   Joonyoung Shim                    6 (0.0%)
+   Rini van Zetten                   5 (0.0%)
+   Marek Vasut                       4 (0.0%)
+   Michael Weiss                     4 (0.0%)
+   Robin Getz                        4 (0.0%)
+   John Rigby                        3 (0.0%)
+   John Schmoller                    3 (0.0%)
+   Ilya Yanok                        3 (0.0%)
+   George G. Davis                   3 (0.0%)
+   Trübenbach, Ralf                  3 (0.0%)
+   Jens Scharsig                     3 (0.0%)
+   Becky Bruce                       2 (0.0%)
+   Fillod Stephane                   2 (0.0%)
+   Horst Kronstorfer                 2 (0.0%)
+   Norbert van Bolhuis               2 (0.0%)
+   Andy Fleming                      2 (0.0%)
+   Daniel Gorsulowski                2 (0.0%)
+   Philippe De Muyter                2 (0.0%)
+   Remy Bohmer                       1 (0.0%)
+   Peter Horton                      1 (0.0%)
+   Valentin Yakovenkov               1 (0.0%)
+   Eric Jarrige                      1 (0.0%)
+   karl.beldan@gmail.com             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Thomas Chou                       8029 (35.5%)
+   Detlev Zundel                     1280 (5.7%)
+   Scott McNutt                      435 (1.9%)
+   Fabio Estevam                     68 (0.3%)
+   Michal Simek                      64 (0.3%)
+   Mike Frysinger                    44 (0.2%)
+   Mahavir Jain                      7 (0.0%)
+   Matthias Kaehlcke                 4 (0.0%)
+   Harald Krapfenbauer               3 (0.0%)
+   Guennadi Liakhovetski             2 (0.0%)
+   Ender.Dai                         2 (0.0%)
+   Daniel Gorsulowski                2 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 143)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Scott McNutt                      22 (15.4%)
+   Sandeep Paulraj                   22 (15.4%)
+   Ben Warren                        22 (15.4%)
+   Kumar Gala                        18 (12.6%)
+   Stefan Roese                      8 (5.6%)
+   Kim Phillips                      7 (4.9%)
+   Minkyu Kang                       5 (3.5%)
+   Wolfgang Denk                     5 (3.5%)
+   Kyungmin Park                     4 (2.8%)
+   Sanjeev Premi                     4 (2.8%)
+   Mike Frysinger                    3 (2.1%)
+   Detlev Zundel                     2 (1.4%)
+   Roy Zang                          2 (1.4%)
+   Dave Liu                          2 (1.4%)
+   Thomas Chou                       1 (0.7%)
+   Michal Simek                      1 (0.7%)
+   Matthias Kaehlcke                 1 (0.7%)
+   Artem Bityutskiy                  1 (0.7%)
+   Haiying Wang                      1 (0.7%)
+   Tom Rix                           1 (0.7%)
+   Jingchang Lu                      1 (0.7%)
+   Jason Jin                         1 (0.7%)
+   David Wu                          1 (0.7%)
+   Michael Weiss                     1 (0.7%)
+   Srikanth Srinivasan               1 (0.7%)
+   Ed Swarthout                      1 (0.7%)
+   Sandeep Gopalpet                  1 (0.7%)
+   Ron Madrid                        1 (0.7%)
+   Dipen Dudhat                      1 (0.7%)
+   Heiko Schocher                    1 (0.7%)
+   Anatolij Gustschin                1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     2 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 15)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Ian Abbott                        4 (26.7%)
+   Ben Gardiner                      2 (13.3%)
+   Wolfgang Denk                     1 (6.7%)
+   Thomas Chou                       1 (6.7%)
+   Heiko Schocher                    1 (6.7%)
+   Anatolij Gustschin                1 (6.7%)
+   Thomas Weber                      1 (6.7%)
+   Magnus Lilja                      1 (6.7%)
+   Prafulla Wadaskar                 1 (6.7%)
+   Peter Tyser                       1 (6.7%)
+   Tom                               1 (6.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 15)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Thomas Chou                       4 (26.7%)
+   Ben Warren                        3 (20.0%)
+   Delio Brignoli                    2 (13.3%)
+   Wolfgang Denk                     1 (6.7%)
+   Mike Frysinger                    1 (6.7%)
+   Ed Swarthout                      1 (6.7%)
+   Vitaly Kuzmichev                  1 (6.7%)
+   Felix Radensky                    1 (6.7%)
+   Stefano Babic                     1 (6.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Haiying Wang                      1 (50.0%)
+   Peter Meerwald                    1 (50.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    1 (50.0%)
+   Kim Phillips                      1 (50.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         108 (26.9%)
+   DENX Software Engineering         79 (19.7%)
+   Freescale                         53 (13.2%)
+   Graeme Russ                       26 (6.5%)
+   Extreme Engineering Solutions     24 (6.0%)
+   Texas Instruments                 20 (5.0%)
+   Analog Devices                    16 (4.0%)
+   Samsung                           13 (3.2%)
+   Xilinx                            9 (2.2%)
+   MontaVista                        8 (2.0%)
+   Psyent                            8 (2.0%)
+   Ronetix                           7 (1.7%)
+   ESD Electronics                   4 (1.0%)
+   Sheldon Instruments               4 (1.0%)
+   Marvell                           3 (0.7%)
+   ACM                               2 (0.5%)
+   Bluegiga Technologies             2 (0.5%)
+   Matrix Vision                     2 (0.5%)
+   RuggedCom                         2 (0.5%)
+   ARVOO Engineering                 1 (0.2%)
+   Wind River                        1 (0.2%)
+   EmCraft Systems                   1 (0.2%)
+   Free Electrons                    1 (0.2%)
+   General Electric                  1 (0.2%)
+   Macq Electronique                 1 (0.2%)
+   ST Microelectronics               1 (0.2%)
+   taskit                            1 (0.2%)
+   Universita di Pavia               1 (0.2%)
+   Oce Technologies                  1 (0.2%)
+   Grazvydas Ignotas                 1 (0.2%)
+   Funky                             1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         24121 (41.7%)
+   DENX Software Engineering         13498 (23.3%)
+   Texas Instruments                 7921 (13.7%)
+   Graeme Russ                       3048 (5.3%)
+   Samsung                           1795 (3.1%)
+   Extreme Engineering Solutions     1366 (2.4%)
+   Freescale                         1253 (2.2%)
+   Matrix Vision                     1095 (1.9%)
+   Wind River                        974 (1.7%)
+   Psyent                            863 (1.5%)
+   Ronetix                           859 (1.5%)
+   Analog Devices                    409 (0.7%)
+   Xilinx                            225 (0.4%)
+   ESD Electronics                   193 (0.3%)
+   RuggedCom                         76 (0.1%)
+   Sheldon Instruments               56 (0.1%)
+   MontaVista                        42 (0.1%)
+   Marvell                           19 (0.0%)
+   Universita di Pavia               12 (0.0%)
+   Bluegiga Technologies             11 (0.0%)
+   taskit                            11 (0.0%)
+   Grazvydas Ignotas                 9 (0.0%)
+   ACM                               8 (0.0%)
+   General Electric                  8 (0.0%)
+   ST Microelectronics               7 (0.0%)
+   Funky                             7 (0.0%)
+   Free Electrons                    6 (0.0%)
+   ARVOO Engineering                 5 (0.0%)
+   EmCraft Systems                   3 (0.0%)
+   Macq Electronique                 2 (0.0%)
+   Oce Technologies                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 143)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         36 (25.2%)
+   (Unknown)                         27 (18.9%)
+   Texas Instruments                 26 (18.2%)
+   Psyent                            22 (15.4%)
+   DENX Software Engineering         17 (11.9%)
+   Samsung                           9 (6.3%)
+   Analog Devices                    3 (2.1%)
+   Wind River                        1 (0.7%)
+   Sheldon Instruments               1 (0.7%)
+   Nokia                             1 (0.7%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 101)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         39 (38.6%)
+   Freescale                         16 (15.8%)
+   DENX Software Engineering         7 (6.9%)
+   Texas Instruments                 3 (3.0%)
+   Samsung                           3 (3.0%)
+   Analog Devices                    3 (3.0%)
+   ESD Electronics                   3 (3.0%)
+   MontaVista                        3 (3.0%)
+   Extreme Engineering Solutions     2 (2.0%)
+   Psyent                            1 (1.0%)
+   Wind River                        1 (1.0%)
+   Sheldon Instruments               1 (1.0%)
+   Graeme Russ                       1 (1.0%)
+   Matrix Vision                     1 (1.0%)
+   Ronetix                           1 (1.0%)
+   Xilinx                            1 (1.0%)
+   RuggedCom                         1 (1.0%)
+   Marvell                           1 (1.0%)
+   Universita di Pavia               1 (1.0%)
+   Bluegiga Technologies             1 (1.0%)
+   taskit                            1 (1.0%)
+   Grazvydas Ignotas                 1 (1.0%)
+   ACM                               1 (1.0%)
+   General Electric                  1 (1.0%)
+   ST Microelectronics               1 (1.0%)
+   Funky                             1 (1.0%)
+   Free Electrons                    1 (1.0%)
+   ARVOO Engineering                 1 (1.0%)
+   EmCraft Systems                   1 (1.0%)
+   Macq Electronique                 1 (1.0%)
+   Oce Technologies                  1 (1.0%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2010.09.rst b/doc/develop/statistics/u-boot-stats-v2010.09.rst
new file mode 100644
index 00000000000..6a0def0c6e1
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2010.09.rst
@@ -0,0 +1,569 @@
+:orphan:
+
+Release Statistics for U-Boot v2010.09
+======================================
+
+* Processed 402 changesets from 100 developers
+
+* 31 employers found
+
+* A total of 42673 lines added, 22618 removed (delta 20055)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    77 (10.2%)
+   Kumar Gala                        69 (9.2%)
+   Wolfgang Denk                     55 (7.3%)
+   Steve Sakoman                     34 (4.5%)
+   Minkyu Kang                       33 (4.4%)
+   Stefan Roese                      28 (3.7%)
+   Stefano Babic                     19 (2.5%)
+   Albert Aribaud                    19 (2.5%)
+   Graeme Russ                       18 (2.4%)
+   Marek Vasut                       17 (2.3%)
+   Nobuhiro Iwamatsu                 16 (2.1%)
+   Prafulla Wadaskar                 16 (2.1%)
+   Vipin KUMAR                       14 (1.9%)
+   Paul Gortmaker                    13 (1.7%)
+   Reinhard Meyer                    11 (1.5%)
+   York Sun                          11 (1.5%)
+   Sandeep Paulraj                   10 (1.3%)
+   Heiko Schocher                    10 (1.3%)
+   Peter Tyser                       10 (1.3%)
+   Thomas Chou                       9 (1.2%)
+   Ajay Kumar Gupta                  9 (1.2%)
+   Becky Bruce                       9 (1.2%)
+   Kim Phillips                      8 (1.1%)
+   Naveen Krishna CH                 8 (1.1%)
+   Kevin Morfitt                     8 (1.1%)
+   Simon Kagstrom                    8 (1.1%)
+   Timur Tabi                        7 (0.9%)
+   Matthias Fuchs                    7 (0.9%)
+   Poonam Aggrwal                    7 (0.9%)
+   Matthias Kaehlcke                 7 (0.9%)
+   Mingkai Hu                        7 (0.9%)
+   Anatolij Gustschin                6 (0.8%)
+   Daniel Gorsulowski                6 (0.8%)
+   Scott Wood                        6 (0.8%)
+   Tom Rix                           6 (0.8%)
+   Michal Simek                      6 (0.8%)
+   Frans Meulenbroeks                5 (0.7%)
+   Anton Vorontsov                   5 (0.7%)
+   Asen Dimov                        5 (0.7%)
+   Marcel Ziswiler                   5 (0.7%)
+   Thomas Weber                      4 (0.5%)
+   Eric Bénard                       4 (0.5%)
+   Matthias Weisser                  4 (0.5%)
+   Hoan Hoang                        4 (0.5%)
+   Mans Rullgard                     3 (0.4%)
+   Haavard Skinnemoen                3 (0.4%)
+   Nishanth Menon                    3 (0.4%)
+   Michael Hennerich                 3 (0.4%)
+   Prakash PM                        3 (0.4%)
+   Nick Thompson                     3 (0.4%)
+   Andreas Bießmann                  3 (0.4%)
+   Alessandro Rubini                 3 (0.4%)
+   Ladislav Michl                    3 (0.4%)
+   Seunghyeon Rhee                   3 (0.4%)
+   Olof Johansson                    3 (0.4%)
+   Eric Millbrandt                   3 (0.4%)
+   Robin Getz                        3 (0.4%)
+   Detlev Zundel                     2 (0.3%)
+   Daniel Hobi                       2 (0.3%)
+   Lei Wen                           2 (0.3%)
+   Bryan Wu                          2 (0.3%)
+   Matthew McClintock                2 (0.3%)
+   Roy Zang                          2 (0.3%)
+   Philippe De Muyter                2 (0.3%)
+   Grazvydas Ignotas                 2 (0.3%)
+   Ben Warren                        2 (0.3%)
+   Rupjyoti Sarmah                   2 (0.3%)
+   Ilya Yanok                        2 (0.3%)
+   Florian Fainelli                  2 (0.3%)
+   Dipen Dudhat                      2 (0.3%)
+   Fabio Estevam                     2 (0.3%)
+   Joonyoung Shim                    2 (0.3%)
+   Martha M Stan                     2 (0.3%)
+   Werner Pfister                    2 (0.3%)
+   Dirk Eibach                       2 (0.3%)
+   Aneesh V                          1 (0.1%)
+   Karl Beldan                       1 (0.1%)
+   Michael Zaidman                   1 (0.1%)
+   Terry Lv                          1 (0.1%)
+   Wolfram Sang                      1 (0.1%)
+   Ricardo Salveti de Araujo         1 (0.1%)
+   Scott Ellis                       1 (0.1%)
+   Xiangfu Liu                       1 (0.1%)
+   Alexander Stein                   1 (0.1%)
+   Jens Scharsig                     1 (0.1%)
+   Lian Minghuan                     1 (0.1%)
+   Ben Gardiner                      1 (0.1%)
+   Sergei Poselenov                  1 (0.1%)
+   Sergei Trofimovich                1 (0.1%)
+   Li Haibo                          1 (0.1%)
+   Feng Wang                         1 (0.1%)
+   Stephan Linz                      1 (0.1%)
+   Aaron Pace                        1 (0.1%)
+   Emil Medve                        1 (0.1%)
+   Vivek Mahajan                     1 (0.1%)
+   Juergen Kilb                      1 (0.1%)
+   Wolfgang Wegner                   1 (0.1%)
+   Sergey Matyukevich                1 (0.1%)
+   Michael Weiss                     1 (0.1%)
+   Reinhard Meyer (-VC)              1 (0.1%)
+   Remy Bohmer                       1 (0.1%)
+   Felix Radensky                    1 (0.1%)
+   Vitaly Kuzmichev                  1 (0.1%)
+   Magnus Lilja                      1 (0.1%)
+   Tom                               1 (0.1%)
+   John Rigby                        1 (0.1%)
+   Siddarth Gore                     1 (0.1%)
+   Alexander Holler                  1 (0.1%)
+   trix                              1 (0.1%)
+   Sekhar Nori                       1 (0.1%)
+   Dirk Behme                        1 (0.1%)
+   Paul Gibson                       1 (0.1%)
+   Giuseppe CONDORELLI               1 (0.1%)
+   Harald Krapfenbauer               1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     113195 (57.1%)
+   Mike Frysinger                    7489 (3.8%)
+   Kumar Gala                        6977 (3.5%)
+   Minkyu Kang                       6369 (3.2%)
+   Graeme Russ                       5996 (3.0%)
+   Vipin KUMAR                       5698 (2.9%)
+   Stefan Roese                      4211 (2.1%)
+   Steve Sakoman                     4182 (2.1%)
+   Kevin Morfitt                     3099 (1.6%)
+   Matthias Kaehlcke                 3020 (1.5%)
+   Heiko Schocher                    2556 (1.3%)
+   Marek Vasut                       2482 (1.3%)
+   Tom Rix                           2165 (1.1%)
+   Prafulla Wadaskar                 2080 (1.0%)
+   Matthias Weisser                  1939 (1.0%)
+   Olof Johansson                    1913 (1.0%)
+   Stefano Babic                     1502 (0.8%)
+   Albert Aribaud                    1311 (0.7%)
+   Sandeep Paulraj                   1303 (0.7%)
+   Timur Tabi                        1257 (0.6%)
+   Thomas Weber                      1243 (0.6%)
+   Reinhard Meyer                    1198 (0.6%)
+   Thomas Chou                       1132 (0.6%)
+   trix                              974 (0.5%)
+   Ilya Yanok                        959 (0.5%)
+   Simon Kagstrom                    925 (0.5%)
+   Becky Bruce                       889 (0.4%)
+   Daniel Gorsulowski                887 (0.4%)
+   Michal Simek                      840 (0.4%)
+   Michael Zaidman                   713 (0.4%)
+   Peter Tyser                       665 (0.3%)
+   Tom                               665 (0.3%)
+   Siddarth Gore                     652 (0.3%)
+   Paul Gortmaker                    627 (0.3%)
+   York Sun                          458 (0.2%)
+   Ajay Kumar Gupta                  454 (0.2%)
+   Asen Dimov                        422 (0.2%)
+   Harald Krapfenbauer               411 (0.2%)
+   Nobuhiro Iwamatsu                 336 (0.2%)
+   Naveen Krishna CH                 328 (0.2%)
+   Michael Hennerich                 326 (0.2%)
+   Sekhar Nori                       325 (0.2%)
+   Mingkai Hu                        324 (0.2%)
+   Haavard Skinnemoen                284 (0.1%)
+   Kim Phillips                      269 (0.1%)
+   Anatolij Gustschin                248 (0.1%)
+   Martha M Stan                     239 (0.1%)
+   Wolfgang Wegner                   232 (0.1%)
+   Ladislav Michl                    180 (0.1%)
+   Terry Lv                          177 (0.1%)
+   Ben Gardiner                      176 (0.1%)
+   Nick Thompson                     152 (0.1%)
+   Poonam Aggrwal                    124 (0.1%)
+   Nishanth Menon                    111 (0.1%)
+   Eric Bénard                       103 (0.1%)
+   Mans Rullgard                     99 (0.0%)
+   Scott Wood                        97 (0.0%)
+   Hoan Hoang                        90 (0.0%)
+   Marcel Ziswiler                   82 (0.0%)
+   Rupjyoti Sarmah                   78 (0.0%)
+   Anton Vorontsov                   72 (0.0%)
+   Ben Warren                        72 (0.0%)
+   Fabio Estevam                     69 (0.0%)
+   Eric Millbrandt                   64 (0.0%)
+   Frans Meulenbroeks                60 (0.0%)
+   Prakash PM                        52 (0.0%)
+   Grazvydas Ignotas                 51 (0.0%)
+   Matthias Fuchs                    47 (0.0%)
+   Aneesh V                          39 (0.0%)
+   Sergey Matyukevich                39 (0.0%)
+   Lei Wen                           33 (0.0%)
+   Philippe De Muyter                32 (0.0%)
+   Dirk Behme                        28 (0.0%)
+   Dirk Eibach                       26 (0.0%)
+   Lian Minghuan                     25 (0.0%)
+   Sergei Trofimovich                23 (0.0%)
+   Ricardo Salveti de Araujo         22 (0.0%)
+   Robin Getz                        19 (0.0%)
+   Roy Zang                          19 (0.0%)
+   Matthew McClintock                17 (0.0%)
+   Scott Ellis                       16 (0.0%)
+   Vitaly Kuzmichev                  15 (0.0%)
+   Wolfram Sang                      14 (0.0%)
+   Felix Radensky                    14 (0.0%)
+   Seunghyeon Rhee                   12 (0.0%)
+   Bryan Wu                          12 (0.0%)
+   Joonyoung Shim                    12 (0.0%)
+   Detlev Zundel                     11 (0.0%)
+   Vivek Mahajan                     10 (0.0%)
+   Magnus Lilja                      10 (0.0%)
+   Alessandro Rubini                 9 (0.0%)
+   Daniel Hobi                       9 (0.0%)
+   Dipen Dudhat                      8 (0.0%)
+   Andreas Bießmann                  7 (0.0%)
+   Xiangfu Liu                       7 (0.0%)
+   Alexander Holler                  7 (0.0%)
+   Florian Fainelli                  6 (0.0%)
+   Werner Pfister                    5 (0.0%)
+   Michael Weiss                     5 (0.0%)
+   Jens Scharsig                     4 (0.0%)
+   Feng Wang                         4 (0.0%)
+   Stephan Linz                      4 (0.0%)
+   Reinhard Meyer (-VC)              3 (0.0%)
+   Giuseppe CONDORELLI               3 (0.0%)
+   Karl Beldan                       1 (0.0%)
+   Alexander Stein                   1 (0.0%)
+   Sergei Poselenov                  1 (0.0%)
+   Li Haibo                          1 (0.0%)
+   Aaron Pace                        1 (0.0%)
+   Emil Medve                        1 (0.0%)
+   Juergen Kilb                      1 (0.0%)
+   Remy Bohmer                       1 (0.0%)
+   John Rigby                        1 (0.0%)
+   Paul Gibson                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     105068 (74.7%)
+   Graeme Russ                       4244 (3.0%)
+   Thomas Chou                       979 (0.7%)
+   Kevin Morfitt                     867 (0.6%)
+   Michal Simek                      797 (0.6%)
+   Michael Zaidman                   612 (0.4%)
+   Peter Tyser                       383 (0.3%)
+   Becky Bruce                       206 (0.1%)
+   Ladislav Michl                    172 (0.1%)
+   Nishanth Menon                    104 (0.1%)
+   Fabio Estevam                     68 (0.0%)
+   Ben Warren                        48 (0.0%)
+   Marcel Ziswiler                   46 (0.0%)
+   Mans Rullgard                     42 (0.0%)
+   Scott Wood                        14 (0.0%)
+   Grazvydas Ignotas                 13 (0.0%)
+   Seunghyeon Rhee                   7 (0.0%)
+   Jens Scharsig                     3 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 293)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Sandeep Paulraj                   54 (18.4%)
+   Kumar Gala                        54 (18.4%)
+   Ben Warren                        30 (10.2%)
+   Stefan Roese                      19 (6.5%)
+   Minkyu Kang                       19 (6.5%)
+   Wolfgang Denk                     13 (4.4%)
+   Mike Frysinger                    13 (4.4%)
+   Kyungmin Park                     11 (3.8%)
+   Scott McNutt                      8 (2.7%)
+   Kim Phillips                      6 (2.0%)
+   Reinhard Meyer                    6 (2.0%)
+   Scott Wood                        5 (1.7%)
+   Roy Zang                          4 (1.4%)
+   Aneesh V                          4 (1.4%)
+   Steve Sakoman                     4 (1.4%)
+   Detlev Zundel                     3 (1.0%)
+   Becky Bruce                       2 (0.7%)
+   Emil Medve                        2 (0.7%)
+   Cliff Cai                         2 (0.7%)
+   Jaehoon Chung                     2 (0.7%)
+   Ed Swarthout                      2 (0.7%)
+   Dave Liu                          2 (0.7%)
+   HeungJun, Kim                     2 (0.7%)
+   Eric Bénard                       2 (0.7%)
+   York Sun                          2 (0.7%)
+   Timur Tabi                        2 (0.7%)
+   Shinya Kuribayashi                1 (0.3%)
+   Klaus Heydeck                     1 (0.3%)
+   Ashish Kalra                      1 (0.3%)
+   Stuart Yoder                      1 (0.3%)
+   Lan Chunhe-B25806                 1 (0.3%)
+   Andy Fleming                      1 (0.3%)
+   Li Yang                           1 (0.3%)
+   Dave Mitchell                     1 (0.3%)
+   Vaibhav Hiremath                  1 (0.3%)
+   Sanjeev Premi                     1 (0.3%)
+   Sudhakar Rajashekhara             1 (0.3%)
+   Kevin Morfitt                     1 (0.3%)
+   Stephen Neuendorffer              1 (0.3%)
+   Gao Guanhua                       1 (0.3%)
+   Vivek Mahajan                     1 (0.3%)
+   Dipen Dudhat                      1 (0.3%)
+   Scott Ellis                       1 (0.3%)
+   Mingkai Hu                        1 (0.3%)
+   Prafulla Wadaskar                 1 (0.3%)
+   Tom Rix                           1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 20)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Steve Sakoman                     3 (15.0%)
+   Thomas Chou                       3 (15.0%)
+   Stefan Roese                      1 (5.0%)
+   Minkyu Kang                       1 (5.0%)
+   Wolfgang Denk                     1 (5.0%)
+   Detlev Zundel                     1 (5.0%)
+   Peter Tyser                       1 (5.0%)
+   Ian Abbott                        1 (5.0%)
+   Philip Balister                   1 (5.0%)
+   Andreas Bießmann                  1 (5.0%)
+   Magnus Lilja                      1 (5.0%)
+   Hoan Hoang                        1 (5.0%)
+   Ben Gardiner                      1 (5.0%)
+   Anatolij Gustschin                1 (5.0%)
+   Heiko Schocher                    1 (5.0%)
+   Thomas Weber                      1 (5.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 20)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    5 (25.0%)
+   Grazvydas Ignotas                 2 (10.0%)
+   Steve Sakoman                     1 (5.0%)
+   Thomas Chou                       1 (5.0%)
+   Stefan Roese                      1 (5.0%)
+   Wolfgang Denk                     1 (5.0%)
+   Reinhard Meyer                    1 (5.0%)
+   Aneesh V                          1 (5.0%)
+   Timur Tabi                        1 (5.0%)
+   Kevin Morfitt                     1 (5.0%)
+   Michael Zaidman                   1 (5.0%)
+   Marcel Ziswiler                   1 (5.0%)
+   Seunghyeon Rhee                   1 (5.0%)
+   Feng Wang                         1 (5.0%)
+   Stefano Babic                     1 (5.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 4)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     2 (50.0%)
+   York Sun                          1 (25.0%)
+   Vivi Li                           1 (25.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 4)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    1 (25.0%)
+   Kumar Gala                        1 (25.0%)
+   Kim Phillips                      1 (25.0%)
+   Anton Vorontsov                   1 (25.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         144 (19.1%)
+   DENX Software Engineering         136 (18.0%)
+   Freescale                         134 (17.8%)
+   Analog Devices                    85 (11.3%)
+   Samsung                           41 (5.4%)
+   Sakoman Inc.                      34 (4.5%)
+   Texas Instruments                 25 (3.3%)
+   Wind River                        20 (2.7%)
+   Graeme Russ                       18 (2.4%)
+   Marvell                           16 (2.1%)
+   ST Microelectronics               15 (2.0%)
+   ESD Electronics                   13 (1.7%)
+   Renesas Electronics               13 (1.7%)
+   Extreme Engineering Solutions     10 (1.3%)
+   MontaVista                        6 (0.8%)
+   Xilinx                            6 (0.8%)
+   Ronetix                           5 (0.7%)
+   Atmel                             3 (0.4%)
+   EmCraft Systems                   3 (0.4%)
+   General Electric                  3 (0.4%)
+   IBM                               3 (0.4%)
+   Nobuhiro Iwamatsu                 3 (0.4%)
+   Funky                             3 (0.4%)
+   AMCC                              2 (0.3%)
+   Guntermann & Drunck               2 (0.3%)
+   Macq Electronique                 2 (0.3%)
+   Silicon Turnkey Express           2 (0.3%)
+   Gentoo                            1 (0.1%)
+   Harris Corporation                1 (0.1%)
+   Pengutronix                       1 (0.1%)
+   Phytec                            1 (0.1%)
+   Dirk Behme                        1 (0.1%)
+   Oce Technologies                  1 (0.1%)
+   Grazvydas Ignotas                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         124158 (62.6%)
+   (Unknown)                         17850 (9.0%)
+   Freescale                         10652 (5.4%)
+   Analog Devices                    7846 (4.0%)
+   Samsung                           6695 (3.4%)
+   Graeme Russ                       5996 (3.0%)
+   ST Microelectronics               5701 (2.9%)
+   Sakoman Inc.                      4182 (2.1%)
+   Wind River                        3766 (1.9%)
+   Texas Instruments                 2239 (1.1%)
+   Marvell                           2075 (1.0%)
+   IBM                               1913 (1.0%)
+   EmCraft Systems                   960 (0.5%)
+   ESD Electronics                   934 (0.5%)
+   Xilinx                            840 (0.4%)
+   Extreme Engineering Solutions     665 (0.3%)
+   Ronetix                           422 (0.2%)
+   Atmel                             284 (0.1%)
+   Silicon Turnkey Express           239 (0.1%)
+   Renesas Electronics               198 (0.1%)
+   General Electric                  152 (0.1%)
+   Nobuhiro Iwamatsu                 138 (0.1%)
+   MontaVista                        87 (0.0%)
+   AMCC                              78 (0.0%)
+   Funky                             40 (0.0%)
+   Macq Electronique                 32 (0.0%)
+   Dirk Behme                        28 (0.0%)
+   Guntermann & Drunck               26 (0.0%)
+   Grazvydas Ignotas                 25 (0.0%)
+   Gentoo                            23 (0.0%)
+   Pengutronix                       14 (0.0%)
+   Harris Corporation                4 (0.0%)
+   Phytec                            1 (0.0%)
+   Oce Technologies                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 293)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         90 (30.7%)
+   Texas Instruments                 61 (20.8%)
+   (Unknown)                         43 (14.7%)
+   DENX Software Engineering         35 (11.9%)
+   Samsung                           34 (11.6%)
+   Analog Devices                    15 (5.1%)
+   Psyent                            8 (2.7%)
+   Sakoman Inc.                      4 (1.4%)
+   Wind River                        1 (0.3%)
+   Marvell                           1 (0.3%)
+   Xilinx                            1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 120)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         49 (40.8%)
+   Freescale                         15 (12.5%)
+   DENX Software Engineering         7 (5.8%)
+   Texas Instruments                 6 (5.0%)
+   Analog Devices                    4 (3.3%)
+   Samsung                           3 (2.5%)
+   Wind River                        3 (2.5%)
+   Marvell                           2 (1.7%)
+   ST Microelectronics               2 (1.7%)
+   EmCraft Systems                   2 (1.7%)
+   ESD Electronics                   2 (1.7%)
+   MontaVista                        2 (1.7%)
+   Funky                             2 (1.7%)
+   Sakoman Inc.                      1 (0.8%)
+   Xilinx                            1 (0.8%)
+   Graeme Russ                       1 (0.8%)
+   IBM                               1 (0.8%)
+   Extreme Engineering Solutions     1 (0.8%)
+   Ronetix                           1 (0.8%)
+   Atmel                             1 (0.8%)
+   Silicon Turnkey Express           1 (0.8%)
+   Renesas Electronics               1 (0.8%)
+   General Electric                  1 (0.8%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   AMCC                              1 (0.8%)
+   Macq Electronique                 1 (0.8%)
+   Dirk Behme                        1 (0.8%)
+   Guntermann & Drunck               1 (0.8%)
+   Grazvydas Ignotas                 1 (0.8%)
+   Gentoo                            1 (0.8%)
+   Pengutronix                       1 (0.8%)
+   Harris Corporation                1 (0.8%)
+   Phytec                            1 (0.8%)
+   Oce Technologies                  1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2010.12.rst b/doc/develop/statistics/u-boot-stats-v2010.12.rst
new file mode 100644
index 00000000000..2127adf1e96
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2010.12.rst
@@ -0,0 +1,549 @@
+:orphan:
+
+Release Statistics for U-Boot v2010.12
+======================================
+
+* Processed 777 changesets from 111 developers
+
+* 31 employers found
+
+* A total of 75570 lines added, 90858 removed (delta -15288)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     90 (11.6%)
+   Mike Frysinger                    58 (7.5%)
+   Stefan Roese                      41 (5.3%)
+   Marek Vasut                       41 (5.3%)
+   Heiko Schocher                    39 (5.0%)
+   Peter Tyser                       36 (4.6%)
+   Stefano Babic                     32 (4.1%)
+   Andreas Bießmann                  22 (2.8%)
+   Kumar Gala                        21 (2.7%)
+   Steve Sakoman                     21 (2.7%)
+   Nobuhiro Iwamatsu                 20 (2.6%)
+   Graeme Russ                       20 (2.6%)
+   Ben Gardiner                      15 (1.9%)
+   Ilya Yanok                        14 (1.8%)
+   Reinhard Meyer                    12 (1.5%)
+   Scott Wood                        12 (1.5%)
+   Albert Aribaud                    12 (1.5%)
+   Timur Tabi                        11 (1.4%)
+   Prafulla Wadaskar                 11 (1.4%)
+   Vitaly Kuzmichev                  11 (1.4%)
+   Enric Balletbo i Serra            10 (1.3%)
+   John Rigby                        9 (1.2%)
+   Sandeep Paulraj                   9 (1.2%)
+   Dirk Behme                        8 (1.0%)
+   Anatolij Gustschin                8 (1.0%)
+   Joakim Tjernlund                  8 (1.0%)
+   York Sun                          8 (1.0%)
+   John Schmoller                    7 (0.9%)
+   Haiying Wang                      7 (0.9%)
+   Thomas Weber                      7 (0.9%)
+   Asen Dimov                        6 (0.8%)
+   Liu Hui-R64343                    6 (0.8%)
+   Daniel Hellstrom                  6 (0.8%)
+   Kim Phillips                      5 (0.6%)
+   Lei Wen                           5 (0.6%)
+   Mikhail Kshevetskiy               5 (0.6%)
+   Sukumar Ghorai                    5 (0.6%)
+   Michal Simek                      5 (0.6%)
+   Jerry Huang                       4 (0.5%)
+   Matt Waddel                       4 (0.5%)
+   Minkyu Kang                       4 (0.5%)
+   Sanjeev Premi                     4 (0.5%)
+   Nishanth Menon                    3 (0.4%)
+   Vaibhav Hiremath                  3 (0.4%)
+   Eric Cooper                       3 (0.4%)
+   Grazvydas Ignotas                 3 (0.4%)
+   Matthias Weisser                  3 (0.4%)
+   Shawn Guo                         3 (0.4%)
+   Alexander Stein                   3 (0.4%)
+   Li Yang                           2 (0.3%)
+   Nick Thompson                     2 (0.3%)
+   Macpaul Lin                       2 (0.3%)
+   Kristoffer Ericson                2 (0.3%)
+   Sekhar Nori                       2 (0.3%)
+   Sebastien Carlier                 2 (0.3%)
+   Matthew McClintock                2 (0.3%)
+   Ben Warren                        2 (0.3%)
+   Gray Remlin                       2 (0.3%)
+   Daniel Hobi                       2 (0.3%)
+   Darius Augulis                    2 (0.3%)
+   Andre Schwarz                     2 (0.3%)
+   Stephan Linz                      2 (0.3%)
+   Tirumala Marri                    2 (0.3%)
+   Peter Meerwald                    2 (0.3%)
+   clagix@gmail.com                  1 (0.1%)
+   Baidu Boy                         1 (0.1%)
+   P.V.Suresh                        1 (0.1%)
+   David Müller (ELSOFT AG)          1 (0.1%)
+   Ricardo Ribalda                   1 (0.1%)
+   Stefan Popa                       1 (0.1%)
+   Horst Kronstorfer                 1 (0.1%)
+   Semih Hazar                       1 (0.1%)
+   François Revol                    1 (0.1%)
+   Becky Bruce                       1 (0.1%)
+   Priyanka Jain                     1 (0.1%)
+   Alagu Sankar                      1 (0.1%)
+   Koen Kooi                         1 (0.1%)
+   Tanmay Upadhyay                   1 (0.1%)
+   C Nauman                          1 (0.1%)
+   Sughosh Ganu                      1 (0.1%)
+   Dirk Eibach                       1 (0.1%)
+   Florian Fainelli                  1 (0.1%)
+   Magnus Sjalander                  1 (0.1%)
+   Aaron Sierra                      1 (0.1%)
+   Ira Snyder                        1 (0.1%)
+   Richard Retanubun                 1 (0.1%)
+   Jens Scharsig                     1 (0.1%)
+   Magnus Lilja                      1 (0.1%)
+   Jaehoon Chung                     1 (0.1%)
+   Thomas Chou                       1 (0.1%)
+   Damien Dusha                      1 (0.1%)
+   Loic Minier                       1 (0.1%)
+   mark.vels@team-embedded.nl        1 (0.1%)
+   Bryan Wu                          1 (0.1%)
+   Ludovic Courtès                   1 (0.1%)
+   Brent Darley                      1 (0.1%)
+   Sergei Poselenov                  1 (0.1%)
+   Mikhail Zolotaryov                1 (0.1%)
+   Reinhard Meyer (-VC)              1 (0.1%)
+   Emil Medve                        1 (0.1%)
+   David Jander                      1 (0.1%)
+   Marc-André Hébert                 1 (0.1%)
+   Jeff Dischler                     1 (0.1%)
+   Graeme Smecher                    1 (0.1%)
+   Rupjyoti Sarmah                   1 (0.1%)
+   Sascha Laue                       1 (0.1%)
+   Wojtek Skulski                    1 (0.1%)
+   Torkel Lundgren                   1 (0.1%)
+   Victor Gallardo                   1 (0.1%)
+   Matthias Fuchs                    1 (0.1%)
+   Remy Bohmer                       1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     34518 (24.8%)
+   Mike Frysinger                    30577 (21.9%)
+   Marek Vasut                       13179 (9.5%)
+   Stefano Babic                     11065 (7.9%)
+   Stefan Roese                      5022 (3.6%)
+   Heiko Schocher                    4739 (3.4%)
+   Remy Bohmer                       4425 (3.2%)
+   Peter Tyser                       4210 (3.0%)
+   Reinhard Meyer                    2547 (1.8%)
+   Timur Tabi                        1764 (1.3%)
+   Dirk Eibach                       1544 (1.1%)
+   Ilya Yanok                        1467 (1.1%)
+   Albert Aribaud                    1465 (1.1%)
+   Prafulla Wadaskar                 1438 (1.0%)
+   Sebastien Carlier                 1384 (1.0%)
+   Eric Cooper                       1303 (0.9%)
+   John Schmoller                    1287 (0.9%)
+   Enric Balletbo i Serra            1205 (0.9%)
+   Sascha Laue                       1090 (0.8%)
+   C Nauman                          1016 (0.7%)
+   Andreas Bießmann                  989 (0.7%)
+   Matt Waddel                       863 (0.6%)
+   Graeme Russ                       835 (0.6%)
+   York Sun                          810 (0.6%)
+   Sergei Poselenov                  777 (0.6%)
+   Scott Wood                        749 (0.5%)
+   Tirumala Marri                    648 (0.5%)
+   Kumar Gala                        644 (0.5%)
+   Peter Meerwald                    604 (0.4%)
+   Kristoffer Ericson                553 (0.4%)
+   Ben Gardiner                      550 (0.4%)
+   Vitaly Kuzmichev                  514 (0.4%)
+   Sukumar Ghorai                    483 (0.3%)
+   Mikhail Kshevetskiy               454 (0.3%)
+   Steve Sakoman                     385 (0.3%)
+   Wojtek Skulski                    368 (0.3%)
+   Damien Dusha                      318 (0.2%)
+   John Rigby                        300 (0.2%)
+   Michal Simek                      253 (0.2%)
+   Liu Hui-R64343                    252 (0.2%)
+   Nobuhiro Iwamatsu                 242 (0.2%)
+   Anatolij Gustschin                212 (0.2%)
+   Grazvydas Ignotas                 187 (0.1%)
+   Haiying Wang                      143 (0.1%)
+   Koen Kooi                         140 (0.1%)
+   Macpaul Lin                       118 (0.1%)
+   Daniel Hellstrom                  113 (0.1%)
+   Darius Augulis                    113 (0.1%)
+   Nishanth Menon                    88 (0.1%)
+   Sandeep Paulraj                   83 (0.1%)
+   Joakim Tjernlund                  71 (0.1%)
+   Alagu Sankar                      71 (0.1%)
+   Thomas Weber                      65 (0.0%)
+   Shawn Guo                         65 (0.0%)
+   Sekhar Nori                       59 (0.0%)
+   Nick Thompson                     57 (0.0%)
+   Lei Wen                           56 (0.0%)
+   Aaron Sierra                      51 (0.0%)
+   Asen Dimov                        45 (0.0%)
+   Minkyu Kang                       44 (0.0%)
+   Ira Snyder                        44 (0.0%)
+   Sughosh Ganu                      43 (0.0%)
+   Torkel Lundgren                   42 (0.0%)
+   Mikhail Zolotaryov                41 (0.0%)
+   Sanjeev Premi                     40 (0.0%)
+   Dirk Behme                        39 (0.0%)
+   Ludovic Courtès                   35 (0.0%)
+   Li Yang                           30 (0.0%)
+   Matthias Weisser                  26 (0.0%)
+   Matthias Fuchs                    26 (0.0%)
+   Alexander Stein                   25 (0.0%)
+   Ben Warren                        24 (0.0%)
+   Thomas Chou                       24 (0.0%)
+   Jens Scharsig                     20 (0.0%)
+   Gray Remlin                       17 (0.0%)
+   Magnus Lilja                      16 (0.0%)
+   Jaehoon Chung                     16 (0.0%)
+   Bryan Wu                          16 (0.0%)
+   Kim Phillips                      14 (0.0%)
+   Rupjyoti Sarmah                   13 (0.0%)
+   Vaibhav Hiremath                  11 (0.0%)
+   Matthew McClintock                11 (0.0%)
+   Daniel Hobi                       11 (0.0%)
+   Magnus Sjalander                  11 (0.0%)
+   Tanmay Upadhyay                   10 (0.0%)
+   David Müller (ELSOFT AG)          9 (0.0%)
+   Emil Medve                        9 (0.0%)
+   David Jander                      9 (0.0%)
+   Graeme Smecher                    9 (0.0%)
+   Jerry Huang                       8 (0.0%)
+   clagix@gmail.com                  8 (0.0%)
+   Andre Schwarz                     7 (0.0%)
+   Baidu Boy                         6 (0.0%)
+   François Revol                    6 (0.0%)
+   Stephan Linz                      5 (0.0%)
+   P.V.Suresh                        4 (0.0%)
+   Semih Hazar                       4 (0.0%)
+   Priyanka Jain                     4 (0.0%)
+   Florian Fainelli                  4 (0.0%)
+   Reinhard Meyer (-VC)              4 (0.0%)
+   Marc-André Hébert                 4 (0.0%)
+   Richard Retanubun                 3 (0.0%)
+   mark.vels@team-embedded.nl        3 (0.0%)
+   Victor Gallardo                   3 (0.0%)
+   Stefan Popa                       2 (0.0%)
+   Brent Darley                      2 (0.0%)
+   Ricardo Ribalda                   1 (0.0%)
+   Horst Kronstorfer                 1 (0.0%)
+   Becky Bruce                       1 (0.0%)
+   Loic Minier                       1 (0.0%)
+   Jeff Dischler                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     23946 (26.4%)
+   Mike Frysinger                    13431 (14.8%)
+   Marek Vasut                       6370 (7.0%)
+   Peter Tyser                       3131 (3.4%)
+   Stefan Roese                      962 (1.1%)
+   Prafulla Wadaskar                 645 (0.7%)
+   Timur Tabi                        635 (0.7%)
+   Andreas Bießmann                  471 (0.5%)
+   Mikhail Kshevetskiy               411 (0.5%)
+   Kumar Gala                        248 (0.3%)
+   Scott Wood                        149 (0.2%)
+   Grazvydas Ignotas                 135 (0.1%)
+   Sughosh Ganu                      41 (0.0%)
+   Graeme Russ                       34 (0.0%)
+   Alagu Sankar                      32 (0.0%)
+   Thomas Weber                      31 (0.0%)
+   Matthias Fuchs                    21 (0.0%)
+   Nick Thompson                     15 (0.0%)
+   Liu Hui-R64343                    9 (0.0%)
+   Jens Scharsig                     9 (0.0%)
+   Semih Hazar                       4 (0.0%)
+   Richard Retanubun                 3 (0.0%)
+   Marc-André Hébert                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 208)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        51 (24.5%)
+   Sandeep Paulraj                   45 (21.6%)
+   Ben Warren                        14 (6.7%)
+   Wolfgang Denk                     13 (6.2%)
+   Mike Frysinger                    12 (5.8%)
+   Peter Tyser                       11 (5.3%)
+   Kim Phillips                      11 (5.3%)
+   Stefan Roese                      10 (4.8%)
+   Anatolij Gustschin                6 (2.9%)
+   Reinhard Meyer                    5 (2.4%)
+   Kyungmin Park                     4 (1.9%)
+   Chris Moore                       2 (1.0%)
+   Alessandro Rubini                 2 (1.0%)
+   Minkyu Kang                       2 (1.0%)
+   Michal Simek                      2 (1.0%)
+   Steve Sakoman                     2 (1.0%)
+   Heiko Schocher                    2 (1.0%)
+   Gray Remlin                       1 (0.5%)
+   Ricardo Ribalda Delgado           1 (0.5%)
+   Roy Zang                          1 (0.5%)
+   Francesco Rendine                 1 (0.5%)
+   Aneesh V                          1 (0.5%)
+   Cliff Cai                         1 (0.5%)
+   Harald Welte                      1 (0.5%)
+   Kai.Jiang                         1 (0.5%)
+   Marc-Andre Hebert                 1 (0.5%)
+   Thomas Smits                      1 (0.5%)
+   David Jander                      1 (0.5%)
+   Daniel Hellstrom                  1 (0.5%)
+   York Sun                          1 (0.5%)
+   Stefano Babic                     1 (0.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Ben Gardiner                      4 (80.0%)
+   Sudhakar Rajashekhara             1 (20.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 55)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Steve Sakoman                     10 (18.2%)
+   Heiko Schocher                    10 (18.2%)
+   Ben Gardiner                      9 (16.4%)
+   Stefano Babic                     8 (14.5%)
+   Wolfgang Denk                     3 (5.5%)
+   Reinhard Meyer                    3 (5.5%)
+   Sandeep Paulraj                   2 (3.6%)
+   Thomas Chou                       2 (3.6%)
+   Sudhakar Rajashekhara             1 (1.8%)
+   Peter Tyser                       1 (1.8%)
+   Nick Thompson                     1 (1.8%)
+   Ira Snyder                        1 (1.8%)
+   Detlev Zundel                     1 (1.8%)
+   Rob Herring                       1 (1.8%)
+   Nishanth Menon                    1 (1.8%)
+   John Rigby                        1 (1.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 55)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     10 (18.2%)
+   Scott Wood                        5 (9.1%)
+   Dirk Behme                        5 (9.1%)
+   Steve Sakoman                     4 (7.3%)
+   Jerry Huang                       4 (7.3%)
+   Sukumar Ghorai                    4 (7.3%)
+   Nick Thompson                     3 (5.5%)
+   Enric Balletbo i Serra            3 (5.5%)
+   John Rigby                        2 (3.6%)
+   Kumar Gala                        2 (3.6%)
+   Daniel Hobi                       2 (3.6%)
+   Li Yang                           2 (3.6%)
+   Heiko Schocher                    1 (1.8%)
+   Ben Gardiner                      1 (1.8%)
+   Mike Frysinger                    1 (1.8%)
+   Timur Tabi                        1 (1.8%)
+   Sughosh Ganu                      1 (1.8%)
+   Alagu Sankar                      1 (1.8%)
+   Liu Hui-R64343                    1 (1.8%)
+   Becky Bruce                       1 (1.8%)
+   Sebastien Carlier                 1 (1.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 4)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Vivi Li                           2 (50.0%)
+   Dan Lykowski                      1 (25.0%)
+   Peter Maydell                     1 (25.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 4)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    2 (50.0%)
+   Wolfgang Denk                     1 (25.0%)
+   Steve Sakoman                     1 (25.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         251 (32.3%)
+   (Unknown)                         146 (18.8%)
+   Freescale                         83 (10.7%)
+   Analog Devices                    59 (7.6%)
+   Extreme Engineering Solutions     46 (5.9%)
+   Texas Instruments                 26 (3.3%)
+   Sakoman Inc.                      20 (2.6%)
+   Graeme Russ                       20 (2.6%)
+   Nobuhiro Iwamatsu                 17 (2.2%)
+   Linaro                            15 (1.9%)
+   EmCraft Systems                   14 (1.8%)
+   Marvell                           13 (1.7%)
+   MontaVista                        11 (1.4%)
+   Transmode Systems                 8 (1.0%)
+   Dirk Behme                        8 (1.0%)
+   Gaisler Research                  7 (0.9%)
+   Ronetix                           6 (0.8%)
+   Samsung                           5 (0.6%)
+   Xilinx                            5 (0.6%)
+   Renesas Electronics               3 (0.4%)
+   General Electric                  2 (0.3%)
+   Matrix Vision                     2 (0.3%)
+   Grazvydas Ignotas                 2 (0.3%)
+   AMCC                              1 (0.1%)
+   ENEA AB                           1 (0.1%)
+   ESD Electronics                   1 (0.1%)
+   Guntermann & Drunck               1 (0.1%)
+   Liebherr                          1 (0.1%)
+   OVRO                              1 (0.1%)
+   RuggedCom                         1 (0.1%)
+   Oce Technologies                  1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         69493 (49.9%)
+   Analog Devices                    30593 (22.0%)
+   (Unknown)                         14459 (10.4%)
+   Extreme Engineering Solutions     5551 (4.0%)
+   Freescale                         4445 (3.2%)
+   Oce Technologies                  4425 (3.2%)
+   Guntermann & Drunck               1544 (1.1%)
+   EmCraft Systems                   1467 (1.1%)
+   Marvell                           1443 (1.0%)
+   Linaro                            1165 (0.8%)
+   Liebherr                          1090 (0.8%)
+   Graeme Russ                       835 (0.6%)
+   Texas Instruments                 764 (0.5%)
+   MontaVista                        514 (0.4%)
+   Sakoman Inc.                      384 (0.3%)
+   Xilinx                            253 (0.2%)
+   Nobuhiro Iwamatsu                 160 (0.1%)
+   Grazvydas Ignotas                 142 (0.1%)
+   Gaisler Research                  124 (0.1%)
+   Renesas Electronics               82 (0.1%)
+   Transmode Systems                 71 (0.1%)
+   Samsung                           60 (0.0%)
+   General Electric                  57 (0.0%)
+   Ronetix                           45 (0.0%)
+   OVRO                              44 (0.0%)
+   ENEA AB                           42 (0.0%)
+   Dirk Behme                        39 (0.0%)
+   ESD Electronics                   26 (0.0%)
+   AMCC                              13 (0.0%)
+   Matrix Vision                     7 (0.0%)
+   RuggedCom                         3 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 208)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         65 (31.2%)
+   Texas Instruments                 46 (22.1%)
+   DENX Software Engineering         32 (15.4%)
+   (Unknown)                         32 (15.4%)
+   Analog Devices                    13 (6.2%)
+   Extreme Engineering Solutions     11 (5.3%)
+   Samsung                           6 (2.9%)
+   Linaro                            2 (1.0%)
+   Gaisler Research                  1 (0.5%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 117)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         51 (43.6%)
+   Freescale                         15 (12.8%)
+   DENX Software Engineering         7 (6.0%)
+   Texas Instruments                 6 (5.1%)
+   Extreme Engineering Solutions     5 (4.3%)
+   Linaro                            4 (3.4%)
+   Analog Devices                    2 (1.7%)
+   Samsung                           2 (1.7%)
+   Gaisler Research                  2 (1.7%)
+   Marvell                           2 (1.7%)
+   Oce Technologies                  1 (0.9%)
+   Guntermann & Drunck               1 (0.9%)
+   EmCraft Systems                   1 (0.9%)
+   Liebherr                          1 (0.9%)
+   Graeme Russ                       1 (0.9%)
+   MontaVista                        1 (0.9%)
+   Sakoman Inc.                      1 (0.9%)
+   Xilinx                            1 (0.9%)
+   Nobuhiro Iwamatsu                 1 (0.9%)
+   Grazvydas Ignotas                 1 (0.9%)
+   Renesas Electronics               1 (0.9%)
+   Transmode Systems                 1 (0.9%)
+   General Electric                  1 (0.9%)
+   Ronetix                           1 (0.9%)
+   OVRO                              1 (0.9%)
+   ENEA AB                           1 (0.9%)
+   Dirk Behme                        1 (0.9%)
+   ESD Electronics                   1 (0.9%)
+   AMCC                              1 (0.9%)
+   Matrix Vision                     1 (0.9%)
+   RuggedCom                         1 (0.9%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2011.03.rst b/doc/develop/statistics/u-boot-stats-v2011.03.rst
new file mode 100644
index 00000000000..52424714469
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2011.03.rst
@@ -0,0 +1,452 @@
+:orphan:
+
+Release Statistics for U-Boot v2011.03
+======================================
+
+* Processed 451 changesets from 80 developers
+ 
+* 25 employers found
+
+* A total of 42168 lines added, 16328 removed (delta 25840)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        61 (13.5%)
+   Nobuhiro Iwamatsu                 33 (7.3%)
+   Graeme Russ                       32 (7.1%)
+   Mike Frysinger                    31 (6.9%)
+   York Sun                          22 (4.9%)
+   Stefano Babic                     20 (4.4%)
+   Wolfgang Denk                     17 (3.8%)
+   Sandeep Paulraj                   13 (2.9%)
+   Stefan Roese                      11 (2.4%)
+   Liu Hui-R64343                    10 (2.2%)
+   Minkyu Kang                       9 (2.0%)
+   Yoshihiro Shimoda                 9 (2.0%)
+   Lei Wen                           9 (2.0%)
+   Becky Bruce                       9 (2.0%)
+   Heiko Schocher                    8 (1.8%)
+   Prafulla Wadaskar                 7 (1.6%)
+   Vitaly Kuzmichev                  7 (1.6%)
+   Alexander Holler                  7 (1.6%)
+   Po-Yu Chuang                      6 (1.3%)
+   seedshope                         6 (1.3%)
+   Sughosh Ganu                      6 (1.3%)
+   Tom Warren                        5 (1.1%)
+   Loïc Minier                       5 (1.1%)
+   Thomas Chou                       5 (1.1%)
+   Shinya Kuribayashi                5 (1.1%)
+   Prabhakar Kushwaha                4 (0.9%)
+   Joakim Tjernlund                  4 (0.9%)
+   Peter Tyser                       4 (0.9%)
+   Fabio Estevam                     4 (0.9%)
+   Michal Simek                      4 (0.9%)
+   Marek Vasut                       4 (0.9%)
+   Sudhakar Rajashekhara             4 (0.9%)
+   Priyanka Jain                     3 (0.7%)
+   Simon Glass                       3 (0.7%)
+   Daniel Schwierzeck                3 (0.7%)
+   Scott Wood                        2 (0.4%)
+   Chander Kashyap                   2 (0.4%)
+   Ed Swarthout                      2 (0.4%)
+   Haiying Wang                      2 (0.4%)
+   Macpaul Lin                       2 (0.4%)
+   Matthew McClintock                2 (0.4%)
+   Remy Bohmer                       2 (0.4%)
+   Timur Tabi                        2 (0.4%)
+   Dirk Behme                        2 (0.4%)
+   Anatolij Gustschin                2 (0.4%)
+   Poonam Aggrwal                    2 (0.4%)
+   Yanjun Yang                       2 (0.4%)
+   Roy Zang                          2 (0.4%)
+   Ricardo Ribalda                   2 (0.4%)
+   Rabin Vincent                     2 (0.4%)
+   Wolfgang Wegner                   2 (0.4%)
+   Martin Krause                     1 (0.2%)
+   Jiang Yutang                      1 (0.2%)
+   Donghwa Lee                       1 (0.2%)
+   Peter Barada                      1 (0.2%)
+   John Schmoller                    1 (0.2%)
+   Alexander Stein                   1 (0.2%)
+   Dirk Eibach                       1 (0.2%)
+   Leo Liu                           1 (0.2%)
+   Jens Scharsig                     1 (0.2%)
+   Mike Rapoport                     1 (0.2%)
+   Ryan Mallon                       1 (0.2%)
+   Alex Dubov                        1 (0.2%)
+   Liu Ying                          1 (0.2%)
+   Dipen Dudhat                      1 (0.2%)
+   Holger Brunck                     1 (0.2%)
+   Jerry Huang                       1 (0.2%)
+   Li Yang                           1 (0.2%)
+   Paul Gortmaker                    1 (0.2%)
+   Chenhui Zhao                      1 (0.2%)
+   Piergiorgio Beruto                1 (0.2%)
+   David Müller                      1 (0.2%)
+   Felix Radensky                    1 (0.2%)
+   Chris Packham                     1 (0.2%)
+   Florian Fainelli                  1 (0.2%)
+   Reinhard Meyer                    1 (0.2%)
+   Wojtek Skulski                    1 (0.2%)
+   Chong Huang                       1 (0.2%)
+   Simon Kagstrom                    1 (0.2%)
+   Balaji T K                        1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        9138 (17.3%)
+   Stefano Babic                     5007 (9.5%)
+   Sandeep Paulraj                   4433 (8.4%)
+   Vitaly Kuzmichev                  2589 (4.9%)
+   Yoshihiro Shimoda                 2160 (4.1%)
+   Minkyu Kang                       2148 (4.1%)
+   Graeme Russ                       2136 (4.0%)
+   Liu Hui-R64343                    1982 (3.7%)
+   Sughosh Ganu                      1840 (3.5%)
+   Nobuhiro Iwamatsu                 1763 (3.3%)
+   Tom Warren                        1525 (2.9%)
+   Marek Vasut                       1314 (2.5%)
+   Lei Wen                           1217 (2.3%)
+   York Sun                          1148 (2.2%)
+   Prafulla Wadaskar                 1135 (2.1%)
+   Holger Brunck                     1039 (2.0%)
+   Dirk Eibach                       994 (1.9%)
+   Wolfgang Denk                     980 (1.9%)
+   Simon Glass                       966 (1.8%)
+   Becky Bruce                       911 (1.7%)
+   Macpaul Lin                       905 (1.7%)
+   Mike Frysinger                    898 (1.7%)
+   Alex Dubov                        847 (1.6%)
+   Mike Rapoport                     789 (1.5%)
+   Heiko Schocher                    669 (1.3%)
+   Ricardo Ribalda                   577 (1.1%)
+   Dirk Behme                        474 (0.9%)
+   Po-Yu Chuang                      404 (0.8%)
+   Sudhakar Rajashekhara             374 (0.7%)
+   Chong Huang                       280 (0.5%)
+   Stefan Roese                      268 (0.5%)
+   Donghwa Lee                       259 (0.5%)
+   Balaji T K                        229 (0.4%)
+   Priyanka Jain                     162 (0.3%)
+   Thomas Chou                       107 (0.2%)
+   Rabin Vincent                     104 (0.2%)
+   Shinya Kuribayashi                95 (0.2%)
+   Chris Packham                     94 (0.2%)
+   Prabhakar Kushwaha                89 (0.2%)
+   Fabio Estevam                     86 (0.2%)
+   Haiying Wang                      79 (0.1%)
+   Joakim Tjernlund                  58 (0.1%)
+   seedshope                         55 (0.1%)
+   Daniel Schwierzeck                54 (0.1%)
+   Peter Tyser                       50 (0.1%)
+   Alexander Holler                  42 (0.1%)
+   Michal Simek                      32 (0.1%)
+   John Schmoller                    32 (0.1%)
+   Wojtek Skulski                    29 (0.1%)
+   Anatolij Gustschin                27 (0.1%)
+   Li Yang                           23 (0.0%)
+   Poonam Aggrwal                    21 (0.0%)
+   Roy Zang                          21 (0.0%)
+   Timur Tabi                        20 (0.0%)
+   Leo Liu                           20 (0.0%)
+   David Müller                      18 (0.0%)
+   Jerry Huang                       16 (0.0%)
+   Wolfgang Wegner                   14 (0.0%)
+   Scott Wood                        13 (0.0%)
+   Peter Barada                      13 (0.0%)
+   Dipen Dudhat                      13 (0.0%)
+   Loïc Minier                       11 (0.0%)
+   Chenhui Zhao                      11 (0.0%)
+   Reinhard Meyer                    9 (0.0%)
+   Paul Gortmaker                    8 (0.0%)
+   Chander Kashyap                   7 (0.0%)
+   Jiang Yutang                      7 (0.0%)
+   Remy Bohmer                       5 (0.0%)
+   Martin Krause                     5 (0.0%)
+   Ed Swarthout                      4 (0.0%)
+   Simon Kagstrom                    4 (0.0%)
+   Yanjun Yang                       3 (0.0%)
+   Jens Scharsig                     3 (0.0%)
+   Ryan Mallon                       3 (0.0%)
+   Matthew McClintock                2 (0.0%)
+   Piergiorgio Beruto                2 (0.0%)
+   Alexander Stein                   1 (0.0%)
+   Liu Ying                          1 (0.0%)
+   Felix Radensky                    1 (0.0%)
+   Florian Fainelli                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        4123 (25.3%)
+   Holger Brunck                     1039 (6.4%)
+   Wolfgang Denk                     793 (4.9%)
+   Becky Bruce                       701 (4.3%)
+   Ricardo Ribalda                   544 (3.3%)
+   Mike Frysinger                    191 (1.2%)
+   Shinya Kuribayashi                61 (0.4%)
+   Daniel Schwierzeck                45 (0.3%)
+   Michal Simek                      12 (0.1%)
+   Simon Kagstrom                    3 (0.0%)
+   Jens Scharsig                     3 (0.0%)
+   Ryan Mallon                       2 (0.0%)
+   Loïc Minier                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 157)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        55 (35.0%)
+   Sandeep Paulraj                   19 (12.1%)
+   Minkyu Kang                       9 (5.7%)
+   Ben Gardiner                      8 (5.1%)
+   Stefan Roese                      8 (5.1%)
+   Nobuhiro Iwamatsu                 7 (4.5%)
+   Kyungmin Park                     5 (3.2%)
+   Scott McNutt                      4 (2.5%)
+   Wolfgang Denk                     3 (1.9%)
+   Shinya Kuribayashi                3 (1.9%)
+   Mahavir Jain                      3 (1.9%)
+   Li Yang                           3 (1.9%)
+   Mike Frysinger                    2 (1.3%)
+   Kim Phillips                      2 (1.3%)
+   Prakash PM                        2 (1.3%)
+   Scott Wood                        2 (1.3%)
+   Chenhui Zhao                      2 (1.3%)
+   Sudhakar Rajashekhara             2 (1.3%)
+   Tushar Behera                     1 (0.6%)
+   Andy Fleming                      1 (0.6%)
+   Magnus Lilja                      1 (0.6%)
+   Hemant Pedanekar                  1 (0.6%)
+   Alagu Sankar                      1 (0.6%)
+   Jin Qing                          1 (0.6%)
+   David Woodhouse                   1 (0.6%)
+   John Linn                         1 (0.6%)
+   Haitao Zhang                      1 (0.6%)
+   Ricardo Ribalda Delgado           1 (0.6%)
+   Ruslan Araslanov                  1 (0.6%)
+   Peter Tyser                       1 (0.6%)
+   Dipen Dudhat                      1 (0.6%)
+   Roy Zang                          1 (0.6%)
+   Po-Yu Chuang                      1 (0.6%)
+   Dirk Behme                        1 (0.6%)
+   Prafulla Wadaskar                 1 (0.6%)
+   Stefano Babic                     1 (0.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Macpaul Lin                       2 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 15)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Paul Gortmaker                    3 (20.0%)
+   Macpaul Lin                       2 (13.3%)
+   Stefano Babic                     2 (13.3%)
+   Alexander Holler                  2 (13.3%)
+   Wolfgang Denk                     1 (6.7%)
+   Magnus Lilja                      1 (6.7%)
+   Peter Tyser                       1 (6.7%)
+   Andreas Bießmann                  1 (6.7%)
+   Thomas Weber                      1 (6.7%)
+   Steve Sakoman                     1 (6.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 15)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Holler                  2 (13.3%)
+   Kumar Gala                        2 (13.3%)
+   Po-Yu Chuang                      2 (13.3%)
+   Stefano Babic                     1 (6.7%)
+   Becky Bruce                       1 (6.7%)
+   Peter Barada                      1 (6.7%)
+   Anatolij Gustschin                1 (6.7%)
+   Fabio Estevam                     1 (6.7%)
+   Chris Packham                     1 (6.7%)
+   Priyanka Jain                     1 (6.7%)
+   Balaji T K                        1 (6.7%)
+   Liu Hui-R64343                    1 (6.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Loïc Minier                       1 (33.3%)
+   Renaud Barbier                    1 (33.3%)
+   John Traill                       1 (33.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 3)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        2 (66.7%)
+   Loïc Minier                       1 (33.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         131 (29.0%)
+   (Unknown)                         72 (16.0%)
+   DENX Software Engineering         62 (13.7%)
+   Graeme Russ                       32 (7.1%)
+   Analog Devices                    31 (6.9%)
+   Nobuhiro Iwamatsu                 23 (5.1%)
+   Renesas Electronics               19 (4.2%)
+   Texas Instruments                 18 (4.0%)
+   Marvell                           11 (2.4%)
+   Samsung                           10 (2.2%)
+   Linaro                            7 (1.6%)
+   MontaVista                        7 (1.6%)
+   Extreme Engineering Solutions     5 (1.1%)
+   Transmode Systems                 4 (0.9%)
+   Xilinx                            4 (0.9%)
+   Google, Inc.                      3 (0.7%)
+   ST-Ericsson                       2 (0.4%)
+   Dirk Behme                        2 (0.4%)
+   Oce Technologies                  2 (0.4%)
+   Bluewater Systems                 1 (0.2%)
+   CompuLab                          1 (0.2%)
+   Wind River                        1 (0.2%)
+   Guntermann & Drunck               1 (0.2%)
+   Keymile                           1 (0.2%)
+   TQ Systems                        1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         13745 (26.0%)
+   DENX Software Engineering         8265 (15.6%)
+   (Unknown)                         8029 (15.2%)
+   Texas Instruments                 5036 (9.5%)
+   MontaVista                        2589 (4.9%)
+   Samsung                           2407 (4.6%)
+   Renesas Electronics               2311 (4.4%)
+   Graeme Russ                       2136 (4.0%)
+   Nobuhiro Iwamatsu                 1612 (3.0%)
+   Marvell                           1268 (2.4%)
+   Keymile                           1039 (2.0%)
+   Guntermann & Drunck               994 (1.9%)
+   Google, Inc.                      966 (1.8%)
+   Analog Devices                    898 (1.7%)
+   CompuLab                          789 (1.5%)
+   Dirk Behme                        474 (0.9%)
+   ST-Ericsson                       104 (0.2%)
+   Extreme Engineering Solutions     82 (0.2%)
+   Transmode Systems                 58 (0.1%)
+   Xilinx                            32 (0.1%)
+   Linaro                            18 (0.0%)
+   Wind River                        8 (0.0%)
+   Oce Technologies                  5 (0.0%)
+   TQ Systems                        5 (0.0%)
+   Bluewater Systems                 3 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 157)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         68 (43.3%)
+   Texas Instruments                 24 (15.3%)
+   (Unknown)                         17 (10.8%)
+   Samsung                           14 (8.9%)
+   DENX Software Engineering         12 (7.6%)
+   Nobuhiro Iwamatsu                 7 (4.5%)
+   Marvell                           4 (2.5%)
+   Psyent                            4 (2.5%)
+   Analog Devices                    2 (1.3%)
+   Dirk Behme                        1 (0.6%)
+   Extreme Engineering Solutions     1 (0.6%)
+   Xilinx                            1 (0.6%)
+   Linaro                            1 (0.6%)
+   Intel                             1 (0.6%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 84)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         29 (34.5%)
+   Freescale                         20 (23.8%)
+   DENX Software Engineering         6 (7.1%)
+   Texas Instruments                 3 (3.6%)
+   Samsung                           2 (2.4%)
+   Marvell                           2 (2.4%)
+   Extreme Engineering Solutions     2 (2.4%)
+   Linaro                            2 (2.4%)
+   Renesas Electronics               2 (2.4%)
+   Nobuhiro Iwamatsu                 1 (1.2%)
+   Analog Devices                    1 (1.2%)
+   Dirk Behme                        1 (1.2%)
+   Xilinx                            1 (1.2%)
+   MontaVista                        1 (1.2%)
+   Graeme Russ                       1 (1.2%)
+   Keymile                           1 (1.2%)
+   Guntermann & Drunck               1 (1.2%)
+   Google, Inc.                      1 (1.2%)
+   CompuLab                          1 (1.2%)
+   ST-Ericsson                       1 (1.2%)
+   Transmode Systems                 1 (1.2%)
+   Wind River                        1 (1.2%)
+   Oce Technologies                  1 (1.2%)
+   TQ Systems                        1 (1.2%)
+   Bluewater Systems                 1 (1.2%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2011.06.rst b/doc/develop/statistics/u-boot-stats-v2011.06.rst
new file mode 100644
index 00000000000..e1b00e96a38
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2011.06.rst
@@ -0,0 +1,601 @@
+:orphan:
+
+Release Statistics for U-Boot v2011.06
+======================================
+
+* Processed 636 changesets from 134 developers
+
+* 30 employers found
+
+* A total of 48114 lines added, 36696 removed (delta 11418)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    63 (9.9%)
+   Luca Ceresoli                     28 (4.4%)
+   Heiko Schocher                    26 (4.1%)
+   Andreas Bießmann                  23 (3.6%)
+   Fabio Estevam                     23 (3.6%)
+   Kumar Gala                        21 (3.3%)
+   Holger Brunck                     20 (3.1%)
+   Reinhard Meyer                    18 (2.8%)
+   Macpaul Lin                       18 (2.8%)
+   Wolfgang Denk                     17 (2.7%)
+   Michael Schwingen                 17 (2.7%)
+   Timur Tabi                        16 (2.5%)
+   Stefano Babic                     13 (2.0%)
+   Lei Wen                           10 (1.6%)
+   Thomas Chou                       9 (1.4%)
+   Dirk Eibach                       9 (1.4%)
+   Igor Grinberg                     9 (1.4%)
+   Eric Benard                       8 (1.3%)
+   Andy Fleming                      8 (1.3%)
+   Zhao Chenhui                      7 (1.1%)
+   Valentin Longchamp                7 (1.1%)
+   Graeme Russ                       7 (1.1%)
+   Aneesh V                          6 (0.9%)
+   Minkyu Kang                       6 (0.9%)
+   Daniel Schwierzeck                6 (0.9%)
+   Priyanka Jain                     6 (0.9%)
+   Grant Likely                      6 (0.9%)
+   Poonam Aggrwal                    6 (0.9%)
+   Chander Kashyap                   5 (0.8%)
+   John Rigby                        5 (0.8%)
+   David Müller (ELSOFT AG)          5 (0.8%)
+   Ben Gardiner                      5 (0.8%)
+   Joakim Tjernlund                  5 (0.8%)
+   Kyle Moffett                      5 (0.8%)
+   Jiang Yutang                      5 (0.8%)
+   Haiying Wang                      5 (0.8%)
+   Jason Liu                         4 (0.6%)
+   Clint Adams                       4 (0.6%)
+   Mingkai Hu                        4 (0.6%)
+   Matt Waddel                       4 (0.6%)
+   Kim Phillips                      4 (0.6%)
+   Dipen Dudhat                      4 (0.6%)
+   Tom Warren                        4 (0.6%)
+   Alexander Holler                  4 (0.6%)
+   Raffaele Recalcati                4 (0.6%)
+   Jens Scharsig                     3 (0.5%)
+   Enric Balletbo i Serra            3 (0.5%)
+   Dirk Behme                        3 (0.5%)
+   Jason Kridner                     3 (0.5%)
+   Thomas Herzmann                   3 (0.5%)
+   Shaohui Xie                       3 (0.5%)
+   Daniel Gorsulowski                3 (0.5%)
+   Stefan Roese                      3 (0.5%)
+   York Sun                          3 (0.5%)
+   Simon Guinot                      3 (0.5%)
+   Shinya Kuribayashi                3 (0.5%)
+   Anatolij Gustschin                3 (0.5%)
+   Jerry Huang                       3 (0.5%)
+   Po-Yu Chuang                      3 (0.5%)
+   Matthew McClintock                3 (0.5%)
+   Roy Zang                          3 (0.5%)
+   Alessandro Rubini                 3 (0.5%)
+   Loïc Minier                       3 (0.5%)
+   Florian Fainelli                  3 (0.5%)
+   Li Yang                           2 (0.3%)
+   Cliff Cai                         2 (0.3%)
+   Ilya Yanok                        2 (0.3%)
+   Ryan Mallon                       2 (0.3%)
+   Nobuhiro Iwamatsu                 2 (0.3%)
+   Albert ARIBAUD                    2 (0.3%)
+   Daniel Hobi                       2 (0.3%)
+   Scott Wood                        2 (0.3%)
+   Shawn Guo                         2 (0.3%)
+   ecc                               2 (0.3%)
+   Alex Waterman                     2 (0.3%)
+   Huber, Andreas                    2 (0.3%)
+   Emil Medve                        2 (0.3%)
+   Trübenbach, Ralf                  2 (0.3%)
+   Koen Kooi                         2 (0.3%)
+   Liu Hui-R64343                    2 (0.3%)
+   Aaron Williams                    2 (0.3%)
+   Richard Retanubun                 2 (0.3%)
+   Prabhakar Kushwaha                2 (0.3%)
+   Erik Hansen                       2 (0.3%)
+   Sergey Lapin                      1 (0.2%)
+   Helmut Raiger                     1 (0.2%)
+   Felix Radensky                    1 (0.2%)
+   Harald Krapfenbauer               1 (0.2%)
+   Haojian Zhuang                    1 (0.2%)
+   Luuk Paulussen                    1 (0.2%)
+   Patrick Sestier                   1 (0.2%)
+   Marek Vasut                       1 (0.2%)
+   Thomas Abraham                    1 (0.2%)
+   Michael Brandt                    1 (0.2%)
+   Jaehoon Chung                     1 (0.2%)
+   seedshope                         1 (0.2%)
+   Michael Walle                     1 (0.2%)
+   Sughosh Ganu                      1 (0.2%)
+   Detlev Zundel                     1 (0.2%)
+   Michael Jones                     1 (0.2%)
+   François Revol                    1 (0.2%)
+   Michal Simek                      1 (0.2%)
+   Che-liang Chiou                   1 (0.2%)
+   Steven A. Falco                   1 (0.2%)
+   Stefan Bigler                     1 (0.2%)
+   Thomas Reufer                     1 (0.2%)
+   Lei Xu                            1 (0.2%)
+   Ramneek Mehresh                   1 (0.2%)
+   Gray Remlin                       1 (0.2%)
+   thomas.langer@lantiq.com          1 (0.2%)
+   Rogan Dawes                       1 (0.2%)
+   Matthias Weisser                  1 (0.2%)
+   Srinath                           1 (0.2%)
+   Steve Kipisz                      1 (0.2%)
+   Ricardo Ribalda                   1 (0.2%)
+   Jon Povey                         1 (0.2%)
+   Nick Thompson                     1 (0.2%)
+   Simon Glass                       1 (0.2%)
+   Peter Tyser                       1 (0.2%)
+   James Kosin                       1 (0.2%)
+   Frans Meulenbroeks                1 (0.2%)
+   Wolfgang Wegner                   1 (0.2%)
+   Alagu Sankar                      1 (0.2%)
+   Remy Bohmer                       1 (0.2%)
+   Catalin Radu                      1 (0.2%)
+   Fabian Cenedese                   1 (0.2%)
+   Sonic Zhang                       1 (0.2%)
+   Chong Huang                       1 (0.2%)
+   Andreas Schallenberg              1 (0.2%)
+   Mario Schuknecht                  1 (0.2%)
+   Laurentiu TUDOR                   1 (0.2%)
+   bhaskar upadhaya                  1 (0.2%)
+   Pankaj Chauhan                    1 (0.2%)
+   michael                           1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    12342 (18.3%)
+   Wolfgang Denk                     8449 (12.5%)
+   Andy Fleming                      6135 (9.1%)
+   Heiko Schocher                    3110 (4.6%)
+   Michael Schwingen                 2329 (3.4%)
+   John Rigby                        2243 (3.3%)
+   Luca Ceresoli                     1904 (2.8%)
+   Holger Brunck                     1884 (2.8%)
+   Daniel Schwierzeck                1864 (2.8%)
+   Chander Kashyap                   1672 (2.5%)
+   Kumar Gala                        1520 (2.2%)
+   Macpaul Lin                       1506 (2.2%)
+   Eric Benard                       1386 (2.1%)
+   Mingkai Hu                        1262 (1.9%)
+   Dipen Dudhat                      1171 (1.7%)
+   Reinhard Meyer                    1142 (1.7%)
+   Timur Tabi                        1049 (1.6%)
+   Srinath                           891 (1.3%)
+   Tom Warren                        875 (1.3%)
+   Fabio Estevam                     872 (1.3%)
+   Michael Brandt                    808 (1.2%)
+   Jason Liu                         802 (1.2%)
+   Thomas Chou                       770 (1.1%)
+   Matt Waddel                       670 (1.0%)
+   Andreas Bießmann                  636 (0.9%)
+   David Müller (ELSOFT AG)          625 (0.9%)
+   Lei Wen                           553 (0.8%)
+   Scott Wood                        547 (0.8%)
+   Matthias Weisser                  443 (0.7%)
+   Ryan Mallon                       420 (0.6%)
+   Graeme Russ                       396 (0.6%)
+   Alessandro Rubini                 378 (0.6%)
+   Andreas Schallenberg              358 (0.5%)
+   Joakim Tjernlund                  323 (0.5%)
+   Valentin Longchamp                299 (0.4%)
+   Alexander Holler                  285 (0.4%)
+   Jason Kridner                     268 (0.4%)
+   Daniel Gorsulowski                250 (0.4%)
+   Florian Fainelli                  226 (0.3%)
+   Jens Scharsig                     210 (0.3%)
+   Shinya Kuribayashi                209 (0.3%)
+   Stefano Babic                     204 (0.3%)
+   Haiying Wang                      195 (0.3%)
+   Thomas Herzmann                   193 (0.3%)
+   Chong Huang                       178 (0.3%)
+   Igor Grinberg                     175 (0.3%)
+   Jerry Huang                       169 (0.2%)
+   Roy Zang                          169 (0.2%)
+   Jiang Yutang                      163 (0.2%)
+   Emil Medve                        159 (0.2%)
+   Grant Likely                      150 (0.2%)
+   Dirk Eibach                       147 (0.2%)
+   Raffaele Recalcati                143 (0.2%)
+   Thomas Reufer                     140 (0.2%)
+   Poonam Aggrwal                    123 (0.2%)
+   Kyle Moffett                      122 (0.2%)
+   Steven A. Falco                   114 (0.2%)
+   Richard Retanubun                 111 (0.2%)
+   Prabhakar Kushwaha                108 (0.2%)
+   Huber, Andreas                    107 (0.2%)
+   Enric Balletbo i Serra            106 (0.2%)
+   Kim Phillips                      101 (0.1%)
+   Shaohui Xie                       97 (0.1%)
+   Sergey Lapin                      97 (0.1%)
+   Priyanka Jain                     89 (0.1%)
+   Minkyu Kang                       70 (0.1%)
+   Michael Jones                     63 (0.1%)
+   Clint Adams                       62 (0.1%)
+   Koen Kooi                         61 (0.1%)
+   Remy Bohmer                       56 (0.1%)
+   Matthew McClintock                49 (0.1%)
+   Ilya Yanok                        48 (0.1%)
+   Erik Hansen                       48 (0.1%)
+   Ben Gardiner                      45 (0.1%)
+   Jaehoon Chung                     45 (0.1%)
+   Zhao Chenhui                      38 (0.1%)
+   Li Yang                           35 (0.1%)
+   Liu Hui-R64343                    31 (0.0%)
+   Nick Thompson                     31 (0.0%)
+   Aneesh V                          29 (0.0%)
+   thomas.langer@lantiq.com          27 (0.0%)
+   Po-Yu Chuang                      26 (0.0%)
+   Anatolij Gustschin                25 (0.0%)
+   Stefan Roese                      24 (0.0%)
+   Albert ARIBAUD                    22 (0.0%)
+   York Sun                          18 (0.0%)
+   Harald Krapfenbauer               18 (0.0%)
+   Steve Kipisz                      18 (0.0%)
+   Ramneek Mehresh                   16 (0.0%)
+   Laurentiu TUDOR                   16 (0.0%)
+   Alex Waterman                     14 (0.0%)
+   Loïc Minier                       13 (0.0%)
+   Detlev Zundel                     12 (0.0%)
+   Stefan Bigler                     12 (0.0%)
+   Simon Guinot                      11 (0.0%)
+   Aaron Williams                    11 (0.0%)
+   Wolfgang Wegner                   11 (0.0%)
+   Catalin Radu                      10 (0.0%)
+   Michael Walle                     9 (0.0%)
+   bhaskar upadhaya                  9 (0.0%)
+   Peter Tyser                       8 (0.0%)
+   Daniel Hobi                       7 (0.0%)
+   Felix Radensky                    7 (0.0%)
+   Michal Simek                      7 (0.0%)
+   Jon Povey                         7 (0.0%)
+   Fabian Cenedese                   7 (0.0%)
+   Cliff Cai                         6 (0.0%)
+   Shawn Guo                         6 (0.0%)
+   ecc                               6 (0.0%)
+   Ricardo Ribalda                   5 (0.0%)
+   Sonic Zhang                       5 (0.0%)
+   Marek Vasut                       4 (0.0%)
+   Lei Xu                            4 (0.0%)
+   James Kosin                       4 (0.0%)
+   Dirk Behme                        3 (0.0%)
+   Trübenbach, Ralf                  3 (0.0%)
+   Patrick Sestier                   3 (0.0%)
+   François Revol                    3 (0.0%)
+   Frans Meulenbroeks                3 (0.0%)
+   Alagu Sankar                      3 (0.0%)
+   Pankaj Chauhan                    3 (0.0%)
+   Nobuhiro Iwamatsu                 2 (0.0%)
+   Luuk Paulussen                    2 (0.0%)
+   Thomas Abraham                    2 (0.0%)
+   seedshope                         2 (0.0%)
+   Sughosh Ganu                      2 (0.0%)
+   Che-liang Chiou                   2 (0.0%)
+   Gray Remlin                       2 (0.0%)
+   Rogan Dawes                       2 (0.0%)
+   Mario Schuknecht                  2 (0.0%)
+   michael                           2 (0.0%)
+   Helmut Raiger                     1 (0.0%)
+   Haojian Zhuang                    1 (0.0%)
+   Simon Glass                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     7936 (21.6%)
+   Daniel Schwierzeck                1500 (4.1%)
+   Eric Benard                       895 (2.4%)
+   Holger Brunck                     545 (1.5%)
+   Scott Wood                        503 (1.4%)
+   Kumar Gala                        496 (1.4%)
+   David Müller (ELSOFT AG)          377 (1.0%)
+   Alessandro Rubini                 363 (1.0%)
+   Andreas Bießmann                  272 (0.7%)
+   Reinhard Meyer                    159 (0.4%)
+   Shinya Kuribayashi                115 (0.3%)
+   Graeme Russ                       90 (0.2%)
+   Michael Jones                     63 (0.2%)
+   Nick Thompson                     20 (0.1%)
+   Liu Hui-R64343                    18 (0.0%)
+   Erik Hansen                       16 (0.0%)
+   thomas.langer@lantiq.com          15 (0.0%)
+   Stefan Roese                      14 (0.0%)
+   Po-Yu Chuang                      9 (0.0%)
+   Stefano Babic                     8 (0.0%)
+   Fabian Cenedese                   7 (0.0%)
+   Shawn Guo                         6 (0.0%)
+   Albert ARIBAUD                    4 (0.0%)
+   Daniel Hobi                       4 (0.0%)
+   Felix Radensky                    4 (0.0%)
+   Harald Krapfenbauer               3 (0.0%)
+   Loïc Minier                       2 (0.0%)
+   Ben Gardiner                      1 (0.0%)
+   Jon Povey                         1 (0.0%)
+   Marek Vasut                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 281)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kumar Gala                        80 (28.5%)
+   Sandeep Paulraj                   32 (11.4%)
+   Valentin Longchamp                23 (8.2%)
+   Holger Brunck                     19 (6.8%)
+   Stefan Roese                      15 (5.3%)
+   Mike Frysinger                    13 (4.6%)
+   Andy Fleming                      12 (4.3%)
+   Minkyu Kang                       11 (3.9%)
+   Scott Wood                        8 (2.8%)
+   Shinya Kuribayashi                6 (2.1%)
+   Zhao Chenhui                      4 (1.4%)
+   Poonam Aggrwal                    4 (1.4%)
+   Jason Kridner                     4 (1.4%)
+   Heiko Schocher                    4 (1.4%)
+   Lukas Roggli                      3 (1.1%)
+   Timur Tabi                        3 (1.1%)
+   Kyungmin Park                     2 (0.7%)
+   Albert Aribaud                    2 (0.7%)
+   David Woodhouse                   2 (0.7%)
+   Jin Qing                          2 (0.7%)
+   Li Yang                           2 (0.7%)
+   Shaohui Xie                       2 (0.7%)
+   Roy Zang                          2 (0.7%)
+   Mingkai Hu                        2 (0.7%)
+   Dipen Dudhat                      2 (0.7%)
+   Wolfgang Denk                     1 (0.4%)
+   Loïc Minier                       1 (0.4%)
+   Mathieu Poirier                   1 (0.4%)
+   Tushar Behera                     1 (0.4%)
+   Scott McNutt                      1 (0.4%)
+   Rabin Vincent                     1 (0.4%)
+   Luca Haab                         1 (0.4%)
+   Clive Stubbings                   1 (0.4%)
+   Ricardo Ribalda Delgado           1 (0.4%)
+   Brian Norris                      1 (0.4%)
+   Chunhe Lan                        1 (0.4%)
+   Haitao Zhang                      1 (0.4%)
+   Steffen Sledz                     1 (0.4%)
+   Sandeep Gopalpet                  1 (0.4%)
+   Michael Trimarchi                 1 (0.4%)
+   Stefan Bigler                     1 (0.4%)
+   Anatolij Gustschin                1 (0.4%)
+   Priyanka Jain                     1 (0.4%)
+   Thomas Reufer                     1 (0.4%)
+   Jerry Huang                       1 (0.4%)
+   Fabio Estevam                     1 (0.4%)
+   John Rigby                        1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    1 (10.0%)
+   Anatolij Gustschin                1 (10.0%)
+   Fabio Estevam                     1 (10.0%)
+   Andreas Bießmann                  1 (10.0%)
+   Graeme Russ                       1 (10.0%)
+   Stefano Babic                     1 (10.0%)
+   Felix Radensky                    1 (10.0%)
+   Magnus Lilja                      1 (10.0%)
+   Andre Schwarz                     1 (10.0%)
+   Sughosh Ganu                      1 (10.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Fabio Estevam                     2 (20.0%)
+   Kim Phillips                      2 (20.0%)
+   Anatolij Gustschin                1 (10.0%)
+   Stefano Babic                     1 (10.0%)
+   Stefan Roese                      1 (10.0%)
+   Scott Wood                        1 (10.0%)
+   Priyanka Jain                     1 (10.0%)
+   Jens Scharsig                     1 (10.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andre Schwarz                     1 (20.0%)
+   Kumar Gala                        1 (20.0%)
+   Wolfgang Denk                     1 (20.0%)
+   Michael Weiss                     1 (20.0%)
+   Jianxi Fu                         1 (20.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    2 (40.0%)
+   Kim Phillips                      1 (20.0%)
+   Anatolij Gustschin                1 (20.0%)
+   Peter Tyser                       1 (20.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         232 (36.5%)
+   Freescale                         127 (20.0%)
+   Analog Devices                    66 (10.4%)
+   DENX Software Engineering         64 (10.1%)
+   Keymile                           34 (5.3%)
+   Linaro                            30 (4.7%)
+   Texas Instruments                 10 (1.6%)
+   CompuLab                          9 (1.4%)
+   Guntermann & Drunck               9 (1.4%)
+   Samsung                           7 (1.1%)
+   Graeme Russ                       7 (1.1%)
+   Boeing                            5 (0.8%)
+   Transmode Systems                 5 (0.8%)
+   Marvell                           4 (0.6%)
+   ESD Electronics                   3 (0.5%)
+   Universita di Pavia               3 (0.5%)
+   Dirk Behme                        3 (0.5%)
+   Google, Inc.                      2 (0.3%)
+   Bluewater Systems                 2 (0.3%)
+   EmCraft Systems                   2 (0.3%)
+   RuggedCom                         2 (0.3%)
+   Nobuhiro Iwamatsu                 2 (0.3%)
+   General Electric                  1 (0.2%)
+   Harris Corporation                1 (0.2%)
+   Matrix Vision                     1 (0.2%)
+   Mistral                           1 (0.2%)
+   ST-Ericsson                       1 (0.2%)
+   Extreme Engineering Solutions     1 (0.2%)
+   Xilinx                            1 (0.2%)
+   Oce Technologies                  1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         16339 (24.2%)
+   Freescale                         13914 (20.6%)
+   Analog Devices                    12353 (18.3%)
+   DENX Software Engineering         11828 (17.5%)
+   Linaro                            5558 (8.2%)
+   Keymile                           2635 (3.9%)
+   Mistral                           891 (1.3%)
+   ST-Ericsson                       808 (1.2%)
+   Bluewater Systems                 420 (0.6%)
+   Graeme Russ                       396 (0.6%)
+   Universita di Pavia               378 (0.6%)
+   Transmode Systems                 323 (0.5%)
+   Texas Instruments                 315 (0.5%)
+   ESD Electronics                   250 (0.4%)
+   Marvell                           189 (0.3%)
+   CompuLab                          175 (0.3%)
+   Guntermann & Drunck               147 (0.2%)
+   Boeing                            122 (0.2%)
+   Samsung                           115 (0.2%)
+   Harris Corporation                114 (0.2%)
+   RuggedCom                         111 (0.2%)
+   Matrix Vision                     63 (0.1%)
+   Oce Technologies                  56 (0.1%)
+   EmCraft Systems                   48 (0.1%)
+   General Electric                  31 (0.0%)
+   Extreme Engineering Solutions     8 (0.0%)
+   Xilinx                            7 (0.0%)
+   Dirk Behme                        3 (0.0%)
+   Google, Inc.                      3 (0.0%)
+   Nobuhiro Iwamatsu                 2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 281)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         128 (45.6%)
+   Keymile                           48 (17.1%)
+   Texas Instruments                 36 (12.8%)
+   DENX Software Engineering         21 (7.5%)
+   Analog Devices                    13 (4.6%)
+   Samsung                           13 (4.6%)
+   (Unknown)                         12 (4.3%)
+   Linaro                            4 (1.4%)
+   Intel                             2 (0.7%)
+   ST-Ericsson                       1 (0.4%)
+   Amarula Solutions                 1 (0.4%)
+   Psyent                            1 (0.4%)
+   Xentech Solutions                 1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 136)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         57 (41.9%)
+   Freescale                         27 (19.9%)
+   Linaro                            8 (5.9%)
+   DENX Software Engineering         7 (5.1%)
+   Keymile                           6 (4.4%)
+   Texas Instruments                 3 (2.2%)
+   Analog Devices                    3 (2.2%)
+   Samsung                           2 (1.5%)
+   Google, Inc.                      2 (1.5%)
+   ST-Ericsson                       1 (0.7%)
+   Mistral                           1 (0.7%)
+   Bluewater Systems                 1 (0.7%)
+   Graeme Russ                       1 (0.7%)
+   Universita di Pavia               1 (0.7%)
+   Transmode Systems                 1 (0.7%)
+   ESD Electronics                   1 (0.7%)
+   Marvell                           1 (0.7%)
+   CompuLab                          1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   Boeing                            1 (0.7%)
+   Harris Corporation                1 (0.7%)
+   RuggedCom                         1 (0.7%)
+   Matrix Vision                     1 (0.7%)
+   Oce Technologies                  1 (0.7%)
+   EmCraft Systems                   1 (0.7%)
+   General Electric                  1 (0.7%)
+   Extreme Engineering Solutions     1 (0.7%)
+   Xilinx                            1 (0.7%)
+   Dirk Behme                        1 (0.7%)
+   Nobuhiro Iwamatsu                 1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2011.09.rst b/doc/develop/statistics/u-boot-stats-v2011.09.rst
new file mode 100644
index 00000000000..9e2538e1e02
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2011.09.rst
@@ -0,0 +1,561 @@
+:orphan:
+
+Release Statistics for U-Boot v2011.09
+======================================
+
+* Processed 645 changesets from 120 developers
+
+* 30 employers found
+
+* A total of 37905 lines added, 45961 removed (delta -8056)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     76 (11.8%)
+   Mike Frysinger                    47 (7.3%)
+   Aneesh V                          45 (7.0%)
+   Stefano Babic                     32 (5.0%)
+   Andreas Bießmann                  19 (2.9%)
+   Holger Brunck                     16 (2.5%)
+   Kumar Gala                        15 (2.3%)
+   Jason Kridner                     13 (2.0%)
+   Matthias Weisser                  12 (1.9%)
+   Nagabhushana Netagunte            11 (1.7%)
+   York Sun                          11 (1.7%)
+   Linus Walleij                     10 (1.6%)
+   Fabio Estevam                     10 (1.6%)
+   Michael Jones                     10 (1.6%)
+   Simon Glass                       10 (1.6%)
+   Heiko Schocher                    10 (1.6%)
+   Daniel Schwierzeck                10 (1.6%)
+   Marek Vasut                       9 (1.4%)
+   Jason Jin                         9 (1.4%)
+   Tom Rini                          9 (1.4%)
+   Timur Tabi                        9 (1.4%)
+   Koen Kooi                         8 (1.2%)
+   Sanjeev Premi                     7 (1.1%)
+   Laurence Withers                  7 (1.1%)
+   Graeme Russ                       7 (1.1%)
+   Joel A Fernandes                  6 (0.9%)
+   Greg Ungerer                      6 (0.9%)
+   Chander Kashyap                   6 (0.9%)
+   Anatolij Gustschin                6 (0.9%)
+   Xu, Hong                          6 (0.9%)
+   Dirk Behme                        5 (0.8%)
+   Vaibhav Hiremath                  5 (0.8%)
+   Łukasz Majewski                   5 (0.8%)
+   Igor Grinberg                     5 (0.8%)
+   Phil Edworthy                     5 (0.8%)
+   Matthew McClintock                5 (0.8%)
+   Ramneek Mehresh                   5 (0.8%)
+   Ben Gardiner                      5 (0.8%)
+   Anton Staaf                       4 (0.6%)
+   Lei Wen                           4 (0.6%)
+   Thomas Petazzoni                  4 (0.6%)
+   Reinhard Meyer                    4 (0.6%)
+   Asen Dimov                        4 (0.6%)
+   Yoshihiro Shimoda                 4 (0.6%)
+   Mingkai Hu                        4 (0.6%)
+   Jens Scharsig                     4 (0.6%)
+   Rob Herring                       4 (0.6%)
+   Tom Warren                        4 (0.6%)
+   Andre Schwarz                     4 (0.6%)
+   Albert ARIBAUD                    3 (0.5%)
+   Vladimir Zapolskiy                3 (0.5%)
+   Valentin Longchamp                3 (0.5%)
+   Zhao Chenhui                      3 (0.5%)
+   Macpaul Lin                       3 (0.5%)
+   Nobuhiro Iwamatsu                 3 (0.5%)
+   Shaohui Xie                       3 (0.5%)
+   Jeroen Hofstee                    3 (0.5%)
+   Becky Bruce                       3 (0.5%)
+   David Müller (ELSOFT AG)          3 (0.5%)
+   Stefan Roese                      2 (0.3%)
+   Sandeep Paulraj                   2 (0.3%)
+   Sudhakar Rajashekhara             2 (0.3%)
+   Helmut Raiger                     2 (0.3%)
+   David Jander                      2 (0.3%)
+   Jason Cooper                      2 (0.3%)
+   Ajay Bhargav                      2 (0.3%)
+   Po-Yu Chuang                      2 (0.3%)
+   John Rigby                        2 (0.3%)
+   Simon Guinot                      2 (0.3%)
+   Andy Fleming                      2 (0.3%)
+   Stefan Bigler                     2 (0.3%)
+   Andreas Pretzsch                  2 (0.3%)
+   Jason Hobbs                       2 (0.3%)
+   Torsten Koschorrek                2 (0.3%)
+   David Gibson                      2 (0.3%)
+   Jana Rapava                       2 (0.3%)
+   Harald Krapfenbauer               2 (0.3%)
+   Vadim Bendebury                   1 (0.2%)
+   Peter Korsgaard                   1 (0.2%)
+   Weirich, Bernhard                 1 (0.2%)
+   Howard D. Gray                    1 (0.2%)
+   Bastian Ruppert                   1 (0.2%)
+   Che-liang Chiou                   1 (0.2%)
+   Diana CRACIUN                     1 (0.2%)
+   Michal Simek                      1 (0.2%)
+   James Le Cuirot                   1 (0.2%)
+   Bradley Bolen                     1 (0.2%)
+   Christian Spielberger             1 (0.2%)
+   Eric Benard                       1 (0.2%)
+   Syed Mohammed Khasim              1 (0.2%)
+   Steve Sakoman                     1 (0.2%)
+   Bob Feretich                      1 (0.2%)
+   Manjunathappa, Prakash            1 (0.2%)
+   Jason Liu                         1 (0.2%)
+   Matthias Fuchs                    1 (0.2%)
+   Yao Cheng                         1 (0.2%)
+   Shiraz Hashim                     1 (0.2%)
+   Thomas Abraham                    1 (0.2%)
+   Christopher Harvey                1 (0.2%)
+   Sriramakrishnan                   1 (0.2%)
+   seedshope                         1 (0.2%)
+   Bhaskar Upadhaya                  1 (0.2%)
+   Stephen George                    1 (0.2%)
+   Niklaus Giger                     1 (0.2%)
+   Mike Williams                     1 (0.2%)
+   Horst Kronstorfer                 1 (0.2%)
+   Thomas Herzmann                   1 (0.2%)
+   Sergei Shtylyov                   1 (0.2%)
+   Luuk Paulussen                    1 (0.2%)
+   James Kosin                       1 (0.2%)
+   Yegor Yefremov                    1 (0.2%)
+   Chan-Taek Park                    1 (0.2%)
+   David A. Long                     1 (0.2%)
+   elen.song                         1 (0.2%)
+   Gerald Van Baren                  1 (0.2%)
+   Roy Zang                          1 (0.2%)
+   Felix Radensky                    1 (0.2%)
+   Bill Cook                         1 (0.2%)
+   Ira W. Snyder                     1 (0.2%)
+   Alex Waterman                     1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     26582 (35.2%)
+   Aneesh V                          7911 (10.5%)
+   Andreas Bießmann                  4270 (5.7%)
+   Niklaus Giger                     3112 (4.1%)
+   Simon Glass                       2053 (2.7%)
+   Mike Frysinger                    1923 (2.5%)
+   Chander Kashyap                   1905 (2.5%)
+   Mingkai Hu                        1698 (2.2%)
+   Andre Schwarz                     1525 (2.0%)
+   Phil Edworthy                     1390 (1.8%)
+   Macpaul Lin                       1360 (1.8%)
+   Tom Warren                        1309 (1.7%)
+   Roy Zang                          1303 (1.7%)
+   David Müller (ELSOFT AG)          1110 (1.5%)
+   Albert ARIBAUD                    1035 (1.4%)
+   Lei Wen                           947 (1.3%)
+   Graeme Russ                       943 (1.2%)
+   Matthias Weisser                  926 (1.2%)
+   Tom Rini                          905 (1.2%)
+   Holger Brunck                     883 (1.2%)
+   Yoshihiro Shimoda                 880 (1.2%)
+   Fabio Estevam                     866 (1.1%)
+   Heiko Schocher                    809 (1.1%)
+   Jason Jin                         758 (1.0%)
+   Xu, Hong                          719 (1.0%)
+   Stefano Babic                     668 (0.9%)
+   Simon Guinot                      608 (0.8%)
+   Thomas Petazzoni                  553 (0.7%)
+   Timur Tabi                        437 (0.6%)
+   Laurence Withers                  378 (0.5%)
+   Linus Walleij                     356 (0.5%)
+   Daniel Schwierzeck                339 (0.4%)
+   Jason Kridner                     332 (0.4%)
+   John Rigby                        325 (0.4%)
+   Syed Mohammed Khasim              307 (0.4%)
+   Anatolij Gustschin                238 (0.3%)
+   David Gibson                      227 (0.3%)
+   Sanjeev Premi                     225 (0.3%)
+   Ajay Bhargav                      213 (0.3%)
+   Jason Cooper                      192 (0.3%)
+   Nagabhushana Netagunte            172 (0.2%)
+   Michael Jones                     164 (0.2%)
+   Kumar Gala                        155 (0.2%)
+   Łukasz Majewski                   154 (0.2%)
+   York Sun                          152 (0.2%)
+   Ramneek Mehresh                   151 (0.2%)
+   Matthias Fuchs                    144 (0.2%)
+   Asen Dimov                        137 (0.2%)
+   Valentin Longchamp                128 (0.2%)
+   Harald Krapfenbauer               121 (0.2%)
+   Anton Staaf                       83 (0.1%)
+   Ben Gardiner                      81 (0.1%)
+   Joel A Fernandes                  80 (0.1%)
+   Rob Herring                       78 (0.1%)
+   Matthew McClintock                66 (0.1%)
+   David Jander                      65 (0.1%)
+   Greg Ungerer                      59 (0.1%)
+   Andreas Pretzsch                  58 (0.1%)
+   David A. Long                     58 (0.1%)
+   Mike Williams                     57 (0.1%)
+   Vaibhav Hiremath                  51 (0.1%)
+   Becky Bruce                       47 (0.1%)
+   Alex Waterman                     45 (0.1%)
+   Gerald Van Baren                  41 (0.1%)
+   Igor Grinberg                     36 (0.0%)
+   Shaohui Xie                       36 (0.0%)
+   Koen Kooi                         34 (0.0%)
+   Helmut Raiger                     32 (0.0%)
+   Torsten Koschorrek                28 (0.0%)
+   Andy Fleming                      26 (0.0%)
+   Sriramakrishnan                   26 (0.0%)
+   Dirk Behme                        25 (0.0%)
+   Sudhakar Rajashekhara             23 (0.0%)
+   Christopher Harvey                23 (0.0%)
+   Reinhard Meyer                    22 (0.0%)
+   Howard D. Gray                    22 (0.0%)
+   Po-Yu Chuang                      20 (0.0%)
+   Shiraz Hashim                     19 (0.0%)
+   Stephen George                    19 (0.0%)
+   Zhao Chenhui                      15 (0.0%)
+   Stefan Bigler                     15 (0.0%)
+   Luuk Paulussen                    15 (0.0%)
+   Stefan Roese                      14 (0.0%)
+   Diana CRACIUN                     14 (0.0%)
+   Jason Liu                         13 (0.0%)
+   Jason Hobbs                       12 (0.0%)
+   James Kosin                       12 (0.0%)
+   elen.song                         12 (0.0%)
+   Marek Vasut                       10 (0.0%)
+   Sergei Shtylyov                   10 (0.0%)
+   Christian Spielberger             9 (0.0%)
+   Vladimir Zapolskiy                8 (0.0%)
+   Che-liang Chiou                   8 (0.0%)
+   Michal Simek                      8 (0.0%)
+   James Le Cuirot                   8 (0.0%)
+   seedshope                         8 (0.0%)
+   Nobuhiro Iwamatsu                 7 (0.0%)
+   Horst Kronstorfer                 7 (0.0%)
+   Bob Feretich                      6 (0.0%)
+   Chan-Taek Park                    6 (0.0%)
+   Jens Scharsig                     5 (0.0%)
+   Bastian Ruppert                   5 (0.0%)
+   Jeroen Hofstee                    4 (0.0%)
+   Steve Sakoman                     4 (0.0%)
+   Yao Cheng                         4 (0.0%)
+   Bill Cook                         4 (0.0%)
+   Sandeep Paulraj                   3 (0.0%)
+   Jana Rapava                       3 (0.0%)
+   Thomas Abraham                    3 (0.0%)
+   Bhaskar Upadhaya                  3 (0.0%)
+   Bradley Bolen                     2 (0.0%)
+   Thomas Herzmann                   2 (0.0%)
+   Ira W. Snyder                     2 (0.0%)
+   Vadim Bendebury                   1 (0.0%)
+   Peter Korsgaard                   1 (0.0%)
+   Weirich, Bernhard                 1 (0.0%)
+   Eric Benard                       1 (0.0%)
+   Manjunathappa, Prakash            1 (0.0%)
+   Yegor Yefremov                    1 (0.0%)
+   Felix Radensky                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     25412 (55.3%)
+   Niklaus Giger                     3112 (6.8%)
+   Andreas Bießmann                  2797 (6.1%)
+   Albert ARIBAUD                    813 (1.8%)
+   Tom Rini                          722 (1.6%)
+   Graeme Russ                       636 (1.4%)
+   Jason Jin                         532 (1.2%)
+   David Müller (ELSOFT AG)          409 (0.9%)
+   Linus Walleij                     284 (0.6%)
+   Holger Brunck                     247 (0.5%)
+   Thomas Petazzoni                  101 (0.2%)
+   Xu, Hong                          49 (0.1%)
+   Christopher Harvey                23 (0.1%)
+   Dirk Behme                        18 (0.0%)
+   Jason Liu                         13 (0.0%)
+   Torsten Koschorrek                11 (0.0%)
+   seedshope                         8 (0.0%)
+   Sergei Shtylyov                   7 (0.0%)
+   Diana CRACIUN                     5 (0.0%)
+   Michael Jones                     4 (0.0%)
+   Asen Dimov                        4 (0.0%)
+   Jason Hobbs                       4 (0.0%)
+   Steve Sakoman                     4 (0.0%)
+   Zhao Chenhui                      2 (0.0%)
+   Vladimir Zapolskiy                2 (0.0%)
+   Anton Staaf                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 295)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Sandeep Paulraj                   101 (34.2%)
+   Kumar Gala                        39 (13.2%)
+   Joel A Fernandes                  21 (7.1%)
+   Valentin Longchamp                13 (4.4%)
+   Minkyu Kang                       10 (3.4%)
+   Koen Kooi                         10 (3.4%)
+   Reinhard Meyer                    9 (3.1%)
+   Kim Phillips                      8 (2.7%)
+   Scott Wood                        7 (2.4%)
+   Nobuhiro Iwamatsu                 6 (2.0%)
+   Sudhakar Rajashekhara             6 (2.0%)
+   Aneesh V                          6 (2.0%)
+   Shinya Kuribayashi                5 (1.7%)
+   Holger Brunck                     4 (1.4%)
+   Kyungmin Park                     4 (1.4%)
+   Mike Frysinger                    4 (1.4%)
+   Wolfgang Denk                     3 (1.0%)
+   Stefan Roese                      3 (1.0%)
+   Sanjeev Premi                     3 (1.0%)
+   Nagabhushana Netagunte            3 (1.0%)
+   Jason Kridner                     3 (1.0%)
+   TsiChung Liew                     2 (0.7%)
+   Andy Fleming                      2 (0.7%)
+   Gerald Van Baren                  2 (0.7%)
+   Andreas Bießmann                  1 (0.3%)
+   Michael Jones                     1 (0.3%)
+   Sebastien Jan                     1 (0.3%)
+   David Anders                      1 (0.3%)
+   James Yang                        1 (0.3%)
+   Sugumar Natarajan                 1 (0.3%)
+   Sekhar Nori                       1 (0.3%)
+   Ranjith Lohithakshan              1 (0.3%)
+   Lily Zhang                        1 (0.3%)
+   Daniel Gorsulowski                1 (0.3%)
+   Rod Boyce                         1 (0.3%)
+   Jiang Yutang                      1 (0.3%)
+   Prafulla Wadaskar                 1 (0.3%)
+   Werner Pfister                    1 (0.3%)
+   Haiying Wang                      1 (0.3%)
+   Chunhe Lan                        1 (0.3%)
+   Lei Xu                            1 (0.3%)
+   Scott McNutt                      1 (0.3%)
+   York Sun                          1 (0.3%)
+   Timur Tabi                        1 (0.3%)
+   Roy Zang                          1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Vipin Kumar                       2 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 13)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Eric Benard                       4 (30.8%)
+   Kumar Gala                        1 (7.7%)
+   Minkyu Kang                       1 (7.7%)
+   Jens Scharsig                     1 (7.7%)
+   Thomas Chou                       1 (7.7%)
+   Michal Simek                      1 (7.7%)
+   Igor Grinberg                     1 (7.7%)
+   Heiko Schocher                    1 (7.7%)
+   Fabio Estevam                     1 (7.7%)
+   Lei Wen                           1 (7.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 13)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       7 (53.8%)
+   Mike Frysinger                    2 (15.4%)
+   Andreas Bießmann                  1 (7.7%)
+   Peter Korsgaard                   1 (7.7%)
+   Marek Vasut                       1 (7.7%)
+   John Rigby                        1 (7.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Graeme Russ                       1 (50.0%)
+   Ed Swarthout                      1 (50.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    1 (50.0%)
+   Andy Fleming                      1 (50.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         145 (22.5%)
+   DENX Software Engineering         135 (20.9%)
+   Texas Instruments                 90 (14.0%)
+   Freescale                         80 (12.4%)
+   Analog Devices                    47 (7.3%)
+   Linaro                            20 (3.1%)
+   Keymile                           18 (2.8%)
+   Google, Inc.                      16 (2.5%)
+   Matrix Vision                     13 (2.0%)
+   Renesas Electronics               10 (1.6%)
+   Konsulko Group                    9 (1.4%)
+   Atmel                             7 (1.1%)
+   Graeme Russ                       7 (1.1%)
+   Calxeda                           6 (0.9%)
+   Samsung                           6 (0.9%)
+   CompuLab                          5 (0.8%)
+   Dirk Behme                        5 (0.8%)
+   BuS Elektronik                    4 (0.6%)
+   Free Electrons                    4 (0.6%)
+   Marvell                           4 (0.6%)
+   Ronetix                           4 (0.6%)
+   Nobuhiro Iwamatsu                 2 (0.3%)
+   bct electronic GmbH               1 (0.2%)
+   ESD Electronics                   1 (0.2%)
+   MontaVista                        1 (0.2%)
+   OVRO                              1 (0.2%)
+   Sakoman Inc.                      1 (0.2%)
+   ST Microelectronics               1 (0.2%)
+   Xilinx                            1 (0.2%)
+   Barco                             1 (0.2%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         28321 (37.5%)
+   (Unknown)                         16166 (21.4%)
+   Texas Instruments                 9060 (12.0%)
+   Freescale                         5729 (7.6%)
+   Linaro                            2657 (3.5%)
+   Renesas Electronics               2275 (3.0%)
+   Google, Inc.                      2145 (2.8%)
+   Analog Devices                    1923 (2.5%)
+   Matrix Vision                     1580 (2.1%)
+   Marvell                           947 (1.3%)
+   Graeme Russ                       943 (1.2%)
+   Keymile                           942 (1.2%)
+   Konsulko Group                    905 (1.2%)
+   Atmel                             731 (1.0%)
+   Free Electrons                    553 (0.7%)
+   Samsung                           157 (0.2%)
+   ESD Electronics                   144 (0.2%)
+   Ronetix                           137 (0.2%)
+   Calxeda                           90 (0.1%)
+   CompuLab                          36 (0.0%)
+   Dirk Behme                        25 (0.0%)
+   ST Microelectronics               19 (0.0%)
+   MontaVista                        10 (0.0%)
+   bct electronic GmbH               9 (0.0%)
+   Xilinx                            8 (0.0%)
+   BuS Elektronik                    5 (0.0%)
+   Sakoman Inc.                      4 (0.0%)
+   Nobuhiro Iwamatsu                 2 (0.0%)
+   OVRO                              2 (0.0%)
+   Barco                             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 295)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Texas Instruments                 128 (43.4%)
+   Freescale                         65 (22.0%)
+   (Unknown)                         49 (16.6%)
+   Keymile                           17 (5.8%)
+   Samsung                           14 (4.7%)
+   DENX Software Engineering         6 (2.0%)
+   Nobuhiro Iwamatsu                 6 (2.0%)
+   Analog Devices                    4 (1.4%)
+   Custom IDEAS                      2 (0.7%)
+   Matrix Vision                     1 (0.3%)
+   Marvell                           1 (0.3%)
+   ESD Electronics                   1 (0.3%)
+   Psyent                            1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 125)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         48 (38.4%)
+   Freescale                         16 (12.8%)
+   Texas Instruments                 12 (9.6%)
+   DENX Software Engineering         6 (4.8%)
+   Linaro                            5 (4.0%)
+   Keymile                           4 (3.2%)
+   Google, Inc.                      4 (3.2%)
+   Matrix Vision                     3 (2.4%)
+   Renesas Electronics               3 (2.4%)
+   Samsung                           2 (1.6%)
+   Atmel                             2 (1.6%)
+   Calxeda                           2 (1.6%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   Analog Devices                    1 (0.8%)
+   Marvell                           1 (0.8%)
+   ESD Electronics                   1 (0.8%)
+   Graeme Russ                       1 (0.8%)
+   Konsulko Group                    1 (0.8%)
+   Free Electrons                    1 (0.8%)
+   Ronetix                           1 (0.8%)
+   CompuLab                          1 (0.8%)
+   Dirk Behme                        1 (0.8%)
+   ST Microelectronics               1 (0.8%)
+   MontaVista                        1 (0.8%)
+   bct electronic GmbH               1 (0.8%)
+   Xilinx                            1 (0.8%)
+   BuS Elektronik                    1 (0.8%)
+   Sakoman Inc.                      1 (0.8%)
+   OVRO                              1 (0.8%)
+   Barco                             1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2011.12.rst b/doc/develop/statistics/u-boot-stats-v2011.12.rst
new file mode 100644
index 00000000000..3d2fdcd06b8
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2011.12.rst
@@ -0,0 +1,706 @@
+:orphan:
+
+Release Statistics for U-Boot v2011.12
+======================================
+
+* Processed 1530 changesets from 146 developers
+
+* 34 employers found
+
+* A total of 136501 lines added, 116035 removed (delta 20466)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     185 (12.1%)
+   Marek Vasut                       167 (10.9%)
+   Simon Glass                       88 (5.8%)
+   Anatolij Gustschin                62 (4.1%)
+   Fabio Estevam                     59 (3.9%)
+   Kumar Gala                        56 (3.7%)
+   Heiko Schocher                    50 (3.3%)
+   Stefano Babic                     49 (3.2%)
+   Mike Frysinger                    46 (3.0%)
+   Joe Hershberger                   31 (2.0%)
+   Michal Simek                      27 (1.8%)
+   Timur Tabi                        25 (1.6%)
+   Igor Grinberg                     24 (1.6%)
+   Lei Wen                           24 (1.6%)
+   Tom Rini                          23 (1.5%)
+   Macpaul Lin                       23 (1.5%)
+   Christian Riesch                  22 (1.4%)
+   Anton Staaf                       22 (1.4%)
+   Stefan Roese                      21 (1.4%)
+   Simon Schwarz                     19 (1.2%)
+   Aneesh V                          16 (1.0%)
+   Graeme Russ                       15 (1.0%)
+   Ilya Yanok                        14 (0.9%)
+   Sanjeev Premi                     14 (0.9%)
+   Jason Hobbs                       14 (0.9%)
+   Holger Brunck                     13 (0.8%)
+   Gabe Black                        13 (0.8%)
+   Ajay Bhargav                      13 (0.8%)
+   York Sun                          13 (0.8%)
+   Helmut Raiger                     12 (0.8%)
+   Wolfgang Grandegger               10 (0.7%)
+   Valentin Longchamp                10 (0.7%)
+   Stephen Warren                    9 (0.6%)
+   Kyle Moffett                      9 (0.6%)
+   Łukasz Majewski                   9 (0.6%)
+   Jerry Huang                       9 (0.6%)
+   Manjunath Hadli                   9 (0.6%)
+   Linus Walleij                     9 (0.6%)
+   Joachim Foerster                  9 (0.6%)
+   Shaohui Xie                       8 (0.5%)
+   Sricharan                         8 (0.5%)
+   chenhui zhao                      8 (0.5%)
+   Dirk Eibach                       7 (0.5%)
+   Horst Kronstorfer                 6 (0.4%)
+   Matthias Fuchs                    6 (0.4%)
+   Thomas Weber                      6 (0.4%)
+   Simon Guinot                      6 (0.4%)
+   Chandan Nath                      6 (0.4%)
+   Nobuhiro Iwamatsu                 6 (0.4%)
+   Che-Liang Chiou                   6 (0.4%)
+   Poonam Aggrwal                    6 (0.4%)
+   Philip Balister                   6 (0.4%)
+   stany MARCEL                      6 (0.4%)
+   Kim Phillips                      5 (0.3%)
+   Daniel Schwierzeck                5 (0.3%)
+   Jason Liu                         5 (0.3%)
+   Chander Kashyap                   5 (0.3%)
+   Sergei Shtylyov                   5 (0.3%)
+   David Müller (ELSOFT AG)          4 (0.3%)
+   Matthias Weisser                  4 (0.3%)
+   Asen Dimov                        4 (0.3%)
+   Stefan Herbrechtsmeier            4 (0.3%)
+   Steve Sakoman                     4 (0.3%)
+   Andy Fleming                      4 (0.3%)
+   Zang Roy-R61911                   4 (0.3%)
+   Yoshihiro Shimoda                 4 (0.3%)
+   Shengzhou Liu                     4 (0.3%)
+   Xie Xiaobo                        4 (0.3%)
+   Ramneek Mehresh                   4 (0.3%)
+   Jason Jin                         4 (0.3%)
+   Bastian Ruppert                   4 (0.3%)
+   Andreas Bießmann                  3 (0.2%)
+   Bernhard Kaindl                   3 (0.2%)
+   Vadim Bendebury                   3 (0.2%)
+   Gerlando Falauto                  3 (0.2%)
+   Michael Jones                     3 (0.2%)
+   Ira W. Snyder                     3 (0.2%)
+   Alexander Holler                  3 (0.2%)
+   Michael Walle                     3 (0.2%)
+   Doug Anderson                     3 (0.2%)
+   Ricardo Salveti de Araujo         3 (0.2%)
+   Haiying Wang                      3 (0.2%)
+   Xiangfu Liu                       3 (0.2%)
+   Loïc Minier                       3 (0.2%)
+   Thierry Reding                    2 (0.1%)
+   Tom Warren                        2 (0.1%)
+   Sven Schnelle                     2 (0.1%)
+   Stefan Kristiansson               2 (0.1%)
+   Veli-Pekka Peltola                2 (0.1%)
+   Prabhakar Lad                     2 (0.1%)
+   Yan-Pai Chen                      2 (0.1%)
+   Stelian Pop                       2 (0.1%)
+   Andreas Huber                     2 (0.1%)
+   Daniel Gorsulowski                2 (0.1%)
+   Angus Ainslie                     2 (0.1%)
+   Tang Yuantian                     2 (0.1%)
+   Laurence Withers                  2 (0.1%)
+   Becky Bruce                       2 (0.1%)
+   Ruchika Gupta                     2 (0.1%)
+   Paul Gortmaker                    2 (0.1%)
+   Balaji T K                        2 (0.1%)
+   Dipen Dudhat                      2 (0.1%)
+   Lauri Hintsala                    1 (0.1%)
+   Chris Lalancette                  1 (0.1%)
+   Manfred Rudigier                  1 (0.1%)
+   Jana Rapava                       1 (0.1%)
+   Vincent Palatin                   1 (0.1%)
+   Ash Charles                       1 (0.1%)
+   Sughosh Ganu                      1 (0.1%)
+   Robert Deliën                     1 (0.1%)
+   Wolfram Sang                      1 (0.1%)
+   Koen Kooi                         1 (0.1%)
+   Tim Schendekehl                   1 (0.1%)
+   Sandeep Paulraj                   1 (0.1%)
+   Mike Partington                   1 (0.1%)
+   Gavin Guo                         1 (0.1%)
+   Phil Edworthy                     1 (0.1%)
+   Jia Hongtao                       1 (0.1%)
+   Li Yang                           1 (0.1%)
+   Stephan Linz                      1 (0.1%)
+   Bertrand Cachet                   1 (0.1%)
+   David Wagner                      1 (0.1%)
+   Nagabhushana Netagunte            1 (0.1%)
+   Jon Medhurst (Tixy)               1 (0.1%)
+   Po-Yu Chuang                      1 (0.1%)
+   Jens Scharsig                     1 (0.1%)
+   Luca Ceresoli                     1 (0.1%)
+   Thomas Herzmann                   1 (0.1%)
+   Prafulla Wadaskar                 1 (0.1%)
+   Ondrej Kupka                      1 (0.1%)
+   J. Vijayanand                     1 (0.1%)
+   Rob Herring                       1 (0.1%)
+   Vladimir Zapolskiy                1 (0.1%)
+   Jason Cooper                      1 (0.1%)
+   Donggeun Kim                      1 (0.1%)
+   Joel A Fernandes                  1 (0.1%)
+   Luka Perkov                       1 (0.1%)
+   Chunhe Lan                        1 (0.1%)
+   Kuldip Giroh                      1 (0.1%)
+   Lars Poeschel                     1 (0.1%)
+   Fanzc                             1 (0.1%)
+   mhench                            1 (0.1%)
+   Stefan Bigler                     1 (0.1%)
+   Scott McNutt                      1 (0.1%)
+   Dave Aldridge                     1 (0.1%)
+   Mingkai Hu                        1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       58471 (26.9%)
+   Mike Frysinger                    27101 (12.5%)
+   Wolfgang Denk                     16846 (7.8%)
+   Joe Hershberger                   6750 (3.1%)
+   Macpaul Lin                       6111 (2.8%)
+   Sricharan                         6022 (2.8%)
+   Simon Glass                       5706 (2.6%)
+   Che-Liang Chiou                   5047 (2.3%)
+   Heiko Schocher                    4975 (2.3%)
+   Jason Liu                         4332 (2.0%)
+   Kumar Gala                        4033 (1.9%)
+   Stefano Babic                     3640 (1.7%)
+   Łukasz Majewski                   3540 (1.6%)
+   York Sun                          3179 (1.5%)
+   Paul Gortmaker                    3127 (1.4%)
+   Xiangfu Liu                       2804 (1.3%)
+   Jason Hobbs                       2434 (1.1%)
+   Shengzhou Liu                     2405 (1.1%)
+   Kyle Moffett                      2303 (1.1%)
+   Li Yang                           2289 (1.1%)
+   Gabe Black                        2166 (1.0%)
+   Chandan Nath                      2159 (1.0%)
+   Ajay Bhargav                      1789 (0.8%)
+   Timur Tabi                        1699 (0.8%)
+   Dirk Eibach                       1683 (0.8%)
+   Poonam Aggrwal                    1605 (0.7%)
+   Michael Jones                     1593 (0.7%)
+   Helmut Raiger                     1529 (0.7%)
+   Dipen Dudhat                      1481 (0.7%)
+   Stephen Warren                    1432 (0.7%)
+   stany MARCEL                      1382 (0.6%)
+   Simon Guinot                      1246 (0.6%)
+   Nobuhiro Iwamatsu                 1217 (0.6%)
+   Simon Schwarz                     1208 (0.6%)
+   Ira W. Snyder                     1129 (0.5%)
+   Michal Simek                      1115 (0.5%)
+   Lei Wen                           1114 (0.5%)
+   Donggeun Kim                      1101 (0.5%)
+   Sanjeev Premi                     1046 (0.5%)
+   Tim Schendekehl                   1016 (0.5%)
+   Tang Yuantian                     967 (0.4%)
+   Graeme Russ                       964 (0.4%)
+   Fabio Estevam                     817 (0.4%)
+   Tom Rini                          781 (0.4%)
+   Vadim Bendebury                   728 (0.3%)
+   Christian Riesch                  702 (0.3%)
+   Jana Rapava                       688 (0.3%)
+   Andy Fleming                      684 (0.3%)
+   Ilya Yanok                        683 (0.3%)
+   Jason Cooper                      566 (0.3%)
+   Anatolij Gustschin                551 (0.3%)
+   Igor Grinberg                     550 (0.3%)
+   Joachim Foerster                  509 (0.2%)
+   Anton Staaf                       470 (0.2%)
+   Stefan Roese                      465 (0.2%)
+   Gavin Guo                         425 (0.2%)
+   Manjunath Hadli                   416 (0.2%)
+   Wolfgang Grandegger               396 (0.2%)
+   Rob Herring                       393 (0.2%)
+   Chander Kashyap                   368 (0.2%)
+   chenhui zhao                      360 (0.2%)
+   Jerry Huang                       291 (0.1%)
+   David Wagner                      275 (0.1%)
+   Yoshihiro Shimoda                 260 (0.1%)
+   Valentin Longchamp                252 (0.1%)
+   Nagabhushana Netagunte            246 (0.1%)
+   Linus Walleij                     236 (0.1%)
+   Mingkai Hu                        235 (0.1%)
+   Aneesh V                          233 (0.1%)
+   Phil Edworthy                     186 (0.1%)
+   Zang Roy-R61911                   179 (0.1%)
+   Holger Brunck                     170 (0.1%)
+   Becky Bruce                       147 (0.1%)
+   Ruchika Gupta                     142 (0.1%)
+   Stelian Pop                       140 (0.1%)
+   Jason Jin                         124 (0.1%)
+   Chris Lalancette                  122 (0.1%)
+   Thomas Weber                      118 (0.1%)
+   Stefan Herbrechtsmeier            111 (0.1%)
+   Bernhard Kaindl                   105 (0.0%)
+   Sergei Shtylyov                   94 (0.0%)
+   Shaohui Xie                       87 (0.0%)
+   Po-Yu Chuang                      84 (0.0%)
+   Matthias Weisser                  83 (0.0%)
+   Bastian Ruppert                   82 (0.0%)
+   David Müller (ELSOFT AG)          65 (0.0%)
+   Ricardo Salveti de Araujo         65 (0.0%)
+   Tom Warren                        65 (0.0%)
+   Ramneek Mehresh                   62 (0.0%)
+   Balaji T K                        51 (0.0%)
+   Doug Anderson                     50 (0.0%)
+   Asen Dimov                        49 (0.0%)
+   Xie Xiaobo                        48 (0.0%)
+   Matthias Fuchs                    42 (0.0%)
+   Gerlando Falauto                  38 (0.0%)
+   Daniel Schwierzeck                37 (0.0%)
+   Vladimir Zapolskiy                32 (0.0%)
+   Haiying Wang                      30 (0.0%)
+   mhench                            30 (0.0%)
+   Philip Balister                   28 (0.0%)
+   Jon Medhurst (Tixy)               26 (0.0%)
+   Alexander Holler                  23 (0.0%)
+   Horst Kronstorfer                 21 (0.0%)
+   Scott McNutt                      21 (0.0%)
+   Loïc Minier                       20 (0.0%)
+   Andreas Huber                     19 (0.0%)
+   Daniel Gorsulowski                15 (0.0%)
+   Laurence Withers                  15 (0.0%)
+   Fanzc                             15 (0.0%)
+   Michael Walle                     13 (0.0%)
+   Kim Phillips                      12 (0.0%)
+   Andreas Bießmann                  12 (0.0%)
+   Yan-Pai Chen                      12 (0.0%)
+   Jia Hongtao                       12 (0.0%)
+   Dave Aldridge                     10 (0.0%)
+   Veli-Pekka Peltola                9 (0.0%)
+   Steve Sakoman                     8 (0.0%)
+   Luca Ceresoli                     8 (0.0%)
+   Angus Ainslie                     7 (0.0%)
+   Chunhe Lan                        7 (0.0%)
+   Sven Schnelle                     6 (0.0%)
+   Sughosh Ganu                      6 (0.0%)
+   Stephan Linz                      6 (0.0%)
+   Bertrand Cachet                   5 (0.0%)
+   Thomas Herzmann                   5 (0.0%)
+   Mike Partington                   4 (0.0%)
+   Lars Poeschel                     4 (0.0%)
+   Ash Charles                       3 (0.0%)
+   J. Vijayanand                     3 (0.0%)
+   Thierry Reding                    2 (0.0%)
+   Stefan Kristiansson               2 (0.0%)
+   Prabhakar Lad                     2 (0.0%)
+   Jens Scharsig                     2 (0.0%)
+   Luka Perkov                       2 (0.0%)
+   Lauri Hintsala                    1 (0.0%)
+   Manfred Rudigier                  1 (0.0%)
+   Vincent Palatin                   1 (0.0%)
+   Robert Deliën                     1 (0.0%)
+   Wolfram Sang                      1 (0.0%)
+   Koen Kooi                         1 (0.0%)
+   Sandeep Paulraj                   1 (0.0%)
+   Prafulla Wadaskar                 1 (0.0%)
+   Ondrej Kupka                      1 (0.0%)
+   Joel A Fernandes                  1 (0.0%)
+   Kuldip Giroh                      1 (0.0%)
+   Stefan Bigler                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    26037 (22.4%)
+   Marek Vasut                       20905 (18.0%)
+   Wolfgang Denk                     9360 (8.1%)
+   Paul Gortmaker                    3123 (2.7%)
+   stany MARCEL                      1184 (1.0%)
+   Stefan Roese                      355 (0.3%)
+   Chander Kashyap                   167 (0.1%)
+   Yoshihiro Shimoda                 132 (0.1%)
+   Thomas Weber                      113 (0.1%)
+   Igor Grinberg                     105 (0.1%)
+   Jason Jin                         90 (0.1%)
+   Anatolij Gustschin                64 (0.1%)
+   Po-Yu Chuang                      34 (0.0%)
+   Vladimir Zapolskiy                32 (0.0%)
+   mhench                            28 (0.0%)
+   Jon Medhurst (Tixy)               26 (0.0%)
+   Alexander Holler                  20 (0.0%)
+   Matthias Fuchs                    9 (0.0%)
+   Doug Anderson                     7 (0.0%)
+   Sughosh Ganu                      6 (0.0%)
+   Philip Balister                   5 (0.0%)
+   Kim Phillips                      4 (0.0%)
+   Christian Riesch                  3 (0.0%)
+   Andreas Bießmann                  2 (0.0%)
+   Loïc Minier                       1 (0.0%)
+   Laurence Withers                  1 (0.0%)
+   Mike Partington                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 456)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Sandeep Paulraj                   131 (28.7%)
+   Kumar Gala                        83 (18.2%)
+   Kim Phillips                      35 (7.7%)
+   Anatolij Gustschin                20 (4.4%)
+   Scott Wood                        18 (3.9%)
+   Tom Warren                        14 (3.1%)
+   Holger Brunck                     13 (2.9%)
+   Stefan Roese                      11 (2.4%)
+   Kyungmin Park                     11 (2.4%)
+   Minkyu Kang                       10 (2.2%)
+   Mike Frysinger                    7 (1.5%)
+   Nobuhiro Iwamatsu                 7 (1.5%)
+   Prafulla Wadaskar                 5 (1.1%)
+   Valentin Longchamp                5 (1.1%)
+   Thomas Chou                       4 (0.9%)
+   Tom Rini                          4 (0.9%)
+   Stefano Babic                     4 (0.9%)
+   Wolfgang Denk                     3 (0.7%)
+   Sudhakar Rajashekhara             3 (0.7%)
+   Shinya Kuribayashi                3 (0.7%)
+   Ioana Radulescu                   3 (0.7%)
+   York Sun                          3 (0.7%)
+   Lei Xu                            2 (0.4%)
+   Prabhakar Kushwaha                2 (0.4%)
+   Matthew McClintock                2 (0.4%)
+   Kuldip Giroh                      2 (0.4%)
+   Shaohui Xie                       2 (0.4%)
+   Xie Xiaobo                        2 (0.4%)
+   Ramneek Mehresh                   2 (0.4%)
+   Aneesh V                          2 (0.4%)
+   chenhui zhao                      2 (0.4%)
+   Mingkai Hu                        2 (0.4%)
+   Andy Fleming                      2 (0.4%)
+   Timur Tabi                        2 (0.4%)
+   Igor Grinberg                     1 (0.2%)
+   Haiying Wang                      1 (0.2%)
+   Marek Szyprowski                  1 (0.2%)
+   Remy Bohmer                       1 (0.2%)
+   Dirk Behme                        1 (0.2%)
+   Manjunathappa, Prakash            1 (0.2%)
+   Uwe Kleine-König                  1 (0.2%)
+   Gong Chen                         1 (0.2%)
+   Terry Lv                          1 (0.2%)
+   Axel Lin                          1 (0.2%)
+   Paul Mundt                        1 (0.2%)
+   Aaron Williams                    1 (0.2%)
+   Greentime Hu                      1 (0.2%)
+   Minghuan Lian                     1 (0.2%)
+   Santosh Shukla                    1 (0.2%)
+   Ebony Zhu                         1 (0.2%)
+   Dave Liu                          1 (0.2%)
+   Dai Haruki                        1 (0.2%)
+   Bhaskar Upadhaya                  1 (0.2%)
+   Zhao Chenhui                      1 (0.2%)
+   Priyanka Jain                     1 (0.2%)
+   Akhil Goyal                       1 (0.2%)
+   Sergei Shtylyov                   1 (0.2%)
+   Bastian Ruppert                   1 (0.2%)
+   Zang Roy-R61911                   1 (0.2%)
+   Graeme Russ                       1 (0.2%)
+   Jerry Huang                       1 (0.2%)
+   Tang Yuantian                     1 (0.2%)
+   Dipen Dudhat                      1 (0.2%)
+   Poonam Aggrwal                    1 (0.2%)
+   Li Yang                           1 (0.2%)
+   Jason Hobbs                       1 (0.2%)
+   Łukasz Majewski                   1 (0.2%)
+   Simon Glass                       1 (0.2%)
+   Macpaul Lin                       1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Guennadi Liakhovetski             1 (50.0%)
+   Anton Staaf                       1 (50.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 74)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       13 (17.6%)
+   Stefano Babic                     8 (10.8%)
+   Tom Warren                        6 (8.1%)
+   Wolfgang Denk                     5 (6.8%)
+   Steve Sakoman                     4 (5.4%)
+   Heiko Schocher                    4 (5.4%)
+   Anatolij Gustschin                3 (4.1%)
+   Macpaul Lin                       3 (4.1%)
+   Matthias Weisser                  3 (4.1%)
+   Thomas Chou                       2 (2.7%)
+   Stephen Warren                    2 (2.7%)
+   Jason Liu                         2 (2.7%)
+   Anton Staaf                       1 (1.4%)
+   Stefan Roese                      1 (1.4%)
+   Mike Frysinger                    1 (1.4%)
+   Tom Rini                          1 (1.4%)
+   Dirk Behme                        1 (1.4%)
+   Graeme Russ                       1 (1.4%)
+   Marek Vasut                       1 (1.4%)
+   Thomas Weber                      1 (1.4%)
+   Matthias Fuchs                    1 (1.4%)
+   Stefan Kristiansson               1 (1.4%)
+   Koen Kooi                         1 (1.4%)
+   Matt Ranostay                     1 (1.4%)
+   Matt Porter                       1 (1.4%)
+   Thomas Petazzoni                  1 (1.4%)
+   Lan Chunhe                        1 (1.4%)
+   Ash Charles                       1 (1.4%)
+   Sanjeev Premi                     1 (1.4%)
+   Michal Simek                      1 (1.4%)
+   Kyle Moffett                      1 (1.4%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 74)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     10 (13.5%)
+   Simon Glass                       8 (10.8%)
+   Stephen Warren                    8 (10.8%)
+   Marek Vasut                       7 (9.5%)
+   Tom Rini                          5 (6.8%)
+   Stefano Babic                     4 (5.4%)
+   Anatolij Gustschin                3 (4.1%)
+   Mike Frysinger                    3 (4.1%)
+   Philip Balister                   3 (4.1%)
+   Macpaul Lin                       2 (2.7%)
+   Thierry Reding                    2 (2.7%)
+   Tom Warren                        1 (1.4%)
+   Steve Sakoman                     1 (1.4%)
+   Matthias Weisser                  1 (1.4%)
+   Jason Liu                         1 (1.4%)
+   Anton Staaf                       1 (1.4%)
+   Graeme Russ                       1 (1.4%)
+   Ash Charles                       1 (1.4%)
+   Igor Grinberg                     1 (1.4%)
+   Tang Yuantian                     1 (1.4%)
+   Po-Yu Chuang                      1 (1.4%)
+   Christian Riesch                  1 (1.4%)
+   Stephan Linz                      1 (1.4%)
+   Ilya Yanok                        1 (1.4%)
+   David Wagner                      1 (1.4%)
+   Joachim Foerster                  1 (1.4%)
+   Fabio Estevam                     1 (1.4%)
+   Lei Wen                           1 (1.4%)
+   Simon Schwarz                     1 (1.4%)
+   Dirk Eibach                       1 (1.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mike Frysinger                    1 (20.0%)
+   Rockefeller                       1 (20.0%)
+   Shawn Bai                         1 (20.0%)
+   Roland Kletzing                   1 (20.0%)
+   Michael Jones                     1 (20.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     1 (20.0%)
+   Anatolij Gustschin                1 (20.0%)
+   Igor Grinberg                     1 (20.0%)
+   Kim Phillips                      1 (20.0%)
+   Aneesh V                          1 (20.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         544 (35.6%)
+   Freescale                         219 (14.3%)
+   (Unknown)                         218 (14.2%)
+   Google, Inc.                      136 (8.9%)
+   Texas Instruments                 58 (3.8%)
+   Analog Devices                    46 (3.0%)
+   National Instruments              31 (2.0%)
+   Keymile                           29 (1.9%)
+   Linaro                            28 (1.8%)
+   Xilinx                            27 (1.8%)
+   CompuLab                          24 (1.6%)
+   Konsulko Group                    23 (1.5%)
+   Marvell                           18 (1.2%)
+   Calxeda                           15 (1.0%)
+   Graeme Russ                       15 (1.0%)
+   EmCraft Systems                   14 (0.9%)
+   Renesas Electronics               11 (0.7%)
+   NVidia                            10 (0.7%)
+   Samsung                           10 (0.7%)
+   Boeing                            9 (0.6%)
+   ESD Electronics                   8 (0.5%)
+   Guntermann & Drunck               7 (0.5%)
+   MontaVista                        5 (0.3%)
+   Ronetix                           4 (0.3%)
+   Sakoman Inc.                      4 (0.3%)
+   Bluegiga Technologies             3 (0.2%)
+   Matrix Vision                     3 (0.2%)
+   OVRO                              3 (0.2%)
+   Wind River                        2 (0.1%)
+   Stelian Pop                       2 (0.1%)
+   Free Electrons                    1 (0.1%)
+   OpenSDR                           1 (0.1%)
+   Pengutronix                       1 (0.1%)
+   Psyent                            1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         85344 (39.3%)
+   Analog Devices                    27101 (12.5%)
+   (Unknown)                         21422 (9.9%)
+   Freescale                         20694 (9.5%)
+   Google, Inc.                      14168 (6.5%)
+   Texas Instruments                 10175 (4.7%)
+   National Instruments              6750 (3.1%)
+   Linaro                            5054 (2.3%)
+   Samsung                           4641 (2.1%)
+   Wind River                        3127 (1.4%)
+   Calxeda                           2827 (1.3%)
+   Boeing                            2303 (1.1%)
+   Guntermann & Drunck               1683 (0.8%)
+   Renesas Electronics               1663 (0.8%)
+   Matrix Vision                     1593 (0.7%)
+   NVidia                            1495 (0.7%)
+   OVRO                              1129 (0.5%)
+   Xilinx                            1115 (0.5%)
+   Graeme Russ                       964 (0.4%)
+   Marvell                           936 (0.4%)
+   Konsulko Group                    781 (0.4%)
+   EmCraft Systems                   683 (0.3%)
+   CompuLab                          550 (0.3%)
+   Keymile                           480 (0.2%)
+   Free Electrons                    275 (0.1%)
+   Stelian Pop                       140 (0.1%)
+   MontaVista                        94 (0.0%)
+   ESD Electronics                   57 (0.0%)
+   Ronetix                           49 (0.0%)
+   Psyent                            21 (0.0%)
+   OpenSDR                           18 (0.0%)
+   Bluegiga Technologies             10 (0.0%)
+   Sakoman Inc.                      8 (0.0%)
+   Pengutronix                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 456)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         182 (39.9%)
+   Texas Instruments                 141 (30.9%)
+   DENX Software Engineering         38 (8.3%)
+   Samsung                           23 (5.0%)
+   Keymile                           18 (3.9%)
+   (Unknown)                         14 (3.1%)
+   NVidia                            14 (3.1%)
+   Analog Devices                    7 (1.5%)
+   Nobuhiro Iwamatsu                 7 (1.5%)
+   Marvell                           5 (1.1%)
+   Google, Inc.                      1 (0.2%)
+   Calxeda                           1 (0.2%)
+   Graeme Russ                       1 (0.2%)
+   CompuLab                          1 (0.2%)
+   MontaVista                        1 (0.2%)
+   Pengutronix                       1 (0.2%)
+   Oce Technologies                  1 (0.2%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 151)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         55 (36.4%)
+   Freescale                         25 (16.6%)
+   Texas Instruments                 9 (6.0%)
+   DENX Software Engineering         7 (4.6%)
+   Google, Inc.                      7 (4.6%)
+   Linaro                            7 (4.6%)
+   Keymile                           6 (4.0%)
+   Renesas Electronics               3 (2.0%)
+   Samsung                           2 (1.3%)
+   NVidia                            2 (1.3%)
+   Marvell                           2 (1.3%)
+   Calxeda                           2 (1.3%)
+   ESD Electronics                   2 (1.3%)
+   Bluegiga Technologies             2 (1.3%)
+   Analog Devices                    1 (0.7%)
+   Graeme Russ                       1 (0.7%)
+   CompuLab                          1 (0.7%)
+   MontaVista                        1 (0.7%)
+   Pengutronix                       1 (0.7%)
+   National Instruments              1 (0.7%)
+   Wind River                        1 (0.7%)
+   Boeing                            1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   Matrix Vision                     1 (0.7%)
+   OVRO                              1 (0.7%)
+   Xilinx                            1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   EmCraft Systems                   1 (0.7%)
+   Free Electrons                    1 (0.7%)
+   Stelian Pop                       1 (0.7%)
+   Ronetix                           1 (0.7%)
+   Psyent                            1 (0.7%)
+   OpenSDR                           1 (0.7%)
+   Sakoman Inc.                      1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2012.04.rst b/doc/develop/statistics/u-boot-stats-v2012.04.rst
new file mode 100644
index 00000000000..1fe67b31ce1
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2012.04.rst
@@ -0,0 +1,626 @@
+:orphan:
+
+Release Statistics for U-Boot v2012.04
+======================================
+
+* Processed 773 changesets from 126 developers
+
+* 36 employers found
+
+* A total of 132602 lines added, 56539 removed (delta 76063)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       106 (13.7%)
+   Marek Vasut                       69 (8.9%)
+   Fabio Estevam                     38 (4.9%)
+   Stefano Babic                     28 (3.6%)
+   Tom Rini                          20 (2.6%)
+   Mike Frysinger                    20 (2.6%)
+   Eric Nelson                       18 (2.3%)
+   Graeme Russ                       17 (2.2%)
+   Christian Riesch                  16 (2.1%)
+   Stefan Kristiansson               13 (1.7%)
+   Wolfgang Denk                     12 (1.6%)
+   Nobuhiro Iwamatsu                 11 (1.4%)
+   Anatolij Gustschin                11 (1.4%)
+   Heiko Schocher                    11 (1.4%)
+   Thierry Reding                    11 (1.4%)
+   Rob Herring                       10 (1.3%)
+   Chander Kashyap                   10 (1.3%)
+   Paul Gortmaker                    10 (1.3%)
+   Stephan Linz                      9 (1.2%)
+   Dirk Behme                        9 (1.2%)
+   David Wagner                      9 (1.2%)
+   Jason Liu                         9 (1.2%)
+   Troy Kisky                        8 (1.0%)
+   Vipin Kumar                       8 (1.0%)
+   Simon Schwarz                     8 (1.0%)
+   Scott Wood                        8 (1.0%)
+   Macpaul Lin                       8 (1.0%)
+   Peter Meerwald                    8 (1.0%)
+   Thomas Weber                      7 (0.9%)
+   Linus Walleij                     7 (0.9%)
+   David Müller (ELSOFT AG)          7 (0.9%)
+   Helmut Raiger                     7 (0.9%)
+   Andreas Müller                    7 (0.9%)
+   Christian Hitz                    7 (0.9%)
+   Gabe Black                        7 (0.9%)
+   Andreas Bießmann                  6 (0.8%)
+   Govindraj.R                       6 (0.8%)
+   Nikita Kiryanov                   6 (0.8%)
+   Lukasz Majewski                   5 (0.6%)
+   Joe Hershberger                   5 (0.6%)
+   Tom Warren                        5 (0.6%)
+   Robert Delien                     5 (0.6%)
+   Hadli, Manjunath                  5 (0.6%)
+   Matthias Fuchs                    5 (0.6%)
+   Holger Brunck                     5 (0.6%)
+   Albert ARIBAUD                    5 (0.6%)
+   Chandan Nath                      5 (0.6%)
+   Kyle Moffett                      5 (0.6%)
+   Vikram Narayanan                  4 (0.5%)
+   Igor Grinberg                     4 (0.5%)
+   Minkyu Kang                       4 (0.5%)
+   Ajay Bhargav                      4 (0.5%)
+   Stephen Warren                    4 (0.5%)
+   Horst Kronstorfer                 4 (0.5%)
+   Phil Edworthy                     3 (0.4%)
+   Amit Virdi                        3 (0.4%)
+   Daniel Schwierzeck                3 (0.4%)
+   Wolfgang Grandegger               3 (0.4%)
+   Donggeun Kim                      3 (0.4%)
+   Vincent Palatin                   3 (0.4%)
+   Aneesh V                          3 (0.4%)
+   Peter Barada                      3 (0.4%)
+   HeungJun, Kim                     3 (0.4%)
+   Michael Walle                     3 (0.4%)
+   Vladimir Zapolskiy                3 (0.4%)
+   Patil, Rachna                     3 (0.4%)
+   Bernhard Walle                    2 (0.3%)
+   Armando Visconti                  2 (0.3%)
+   Jason Hobbs                       2 (0.3%)
+   Matt Porter                       2 (0.3%)
+   Vasily Khoruzhick                 2 (0.3%)
+   Yoshihiro Shimoda                 2 (0.3%)
+   Reinhard Arlt                     2 (0.3%)
+   Sven Schnelle                     2 (0.3%)
+   Allen Martin                      2 (0.3%)
+   Prabhakar Lad                     2 (0.3%)
+   Prabhakar Kushwaha                2 (0.3%)
+   Daniel Gorsulowski                2 (0.3%)
+   Alex Hornung                      2 (0.3%)
+   Jan Kloetzke                      2 (0.3%)
+   ramneek mehresh                   2 (0.3%)
+   Dimitar Penev                     2 (0.3%)
+   Sughosh Ganu                      2 (0.3%)
+   Ilya Yanok                        2 (0.3%)
+   Frans Meulenbroeks                2 (0.3%)
+   Jens Scharsig (BuS Elektronik)    2 (0.3%)
+   Sonny Rao                         2 (0.3%)
+   Jens Scharsig                     1 (0.1%)
+   Jeroen Hofstee                    1 (0.1%)
+   Joel Fernandes                    1 (0.1%)
+   Michael Jones                     1 (0.1%)
+   Vikas Manocha                     1 (0.1%)
+   Eric Miao                         1 (0.1%)
+   Stefan Bigler                     1 (0.1%)
+   Valentin Longchamp                1 (0.1%)
+   Maximilian Schwerin               1 (0.1%)
+   Yen Lin                           1 (0.1%)
+   Doug Anderson                     1 (0.1%)
+   jacopo mondi                      1 (0.1%)
+   Grazvydas Ignotas                 1 (0.1%)
+   Tim Kientzle                      1 (0.1%)
+   Otavio Salvador                   1 (0.1%)
+   Liming Wang                       1 (0.1%)
+   Tao Hou                           1 (0.1%)
+   Shiraz Hashim                     1 (0.1%)
+   Detlev Zundel                     1 (0.1%)
+   Chase Maupin                      1 (0.1%)
+   Shawn Guo                         1 (0.1%)
+   Robert Nelson                     1 (0.1%)
+   Schuyler Patton                   1 (0.1%)
+   Prafulla Wadaskar                 1 (0.1%)
+   Stefan                            1 (0.1%)
+   Ian Campbell                      1 (0.1%)
+   Dechesne, Nicolas                 1 (0.1%)
+   Grant Erickson                    1 (0.1%)
+   Yegor Yefremov                    1 (0.1%)
+   Pali Rohár                        1 (0.1%)
+   Ben Gardiner                      1 (0.1%)
+   Shengzhou Liu                     1 (0.1%)
+   Zach Sadecki                      1 (0.1%)
+   Veli-Pekka Peltola                1 (0.1%)
+   Kumar Gala                        1 (0.1%)
+   Marco Schmid                      1 (0.1%)
+   Dirk Eibach                       1 (0.1%)
+   Ira Snyder                        1 (0.1%)
+   Sergei Shtylyov                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       85149 (61.3%)
+   Simon Glass                       9071 (6.5%)
+   Stefan Kristiansson               4042 (2.9%)
+   Chander Kashyap                   2956 (2.1%)
+   Christian Hitz                    2867 (2.1%)
+   Tom Rini                          2418 (1.7%)
+   Stefano Babic                     2140 (1.5%)
+   Stephan Linz                      1972 (1.4%)
+   HeungJun, Kim                     1564 (1.1%)
+   Gabe Black                        1538 (1.1%)
+   Graeme Russ                       1319 (0.9%)
+   Christian Riesch                  1232 (0.9%)
+   Fabio Estevam                     1205 (0.9%)
+   Ilya Yanok                        1102 (0.8%)
+   David Müller (ELSOFT AG)          1049 (0.8%)
+   Heiko Schocher                    1004 (0.7%)
+   Thomas Weber                      934 (0.7%)
+   Jason Liu                         887 (0.6%)
+   Peter Barada                      747 (0.5%)
+   Govindraj.R                       743 (0.5%)
+   Yen Lin                           731 (0.5%)
+   Robert Delien                     709 (0.5%)
+   Thierry Reding                    666 (0.5%)
+   Rob Herring                       659 (0.5%)
+   Stefan                            646 (0.5%)
+   Simon Schwarz                     636 (0.5%)
+   Linus Walleij                     598 (0.4%)
+   Sven Schnelle                     583 (0.4%)
+   Joe Hershberger                   567 (0.4%)
+   Dimitar Penev                     541 (0.4%)
+   Chandan Nath                      479 (0.3%)
+   Eric Nelson                       456 (0.3%)
+   Patil, Rachna                     427 (0.3%)
+   Paul Gortmaker                    385 (0.3%)
+   Tom Warren                        365 (0.3%)
+   Sughosh Ganu                      339 (0.2%)
+   Troy Kisky                        300 (0.2%)
+   Scott Wood                        283 (0.2%)
+   Hadli, Manjunath                  282 (0.2%)
+   Ajay Bhargav                      263 (0.2%)
+   Wolfgang Grandegger               258 (0.2%)
+   Macpaul Lin                       250 (0.2%)
+   Sonny Rao                         246 (0.2%)
+   Vipin Kumar                       240 (0.2%)
+   Helmut Raiger                     238 (0.2%)
+   Mike Frysinger                    225 (0.2%)
+   Nikita Kiryanov                   224 (0.2%)
+   Andreas Müller                    223 (0.2%)
+   Stephen Warren                    198 (0.1%)
+   Holger Brunck                     178 (0.1%)
+   Prabhakar Lad                     175 (0.1%)
+   Maximilian Schwerin               159 (0.1%)
+   Wolfgang Denk                     151 (0.1%)
+   Minkyu Kang                       147 (0.1%)
+   Anatolij Gustschin                136 (0.1%)
+   Kyle Moffett                      134 (0.1%)
+   David Wagner                      105 (0.1%)
+   Matthias Fuchs                    105 (0.1%)
+   Lukasz Majewski                   100 (0.1%)
+   Michael Walle                     98 (0.1%)
+   Nobuhiro Iwamatsu                 97 (0.1%)
+   Matt Porter                       94 (0.1%)
+   Donggeun Kim                      86 (0.1%)
+   Allen Martin                      78 (0.1%)
+   Albert ARIBAUD                    72 (0.1%)
+   Prafulla Wadaskar                 72 (0.1%)
+   jacopo mondi                      65 (0.0%)
+   Igor Grinberg                     60 (0.0%)
+   Joel Fernandes                    57 (0.0%)
+   Dirk Behme                        52 (0.0%)
+   Peter Meerwald                    52 (0.0%)
+   Amit Virdi                        49 (0.0%)
+   Vincent Palatin                   46 (0.0%)
+   Andreas Bießmann                  43 (0.0%)
+   Vladimir Zapolskiy                43 (0.0%)
+   Prabhakar Kushwaha                42 (0.0%)
+   Doug Anderson                     42 (0.0%)
+   Yoshihiro Shimoda                 36 (0.0%)
+   Daniel Schwierzeck                35 (0.0%)
+   Reinhard Arlt                     35 (0.0%)
+   ramneek mehresh                   33 (0.0%)
+   Vikas Manocha                     29 (0.0%)
+   Alex Hornung                      23 (0.0%)
+   Horst Kronstorfer                 22 (0.0%)
+   Jan Kloetzke                      22 (0.0%)
+   Dirk Eibach                       20 (0.0%)
+   Vasily Khoruzhick                 19 (0.0%)
+   Jason Hobbs                       17 (0.0%)
+   Aneesh V                          15 (0.0%)
+   Jens Scharsig                     14 (0.0%)
+   Grazvydas Ignotas                 14 (0.0%)
+   Marco Schmid                      14 (0.0%)
+   Vikram Narayanan                  13 (0.0%)
+   Shawn Guo                         13 (0.0%)
+   Bernhard Walle                    11 (0.0%)
+   Shiraz Hashim                     11 (0.0%)
+   Grant Erickson                    11 (0.0%)
+   Phil Edworthy                     10 (0.0%)
+   Liming Wang                       10 (0.0%)
+   Shengzhou Liu                     10 (0.0%)
+   Ben Gardiner                      9 (0.0%)
+   Daniel Gorsulowski                8 (0.0%)
+   Robert Nelson                     7 (0.0%)
+   Frans Meulenbroeks                6 (0.0%)
+   Veli-Pekka Peltola                6 (0.0%)
+   Armando Visconti                  5 (0.0%)
+   Michael Jones                     5 (0.0%)
+   Jens Scharsig (BuS Elektronik)    4 (0.0%)
+   Zach Sadecki                      4 (0.0%)
+   Tim Kientzle                      3 (0.0%)
+   Jeroen Hofstee                    2 (0.0%)
+   Eric Miao                         2 (0.0%)
+   Stefan Bigler                     2 (0.0%)
+   Valentin Longchamp                2 (0.0%)
+   Tao Hou                           2 (0.0%)
+   Detlev Zundel                     2 (0.0%)
+   Dechesne, Nicolas                 2 (0.0%)
+   Yegor Yefremov                    2 (0.0%)
+   Pali Rohár                        2 (0.0%)
+   Ira Snyder                        2 (0.0%)
+   Sergei Shtylyov                   2 (0.0%)
+   Otavio Salvador                   1 (0.0%)
+   Chase Maupin                      1 (0.0%)
+   Schuyler Patton                   1 (0.0%)
+   Ian Campbell                      1 (0.0%)
+   Kumar Gala                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          1564 (2.8%)
+   David Müller (ELSOFT AG)          660 (1.2%)
+   Sven Schnelle                     502 (0.9%)
+   Sughosh Ganu                      213 (0.4%)
+   Prabhakar Lad                     169 (0.3%)
+   Holger Brunck                     113 (0.2%)
+   Allen Martin                      49 (0.1%)
+   Joel Fernandes                    48 (0.1%)
+   Andreas Bießmann                  34 (0.1%)
+   Igor Grinberg                     29 (0.1%)
+   Vladimir Zapolskiy                17 (0.0%)
+   Vikram Narayanan                  6 (0.0%)
+   Veli-Pekka Peltola                6 (0.0%)
+   Jason Hobbs                       2 (0.0%)
+   Michael Jones                     2 (0.0%)
+   Eric Miao                         1 (0.0%)
+   Valentin Longchamp                1 (0.0%)
+   Yegor Yefremov                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 233)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Warren                        66 (28.3%)
+   Mike Frysinger                    15 (6.4%)
+   Minkyu Kang                       14 (6.0%)
+   Kyungmin Park                     13 (5.6%)
+   Scott Wood                        13 (5.6%)
+   Tom Rini                          12 (5.2%)
+   Kumar Gala                        12 (5.2%)
+   Amit Virdi                        12 (5.2%)
+   Kim Phillips                      9 (3.9%)
+   Stefan Roese                      8 (3.4%)
+   Igor Grinberg                     6 (2.6%)
+   Wolfgang Denk                     6 (2.6%)
+   Nobuhiro Iwamatsu                 5 (2.1%)
+   Stefano Babic                     4 (1.7%)
+   Thomas Chou                       3 (1.3%)
+   Anatolij Gustschin                3 (1.3%)
+   Andreas Bießmann                  2 (0.9%)
+   Poonam Aggrwal                    2 (0.9%)
+   Maximilian Schwerin               2 (0.9%)
+   Chandan Nath                      2 (0.9%)
+   Rob Herring                       2 (0.9%)
+   Simon Glass                       2 (0.9%)
+   Holger Brunck                     1 (0.4%)
+   Jason Hobbs                       1 (0.4%)
+   Eric Miao                         1 (0.4%)
+   Valentin Longchamp                1 (0.4%)
+   Their Name                        1 (0.4%)
+   Jason Kridner                     1 (0.4%)
+   Michal Simek                      1 (0.4%)
+   Stefan Herbrechtsmeier            1 (0.4%)
+   Philip, Avinash                   1 (0.4%)
+   Hebbar, Gururaja                  1 (0.4%)
+   Martin Mueller                    1 (0.4%)
+   Dirk Behme                        1 (0.4%)
+   Doug Anderson                     1 (0.4%)
+   Prafulla Wadaskar                 1 (0.4%)
+   Troy Kisky                        1 (0.4%)
+   Christian Riesch                  1 (0.4%)
+   Fabio Estevam                     1 (0.4%)
+   Thomas Weber                      1 (0.4%)
+   Heiko Schocher                    1 (0.4%)
+   HeungJun, Kim                     1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 0)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 58)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jason Liu                         9 (15.5%)
+   Stefano Babic                     8 (13.8%)
+   Marek Vasut                       8 (13.8%)
+   Heiko Schocher                    6 (10.3%)
+   Simon Glass                       5 (8.6%)
+   Fabio Estevam                     5 (8.6%)
+   Dirk Behme                        2 (3.4%)
+   Tom Rini                          1 (1.7%)
+   Holger Brunck                     1 (1.7%)
+   Their Name                        1 (1.7%)
+   Thomas Weber                      1 (1.7%)
+   Will Deacon                       1 (1.7%)
+   Peter A. Bigot                    1 (1.7%)
+   Sebastien Jan                     1 (1.7%)
+   Robert P. J. Day                  1 (1.7%)
+   Raúl Porcel                       1 (1.7%)
+   Robert Nelson                     1 (1.7%)
+   Grant Erickson                    1 (1.7%)
+   Lukasz Majewski                   1 (1.7%)
+   Andreas Müller                    1 (1.7%)
+   Stephen Warren                    1 (1.7%)
+   Wolfgang Grandegger               1 (1.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 58)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Eric Nelson                       6 (10.3%)
+   Thierry Reding                    6 (10.3%)
+   Tom Rini                          5 (8.6%)
+   Govindraj.R                       5 (8.6%)
+   Marek Vasut                       3 (5.2%)
+   Fabio Estevam                     3 (5.2%)
+   Christian Riesch                  3 (5.2%)
+   Matthias Fuchs                    3 (5.2%)
+   Robert Delien                     3 (5.2%)
+   Stefano Babic                     2 (3.4%)
+   Stephen Warren                    2 (3.4%)
+   Wolfgang Denk                     2 (3.4%)
+   Aneesh V                          2 (3.4%)
+   Jason Liu                         1 (1.7%)
+   Dirk Behme                        1 (1.7%)
+   Tom Warren                        1 (1.7%)
+   Chandan Nath                      1 (1.7%)
+   Sughosh Ganu                      1 (1.7%)
+   Ian Campbell                      1 (1.7%)
+   Dechesne, Nicolas                 1 (1.7%)
+   Peter Meerwald                    1 (1.7%)
+   Vincent Palatin                   1 (1.7%)
+   Matt Porter                       1 (1.7%)
+   Linus Walleij                     1 (1.7%)
+   Simon Schwarz                     1 (1.7%)
+   Ilya Yanok                        1 (1.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      3 (30.0%)
+   Wolfgang Denk                     2 (20.0%)
+   Marek Vasut                       1 (10.0%)
+   Sughosh Ganu                      1 (10.0%)
+   Mike Frysinger                    1 (10.0%)
+   Otavio Salvador                   1 (10.0%)
+   Jim Lentz                         1 (10.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stephan Linz                      3 (30.0%)
+   Linus Walleij                     2 (20.0%)
+   Fabio Estevam                     1 (10.0%)
+   Christian Riesch                  1 (10.0%)
+   Nobuhiro Iwamatsu                 1 (10.0%)
+   Jason Hobbs                       1 (10.0%)
+   Ira Snyder                        1 (10.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         206 (26.6%)
+   DENX Software Engineering         135 (17.5%)
+   Google, Inc.                      119 (15.4%)
+   Linaro                            28 (3.6%)
+   Texas Instruments                 27 (3.5%)
+   Boundary Devices                  26 (3.4%)
+   Freescale                         23 (3.0%)
+   Analog Devices                    20 (2.6%)
+   Konsulko Group                    20 (2.6%)
+   Graeme Russ                       17 (2.2%)
+   Samsung                           15 (1.9%)
+   ST Microelectronics               15 (1.9%)
+   Calxeda                           12 (1.6%)
+   Renesas Electronics               12 (1.6%)
+   CompuLab                          10 (1.3%)
+   Wind River                        10 (1.3%)
+   ESD Electronics                   9 (1.2%)
+   Free Electrons                    9 (1.2%)
+   NVidia                            9 (1.2%)
+   bct electronic GmbH               8 (1.0%)
+   Bosch                             8 (1.0%)
+   Keymile                           8 (1.0%)
+   Boeing                            5 (0.6%)
+   National Instruments              5 (0.6%)
+   Nobuhiro Iwamatsu                 4 (0.5%)
+   BuS Elektronik                    2 (0.3%)
+   EmCraft Systems                   2 (0.3%)
+   Bluegiga Technologies             1 (0.1%)
+   Guntermann & Drunck               1 (0.1%)
+   Marvell                           1 (0.1%)
+   Matrix Vision                     1 (0.1%)
+   MontaVista                        1 (0.1%)
+   O.S. Systems                      1 (0.1%)
+   OVRO                              1 (0.1%)
+   Dirk Behme                        1 (0.1%)
+   Grazvydas Ignotas                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         88840 (63.9%)
+   (Unknown)                         20221 (14.5%)
+   Google, Inc.                      10943 (7.9%)
+   Linaro                            4456 (3.2%)
+   Konsulko Group                    2418 (1.7%)
+   Texas Instruments                 2044 (1.5%)
+   Samsung                           1897 (1.4%)
+   Graeme Russ                       1319 (0.9%)
+   EmCraft Systems                   1102 (0.8%)
+   NVidia                            1016 (0.7%)
+   Boundary Devices                  756 (0.5%)
+   Calxeda                           676 (0.5%)
+   Freescale                         576 (0.4%)
+   National Instruments              567 (0.4%)
+   Wind River                        385 (0.3%)
+   ST Microelectronics               334 (0.2%)
+   CompuLab                          284 (0.2%)
+   Analog Devices                    225 (0.2%)
+   Keymile                           196 (0.1%)
+   ESD Electronics                   148 (0.1%)
+   Boeing                            134 (0.1%)
+   Renesas Electronics               122 (0.1%)
+   Free Electrons                    105 (0.1%)
+   Marvell                           72 (0.1%)
+   bct electronic GmbH               52 (0.0%)
+   Bosch                             50 (0.0%)
+   Nobuhiro Iwamatsu                 21 (0.0%)
+   Guntermann & Drunck               20 (0.0%)
+   Grazvydas Ignotas                 14 (0.0%)
+   Bluegiga Technologies             6 (0.0%)
+   Matrix Vision                     5 (0.0%)
+   BuS Elektronik                    4 (0.0%)
+   MontaVista                        2 (0.0%)
+   OVRO                              2 (0.0%)
+   Dirk Behme                        2 (0.0%)
+   O.S. Systems                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 233)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   NVidia                            66 (28.3%)
+   Freescale                         36 (15.5%)
+   Samsung                           28 (12.0%)
+   DENX Software Engineering         22 (9.4%)
+   Texas Instruments                 17 (7.3%)
+   Analog Devices                    15 (6.4%)
+   (Unknown)                         12 (5.2%)
+   ST Microelectronics               12 (5.2%)
+   CompuLab                          6 (2.6%)
+   Nobuhiro Iwamatsu                 5 (2.1%)
+   Google, Inc.                      3 (1.3%)
+   Calxeda                           3 (1.3%)
+   Keymile                           2 (0.9%)
+   Bosch                             2 (0.9%)
+   Linaro                            1 (0.4%)
+   Boundary Devices                  1 (0.4%)
+   Marvell                           1 (0.4%)
+   Funky                             1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 130)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         48 (36.9%)
+   Texas Instruments                 9 (6.9%)
+   DENX Software Engineering         7 (5.4%)
+   Freescale                         6 (4.6%)
+   ST Microelectronics               5 (3.8%)
+   Google, Inc.                      5 (3.8%)
+   Linaro                            5 (3.8%)
+   NVidia                            4 (3.1%)
+   Samsung                           4 (3.1%)
+   Keymile                           4 (3.1%)
+   ESD Electronics                   3 (2.3%)
+   Renesas Electronics               3 (2.3%)
+   CompuLab                          2 (1.5%)
+   Calxeda                           2 (1.5%)
+   Boundary Devices                  2 (1.5%)
+   Analog Devices                    1 (0.8%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   Bosch                             1 (0.8%)
+   Marvell                           1 (0.8%)
+   Konsulko Group                    1 (0.8%)
+   Graeme Russ                       1 (0.8%)
+   EmCraft Systems                   1 (0.8%)
+   National Instruments              1 (0.8%)
+   Wind River                        1 (0.8%)
+   Boeing                            1 (0.8%)
+   Free Electrons                    1 (0.8%)
+   bct electronic GmbH               1 (0.8%)
+   Guntermann & Drunck               1 (0.8%)
+   Grazvydas Ignotas                 1 (0.8%)
+   Bluegiga Technologies             1 (0.8%)
+   Matrix Vision                     1 (0.8%)
+   BuS Elektronik                    1 (0.8%)
+   MontaVista                        1 (0.8%)
+   OVRO                              1 (0.8%)
+   Dirk Behme                        1 (0.8%)
+   O.S. Systems                      1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2012.07.rst b/doc/develop/statistics/u-boot-stats-v2012.07.rst
new file mode 100644
index 00000000000..7bcf81a4f41
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2012.07.rst
@@ -0,0 +1,570 @@
+:orphan:
+
+Release Statistics for U-Boot v2012.07
+======================================
+
+* Processed 775 changesets from 114 developers
+
+* 29 employers found
+
+* A total of 55134 lines added, 11790 removed (delta 43344)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Joe Hershberger                   90 (11.6%)
+   Fabio Estevam                     56 (7.2%)
+   Marek Vasut                       42 (5.4%)
+   Stephen Warren                    35 (4.5%)
+   SRICHARAN R                       29 (3.7%)
+   Tom Rini                          25 (3.2%)
+   Mike Frysinger                    22 (2.8%)
+   Simon Glass                       22 (2.8%)
+   Vipin Kumar                       21 (2.7%)
+   Anatolij Gustschin                19 (2.5%)
+   Holger Brunck                     18 (2.3%)
+   Nobuhiro Iwamatsu                 15 (1.9%)
+   Donghwa Lee                       14 (1.8%)
+   Prabhakar Kushwaha                14 (1.8%)
+   Valentin Longchamp                13 (1.7%)
+   Wolfgang Denk                     12 (1.5%)
+   Łukasz Majewski                   11 (1.4%)
+   Rajeshwari Shinde                 11 (1.4%)
+   Stefan Roese                      11 (1.4%)
+   Stefano Babic                     10 (1.3%)
+   Amit Virdi                        10 (1.3%)
+   Lokesh Vutla                      10 (1.3%)
+   Timur Tabi                        9 (1.2%)
+   Eric Nelson                       8 (1.0%)
+   Timo Ketola                       8 (1.0%)
+   Liu Gang                          8 (1.0%)
+   Tom Warren                        7 (0.9%)
+   Thierry Reding                    7 (0.9%)
+   Rob Herring                       7 (0.9%)
+   Dirk Eibach                       7 (0.9%)
+   Ilya Yanok                        6 (0.8%)
+   Jaehoon Chung                     6 (0.8%)
+   Nikita Kiryanov                   6 (0.8%)
+   Otavio Salvador                   6 (0.8%)
+   Grazvydas Ignotas                 6 (0.8%)
+   Aneesh V                          6 (0.8%)
+   Macpaul Lin                       5 (0.6%)
+   Lucas Stach                       5 (0.6%)
+   Shiraz Hashim                     5 (0.6%)
+   Armando Visconti                  5 (0.6%)
+   Thomas Herzmann                   5 (0.6%)
+   Andreas Bießmann                  5 (0.6%)
+   Vikram Narayanan                  5 (0.6%)
+   York Sun                          5 (0.6%)
+   Yen Lin                           5 (0.6%)
+   Daniel Schwierzeck                4 (0.5%)
+   Michael Walle                     4 (0.5%)
+   Troy Kisky                        4 (0.5%)
+   Steve Sakoman                     4 (0.5%)
+   Bo Shen                           4 (0.5%)
+   Benoît Thébaudeau                 3 (0.4%)
+   Tetsuyuki Kobayashi               3 (0.4%)
+   Jerry Huang                       3 (0.4%)
+   Andy Fleming                      3 (0.4%)
+   Kim Phillips                      3 (0.4%)
+   Jens Scharsig                     3 (0.4%)
+   Simon Guinot                      3 (0.4%)
+   Jimmy Zhang                       3 (0.4%)
+   Pali Rohár                        3 (0.4%)
+   Stephan Linz                      3 (0.4%)
+   Tero Kristo                       3 (0.4%)
+   Anton Staff                       3 (0.4%)
+   Balaji T K                        3 (0.4%)
+   Nishanth Menon                    3 (0.4%)
+   Vladimir Zapolskiy                3 (0.4%)
+   Luka Perkov                       2 (0.3%)
+   Minkyu Kang                       2 (0.3%)
+   Heiko Schocher                    2 (0.3%)
+   Shengzhou Liu                     2 (0.3%)
+   Scott Wood                        2 (0.3%)
+   Jeroen Hofstee                    2 (0.3%)
+   Enric Balletbo i Serra            2 (0.3%)
+   Dirk Behme                        2 (0.3%)
+   Shaohui Xie                       2 (0.3%)
+   Linu Cherian                      1 (0.1%)
+   Ashok                             1 (0.1%)
+   Zhong Hongbo                      1 (0.1%)
+   Stefan Herbrechtsmeier            1 (0.1%)
+   Thomas Chou                       1 (0.1%)
+   Torsten Fleischer                 1 (0.1%)
+   Igor Grinberg                     1 (0.1%)
+   Jim Lin                           1 (0.1%)
+   Peter Meerwald                    1 (0.1%)
+   Vladimir Yakovlev                 1 (0.1%)
+   Sebastien Jan                     1 (0.1%)
+   Rajashekhara, Sudhakar            1 (0.1%)
+   David Purdy                       1 (0.1%)
+   Alexandre Belloni                 1 (0.1%)
+   Michael Langer                    1 (0.1%)
+   Jason Liu                         1 (0.1%)
+   Thomas Weber                      1 (0.1%)
+   Allen Martin                      1 (0.1%)
+   Ramneek Mehresh                   1 (0.1%)
+   Jason Cooper                      1 (0.1%)
+   Loïc Minier                       1 (0.1%)
+   Stefan Bigler                     1 (0.1%)
+   Christian Herzig                  1 (0.1%)
+   Andreas Huber                     1 (0.1%)
+   Phil Edworthy                     1 (0.1%)
+   Aaron Williams                    1 (0.1%)
+   Puneet Saxena                     1 (0.1%)
+   Liu, Wentao                       1 (0.1%)
+   Matt Porter                       1 (0.1%)
+   Jon Hunter                        1 (0.1%)
+   Rakesh Iyer                       1 (0.1%)
+   Bernie Thompson                   1 (0.1%)
+   Wei Ni                            1 (0.1%)
+   Lauri Hintsala                    1 (0.1%)
+   Wolfgang Grandegger               1 (0.1%)
+   Chander Kashyap                   1 (0.1%)
+   Enric Balletbò i Serra            1 (0.1%)
+   Jonathan Solnit                   1 (0.1%)
+   Ian Campbell                      1 (0.1%)
+   Chunhe Lan                        1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Donghwa Lee                       9434 (15.7%)
+   Mike Frysinger                    3465 (5.8%)
+   Joe Hershberger                   3048 (5.1%)
+   Marek Vasut                       3032 (5.1%)
+   Nobuhiro Iwamatsu                 2413 (4.0%)
+   Yen Lin                           2098 (3.5%)
+   Stefano Babic                     2090 (3.5%)
+   Łukasz Majewski                   2022 (3.4%)
+   Stefan Roese                      2019 (3.4%)
+   Macpaul Lin                       1757 (2.9%)
+   Prabhakar Kushwaha                1554 (2.6%)
+   Simon Glass                       1492 (2.5%)
+   SRICHARAN R                       1403 (2.3%)
+   Vipin Kumar                       1392 (2.3%)
+   Vladimir Zapolskiy                1389 (2.3%)
+   Holger Brunck                     1350 (2.3%)
+   Rajeshwari Shinde                 1350 (2.3%)
+   Luka Perkov                       1320 (2.2%)
+   Stephen Warren                    1317 (2.2%)
+   Fabio Estevam                     1251 (2.1%)
+   Michael Walle                     1227 (2.0%)
+   Tom Rini                          1170 (2.0%)
+   Jens Scharsig                     1072 (1.8%)
+   Liu Gang                          883 (1.5%)
+   Bo Shen                           719 (1.2%)
+   Jaehoon Chung                     644 (1.1%)
+   Jimmy Zhang                       600 (1.0%)
+   Thierry Reding                    537 (0.9%)
+   Dirk Eibach                       510 (0.9%)
+   David Purdy                       498 (0.8%)
+   Valentin Longchamp                449 (0.7%)
+   Lokesh Vutla                      432 (0.7%)
+   Rakesh Iyer                       410 (0.7%)
+   Phil Edworthy                     401 (0.7%)
+   Heiko Schocher                    371 (0.6%)
+   Eric Nelson                       368 (0.6%)
+   Bernie Thompson                   309 (0.5%)
+   Enric Balletbò i Serra            273 (0.5%)
+   Shengzhou Liu                     256 (0.4%)
+   Amit Virdi                        226 (0.4%)
+   Rob Herring                       214 (0.4%)
+   Nishanth Menon                    210 (0.4%)
+   Nikita Kiryanov                   190 (0.3%)
+   York Sun                          176 (0.3%)
+   Timur Tabi                        146 (0.2%)
+   Andy Fleming                      144 (0.2%)
+   Jeroen Hofstee                    120 (0.2%)
+   Armando Visconti                  116 (0.2%)
+   Thomas Herzmann                   114 (0.2%)
+   Grazvydas Ignotas                 105 (0.2%)
+   Aneesh V                          103 (0.2%)
+   Tom Warren                        101 (0.2%)
+   Timo Ketola                       100 (0.2%)
+   Anton Staff                       87 (0.1%)
+   Scott Wood                        85 (0.1%)
+   Daniel Schwierzeck                81 (0.1%)
+   Anatolij Gustschin                74 (0.1%)
+   Dirk Behme                        73 (0.1%)
+   Balaji T K                        70 (0.1%)
+   Wolfgang Denk                     69 (0.1%)
+   Ramneek Mehresh                   66 (0.1%)
+   Zhong Hongbo                      65 (0.1%)
+   Vikram Narayanan                  63 (0.1%)
+   Andreas Bießmann                  61 (0.1%)
+   Puneet Saxena                     61 (0.1%)
+   Troy Kisky                        58 (0.1%)
+   Jonathan Solnit                   58 (0.1%)
+   Shaohui Xie                       57 (0.1%)
+   Andreas Huber                     43 (0.1%)
+   Pali Rohár                        41 (0.1%)
+   Ilya Yanok                        39 (0.1%)
+   Minkyu Kang                       38 (0.1%)
+   Lucas Stach                       32 (0.1%)
+   Lauri Hintsala                    31 (0.1%)
+   Simon Guinot                      25 (0.0%)
+   Jason Cooper                      24 (0.0%)
+   Tetsuyuki Kobayashi               21 (0.0%)
+   Alexandre Belloni                 21 (0.0%)
+   Stefan Herbrechtsmeier            20 (0.0%)
+   Shiraz Hashim                     18 (0.0%)
+   Jim Lin                           18 (0.0%)
+   Wei Ni                            18 (0.0%)
+   Enric Balletbo i Serra            17 (0.0%)
+   Matt Porter                       16 (0.0%)
+   Thomas Chou                       15 (0.0%)
+   Steve Sakoman                     13 (0.0%)
+   Stephan Linz                      12 (0.0%)
+   Otavio Salvador                   11 (0.0%)
+   Kim Phillips                      11 (0.0%)
+   Tero Kristo                       10 (0.0%)
+   Vladimir Yakovlev                 10 (0.0%)
+   Jerry Huang                       9 (0.0%)
+   Rajashekhara, Sudhakar            8 (0.0%)
+   Benoît Thébaudeau                 7 (0.0%)
+   Peter Meerwald                    6 (0.0%)
+   Chunhe Lan                        6 (0.0%)
+   Allen Martin                      5 (0.0%)
+   Michael Langer                    4 (0.0%)
+   Stefan Bigler                     4 (0.0%)
+   Aaron Williams                    3 (0.0%)
+   Wolfgang Grandegger               3 (0.0%)
+   Ashok                             2 (0.0%)
+   Igor Grinberg                     2 (0.0%)
+   Jason Liu                         2 (0.0%)
+   Thomas Weber                      2 (0.0%)
+   Chander Kashyap                   2 (0.0%)
+   Ian Campbell                      2 (0.0%)
+   Linu Cherian                      1 (0.0%)
+   Torsten Fleischer                 1 (0.0%)
+   Sebastien Jan                     1 (0.0%)
+   Loïc Minier                       1 (0.0%)
+   Christian Herzig                  1 (0.0%)
+   Liu, Wentao                       1 (0.0%)
+   Jon Hunter                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          831 (7.0%)
+   Jaehoon Chung                     353 (3.0%)
+   Enric Balletbò i Serra            262 (2.2%)
+   Amit Virdi                        104 (0.9%)
+   York Sun                          51 (0.4%)
+   Timur Tabi                        51 (0.4%)
+   Andreas Bießmann                  43 (0.4%)
+   Wolfgang Denk                     22 (0.2%)
+   Simon Guinot                      13 (0.1%)
+   Thomas Chou                       6 (0.1%)
+   Tero Kristo                       6 (0.1%)
+   Stephan Linz                      4 (0.0%)
+   Otavio Salvador                   2 (0.0%)
+   Igor Grinberg                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 370)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Warren                        80 (21.6%)
+   Stefan Roese                      46 (12.4%)
+   Kyungmin Park                     32 (8.6%)
+   Amit Virdi                        31 (8.4%)
+   Andy Fleming                      16 (4.3%)
+   Kim Phillips                      14 (3.8%)
+   Simon Glass                       14 (3.8%)
+   Valentin Longchamp                13 (3.5%)
+   Minkyu Kang                       11 (3.0%)
+   Anatolij Gustschin                10 (2.7%)
+   Holger Brunck                     10 (2.7%)
+   Inki Dae                          8 (2.2%)
+   Andreas Bießmann                  6 (1.6%)
+   Scott Wood                        6 (1.6%)
+   Igor Grinberg                     5 (1.4%)
+   Radu Lazarescu                    5 (1.4%)
+   Shaohui Xie                       5 (1.4%)
+   Vivek Gautam                      4 (1.1%)
+   Marius Grigoras                   4 (1.1%)
+   Ilya Yanok                        3 (0.8%)
+   SRICHARAN R                       3 (0.8%)
+   Tom Rini                          2 (0.5%)
+   Che-Liang Chiou                   2 (0.5%)
+   Senthilvadivu Guruswamy           2 (0.5%)
+   Prafulla Wadaskar                 2 (0.5%)
+   Abhilash Kesavan                  2 (0.5%)
+   Priyanka Jain                     2 (0.5%)
+   Akhil Goyal                       2 (0.5%)
+   Rajan Srivastava                  2 (0.5%)
+   Poonam Aggrwal                    2 (0.5%)
+   Ramneek Mehresh                   2 (0.5%)
+   Marek Vasut                       2 (0.5%)
+   Vipin Kumar                       2 (0.5%)
+   Wolfgang Denk                     1 (0.3%)
+   Jason Liu                         1 (0.3%)
+   Christian Herzig                  1 (0.3%)
+   Lad, Prabhakar                    1 (0.3%)
+   Hadli, Manjunath                  1 (0.3%)
+   Daniel Stodden                    1 (0.3%)
+   Catalin Udma                      1 (0.3%)
+   Eric Miao                         1 (0.3%)
+   Terry Lv                          1 (0.3%)
+   Gerald Kerma                      1 (0.3%)
+   Simon Baatz                       1 (0.3%)
+   Anmol Paralkar                    1 (0.3%)
+   John Russo                        1 (0.3%)
+   Michel Sanches                    1 (0.3%)
+   Peter Meerwald                    1 (0.3%)
+   Shiraz Hashim                     1 (0.3%)
+   Balaji T K                        1 (0.3%)
+   Fabio Estevam                     1 (0.3%)
+   Stefano Babic                     1 (0.3%)
+   Nobuhiro Iwamatsu                 1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 2)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Joe Hershberger                   2 (100.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 25)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Anatolij Gustschin                3 (12.0%)
+   Tom Rini                          3 (12.0%)
+   Wolfgang Denk                     2 (8.0%)
+   Gary Thomas                       2 (8.0%)
+   Pali Rohár                        2 (8.0%)
+   Stephen Warren                    2 (8.0%)
+   Simon Glass                       1 (4.0%)
+   Holger Brunck                     1 (4.0%)
+   Jaehoon Chung                     1 (4.0%)
+   Simon Guinot                      1 (4.0%)
+   Yoshihiro Shimoda                 1 (4.0%)
+   Allen Martin                      1 (4.0%)
+   Thierry Reding                    1 (4.0%)
+   Eric Nelson                       1 (4.0%)
+   David Purdy                       1 (4.0%)
+   Jimmy Zhang                       1 (4.0%)
+   Mike Frysinger                    1 (4.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 25)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Anatolij Gustschin                3 (12.0%)
+   Luka Perkov                       3 (12.0%)
+   SRICHARAN R                       2 (8.0%)
+   Tetsuyuki Kobayashi               2 (8.0%)
+   Jason Cooper                      2 (8.0%)
+   Grazvydas Ignotas                 2 (8.0%)
+   Timo Ketola                       2 (8.0%)
+   Stephen Warren                    1 (4.0%)
+   Allen Martin                      1 (4.0%)
+   Tom Warren                        1 (4.0%)
+   Andy Fleming                      1 (4.0%)
+   Minkyu Kang                       1 (4.0%)
+   Nobuhiro Iwamatsu                 1 (4.0%)
+   Aaron Williams                    1 (4.0%)
+   Lucas Stach                       1 (4.0%)
+   Aneesh V                          1 (4.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 12)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Isabelle Gros                     3 (25.0%)
+   Jerome Angeloni                   3 (25.0%)
+   Pali Rohár                        1 (8.3%)
+   Marek Vasut                       1 (8.3%)
+   Deepak Sikri                      1 (8.3%)
+   David Jander                      1 (8.3%)
+   Armando Visconti                  1 (8.3%)
+   Michael Walle                     1 (8.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 12)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Nishanth Menon                    6 (50.0%)
+   Shiraz Hashim                     2 (16.7%)
+   Anatolij Gustschin                1 (8.3%)
+   Mike Frysinger                    1 (8.3%)
+   Joe Hershberger                   1 (8.3%)
+   Stefano Babic                     1 (8.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         102 (13.2%)
+   DENX Software Engineering         97 (12.5%)
+   (Unknown)                         97 (12.5%)
+   National Instruments              90 (11.6%)
+   Texas Instruments                 58 (7.5%)
+   NVidia                            51 (6.6%)
+   Samsung                           44 (5.7%)
+   ST Microelectronics               41 (5.3%)
+   Keymile                           39 (5.0%)
+   Google, Inc.                      26 (3.4%)
+   Konsulko Group                    25 (3.2%)
+   Analog Devices                    22 (2.8%)
+   Renesas Electronics               13 (1.7%)
+   Boundary Devices                  12 (1.5%)
+   Calxeda                           7 (0.9%)
+   CompuLab                          7 (0.9%)
+   Guntermann & Drunck               7 (0.9%)
+   O.S. Systems                      6 (0.8%)
+   Grazvydas Ignotas                 6 (0.8%)
+   Atmel                             4 (0.5%)
+   Sakoman Inc.                      4 (0.5%)
+   ADVANSEE                          3 (0.4%)
+   BuS Elektronik                    3 (0.4%)
+   Bosch                             3 (0.4%)
+   Nobuhiro Iwamatsu                 3 (0.4%)
+   Linaro                            2 (0.3%)
+   Bluegiga Technologies             1 (0.1%)
+   Debian.org                        1 (0.1%)
+   Intel                             1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Samsung                           13488 (22.5%)
+   (Unknown)                         8487 (14.1%)
+   DENX Software Engineering         7658 (12.8%)
+   NVidia                            4584 (7.6%)
+   Freescale                         4044 (6.7%)
+   Analog Devices                    3465 (5.8%)
+   National Instruments              3048 (5.1%)
+   Renesas Electronics               2803 (4.7%)
+   Texas Instruments                 2254 (3.8%)
+   Keymile                           1961 (3.3%)
+   Google, Inc.                      1888 (3.1%)
+   ST Microelectronics               1752 (2.9%)
+   Konsulko Group                    1170 (2.0%)
+   BuS Elektronik                    1072 (1.8%)
+   Atmel                             719 (1.2%)
+   Guntermann & Drunck               510 (0.9%)
+   Boundary Devices                  426 (0.7%)
+   Calxeda                           214 (0.4%)
+   CompuLab                          192 (0.3%)
+   Grazvydas Ignotas                 105 (0.2%)
+   Bosch                             77 (0.1%)
+   Bluegiga Technologies             31 (0.1%)
+   Sakoman Inc.                      13 (0.0%)
+   O.S. Systems                      11 (0.0%)
+   Nobuhiro Iwamatsu                 11 (0.0%)
+   ADVANSEE                          7 (0.0%)
+   Linaro                            4 (0.0%)
+   Debian.org                        1 (0.0%)
+   Intel                             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 370)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   NVidia                            80 (21.6%)
+   DENX Software Engineering         60 (16.2%)
+   Freescale                         59 (15.9%)
+   Samsung                           57 (15.4%)
+   ST Microelectronics               35 (9.5%)
+   Keymile                           24 (6.5%)
+   (Unknown)                         18 (4.9%)
+   Google, Inc.                      16 (4.3%)
+   Texas Instruments                 10 (2.7%)
+   CompuLab                          5 (1.4%)
+   Linaro                            2 (0.5%)
+   Marvell                           2 (0.5%)
+   Nobuhiro Iwamatsu                 1 (0.3%)
+   bct electronic GmbH               1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 117)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         35 (29.9%)
+   Freescale                         13 (11.1%)
+   Texas Instruments                 10 (8.5%)
+   NVidia                            9 (7.7%)
+   DENX Software Engineering         7 (6.0%)
+   Keymile                           6 (5.1%)
+   Samsung                           5 (4.3%)
+   ST Microelectronics               4 (3.4%)
+   Google, Inc.                      3 (2.6%)
+   CompuLab                          2 (1.7%)
+   Linaro                            2 (1.7%)
+   Renesas Electronics               2 (1.7%)
+   Boundary Devices                  2 (1.7%)
+   Bosch                             2 (1.7%)
+   Nobuhiro Iwamatsu                 1 (0.9%)
+   Analog Devices                    1 (0.9%)
+   National Instruments              1 (0.9%)
+   Konsulko Group                    1 (0.9%)
+   BuS Elektronik                    1 (0.9%)
+   Atmel                             1 (0.9%)
+   Guntermann & Drunck               1 (0.9%)
+   Calxeda                           1 (0.9%)
+   Grazvydas Ignotas                 1 (0.9%)
+   Bluegiga Technologies             1 (0.9%)
+   Sakoman Inc.                      1 (0.9%)
+   O.S. Systems                      1 (0.9%)
+   ADVANSEE                          1 (0.9%)
+   Debian.org                        1 (0.9%)
+   Intel                             1 (0.9%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2012.10.rst b/doc/develop/statistics/u-boot-stats-v2012.10.rst
new file mode 100644
index 00000000000..715ec342556
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2012.10.rst
@@ -0,0 +1,638 @@
+:orphan:
+
+Release Statistics for U-Boot v2012.12
+======================================
+
+* Processed 925 changesets from 134 developers
+
+* 31 employers found
+
+* A total of 88011 lines added, 36373 removed (delta 51638)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   =====================================  =====
+   Name                                   Count
+   =====================================  =====
+   Benoît Thébaudeau                      71 (7.7%)
+   Tom Rini                               66 (7.1%)
+   Marek Vasut                            51 (5.5%)
+   Troy Kisky                             31 (3.4%)
+   Joe Hershberger                        30 (3.2%)
+   Nobuhiro Iwamatsu                      30 (3.2%)
+   Stephen Warren                         28 (3.0%)
+   Michal Simek                           27 (2.9%)
+   Otavio Salvador                        26 (2.8%)
+   Stefano Babic                          20 (2.2%)
+   Allen Martin                           20 (2.2%)
+   Rajeshwari Shinde                      19 (2.1%)
+   Gerlando Falauto                       17 (1.8%)
+   Tetsuyuki Kobayashi                    16 (1.7%)
+   Fabio Estevam                          16 (1.7%)
+   York Sun                               16 (1.7%)
+   Łukasz Majewski                        15 (1.6%)
+   Simon Glass                            14 (1.5%)
+   Stephan Linz                           13 (1.4%)
+   Rob Herring                            12 (1.3%)
+   Timur Tabi                             12 (1.3%)
+   Ilya Yanok                             11 (1.2%)
+   Bo Shen                                11 (1.2%)
+   Andreas Bießmann                       10 (1.1%)
+   Matt Sealey                            10 (1.1%)
+   Mike Frysinger                         10 (1.1%)
+   Mathieu J. Poirier                     10 (1.1%)
+   Anatolij Gustschin                     9 (1.0%)
+   Alison Wang                            9 (1.0%)
+   Donghwa Lee                            9 (1.0%)
+   Stefan Roese                           8 (0.9%)
+   Holger Brunck                          8 (0.9%)
+   Lucas Stach                            8 (0.9%)
+   Valentin Longchamp                     7 (0.8%)
+   Daniel Schwierzeck                     7 (0.8%)
+   Prabhakar Lad                          7 (0.8%)
+   Scott Wood                             7 (0.8%)
+   Wu, Josh                               7 (0.8%)
+   Yoshihiro Shimoda                      7 (0.8%)
+   Matthew McClintock                     7 (0.8%)
+   Laurence Withers                       6 (0.6%)
+   Bastian Ruppert                        6 (0.6%)
+   Lei Wen                                6 (0.6%)
+   Liu Gang                               6 (0.6%)
+   Albert ARIBAUD                         5 (0.5%)
+   Peter Meerwald                         5 (0.5%)
+   Nikita Kiryanov                        5 (0.5%)
+   Andrew Sharp                           5 (0.5%)
+   Javier Martinez Canillas               5 (0.5%)
+   Luka Perkov                            4 (0.4%)
+   Karl O. Pinc                           4 (0.4%)
+   Pavel Herrmann                         4 (0.4%)
+   Kumar Gala                             4 (0.4%)
+   Ira W. Snyder                          4 (0.4%)
+   Ashok Kumar Reddy                      4 (0.4%)
+   Jaehoon Chung                          4 (0.4%)
+   Mikhail Kshevetskiy                    4 (0.4%)
+   Markus Hubig                           4 (0.4%)
+   Tomáš Hlaváček                         4 (0.4%)
+   Viktor Krivak                          4 (0.4%)
+   Prabhakar Kushwaha                     4 (0.4%)
+   Shaohui Xie                            4 (0.4%)
+   Igor Grinberg                          3 (0.3%)
+   Wolfgang Denk                          3 (0.3%)
+   Dinh Nguyen                            3 (0.3%)
+   Zhong Hongbo                           3 (0.3%)
+   Michael Walle                          3 (0.3%)
+   Simon Guinot                           3 (0.3%)
+   Sughosh Ganu                           3 (0.3%)
+   Andy Fleming                           3 (0.3%)
+   Jens Scharsig                          3 (0.3%)
+   Joakim Tjernlund                       3 (0.3%)
+   trem                                   3 (0.3%)
+   Chandan Nath                           3 (0.3%)
+   Steve Sakoman                          3 (0.3%)
+   Pavel Machek                           2 (0.2%)
+   Gabriel Huau                           2 (0.2%)
+   Hideyuki Sano                          2 (0.2%)
+   Stefan Kristiansson                    2 (0.2%)
+   Koen Kooi                              2 (0.2%)
+   Eric Nelson                            2 (0.2%)
+   Tom Warren                             2 (0.2%)
+   Veli-Pekka Peltola                     2 (0.2%)
+   Thierry Reding                         2 (0.2%)
+   Charles Manning                        2 (0.2%)
+   Vikram Narayanan                       2 (0.2%)
+   Rajashekhara, Sudhakar                 2 (0.2%)
+   Horst Kronstorfer                      2 (0.2%)
+   Uma Shankar                            2 (0.2%)
+   Jeroen Hofstee                         1 (0.1%)
+   Simon Baatz                            1 (0.1%)
+   Rommel Custodio                        1 (0.1%)
+   Ramesh Chandrasekaran                  1 (0.1%)
+   Chan-Taek Park                         1 (0.1%)
+   Wolfgang Grandegger                    1 (0.1%)
+   Joel A Fernandes                       1 (0.1%)
+   Brian Rzycki                           1 (0.1%)
+   Chander Kashyap                        1 (0.1%)
+   Priyanka Jain                          1 (0.1%)
+   Jason Jin                              1 (0.1%)
+   Richard Retanubun                      1 (0.1%)
+   Iwo Mergler                            1 (0.1%)
+   Tyler Olmstead                         1 (0.1%)
+   Matthieu CASTET                        1 (0.1%)
+   Jim Lin                                1 (0.1%)
+   Jongman Heo                            1 (0.1%)
+   Arnout Vandecappelle (Essensium/Mind)  1 (0.1%)
+   Linus Walleij                          1 (0.1%)
+   Jagan Teki                             1 (0.1%)
+   Kaspter Ju                             1 (0.1%)
+   Xu, Hong                               1 (0.1%)
+   Matej Frančeškin                       1 (0.1%)
+   Łukasz Dałek                           1 (0.1%)
+   Jim Shimer                             1 (0.1%)
+   John Rigby                             1 (0.1%)
+   Heiko Schocher                         1 (0.1%)
+   Satyanarayana, Sandhya                 1 (0.1%)
+   Stathis Voukelatos                     1 (0.1%)
+   Enric Balletbò i Serra                 1 (0.1%)
+   Vaibhav Bedia                          1 (0.1%)
+   Cyril Chemparathy                      1 (0.1%)
+   Jeremy Andrus                          1 (0.1%)
+   Paul Gortmaker                         1 (0.1%)
+   Kenth Eriksson                         1 (0.1%)
+   Khem Raj                               1 (0.1%)
+   Jorgen Lundman                         1 (0.1%)
+   Julius Baxter                          1 (0.1%)
+   Dirk Eibach                            1 (0.1%)
+   Timo Ketola                            1 (0.1%)
+   Bernhard Walle                         1 (0.1%)
+   Hongtao Jia                            1 (0.1%)
+   David du Colombier                     1 (0.1%)
+   Jayachandran Chandrasekharan Nair      1 (0.1%)
+   Jérôme Carretero                       1 (0.1%)
+   =====================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   =====================================  =====
+   Name                                   Count
+   =====================================  =====
+   Charles Manning                        13922 (13.8%)
+   Nobuhiro Iwamatsu                      9559 (9.5%)
+   Marek Vasut                            5946 (5.9%)
+   Uma Shankar                            5463 (5.4%)
+   Jorgen Lundman                         4750 (4.7%)
+   Lei Wen                                3818 (3.8%)
+   Donghwa Lee                            3597 (3.6%)
+   Wolfgang Denk                          3185 (3.2%)
+   Anatolij Gustschin                     2534 (2.5%)
+   Rajeshwari Shinde                      2433 (2.4%)
+   Timur Tabi                             2252 (2.2%)
+   Mathieu J. Poirier                     2180 (2.2%)
+   Tom Rini                               2038 (2.0%)
+   Rob Herring                            1962 (2.0%)
+   Łukasz Majewski                        1940 (1.9%)
+   Benoît Thébaudeau                      1637 (1.6%)
+   Michal Simek                           1546 (1.5%)
+   Allen Martin                           1429 (1.4%)
+   Alison Wang                            1339 (1.3%)
+   Jim Lin                                1287 (1.3%)
+   Stephen Warren                         1224 (1.2%)
+   Stefan Roese                           1207 (1.2%)
+   Troy Kisky                             1148 (1.1%)
+   Bo Shen                                1098 (1.1%)
+   Joe Hershberger                        1083 (1.1%)
+   Otavio Salvador                        1071 (1.1%)
+   Cyril Chemparathy                      1043 (1.0%)
+   Gabriel Huau                           1008 (1.0%)
+   York Sun                               946 (0.9%)
+   Wu, Josh                               945 (0.9%)
+   Dinh Nguyen                            905 (0.9%)
+   Gerlando Falauto                       869 (0.9%)
+   Tomáš Hlaváček                         757 (0.8%)
+   Matt Sealey                            698 (0.7%)
+   Markus Hubig                           679 (0.7%)
+   Pavel Herrmann                         673 (0.7%)
+   Shaohui Xie                            647 (0.6%)
+   Veli-Pekka Peltola                     620 (0.6%)
+   Stefano Babic                          611 (0.6%)
+   Hideyuki Sano                          566 (0.6%)
+   Liu Gang                               544 (0.5%)
+   Scott Wood                             509 (0.5%)
+   Stephan Linz                           500 (0.5%)
+   Valentin Longchamp                     488 (0.5%)
+   Luka Perkov                            488 (0.5%)
+   Viktor Krivak                          472 (0.5%)
+   Simon Glass                            465 (0.5%)
+   Mike Frysinger                         451 (0.4%)
+   Andreas Bießmann                       448 (0.4%)
+   Richard Retanubun                      415 (0.4%)
+   Yoshihiro Shimoda                      330 (0.3%)
+   Ilya Yanok                             299 (0.3%)
+   Matthew McClintock                     241 (0.2%)
+   Simon Guinot                           241 (0.2%)
+   Prabhakar Lad                          219 (0.2%)
+   John Rigby                             213 (0.2%)
+   Lucas Stach                            209 (0.2%)
+   Javier Martinez Canillas               209 (0.2%)
+   trem                                   207 (0.2%)
+   Bastian Ruppert                        205 (0.2%)
+   Chandan Nath                           182 (0.2%)
+   Łukasz Dałek                           159 (0.2%)
+   Andrew Sharp                           157 (0.2%)
+   Linus Walleij                          156 (0.2%)
+   Fabio Estevam                          154 (0.2%)
+   Tom Warren                             147 (0.1%)
+   Sughosh Ganu                           128 (0.1%)
+   Daniel Schwierzeck                     122 (0.1%)
+   Nikita Kiryanov                        109 (0.1%)
+   Steve Sakoman                          101 (0.1%)
+   Tetsuyuki Kobayashi                    97 (0.1%)
+   Laurence Withers                       97 (0.1%)
+   Holger Brunck                          94 (0.1%)
+   Ira W. Snyder                          93 (0.1%)
+   Heiko Schocher                         69 (0.1%)
+   Jason Jin                              68 (0.1%)
+   Hongtao Jia                            49 (0.0%)
+   Chander Kashyap                        48 (0.0%)
+   Mikhail Kshevetskiy                    39 (0.0%)
+   Ashok Kumar Reddy                      36 (0.0%)
+   Kumar Gala                             33 (0.0%)
+   Zhong Hongbo                           33 (0.0%)
+   Karl O. Pinc                           32 (0.0%)
+   Vikram Narayanan                       32 (0.0%)
+   Prabhakar Kushwaha                     30 (0.0%)
+   Michael Walle                          30 (0.0%)
+   Eric Nelson                            30 (0.0%)
+   Pavel Machek                           29 (0.0%)
+   Kaspter Ju                             29 (0.0%)
+   Kenth Eriksson                         27 (0.0%)
+   Jaehoon Chung                          26 (0.0%)
+   Igor Grinberg                          26 (0.0%)
+   Wolfgang Grandegger                    26 (0.0%)
+   Thierry Reding                         23 (0.0%)
+   Jens Scharsig                          22 (0.0%)
+   Albert ARIBAUD                         21 (0.0%)
+   Joakim Tjernlund                       19 (0.0%)
+   Andy Fleming                           18 (0.0%)
+   Stefan Kristiansson                    14 (0.0%)
+   Priyanka Jain                          14 (0.0%)
+   Rajashekhara, Sudhakar                 13 (0.0%)
+   Julius Baxter                          13 (0.0%)
+   Koen Kooi                              12 (0.0%)
+   Jim Shimer                             12 (0.0%)
+   Paul Gortmaker                         12 (0.0%)
+   Peter Meerwald                         11 (0.0%)
+   Xu, Hong                               10 (0.0%)
+   Simon Baatz                            7 (0.0%)
+   Satyanarayana, Sandhya                 7 (0.0%)
+   Stathis Voukelatos                     6 (0.0%)
+   Enric Balletbò i Serra                 6 (0.0%)
+   Jérôme Carretero                       6 (0.0%)
+   Horst Kronstorfer                      5 (0.0%)
+   Arnout Vandecappelle (Essensium/Mind)  5 (0.0%)
+   Vaibhav Bedia                          5 (0.0%)
+   Jeremy Andrus                          5 (0.0%)
+   Khem Raj                               5 (0.0%)
+   Dirk Eibach                            5 (0.0%)
+   Ramesh Chandrasekaran                  4 (0.0%)
+   Chan-Taek Park                         4 (0.0%)
+   Joel A Fernandes                       4 (0.0%)
+   Jagan Teki                             4 (0.0%)
+   Timo Ketola                            4 (0.0%)
+   Tyler Olmstead                         3 (0.0%)
+   Brian Rzycki                           2 (0.0%)
+   Matthieu CASTET                        2 (0.0%)
+   Jeroen Hofstee                         1 (0.0%)
+   Rommel Custodio                        1 (0.0%)
+   Iwo Mergler                            1 (0.0%)
+   Jongman Heo                            1 (0.0%)
+   Matej Frančeškin                       1 (0.0%)
+   Bernhard Walle                         1 (0.0%)
+   David du Colombier                     1 (0.0%)
+   Jayachandran Chandrasekharan Nair      1 (0.0%)
+   =====================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     2612 (7.2%)
+   Timur Tabi                        1845 (5.1%)
+   Rob Herring                       1394 (3.8%)
+   Mike Frysinger                    338 (0.9%)
+   Marek Vasut                       129 (0.4%)
+   Fabio Estevam                     90 (0.2%)
+   Matt Sealey                       53 (0.1%)
+   Linus Walleij                     45 (0.1%)
+   Kaspter Ju                        29 (0.1%)
+   Vikram Narayanan                  14 (0.0%)
+   Jim Shimer                        12 (0.0%)
+   Daniel Schwierzeck                4 (0.0%)
+   Joakim Tjernlund                  4 (0.0%)
+   Tom Warren                        3 (0.0%)
+   Igor Grinberg                     2 (0.0%)
+   Tyler Olmstead                    2 (0.0%)
+   Ashok Kumar Reddy                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 367)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andy Fleming                      70 (19.1%)
+   Tom Warren                        31 (8.4%)
+   Kyungmin Park                     28 (7.6%)
+   Andreas Bießmann                  27 (7.4%)
+   Minkyu Kang                       24 (6.5%)
+   Tom Rini                          21 (5.7%)
+   Scott Wood                        18 (4.9%)
+   Nobuhiro Iwamatsu                 15 (4.1%)
+   John Rigby                        10 (2.7%)
+   Mike Frysinger                    9 (2.5%)
+   Hadli, Manjunath                  9 (2.5%)
+   Alim Akhtar                       7 (1.9%)
+   Rajashekhara, Sudhakar            7 (1.9%)
+   Stefan Roese                      6 (1.6%)
+   Igor Grinberg                     4 (1.1%)
+   Kim Phillips                      4 (1.1%)
+   Hatim Ali                         4 (1.1%)
+   Doug Anderson                     4 (1.1%)
+   Ilya Yanok                        4 (1.1%)
+   York Sun                          4 (1.1%)
+   Abhilash Kesavan                  3 (0.8%)
+   Holger Brunck                     3 (0.8%)
+   Kumar Gala                        3 (0.8%)
+   Simon Glass                       3 (0.8%)
+   Hideyuki Sano                     3 (0.8%)
+   Michal Simek                      3 (0.8%)
+   Wolfgang Denk                     2 (0.5%)
+   Daniel Schwierzeck                2 (0.5%)
+   Jens Scharsig (BuS Elektronik)    2 (0.5%)
+   Che-Liang Chiou                   2 (0.5%)
+   Tom Wai-Hong Tam                  2 (0.5%)
+   Manjunatha C Achar                2 (0.5%)
+   Iqbal Shareef                     2 (0.5%)
+   Hakgoo Lee                        2 (0.5%)
+   Pavel Machek                      2 (0.5%)
+   Prabhakar Lad                     2 (0.5%)
+   Rob Herring                       1 (0.3%)
+   Jim Shimer                        1 (0.3%)
+   Chin Liang See                    1 (0.3%)
+   Jate Sujjavanich                  1 (0.3%)
+   Artem Bityutskiy                  1 (0.3%)
+   David Woodhouse                   1 (0.3%)
+   Prafulla Wadaskar                 1 (0.3%)
+   Lauri Hintsala                    1 (0.3%)
+   Radu Lazarescu                    1 (0.3%)
+   Ralf Baechle                      1 (0.3%)
+   Thomas Weber                      1 (0.3%)
+   Li Yang                           1 (0.3%)
+   Jerry Huang                       1 (0.3%)
+   Jiang Yutang                      1 (0.3%)
+   Satyanarayana, Sandhya            1 (0.3%)
+   Simon Baatz                       1 (0.3%)
+   Heiko Schocher                    1 (0.3%)
+   Jason Jin                         1 (0.3%)
+   Otavio Salvador                   1 (0.3%)
+   Chandan Nath                      1 (0.3%)
+   Anatolij Gustschin                1 (0.3%)
+   Gerlando Falauto                  1 (0.3%)
+   Mathieu J. Poirier                1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 15)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       14 (93.3%)
+   Matthew Gerlach                   1 (6.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 52)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Thierry Reding                    14 (26.9%)
+   Christian Riesch                  12 (23.1%)
+   Fabio Estevam                     3 (5.8%)
+   Michal Simek                      2 (3.8%)
+   Albert ARIBAUD                    2 (3.8%)
+   Sughosh Ganu                      2 (3.8%)
+   Stefano Babic                     2 (3.8%)
+   Allen Martin                      2 (3.8%)
+   Andreas Bießmann                  1 (1.9%)
+   Tom Rini                          1 (1.9%)
+   Wolfgang Denk                     1 (1.9%)
+   Jens Scharsig (BuS Elektronik)    1 (1.9%)
+   Matt Sealey                       1 (1.9%)
+   Wojciech Dubowik                  1 (1.9%)
+   Tim Fletcher                      1 (1.9%)
+   Matt Porter                       1 (1.9%)
+   Jeroen Hofstee                    1 (1.9%)
+   Jaehoon Chung                     1 (1.9%)
+   Javier Martinez Canillas          1 (1.9%)
+   Valentin Longchamp                1 (1.9%)
+   Luka Perkov                       1 (1.9%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 52)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Allen Martin                      14 (26.9%)
+   Prabhakar Lad                     7 (13.5%)
+   Mikhail Kshevetskiy               4 (7.7%)
+   Tom Rini                          3 (5.8%)
+   Luka Perkov                       3 (5.8%)
+   Stefano Babic                     2 (3.8%)
+   Marek Vasut                       2 (3.8%)
+   Rajashekhara, Sudhakar            2 (3.8%)
+   Stefan Roese                      2 (3.8%)
+   Anatolij Gustschin                2 (3.8%)
+   Zhong Hongbo                      2 (3.8%)
+   Stephan Linz                      2 (3.8%)
+   Albert ARIBAUD                    1 (1.9%)
+   Andreas Bießmann                  1 (1.9%)
+   Andy Fleming                      1 (1.9%)
+   Gerlando Falauto                  1 (1.9%)
+   Enric Balletbò i Serra            1 (1.9%)
+   Eric Nelson                       1 (1.9%)
+   Veli-Pekka Peltola                1 (1.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 9)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Albert ARIBAUD                    3 (33.3%)
+   Prabhakar Lad                     2 (22.2%)
+   Stefano Babic                     1 (11.1%)
+   Igor Grinberg                     1 (11.1%)
+   Rafael Beims                      1 (11.1%)
+   James Miller                      1 (11.1%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 9)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Nobuhiro Iwamatsu                 2 (22.2%)
+   Stephen Warren                    2 (22.2%)
+   Marek Vasut                       1 (11.1%)
+   Anatolij Gustschin                1 (11.1%)
+   Gerlando Falauto                  1 (11.1%)
+   Matthieu CASTET                   1 (11.1%)
+   Joe Hershberger                   1 (11.1%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         203 (21.9%)
+   DENX Software Engineering         95 (10.3%)
+   Freescale                         92 (9.9%)
+   ADVANSEE                          71 (7.7%)
+   Konsulko Group                    66 (7.1%)
+   Samsung                           49 (5.3%)
+   NVidia                            46 (5.0%)
+   Renesas Electronics               37 (4.0%)
+   Boundary Devices                  33 (3.6%)
+   Keymile                           32 (3.5%)
+   National Instruments              30 (3.2%)
+   Xilinx                            27 (2.9%)
+   O.S. Systems                      26 (2.8%)
+   Atmel                             19 (2.1%)
+   Texas Instruments                 17 (1.8%)
+   Google, Inc.                      14 (1.5%)
+   Linaro                            13 (1.4%)
+   Calxeda                           12 (1.3%)
+   Analog Devices                    10 (1.1%)
+   CompuLab                          8 (0.9%)
+   bct electronic GmbH               5 (0.5%)
+   OVRO                              4 (0.4%)
+   Transmode Systems                 4 (0.4%)
+   Sakoman Inc.                      3 (0.3%)
+   Bluegiga Technologies             2 (0.2%)
+   Nobuhiro Iwamatsu                 2 (0.2%)
+   Wind River                        1 (0.1%)
+   Guntermann & Drunck               1 (0.1%)
+   Motorola                          1 (0.1%)
+   RuggedCom                         1 (0.1%)
+   ST-Ericsson                       1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         32255 (32.1%)
+   DENX Software Engineering         13607 (13.5%)
+   Samsung                           13459 (13.4%)
+   Renesas Electronics               10389 (10.3%)
+   Freescale                         6846 (6.8%)
+   NVidia                            3482 (3.5%)
+   Linaro                            2597 (2.6%)
+   Atmel                             2053 (2.0%)
+   Konsulko Group                    2038 (2.0%)
+   Calxeda                           1962 (2.0%)
+   ADVANSEE                          1637 (1.6%)
+   Xilinx                            1546 (1.5%)
+   Texas Instruments                 1477 (1.5%)
+   Keymile                           1451 (1.4%)
+   Boundary Devices                  1178 (1.2%)
+   National Instruments              1083 (1.1%)
+   O.S. Systems                      1071 (1.1%)
+   Bluegiga Technologies             620 (0.6%)
+   Google, Inc.                      465 (0.5%)
+   Analog Devices                    451 (0.4%)
+   RuggedCom                         415 (0.4%)
+   CompuLab                          135 (0.1%)
+   Sakoman Inc.                      101 (0.1%)
+   OVRO                              93 (0.1%)
+   Nobuhiro Iwamatsu                 66 (0.1%)
+   Transmode Systems                 46 (0.0%)
+   Wind River                        12 (0.0%)
+   Motorola                          12 (0.0%)
+   bct electronic GmbH               11 (0.0%)
+   Guntermann & Drunck               5 (0.0%)
+   ST-Ericsson                       4 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 367)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         104 (28.3%)
+   Samsung                           72 (19.6%)
+   (Unknown)                         42 (11.4%)
+   Texas Instruments                 41 (11.2%)
+   NVidia                            31 (8.4%)
+   Nobuhiro Iwamatsu                 14 (3.8%)
+   DENX Software Engineering         11 (3.0%)
+   Linaro                            11 (3.0%)
+   Google, Inc.                      11 (3.0%)
+   Analog Devices                    9 (2.5%)
+   Renesas Electronics               4 (1.1%)
+   Keymile                           4 (1.1%)
+   CompuLab                          4 (1.1%)
+   BuS Elektronik                    2 (0.5%)
+   Intel                             2 (0.5%)
+   Calxeda                           1 (0.3%)
+   O.S. Systems                      1 (0.3%)
+   Bluegiga Technologies             1 (0.3%)
+   Motorola                          1 (0.3%)
+   Marvell                           1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 136)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         59 (43.4%)
+   Freescale                         15 (11.0%)
+   Texas Instruments                 8 (5.9%)
+   DENX Software Engineering         8 (5.9%)
+   Samsung                           5 (3.7%)
+   NVidia                            4 (2.9%)
+   Linaro                            4 (2.9%)
+   Renesas Electronics               3 (2.2%)
+   Keymile                           3 (2.2%)
+   Atmel                             3 (2.2%)
+   CompuLab                          2 (1.5%)
+   Boundary Devices                  2 (1.5%)
+   Transmode Systems                 2 (1.5%)
+   Nobuhiro Iwamatsu                 1 (0.7%)
+   Google, Inc.                      1 (0.7%)
+   Analog Devices                    1 (0.7%)
+   Calxeda                           1 (0.7%)
+   O.S. Systems                      1 (0.7%)
+   Bluegiga Technologies             1 (0.7%)
+   Motorola                          1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   ADVANSEE                          1 (0.7%)
+   Xilinx                            1 (0.7%)
+   National Instruments              1 (0.7%)
+   RuggedCom                         1 (0.7%)
+   Sakoman Inc.                      1 (0.7%)
+   OVRO                              1 (0.7%)
+   Wind River                        1 (0.7%)
+   bct electronic GmbH               1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   ST-Ericsson                       1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2013.01.rst b/doc/develop/statistics/u-boot-stats-v2013.01.rst
new file mode 100644
index 00000000000..5eaa578f4db
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2013.01.rst
@@ -0,0 +1,664 @@
+:orphan:
+
+Release Statistics for U-Boot v2013.01
+======================================
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       132 (11.3%)
+   Simon Glass                       93 (7.9%)
+   Fabio Estevam                     58 (4.9%)
+   Benoît Thébaudeau                 50 (4.3%)
+   Joe Hershberger                   42 (3.6%)
+   Stephen Warren                    42 (3.6%)
+   Rajeshwari Shinde                 39 (3.3%)
+   Łukasz Majewski                   39 (3.3%)
+   Gabe Black                        36 (3.1%)
+   York Sun                          31 (2.6%)
+   Kim Phillips                      30 (2.6%)
+   Tom Rini                          28 (2.4%)
+   Scott Wood                        24 (2.0%)
+   Stefan Reinauer                   20 (1.7%)
+   Ilya Yanok                        19 (1.6%)
+   Stefan Roese                      18 (1.5%)
+   Piotr Wilczek                     18 (1.5%)
+   Stefano Babic                     15 (1.3%)
+   Lucas Stach                       15 (1.3%)
+   Eric Nelson                       15 (1.3%)
+   Otavio Salvador                   13 (1.1%)
+   Vadim Bendebury                   13 (1.1%)
+   Troy Kisky                        12 (1.0%)
+   Allen Martin                      11 (0.9%)
+   Pavel Herrmann                    11 (0.9%)
+   Łukasz Dałek                      10 (0.9%)
+   Albert ARIBAUD                    10 (0.9%)
+   Tetsuyuki Kobayashi               10 (0.9%)
+   Daniel Schwierzeck                9 (0.8%)
+   Timur Tabi                        9 (0.8%)
+   Ajay Kumar                        8 (0.7%)
+   Taylor Hutt                       8 (0.7%)
+   Hatim RV                          8 (0.7%)
+   Robert P. J. Day                  8 (0.7%)
+   Nikita Kiryanov                   7 (0.6%)
+   Peter Korsgaard                   7 (0.6%)
+   Wolfgang Denk                     6 (0.5%)
+   Jaehoon Chung                     6 (0.5%)
+   Tom Wai-Hong Tam                  6 (0.5%)
+   Andreas Bießmann                  6 (0.5%)
+   Michal Simek                      6 (0.5%)
+   Zhi-zhou Zhang                    6 (0.5%)
+   Gerlando Falauto                  6 (0.5%)
+   Minkyu Kang                       5 (0.4%)
+   Ashok                             5 (0.4%)
+   Chander Kashyap                   5 (0.4%)
+   Armando Visconti                  5 (0.4%)
+   Duncan Laurie                     5 (0.4%)
+   Graeme Russ                       5 (0.4%)
+   Andrew Bradford                   5 (0.4%)
+   Jens Scharsig (BuS Elektronik)    4 (0.3%)
+   Yoshihiro Shimoda                 4 (0.3%)
+   Nobuhiro Iwamatsu                 4 (0.3%)
+   Richard Genoud                    4 (0.3%)
+   Andy Fleming                      4 (0.3%)
+   Wu, Josh                          4 (0.3%)
+   Vikram Narayanan                  4 (0.3%)
+   Pali Rohár                        4 (0.3%)
+   Jason Jin                         4 (0.3%)
+   Alison Wang                       4 (0.3%)
+   Bo Shen                           3 (0.3%)
+   Javier Martinez Canillas          3 (0.3%)
+   Holger Brunck                     3 (0.3%)
+   Shawn Guo                         3 (0.3%)
+   Prabhakar Kushwaha                3 (0.3%)
+   Mike Frysinger                    3 (0.3%)
+   Pantelis Antoniou                 3 (0.3%)
+   Vincent Palatin                   3 (0.3%)
+   Vincent Stehlé                    3 (0.3%)
+   Zang Roy-R61911                   3 (0.3%)
+   Marc Jones                        3 (0.3%)
+   Hung-Te Lin                       3 (0.3%)
+   Igor Grinberg                     2 (0.2%)
+   angelo                            2 (0.2%)
+   Eric Benard                       2 (0.2%)
+   Yegor Yefremov                    2 (0.2%)
+   Mansoor Ahamed                    2 (0.2%)
+   Luka Perkov                       2 (0.2%)
+   Che-Liang Chiou                   2 (0.2%)
+   Bill Richardson                   2 (0.2%)
+   Matthias Fuchs                    2 (0.2%)
+   Shaohui Xie                       2 (0.2%)
+   Gerald Van Baren                  2 (0.2%)
+   Tom Warren                        2 (0.2%)
+   Abhilash Kesavan                  2 (0.2%)
+   Thomas Chou                       2 (0.2%)
+   Walter Murphy                     2 (0.2%)
+   Liu Gang                          2 (0.2%)
+   Haiying Wang                      2 (0.2%)
+   Shengzhou Liu                     2 (0.2%)
+   Laurentiu Tudor                   2 (0.2%)
+   Minghuan Lian                     2 (0.2%)
+   Thierry Reding                    2 (0.2%)
+   Peter Meerwald                    1 (0.1%)
+   Nishanth Menon                    1 (0.1%)
+   Doug Anderson                     1 (0.1%)
+   Arun Mankuzhi                     1 (0.1%)
+   Luke Lowrey                       1 (0.1%)
+   Michael Walle                     1 (0.1%)
+   Valentin Longchamp                1 (0.1%)
+   Vivek Gautam                      1 (0.1%)
+   James Miller                      1 (0.1%)
+   Milind Choudhary                  1 (0.1%)
+   Vipin Kumar                       1 (0.1%)
+   trem                              1 (0.1%)
+   Ruchika Gupta                     1 (0.1%)
+   Chang Hyun Park                   1 (0.1%)
+   Wolfram Sang                      1 (0.1%)
+   Luigi Semenzato                   1 (0.1%)
+   Sean Paul                         1 (0.1%)
+   Kenneth Waters                    1 (0.1%)
+   Anton Staaf                       1 (0.1%)
+   Lars Rasmusson                    1 (0.1%)
+   Thomas Weber                      1 (0.1%)
+   Davide Bonfanti                   1 (0.1%)
+   ajoy                              1 (0.1%)
+   Lokesh Vutla                      1 (0.1%)
+   Peter Barada                      1 (0.1%)
+   Joshua Housh                      1 (0.1%)
+   Jerry Huang                       1 (0.1%)
+   Yuanquan Chen                     1 (0.1%)
+   Mela Custodio                     1 (0.1%)
+   Karl O. Pinc                      1 (0.1%)
+   José Miguel Gonçalves             1 (0.1%)
+   Jeroen Hofstee                    1 (0.1%)
+   Mayuresh Kulkarni                 1 (0.1%)
+   Wei Ni                            1 (0.1%)
+   Dirk Behme                        1 (0.1%)
+   Anatolij Gustschin                1 (0.1%)
+   Alejandro Mery                    1 (0.1%)
+   Liu Ying                          1 (0.1%)
+   Koen Kooi                         1 (0.1%)
+   Raphael Assenat                   1 (0.1%)
+   Stephan Gatzka                    1 (0.1%)
+   Marc Dietrich                     1 (0.1%)
+   Yann Vernier                      1 (0.1%)
+   Annamalai Lakshmanan              1 (0.1%)
+   Tushar Behera                     1 (0.1%)
+   Vaibhav Hiremath                  1 (0.1%)
+   Joel A Fernandes                  1 (0.1%)
+   Pankaj Bharadiya                  1 (0.1%)
+   Mingkai Hu                        1 (0.1%)
+   Kumar Gala                        1 (0.1%)
+   Shaveta Leekha                    1 (0.1%)
+   ramneek mehresh                   1 (0.1%)
+   Mark Marshall                     1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Louis Yung-Chieh Lo               1 (0.1%)
+   Philippe De Muyter                1 (0.1%)
+   Jagan Teki                        1 (0.1%)
+   Paul Gortmaker                    1 (0.1%)
+   David Gibson                      1 (0.1%)
+   Matthias Weisser                  1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       17893 (14.3%)
+   Ilya Yanok                        14706 (11.8%)
+   Wolfgang Denk                     11127 (8.9%)
+   Stefan Roese                      10284 (8.2%)
+   York Sun                          5190 (4.2%)
+   Albert ARIBAUD                    4314 (3.5%)
+   Rajeshwari Shinde                 3971 (3.2%)
+   Simon Glass                       3225 (2.6%)
+   Joe Hershberger                   3038 (2.4%)
+   Alison Wang                       2966 (2.4%)
+   Łukasz Dałek                      2660 (2.1%)
+   Pali Rohár                        2623 (2.1%)
+   Łukasz Majewski                   2406 (1.9%)
+   Tom Rini                          2280 (1.8%)
+   Benoît Thébaudeau                 2037 (1.6%)
+   Fabio Estevam                     1919 (1.5%)
+   Eric Nelson                       1849 (1.5%)
+   Gabe Black                        1758 (1.4%)
+   Paul Gortmaker                    1539 (1.2%)
+   Piotr Wilczek                     1527 (1.2%)
+   Yoshihiro Shimoda                 1480 (1.2%)
+   Timur Tabi                        1456 (1.2%)
+   Stefano Babic                     1310 (1.0%)
+   Kim Phillips                      1284 (1.0%)
+   Scott Wood                        1186 (0.9%)
+   Zhi-zhou Zhang                    1146 (0.9%)
+   Wei Ni                            1109 (0.9%)
+   Lucas Stach                       1066 (0.9%)
+   Stephen Warren                    1038 (0.8%)
+   Graeme Russ                       993 (0.8%)
+   Peter Korsgaard                   868 (0.7%)
+   Jaehoon Chung                     787 (0.6%)
+   Tom Wai-Hong Tam                  784 (0.6%)
+   Jens Scharsig (BuS Elektronik)    779 (0.6%)
+   Tom Warren                        779 (0.6%)
+   Mansoor Ahamed                    713 (0.6%)
+   Pavel Herrmann                    689 (0.6%)
+   Zang Roy-R61911                   679 (0.5%)
+   Stefan Reinauer                   607 (0.5%)
+   Raphael Assenat                   594 (0.5%)
+   Vadim Bendebury                   588 (0.5%)
+   Chander Kashyap                   567 (0.5%)
+   Bill Richardson                   503 (0.4%)
+   Gerlando Falauto                  461 (0.4%)
+   Troy Kisky                        439 (0.4%)
+   Hatim RV                          364 (0.3%)
+   Shaveta Leekha                    262 (0.2%)
+   Hung-Te Lin                       227 (0.2%)
+   Otavio Salvador                   224 (0.2%)
+   Daniel Schwierzeck                220 (0.2%)
+   Vikram Narayanan                  210 (0.2%)
+   Liu Gang                          209 (0.2%)
+   Andrew Bradford                   179 (0.1%)
+   David Gibson                      170 (0.1%)
+   Allen Martin                      169 (0.1%)
+   Andy Fleming                      159 (0.1%)
+   Nikita Kiryanov                   155 (0.1%)
+   Ajay Kumar                        146 (0.1%)
+   Minghuan Lian                     138 (0.1%)
+   Tetsuyuki Kobayashi               129 (0.1%)
+   Peter Barada                      122 (0.1%)
+   Marc Jones                        120 (0.1%)
+   Chang Hyun Park                   114 (0.1%)
+   Armando Visconti                  110 (0.1%)
+   Annamalai Lakshmanan              110 (0.1%)
+   Gerald Van Baren                  100 (0.1%)
+   Minkyu Kang                       87 (0.1%)
+   Shawn Guo                         87 (0.1%)
+   Luigi Semenzato                   87 (0.1%)
+   Kenneth Waters                    84 (0.1%)
+   Prabhakar Kushwaha                75 (0.1%)
+   Taylor Hutt                       71 (0.1%)
+   Wu, Josh                          71 (0.1%)
+   Jason Jin                         62 (0.0%)
+   Doug Anderson                     62 (0.0%)
+   Laurentiu Tudor                   60 (0.0%)
+   Anton Staaf                       59 (0.0%)
+   Holger Brunck                     56 (0.0%)
+   Abhilash Kesavan                  53 (0.0%)
+   Michal Simek                      51 (0.0%)
+   Richard Genoud                    51 (0.0%)
+   Louis Yung-Chieh Lo               51 (0.0%)
+   Ashok                             48 (0.0%)
+   ajoy                              45 (0.0%)
+   Vaibhav Hiremath                  45 (0.0%)
+   Thomas Chou                       44 (0.0%)
+   Che-Liang Chiou                   43 (0.0%)
+   James Miller                      39 (0.0%)
+   Andreas Bießmann                  38 (0.0%)
+   Vincent Stehlé                    38 (0.0%)
+   Sean Paul                         36 (0.0%)
+   Lokesh Vutla                      36 (0.0%)
+   ramneek mehresh                   34 (0.0%)
+   Bo Shen                           31 (0.0%)
+   Matthias Fuchs                    30 (0.0%)
+   Mike Frysinger                    29 (0.0%)
+   Vipin Kumar                       28 (0.0%)
+   angelo                            27 (0.0%)
+   Haiying Wang                      27 (0.0%)
+   Duncan Laurie                     26 (0.0%)
+   Yuanquan Chen                     26 (0.0%)
+   Marc Dietrich                     25 (0.0%)
+   Robert P. J. Day                  24 (0.0%)
+   Vincent Palatin                   20 (0.0%)
+   Vivek Gautam                      19 (0.0%)
+   Walter Murphy                     18 (0.0%)
+   Shengzhou Liu                     18 (0.0%)
+   Milind Choudhary                  15 (0.0%)
+   Kumar Gala                        15 (0.0%)
+   Nobuhiro Iwamatsu                 14 (0.0%)
+   Javier Martinez Canillas          14 (0.0%)
+   Valentin Longchamp                14 (0.0%)
+   Pantelis Antoniou                 13 (0.0%)
+   Igor Grinberg                     13 (0.0%)
+   Luka Perkov                       11 (0.0%)
+   trem                              11 (0.0%)
+   Ruchika Gupta                     11 (0.0%)
+   Thomas Weber                      11 (0.0%)
+   Mayuresh Kulkarni                 11 (0.0%)
+   Thierry Reding                    10 (0.0%)
+   Jeroen Hofstee                    10 (0.0%)
+   Liu Ying                          10 (0.0%)
+   Pankaj Bharadiya                  10 (0.0%)
+   Matthias Weisser                  10 (0.0%)
+   Anatolij Gustschin                8 (0.0%)
+   Joel A Fernandes                  7 (0.0%)
+   Eric Benard                       6 (0.0%)
+   Yegor Yefremov                    6 (0.0%)
+   Shaohui Xie                       6 (0.0%)
+   José Miguel Gonçalves             6 (0.0%)
+   Koen Kooi                         6 (0.0%)
+   Tushar Behera                     6 (0.0%)
+   Arun Mankuzhi                     4 (0.0%)
+   Michael Walle                     4 (0.0%)
+   Mela Custodio                     4 (0.0%)
+   Mark Marshall                     4 (0.0%)
+   Chris Packham                     4 (0.0%)
+   Wolfram Sang                      3 (0.0%)
+   Alejandro Mery                    3 (0.0%)
+   Yann Vernier                      3 (0.0%)
+   Jagan Teki                        3 (0.0%)
+   Peter Meerwald                    2 (0.0%)
+   Joshua Housh                      2 (0.0%)
+   Dirk Behme                        2 (0.0%)
+   Stephan Gatzka                    2 (0.0%)
+   Philippe De Muyter                2 (0.0%)
+   Nishanth Menon                    1 (0.0%)
+   Luke Lowrey                       1 (0.0%)
+   Lars Rasmusson                    1 (0.0%)
+   Davide Bonfanti                   1 (0.0%)
+   Jerry Huang                       1 (0.0%)
+   Karl O. Pinc                      1 (0.0%)
+   Mingkai Hu                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     11086 (22.1%)
+   Stefan Roese                      7902 (15.8%)
+   Albert ARIBAUD                    2113 (4.2%)
+   Tom Rini                          1714 (3.4%)
+   Paul Gortmaker                    1539 (3.1%)
+   Marek Vasut                       624 (1.2%)
+   Jens Scharsig (BuS Elektronik)    623 (1.2%)
+   Holger Brunck                     45 (0.1%)
+   Thomas Chou                       40 (0.1%)
+   Jason Jin                         37 (0.1%)
+   Chang Hyun Park                   26 (0.1%)
+   Mike Frysinger                    15 (0.0%)
+   Valentin Longchamp                14 (0.0%)
+   Michal Simek                      12 (0.0%)
+   Igor Grinberg                     12 (0.0%)
+   Andreas Bießmann                  11 (0.0%)
+   trem                              11 (0.0%)
+   Thomas Weber                      11 (0.0%)
+   Jeroen Hofstee                    10 (0.0%)
+   Allen Martin                      7 (0.0%)
+   Nobuhiro Iwamatsu                 7 (0.0%)
+   Anatolij Gustschin                7 (0.0%)
+   Minkyu Kang                       6 (0.0%)
+   Kim Phillips                      5 (0.0%)
+   Mark Marshall                     3 (0.0%)
+   Peter Barada                      2 (0.0%)
+   Shaohui Xie                       2 (0.0%)
+   Michael Walle                     1 (0.0%)
+   Dirk Behme                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 571)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       124 (21.7%)
+   Andy Fleming                      83 (14.5%)
+   Minkyu Kang                       81 (14.2%)
+   kyungmin Park                     64 (11.2%)
+   Tom Warren                        51 (8.9%)
+   Tom Rini                          41 (7.2%)
+   Anatolij Gustschin                9 (1.6%)
+   Andreas Bießmann                  7 (1.2%)
+   Stefan Reinauer                   7 (1.2%)
+   Kim Phillips                      6 (1.1%)
+   Rajeshwari Shinde                 6 (1.1%)
+   R. Chandrasekar                   5 (0.9%)
+   Daniel Schwierzeck                5 (0.9%)
+   Prabhakar Kushwaha                5 (0.9%)
+   Stefan Roese                      4 (0.7%)
+   Igor Grinberg                     4 (0.7%)
+   Nobuhiro Iwamatsu                 4 (0.7%)
+   Zang Roy-R61911                   4 (0.7%)
+   Gabe Black                        4 (0.7%)
+   Shengzhou Liu                     3 (0.5%)
+   Kumar Gala                        3 (0.5%)
+   Vivek Gautam                      3 (0.5%)
+   Taylor Hutt                       3 (0.5%)
+   Scott Wood                        3 (0.5%)
+   Vadim Bendebury                   3 (0.5%)
+   Jason Jin                         2 (0.4%)
+   TsiChung Liew                     2 (0.4%)
+   Vincent Palatin                   2 (0.4%)
+   Che-Liang Chiou                   2 (0.4%)
+   David Gibson                      2 (0.4%)
+   Hatim RV                          2 (0.4%)
+   Chander Kashyap                   2 (0.4%)
+   Łukasz Majewski                   2 (0.4%)
+   Ilya Yanok                        2 (0.4%)
+   Valentin Longchamp                1 (0.2%)
+   Shaohui Xie                       1 (0.2%)
+   Hemant Nautiyal                   1 (0.2%)
+   Vakul Garg                        1 (0.2%)
+   Vic Yang                          1 (0.2%)
+   Padmavathi Venna                  1 (0.2%)
+   Giridhar Maruthy                  1 (0.2%)
+   Inderpal Singh                    1 (0.2%)
+   Sandeep Singh                     1 (0.2%)
+   Poonam Aggrwal                    1 (0.2%)
+   Tushar Behera                     1 (0.2%)
+   Mayuresh Kulkarni                 1 (0.2%)
+   Sean Paul                         1 (0.2%)
+   James Miller                      1 (0.2%)
+   Doug Anderson                     1 (0.2%)
+   Troy Kisky                        1 (0.2%)
+   Piotr Wilczek                     1 (0.2%)
+   Tom Wai-Hong Tam                  1 (0.2%)
+   Jaehoon Chung                     1 (0.2%)
+   Stefano Babic                     1 (0.2%)
+   Timur Tabi                        1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 23)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Benoît Thébaudeau                 9 (39.1%)
+   Marek Vasut                       6 (26.1%)
+   Tom Rini                          2 (8.7%)
+   Kim Phillips                      2 (8.7%)
+   Łukasz Majewski                   2 (8.7%)
+   Doug Anderson                     1 (4.3%)
+   Stephen Warren                    1 (4.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 44)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       16 (36.4%)
+   Stephen Warren                    8 (18.2%)
+   Holger Brunck                     4 (9.1%)
+   Stefano Babic                     3 (6.8%)
+   Marek Vasut                       1 (2.3%)
+   Łukasz Majewski                   1 (2.3%)
+   Andy Fleming                      1 (2.3%)
+   Andreas Bießmann                  1 (2.3%)
+   Stefan Reinauer                   1 (2.3%)
+   Stefan Roese                      1 (2.3%)
+   Piotr Wilczek                     1 (2.3%)
+   Jaehoon Chung                     1 (2.3%)
+   Jens Scharsig (BuS Elektronik)    1 (2.3%)
+   Alex Xol                          1 (2.3%)
+   Lucas Stach                       1 (2.3%)
+   Fabio Estevam                     1 (2.3%)
+   Joe Hershberger                   1 (2.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 44)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Allen Martin                      12 (27.3%)
+   Stephen Warren                    10 (22.7%)
+   Stefan Roese                      4 (9.1%)
+   Andy Fleming                      3 (6.8%)
+   Simon Glass                       2 (4.5%)
+   Joe Hershberger                   2 (4.5%)
+   Benoît Thébaudeau                 2 (4.5%)
+   Marek Vasut                       1 (2.3%)
+   Łukasz Majewski                   1 (2.3%)
+   Andreas Bießmann                  1 (2.3%)
+   Stefan Reinauer                   1 (2.3%)
+   Fabio Estevam                     1 (2.3%)
+   Minkyu Kang                       1 (2.3%)
+   Joshua Housh                      1 (2.3%)
+   angelo                            1 (2.3%)
+   Otavio Salvador                   1 (2.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Benoît Thébaudeau                 1 (20.0%)
+   Dirk Behme                        1 (20.0%)
+   Luka Perkov                       1 (20.0%)
+   Robert Nelson                     1 (20.0%)
+   Henrik Nordström                  1 (20.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Fabio Estevam                     2 (40.0%)
+   Stephen Warren                    1 (20.0%)
+   Joe Hershberger                   1 (20.0%)
+   Anatolij Gustschin                1 (20.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         191 (16.3%)
+   Google, Inc.                      190 (16.2%)
+   Freescale                         189 (16.1%)
+   DENX Software Engineering         172 (14.7%)
+   Samsung                           127 (10.8%)
+   NVidia                            57 (4.9%)
+   ADVANSEE                          50 (4.3%)
+   National Instruments              42 (3.6%)
+   Konsulko Group                    28 (2.4%)
+   Boundary Devices                  27 (2.3%)
+   O.S. Systems                      13 (1.1%)
+   Keymile                           10 (0.9%)
+   Linaro                            10 (0.9%)
+   Texas Instruments                 10 (0.9%)
+   CompuLab                          9 (0.8%)
+   Atmel                             7 (0.6%)
+   Renesas Electronics               7 (0.6%)
+   ST Microelectronics               6 (0.5%)
+   Xilinx                            6 (0.5%)
+   Graeme Russ                       5 (0.4%)
+   BuS Elektronik                    4 (0.3%)
+   Analog Devices                    3 (0.3%)
+   ESD Electronics                   2 (0.2%)
+   8D Technologies                   1 (0.1%)
+   bct electronic GmbH               1 (0.1%)
+   Calxeda                           1 (0.1%)
+   Wind River                        1 (0.1%)
+   Bosch                             1 (0.1%)
+   Macq Electronique                 1 (0.1%)
+   Pengutronix                       1 (0.1%)
+   Nobuhiro Iwamatsu                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         40622 (32.5%)
+   (Unknown)                         30103 (24.1%)
+   Freescale                         15783 (12.6%)
+   Samsung                           9364 (7.5%)
+   Google, Inc.                      8094 (6.5%)
+   NVidia                            3106 (2.5%)
+   National Instruments              3038 (2.4%)
+   Boundary Devices                  2288 (1.8%)
+   Konsulko Group                    2280 (1.8%)
+   ADVANSEE                          2037 (1.6%)
+   Wind River                        1539 (1.2%)
+   Renesas Electronics               1484 (1.2%)
+   Graeme Russ                       993 (0.8%)
+   Texas Instruments                 850 (0.7%)
+   BuS Elektronik                    779 (0.6%)
+   Linaro                            770 (0.6%)
+   8D Technologies                   594 (0.5%)
+   Keymile                           531 (0.4%)
+   O.S. Systems                      224 (0.2%)
+   CompuLab                          168 (0.1%)
+   ST Microelectronics               138 (0.1%)
+   Atmel                             102 (0.1%)
+   Xilinx                            51 (0.0%)
+   ESD Electronics                   30 (0.0%)
+   Analog Devices                    29 (0.0%)
+   Nobuhiro Iwamatsu                 10 (0.0%)
+   Pengutronix                       3 (0.0%)
+   bct electronic GmbH               2 (0.0%)
+   Calxeda                           2 (0.0%)
+   Bosch                             2 (0.0%)
+   Macq Electronique                 2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 571)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Samsung                           166 (29.1%)
+   Google, Inc.                      145 (25.4%)
+   Freescale                         115 (20.1%)
+   NVidia                            52 (9.1%)
+   Texas Instruments                 41 (7.2%)
+   (Unknown)                         23 (4.0%)
+   DENX Software Engineering         14 (2.5%)
+   Linaro                            5 (0.9%)
+   CompuLab                          4 (0.7%)
+   Nobuhiro Iwamatsu                 4 (0.7%)
+   Boundary Devices                  1 (0.2%)
+   Keymile                           1 (0.2%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 154)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         54 (35.1%)
+   Freescale                         23 (14.9%)
+   Google, Inc.                      16 (10.4%)
+   Samsung                           10 (6.5%)
+   Texas Instruments                 7 (4.5%)
+   NVidia                            5 (3.2%)
+   DENX Software Engineering         5 (3.2%)
+   Linaro                            4 (2.6%)
+   Keymile                           3 (1.9%)
+   CompuLab                          2 (1.3%)
+   Boundary Devices                  2 (1.3%)
+   Renesas Electronics               2 (1.3%)
+   ST Microelectronics               2 (1.3%)
+   Atmel                             2 (1.3%)
+   Nobuhiro Iwamatsu                 1 (0.6%)
+   National Instruments              1 (0.6%)
+   Konsulko Group                    1 (0.6%)
+   ADVANSEE                          1 (0.6%)
+   Wind River                        1 (0.6%)
+   Graeme Russ                       1 (0.6%)
+   BuS Elektronik                    1 (0.6%)
+   8D Technologies                   1 (0.6%)
+   O.S. Systems                      1 (0.6%)
+   Xilinx                            1 (0.6%)
+   ESD Electronics                   1 (0.6%)
+   Analog Devices                    1 (0.6%)
+   Pengutronix                       1 (0.6%)
+   bct electronic GmbH               1 (0.6%)
+   Calxeda                           1 (0.6%)
+   Bosch                             1 (0.6%)
+   Macq Electronique                 1 (0.6%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2013.04.rst b/doc/develop/statistics/u-boot-stats-v2013.04.rst
new file mode 100644
index 00000000000..fd31bd87670
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2013.04.rst
@@ -0,0 +1,622 @@
+:orphan:
+
+Release Statistics for U-Boot v2013.04
+======================================
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       179 (18.3%)
+   Tom Warren                        57 (5.8%)
+   Tom Rini                          39 (4.0%)
+   Benoît Thébaudeau                 35 (3.6%)
+   Otavio Salvador                   30 (3.1%)
+   Allen Martin                      29 (3.0%)
+   Gabor Juhos                       29 (3.0%)
+   Fabio Estevam                     26 (2.7%)
+   Stephen Warren                    25 (2.6%)
+   Marek Vasut                       23 (2.3%)
+   Holger Brunck                     17 (1.7%)
+   Akshay Saraswat                   16 (1.6%)
+   Nikita Kiryanov                   15 (1.5%)
+   Lokesh Vutla                      14 (1.4%)
+   Rajeshwari Shinde                 14 (1.4%)
+   Ajay Kumar                        13 (1.3%)
+   Daniel Schwierzeck                13 (1.3%)
+   Joe Hershberger                   12 (1.2%)
+   Doug Anderson                     12 (1.2%)
+   R Sricharan                       12 (1.2%)
+   Albert ARIBAUD                    11 (1.1%)
+   Eric Nelson                       11 (1.1%)
+   Anatolij Gustschin                11 (1.1%)
+   Jeroen Hofstee                    11 (1.1%)
+   Matt Porter                       10 (1.0%)
+   Michal Simek                      10 (1.0%)
+   Troy Kisky                        10 (1.0%)
+   Andreas Bießmann                  9 (0.9%)
+   Jon Hunter                        9 (0.9%)
+   Pantelis Antoniou                 9 (0.9%)
+   Enric Balletbo i Serra            9 (0.9%)
+   Lucas Stach                       9 (0.9%)
+   Prabhakar Kushwaha                8 (0.8%)
+   Thierry Reding                    7 (0.7%)
+   Stefan Roese                      7 (0.7%)
+   York Sun                          7 (0.7%)
+   Łukasz Majewski                   7 (0.7%)
+   Jagan Teki                        7 (0.7%)
+   Kim Phillips                      7 (0.7%)
+   Robert P. J. Day                  6 (0.6%)
+   Vivek Gautam                      5 (0.5%)
+   Javier Martinez Canillas          5 (0.5%)
+   Lars Poeschel                     5 (0.5%)
+   Wolfgang Denk                     5 (0.5%)
+   Sonic Zhang                       5 (0.5%)
+   Bob Liu                           5 (0.5%)
+   Scott Wood                        5 (0.5%)
+   James Yang                        5 (0.5%)
+   Marc Dietrich                     4 (0.4%)
+   Padmavathi Venna                  4 (0.4%)
+   Vincent Palatin                   4 (0.4%)
+   Stefano Babic                     4 (0.4%)
+   Ilya Yanok                        4 (0.4%)
+   Vadim Bendebury                   3 (0.3%)
+   Tetsuyuki Kobayashi               3 (0.3%)
+   Koen Kooi                         3 (0.3%)
+   Rob Herring                       3 (0.3%)
+   Gabe Black                        3 (0.3%)
+   Pali Rohár                        3 (0.3%)
+   Mark Jackson                      3 (0.3%)
+   Piotr Wilczek                     3 (0.3%)
+   Bo Shen                           3 (0.3%)
+   Holger Hans Peter Freyther        3 (0.3%)
+   Chase Maupin                      3 (0.3%)
+   Michael Jones                     3 (0.3%)
+   Richard Genoud                    3 (0.3%)
+   Shaveta Leekha                    3 (0.3%)
+   Jaehoon Chung                     2 (0.2%)
+   Che-liang Chiou                   2 (0.2%)
+   Taylor Hutt                       2 (0.2%)
+   Linus Walleij                     2 (0.2%)
+   Manfred Huber                     2 (0.2%)
+   Lubomir Popov                     2 (0.2%)
+   Peter Korsgaard                   2 (0.2%)
+   Bin Liu                           2 (0.2%)
+   Jagannadha Sutradharudu Teki      2 (0.2%)
+   Vincent Stehlé                    2 (0.2%)
+   Vaibhav Hiremath                  2 (0.2%)
+   Knut Wohlrab                      2 (0.2%)
+   Vipin Kumar                       2 (0.2%)
+   Nicolas Ferre                     2 (0.2%)
+   Fadil Berisha                     2 (0.2%)
+   Phil Sutter                       2 (0.2%)
+   Robert Nelson                     2 (0.2%)
+   Tomas Novotny                     2 (0.2%)
+   Andreas Huber                     2 (0.2%)
+   Karlheinz Jerg                    2 (0.2%)
+   Alexey Brodkin                    2 (0.2%)
+   Poonam Aggrwal                    2 (0.2%)
+   Valentin Longchamp                2 (0.2%)
+   Hongtao Jia                       2 (0.2%)
+   Maxime Larocque                   1 (0.1%)
+   Minkyu Kang                       1 (0.1%)
+   Andre Przywara                    1 (0.1%)
+   Andrew Gabbasov                   1 (0.1%)
+   Rong Chang                        1 (0.1%)
+   Gerlando Falauto                  1 (0.1%)
+   Mats Kärrman                      1 (0.1%)
+   ramneek mehresh                   1 (0.1%)
+   Mingkai Hu                        1 (0.1%)
+   Nishanth Menon                    1 (0.1%)
+   Josh Wu                           1 (0.1%)
+   Dirk Behme                        1 (0.1%)
+   Alexandre Pereira da Silva        1 (0.1%)
+   Abbas Raza                        1 (0.1%)
+   Aaron Williams                    1 (0.1%)
+   Przemyslaw Marczak                1 (0.1%)
+   Veli-Pekka Peltola                1 (0.1%)
+   Steven Stallion                   1 (0.1%)
+   Steve Kipisz                      1 (0.1%)
+   Matthias Weisser                  1 (0.1%)
+   Andre Renaud                      1 (0.1%)
+   Michael Spang                     1 (0.1%)
+   Patrick Georgi                    1 (0.1%)
+   Shiraz Hashim                     1 (0.1%)
+   Barak Wasserstrom                 1 (0.1%)
+   Jesse Gilles                      1 (0.1%)
+   Lubomir Rintel                    1 (0.1%)
+   Gray Remlin                       1 (0.1%)
+   Mugunthan V N                     1 (0.1%)
+   Steven Miao                       1 (0.1%)
+   Scott Jiang                       1 (0.1%)
+   Harvey Chapman                    1 (0.1%)
+   Reinhard Arlt                     1 (0.1%)
+   Howard Gray                       1 (0.1%)
+   Gerald Van Baren                  1 (0.1%)
+   Jeff Lance                        1 (0.1%)
+   Jim Lin                           1 (0.1%)
+   Ashok                             1 (0.1%)
+   Jason Wu                          1 (0.1%)
+   David Holsgrove                   1 (0.1%)
+   Andy Fleming                      1 (0.1%)
+   Shengzhou Liu                     1 (0.1%)
+   Vakul Garg                        1 (0.1%)
+   Timur Tabi                        1 (0.1%)
+   Shaohui Xie                       1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       17102 (16.6%)
+   Tom Warren                        13132 (12.7%)
+   Michal Simek                      6776 (6.6%)
+   Benoît Thébaudeau                 4934 (4.8%)
+   Eric Nelson                       4693 (4.6%)
+   York Sun                          3715 (3.6%)
+   Stefan Roese                      3386 (3.3%)
+   R Sricharan                       3139 (3.0%)
+   Piotr Wilczek                     2823 (2.7%)
+   Wolfgang Denk                     2419 (2.3%)
+   Allen Martin                      2373 (2.3%)
+   Lokesh Vutla                      2087 (2.0%)
+   Prabhakar Kushwaha                1864 (1.8%)
+   Matt Porter                       1861 (1.8%)
+   Anatolij Gustschin                1700 (1.6%)
+   Sonic Zhang                       1509 (1.5%)
+   Bob Liu                           1487 (1.4%)
+   Otavio Salvador                   1447 (1.4%)
+   Che-liang Chiou                   1434 (1.4%)
+   Marek Vasut                       1420 (1.4%)
+   Rong Chang                        1414 (1.4%)
+   Nikita Kiryanov                   1379 (1.3%)
+   Stephen Warren                    1369 (1.3%)
+   Fabio Estevam                     1251 (1.2%)
+   Rajeshwari Shinde                 1241 (1.2%)
+   Akshay Saraswat                   1196 (1.2%)
+   Troy Kisky                        1057 (1.0%)
+   Łukasz Majewski                   896 (0.9%)
+   Albert ARIBAUD                    810 (0.8%)
+   Lars Poeschel                     807 (0.8%)
+   Gabor Juhos                       792 (0.8%)
+   Pali Rohár                        753 (0.7%)
+   Lucas Stach                       710 (0.7%)
+   Kim Phillips                      666 (0.6%)
+   Ajay Kumar                        637 (0.6%)
+   Pantelis Antoniou                 600 (0.6%)
+   Scott Jiang                       549 (0.5%)
+   Andreas Bießmann                  546 (0.5%)
+   Joe Hershberger                   483 (0.5%)
+   Tom Rini                          445 (0.4%)
+   Jeroen Hofstee                    423 (0.4%)
+   Doug Anderson                     396 (0.4%)
+   Javier Martinez Canillas          377 (0.4%)
+   Scott Wood                        361 (0.4%)
+   Patrick Georgi                    316 (0.3%)
+   Daniel Schwierzeck                310 (0.3%)
+   James Yang                        281 (0.3%)
+   Stefano Babic                     231 (0.2%)
+   Vipin Kumar                       226 (0.2%)
+   Poonam Aggrwal                    172 (0.2%)
+   Padmavathi Venna                  166 (0.2%)
+   Karlheinz Jerg                    144 (0.1%)
+   Shaveta Leekha                    143 (0.1%)
+   Ilya Yanok                        138 (0.1%)
+   Tomas Novotny                     138 (0.1%)
+   Thierry Reding                    135 (0.1%)
+   Fadil Berisha                     130 (0.1%)
+   Holger Brunck                     109 (0.1%)
+   Jon Hunter                        104 (0.1%)
+   David Holsgrove                   92 (0.1%)
+   Vakul Garg                        92 (0.1%)
+   Marc Dietrich                     89 (0.1%)
+   Enric Balletbo i Serra            86 (0.1%)
+   Vivek Gautam                      82 (0.1%)
+   Rob Herring                       82 (0.1%)
+   Michael Jones                     76 (0.1%)
+   Aaron Williams                    76 (0.1%)
+   Richard Genoud                    74 (0.1%)
+   Jagan Teki                        63 (0.1%)
+   Bo Shen                           63 (0.1%)
+   Taylor Hutt                       61 (0.1%)
+   Vincent Palatin                   60 (0.1%)
+   Jeff Lance                        57 (0.1%)
+   Robert P. J. Day                  52 (0.1%)
+   Steven Miao                       46 (0.0%)
+   Shaohui Xie                       44 (0.0%)
+   Chase Maupin                      43 (0.0%)
+   Steven Stallion                   42 (0.0%)
+   Jaehoon Chung                     35 (0.0%)
+   Gabe Black                        31 (0.0%)
+   Knut Wohlrab                      30 (0.0%)
+   Lubomir Rintel                    27 (0.0%)
+   Tetsuyuki Kobayashi               24 (0.0%)
+   Vadim Bendebury                   21 (0.0%)
+   Shengzhou Liu                     19 (0.0%)
+   Koen Kooi                         18 (0.0%)
+   Manfred Huber                     18 (0.0%)
+   Peter Korsgaard                   18 (0.0%)
+   Mugunthan V N                     18 (0.0%)
+   Holger Hans Peter Freyther        16 (0.0%)
+   Abbas Raza                        16 (0.0%)
+   Nicolas Ferre                     14 (0.0%)
+   Robert Nelson                     14 (0.0%)
+   Andreas Huber                     14 (0.0%)
+   Valentin Longchamp                13 (0.0%)
+   Hongtao Jia                       13 (0.0%)
+   Nishanth Menon                    13 (0.0%)
+   Howard Gray                       13 (0.0%)
+   Mark Jackson                      12 (0.0%)
+   Phil Sutter                       12 (0.0%)
+   Timur Tabi                        12 (0.0%)
+   Mats Kärrman                      11 (0.0%)
+   Gerald Van Baren                  11 (0.0%)
+   Bin Liu                           9 (0.0%)
+   Jesse Gilles                      8 (0.0%)
+   Andre Przywara                    7 (0.0%)
+   Matthias Weisser                  7 (0.0%)
+   Lubomir Popov                     6 (0.0%)
+   Jagannadha Sutradharudu Teki      6 (0.0%)
+   Vaibhav Hiremath                  6 (0.0%)
+   Linus Walleij                     5 (0.0%)
+   ramneek mehresh                   5 (0.0%)
+   Jim Lin                           5 (0.0%)
+   Jason Wu                          5 (0.0%)
+   Alexey Brodkin                    4 (0.0%)
+   Andrew Gabbasov                   4 (0.0%)
+   Gerlando Falauto                  4 (0.0%)
+   Dirk Behme                        4 (0.0%)
+   Veli-Pekka Peltola                4 (0.0%)
+   Steve Kipisz                      4 (0.0%)
+   Andre Renaud                      4 (0.0%)
+   Michael Spang                     4 (0.0%)
+   Shiraz Hashim                     4 (0.0%)
+   Barak Wasserstrom                 4 (0.0%)
+   Minkyu Kang                       3 (0.0%)
+   Vincent Stehlé                    2 (0.0%)
+   Maxime Larocque                   2 (0.0%)
+   Gray Remlin                       2 (0.0%)
+   Ashok                             2 (0.0%)
+   Mingkai Hu                        1 (0.0%)
+   Alexandre Pereira da Silva        1 (0.0%)
+   Przemyslaw Marczak                1 (0.0%)
+   Harvey Chapman                    1 (0.0%)
+   Reinhard Arlt                     1 (0.0%)
+   Andy Fleming                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      6306 (14.3%)
+   Benoît Thébaudeau                 3523 (8.0%)
+   Stefan Roese                      2874 (6.5%)
+   Wolfgang Denk                     2053 (4.7%)
+   Jeroen Hofstee                    290 (0.7%)
+   Javier Martinez Canillas          251 (0.6%)
+   Gabor Juhos                       222 (0.5%)
+   Daniel Schwierzeck                98 (0.2%)
+   Lucas Stach                       75 (0.2%)
+   Robert P. J. Day                  34 (0.1%)
+   Richard Genoud                    26 (0.1%)
+   Scott Wood                        16 (0.0%)
+   Gerald Van Baren                  9 (0.0%)
+   Gabe Black                        6 (0.0%)
+   Michael Spang                     4 (0.0%)
+   Ashok                             2 (0.0%)
+   Knut Wohlrab                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 353)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Minkyu Kang                       54 (15.3%)
+   Tom Warren                        51 (14.4%)
+   Andy Fleming                      32 (9.1%)
+   Tom Rini                          23 (6.5%)
+   Sonic Zhang                       14 (4.0%)
+   Kyungmin Park                     13 (3.7%)
+   R Sricharan                       13 (3.7%)
+   Simon Glass                       13 (3.7%)
+   Igor Grinberg                     11 (3.1%)
+   Poonam Aggrwal                    9 (2.5%)
+   Akshay Saraswat                   9 (2.5%)
+   Michal Simek                      8 (2.3%)
+   Jagannadha Sutradharudu Teki      8 (2.3%)
+   Andreas Bießmann                  7 (2.0%)
+   Anatolij Gustschin                7 (2.0%)
+   Bob Liu                           6 (1.7%)
+   York Sun                          6 (1.7%)
+   ARUN MANKUZHI                     5 (1.4%)
+   Holger Brunck                     5 (1.4%)
+   Lokesh Vutla                      4 (1.1%)
+   Kim Phillips                      3 (0.8%)
+   Prabhakar Kushwaha                3 (0.8%)
+   Daniel Schwierzeck                2 (0.6%)
+   Tom Wai-Hong Tam                  2 (0.6%)
+   Hatim Ali                         2 (0.6%)
+   Naveen Burmi                      2 (0.6%)
+   Sandeep Singh                     2 (0.6%)
+   Li Yang                           2 (0.6%)
+   Michael Jones                     2 (0.6%)
+   Bo Shen                           2 (0.6%)
+   Shaveta Leekha                    2 (0.6%)
+   Marek Vasut                       2 (0.6%)
+   Otavio Salvador                   2 (0.6%)
+   Piotr Wilczek                     2 (0.6%)
+   Scott Wood                        1 (0.3%)
+   Gabe Black                        1 (0.3%)
+   Dirk Behme                        1 (0.3%)
+   Naveen Krishna Ch                 1 (0.3%)
+   Satyanarayana, Sandhya            1 (0.3%)
+   Oleksandr Tymoshenko              1 (0.3%)
+   Bernie Thompson                   1 (0.3%)
+   Duncan Laurie                     1 (0.3%)
+   Bill Richardson                   1 (0.3%)
+   Julius Werner                     1 (0.3%)
+   Andrzej Pietrasiewicz             1 (0.3%)
+   Armando Visconti                  1 (0.3%)
+   Alim Akhtar                       1 (0.3%)
+   Nishant Kamat                     1 (0.3%)
+   Hebbar Gururaja                   1 (0.3%)
+   Ruchika Gupta                     1 (0.3%)
+   Priyanka Jain                     1 (0.3%)
+   Roy Zang                          1 (0.3%)
+   Vadim Bendebury                   1 (0.3%)
+   Vincent Palatin                   1 (0.3%)
+   Thierry Reding                    1 (0.3%)
+   Pantelis Antoniou                 1 (0.3%)
+   Łukasz Majewski                   1 (0.3%)
+   Rajeshwari Shinde                 1 (0.3%)
+   Che-liang Chiou                   1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 128)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stephen Warren                    60 (46.9%)
+   Tom Rini                          45 (35.2%)
+   Doug Anderson                     9 (7.0%)
+   R Sricharan                       3 (2.3%)
+   Otavio Salvador                   3 (2.3%)
+   Benoît Thébaudeau                 2 (1.6%)
+   Javier Martinez Canillas          2 (1.6%)
+   Simon Glass                       1 (0.8%)
+   Vadim Bendebury                   1 (0.8%)
+   Joe Hershberger                   1 (0.8%)
+   Fabio Estevam                     1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 29)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Fabio Estevam                     5 (17.2%)
+   Rommel Custodio                   3 (10.3%)
+   Nishanth Menon                    3 (10.3%)
+   Michal Simek                      2 (6.9%)
+   Jagannadha Sutradharudu Teki      2 (6.9%)
+   Eric Nelson                       2 (6.9%)
+   R Sricharan                       1 (3.4%)
+   Javier Martinez Canillas          1 (3.4%)
+   Andreas Bießmann                  1 (3.4%)
+   Marek Vasut                       1 (3.4%)
+   Thierry Reding                    1 (3.4%)
+   Stefan Roese                      1 (3.4%)
+   Wolfgang Denk                     1 (3.4%)
+   Vincent Stehlé                    1 (3.4%)
+   Their Name                        1 (3.4%)
+   Rao Bodapati                      1 (3.4%)
+   Andrew Gabbasov                   1 (3.4%)
+   Koen Kooi                         1 (3.4%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 29)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Benoît Thébaudeau                 5 (17.2%)
+   R Sricharan                       4 (13.8%)
+   Fabio Estevam                     2 (6.9%)
+   Michal Simek                      2 (6.9%)
+   Tom Rini                          2 (6.9%)
+   Simon Glass                       2 (6.9%)
+   Manfred Huber                     2 (6.9%)
+   Nishanth Menon                    1 (3.4%)
+   Eric Nelson                       1 (3.4%)
+   Marek Vasut                       1 (3.4%)
+   Doug Anderson                     1 (3.4%)
+   Otavio Salvador                   1 (3.4%)
+   Tom Warren                        1 (3.4%)
+   Mats Kärrman                      1 (3.4%)
+   Jaehoon Chung                     1 (3.4%)
+   Aaron Williams                    1 (3.4%)
+   Jagan Teki                        1 (3.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Benoît Thébaudeau                 2 (20.0%)
+   Albert ARIBAUD                    2 (20.0%)
+   Koen Kooi                         1 (10.0%)
+   Lubomir Popov                     1 (10.0%)
+   Michael Cashwell                  1 (10.0%)
+   Alexei Fedorov                    1 (10.0%)
+   Aaron Williams                    1 (10.0%)
+   Peter Korsgaard                   1 (10.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Albert ARIBAUD                    2 (20.0%)
+   Fabio Estevam                     2 (20.0%)
+   Tom Rini                          2 (20.0%)
+   Marek Vasut                       1 (10.0%)
+   Vincent Stehlé                    1 (10.0%)
+   Akshay Saraswat                   1 (10.0%)
+   Lokesh Vutla                      1 (10.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         231 (23.6%)
+   Google, Inc.                      203 (20.7%)
+   NVidia                            75 (7.7%)
+   Freescale                         72 (7.3%)
+   Samsung                           66 (6.7%)
+   Texas Instruments                 57 (5.8%)
+   DENX Software Engineering         50 (5.1%)
+   Konsulko Group                    39 (4.0%)
+   ADVANSEE                          35 (3.6%)
+   O.S. Systems                      30 (3.1%)
+   Keymile                           24 (2.4%)
+   Boundary Devices                  21 (2.1%)
+   CompuLab                          15 (1.5%)
+   National Instruments              12 (1.2%)
+   AMD                               10 (1.0%)
+   Xilinx                            9 (0.9%)
+   Atmel                             6 (0.6%)
+   Analog Devices                    4 (0.4%)
+   Matrix Vision                     4 (0.4%)
+   Calxeda                           3 (0.3%)
+   Bosch                             3 (0.3%)
+   Linaro                            3 (0.3%)
+   Mercury IMC Ltd.                  3 (0.3%)
+   ST Microelectronics               3 (0.3%)
+   Bluewater Systems                 1 (0.1%)
+   ESD Electronics                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         22275 (21.6%)
+   Google, Inc.                      19044 (18.5%)
+   DENX Software Engineering         9156 (8.9%)
+   Freescale                         8640 (8.4%)
+   Texas Instruments                 7286 (7.1%)
+   Samsung                           7080 (6.9%)
+   AMD                               6776 (6.6%)
+   NVidia                            5869 (5.7%)
+   Boundary Devices                  5750 (5.6%)
+   ADVANSEE                          4934 (4.8%)
+   Analog Devices                    1507 (1.5%)
+   O.S. Systems                      1447 (1.4%)
+   CompuLab                          1379 (1.3%)
+   National Instruments              483 (0.5%)
+   Konsulko Group                    445 (0.4%)
+   Keymile                           284 (0.3%)
+   ST Microelectronics               230 (0.2%)
+   Xilinx                            155 (0.2%)
+   Matrix Vision                     89 (0.1%)
+   Calxeda                           82 (0.1%)
+   Atmel                             77 (0.1%)
+   Bosch                             34 (0.0%)
+   Linaro                            12 (0.0%)
+   Mercury IMC Ltd.                  12 (0.0%)
+   Bluewater Systems                 4 (0.0%)
+   ESD Electronics                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 353)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Samsung                           90 (25.5%)
+   Freescale                         65 (18.4%)
+   NVidia                            51 (14.4%)
+   Texas Instruments                 43 (12.2%)
+   (Unknown)                         26 (7.4%)
+   Google, Inc.                      22 (6.2%)
+   Xilinx                            16 (4.5%)
+   CompuLab                          11 (3.1%)
+   DENX Software Engineering         9 (2.5%)
+   Analog Devices                    7 (2.0%)
+   Keymile                           5 (1.4%)
+   O.S. Systems                      2 (0.6%)
+   Matrix Vision                     2 (0.6%)
+   Atmel                             2 (0.6%)
+   ST Microelectronics               1 (0.3%)
+   Bosch                             1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 140)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         56 (40.0%)
+   Freescale                         16 (11.4%)
+   Texas Instruments                 11 (7.9%)
+   Samsung                           10 (7.1%)
+   Google, Inc.                      6 (4.3%)
+   DENX Software Engineering         5 (3.6%)
+   Keymile                           5 (3.6%)
+   NVidia                            4 (2.9%)
+   Xilinx                            3 (2.1%)
+   Atmel                             3 (2.1%)
+   Matrix Vision                     2 (1.4%)
+   ST Microelectronics               2 (1.4%)
+   Bosch                             2 (1.4%)
+   Boundary Devices                  2 (1.4%)
+   Linaro                            2 (1.4%)
+   CompuLab                          1 (0.7%)
+   Analog Devices                    1 (0.7%)
+   O.S. Systems                      1 (0.7%)
+   AMD                               1 (0.7%)
+   ADVANSEE                          1 (0.7%)
+   National Instruments              1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   Calxeda                           1 (0.7%)
+   Mercury IMC Ltd.                  1 (0.7%)
+   Bluewater Systems                 1 (0.7%)
+   ESD Electronics                   1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2013.07.rst b/doc/develop/statistics/u-boot-stats-v2013.07.rst
new file mode 100644
index 00000000000..61b90a53ef5
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2013.07.rst
@@ -0,0 +1,741 @@
+:orphan:
+
+Release Statistics for U-Boot v2013.07
+======================================
+
+* Processed 948 changesets from 162 developers
+
+* 30 employers found
+
+* A total of 68587 lines added, 37600 removed (delta 30987)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       136 (14.3%)
+   Fabio Estevam                     42 (4.4%)
+   Benoît Thébaudeau                 41 (4.3%)
+   Michal Simek                      29 (3.1%)
+   Tom Rini                          28 (3.0%)
+   York Sun                          27 (2.8%)
+   Jagannadha Sutradharudu Teki      24 (2.5%)
+   Marek Vasut                       23 (2.4%)
+   Otavio Salvador                   19 (2.0%)
+   Stephen Warren                    19 (2.0%)
+   Bo Shen                           17 (1.8%)
+   Wolfgang Denk                     15 (1.6%)
+   Axel Lin                          15 (1.6%)
+   Stefan Roese                      15 (1.6%)
+   Rajeshwari Shinde                 14 (1.5%)
+   Shaohui Xie                       14 (1.5%)
+   Sonic Zhang                       14 (1.5%)
+   Mike Dunn                         13 (1.4%)
+   Lokesh Vutla                      13 (1.4%)
+   Prabhakar Kushwaha                12 (1.3%)
+   Heiko Schocher                    12 (1.3%)
+   Andreas Bießmann                  11 (1.2%)
+   Albert ARIBAUD                    11 (1.2%)
+   Amar                              11 (1.2%)
+   Vivek Gautam                      11 (1.2%)
+   Nishanth Menon                    11 (1.2%)
+   Rob Herring                       10 (1.1%)
+   Sricharan R                       10 (1.1%)
+   Lukasz Majewski                   9 (0.9%)
+   Masahiro Yamada                   9 (0.9%)
+   Lubomir Popov                     9 (0.9%)
+   Kuo-Jung Su                       9 (0.9%)
+   Gerhard Sittig                    8 (0.8%)
+   Liu Gang                          8 (0.8%)
+   Dan Murphy                        7 (0.7%)
+   Peter Korsgaard                   7 (0.7%)
+   Robert Winkler                    7 (0.7%)
+   Hung-ying Tyan                    7 (0.7%)
+   Jagan Teki                        7 (0.7%)
+   Alison Wang                       7 (0.7%)
+   Shengzhou Liu                     7 (0.7%)
+   Egbert Eich                       6 (0.6%)
+   Jim Lin                           5 (0.5%)
+   Ying Zhang                        5 (0.5%)
+   Roy Zang                          5 (0.5%)
+   Andy Fleming                      4 (0.4%)
+   Anatolij Gustschin                4 (0.4%)
+   Piotr Wilczek                     4 (0.4%)
+   Pierre Aubert                     4 (0.4%)
+   Doug Anderson                     4 (0.4%)
+   David Andrey                      4 (0.4%)
+   Scott Wood                        4 (0.4%)
+   Wu, Josh                          4 (0.4%)
+   Matt Porter                       4 (0.4%)
+   Joe Hershberger                   3 (0.3%)
+   Dirk Behme                        3 (0.3%)
+   Dirk Eibach                       3 (0.3%)
+   Tom Warren                        3 (0.3%)
+   Vincent Palatin                   3 (0.3%)
+   Sebastian Hesselbarth             3 (0.3%)
+   Priyanka Jain                     3 (0.3%)
+   Simon Guinot                      3 (0.3%)
+   Andrew Gabbasov                   3 (0.3%)
+   Inderpal Singh                    3 (0.3%)
+   Ed Swarthout                      3 (0.3%)
+   Scott Jiang                       3 (0.3%)
+   Bob Liu                           3 (0.3%)
+   Eric Benard                       3 (0.3%)
+   Igor Grinberg                     3 (0.3%)
+   Lan Yixun (dlan)                  2 (0.2%)
+   Sascha Silbe                      2 (0.2%)
+   Haijun.Zhang                      2 (0.2%)
+   Reinhard Pfau                     2 (0.2%)
+   Holger Brunck                     2 (0.2%)
+   trem                              2 (0.2%)
+   Eric Nelson                       2 (0.2%)
+   Che-Liang Chiou                   2 (0.2%)
+   SARTRE Leo                        2 (0.2%)
+   Xie Xiaobo                        2 (0.2%)
+   Kim Phillips                      2 (0.2%)
+   Vipin Kumar                       2 (0.2%)
+   Enric Balletbo i Serra            2 (0.2%)
+   Yegor Yefremov                    2 (0.2%)
+   Mingkai Hu                        2 (0.2%)
+   Poonam Aggrwal                    2 (0.2%)
+   Daniel Schwierzeck                2 (0.2%)
+   Naveen Krishna Chatradhi          2 (0.2%)
+   Sergey Yanovich                   2 (0.2%)
+   Julius Werner                     2 (0.2%)
+   Vishwanathrao Badarkhe, Manish    2 (0.2%)
+   Andrii Tseglytskyi                2 (0.2%)
+   Gabor Juhos                       2 (0.2%)
+   Sergey Lapin                      2 (0.2%)
+   Renato Frias                      2 (0.2%)
+   Tom Wai-Hong Tam                  2 (0.2%)
+   Shaveta Leekha                    2 (0.2%)
+   James Yang                        2 (0.2%)
+   Andre Przywara                    2 (0.2%)
+   Ryan Harkin                       2 (0.2%)
+   htbegin                           2 (0.2%)
+   Akshay Saraswat                   2 (0.2%)
+   Stefan Kristiansson               2 (0.2%)
+   Łukasz Dałek                      2 (0.2%)
+   Philip Paeps                      2 (0.2%)
+   Rommel Custodio                   1 (0.1%)
+   Troy Kisky                        1 (0.1%)
+   Alexey Brodkin                    1 (0.1%)
+   Frederic Leroy                    1 (0.1%)
+   Stefano Babic                     1 (0.1%)
+   Minkyu Kang                       1 (0.1%)
+   Ilya Ledvich                      1 (0.1%)
+   Michael Trimarchi                 1 (0.1%)
+   Jason Jin                         1 (0.1%)
+   Steve deRosier                    1 (0.1%)
+   Jens Scharsig (BuS Elektronik)    1 (0.1%)
+   Vincent Stehlé                    1 (0.1%)
+   Steven Stallion                   1 (0.1%)
+   Tapani Utriainen                  1 (0.1%)
+   Bernie Thompson                   1 (0.1%)
+   Roberto Cerati                    1 (0.1%)
+   Charles Coldwell                  1 (0.1%)
+   Shiraz Hashim                     1 (0.1%)
+   Matthias Brugger                  1 (0.1%)
+   Henrik Nordström                  1 (0.1%)
+   Ajay Kumar                        1 (0.1%)
+   Chunhe Lan                        1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Tang Yuantian                     1 (0.1%)
+   Ruud Commandeur                   1 (0.1%)
+   Michael Heimpold                  1 (0.1%)
+   Arkadiusz Wlodarczyk              1 (0.1%)
+   Balaji T K                        1 (0.1%)
+   Joel A Fernandes                  1 (0.1%)
+   Allen Martin                      1 (0.1%)
+   Ruchika Gupta                     1 (0.1%)
+   Suresh Gupta                      1 (0.1%)
+   Stephen George                    1 (0.1%)
+   Suriyan Ramasami                  1 (0.1%)
+   Harvey Chapman                    1 (0.1%)
+   Luka Perkov                       1 (0.1%)
+   Paul B. Henson                    1 (0.1%)
+   Sandeep Singh                     1 (0.1%)
+   Mike Frysinger                    1 (0.1%)
+   Gerald Van Baren                  1 (0.1%)
+   Justin Sobota                     1 (0.1%)
+   François Revol                    1 (0.1%)
+   Mark Jackson                      1 (0.1%)
+   Lucian Cojocar                    1 (0.1%)
+   Kuan-Yu Kuo                       1 (0.1%)
+   Jaehoon Chung                     1 (0.1%)
+   Davide Bonfanti                   1 (0.1%)
+   Timur Tabi                        1 (0.1%)
+   Xu Jiucheng                       1 (0.1%)
+   Cristian Sovaiala                 1 (0.1%)
+   Zhicheng Fan                      1 (0.1%)
+   Horst Kronstorfer                 1 (0.1%)
+   Xulei                             1 (0.1%)
+   Matthew McClintock                1 (0.1%)
+   Wang Dongsheng                    1 (0.1%)
+   Jeffrey Ladouceur                 1 (0.1%)
+   Jiang Bin                         1 (0.1%)
+   Shawn Guo                         1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       12980 (14.2%)
+   Wolfgang Denk                     10954 (11.9%)
+   Benoît Thébaudeau                 9522 (10.4%)
+   Hung-ying Tyan                    4447 (4.9%)
+   Tom Rini                          3775 (4.1%)
+   Kuo-Jung Su                       2993 (3.3%)
+   Dirk Eibach                       2839 (3.1%)
+   Mike Dunn                         2791 (3.0%)
+   Rajeshwari Shinde                 2467 (2.7%)
+   Sergey Lapin                      2210 (2.4%)
+   Michal Simek                      2106 (2.3%)
+   Alison Wang                       2054 (2.2%)
+   Bo Shen                           1935 (2.1%)
+   Stefan Roese                      1589 (1.7%)
+   Pierre Aubert                     1583 (1.7%)
+   Marek Vasut                       1406 (1.5%)
+   Albert ARIBAUD                    1341 (1.5%)
+   Prabhakar Kushwaha                1219 (1.3%)
+   York Sun                          1188 (1.3%)
+   Sonic Zhang                       1134 (1.2%)
+   Amar                              1106 (1.2%)
+   Fabio Estevam                     1048 (1.1%)
+   Roberto Cerati                    1004 (1.1%)
+   Jim Lin                           956 (1.0%)
+   Chunhe Lan                        851 (0.9%)
+   Wu, Josh                          777 (0.8%)
+   Enric Balletbo i Serra            697 (0.8%)
+   Reinhard Pfau                     644 (0.7%)
+   Suriyan Ramasami                  564 (0.6%)
+   Lubomir Popov                     540 (0.6%)
+   Henrik Nordström                  535 (0.6%)
+   Sricharan R                       534 (0.6%)
+   Vivek Gautam                      506 (0.6%)
+   SARTRE Leo                        483 (0.5%)
+   Lokesh Vutla                      481 (0.5%)
+   Stephen Warren                    456 (0.5%)
+   Sergey Yanovich                   456 (0.5%)
+   Tom Wai-Hong Tam                  401 (0.4%)
+   Shaohui Xie                       389 (0.4%)
+   Matt Porter                       355 (0.4%)
+   Otavio Salvador                   343 (0.4%)
+   Shengzhou Liu                     338 (0.4%)
+   Jagannadha Sutradharudu Teki      310 (0.3%)
+   Heiko Schocher                    293 (0.3%)
+   Matthew McClintock                284 (0.3%)
+   Andreas Bießmann                  280 (0.3%)
+   Andrii Tseglytskyi                272 (0.3%)
+   Nishanth Menon                    271 (0.3%)
+   Vishwanathrao Badarkhe, Manish    251 (0.3%)
+   Simon Guinot                      236 (0.3%)
+   Ryan Harkin                       232 (0.3%)
+   Jagan Teki                        188 (0.2%)
+   Inderpal Singh                    186 (0.2%)
+   Egbert Eich                       172 (0.2%)
+   Rob Herring                       159 (0.2%)
+   Gabor Juhos                       158 (0.2%)
+   Liu Gang                          150 (0.2%)
+   Julius Werner                     148 (0.2%)
+   Daniel Schwierzeck                147 (0.2%)
+   Che-Liang Chiou                   140 (0.2%)
+   Peter Korsgaard                   139 (0.2%)
+   Mingkai Hu                        126 (0.1%)
+   Poonam Aggrwal                    126 (0.1%)
+   Michael Heimpold                  124 (0.1%)
+   Sebastian Hesselbarth             122 (0.1%)
+   Dan Murphy                        120 (0.1%)
+   Roy Zang                          110 (0.1%)
+   David Andrey                      110 (0.1%)
+   Scott Jiang                       107 (0.1%)
+   Vincent Palatin                   100 (0.1%)
+   Yegor Yefremov                    100 (0.1%)
+   Naveen Krishna Chatradhi          100 (0.1%)
+   Robert Winkler                    97 (0.1%)
+   Bob Liu                           96 (0.1%)
+   Anatolij Gustschin                93 (0.1%)
+   Frederic Leroy                    93 (0.1%)
+   Axel Lin                          87 (0.1%)
+   Masahiro Yamada                   80 (0.1%)
+   Ying Zhang                        79 (0.1%)
+   Paul B. Henson                    79 (0.1%)
+   Scott Wood                        77 (0.1%)
+   Andy Fleming                      69 (0.1%)
+   Gerhard Sittig                    67 (0.1%)
+   Doug Anderson                     64 (0.1%)
+   Renato Frias                      63 (0.1%)
+   Priyanka Jain                     54 (0.1%)
+   Matthias Brugger                  53 (0.1%)
+   Justin Sobota                     51 (0.1%)
+   Piotr Wilczek                     49 (0.1%)
+   Tom Warren                        49 (0.1%)
+   Vipin Kumar                       48 (0.1%)
+   Steven Stallion                   47 (0.1%)
+   Zhicheng Fan                      47 (0.1%)
+   Suresh Gupta                      44 (0.0%)
+   Lukasz Majewski                   42 (0.0%)
+   Andre Przywara                    41 (0.0%)
+   Shaveta Leekha                    39 (0.0%)
+   Minkyu Kang                       38 (0.0%)
+   Ed Swarthout                      36 (0.0%)
+   Sascha Silbe                      35 (0.0%)
+   Harvey Chapman                    35 (0.0%)
+   Eric Nelson                       34 (0.0%)
+   Xie Xiaobo                        34 (0.0%)
+   Michael Trimarchi                 33 (0.0%)
+   Xu Jiucheng                       33 (0.0%)
+   Cristian Sovaiala                 30 (0.0%)
+   Xulei                             30 (0.0%)
+   Eric Benard                       28 (0.0%)
+   Charles Coldwell                  27 (0.0%)
+   Andrew Gabbasov                   26 (0.0%)
+   Igor Grinberg                     25 (0.0%)
+   Chris Packham                     25 (0.0%)
+   Dirk Behme                        24 (0.0%)
+   Jiang Bin                         23 (0.0%)
+   Balaji T K                        17 (0.0%)
+   Ruchika Gupta                     17 (0.0%)
+   Jeffrey Ladouceur                 17 (0.0%)
+   Joe Hershberger                   16 (0.0%)
+   James Yang                        13 (0.0%)
+   Akshay Saraswat                   13 (0.0%)
+   Arkadiusz Wlodarczyk              13 (0.0%)
+   trem                              11 (0.0%)
+   Mark Jackson                      11 (0.0%)
+   Łukasz Dałek                      10 (0.0%)
+   Horst Kronstorfer                 10 (0.0%)
+   Tapani Utriainen                  9 (0.0%)
+   Stephen George                    9 (0.0%)
+   Vincent Stehlé                    8 (0.0%)
+   Shiraz Hashim                     8 (0.0%)
+   Sandeep Singh                     8 (0.0%)
+   Kim Phillips                      7 (0.0%)
+   Lan Yixun (dlan)                  6 (0.0%)
+   Rommel Custodio                   6 (0.0%)
+   Lucian Cojocar                    6 (0.0%)
+   Kuan-Yu Kuo                       6 (0.0%)
+   Jason Jin                         5 (0.0%)
+   Ruud Commandeur                   5 (0.0%)
+   Allen Martin                      5 (0.0%)
+   Wang Dongsheng                    5 (0.0%)
+   Holger Brunck                     4 (0.0%)
+   Jaehoon Chung                     4 (0.0%)
+   Davide Bonfanti                   4 (0.0%)
+   Timur Tabi                        4 (0.0%)
+   htbegin                           3 (0.0%)
+   Stefan Kristiansson               3 (0.0%)
+   Philip Paeps                      3 (0.0%)
+   Bernie Thompson                   3 (0.0%)
+   Gerald Van Baren                  3 (0.0%)
+   Haijun.Zhang                      2 (0.0%)
+   Jens Scharsig (BuS Elektronik)    2 (0.0%)
+   Ajay Kumar                        2 (0.0%)
+   Tang Yuantian                     2 (0.0%)
+   Joel A Fernandes                  2 (0.0%)
+   Luka Perkov                       2 (0.0%)
+   Mike Frysinger                    2 (0.0%)
+   Troy Kisky                        1 (0.0%)
+   Alexey Brodkin                    1 (0.0%)
+   Stefano Babic                     1 (0.0%)
+   Ilya Ledvich                      1 (0.0%)
+   Steve deRosier                    1 (0.0%)
+   François Revol                    1 (0.0%)
+   Shawn Guo                         1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     8294 (22.1%)
+   Tom Rini                          3382 (9.0%)
+   Albert ARIBAUD                    851 (2.3%)
+   Rajeshwari Shinde                 763 (2.0%)
+   Daniel Schwierzeck                144 (0.4%)
+   Inderpal Singh                    104 (0.3%)
+   Scott Jiang                       96 (0.3%)
+   Andreas Bießmann                  46 (0.1%)
+   Michael Trimarchi                 24 (0.1%)
+   Ruchika Gupta                     17 (0.0%)
+   Mark Jackson                      8 (0.0%)
+   Anatolij Gustschin                7 (0.0%)
+   Axel Lin                          7 (0.0%)
+   Igor Grinberg                     7 (0.0%)
+   Dirk Behme                        6 (0.0%)
+   Kuan-Yu Kuo                       4 (0.0%)
+   Balaji T K                        3 (0.0%)
+   Gerhard Sittig                    2 (0.0%)
+   Jaehoon Chung                     2 (0.0%)
+   Alexey Brodkin                    1 (0.0%)
+   Ilya Ledvich                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 347)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andy Fleming                      135 (38.9%)
+   Minkyu Kang                       38 (11.0%)
+   Simon Glass                       19 (5.5%)
+   Andreas Bießmann                  14 (4.0%)
+   Tom Warren                        11 (3.2%)
+   Tom Rini                          9 (2.6%)
+   Kyungmin Park                     8 (2.3%)
+   Sonic Zhang                       8 (2.3%)
+   Jagannadha Sutradharudu Teki      7 (2.0%)
+   Lokesh Vutla                      6 (1.7%)
+   Randall Spangler                  5 (1.4%)
+   Roy Zang                          4 (1.2%)
+   Stefan Roese                      4 (1.2%)
+   Abhilash Kesavan                  3 (0.9%)
+   Kumar Gala                        3 (0.9%)
+   Vincent Palatin                   3 (0.9%)
+   Vivek Gautam                      3 (0.9%)
+   York Sun                          3 (0.9%)
+   Michal Simek                      3 (0.9%)
+   Rajeshwari Shinde                 2 (0.6%)
+   Anatolij Gustschin                2 (0.6%)
+   Gabe Black                        2 (0.6%)
+   Ramneek Mehresh                   2 (0.6%)
+   Hatim Ali                         2 (0.6%)
+   TsiChung Liew                     2 (0.6%)
+   Jerry Huang                       2 (0.6%)
+   Vikas C Sajjan                    2 (0.6%)
+   Scott Wood                        2 (0.6%)
+   Andre Przywara                    2 (0.6%)
+   Poonam Aggrwal                    2 (0.6%)
+   Reinhard Pfau                     2 (0.6%)
+   Amar                              2 (0.6%)
+   Dirk Eibach                       2 (0.6%)
+   Scott Jiang                       1 (0.3%)
+   Balaji T K                        1 (0.3%)
+   Jason Jin                         1 (0.3%)
+   Troy Kisky                        1 (0.3%)
+   Eric Jarrige                      1 (0.3%)
+   Bill Richardson                   1 (0.3%)
+   Louis Yung-Chieh Lo               1 (0.3%)
+   Sean Paul                         1 (0.3%)
+   Raffaele Recalcati                1 (0.3%)
+   Richard Retanubun                 1 (0.3%)
+   Peter Huewe                       1 (0.3%)
+   Alim Akhtar                       1 (0.3%)
+   Rajendra Nayak                    1 (0.3%)
+   xulei                             1 (0.3%)
+   Jiang Yutang                      1 (0.3%)
+   Gerald Van Baren                  1 (0.3%)
+   Bernie Thompson                   1 (0.3%)
+   Tang Yuantian                     1 (0.3%)
+   Timur Tabi                        1 (0.3%)
+   Joe Hershberger                   1 (0.3%)
+   Heiko Schocher                    1 (0.3%)
+   Ed Swarthout                      1 (0.3%)
+   Xie Xiaobo                        1 (0.3%)
+   Vipin Kumar                       1 (0.3%)
+   Doug Anderson                     1 (0.3%)
+   Bob Liu                           1 (0.3%)
+   Che-Liang Chiou                   1 (0.3%)
+   Sricharan R                       1 (0.3%)
+   Otavio Salvador                   1 (0.3%)
+   Prabhakar Kushwaha                1 (0.3%)
+   Stephen Warren                    1 (0.3%)
+   Wu, Josh                          1 (0.3%)
+   Bo Shen                           1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 144)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          40 (27.8%)
+   Marek Vasut                       19 (13.2%)
+   Simon Glass                       17 (11.8%)
+   Benoît Thébaudeau                 16 (11.1%)
+   Jagannadha Sutradharudu Teki      10 (6.9%)
+   Joe Hershberger                   8 (5.6%)
+   Vadim Bendebury                   5 (3.5%)
+   Otavio Salvador                   3 (2.1%)
+   Stephen Warren                    3 (2.1%)
+   Peter Korsgaard                   3 (2.1%)
+   Che-Liang Chiou                   2 (1.4%)
+   Stefan Reinauer                   2 (1.4%)
+   Michael Spang                     2 (1.4%)
+   Tom Wai-Hong Tam                  2 (1.4%)
+   Fabio Estevam                     2 (1.4%)
+   Vincent Palatin                   1 (0.7%)
+   Michal Simek                      1 (0.7%)
+   Gabe Black                        1 (0.7%)
+   Vipin Kumar                       1 (0.7%)
+   Sricharan R                       1 (0.7%)
+   Albert ARIBAUD                    1 (0.7%)
+   Luigi Semenzato                   1 (0.7%)
+   Lukasz Majewski                   1 (0.7%)
+   Sascha Silbe                      1 (0.7%)
+   Michael Heimpold                  1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 64)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       11 (17.2%)
+   Lubomir Popov                     11 (17.2%)
+   Jeroen Hofstee                    6 (9.4%)
+   Stephen Warren                    5 (7.8%)
+   Fabio Estevam                     4 (6.2%)
+   Vincent Palatin                   3 (4.7%)
+   Tom Rini                          2 (3.1%)
+   Marek Vasut                       2 (3.1%)
+   Tom Wai-Hong Tam                  2 (3.1%)
+   Lukasz Majewski                   2 (3.1%)
+   Andreas Bießmann                  2 (3.1%)
+   Heiko Schocher                    2 (3.1%)
+   Andy Voltz                        2 (3.1%)
+   Nikita Kiryanov                   2 (3.1%)
+   Stefan Roese                      1 (1.6%)
+   Raffaele Recalcati                1 (1.6%)
+   Alexandre Pereira da Silva        1 (1.6%)
+   Matt Sealey                       1 (1.6%)
+   Robert Nelson                     1 (1.6%)
+   Arkadiusz Wlodarczyk              1 (1.6%)
+   Robert Winkler                    1 (1.6%)
+   Enric Balletbo i Serra            1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 64)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Albert ARIBAUD                    16 (25.0%)
+   Vincent Palatin                   4 (6.2%)
+   Otavio Salvador                   4 (6.2%)
+   Simon Glass                       3 (4.7%)
+   Marek Vasut                       3 (4.7%)
+   Axel Lin                          3 (4.7%)
+   Hung-ying Tyan                    3 (4.7%)
+   Fabio Estevam                     2 (3.1%)
+   Andreas Bießmann                  2 (3.1%)
+   Rajeshwari Shinde                 2 (3.1%)
+   Igor Grinberg                     2 (3.1%)
+   Rommel Custodio                   2 (3.1%)
+   Jim Lin                           2 (3.1%)
+   Lubomir Popov                     1 (1.6%)
+   Stephen Warren                    1 (1.6%)
+   Tom Rini                          1 (1.6%)
+   Lukasz Majewski                   1 (1.6%)
+   Heiko Schocher                    1 (1.6%)
+   Arkadiusz Wlodarczyk              1 (1.6%)
+   Benoît Thébaudeau                 1 (1.6%)
+   Che-Liang Chiou                   1 (1.6%)
+   Sascha Silbe                      1 (1.6%)
+   Tom Warren                        1 (1.6%)
+   Michael Trimarchi                 1 (1.6%)
+   Masahiro Yamada                   1 (1.6%)
+   Andrew Gabbasov                   1 (1.6%)
+   Piotr Wilczek                     1 (1.6%)
+   Matthias Brugger                  1 (1.6%)
+   Roberto Cerati                    1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 11)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Albert ARIBAUD                    1 (9.1%)
+   Lubomir Popov                     1 (9.1%)
+   Tom Rini                          1 (9.1%)
+   Dirk Behme                        1 (9.1%)
+   Heinz Wrobel                      1 (9.1%)
+   Jason Liu                         1 (9.1%)
+   Ruchika Kharwar                   1 (9.1%)
+   John Traill                       1 (9.1%)
+   John Williams                     1 (9.1%)
+   Tapani Utriainen                  1 (9.1%)
+   Dan Murphy                        1 (9.1%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 11)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Fabio Estevam                     3 (27.3%)
+   Dan Murphy                        1 (9.1%)
+   Marek Vasut                       1 (9.1%)
+   Andrew Gabbasov                   1 (9.1%)
+   Michal Simek                      1 (9.1%)
+   Lokesh Vutla                      1 (9.1%)
+   Roy Zang                          1 (9.1%)
+   Mark Jackson                      1 (9.1%)
+   Nishanth Menon                    1 (9.1%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         171 (18.0%)
+   (Unknown)                         167 (17.6%)
+   Google, Inc.                      148 (15.6%)
+   DENX Software Engineering         78 (8.2%)
+   Samsung                           57 (6.0%)
+   Texas Instruments                 52 (5.5%)
+   ADVANSEE                          41 (4.3%)
+   Xilinx                            37 (3.9%)
+   Konsulko Group                    28 (3.0%)
+   NVidia                            25 (2.6%)
+   AMD                               23 (2.4%)
+   Atmel                             21 (2.2%)
+   O.S. Systems                      19 (2.0%)
+   Analog Devices                    15 (1.6%)
+   Boundary Devices                  10 (1.1%)
+   Calxeda                           10 (1.1%)
+   Socionext Inc.                    9 (0.9%)
+   Linaro                            8 (0.8%)
+   Novell                            6 (0.6%)
+   Guntermann & Drunck               5 (0.5%)
+   CompuLab                          4 (0.4%)
+   National Instruments              3 (0.3%)
+   ST Microelectronics               3 (0.3%)
+   Keymile                           2 (0.2%)
+   ACM                               1 (0.1%)
+   Amarula Solutions                 1 (0.1%)
+   BuS Elektronik                    1 (0.1%)
+   Wind River                        1 (0.1%)
+   Bosch                             1 (0.1%)
+   Mercury IMC Ltd.                  1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         22131 (24.1%)
+   DENX Software Engineering         14403 (15.7%)
+   Google, Inc.                      13688 (14.9%)
+   ADVANSEE                          9522 (10.4%)
+   Freescale                         8594 (9.4%)
+   Samsung                           4340 (4.7%)
+   Konsulko Group                    3775 (4.1%)
+   Guntermann & Drunck               3483 (3.8%)
+   Atmel                             2712 (3.0%)
+   Texas Instruments                 2354 (2.6%)
+   AMD                               2010 (2.2%)
+   NVidia                            1334 (1.5%)
+   Analog Devices                    1136 (1.2%)
+   Xilinx                            594 (0.6%)
+   Linaro                            460 (0.5%)
+   O.S. Systems                      343 (0.4%)
+   Novell                            172 (0.2%)
+   Calxeda                           159 (0.2%)
+   Boundary Devices                  132 (0.1%)
+   Socionext Inc.                    80 (0.1%)
+   ACM                               79 (0.1%)
+   ST Microelectronics               56 (0.1%)
+   Amarula Solutions                 33 (0.0%)
+   CompuLab                          26 (0.0%)
+   Wind River                        23 (0.0%)
+   National Instruments              16 (0.0%)
+   Mercury IMC Ltd.                  11 (0.0%)
+   Keymile                           4 (0.0%)
+   Bosch                             3 (0.0%)
+   BuS Elektronik                    2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 347)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         160 (46.1%)
+   Samsung                           61 (17.6%)
+   Google, Inc.                      30 (8.6%)
+   (Unknown)                         26 (7.5%)
+   Texas Instruments                 18 (5.2%)
+   NVidia                            12 (3.5%)
+   Xilinx                            10 (2.9%)
+   Analog Devices                    9 (2.6%)
+   DENX Software Engineering         7 (2.0%)
+   Guntermann & Drunck               4 (1.2%)
+   Atmel                             2 (0.6%)
+   Linaro                            2 (0.6%)
+   O.S. Systems                      1 (0.3%)
+   Boundary Devices                  1 (0.3%)
+   ST Microelectronics               1 (0.3%)
+   National Instruments              1 (0.3%)
+   Custom IDEAS                      1 (0.3%)
+   RuggedCom                         1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 165)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         57 (34.5%)
+   Freescale                         35 (21.2%)
+   Samsung                           11 (6.7%)
+   Texas Instruments                 10 (6.1%)
+   DENX Software Engineering         7 (4.2%)
+   Google, Inc.                      6 (3.6%)
+   NVidia                            4 (2.4%)
+   Linaro                            4 (2.4%)
+   Xilinx                            3 (1.8%)
+   Boundary Devices                  3 (1.8%)
+   Analog Devices                    2 (1.2%)
+   Guntermann & Drunck               2 (1.2%)
+   Atmel                             2 (1.2%)
+   ST Microelectronics               2 (1.2%)
+   CompuLab                          2 (1.2%)
+   O.S. Systems                      1 (0.6%)
+   National Instruments              1 (0.6%)
+   ADVANSEE                          1 (0.6%)
+   Konsulko Group                    1 (0.6%)
+   AMD                               1 (0.6%)
+   Novell                            1 (0.6%)
+   Calxeda                           1 (0.6%)
+   Socionext Inc.                    1 (0.6%)
+   ACM                               1 (0.6%)
+   Amarula Solutions                 1 (0.6%)
+   Wind River                        1 (0.6%)
+   Mercury IMC Ltd.                  1 (0.6%)
+   Keymile                           1 (0.6%)
+   Bosch                             1 (0.6%)
+   BuS Elektronik                    1 (0.6%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2013.10.rst b/doc/develop/statistics/u-boot-stats-v2013.10.rst
new file mode 100644
index 00000000000..40880201662
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2013.10.rst
@@ -0,0 +1,598 @@
+:orphan:
+
+Release Statistics for U-Boot v2013.10
+======================================
+
+* Processed 710 changesets from 135 developers
+
+* 28 employers found
+
+* A total of 55489 lines added, 119445 removed (delta -63956)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          61 (8.6%)
+   Jagannadha Sutradharudu Teki      48 (6.8%)
+   Marek Vasut                       37 (5.2%)
+   Gabor Juhos                       29 (4.1%)
+   Heiko Schocher                    27 (3.8%)
+   Fabio Estevam                     21 (3.0%)
+   York Sun                          18 (2.5%)
+   Masahiro Yamada                   18 (2.5%)
+   Bo Shen                           17 (2.4%)
+   Wolfgang Denk                     17 (2.4%)
+   Rob Herring                       17 (2.4%)
+   Axel Lin                          13 (1.8%)
+   Łukasz Majewski                   12 (1.7%)
+   Lokesh Vutla                      12 (1.7%)
+   Dan Murphy                        11 (1.5%)
+   Stephen Warren                    11 (1.5%)
+   Dirk Eibach                       11 (1.5%)
+   Paul Burton                       10 (1.4%)
+   Michal Simek                      9 (1.3%)
+   Daniel Schwierzeck                9 (1.3%)
+   Eric Nelson                       9 (1.3%)
+   Andre Przywara                    9 (1.3%)
+   Ying Zhang                        9 (1.3%)
+   Simon Glass                       8 (1.1%)
+   Piotr Wilczek                     7 (1.0%)
+   Enric Balletbo i Serra            7 (1.0%)
+   Stefano Babic                     7 (1.0%)
+   Wu, Josh                          7 (1.0%)
+   ken kuo                           7 (1.0%)
+   Holger Brunck                     6 (0.8%)
+   Jeroen Hofstee                    6 (0.8%)
+   Nishanth Menon                    6 (0.8%)
+   Kuo-Jung Su                       6 (0.8%)
+   Kees Cook                         6 (0.8%)
+   Justin Waters                     6 (0.8%)
+   Mugunthan V N                     6 (0.8%)
+   Dani Krishna Mohan                5 (0.7%)
+   Robert P. J. Day                  5 (0.7%)
+   Taras Kondratiuk                  5 (0.7%)
+   Jagan Teki                        4 (0.6%)
+   Rajeshwari Shinde                 4 (0.6%)
+   Chin Liang See                    4 (0.6%)
+   Otavio Salvador                   4 (0.6%)
+   Shaohui Xie                       4 (0.6%)
+   Stefan Roese                      4 (0.6%)
+   Shaveta Leekha                    4 (0.6%)
+   Liu Gang                          4 (0.6%)
+   Albert ARIBAUD                    3 (0.4%)
+   Poddar, Sourav                    3 (0.4%)
+   Matt Porter                       3 (0.4%)
+   Priyanka Jain                     3 (0.4%)
+   Thierry Reding                    3 (0.4%)
+   Afzal Mohammed                    3 (0.4%)
+   Steve Kipisz                      3 (0.4%)
+   Mischa Jonker                     3 (0.4%)
+   Oleksandr Tyshchenko              3 (0.4%)
+   trem                              3 (0.4%)
+   Chander Kashyap                   3 (0.4%)
+   Robert Winkler                    3 (0.4%)
+   Jim Lin                           3 (0.4%)
+   TENART Antoine                    3 (0.4%)
+   Roy Zang                          3 (0.4%)
+   Jaehoon Chung                     2 (0.3%)
+   Markus Niebel                     2 (0.3%)
+   Andrew Murray                     2 (0.3%)
+   Javier Martinez Canillas          2 (0.3%)
+   Julius Werner                     2 (0.3%)
+   Minkyu Kang                       2 (0.3%)
+   Joel Fernandes                    2 (0.3%)
+   Oliver Metz                       2 (0.3%)
+   Pardeep Kumar Singla              2 (0.3%)
+   Andreas Bießmann                  2 (0.3%)
+   Roger Meier                       2 (0.3%)
+   Jens Scharsig (BuS Elektronik)    2 (0.3%)
+   Lubomir Popov                     2 (0.3%)
+   Przemyslaw Marczak                2 (0.3%)
+   Gerlando Falauto                  2 (0.3%)
+   Andreas Wass                      2 (0.3%)
+   Shengzhou Liu                     2 (0.3%)
+   Shruti Kanetkar                   2 (0.3%)
+   Prabhakar Kushwaha                2 (0.3%)
+   Matthias Fuchs                    2 (0.3%)
+   Chunhe Lan                        2 (0.3%)
+   ramneek mehresh                   2 (0.3%)
+   Mingkai Hu                        2 (0.3%)
+   Nikita Kiryanov                   2 (0.3%)
+   Alison Wang                       2 (0.3%)
+   Scott Wood                        1 (0.1%)
+   Timo Herbrecher                   1 (0.1%)
+   Steven Falco                      1 (0.1%)
+   Andreas Huber                     1 (0.1%)
+   Lars Poeschel                     1 (0.1%)
+   Pierre Aubert                     1 (0.1%)
+   Troy Kisky                        1 (0.1%)
+   Juhyun (Justin) Oh                1 (0.1%)
+   Hector Palacios                   1 (0.1%)
+   Philip, Avinash                   1 (0.1%)
+   Greg Guyotte                      1 (0.1%)
+   Nobuhiro Iwamatsu                 1 (0.1%)
+   Mark Langsdorf                    1 (0.1%)
+   Frederic Leroy                    1 (0.1%)
+   Pantelis Antoniou                 1 (0.1%)
+   Elie De Brauwer                   1 (0.1%)
+   Andrew Gabbasov                   1 (0.1%)
+   Tang Yuantian                     1 (0.1%)
+   Henrik Nordström                  1 (0.1%)
+   Richard Gibbs                     1 (0.1%)
+   Jack Mitchell                     1 (0.1%)
+   Thomas Chou                       1 (0.1%)
+   SARTRE Leo                        1 (0.1%)
+   Inderpal Singh                    1 (0.1%)
+   Amaury Pouly                      1 (0.1%)
+   Phil Sutter                       1 (0.1%)
+   Николай Пузанов                   1 (0.1%)
+   Bhupesh Sharma                    1 (0.1%)
+   Paul B. Henson                    1 (0.1%)
+   Angus Ainslie                     1 (0.1%)
+   Naumann Andreas                   1 (0.1%)
+   Ash Charles                       1 (0.1%)
+   Steve Sakoman                     1 (0.1%)
+   Po Liu                            1 (0.1%)
+   Christian Gmeiner                 1 (0.1%)
+   Donghwa Lee                       1 (0.1%)
+   Soren Brinkmann                   1 (0.1%)
+   Hyungwon Hwang                    1 (0.1%)
+   James Yang                        1 (0.1%)
+   Minghuan Lian                     1 (0.1%)
+   Haijun.Zhang                      1 (0.1%)
+   Xie Xiaobo                        1 (0.1%)
+   Andes                             1 (0.1%)
+   Roger Quadros                     1 (0.1%)
+   Christian Riesch                  1 (0.1%)
+   Dinh Nguyen                       1 (0.1%)
+   Dirk Behme                        1 (0.1%)
+   naveen krishna chatradhi          1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     98751 (62.8%)
+   Heiko Schocher                    8452 (5.4%)
+   Marek Vasut                       7578 (4.8%)
+   Jagannadha Sutradharudu Teki      4007 (2.5%)
+   Albert ARIBAUD                    3987 (2.5%)
+   Dirk Eibach                       2312 (1.5%)
+   Bo Shen                           2047 (1.3%)
+   Masahiro Yamada                   1715 (1.1%)
+   York Sun                          1714 (1.1%)
+   Piotr Wilczek                     1691 (1.1%)
+   trem                              1599 (1.0%)
+   TENART Antoine                    1531 (1.0%)
+   Fabio Estevam                     1519 (1.0%)
+   Tom Rini                          1472 (0.9%)
+   Matthias Fuchs                    1453 (0.9%)
+   Lokesh Vutla                      1390 (0.9%)
+   Xie Xiaobo                        1180 (0.8%)
+   Gabor Juhos                       1172 (0.7%)
+   Mingkai Hu                        1139 (0.7%)
+   Ying Zhang                        799 (0.5%)
+   Dan Murphy                        683 (0.4%)
+   Kuo-Jung Su                       542 (0.3%)
+   Andre Przywara                    522 (0.3%)
+   Stefano Babic                     473 (0.3%)
+   Shaveta Leekha                    464 (0.3%)
+   Chander Kashyap                   457 (0.3%)
+   Dani Krishna Mohan                443 (0.3%)
+   Paul Burton                       419 (0.3%)
+   Chin Liang See                    397 (0.3%)
+   Andreas Wass                      381 (0.2%)
+   Roger Meier                       376 (0.2%)
+   Kees Cook                         366 (0.2%)
+   ken kuo                           361 (0.2%)
+   Matt Porter                       355 (0.2%)
+   Steve Kipisz                      320 (0.2%)
+   Simon Glass                       290 (0.2%)
+   Daniel Schwierzeck                248 (0.2%)
+   Mugunthan V N                     235 (0.1%)
+   Wu, Josh                          226 (0.1%)
+   Hyungwon Hwang                    193 (0.1%)
+   Greg Guyotte                      192 (0.1%)
+   Rob Herring                       188 (0.1%)
+   Prabhakar Kushwaha                169 (0.1%)
+   Pardeep Kumar Singla              162 (0.1%)
+   Philip, Avinash                   161 (0.1%)
+   Shaohui Xie                       159 (0.1%)
+   Łukasz Majewski                   126 (0.1%)
+   Afzal Mohammed                    126 (0.1%)
+   Stephen Warren                    121 (0.1%)
+   Julius Werner                     113 (0.1%)
+   Rajeshwari Shinde                 112 (0.1%)
+   Michal Simek                      110 (0.1%)
+   ramneek mehresh                   106 (0.1%)
+   Poddar, Sourav                    102 (0.1%)
+   Po Liu                            100 (0.1%)
+   Chunhe Lan                        91 (0.1%)
+   Alison Wang                       89 (0.1%)
+   Enric Balletbo i Serra            84 (0.1%)
+   Eric Nelson                       74 (0.0%)
+   Justin Waters                     66 (0.0%)
+   Donghwa Lee                       66 (0.0%)
+   Priyanka Jain                     63 (0.0%)
+   Haijun.Zhang                      63 (0.0%)
+   Nishanth Menon                    62 (0.0%)
+   Phil Sutter                       62 (0.0%)
+   Axel Lin                          61 (0.0%)
+   Naumann Andreas                   60 (0.0%)
+   Jagan Teki                        54 (0.0%)
+   Taras Kondratiuk                  53 (0.0%)
+   Stefan Roese                      53 (0.0%)
+   Roy Zang                          51 (0.0%)
+   Bhupesh Sharma                    51 (0.0%)
+   Lubomir Popov                     48 (0.0%)
+   Oliver Metz                       45 (0.0%)
+   Robert P. J. Day                  44 (0.0%)
+   Shruti Kanetkar                   43 (0.0%)
+   Steven Falco                      42 (0.0%)
+   Przemyslaw Marczak                41 (0.0%)
+   Jeroen Hofstee                    39 (0.0%)
+   Jim Lin                           36 (0.0%)
+   Minkyu Kang                       34 (0.0%)
+   Jens Scharsig (BuS Elektronik)    33 (0.0%)
+   Inderpal Singh                    32 (0.0%)
+   Liu Gang                          31 (0.0%)
+   Oleksandr Tyshchenko              28 (0.0%)
+   Javier Martinez Canillas          27 (0.0%)
+   Joel Fernandes                    27 (0.0%)
+   Robert Winkler                    23 (0.0%)
+   Angus Ainslie                     20 (0.0%)
+   Andrew Murray                     19 (0.0%)
+   Holger Brunck                     17 (0.0%)
+   Shengzhou Liu                     15 (0.0%)
+   Roger Quadros                     15 (0.0%)
+   Jaehoon Chung                     14 (0.0%)
+   Gerlando Falauto                  14 (0.0%)
+   Nobuhiro Iwamatsu                 14 (0.0%)
+   Thierry Reding                    13 (0.0%)
+   Jack Mitchell                     13 (0.0%)
+   Minghuan Lian                     12 (0.0%)
+   Andreas Bießmann                  11 (0.0%)
+   Christian Riesch                  11 (0.0%)
+   Mischa Jonker                     8 (0.0%)
+   Ash Charles                       8 (0.0%)
+   Otavio Salvador                   7 (0.0%)
+   Steve Sakoman                     7 (0.0%)
+   Markus Niebel                     6 (0.0%)
+   Hector Palacios                   6 (0.0%)
+   Nikita Kiryanov                   5 (0.0%)
+   Scott Wood                        5 (0.0%)
+   Troy Kisky                        4 (0.0%)
+   Andrew Gabbasov                   4 (0.0%)
+   Richard Gibbs                     4 (0.0%)
+   Soren Brinkmann                   4 (0.0%)
+   Juhyun (Justin) Oh                3 (0.0%)
+   Elie De Brauwer                   3 (0.0%)
+   Lars Poeschel                     2 (0.0%)
+   Mark Langsdorf                    2 (0.0%)
+   Pantelis Antoniou                 2 (0.0%)
+   Tang Yuantian                     2 (0.0%)
+   SARTRE Leo                        2 (0.0%)
+   Amaury Pouly                      2 (0.0%)
+   Dirk Behme                        2 (0.0%)
+   naveen krishna chatradhi          2 (0.0%)
+   Timo Herbrecher                   1 (0.0%)
+   Andreas Huber                     1 (0.0%)
+   Pierre Aubert                     1 (0.0%)
+   Frederic Leroy                    1 (0.0%)
+   Henrik Nordström                  1 (0.0%)
+   Thomas Chou                       1 (0.0%)
+   Николай Пузанов                   1 (0.0%)
+   Paul B. Henson                    1 (0.0%)
+   Christian Gmeiner                 1 (0.0%)
+   James Yang                        1 (0.0%)
+   Andes                             1 (0.0%)
+   Dinh Nguyen                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     89188 (74.7%)
+   Albert ARIBAUD                    2630 (2.2%)
+   Masahiro Yamada                   1623 (1.4%)
+   Matthias Fuchs                    1431 (1.2%)
+   Fabio Estevam                     852 (0.7%)
+   Jagannadha Sutradharudu Teki      846 (0.7%)
+   Roger Meier                       334 (0.3%)
+   Stephen Warren                    35 (0.0%)
+   Minkyu Kang                       28 (0.0%)
+   Axel Lin                          20 (0.0%)
+   Nobuhiro Iwamatsu                 13 (0.0%)
+   Phil Sutter                       8 (0.0%)
+   Christian Riesch                  8 (0.0%)
+   Hector Palacios                   3 (0.0%)
+   Shruti Kanetkar                   1 (0.0%)
+   Markus Niebel                     1 (0.0%)
+   Juhyun (Justin) Oh                1 (0.0%)
+   SARTRE Leo                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 152)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andreas Bießmann                  19 (12.5%)
+   Tom Rini                          16 (10.5%)
+   Minkyu Kang                       12 (7.9%)
+   Stefan Roese                      12 (7.9%)
+   Kyungmin Park                     11 (7.2%)
+   Jagannadha Sutradharudu Teki      10 (6.6%)
+   Simon Glass                       7 (4.6%)
+   Michal Simek                      6 (3.9%)
+   York Sun                          6 (3.9%)
+   Sonic Zhang                       4 (2.6%)
+   Gabor Juhos                       4 (2.6%)
+   Eric Jarrige                      3 (2.0%)
+   Tom Warren                        3 (2.0%)
+   Anatolij Gustschin                3 (2.0%)
+   Poddar, Sourav                    3 (2.0%)
+   Bo Shen                           3 (2.0%)
+   Andes                             2 (1.3%)
+   Zhao Chenhui                      2 (1.3%)
+   Manish Jaggi                      2 (1.3%)
+   Kim Phillips                      2 (1.3%)
+   Inderpal Singh                    2 (1.3%)
+   Roger Meier                       1 (0.7%)
+   Ash Charles                       1 (0.7%)
+   Nicolas Colombain                 1 (0.7%)
+   Jason Liu                         1 (0.7%)
+   Edgar E. Iglesias                 1 (0.7%)
+   Samuel Egli                       1 (0.7%)
+   Jerry Huang                       1 (0.7%)
+   Michael Johnston                  1 (0.7%)
+   Scott Jiang                       1 (0.7%)
+   Naveen Krishna Chatradhi          1 (0.7%)
+   Pantelis Antoniou                 1 (0.7%)
+   Donghwa Lee                       1 (0.7%)
+   Minghuan Lian                     1 (0.7%)
+   Taras Kondratiuk                  1 (0.7%)
+   Po Liu                            1 (0.7%)
+   Mugunthan V N                     1 (0.7%)
+   Ying Zhang                        1 (0.7%)
+   Lokesh Vutla                      1 (0.7%)
+   Heiko Schocher                    1 (0.7%)
+   Marek Vasut                       1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 44)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagannadha Sutradharudu Teki      11 (25.0%)
+   Peter Korsgaard                   8 (18.2%)
+   Tom Rini                          7 (15.9%)
+   Javier Martinez Canillas          6 (13.6%)
+   Pavel Machek                      5 (11.4%)
+   Otavio Salvador                   2 (4.5%)
+   Łukasz Majewski                   2 (4.5%)
+   Stephen Warren                    1 (2.3%)
+   Thierry Reding                    1 (2.3%)
+   Kuo-Jung Su                       1 (2.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 23)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heiko Schocher                    6 (26.1%)
+   Stephen Warren                    2 (8.7%)
+   Luka Perkov                       2 (8.7%)
+   Holger Brunck                     2 (8.7%)
+   Stefan Roese                      1 (4.3%)
+   Marek Vasut                       1 (4.3%)
+   Hector Palacios                   1 (4.3%)
+   Aparna Balasubramanian            1 (4.3%)
+   Chris Packham                     1 (4.3%)
+   Enric Balletbo i Serra            1 (4.3%)
+   Nishanth Menon                    1 (4.3%)
+   Oliver Metz                       1 (4.3%)
+   Eric Nelson                       1 (4.3%)
+   Stefano Babic                     1 (4.3%)
+   Dan Murphy                        1 (4.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 23)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heiko Schocher                    4 (17.4%)
+   Tom Rini                          3 (13.0%)
+   Lokesh Vutla                      3 (13.0%)
+   Fabio Estevam                     3 (13.0%)
+   Oliver Metz                       2 (8.7%)
+   Jagannadha Sutradharudu Teki      1 (4.3%)
+   Łukasz Majewski                   1 (4.3%)
+   Thierry Reding                    1 (4.3%)
+   Simon Glass                       1 (4.3%)
+   Masahiro Yamada                   1 (4.3%)
+   Lars Poeschel                     1 (4.3%)
+   Shaohui Xie                       1 (4.3%)
+   Dirk Eibach                       1 (4.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Hector Palacios                   1 (20.0%)
+   Steven Falco                      1 (20.0%)
+   Stephen MacMahon                  1 (20.0%)
+   Robert Nelson                     1 (20.0%)
+   Pardeep Kumar Singla              1 (20.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Fabio Estevam                     2 (40.0%)
+   Tom Rini                          1 (20.0%)
+   Nishanth Menon                    1 (20.0%)
+   Michal Simek                      1 (20.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         156 (22.0%)
+   DENX Software Engineering         92 (13.0%)
+   Freescale                         90 (12.7%)
+   Konsulko Group                    61 (8.6%)
+   Texas Instruments                 54 (7.6%)
+   Xilinx                            54 (7.6%)
+   Samsung                           36 (5.1%)
+   Atmel                             22 (3.1%)
+   Calxeda                           19 (2.7%)
+   Socionext Inc.                    18 (2.5%)
+   Linaro                            16 (2.3%)
+   NVidia                            16 (2.3%)
+   Boundary Devices                  13 (1.8%)
+   Guntermann & Drunck               11 (1.5%)
+   MIPS                              10 (1.4%)
+   Keymile                           9 (1.3%)
+   AMD                               8 (1.1%)
+   Google, Inc.                      8 (1.1%)
+   O.S. Systems                      4 (0.6%)
+   BuS Elektronik                    2 (0.3%)
+   CompuLab                          2 (0.3%)
+   ESD Electronics                   2 (0.3%)
+   TQ Systems                        2 (0.3%)
+   ACM                               1 (0.1%)
+   Bosch                             1 (0.1%)
+   Digi International                1 (0.1%)
+   Renesas Electronics               1 (0.1%)
+   Sakoman Inc.                      1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         115307 (73.3%)
+   (Unknown)                         11899 (7.6%)
+   Freescale                         8028 (5.1%)
+   Xilinx                            4070 (2.6%)
+   Texas Instruments                 3268 (2.1%)
+   Samsung                           2720 (1.7%)
+   Guntermann & Drunck               2312 (1.5%)
+   Atmel                             2271 (1.4%)
+   Socionext Inc.                    1715 (1.1%)
+   Konsulko Group                    1472 (0.9%)
+   ESD Electronics                   1453 (0.9%)
+   Linaro                            1366 (0.9%)
+   MIPS                              419 (0.3%)
+   Google, Inc.                      290 (0.2%)
+   Calxeda                           194 (0.1%)
+   NVidia                            169 (0.1%)
+   AMD                               105 (0.1%)
+   Boundary Devices                  101 (0.1%)
+   BuS Elektronik                    33 (0.0%)
+   Keymile                           32 (0.0%)
+   Renesas Electronics               14 (0.0%)
+   O.S. Systems                      7 (0.0%)
+   Sakoman Inc.                      7 (0.0%)
+   TQ Systems                        6 (0.0%)
+   Digi International                6 (0.0%)
+   CompuLab                          5 (0.0%)
+   Bosch                             2 (0.0%)
+   ACM                               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 152)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         32 (21.1%)
+   Samsung                           25 (16.4%)
+   Texas Instruments                 22 (14.5%)
+   Freescale                         18 (11.8%)
+   DENX Software Engineering         17 (11.2%)
+   Xilinx                            17 (11.2%)
+   Google, Inc.                      7 (4.6%)
+   Analog Devices                    4 (2.6%)
+   Atmel                             3 (2.0%)
+   NVidia                            3 (2.0%)
+   Linaro                            2 (1.3%)
+   Siemens                           2 (1.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 138)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         50 (36.2%)
+   Freescale                         24 (17.4%)
+   Texas Instruments                 12 (8.7%)
+   Samsung                           9 (6.5%)
+   DENX Software Engineering         5 (3.6%)
+   Xilinx                            4 (2.9%)
+   Linaro                            4 (2.9%)
+   NVidia                            3 (2.2%)
+   Calxeda                           3 (2.2%)
+   Boundary Devices                  3 (2.2%)
+   Keymile                           3 (2.2%)
+   Atmel                             2 (1.4%)
+   Google, Inc.                      1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   Socionext Inc.                    1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   ESD Electronics                   1 (0.7%)
+   MIPS                              1 (0.7%)
+   AMD                               1 (0.7%)
+   BuS Elektronik                    1 (0.7%)
+   Renesas Electronics               1 (0.7%)
+   O.S. Systems                      1 (0.7%)
+   Sakoman Inc.                      1 (0.7%)
+   TQ Systems                        1 (0.7%)
+   Digi International                1 (0.7%)
+   CompuLab                          1 (0.7%)
+   Bosch                             1 (0.7%)
+   ACM                               1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2014.01.rst b/doc/develop/statistics/u-boot-stats-v2014.01.rst
new file mode 100644
index 00000000000..584226904d8
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2014.01.rst
@@ -0,0 +1,701 @@
+:orphan:
+
+Release Statistics for U-Boot v2014.01
+======================================
+
+* Processed 980 changesets from 154 developers
+
+* 31 employers found
+
+* A total of 68855 lines added, 50005 removed (delta 18850)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   127 (13.0%)
+   Nobuhiro Iwamatsu                 50 (5.1%)
+   Fabio Estevam                     43 (4.4%)
+   Tom Rini                          34 (3.5%)
+   Jagan Teki                        31 (3.2%)
+   Paul Burton                       24 (2.4%)
+   Simon Glass                       22 (2.2%)
+   Andreas Bießmann                  22 (2.2%)
+   Troy Kisky                        21 (2.1%)
+   Bo Shen                           19 (1.9%)
+   Łukasz Majewski                   18 (1.8%)
+   Heiko Schocher                    18 (1.8%)
+   Jagannadha Sutradharudu Teki      17 (1.7%)
+   Lokesh Vutla                      17 (1.7%)
+   Nikita Kiryanov                   16 (1.6%)
+   Prabhakar Kushwaha                16 (1.6%)
+   Rob Herring                       16 (1.6%)
+   Marek Vasut                       15 (1.5%)
+   Piotr Wilczek                     13 (1.3%)
+   Rajeshwari S Shinde               13 (1.3%)
+   Shengzhou Liu                     13 (1.3%)
+   Dan Murphy                        12 (1.2%)
+   Roger Quadros                     11 (1.1%)
+   Valentin Longchamp                11 (1.1%)
+   Alexey Brodkin                    10 (1.0%)
+   York Sun                          10 (1.0%)
+   Stefan Roese                      10 (1.0%)
+   Sonic Zhang                       10 (1.0%)
+   Claudiu Manoil                    10 (1.0%)
+   Przemyslaw Marczak                9 (0.9%)
+   Kuo-Jung Su                       9 (0.9%)
+   Eric Nelson                       9 (0.9%)
+   Otavio Salvador                   8 (0.8%)
+   Shaohui Xie                       8 (0.8%)
+   Priyanka Jain                     8 (0.8%)
+   Vivek Gautam                      8 (0.8%)
+   Albert ARIBAUD                    7 (0.7%)
+   Miao Yan                          7 (0.7%)
+   David Feng                        7 (0.7%)
+   Luka Perkov                       7 (0.7%)
+   Stefano Babic                     7 (0.7%)
+   Igor Grinberg                     7 (0.7%)
+   Axel Lin                          6 (0.6%)
+   Thierry Reding                    6 (0.6%)
+   Jaehoon Chung                     5 (0.5%)
+   Sergei Ianovich                   5 (0.5%)
+   pekon gupta                       5 (0.5%)
+   Giuseppe Pagano                   5 (0.5%)
+   Po Liu                            5 (0.5%)
+   Zhao Qiang                        5 (0.5%)
+   Wu, Josh                          5 (0.5%)
+   Stephen Warren                    4 (0.4%)
+   Jeroen Hofstee                    4 (0.4%)
+   Minkyu Kang                       4 (0.4%)
+   Scott Wood                        4 (0.4%)
+   Alban Bedel                       4 (0.4%)
+   Guilherme Maciel Ferreira         4 (0.4%)
+   Michal Simek                      4 (0.4%)
+   Jens Scharsig (BuS Elektronik)    4 (0.4%)
+   SRICHARAN R                       4 (0.4%)
+   ramneek mehresh                   4 (0.4%)
+   Haijun.Zhang                      4 (0.4%)
+   Liu Ying                          3 (0.3%)
+   Chin Liang See                    3 (0.3%)
+   Naveen Krishna Chatradhi          3 (0.3%)
+   Yoshihiro Shimoda                 3 (0.3%)
+   Mike Frysinger                    3 (0.3%)
+   Ilya Ledvich                      3 (0.3%)
+   Andrew Ruder                      3 (0.3%)
+   Laurentiu TUDOR                   3 (0.3%)
+   Egbert Eich                       3 (0.3%)
+   Thomas Weber                      3 (0.3%)
+   trem                              3 (0.3%)
+   Ying Zhang                        3 (0.3%)
+   Andre Heider                      2 (0.2%)
+   Ionut Nicu                        2 (0.2%)
+   Ma Haijun                         2 (0.2%)
+   Bhupesh Sharma                    2 (0.2%)
+   Pierre Aubert                     2 (0.2%)
+   Darwin Rambo                      2 (0.2%)
+   Lubomir Popov                     2 (0.2%)
+   Poddar, Sourav                    2 (0.2%)
+   Sekhar Nori                       2 (0.2%)
+   Vladimir Zapolskiy                2 (0.2%)
+   Soren Brinkmann                   2 (0.2%)
+   Mateusz Kulikowski                2 (0.2%)
+   Michael Trimarchi                 2 (0.2%)
+   Viktar Palstsiuk                  2 (0.2%)
+   Oleg Kosheliev                    2 (0.2%)
+   Wolfgang Denk                     2 (0.2%)
+   David Dueck                       2 (0.2%)
+   Gabor Juhos                       2 (0.2%)
+   Anatolij Gustschin                2 (0.2%)
+   Suriyan Ramasami                  2 (0.2%)
+   Mark Langsdorf                    2 (0.2%)
+   Javier Martinez Canillas          2 (0.2%)
+   Julius Werner                     2 (0.2%)
+   Charles Manning                   1 (0.1%)
+   Robert Nelson                     1 (0.1%)
+   Ezequiel Garcia                   1 (0.1%)
+   Andrew Gabbasov                   1 (0.1%)
+   Antonios Vamporakis               1 (0.1%)
+   Inderpal Singh                    1 (0.1%)
+   Chander Kashyap                   1 (0.1%)
+   Christian Gmeiner                 1 (0.1%)
+   John Weber                        1 (0.1%)
+   Hisashi Nakamura                  1 (0.1%)
+   Siva Durga Prasad Paladugu        1 (0.1%)
+   Markus Niebel                     1 (0.1%)
+   Che-Liang Chiou                   1 (0.1%)
+   Henrik Nordström                  1 (0.1%)
+   Lad, Prabhakar                    1 (0.1%)
+   Mugunthan V N                     1 (0.1%)
+   Holger Brunck                     1 (0.1%)
+   Karlheinz Jerg                    1 (0.1%)
+   Sergey Alyoshin                   1 (0.1%)
+   Yen Lin                           1 (0.1%)
+   Jim Lin                           1 (0.1%)
+   Vidya Sagar                       1 (0.1%)
+   Jimmy Zhang                       1 (0.1%)
+   Frank Li                          1 (0.1%)
+   Stany MARCEL                      1 (0.1%)
+   Kees Jongenburger                 1 (0.1%)
+   Yegor Yefremov                    1 (0.1%)
+   Tapani Utriainen                  1 (0.1%)
+   Ian Campbell                      1 (0.1%)
+   Roger Meier                       1 (0.1%)
+   Zang Roy-R61911                   1 (0.1%)
+   Dave Liu                          1 (0.1%)
+   Vladimir Koutny                   1 (0.1%)
+   Hardik Patel                      1 (0.1%)
+   Matt Porter                       1 (0.1%)
+   Lars Poeschel                     1 (0.1%)
+   Tang Yuantian                     1 (0.1%)
+   Srikanth Thokala                  1 (0.1%)
+   Rojhalat Ibrahim                  1 (0.1%)
+   Chunhe Lan                        1 (0.1%)
+   Arpit Goel                        1 (0.1%)
+   Sascha Silbe                      1 (0.1%)
+   Stephan Bauroth                   1 (0.1%)
+   rockly                            1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Michael Heimpold                  1 (0.1%)
+   Samuel Egli                       1 (0.1%)
+   Andrew Bradford                   1 (0.1%)
+   Tim Harvey                        1 (0.1%)
+   jason                             1 (0.1%)
+   Radhey Shyam Pandey               1 (0.1%)
+   Steven Miao                       1 (0.1%)
+   Minal Shah                        1 (0.1%)
+   Christoph G. Baumann              1 (0.1%)
+   Oliver Metz                       1 (0.1%)
+   Mateusz Zalega                    1 (0.1%)
+   Michael Burr                      1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   25093 (24.7%)
+   Nobuhiro Iwamatsu                 8890 (8.8%)
+   Eric Nelson                       5909 (5.8%)
+   Rajeshwari S Shinde               5438 (5.4%)
+   Vivek Gautam                      4654 (4.6%)
+   Tom Rini                          4245 (4.2%)
+   Shengzhou Liu                     3428 (3.4%)
+   Priyanka Jain                     2799 (2.8%)
+   David Feng                        2200 (2.2%)
+   Prabhakar Kushwaha                1977 (1.9%)
+   Rob Herring                       1811 (1.8%)
+   Heiko Schocher                    1630 (1.6%)
+   Fabio Estevam                     1491 (1.5%)
+   Valentin Longchamp                1405 (1.4%)
+   Yoshihiro Shimoda                 1377 (1.4%)
+   Łukasz Majewski                   1372 (1.4%)
+   Simon Glass                       1340 (1.3%)
+   Albert ARIBAUD                    1211 (1.2%)
+   Paul Burton                       1184 (1.2%)
+   Lokesh Vutla                      1177 (1.2%)
+   Stefan Roese                      1055 (1.0%)
+   York Sun                          1029 (1.0%)
+   Wolfgang Denk                     994 (1.0%)
+   Andreas Bießmann                  987 (1.0%)
+   Naveen Krishna Chatradhi          922 (0.9%)
+   Jagannadha Sutradharudu Teki      900 (0.9%)
+   Dan Murphy                        898 (0.9%)
+   Mike Frysinger                    895 (0.9%)
+   Guilherme Maciel Ferreira         863 (0.9%)
+   Tapani Utriainen                  841 (0.8%)
+   Kuo-Jung Su                       816 (0.8%)
+   Ilya Ledvich                      689 (0.7%)
+   Marek Vasut                       684 (0.7%)
+   Bo Shen                           668 (0.7%)
+   Alban Bedel                       664 (0.7%)
+   Jagan Teki                        595 (0.6%)
+   Troy Kisky                        589 (0.6%)
+   Roger Quadros                     514 (0.5%)
+   Nikita Kiryanov                   488 (0.5%)
+   Chin Liang See                    476 (0.5%)
+   Giuseppe Pagano                   435 (0.4%)
+   Przemyslaw Marczak                419 (0.4%)
+   Piotr Wilczek                     346 (0.3%)
+   pekon gupta                       346 (0.3%)
+   Mateusz Kulikowski                333 (0.3%)
+   Claudiu Manoil                    320 (0.3%)
+   SRICHARAN R                       308 (0.3%)
+   Samuel Egli                       305 (0.3%)
+   Ying Zhang                        298 (0.3%)
+   Zhao Qiang                        273 (0.3%)
+   Viktar Palstsiuk                  262 (0.3%)
+   Scott Wood                        232 (0.2%)
+   Henrik Nordström                  223 (0.2%)
+   Miao Yan                          215 (0.2%)
+   Igor Grinberg                     155 (0.2%)
+   trem                              153 (0.2%)
+   Mateusz Zalega                    138 (0.1%)
+   Stefano Babic                     112 (0.1%)
+   Vladimir Zapolskiy                106 (0.1%)
+   Oleg Kosheliev                    106 (0.1%)
+   Stephen Warren                    105 (0.1%)
+   Sekhar Nori                       103 (0.1%)
+   Otavio Salvador                   96 (0.1%)
+   Alexey Brodkin                    95 (0.1%)
+   Thierry Reding                    84 (0.1%)
+   ramneek mehresh                   82 (0.1%)
+   Sonic Zhang                       73 (0.1%)
+   Shaohui Xie                       68 (0.1%)
+   Arpit Goel                        68 (0.1%)
+   Hardik Patel                      66 (0.1%)
+   Haijun.Zhang                      59 (0.1%)
+   Jimmy Zhang                       59 (0.1%)
+   Chander Kashyap                   53 (0.1%)
+   Srikanth Thokala                  53 (0.1%)
+   Luka Perkov                       50 (0.0%)
+   Sergei Ianovich                   49 (0.0%)
+   Lars Poeschel                     49 (0.0%)
+   Axel Lin                          48 (0.0%)
+   Pierre Aubert                     47 (0.0%)
+   Markus Niebel                     44 (0.0%)
+   Po Liu                            39 (0.0%)
+   Yegor Yefremov                    38 (0.0%)
+   Rojhalat Ibrahim                  38 (0.0%)
+   Michal Simek                      37 (0.0%)
+   Andrew Ruder                      36 (0.0%)
+   Julius Werner                     34 (0.0%)
+   Wu, Josh                          31 (0.0%)
+   Laurentiu TUDOR                   31 (0.0%)
+   Egbert Eich                       31 (0.0%)
+   Jaehoon Chung                     30 (0.0%)
+   Ma Haijun                         29 (0.0%)
+   Sergey Alyoshin                   28 (0.0%)
+   Inderpal Singh                    27 (0.0%)
+   Steven Miao                       21 (0.0%)
+   Darwin Rambo                      20 (0.0%)
+   Suriyan Ramasami                  16 (0.0%)
+   Oliver Metz                       15 (0.0%)
+   Yen Lin                           13 (0.0%)
+   Christoph G. Baumann              13 (0.0%)
+   Thomas Weber                      12 (0.0%)
+   Andre Heider                      12 (0.0%)
+   Jens Scharsig (BuS Elektronik)    11 (0.0%)
+   Mark Langsdorf                    11 (0.0%)
+   Karlheinz Jerg                    11 (0.0%)
+   John Weber                        10 (0.0%)
+   Minal Shah                        10 (0.0%)
+   Minkyu Kang                       9 (0.0%)
+   Lubomir Popov                     9 (0.0%)
+   Anatolij Gustschin                9 (0.0%)
+   Soren Brinkmann                   8 (0.0%)
+   Zang Roy-R61911                   8 (0.0%)
+   Tim Harvey                        8 (0.0%)
+   Jeroen Hofstee                    7 (0.0%)
+   Poddar, Sourav                    7 (0.0%)
+   Roger Meier                       7 (0.0%)
+   Michael Burr                      7 (0.0%)
+   Bhupesh Sharma                    6 (0.0%)
+   Javier Martinez Canillas          6 (0.0%)
+   Michael Trimarchi                 5 (0.0%)
+   David Dueck                       5 (0.0%)
+   Gabor Juhos                       5 (0.0%)
+   Andrew Bradford                   5 (0.0%)
+   Antonios Vamporakis               4 (0.0%)
+   Mugunthan V N                     4 (0.0%)
+   Kees Jongenburger                 4 (0.0%)
+   Dave Liu                          4 (0.0%)
+   Liu Ying                          3 (0.0%)
+   Ionut Nicu                        3 (0.0%)
+   Che-Liang Chiou                   3 (0.0%)
+   Stany MARCEL                      3 (0.0%)
+   Sascha Silbe                      3 (0.0%)
+   Robert Nelson                     2 (0.0%)
+   Ezequiel Garcia                   2 (0.0%)
+   Andrew Gabbasov                   2 (0.0%)
+   Christian Gmeiner                 2 (0.0%)
+   Hisashi Nakamura                  2 (0.0%)
+   Siva Durga Prasad Paladugu        2 (0.0%)
+   Jim Lin                           2 (0.0%)
+   Vidya Sagar                       2 (0.0%)
+   Frank Li                          2 (0.0%)
+   Tang Yuantian                     2 (0.0%)
+   Stephan Bauroth                   2 (0.0%)
+   Daniel Schwierzeck                2 (0.0%)
+   Michael Heimpold                  2 (0.0%)
+   jason                             2 (0.0%)
+   Radhey Shyam Pandey               2 (0.0%)
+   Charles Manning                   1 (0.0%)
+   Lad, Prabhakar                    1 (0.0%)
+   Holger Brunck                     1 (0.0%)
+   Ian Campbell                      1 (0.0%)
+   Vladimir Koutny                   1 (0.0%)
+   Matt Porter                       1 (0.0%)
+   Chunhe Lan                        1 (0.0%)
+   rockly                            1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   20766 (41.5%)
+   Tom Rini                          3933 (7.9%)
+   Rob Herring                       1586 (3.2%)
+   Eric Nelson                       1163 (2.3%)
+   Wolfgang Denk                     986 (2.0%)
+   Albert ARIBAUD                    945 (1.9%)
+   Stefan Roese                      570 (1.1%)
+   Vladimir Zapolskiy                100 (0.2%)
+   Luka Perkov                       13 (0.0%)
+   Axel Lin                          8 (0.0%)
+   Soren Brinkmann                   8 (0.0%)
+   Sergei Ianovich                   7 (0.0%)
+   Jens Scharsig (BuS Elektronik)    7 (0.0%)
+   Yen Lin                           5 (0.0%)
+   Michael Trimarchi                 3 (0.0%)
+   Egbert Eich                       2 (0.0%)
+   Che-Liang Chiou                   2 (0.0%)
+   Radhey Shyam Pandey               2 (0.0%)
+   Charles Manning                   1 (0.0%)
+   Lad, Prabhakar                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 235)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagannadha Sutradharudu Teki      34 (14.5%)
+   Minkyu Kang                       26 (11.1%)
+   Andreas Bießmann                  25 (10.6%)
+   Kyungmin Park                     14 (6.0%)
+   Simon Glass                       11 (4.7%)
+   Hisashi Nakamura                  9 (3.8%)
+   Tom Warren                        9 (3.8%)
+   Akshay Saraswat                   7 (3.0%)
+   Igor Grinberg                     6 (2.6%)
+   Tom Rini                          5 (2.1%)
+   Poonam Aggrwal                    5 (2.1%)
+   Sonic Zhang                       5 (2.1%)
+   Michal Simek                      5 (2.1%)
+   Nobuhiro Iwamatsu                 5 (2.1%)
+   Kouei Abe                         4 (1.7%)
+   Scott Wood                        4 (1.7%)
+   Anson Huang                       3 (1.3%)
+   Vadim Bendebury                   3 (1.3%)
+   Vikas C Sajjan                    3 (1.3%)
+   David Feng                        3 (1.3%)
+   Bhupesh Sharma                    2 (0.9%)
+   Mathias Rulf                      2 (0.9%)
+   Jon Nettleton                     2 (0.9%)
+   Jason Liu                         2 (0.9%)
+   Alim Akhtar                       2 (0.9%)
+   Ryo Kataoka                       2 (0.9%)
+   Anatolij Gustschin                2 (0.9%)
+   Roger Meier                       2 (0.9%)
+   Shaohui Xie                       2 (0.9%)
+   Lokesh Vutla                      2 (0.9%)
+   Naveen Krishna Chatradhi          2 (0.9%)
+   Prabhakar Kushwaha                2 (0.9%)
+   Vivek Gautam                      2 (0.9%)
+   Stefan Roese                      1 (0.4%)
+   Daniel Schwierzeck                1 (0.4%)
+   Holger Brunck                     1 (0.4%)
+   Måns Rullgård                     1 (0.4%)
+   Rabeeh Khoury                     1 (0.4%)
+   Boris Schmidt                     1 (0.4%)
+   Tom Wai-Hong Tam                  1 (0.4%)
+   Rockly                            1 (0.4%)
+   Their Name                        1 (0.4%)
+   Pascal Bach                       1 (0.4%)
+   Jason Jin                         1 (0.4%)
+   Xie Shaohui-B21989                1 (0.4%)
+   Stefan Bigler                     1 (0.4%)
+   R. Chandrasekar                   1 (0.4%)
+   Zang Roy-R61911                   1 (0.4%)
+   Julius Werner                     1 (0.4%)
+   Inderpal Singh                    1 (0.4%)
+   Chander Kashyap                   1 (0.4%)
+   Thierry Reding                    1 (0.4%)
+   Otavio Salvador                   1 (0.4%)
+   Stephen Warren                    1 (0.4%)
+   Heiko Schocher                    1 (0.4%)
+   Priyanka Jain                     1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 45)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagannadha Sutradharudu Teki      9 (20.0%)
+   Hung-ying Tyan                    6 (13.3%)
+   Simon Glass                       5 (11.1%)
+   Fabio Estevam                     5 (11.1%)
+   Stefan Roese                      4 (8.9%)
+   Benoît Thébaudeau                 4 (8.9%)
+   Heiko Schocher                    3 (6.7%)
+   Tom Warren                        1 (2.2%)
+   Naveen Krishna Chatradhi          1 (2.2%)
+   Stephen Warren                    1 (2.2%)
+   Che-Liang Chiou                   1 (2.2%)
+   Tim Kryger                        1 (2.2%)
+   Steve Rae                         1 (2.2%)
+   Julian Scheel                     1 (2.2%)
+   Andre Heider                      1 (2.2%)
+   Łukasz Majewski                   1 (2.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 30)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Nikita Kiryanov                   3 (10.0%)
+   Fabio Estevam                     2 (6.7%)
+   Stephen Warren                    2 (6.7%)
+   Łukasz Majewski                   2 (6.7%)
+   Jens Scharsig (BuS Elektronik)    2 (6.7%)
+   Yebio Mesfin                      2 (6.7%)
+   Bo Shen                           2 (6.7%)
+   Ilya Ledvich                      2 (6.7%)
+   Stefan Roese                      1 (3.3%)
+   Naveen Krishna Chatradhi          1 (3.3%)
+   Che-Liang Chiou                   1 (3.3%)
+   Tom Rini                          1 (3.3%)
+   Michal Simek                      1 (3.3%)
+   Eric Nelson                       1 (3.3%)
+   Matt Porter                       1 (3.3%)
+   Thomas Petazzoni                  1 (3.3%)
+   Ryan Barnett                      1 (3.3%)
+   Jaehoon Chung                     1 (3.3%)
+   Lubomir Popov                     1 (3.3%)
+   Piotr Wilczek                     1 (3.3%)
+   Rajeshwari S Shinde               1 (3.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 30)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Igor Grinberg                     5 (16.7%)
+   Heiko Schocher                    4 (13.3%)
+   Nikita Kiryanov                   2 (6.7%)
+   Andreas Bießmann                  2 (6.7%)
+   Poddar, Sourav                    2 (6.7%)
+   Giuseppe Pagano                   2 (6.7%)
+   Fabio Estevam                     1 (3.3%)
+   Bo Shen                           1 (3.3%)
+   Che-Liang Chiou                   1 (3.3%)
+   Tom Rini                          1 (3.3%)
+   Piotr Wilczek                     1 (3.3%)
+   Albert ARIBAUD                    1 (3.3%)
+   Axel Lin                          1 (3.3%)
+   Egbert Eich                       1 (3.3%)
+   Jim Lin                           1 (3.3%)
+   Haijun.Zhang                      1 (3.3%)
+   Alexey Brodkin                    1 (3.3%)
+   pekon gupta                       1 (3.3%)
+   Alban Bedel                       1 (3.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 18)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tomi Valkeinen                    3 (16.7%)
+   Otavio Salvador                   2 (11.1%)
+   Robin Gong                        2 (11.1%)
+   Stefan Roese                      1 (5.6%)
+   Andre Heider                      1 (5.6%)
+   Ian Campbell                      1 (5.6%)
+   Alexey Smishlayev                 1 (5.6%)
+   Nishanth Menon                    1 (5.6%)
+   Rajendran, Vinothkumar            1 (5.6%)
+   Chao Xu                           1 (5.6%)
+   Griffis, Brad                     1 (5.6%)
+   Pavel Nakonechny                  1 (5.6%)
+   Sven Schwermer                    1 (5.6%)
+   Pierre Aubert                     1 (5.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 18)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Lokesh Vutla                      4 (22.2%)
+   Roger Quadros                     3 (16.7%)
+   Fabio Estevam                     2 (11.1%)
+   Liu Ying                          2 (11.1%)
+   Heiko Schocher                    1 (5.6%)
+   Andreas Bießmann                  1 (5.6%)
+   Tom Rini                          1 (5.6%)
+   pekon gupta                       1 (5.6%)
+   Stephen Warren                    1 (5.6%)
+   Michal Simek                      1 (5.6%)
+   Rob Herring                       1 (5.6%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         165 (16.8%)
+   Freescale                         147 (15.0%)
+   Socionext Inc.                    127 (13.0%)
+   Samsung                           74 (7.6%)
+   Texas Instruments                 57 (5.8%)
+   DENX Software Engineering         54 (5.5%)
+   Xilinx                            53 (5.4%)
+   Renesas Electronics               43 (4.4%)
+   Konsulko Group                    34 (3.5%)
+   Boundary Devices                  30 (3.1%)
+   CompuLab                          26 (2.7%)
+   MIPS                              24 (2.4%)
+   Google, Inc.                      23 (2.3%)
+   Atmel                             23 (2.3%)
+   Calxeda                           18 (1.8%)
+   Analog Devices                    13 (1.3%)
+   Keymile                           13 (1.3%)
+   Nobuhiro Iwamatsu                 11 (1.1%)
+   O.S. Systems                      8 (0.8%)
+   Wind River                        7 (0.7%)
+   NVidia                            6 (0.6%)
+   AMD                               4 (0.4%)
+   BuS Elektronik                    4 (0.4%)
+   Linaro                            3 (0.3%)
+   Novell                            3 (0.3%)
+   Amarula Solutions                 2 (0.2%)
+   Broadcom                          2 (0.2%)
+   Promwad                           2 (0.2%)
+   Siemens                           2 (0.2%)
+   Free Electrons                    1 (0.1%)
+   TQ Systems                        1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Socionext Inc.                    25093 (24.7%)
+   Samsung                           13328 (13.1%)
+   Freescale                         12220 (12.0%)
+   (Unknown)                         10272 (10.1%)
+   Renesas Electronics               10033 (9.9%)
+   Boundary Devices                  6498 (6.4%)
+   DENX Software Engineering         4484 (4.4%)
+   Konsulko Group                    4245 (4.2%)
+   Texas Instruments                 3473 (3.4%)
+   Calxeda                           1822 (1.8%)
+   Xilinx                            1560 (1.5%)
+   Keymile                           1417 (1.4%)
+   Google, Inc.                      1343 (1.3%)
+   CompuLab                          1332 (1.3%)
+   MIPS                              1184 (1.2%)
+   Analog Devices                    968 (1.0%)
+   Atmel                             695 (0.7%)
+   Siemens                           312 (0.3%)
+   Promwad                           262 (0.3%)
+   Nobuhiro Iwamatsu                 236 (0.2%)
+   Wind River                        215 (0.2%)
+   NVidia                            99 (0.1%)
+   O.S. Systems                      96 (0.1%)
+   Linaro                            81 (0.1%)
+   TQ Systems                        44 (0.0%)
+   AMD                               37 (0.0%)
+   Novell                            31 (0.0%)
+   Broadcom                          20 (0.0%)
+   BuS Elektronik                    11 (0.0%)
+   Amarula Solutions                 5 (0.0%)
+   Free Electrons                    2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 235)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Samsung                           57 (24.3%)
+   Xilinx                            39 (16.6%)
+   (Unknown)                         37 (15.7%)
+   Freescale                         24 (10.2%)
+   Renesas Electronics               16 (6.8%)
+   Google, Inc.                      15 (6.4%)
+   NVidia                            11 (4.7%)
+   Texas Instruments                 7 (3.0%)
+   CompuLab                          6 (2.6%)
+   Analog Devices                    5 (2.1%)
+   DENX Software Engineering         4 (1.7%)
+   Siemens                           4 (1.7%)
+   Nobuhiro Iwamatsu                 4 (1.7%)
+   Keymile                           2 (0.9%)
+   Linaro                            2 (0.9%)
+   O.S. Systems                      1 (0.4%)
+   Funky                             1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 157)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         61 (38.9%)
+   Freescale                         22 (14.0%)
+   Texas Instruments                 10 (6.4%)
+   Samsung                           9 (5.7%)
+   Xilinx                            6 (3.8%)
+   DENX Software Engineering         6 (3.8%)
+   NVidia                            5 (3.2%)
+   Renesas Electronics               3 (1.9%)
+   CompuLab                          3 (1.9%)
+   Keymile                           3 (1.9%)
+   Linaro                            3 (1.9%)
+   Google, Inc.                      2 (1.3%)
+   Analog Devices                    2 (1.3%)
+   Siemens                           2 (1.3%)
+   Boundary Devices                  2 (1.3%)
+   Calxeda                           2 (1.3%)
+   Atmel                             2 (1.3%)
+   Nobuhiro Iwamatsu                 1 (0.6%)
+   O.S. Systems                      1 (0.6%)
+   Socionext Inc.                    1 (0.6%)
+   Konsulko Group                    1 (0.6%)
+   MIPS                              1 (0.6%)
+   Promwad                           1 (0.6%)
+   Wind River                        1 (0.6%)
+   TQ Systems                        1 (0.6%)
+   AMD                               1 (0.6%)
+   Novell                            1 (0.6%)
+   Broadcom                          1 (0.6%)
+   BuS Elektronik                    1 (0.6%)
+   Amarula Solutions                 1 (0.6%)
+   Free Electrons                    1 (0.6%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2014.04.rst b/doc/develop/statistics/u-boot-stats-v2014.04.rst
new file mode 100644
index 00000000000..a794b113e93
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2014.04.rst
@@ -0,0 +1,568 @@
+:orphan:
+
+Release Statistics for U-Boot v2014.04
+======================================
+
+* Processed 769 changesets from 109 developers
+
+* 26 employers found
+
+* A total of 66836 lines added, 112896 removed (delta -46060)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   162 (21.1%)
+   Stephen Warren                    56 (7.3%)
+   Simon Glass                       42 (5.5%)
+   Marek Vasut                       38 (4.9%)
+   Tom Rini                          35 (4.6%)
+   Michal Simek                      29 (3.8%)
+   Alexey Brodkin                    26 (3.4%)
+   Przemyslaw Marczak                24 (3.1%)
+   Piotr Wilczek                     20 (2.6%)
+   Fabio Estevam                     17 (2.2%)
+   Łukasz Majewski                   13 (1.7%)
+   York Sun                          12 (1.6%)
+   Otavio Salvador                   11 (1.4%)
+   Tom Warren                        9 (1.2%)
+   pekon gupta                       9 (1.2%)
+   Shengzhou Liu                     8 (1.0%)
+   Prabhakar Kushwaha                8 (1.0%)
+   Enric Balletbo i Serra            8 (1.0%)
+   Darwin Rambo                      8 (1.0%)
+   Stefano Babic                     7 (0.9%)
+   Heiko Schocher                    7 (0.9%)
+   Soren Brinkmann                   7 (0.9%)
+   Valentin Longchamp                7 (0.9%)
+   Haijun.Zhang                      6 (0.8%)
+   Hannes Petermaier                 6 (0.8%)
+   Gerhard Sittig                    6 (0.8%)
+   Stefan Roese                      6 (0.8%)
+   Priyanka Jain                     6 (0.8%)
+   Mugunthan V N                     6 (0.8%)
+   Shaveta Leekha                    5 (0.7%)
+   Sonic Zhang                       5 (0.7%)
+   Dan Murphy                        5 (0.7%)
+   Sourav Poddar                     5 (0.7%)
+   Markus Niebel                     5 (0.7%)
+   Holger Brunck                     5 (0.7%)
+   Marcel Ziswiler                   4 (0.5%)
+   Baruch Siach                      4 (0.5%)
+   Axel Lin                          4 (0.5%)
+   Ian Campbell                      4 (0.5%)
+   Bo Shen                           4 (0.5%)
+   Dave Gerlach                      4 (0.5%)
+   Ying Zhang                        4 (0.5%)
+   Nishanth Menon                    4 (0.5%)
+   Andreas Bießmann                  3 (0.4%)
+   Albert ARIBAUD                    3 (0.4%)
+   Nitin Garg                        3 (0.4%)
+   Minkyu Kang                       3 (0.4%)
+   Eric Nelson                       3 (0.4%)
+   Pantelis Antoniou                 3 (0.4%)
+   Gerlando Falauto                  3 (0.4%)
+   Inha Song                         3 (0.4%)
+   Tetsuyuki Kobayashi               2 (0.3%)
+   Nobuhiro Iwamatsu                 2 (0.3%)
+   David Feng                        2 (0.3%)
+   Mela Custodio                     2 (0.3%)
+   Chin Liang See                    2 (0.3%)
+   Andrew Gabbasov                   2 (0.3%)
+   Patrice Bouchand                  2 (0.3%)
+   Vadim Bendebury                   2 (0.3%)
+   Randall Spangler                  2 (0.3%)
+   Dustin Byford                     2 (0.3%)
+   Vasili Galka                      2 (0.3%)
+   Tim Harvey                        2 (0.3%)
+   Andreas Henriksson                2 (0.3%)
+   poonam aggrwal                    2 (0.3%)
+   Lokesh Vutla                      2 (0.3%)
+   Nikhil Badola                     2 (0.3%)
+   Dennis Gilmore                    2 (0.3%)
+   Michael Burr                      2 (0.3%)
+   Rajeshwari Shinde                 2 (0.3%)
+   Siva Durga Prasad Paladugu        2 (0.3%)
+   Anson Huang                       2 (0.3%)
+   Rainer Boschung                   2 (0.3%)
+   Vivek Gautam                      2 (0.3%)
+   Jassi Brar                        2 (0.3%)
+   Po Liu                            2 (0.3%)
+   Linus Walleij                     2 (0.3%)
+   Leo Yan                           1 (0.1%)
+   Andreas Färber                    1 (0.1%)
+   Roger Quadros                     1 (0.1%)
+   Wolfgang Denk                     1 (0.1%)
+   Matthias Fuchs                    1 (0.1%)
+   Jonghwa Lee                       1 (0.1%)
+   Jimmy Zhang                       1 (0.1%)
+   Jagan Teki                        1 (0.1%)
+   Ilya Ledvich                      1 (0.1%)
+   Suresh Gupta                      1 (0.1%)
+   James Hogan                       1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Zhao Qiang                        1 (0.1%)
+   Hector Palacios                   1 (0.1%)
+   Måns Rullgård                     1 (0.1%)
+   Janne Grunau                      1 (0.1%)
+   Lothar Felten                     1 (0.1%)
+   Karicheri, Muralidharan           1 (0.1%)
+   Ionut Nicu                        1 (0.1%)
+   Bhupesh Sharma                    1 (0.1%)
+   Christian Eggers                  1 (0.1%)
+   Scott Jiang                       1 (0.1%)
+   Detlev Zundel                     1 (0.1%)
+   Andy Ng                           1 (0.1%)
+   Aaron Wu                          1 (0.1%)
+   Bob Liu                           1 (0.1%)
+   Novasys Ingenierie                1 (0.1%)
+   Jim Lin                           1 (0.1%)
+   Ezequiel Garcia                   1 (0.1%)
+   rick                              1 (0.1%)
+   Satyanarayana, Sandhya            1 (0.1%)
+   Ramneek Mehresh                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       71940 (44.6%)
+   Masahiro Yamada                   16145 (10.0%)
+   Przemyslaw Marczak                12079 (7.5%)
+   Simon Glass                       11586 (7.2%)
+   Jonghwa Lee                       5783 (3.6%)
+   Tom Warren                        5453 (3.4%)
+   Tom Rini                          3717 (2.3%)
+   Alexey Brodkin                    3607 (2.2%)
+   Darwin Rambo                      3167 (2.0%)
+   Shengzhou Liu                     2274 (1.4%)
+   Tim Harvey                        2272 (1.4%)
+   Piotr Wilczek                     2223 (1.4%)
+   Stefan Roese                      1927 (1.2%)
+   Stephen Warren                    1893 (1.2%)
+   Hannes Petermaier                 1772 (1.1%)
+   Prabhakar Kushwaha                1070 (0.7%)
+   Jassi Brar                        915 (0.6%)
+   Michal Simek                      865 (0.5%)
+   Gerhard Sittig                    854 (0.5%)
+   Chin Liang See                    808 (0.5%)
+   pekon gupta                       803 (0.5%)
+   Soren Brinkmann                   786 (0.5%)
+   Pantelis Antoniou                 640 (0.4%)
+   Bo Shen                           599 (0.4%)
+   Lothar Felten                     559 (0.3%)
+   York Sun                          529 (0.3%)
+   Albert ARIBAUD                    495 (0.3%)
+   Shaveta Leekha                    450 (0.3%)
+   Sonic Zhang                       420 (0.3%)
+   Priyanka Jain                     398 (0.2%)
+   Fabio Estevam                     338 (0.2%)
+   Po Liu                            329 (0.2%)
+   Dan Murphy                        316 (0.2%)
+   David Feng                        306 (0.2%)
+   Ying Zhang                        304 (0.2%)
+   Enric Balletbo i Serra            294 (0.2%)
+   Valentin Longchamp                279 (0.2%)
+   Mugunthan V N                     235 (0.1%)
+   Heiko Schocher                    191 (0.1%)
+   Vadim Bendebury                   155 (0.1%)
+   Łukasz Majewski                   143 (0.1%)
+   Sourav Poddar                     142 (0.1%)
+   Stefano Babic                     131 (0.1%)
+   Ionut Nicu                        130 (0.1%)
+   Suresh Gupta                      128 (0.1%)
+   Jimmy Zhang                       118 (0.1%)
+   Rajeshwari Shinde                 103 (0.1%)
+   Otavio Salvador                   101 (0.1%)
+   Randall Spangler                  98 (0.1%)
+   rick                              85 (0.1%)
+   Rainer Boschung                   82 (0.1%)
+   Scott Jiang                       80 (0.0%)
+   Dennis Gilmore                    74 (0.0%)
+   poonam aggrwal                    72 (0.0%)
+   Inha Song                         70 (0.0%)
+   Axel Lin                          68 (0.0%)
+   Haijun.Zhang                      65 (0.0%)
+   Gerlando Falauto                  62 (0.0%)
+   Patrice Bouchand                  57 (0.0%)
+   Michael Burr                      53 (0.0%)
+   Andreas Henriksson                49 (0.0%)
+   Marcel Ziswiler                   46 (0.0%)
+   Andrew Gabbasov                   42 (0.0%)
+   Nishanth Menon                    40 (0.0%)
+   Anson Huang                       31 (0.0%)
+   Dave Gerlach                      29 (0.0%)
+   Ian Campbell                      24 (0.0%)
+   Markus Niebel                     23 (0.0%)
+   Vivek Gautam                      22 (0.0%)
+   Daniel Schwierzeck                20 (0.0%)
+   Holger Brunck                     18 (0.0%)
+   Janne Grunau                      18 (0.0%)
+   Roger Quadros                     16 (0.0%)
+   Eric Nelson                       13 (0.0%)
+   Baruch Siach                      12 (0.0%)
+   Bhupesh Sharma                    12 (0.0%)
+   Andreas Bießmann                  11 (0.0%)
+   Dustin Byford                     11 (0.0%)
+   Nitin Garg                        10 (0.0%)
+   Novasys Ingenierie                10 (0.0%)
+   Minkyu Kang                       9 (0.0%)
+   Mela Custodio                     9 (0.0%)
+   Karicheri, Muralidharan           9 (0.0%)
+   Matthias Fuchs                    7 (0.0%)
+   Vasili Galka                      6 (0.0%)
+   Linus Walleij                     6 (0.0%)
+   Jagan Teki                        6 (0.0%)
+   Andy Ng                           6 (0.0%)
+   Ilya Ledvich                      5 (0.0%)
+   Hector Palacios                   5 (0.0%)
+   Aaron Wu                          5 (0.0%)
+   Ramneek Mehresh                   5 (0.0%)
+   Tetsuyuki Kobayashi               4 (0.0%)
+   Siva Durga Prasad Paladugu        4 (0.0%)
+   Måns Rullgård                     4 (0.0%)
+   Ezequiel Garcia                   4 (0.0%)
+   Satyanarayana, Sandhya            4 (0.0%)
+   Nobuhiro Iwamatsu                 3 (0.0%)
+   Nikhil Badola                     3 (0.0%)
+   Leo Yan                           3 (0.0%)
+   Lokesh Vutla                      2 (0.0%)
+   Andreas Färber                    2 (0.0%)
+   Wolfgang Denk                     2 (0.0%)
+   Christian Eggers                  2 (0.0%)
+   James Hogan                       1 (0.0%)
+   Zhao Qiang                        1 (0.0%)
+   Detlev Zundel                     1 (0.0%)
+   Bob Liu                           1 (0.0%)
+   Jim Lin                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       69052 (61.2%)
+   Masahiro Yamada                   7038 (6.2%)
+   Jonghwa Lee                       2169 (1.9%)
+   Stefan Roese                      1843 (1.6%)
+   Jassi Brar                        915 (0.8%)
+   Tom Rini                          673 (0.6%)
+   pekon gupta                       481 (0.4%)
+   Stephen Warren                    361 (0.3%)
+   Albert ARIBAUD                    252 (0.2%)
+   Enric Balletbo i Serra            78 (0.1%)
+   Rajeshwari Shinde                 65 (0.1%)
+   Stefano Babic                     59 (0.1%)
+   Vadim Bendebury                   44 (0.0%)
+   Axel Lin                          43 (0.0%)
+   Inha Song                         42 (0.0%)
+   Vivek Gautam                      19 (0.0%)
+   Daniel Schwierzeck                17 (0.0%)
+   Minkyu Kang                       6 (0.0%)
+   Ilya Ledvich                      4 (0.0%)
+   Måns Rullgård                     3 (0.0%)
+   Karicheri, Muralidharan           2 (0.0%)
+   Hector Palacios                   2 (0.0%)
+   Leo Yan                           2 (0.0%)
+   Nobuhiro Iwamatsu                 1 (0.0%)
+   Nikhil Badola                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 207)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Minkyu Kang                       41 (19.8%)
+   Tom Warren                        25 (12.1%)
+   Kyungmin Park                     20 (9.7%)
+   Michal Simek                      12 (5.8%)
+   Stephen Warren                    11 (5.3%)
+   Pantelis Antoniou                 11 (5.3%)
+   York Sun                          9 (4.3%)
+   Tom Rini                          6 (2.9%)
+   Nobuhiro Iwamatsu                 6 (2.9%)
+   Andreas Bießmann                  6 (2.9%)
+   Simon Glass                       6 (2.9%)
+   poonam aggrwal                    5 (2.4%)
+   Marek Vasut                       4 (1.9%)
+   Pavel Herrmann                    4 (1.9%)
+   Viktor Křivák                     4 (1.9%)
+   Tomas Hlavacek                    4 (1.9%)
+   Valentin Longchamp                4 (1.9%)
+   Stefan Agner                      3 (1.4%)
+   Jaehoon Chung                     3 (1.4%)
+   Sonic Zhang                       3 (1.4%)
+   Rommel G Custodio                 2 (1.0%)
+   Thomas Chou                       2 (1.0%)
+   Arpit Goel                        2 (1.0%)
+   Holger Brunck                     2 (1.0%)
+   Priyanka Jain                     2 (1.0%)
+   Lokesh Vutla                      1 (0.5%)
+   Jagannadha Sutradharudu Teki      1 (0.5%)
+   Shaohui Xie                       1 (0.5%)
+   Uday Hegde                        1 (0.5%)
+   Stany MARCEL                      1 (0.5%)
+   Kuan-Yu Kuo                       1 (0.5%)
+   Bhupesh Sharma                    1 (0.5%)
+   Łukasz Majewski                   1 (0.5%)
+   Jimmy Zhang                       1 (0.5%)
+   Prabhakar Kushwaha                1 (0.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 111)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   York Sun                          43 (38.7%)
+   Jagannadha Sutradharudu Teki      13 (11.7%)
+   Thierry Reding                    8 (7.2%)
+   Simon Glass                       7 (6.3%)
+   Steve Rae                         7 (6.3%)
+   Tim Kryger                        7 (6.3%)
+   Vadim Bendebury                   5 (4.5%)
+   Tom Rini                          3 (2.7%)
+   Lokesh Vutla                      3 (2.7%)
+   Felipe Balbi                      2 (1.8%)
+   Roger Quadros                     2 (1.8%)
+   Łukasz Majewski                   1 (0.9%)
+   Stefano Babic                     1 (0.9%)
+   Che-Liang Chiou                   1 (0.9%)
+   Andrew Chew                       1 (0.9%)
+   Hung-ying Tyan                    1 (0.9%)
+   Markus Mayer                      1 (0.9%)
+   Sricharan R                       1 (0.9%)
+   Andreas Färber                    1 (0.9%)
+   Randall Spangler                  1 (0.9%)
+   Dennis Gilmore                    1 (0.9%)
+   Fabio Estevam                     1 (0.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 52)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Thierry Reding                    21 (40.4%)
+   Che-Liang Chiou                   7 (13.5%)
+   Simon Glass                       4 (7.7%)
+   Gerhard Sittig                    4 (7.7%)
+   Heiko Schocher                    3 (5.8%)
+   Vadim Bendebury                   2 (3.8%)
+   Łukasz Majewski                   2 (3.8%)
+   Jagannadha Sutradharudu Teki      1 (1.9%)
+   Andrew Chew                       1 (1.9%)
+   Dennis Gilmore                    1 (1.9%)
+   Stephen Warren                    1 (1.9%)
+   Andreas Bießmann                  1 (1.9%)
+   Marek Vasut                       1 (1.9%)
+   Hyungwon Hwang                    1 (1.9%)
+   Matthias Fuchs                    1 (1.9%)
+   Bo Shen                           1 (1.9%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 52)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stephen Warren                    13 (25.0%)
+   Masahiro Yamada                   11 (21.2%)
+   Tom Warren                        9 (17.3%)
+   Simon Glass                       8 (15.4%)
+   Vadim Bendebury                   2 (3.8%)
+   Przemyslaw Marczak                2 (3.8%)
+   Marek Vasut                       1 (1.9%)
+   Andreas Färber                    1 (1.9%)
+   Jimmy Zhang                       1 (1.9%)
+   Stefan Roese                      1 (1.9%)
+   Inha Song                         1 (1.9%)
+   Hector Palacios                   1 (1.9%)
+   Jim Lin                           1 (1.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   3 (14.3%)
+   Simon Glass                       2 (9.5%)
+   Andreas Bießmann                  2 (9.5%)
+   Wolfgang Denk                     2 (9.5%)
+   Heiko Schocher                    1 (4.8%)
+   Łukasz Majewski                   1 (4.8%)
+   Dennis Gilmore                    1 (4.8%)
+   Bo Shen                           1 (4.8%)
+   Tom Rini                          1 (4.8%)
+   Eli Nidam                         1 (4.8%)
+   Pierre AUBERT                     1 (4.8%)
+   Russell King                      1 (4.8%)
+   Praveen Rao                       1 (4.8%)
+   Abraham Varricatt                 1 (4.8%)
+   Olof Johansson                    1 (4.8%)
+   Nishanth Menon                    1 (4.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   8 (38.1%)
+   Stephen Warren                    5 (23.8%)
+   Tom Rini                          2 (9.5%)
+   Nobuhiro Iwamatsu                 2 (9.5%)
+   Nishanth Menon                    1 (4.8%)
+   Roger Quadros                     1 (4.8%)
+   Måns Rullgård                     1 (4.8%)
+   Ezequiel Garcia                   1 (4.8%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Socionext Inc.                    162 (21.1%)
+   (Unknown)                         124 (16.1%)
+   Freescale                         81 (10.5%)
+   Samsung                           68 (8.8%)
+   DENX Software Engineering         66 (8.6%)
+   NVidia                            47 (6.1%)
+   Google, Inc.                      44 (5.7%)
+   Texas Instruments                 38 (4.9%)
+   Konsulko Group                    35 (4.6%)
+   AMD                               29 (3.8%)
+   Keymile                           17 (2.2%)
+   O.S. Systems                      11 (1.4%)
+   Xilinx                            10 (1.3%)
+   Broadcom                          8 (1.0%)
+   Analog Devices                    6 (0.8%)
+   Atmel                             4 (0.5%)
+   Linaro                            4 (0.5%)
+   TQ Systems                        4 (0.5%)
+   Boundary Devices                  3 (0.4%)
+   Renesas Electronics               2 (0.3%)
+   CompuLab                          1 (0.1%)
+   Digi International                1 (0.1%)
+   ESD Electronics                   1 (0.1%)
+   Free Electrons                    1 (0.1%)
+   Marvell                           1 (0.1%)
+   Novell                            1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         75046 (46.6%)
+   Samsung                           20432 (12.7%)
+   (Unknown)                         18319 (11.4%)
+   Socionext Inc.                    16145 (10.0%)
+   Google, Inc.                      11741 (7.3%)
+   Freescale                         6019 (3.7%)
+   Konsulko Group                    3717 (2.3%)
+   Broadcom                          3167 (2.0%)
+   Texas Instruments                 1596 (1.0%)
+   Linaro                            921 (0.6%)
+   AMD                               865 (0.5%)
+   NVidia                            828 (0.5%)
+   Xilinx                            796 (0.5%)
+   Atmel                             599 (0.4%)
+   Keymile                           441 (0.3%)
+   Analog Devices                    425 (0.3%)
+   O.S. Systems                      101 (0.1%)
+   TQ Systems                        15 (0.0%)
+   Boundary Devices                  13 (0.0%)
+   ESD Electronics                   7 (0.0%)
+   CompuLab                          5 (0.0%)
+   Digi International                5 (0.0%)
+   Free Electrons                    4 (0.0%)
+   Renesas Electronics               3 (0.0%)
+   Marvell                           3 (0.0%)
+   Novell                            2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 207)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Samsung                           65 (31.4%)
+   (Unknown)                         38 (18.4%)
+   NVidia                            37 (17.9%)
+   Freescale                         21 (10.1%)
+   Xilinx                            14 (6.8%)
+   Texas Instruments                 7 (3.4%)
+   Google, Inc.                      6 (2.9%)
+   Keymile                           6 (2.9%)
+   Nobuhiro Iwamatsu                 6 (2.9%)
+   DENX Software Engineering         4 (1.9%)
+   Analog Devices                    3 (1.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 111)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         38 (34.2%)
+   Freescale                         17 (15.3%)
+   Texas Instruments                 10 (9.0%)
+   Samsung                           8 (7.2%)
+   DENX Software Engineering         7 (6.3%)
+   Keymile                           4 (3.6%)
+   NVidia                            3 (2.7%)
+   Xilinx                            3 (2.7%)
+   Google, Inc.                      2 (1.8%)
+   Analog Devices                    2 (1.8%)
+   Linaro                            2 (1.8%)
+   Socionext Inc.                    1 (0.9%)
+   Konsulko Group                    1 (0.9%)
+   Broadcom                          1 (0.9%)
+   AMD                               1 (0.9%)
+   Atmel                             1 (0.9%)
+   O.S. Systems                      1 (0.9%)
+   TQ Systems                        1 (0.9%)
+   Boundary Devices                  1 (0.9%)
+   ESD Electronics                   1 (0.9%)
+   CompuLab                          1 (0.9%)
+   Digi International                1 (0.9%)
+   Free Electrons                    1 (0.9%)
+   Renesas Electronics               1 (0.9%)
+   Marvell                           1 (0.9%)
+   Novell                            1 (0.9%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2014.07.rst b/doc/develop/statistics/u-boot-stats-v2014.07.rst
new file mode 100644
index 00000000000..d3b47f6a74c
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2014.07.rst
@@ -0,0 +1,720 @@
+:orphan:
+
+Release Statistics for U-Boot v2014.07
+======================================
+
+* Processed 1074 changesets from 146 developers
+
+* 30 employers found
+
+* A total of 65681 lines added, 100024 removed (delta -34343)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   123 (11.5%)
+   Stephen Warren                    91 (8.5%)
+   Simon Glass                       82 (7.6%)
+   Nobuhiro Iwamatsu                 49 (4.6%)
+   Tom Rini                          40 (3.7%)
+   Michal Simek                      33 (3.1%)
+   Jeroen Hofstee                    33 (3.1%)
+   Fabio Estevam                     24 (2.2%)
+   Tim Harvey                        22 (2.0%)
+   Prabhakar Kushwaha                20 (1.9%)
+   Wu, Josh                          19 (1.8%)
+   York Sun                          19 (1.8%)
+   Heiko Schocher                    18 (1.7%)
+   Ian Campbell                      15 (1.4%)
+   pekon gupta                       15 (1.4%)
+   Mateusz Zalega                    15 (1.4%)
+   Marek Vasut                       14 (1.3%)
+   Dirk Eibach                       13 (1.2%)
+   Ash Charles                       13 (1.2%)
+   Jaehoon Chung                     13 (1.2%)
+   Lukasz Majewski                   12 (1.1%)
+   Akshay Saraswat                   12 (1.1%)
+   Siva Durga Prasad Paladugu        12 (1.1%)
+   Shengzhou Liu                     12 (1.1%)
+   Aneesh Bansal                     12 (1.1%)
+   Paul Burton                       11 (1.0%)
+   Nishanth Menon                    11 (1.0%)
+   Vasili Galka                      10 (0.9%)
+   Przemyslaw Marczak                10 (0.9%)
+   Alexander Graf                    10 (0.9%)
+   Lokesh Vutla                      9 (0.8%)
+   Felipe Balbi                      8 (0.7%)
+   Hannes Petermaier                 8 (0.7%)
+   Andreas Bießmann                  8 (0.7%)
+   Murali Karicheri                  8 (0.7%)
+   Eric Benard                       8 (0.7%)
+   Albert ARIBAUD                    7 (0.7%)
+   Rob Herring                       7 (0.7%)
+   Samuel Egli                       7 (0.7%)
+   Steve Rae                         6 (0.6%)
+   Bo Shen                           6 (0.6%)
+   Dmitry Lifshitz                   6 (0.6%)
+   Zhao Qiang                        6 (0.6%)
+   Valentin Longchamp                6 (0.6%)
+   Stefano Babic                     5 (0.5%)
+   Shaveta Leekha                    5 (0.5%)
+   Chunhe Lan                        5 (0.5%)
+   Shaohui Xie                       5 (0.5%)
+   Alexey Brodkin                    5 (0.5%)
+   Nikhil Badola                     5 (0.5%)
+   Tang Yuantian                     5 (0.5%)
+   Vitaly Andrianov                  5 (0.5%)
+   Eric Nelson                       4 (0.4%)
+   Wolfgang Denk                     4 (0.4%)
+   Chin Liang See                    4 (0.4%)
+   Poddar, Sourav                    4 (0.4%)
+   Stefan Agner                      4 (0.4%)
+   Daniel Schwierzeck                4 (0.4%)
+   Khoronzhuk, Ivan                  3 (0.3%)
+   Thomas Betker                     3 (0.3%)
+   Aaron Durbin                      3 (0.3%)
+   Pierre Aubert                     3 (0.3%)
+   Beomho Seo                        3 (0.3%)
+   Thomas Diener                     3 (0.3%)
+   Lothar Rubusch                    2 (0.2%)
+   Cooper Jr., Franklin              2 (0.2%)
+   Christian Riesch                  2 (0.2%)
+   Darwin Rambo                      2 (0.2%)
+   Axel Lin                          2 (0.2%)
+   J. German Rivera                  2 (0.2%)
+   Ilya Ledvich                      2 (0.2%)
+   Yasuhisa Umano                    2 (0.2%)
+   Jon Loeliger                      2 (0.2%)
+   Chao Fu                           2 (0.2%)
+   Doug Anderson                     2 (0.2%)
+   Alison Wang                       2 (0.2%)
+   Brian Norris                      2 (0.2%)
+   Michael van der Westhuizen        2 (0.2%)
+   Franck Jullien                    2 (0.2%)
+   Charles Manning                   2 (0.2%)
+   Hans de Goede                     2 (0.2%)
+   Michael Walle                     2 (0.2%)
+   Robert Nelson                     2 (0.2%)
+   Stefan Bigler                     2 (0.2%)
+   Manish Badarkhe                   2 (0.2%)
+   Otavio Salvador                   2 (0.2%)
+   Daniel Hellstrom                  2 (0.2%)
+   Sebastian Siewior                 2 (0.2%)
+   Adrian Cox                        2 (0.2%)
+   vijay rai                         2 (0.2%)
+   Codrin Ciubotariu                 2 (0.2%)
+   Pavel Machek                      1 (0.1%)
+   Andre Renaud                      1 (0.1%)
+   Tyler Baker                       1 (0.1%)
+   Alexey Ignatov                    1 (0.1%)
+   Linus Walleij                     1 (0.1%)
+   Shaibal.Dutta                     1 (0.1%)
+   Łukasz Dałek                      1 (0.1%)
+   Sergey Kostanbaev                 1 (0.1%)
+   Minkyu Kang                       1 (0.1%)
+   Michael Pratt                     1 (0.1%)
+   Jon Nalley                        1 (0.1%)
+   Dan Murphy                        1 (0.1%)
+   Tushar Behera                     1 (0.1%)
+   Shawn Guo                         1 (0.1%)
+   Tim Schendekehl                   1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Darwin Dingel                     1 (0.1%)
+   Mark Rutland                      1 (0.1%)
+   Andrew Ruder                      1 (0.1%)
+   WingMan Kwok                      1 (0.1%)
+   David Mosberger                   1 (0.1%)
+   Sandeep Singh                     1 (0.1%)
+   poonam aggrwal                    1 (0.1%)
+   Hou Zhiqiang                      1 (0.1%)
+   Cormier, Jonathan                 1 (0.1%)
+   Piotr Wilczek                     1 (0.1%)
+   Tom Wai-Hong Tam                  1 (0.1%)
+   David Feng                        1 (0.1%)
+   Igor Grinberg                     1 (0.1%)
+   Sergey Alyoshin                   1 (0.1%)
+   Keerthy                           1 (0.1%)
+   Peter A. Bigot                    1 (0.1%)
+   Andrew Gabbasov                   1 (0.1%)
+   Ye.Li                             1 (0.1%)
+   Liu Gang                          1 (0.1%)
+   Kim Phillips                      1 (0.1%)
+   ramneek mehresh                   1 (0.1%)
+   Ebony Zhu                         1 (0.1%)
+   Mike Looijmans                    1 (0.1%)
+   Belisko Marek                     1 (0.1%)
+   Yegor Yefremov                    1 (0.1%)
+   Ralph Siemsen                     1 (0.1%)
+   Kristian Otnes                    1 (0.1%)
+   Xiaobo Xie                        1 (0.1%)
+   Jesper B. Christensen             1 (0.1%)
+   Inha Song                         1 (0.1%)
+   Stephan Linz                      1 (0.1%)
+   Andrey Konovalov                  1 (0.1%)
+   Matthias Fuchs                    1 (0.1%)
+   Priyanka Jain                     1 (0.1%)
+   Haijun.Zhang                      1 (0.1%)
+   Scott Wood                        1 (0.1%)
+   David Müller (ELSOFT AG)          1 (0.1%)
+   Kees Cook                         1 (0.1%)
+   Hung-ying Tyan                    1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   66904 (46.0%)
+   Simon Glass                       7690 (5.3%)
+   Stephen Warren                    7624 (5.2%)
+   Daniel Schwierzeck                5276 (3.6%)
+   York Sun                          4289 (3.0%)
+   Vitaly Andrianov                  3725 (2.6%)
+   Albert ARIBAUD                    3721 (2.6%)
+   Akshay Saraswat                   3652 (2.5%)
+   Ian Campbell                      3431 (2.4%)
+   Nobuhiro Iwamatsu                 2613 (1.8%)
+   Tim Harvey                        2387 (1.6%)
+   Heiko Schocher                    2126 (1.5%)
+   Sergey Kostanbaev                 1636 (1.1%)
+   Fabio Estevam                     1581 (1.1%)
+   Chunhe Lan                        1518 (1.0%)
+   Murali Karicheri                  1477 (1.0%)
+   Prabhakar Kushwaha                1463 (1.0%)
+   Ash Charles                       1353 (0.9%)
+   Eric Benard                       1178 (0.8%)
+   Chin Liang See                    1094 (0.8%)
+   Sebastian Siewior                 1039 (0.7%)
+   Michal Simek                      896 (0.6%)
+   Pierre Aubert                     892 (0.6%)
+   Alexander Graf                    889 (0.6%)
+   Tom Rini                          887 (0.6%)
+   Stefan Agner                      788 (0.5%)
+   vijay rai                         749 (0.5%)
+   Shaveta Leekha                    733 (0.5%)
+   Shengzhou Liu                     723 (0.5%)
+   Wolfgang Denk                     649 (0.4%)
+   Alison Wang                       612 (0.4%)
+   Marek Vasut                       599 (0.4%)
+   Dmitry Lifshitz                   590 (0.4%)
+   pekon gupta                       582 (0.4%)
+   Shaohui Xie                       555 (0.4%)
+   Tom Wai-Hong Tam                  525 (0.4%)
+   Dirk Eibach                       495 (0.3%)
+   Andreas Bießmann                  494 (0.3%)
+   Darwin Rambo                      468 (0.3%)
+   Siva Durga Prasad Paladugu        426 (0.3%)
+   Vasili Galka                      398 (0.3%)
+   J. German Rivera                  391 (0.3%)
+   Lukasz Majewski                   363 (0.2%)
+   Wu, Josh                          321 (0.2%)
+   Thomas Diener                     297 (0.2%)
+   Mateusz Zalega                    289 (0.2%)
+   Khoronzhuk, Ivan                  272 (0.2%)
+   Jaehoon Chung                     267 (0.2%)
+   Nishanth Menon                    259 (0.2%)
+   Jeroen Hofstee                    250 (0.2%)
+   Samuel Egli                       229 (0.2%)
+   Cooper Jr., Franklin              225 (0.2%)
+   Bo Shen                           188 (0.1%)
+   Lothar Rubusch                    170 (0.1%)
+   Alexey Brodkin                    161 (0.1%)
+   Otavio Salvador                   155 (0.1%)
+   Hung-ying Tyan                    153 (0.1%)
+   Zhao Qiang                        141 (0.1%)
+   Tang Yuantian                     134 (0.1%)
+   Felipe Balbi                      115 (0.1%)
+   Paul Burton                       111 (0.1%)
+   Nikhil Badola                     109 (0.1%)
+   Hou Zhiqiang                      106 (0.1%)
+   Valentin Longchamp                104 (0.1%)
+   Matthias Fuchs                    101 (0.1%)
+   Przemyslaw Marczak                100 (0.1%)
+   Charles Manning                   96 (0.1%)
+   Steve Rae                         92 (0.1%)
+   Stefano Babic                     92 (0.1%)
+   Aneesh Bansal                     87 (0.1%)
+   Sandeep Singh                     76 (0.1%)
+   Beomho Seo                        73 (0.1%)
+   Chao Fu                           72 (0.0%)
+   Lokesh Vutla                      68 (0.0%)
+   Adrian Cox                        56 (0.0%)
+   Franck Jullien                    53 (0.0%)
+   Hannes Petermaier                 52 (0.0%)
+   Doug Anderson                     51 (0.0%)
+   Stefan Bigler                     49 (0.0%)
+   Poddar, Sourav                    48 (0.0%)
+   Rob Herring                       43 (0.0%)
+   Thomas Betker                     38 (0.0%)
+   Michael Walle                     32 (0.0%)
+   Keerthy                           32 (0.0%)
+   Codrin Ciubotariu                 30 (0.0%)
+   Liu Gang                          30 (0.0%)
+   Daniel Hellstrom                  28 (0.0%)
+   Hans de Goede                     24 (0.0%)
+   Sergey Alyoshin                   23 (0.0%)
+   Brian Norris                      20 (0.0%)
+   Darwin Dingel                     20 (0.0%)
+   Aaron Durbin                      18 (0.0%)
+   Michael van der Westhuizen        18 (0.0%)
+   Kim Phillips                      18 (0.0%)
+   Ye.Li                             14 (0.0%)
+   Andrew Ruder                      12 (0.0%)
+   Priyanka Jain                     12 (0.0%)
+   Jon Loeliger                      11 (0.0%)
+   Dan Murphy                        11 (0.0%)
+   Eric Nelson                       10 (0.0%)
+   David Mosberger                   10 (0.0%)
+   Michael Pratt                     9 (0.0%)
+   Robert Nelson                     8 (0.0%)
+   Manish Badarkhe                   8 (0.0%)
+   Scott Wood                        8 (0.0%)
+   poonam aggrwal                    6 (0.0%)
+   ramneek mehresh                   6 (0.0%)
+   Axel Lin                          5 (0.0%)
+   Chris Packham                     5 (0.0%)
+   Igor Grinberg                     5 (0.0%)
+   Andrew Gabbasov                   5 (0.0%)
+   Christian Riesch                  4 (0.0%)
+   Alexey Ignatov                    4 (0.0%)
+   Ebony Zhu                         4 (0.0%)
+   Inha Song                         4 (0.0%)
+   Andrey Konovalov                  4 (0.0%)
+   Ilya Ledvich                      3 (0.0%)
+   Yasuhisa Umano                    3 (0.0%)
+   Cormier, Jonathan                 3 (0.0%)
+   Yegor Yefremov                    3 (0.0%)
+   Xiaobo Xie                        3 (0.0%)
+   Minkyu Kang                       2 (0.0%)
+   Tushar Behera                     2 (0.0%)
+   Tim Schendekehl                   2 (0.0%)
+   David Feng                        2 (0.0%)
+   Peter A. Bigot                    2 (0.0%)
+   Jesper B. Christensen             2 (0.0%)
+   Haijun.Zhang                      2 (0.0%)
+   Pavel Machek                      1 (0.0%)
+   Andre Renaud                      1 (0.0%)
+   Tyler Baker                       1 (0.0%)
+   Linus Walleij                     1 (0.0%)
+   Shaibal.Dutta                     1 (0.0%)
+   Łukasz Dałek                      1 (0.0%)
+   Jon Nalley                        1 (0.0%)
+   Shawn Guo                         1 (0.0%)
+   Mark Rutland                      1 (0.0%)
+   WingMan Kwok                      1 (0.0%)
+   Piotr Wilczek                     1 (0.0%)
+   Mike Looijmans                    1 (0.0%)
+   Belisko Marek                     1 (0.0%)
+   Ralph Siemsen                     1 (0.0%)
+   Kristian Otnes                    1 (0.0%)
+   Stephan Linz                      1 (0.0%)
+   David Müller (ELSOFT AG)          1 (0.0%)
+   Kees Cook                         1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   64999 (65.0%)
+   Daniel Schwierzeck                5230 (5.2%)
+   Albert ARIBAUD                    2130 (2.1%)
+   vijay rai                         671 (0.7%)
+   Stephen Warren                    647 (0.6%)
+   Nobuhiro Iwamatsu                 537 (0.5%)
+   Stefan Agner                      507 (0.5%)
+   Wolfgang Denk                     374 (0.4%)
+   Vasili Galka                      329 (0.3%)
+   Khoronzhuk, Ivan                  104 (0.1%)
+   Jeroen Hofstee                    62 (0.1%)
+   Hans de Goede                     18 (0.0%)
+   Przemyslaw Marczak                9 (0.0%)
+   Kim Phillips                      9 (0.0%)
+   Rob Herring                       5 (0.0%)
+   Ye.Li                             5 (0.0%)
+   Manish Badarkhe                   3 (0.0%)
+   Nishanth Menon                    2 (0.0%)
+   Cormier, Jonathan                 2 (0.0%)
+   Xiaobo Xie                        2 (0.0%)
+   Minkyu Kang                       2 (0.0%)
+   Shawn Guo                         1 (0.0%)
+   David Müller (ELSOFT AG)          1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 296)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Minkyu Kang                       62 (20.9%)
+   Tom Warren                        32 (10.8%)
+   Michal Simek                      21 (7.1%)
+   Andreas Bießmann                  18 (6.1%)
+   Tom Rini                          8 (2.7%)
+   Henrik Nordström                  6 (2.0%)
+   Oliver Schinagl                   6 (2.0%)
+   poonam aggrwal                    6 (2.0%)
+   Simon Glass                       6 (2.0%)
+   Jens Kuske                        5 (1.7%)
+   Murali Karicheri                  5 (1.7%)
+   Wolfgang Denk                     4 (1.4%)
+   Hans de Goede                     4 (1.4%)
+   Stefan Roese                      4 (1.4%)
+   Luke Leighton                     4 (1.4%)
+   Chen-Yu Tsai                      4 (1.4%)
+   Vitaly Andrianov                  4 (1.4%)
+   Kim Phillips                      3 (1.0%)
+   Peter A. Bigot                    3 (1.0%)
+   Alexandru Gagniuc                 3 (1.0%)
+   Emilio López                      3 (1.0%)
+   Kyungmin Park                     3 (1.0%)
+   WingMan Kwok                      3 (1.0%)
+   Jaehoon Chung                     3 (1.0%)
+   pekon gupta                       3 (1.0%)
+   Akshay Saraswat                   3 (1.0%)
+   Khoronzhuk, Ivan                  2 (0.7%)
+   Rob Herring                       2 (0.7%)
+   Arnab Basu                        2 (0.7%)
+   Alim Akhtar                       2 (0.7%)
+   Hatim Ali                         2 (0.7%)
+   Wills Wang                        2 (0.7%)
+   Hisashi Nakamura                  2 (0.7%)
+   Arkadiusz Wlodarczyk              2 (0.7%)
+   Gaurav Kumar Rana                 2 (0.7%)
+   ramneek mehresh                   2 (0.7%)
+   Priyanka Jain                     2 (0.7%)
+   Valentin Longchamp                2 (0.7%)
+   Marek Vasut                       2 (0.7%)
+   Siva Durga Prasad Paladugu        2 (0.7%)
+   Nobuhiro Iwamatsu                 1 (0.3%)
+   Mike Looijmans                    1 (0.3%)
+   Bhupesh Sharma                    1 (0.3%)
+   Lijun Pan                         1 (0.3%)
+   Shruti Kanetkar                   1 (0.3%)
+   Varun Sethi                       1 (0.3%)
+   Vadim Bendebury                   1 (0.3%)
+   Mårten Wikman                     1 (0.3%)
+   Katie Roberts-Hoffman             1 (0.3%)
+   Rong Chang                        1 (0.3%)
+   Sean Paul                         1 (0.3%)
+   Vincent Palatin                   1 (0.3%)
+   Siarhei Siamashka                 1 (0.3%)
+   Adam Sampson                      1 (0.3%)
+   Aleksei Mamlin                    1 (0.3%)
+   Luc Verhaegen                     1 (0.3%)
+   Patrick Wood                      1 (0.3%)
+   Ma Haijun                         1 (0.3%)
+   Javier Martinez Canillas          1 (0.3%)
+   Minghuan Lian                     1 (0.3%)
+   Leela Krishna Amudala             1 (0.3%)
+   Rajeshwari Shinde                 1 (0.3%)
+   Josh Triplett                     1 (0.3%)
+   Michal Marek                      1 (0.3%)
+   Yoshiyuki Ito                     1 (0.3%)
+   Anatolij Gustschin                1 (0.3%)
+   Ruchika Gupta                     1 (0.3%)
+   Rex Chang                         1 (0.3%)
+   Sandeep Nair                      1 (0.3%)
+   Igor Grinberg                     1 (0.3%)
+   Aaron Durbin                      1 (0.3%)
+   Poddar, Sourav                    1 (0.3%)
+   Stefan Bigler                     1 (0.3%)
+   Lokesh Vutla                      1 (0.3%)
+   Chao Fu                           1 (0.3%)
+   Sandeep Singh                     1 (0.3%)
+   J. German Rivera                  1 (0.3%)
+   Darwin Rambo                      1 (0.3%)
+   Alison Wang                       1 (0.3%)
+   Shaveta Leekha                    1 (0.3%)
+   Heiko Schocher                    1 (0.3%)
+   York Sun                          1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 150)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   York Sun                          85 (56.7%)
+   Tom Rini                          12 (8.0%)
+   Stefan Roese                      8 (5.3%)
+   Marek Vasut                       8 (5.3%)
+   Jagannadha Sutradharudu Teki      6 (4.0%)
+   Lukasz Majewski                   6 (4.0%)
+   Simon Glass                       5 (3.3%)
+   Stephen Warren                    4 (2.7%)
+   Yen Lin                           3 (2.0%)
+   Roger Meier                       2 (1.3%)
+   Wolfgang Denk                     1 (0.7%)
+   Siarhei Siamashka                 1 (0.7%)
+   Lokesh Vutla                      1 (0.7%)
+   Darwin Rambo                      1 (0.7%)
+   Masahiro Yamada                   1 (0.7%)
+   Vipin Kumar                       1 (0.7%)
+   Michael Trimarchi                 1 (0.7%)
+   Their Name                        1 (0.7%)
+   Steve Rae                         1 (0.7%)
+   Alexey Brodkin                    1 (0.7%)
+   Wu, Josh                          1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 71)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       15 (21.1%)
+   Lukasz Majewski                   11 (15.5%)
+   Wu, Josh                          4 (5.6%)
+   Michal Simek                      4 (5.6%)
+   Bo Shen                           4 (5.6%)
+   Ash Charles                       4 (5.6%)
+   Masahiro Yamada                   3 (4.2%)
+   Piotr Wilczek                     3 (4.2%)
+   Mateusz Zalega                    3 (4.2%)
+   Stephen Warren                    2 (2.8%)
+   Arkadiusz Wlodarczyk              2 (2.8%)
+   Iain Paton                        2 (2.8%)
+   Stefan Roese                      1 (1.4%)
+   Siarhei Siamashka                 1 (1.4%)
+   Their Name                        1 (1.4%)
+   Alexey Brodkin                    1 (1.4%)
+   Andreas Bießmann                  1 (1.4%)
+   Heiko Schocher                    1 (1.4%)
+   Hector Palacios                   1 (1.4%)
+   Matthias Weißer                   1 (1.4%)
+   Yebio Mesfin                      1 (1.4%)
+   Eric Nelson                       1 (1.4%)
+   Stefano Babic                     1 (1.4%)
+   Otavio Salvador                   1 (1.4%)
+   Samuel Egli                       1 (1.4%)
+   Fabio Estevam                     1 (1.4%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 71)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jaehoon Chung                     10 (14.1%)
+   Masahiro Yamada                   9 (12.7%)
+   Akshay Saraswat                   7 (9.9%)
+   Mateusz Zalega                    5 (7.0%)
+   Fabio Estevam                     4 (5.6%)
+   Thomas Betker                     4 (5.6%)
+   Simon Glass                       3 (4.2%)
+   Bo Shen                           3 (4.2%)
+   Ash Charles                       3 (4.2%)
+   Stephen Warren                    3 (4.2%)
+   Andreas Bießmann                  3 (4.2%)
+   Beomho Seo                        3 (4.2%)
+   Marek Vasut                       2 (2.8%)
+   Heiko Schocher                    1 (1.4%)
+   Eric Nelson                       1 (1.4%)
+   Peter A. Bigot                    1 (1.4%)
+   Nobuhiro Iwamatsu                 1 (1.4%)
+   Poddar, Sourav                    1 (1.4%)
+   Stefan Agner                      1 (1.4%)
+   Jeroen Hofstee                    1 (1.4%)
+   Ralph Siemsen                     1 (1.4%)
+   Kees Cook                         1 (1.4%)
+   Michael Pratt                     1 (1.4%)
+   Doug Anderson                     1 (1.4%)
+   Ian Campbell                      1 (1.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 12)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   2 (16.7%)
+   Matthias Weißer                   1 (8.3%)
+   Tom Rini                          1 (8.3%)
+   Daniel Schwierzeck                1 (8.3%)
+   Vasili Galka                      1 (8.3%)
+   Tony Lindgren                     1 (8.3%)
+   Stefan Herbrechtsmeier            1 (8.3%)
+   Andrey Filippov                   1 (8.3%)
+   Tom Taylor                        1 (8.3%)
+   Jon Loeliger                      1 (8.3%)
+   Dirk Eibach                       1 (8.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 12)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       4 (33.3%)
+   Michal Simek                      2 (16.7%)
+   Kees Cook                         1 (8.3%)
+   Stefano Babic                     1 (8.3%)
+   Lokesh Vutla                      1 (8.3%)
+   Christian Riesch                  1 (8.3%)
+   Daniel Hellstrom                  1 (8.3%)
+   Paul Burton                       1 (8.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         215 (20.0%)
+   Freescale                         141 (13.1%)
+   Socionext Inc.                    123 (11.5%)
+   NVidia                            90 (8.4%)
+   Google, Inc.                      85 (7.9%)
+   Samsung                           69 (6.4%)
+   Texas Instruments                 68 (6.3%)
+   Renesas Electronics               51 (4.7%)
+   DENX Software Engineering         44 (4.1%)
+   Konsulko Group                    40 (3.7%)
+   AMD                               30 (2.8%)
+   Atmel                             25 (2.3%)
+   Xilinx                            15 (1.4%)
+   Guntermann & Drunck               13 (1.2%)
+   MIPS                              11 (1.0%)
+   Broadcom                          9 (0.8%)
+   CompuLab                          9 (0.8%)
+   Keymile                           8 (0.7%)
+   Siemens                           7 (0.7%)
+   Boundary Devices                  4 (0.4%)
+   Linaro                            3 (0.3%)
+   Gaisler Research                  2 (0.2%)
+   Red Hat                           2 (0.2%)
+   linutronix                        2 (0.2%)
+   Oracle                            2 (0.2%)
+   O.S. Systems                      2 (0.2%)
+   ARM                               1 (0.1%)
+   Bluewater Systems                 1 (0.1%)
+   Cisco                             1 (0.1%)
+   ESD Electronics                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Socionext Inc.                    66904 (46.0%)
+   (Unknown)                         24960 (17.2%)
+   Freescale                         13473 (9.3%)
+   Google, Inc.                      8266 (5.7%)
+   NVidia                            7623 (5.2%)
+   Texas Instruments                 6815 (4.7%)
+   Samsung                           4753 (3.3%)
+   DENX Software Engineering         3637 (2.5%)
+   Renesas Electronics               2616 (1.8%)
+   linutronix                        1039 (0.7%)
+   Konsulko Group                    887 (0.6%)
+   AMD                               706 (0.5%)
+   Xilinx                            616 (0.4%)
+   CompuLab                          598 (0.4%)
+   Broadcom                          561 (0.4%)
+   Atmel                             509 (0.4%)
+   Guntermann & Drunck               495 (0.3%)
+   Siemens                           229 (0.2%)
+   O.S. Systems                      155 (0.1%)
+   Keymile                           153 (0.1%)
+   MIPS                              111 (0.1%)
+   ESD Electronics                   101 (0.1%)
+   Gaisler Research                  28 (0.0%)
+   Red Hat                           24 (0.0%)
+   Oracle                            11 (0.0%)
+   Boundary Devices                  10 (0.0%)
+   Linaro                            6 (0.0%)
+   ARM                               1 (0.0%)
+   Bluewater Systems                 1 (0.0%)
+   Cisco                             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 296)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Samsung                           79 (26.7%)
+   (Unknown)                         68 (23.0%)
+   NVidia                            32 (10.8%)
+   Freescale                         29 (9.8%)
+   Texas Instruments                 29 (9.8%)
+   Xilinx                            23 (7.8%)
+   DENX Software Engineering         12 (4.1%)
+   Google, Inc.                      9 (3.0%)
+   Red Hat                           4 (1.4%)
+   Renesas Electronics               3 (1.0%)
+   Keymile                           3 (1.0%)
+   CompuLab                          1 (0.3%)
+   Broadcom                          1 (0.3%)
+   Collabora Ltd.                    1 (0.3%)
+   Novell                            1 (0.3%)
+   Nobuhiro Iwamatsu                 1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 148)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         54 (36.5%)
+   Freescale                         29 (19.6%)
+   Texas Instruments                 12 (8.1%)
+   Samsung                           10 (6.8%)
+   DENX Software Engineering         6 (4.1%)
+   Google, Inc.                      3 (2.0%)
+   CompuLab                          3 (2.0%)
+   Broadcom                          3 (2.0%)
+   Linaro                            3 (2.0%)
+   Xilinx                            2 (1.4%)
+   Renesas Electronics               2 (1.4%)
+   Keymile                           2 (1.4%)
+   Atmel                             2 (1.4%)
+   NVidia                            1 (0.7%)
+   Red Hat                           1 (0.7%)
+   Socionext Inc.                    1 (0.7%)
+   linutronix                        1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   AMD                               1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   Siemens                           1 (0.7%)
+   O.S. Systems                      1 (0.7%)
+   MIPS                              1 (0.7%)
+   ESD Electronics                   1 (0.7%)
+   Gaisler Research                  1 (0.7%)
+   Oracle                            1 (0.7%)
+   Boundary Devices                  1 (0.7%)
+   ARM                               1 (0.7%)
+   Bluewater Systems                 1 (0.7%)
+   Cisco                             1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2014.10.rst b/doc/develop/statistics/u-boot-stats-v2014.10.rst
new file mode 100644
index 00000000000..b5c794ad053
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2014.10.rst
@@ -0,0 +1,662 @@
+:orphan:
+
+Release Statistics for U-Boot v2014.10
+======================================
+
+* Processed 1111 changesets from 145 developers
+
+* 24 employers found
+
+* A total of 146820 lines added, 58801 removed (delta 88019)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   149 (13.4%)
+   Simon Glass                       147 (13.2%)
+   Marek Vasut                       59 (5.3%)
+   Hans de Goede                     43 (3.9%)
+   Jeroen Hofstee                    41 (3.7%)
+   Fabio Estevam                     36 (3.2%)
+   Eric Nelson                       28 (2.5%)
+   Pavel Machek                      27 (2.4%)
+   Tom Rini                          23 (2.1%)
+   Stephen Warren                    23 (2.1%)
+   Heiko Schocher                    21 (1.9%)
+   Nikita Kiryanov                   20 (1.8%)
+   Nobuhiro Iwamatsu                 19 (1.7%)
+   York Sun                          17 (1.5%)
+   Tim Harvey                        17 (1.5%)
+   Khoronzhuk, Ivan                  16 (1.4%)
+   Siarhei Siamashka                 16 (1.4%)
+   Bo Shen                           14 (1.3%)
+   Przemyslaw Marczak                14 (1.3%)
+   Łukasz Majewski                   13 (1.2%)
+   Stefan Roese                      12 (1.1%)
+   Marc Zyngier                      12 (1.1%)
+   Ian Campbell                      11 (1.0%)
+   Wang Huan                         11 (1.0%)
+   Ye.Li                             10 (0.9%)
+   Steve Rae                         10 (0.9%)
+   Hao Zhang                         10 (0.9%)
+   Thomas Chou                       9 (0.8%)
+   pekon gupta                       9 (0.8%)
+   Boschung, Rainer                  9 (0.8%)
+   Ajay Kumar                        8 (0.7%)
+   Vasili Galka                      8 (0.7%)
+   Stefan Agner                      7 (0.6%)
+   Hannes Petermaier                 6 (0.5%)
+   David Müller (ELSOFT AG)          6 (0.5%)
+   DrEagle                           6 (0.5%)
+   Prabhakar Kushwaha                6 (0.5%)
+   Bryan Wu                          6 (0.5%)
+   Chin Liang See                    5 (0.5%)
+   vijay rai                         5 (0.5%)
+   Guillaume GARDET                  5 (0.5%)
+   Dmitry Lifshitz                   5 (0.5%)
+   Roman Byshko                      5 (0.5%)
+   Shengzhou Liu                     5 (0.5%)
+   Roger Quadros                     4 (0.4%)
+   Troy Kisky                        4 (0.4%)
+   Rostislav Lisovy                  4 (0.4%)
+   Shaveta Leekha                    4 (0.4%)
+   Peng Fan                          4 (0.4%)
+   Thierry Reding                    4 (0.4%)
+   Michal Simek                      4 (0.4%)
+   Scott Branden                     4 (0.4%)
+   Daniel Schwierzeck                4 (0.4%)
+   Alexander Holler                  4 (0.4%)
+   Andreas Bießmann                  3 (0.3%)
+   Murali Karicheri                  3 (0.3%)
+   Valentin Longchamp                3 (0.3%)
+   Sonic Zhang                       3 (0.3%)
+   Nitin Garg                        3 (0.3%)
+   Chris Packham                     3 (0.3%)
+   Stefano Babic                     3 (0.3%)
+   Wu, Josh                          3 (0.3%)
+   Maxin B. John                     3 (0.3%)
+   Benoît Thébaudeau                 3 (0.3%)
+   Igor Grinberg                     3 (0.3%)
+   Shaohui Xie                       3 (0.3%)
+   Tang Yuantian                     3 (0.3%)
+   Mugunthan V N                     3 (0.3%)
+   Lijun Pan                         3 (0.3%)
+   Wolfgang Denk                     2 (0.2%)
+   Robert Baldyga                    2 (0.2%)
+   Kevin Mihelich                    2 (0.2%)
+   Marcel Ziswiler                   2 (0.2%)
+   Mario Schuknecht                  2 (0.2%)
+   Peter Bigot                       2 (0.2%)
+   Arnab Basu                        2 (0.2%)
+   Priyanka Jain                     2 (0.2%)
+   Gabriel Huau                      2 (0.2%)
+   Andrew Ruder                      2 (0.2%)
+   Vadim Bendebury                   2 (0.2%)
+   Claudiu Manoil                    2 (0.2%)
+   R Sricharan                       2 (0.2%)
+   Holger Brunck                     2 (0.2%)
+   Jiandong Zheng                    2 (0.2%)
+   Roger Meier                       2 (0.2%)
+   Sascha Silbe                      2 (0.2%)
+   Markus Niebel                     2 (0.2%)
+   Iain Paton                        2 (0.2%)
+   Dennis Gilmore                    2 (0.2%)
+   Dirk Eibach                       2 (0.2%)
+   Alexander Kochetkov               1 (0.1%)
+   Stefan Herbrechtsmeier            1 (0.1%)
+   Minkyu Kang                       1 (0.1%)
+   Anthony Felice                    1 (0.1%)
+   Daniel Mack                       1 (0.1%)
+   Diego Rondini                     1 (0.1%)
+   Robert Winkler                    1 (0.1%)
+   Charles Manning                   1 (0.1%)
+   Christian Gmeiner                 1 (0.1%)
+   Michael Walle                     1 (0.1%)
+   Baruch Siach                      1 (0.1%)
+   Wally Yeh                         1 (0.1%)
+   Scott Wood                        1 (0.1%)
+   Joe Perches                       1 (0.1%)
+   Thomas Petazzoni                  1 (0.1%)
+   Ebony Zhu                         1 (0.1%)
+   Sandeep Singh                     1 (0.1%)
+   ramneek mehresh                   1 (0.1%)
+   Zhiqiang Hou                      1 (0.1%)
+   Luka Perkov                       1 (0.1%)
+   Jagan Teki                        1 (0.1%)
+   Boris Brezillon                   1 (0.1%)
+   Gerhard Sittig                    1 (0.1%)
+   Magnus Lilja                      1 (0.1%)
+   Nikolay Dimitrov                  1 (0.1%)
+   Jingchang Lu                      1 (0.1%)
+   Jason Jin                         1 (0.1%)
+   FUKAUMI Naoki                     1 (0.1%)
+   Lokesh Vutla                      1 (0.1%)
+   Enric Balletbo i Serra            1 (0.1%)
+   Andre Przywara                    1 (0.1%)
+   Sergey Kostanbaev                 1 (0.1%)
+   Christian Riesch                  1 (0.1%)
+   Matwey V. Kornilov                1 (0.1%)
+   Vitaly Andrianov                  1 (0.1%)
+   Colin Cross                       1 (0.1%)
+   Wang Dongsheng                    1 (0.1%)
+   Liu Ying                          1 (0.1%)
+   Barnes, Clifton A                 1 (0.1%)
+   Michael van der Westhuizen        1 (0.1%)
+   Peter Crosthwaite                 1 (0.1%)
+   Scott Jiang                       1 (0.1%)
+   Aaron Wu                          1 (0.1%)
+   Andy Fleming                      1 (0.1%)
+   Holger Freyther                   1 (0.1%)
+   Lubomir Rintel                    1 (0.1%)
+   Henrik Nordstrom                  1 (0.1%)
+   Dinh Nguyen                       1 (0.1%)
+   Ma Haijun                         1 (0.1%)
+   Rajendra Nayak                    1 (0.1%)
+   Zang Roy-R61911                   1 (0.1%)
+   Zhao Qiang                        1 (0.1%)
+   Rotariu Marian-Cristian           1 (0.1%)
+   Chen-Yu Tsai                      1 (0.1%)
+   Jonathan Liu                      1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   92757 (49.5%)
+   Heiko Schocher                    29800 (15.9%)
+   Simon Glass                       8475 (4.5%)
+   Steve Rae                         5503 (2.9%)
+   Nobuhiro Iwamatsu                 4413 (2.4%)
+   Wang Huan                         4171 (2.2%)
+   Fabio Estevam                     3132 (1.7%)
+   Daniel Schwierzeck                2710 (1.4%)
+   Marek Vasut                       2428 (1.3%)
+   Thomas Chou                       2225 (1.2%)
+   Nikita Kiryanov                   1748 (0.9%)
+   Chin Liang See                    1720 (0.9%)
+   Jiandong Zheng                    1717 (0.9%)
+   Stefan Agner                      1497 (0.8%)
+   Markus Niebel                     1461 (0.8%)
+   Hao Zhang                         1440 (0.8%)
+   Pavel Machek                      1416 (0.8%)
+   Przemyslaw Marczak                1369 (0.7%)
+   Hans de Goede                     1359 (0.7%)
+   York Sun                          1145 (0.6%)
+   Lijun Pan                         964 (0.5%)
+   Stephen Warren                    813 (0.4%)
+   Khoronzhuk, Ivan                  760 (0.4%)
+   Ye.Li                             754 (0.4%)
+   Scott Branden                     720 (0.4%)
+   DrEagle                           710 (0.4%)
+   Christian Gmeiner                 682 (0.4%)
+   Marc Zyngier                      644 (0.3%)
+   Siarhei Siamashka                 563 (0.3%)
+   pekon gupta                       550 (0.3%)
+   Tim Harvey                        541 (0.3%)
+   Sonic Zhang                       533 (0.3%)
+   Łukasz Majewski                   481 (0.3%)
+   Jeroen Hofstee                    460 (0.2%)
+   Dennis Gilmore                    394 (0.2%)
+   Nitin Garg                        393 (0.2%)
+   Tom Rini                          351 (0.2%)
+   Hannes Petermaier                 330 (0.2%)
+   Ian Campbell                      322 (0.2%)
+   Ajay Kumar                        303 (0.2%)
+   Eric Nelson                       295 (0.2%)
+   Charles Manning                   265 (0.1%)
+   Stefan Roese                      263 (0.1%)
+   Vadim Bendebury                   229 (0.1%)
+   Roman Byshko                      226 (0.1%)
+   Henrik Nordstrom                  215 (0.1%)
+   Bryan Wu                          208 (0.1%)
+   Bo Shen                           201 (0.1%)
+   Andrew Ruder                      185 (0.1%)
+   Enric Balletbo i Serra            178 (0.1%)
+   Vitaly Andrianov                  173 (0.1%)
+   R Sricharan                       164 (0.1%)
+   Shaohui Xie                       161 (0.1%)
+   Wang Dongsheng                    160 (0.1%)
+   Michael van der Westhuizen        158 (0.1%)
+   Tang Yuantian                     143 (0.1%)
+   Prabhakar Kushwaha                140 (0.1%)
+   Matwey V. Kornilov                136 (0.1%)
+   Anthony Felice                    127 (0.1%)
+   Jingchang Lu                      118 (0.1%)
+   Jason Jin                         117 (0.1%)
+   Gabriel Huau                      116 (0.1%)
+   Murali Karicheri                  93 (0.0%)
+   Shengzhou Liu                     88 (0.0%)
+   Boschung, Rainer                  83 (0.0%)
+   Thierry Reding                    67 (0.0%)
+   Mario Schuknecht                  64 (0.0%)
+   vijay rai                         62 (0.0%)
+   Sergey Kostanbaev                 58 (0.0%)
+   Robert Baldyga                    49 (0.0%)
+   Colin Cross                       49 (0.0%)
+   Vasili Galka                      47 (0.0%)
+   Guillaume GARDET                  47 (0.0%)
+   FUKAUMI Naoki                     41 (0.0%)
+   Alexander Holler                  39 (0.0%)
+   Andreas Bießmann                  39 (0.0%)
+   Claudiu Manoil                    39 (0.0%)
+   Dmitry Lifshitz                   38 (0.0%)
+   Shaveta Leekha                    38 (0.0%)
+   Rostislav Lisovy                  36 (0.0%)
+   Lokesh Vutla                      36 (0.0%)
+   Stefano Babic                     34 (0.0%)
+   Robert Winkler                    31 (0.0%)
+   Minkyu Kang                       30 (0.0%)
+   Jonathan Liu                      30 (0.0%)
+   Michal Simek                      24 (0.0%)
+   Mugunthan V N                     24 (0.0%)
+   Troy Kisky                        19 (0.0%)
+   Liu Ying                          19 (0.0%)
+   Andre Przywara                    18 (0.0%)
+   Wu, Josh                          17 (0.0%)
+   Wolfgang Denk                     17 (0.0%)
+   Benoît Thébaudeau                 16 (0.0%)
+   David Müller (ELSOFT AG)          15 (0.0%)
+   Peng Fan                          15 (0.0%)
+   Kevin Mihelich                    14 (0.0%)
+   Arnab Basu                        13 (0.0%)
+   Diego Rondini                     13 (0.0%)
+   Dirk Eibach                       12 (0.0%)
+   Roger Quadros                     11 (0.0%)
+   ramneek mehresh                   11 (0.0%)
+   Holger Freyther                   11 (0.0%)
+   Chen-Yu Tsai                      11 (0.0%)
+   Sascha Silbe                      10 (0.0%)
+   Ma Haijun                         10 (0.0%)
+   Rajendra Nayak                    10 (0.0%)
+   Peter Bigot                       9 (0.0%)
+   Priyanka Jain                     9 (0.0%)
+   Roger Meier                       9 (0.0%)
+   Zhao Qiang                        9 (0.0%)
+   Valentin Longchamp                8 (0.0%)
+   Thomas Petazzoni                  8 (0.0%)
+   Zang Roy-R61911                   8 (0.0%)
+   Rotariu Marian-Cristian           8 (0.0%)
+   Holger Brunck                     7 (0.0%)
+   Chris Packham                     6 (0.0%)
+   Maxin B. John                     6 (0.0%)
+   Scott Wood                        6 (0.0%)
+   Igor Grinberg                     5 (0.0%)
+   Ebony Zhu                         5 (0.0%)
+   Andy Fleming                      5 (0.0%)
+   Marcel Ziswiler                   4 (0.0%)
+   Alexander Kochetkov               4 (0.0%)
+   Jagan Teki                        4 (0.0%)
+   Nikolay Dimitrov                  4 (0.0%)
+   Barnes, Clifton A                 4 (0.0%)
+   Iain Paton                        3 (0.0%)
+   Michael Walle                     3 (0.0%)
+   Gerhard Sittig                    3 (0.0%)
+   Daniel Mack                       2 (0.0%)
+   Sandeep Singh                     2 (0.0%)
+   Luka Perkov                       2 (0.0%)
+   Magnus Lilja                      2 (0.0%)
+   Christian Riesch                  2 (0.0%)
+   Aaron Wu                          2 (0.0%)
+   Stefan Herbrechtsmeier            1 (0.0%)
+   Baruch Siach                      1 (0.0%)
+   Wally Yeh                         1 (0.0%)
+   Joe Perches                       1 (0.0%)
+   Zhiqiang Hou                      1 (0.0%)
+   Boris Brezillon                   1 (0.0%)
+   Peter Crosthwaite                 1 (0.0%)
+   Scott Jiang                       1 (0.0%)
+   Lubomir Rintel                    1 (0.0%)
+   Dinh Nguyen                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Thomas Chou                       1898 (3.2%)
+   Lijun Pan                         924 (1.6%)
+   Stefan Roese                      170 (0.3%)
+   Andrew Ruder                      161 (0.3%)
+   Enric Balletbo i Serra            135 (0.2%)
+   Matwey V. Kornilov                132 (0.2%)
+   Sonic Zhang                       127 (0.2%)
+   Sergey Kostanbaev                 57 (0.1%)
+   Claudiu Manoil                    14 (0.0%)
+   Michal Simek                      14 (0.0%)
+   Jeroen Hofstee                    11 (0.0%)
+   Peng Fan                          10 (0.0%)
+   Ebony Zhu                         5 (0.0%)
+   Maxin B. John                     4 (0.0%)
+   Kevin Mihelich                    2 (0.0%)
+   Roger Quadros                     2 (0.0%)
+   ramneek mehresh                   2 (0.0%)
+   Daniel Mack                       2 (0.0%)
+   Sandeep Singh                     2 (0.0%)
+   Roger Meier                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 238)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Minkyu Kang                       41 (17.2%)
+   Hans de Goede                     30 (12.6%)
+   Marek Vasut                       18 (7.6%)
+   Khoronzhuk, Ivan                  14 (5.9%)
+   Andreas Bießmann                  13 (5.5%)
+   Alison Wang                       11 (4.6%)
+   Stefan Roese                      8 (3.4%)
+   Henrik Nordstrom                  7 (2.9%)
+   Prafulla Wadaskar                 6 (2.5%)
+   Tom Rini                          6 (2.5%)
+   Eric Nelson                       6 (2.5%)
+   Steve Rae                         6 (2.5%)
+   Tom Warren                        5 (2.1%)
+   Michal Simek                      4 (1.7%)
+   Oliver Schinagl                   4 (1.7%)
+   Valentin Longchamp                4 (1.7%)
+   Yuan Yao                          3 (1.3%)
+   Priyanka Jain                     3 (1.3%)
+   Lokesh Vutla                      3 (1.3%)
+   Prabhakar Kushwaha                3 (1.3%)
+   Sandeep Singh                     2 (0.8%)
+   Hisashi Nakamura                  2 (0.8%)
+   Arnab Basu                        2 (0.8%)
+   Jason Jin                         2 (0.8%)
+   Stephen Warren                    2 (0.8%)
+   Thomas Chou                       1 (0.4%)
+   Sonic Zhang                       1 (0.4%)
+   Joakim Tjernlund                  1 (0.4%)
+   Boris BREZILLON                   1 (0.4%)
+   Keegan Garcia                     1 (0.4%)
+   Ulf Magnusson                     1 (0.4%)
+   Chen Lu                           1 (0.4%)
+   Christoffer Dall                  1 (0.4%)
+   Scott McNutt                      1 (0.4%)
+   Andrew Chew                       1 (0.4%)
+   Jimmy Zhang                       1 (0.4%)
+   Alexandre Courbot                 1 (0.4%)
+   Anatolij Gustschin                1 (0.4%)
+   Andrew Bott                       1 (0.4%)
+   Andrew Wishart                    1 (0.4%)
+   Neil Piercy                       1 (0.4%)
+   Poonam Aggrwal                    1 (0.4%)
+   Troy Kisky                        1 (0.4%)
+   Igor Grinberg                     1 (0.4%)
+   Ma Haijun                         1 (0.4%)
+   Holger Brunck                     1 (0.4%)
+   Chen-Yu Tsai                      1 (0.4%)
+   Wang Dongsheng                    1 (0.4%)
+   R Sricharan                       1 (0.4%)
+   Jingchang Lu                      1 (0.4%)
+   Ajay Kumar                        1 (0.4%)
+   Ian Campbell                      1 (0.4%)
+   Marc Zyngier                      1 (0.4%)
+   York Sun                          1 (0.4%)
+   Stefan Agner                      1 (0.4%)
+   Chin Liang See                    1 (0.4%)
+   Nobuhiro Iwamatsu                 1 (0.4%)
+   Masahiro Yamada                   1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 103)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   York Sun                          43 (41.7%)
+   Jagannadha Sutradharudu Teki      19 (18.4%)
+   Marek Vasut                       8 (7.8%)
+   Stephen Warren                    6 (5.8%)
+   Tom Rini                          5 (4.9%)
+   Masahiro Yamada                   5 (4.9%)
+   Simon Glass                       4 (3.9%)
+   Andreas Bießmann                  3 (2.9%)
+   Stefan Roese                      3 (2.9%)
+   Eric Nelson                       2 (1.9%)
+   Steve Rae                         1 (1.0%)
+   Sonic Zhang                       1 (1.0%)
+   Christoffer Dall                  1 (1.0%)
+   Doug Anderson                     1 (1.0%)
+   Fabio Estevam                     1 (1.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 49)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       12 (24.5%)
+   Ajay Kumar                        6 (12.2%)
+   Masahiro Yamada                   5 (10.2%)
+   Luka Perkov                       5 (10.2%)
+   Stephen Warren                    4 (8.2%)
+   Michal Simek                      3 (6.1%)
+   Tom Rini                          2 (4.1%)
+   Karsten Merker                    2 (4.1%)
+   Fabio Estevam                     1 (2.0%)
+   Igor Grinberg                     1 (2.0%)
+   Jeroen Hofstee                    1 (2.0%)
+   Zoltan HERPAI                     1 (2.0%)
+   Tony Zhang                        1 (2.0%)
+   Samuel Egli                       1 (2.0%)
+   Ash Charles                       1 (2.0%)
+   Magnus Lilja                      1 (2.0%)
+   Thierry Reding                    1 (2.0%)
+   Heiko Schocher                    1 (2.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 49)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   9 (18.4%)
+   Simon Glass                       7 (14.3%)
+   Stefan Roese                      7 (14.3%)
+   Ajay Kumar                        5 (10.2%)
+   Hans de Goede                     4 (8.2%)
+   Michal Simek                      2 (4.1%)
+   Thierry Reding                    2 (4.1%)
+   Bryan Wu                          2 (4.1%)
+   Tom Rini                          1 (2.0%)
+   Chin Liang See                    1 (2.0%)
+   Roger Meier                       1 (2.0%)
+   Lubomir Rintel                    1 (2.0%)
+   Peter Crosthwaite                 1 (2.0%)
+   Peter Bigot                       1 (2.0%)
+   Benoît Thébaudeau                 1 (2.0%)
+   Vadim Bendebury                   1 (2.0%)
+   Nitin Garg                        1 (2.0%)
+   Łukasz Majewski                   1 (2.0%)
+   Daniel Schwierzeck                1 (2.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          3 (14.3%)
+   York Sun                          3 (14.3%)
+   Masahiro Yamada                   2 (9.5%)
+   Karsten Merker                    2 (9.5%)
+   Jeroen Hofstee                    2 (9.5%)
+   Steve Rae                         2 (9.5%)
+   Jonas Karlsson                    2 (9.5%)
+   Stephen Warren                    1 (4.8%)
+   Otavio Salvador                   1 (4.8%)
+   Dirk Zimoch                       1 (4.8%)
+   Helmut Raiger                     1 (4.8%)
+   Vagrant Cascadian                 1 (4.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       9 (42.9%)
+   Tom Rini                          2 (9.5%)
+   Hans de Goede                     2 (9.5%)
+   Fabio Estevam                     2 (9.5%)
+   Thierry Reding                    1 (4.8%)
+   Bryan Wu                          1 (4.8%)
+   Benoît Thébaudeau                 1 (4.8%)
+   Ian Campbell                      1 (4.8%)
+   Christian Riesch                  1 (4.8%)
+   Gerhard Sittig                    1 (4.8%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         223 (20.1%)
+   Google, Inc.                      150 (13.5%)
+   Socionext Inc.                    149 (13.4%)
+   Freescale                         127 (11.4%)
+   DENX Software Engineering         125 (11.3%)
+   Texas Instruments                 50 (4.5%)
+   Red Hat                           43 (3.9%)
+   Samsung                           38 (3.4%)
+   Boundary Devices                  33 (3.0%)
+   CompuLab                          28 (2.5%)
+   NVidia                            28 (2.5%)
+   Konsulko Group                    23 (2.1%)
+   Renesas Electronics               19 (1.7%)
+   Atmel                             17 (1.5%)
+   Broadcom                          16 (1.4%)
+   Keymile                           14 (1.3%)
+   ARM                               12 (1.1%)
+   AMD                               4 (0.4%)
+   Analog Devices                    4 (0.4%)
+   ENEA AB                           3 (0.3%)
+   Guntermann & Drunck               2 (0.2%)
+   Citrix                            1 (0.1%)
+   Free Electrons                    1 (0.1%)
+   Linaro                            1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Socionext Inc.                    92757 (49.5%)
+   DENX Software Engineering         33961 (18.1%)
+   (Unknown)                         15908 (8.5%)
+   Freescale                         11719 (6.3%)
+   Google, Inc.                      8753 (4.7%)
+   Broadcom                          7940 (4.2%)
+   Renesas Electronics               4413 (2.4%)
+   Texas Instruments                 3261 (1.7%)
+   Samsung                           2232 (1.2%)
+   CompuLab                          1791 (1.0%)
+   Red Hat                           1359 (0.7%)
+   NVidia                            977 (0.5%)
+   ARM                               644 (0.3%)
+   Analog Devices                    535 (0.3%)
+   Konsulko Group                    351 (0.2%)
+   Boundary Devices                  345 (0.2%)
+   Atmel                             218 (0.1%)
+   Keymile                           98 (0.1%)
+   AMD                               24 (0.0%)
+   Linaro                            18 (0.0%)
+   Guntermann & Drunck               12 (0.0%)
+   Citrix                            9 (0.0%)
+   Free Electrons                    8 (0.0%)
+   ENEA AB                           6 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 238)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Samsung                           42 (17.6%)
+   (Unknown)                         34 (14.3%)
+   Freescale                         31 (13.0%)
+   Red Hat                           30 (12.6%)
+   DENX Software Engineering         27 (11.3%)
+   Texas Instruments                 25 (10.5%)
+   NVidia                            10 (4.2%)
+   Boundary Devices                  7 (2.9%)
+   Broadcom                          6 (2.5%)
+   Marvell                           6 (2.5%)
+   Keymile                           5 (2.1%)
+   Xilinx                            4 (1.7%)
+   Renesas Electronics               2 (0.8%)
+   CompuLab                          1 (0.4%)
+   ARM                               1 (0.4%)
+   Analog Devices                    1 (0.4%)
+   Linaro                            1 (0.4%)
+   Free Electrons                    1 (0.4%)
+   Panasonic                         1 (0.4%)
+   Psyent                            1 (0.4%)
+   Transmode Systems                 1 (0.4%)
+   Nobuhiro Iwamatsu                 1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 148)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         65 (43.9%)
+   Freescale                         28 (18.9%)
+   Texas Instruments                 10 (6.8%)
+   DENX Software Engineering         7 (4.7%)
+   Samsung                           5 (3.4%)
+   NVidia                            3 (2.0%)
+   Boundary Devices                  3 (2.0%)
+   Broadcom                          3 (2.0%)
+   Keymile                           3 (2.0%)
+   CompuLab                          3 (2.0%)
+   Google, Inc.                      3 (2.0%)
+   Analog Devices                    2 (1.4%)
+   Atmel                             2 (1.4%)
+   Red Hat                           1 (0.7%)
+   Renesas Electronics               1 (0.7%)
+   ARM                               1 (0.7%)
+   Linaro                            1 (0.7%)
+   Free Electrons                    1 (0.7%)
+   Socionext Inc.                    1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   AMD                               1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   Citrix                            1 (0.7%)
+   ENEA AB                           1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2015.01.rst b/doc/develop/statistics/u-boot-stats-v2015.01.rst
new file mode 100644
index 00000000000..73b6d778473
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2015.01.rst
@@ -0,0 +1,749 @@
+:orphan:
+
+Release Statistics for U-Boot v2015.01
+======================================
+
+* Processed 1588 changesets from 162 developers
+
+* 35 employers found
+
+* A total of 106613 lines added, 159635 removed (delta -53022)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       303 (19.1%)
+   Masahiro Yamada                   182 (11.5%)
+   Nobuhiro Iwamatsu                 58 (3.7%)
+   Stefan Roese                      52 (3.3%)
+   Jeroen Hofstee                    52 (3.3%)
+   Hans de Goede                     51 (3.2%)
+   Marek Vasut                       45 (2.8%)
+   Bin Meng                          44 (2.8%)
+   Fabio Estevam                     41 (2.6%)
+   Thierry Reding                    37 (2.3%)
+   Khoronzhuk, Ivan                  31 (2.0%)
+   Tom Rini                          22 (1.4%)
+   Ye.Li                             22 (1.4%)
+   Daniel Schwierzeck                21 (1.3%)
+   Heiko Schocher                    21 (1.3%)
+   Przemyslaw Marczak                20 (1.3%)
+   Peng Fan                          18 (1.1%)
+   Igor Grinberg                     18 (1.1%)
+   Chen-Yu Tsai                      17 (1.1%)
+   Alison Wang                       16 (1.0%)
+   Shengzhou Liu                     15 (0.9%)
+   Marcel Ziswiler                   14 (0.9%)
+   Wolfgang Denk                     14 (0.9%)
+   Felipe Balbi                      13 (0.8%)
+   Suriyan Ramasami                  13 (0.8%)
+   Hao Zhang                         13 (0.8%)
+   Guillaume GARDET                  12 (0.8%)
+   Ian Campbell                      12 (0.8%)
+   Nikita Kiryanov                   12 (0.8%)
+   Anatolij Gustschin                12 (0.8%)
+   Bo Shen                           11 (0.7%)
+   Christian Gmeiner                 11 (0.7%)
+   Markus Niebel                     11 (0.7%)
+   Vikas Manocha                     10 (0.6%)
+   Dirk Eibach                       10 (0.6%)
+   Ruchika Gupta                     10 (0.6%)
+   Stephen Warren                    9 (0.6%)
+   Shaohui Xie                       9 (0.6%)
+   York Sun                          8 (0.5%)
+   Nikhil Badola                     8 (0.5%)
+   Soeren Moch                       8 (0.5%)
+   Gerald Kerma                      7 (0.4%)
+   Sjoerd Simons                     7 (0.4%)
+   Chunhe Lan                        7 (0.4%)
+   Xiubo Li                          7 (0.4%)
+   Paul Kocialkowski                 7 (0.4%)
+   Stefan Herbrechtsmeier            6 (0.4%)
+   Zhao Qiang                        6 (0.4%)
+   Rabin Vincent                     6 (0.4%)
+   Andreas Bießmann                  5 (0.3%)
+   Dmitry Lifshitz                   5 (0.3%)
+   Steve Rae                         5 (0.3%)
+   Linus Walleij                     5 (0.3%)
+   Tang Yuantian                     5 (0.3%)
+   Shaveta Leekha                    5 (0.3%)
+   Akshay Saraswat                   5 (0.3%)
+   Valentin Longchamp                5 (0.3%)
+   John Tobias                       5 (0.3%)
+   Axel Lin                          4 (0.3%)
+   Andrew Gabbasov                   4 (0.3%)
+   Hector Palacios                   4 (0.3%)
+   Albert Aribaud                    4 (0.3%)
+   Eric Nelson                       4 (0.3%)
+   Oliver Schinagl                   4 (0.3%)
+   Georges Savoundararadj            4 (0.3%)
+   Łukasz Majewski                   3 (0.2%)
+   Alexey Brodkin                    3 (0.2%)
+   Stefan Agner                      3 (0.2%)
+   Jagannadha Sutradharudu Teki      3 (0.2%)
+   Maxime Ripard                     3 (0.2%)
+   Sonic Zhang                       3 (0.2%)
+   Karicheri, Muralidharan           3 (0.2%)
+   Nishanth Menon                    3 (0.2%)
+   Rene Griessl                      3 (0.2%)
+   Iain Paton                        3 (0.2%)
+   Nikolay Dimitrov                  3 (0.2%)
+   Hyungwon Hwang                    3 (0.2%)
+   Rob Herring                       3 (0.2%)
+   Lubomir Popov                     3 (0.2%)
+   Prabhakar Kushwaha                3 (0.2%)
+   Dinh Nguyen                       3 (0.2%)
+   Ying Zhang                        3 (0.2%)
+   Scott Jiang                       3 (0.2%)
+   Vitaly Andrianov                  3 (0.2%)
+   Kevin Hilman                      2 (0.1%)
+   Jeremiah Mahler                   2 (0.1%)
+   Luka Perkov                       2 (0.1%)
+   Adnan Ali                         2 (0.1%)
+   Pavel Machek                      2 (0.1%)
+   Tudor Laurentiu                   2 (0.1%)
+   Jeffrey Ladouceur                 2 (0.1%)
+   Yao Yuan                          2 (0.1%)
+   Chenhui Zhao                      2 (0.1%)
+   Minghuan Lian                     2 (0.1%)
+   Angelo Dureghello                 2 (0.1%)
+   Wu, Josh                          2 (0.1%)
+   Mark Tomlinson                    2 (0.1%)
+   Priyanka Jain                     2 (0.1%)
+   Suresh Gupta                      2 (0.1%)
+   Luc Verhaegen                     2 (0.1%)
+   Ashish Kumar                      2 (0.1%)
+   Michal Simek                      2 (0.1%)
+   Peter Crosthwaite                 2 (0.1%)
+   Robert P. J. Day                  2 (0.1%)
+   Gabe Black                        2 (0.1%)
+   Pali Rohár                        1 (0.1%)
+   Peter Tyser                       1 (0.1%)
+   John Schmoller                    1 (0.1%)
+   Bill Pringlemeir                  1 (0.1%)
+   Guido Martínez                    1 (0.1%)
+   David Büchi                       1 (0.1%)
+   Peter Howard                      1 (0.1%)
+   Hua Yanghao                       1 (0.1%)
+   Anthoine Bourgeois                1 (0.1%)
+   Pierre Aubert                     1 (0.1%)
+   Dirk Behme                        1 (0.1%)
+   Joonyoung Shim                    1 (0.1%)
+   Jan Luebbe                        1 (0.1%)
+   gaurav rana                       1 (0.1%)
+   harninder rai                     1 (0.1%)
+   Jaehoon Chung                     1 (0.1%)
+   Allen Martin                      1 (0.1%)
+   Jaiprakash Singh                  1 (0.1%)
+   Ramneek Mehresh                   1 (0.1%)
+   Jason Jin                         1 (0.1%)
+   Peter Kümmel                      1 (0.1%)
+   Xiaobo Xie                        1 (0.1%)
+   vijay rai                         1 (0.1%)
+   Holger Brunck                     1 (0.1%)
+   Joakim Tjernlund                  1 (0.1%)
+   Gregoire Gentil                   1 (0.1%)
+   Franklin S Cooper Jr              1 (0.1%)
+   Sanchayan Maity                   1 (0.1%)
+   Rostislav Lisovy                  1 (0.1%)
+   li pengbo                         1 (0.1%)
+   Nitin Garg                        1 (0.1%)
+   Alexey Ignatov                    1 (0.1%)
+   Andrew Ruder                      1 (0.1%)
+   David Müller (ELSOFT AG)          1 (0.1%)
+   Vadim Bendebury                   1 (0.1%)
+   Alim Akhtar                       1 (0.1%)
+   Yangbo Lu                         1 (0.1%)
+   Paul Gortmaker                    1 (0.1%)
+   Zoltan HERPAI                     1 (0.1%)
+   Tinghui Wang                      1 (0.1%)
+   Soren Brinkmann                   1 (0.1%)
+   Dominik Muth                      1 (0.1%)
+   Jorgen Lundman                    1 (0.1%)
+   Timo Ketola                       1 (0.1%)
+   Dominic Sacré                     1 (0.1%)
+   Noam Camus                        1 (0.1%)
+   Dileep Katta                      1 (0.1%)
+   Vagrant Cascadian                 1 (0.1%)
+   Yehuda Yitschak                   1 (0.1%)
+   Matthias Fuchs                    1 (0.1%)
+   Ahmad Draidi                      1 (0.1%)
+   Olaf Mandel                       1 (0.1%)
+   Wills Wang                        1 (0.1%)
+   WingMan Kwok                      1 (0.1%)
+   Oleksandr Tymoshenko              1 (0.1%)
+   Alexandre Courbot                 1 (0.1%)
+   Robert Baldyga                    1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   77001 (30.6%)
+   Wolfgang Denk                     50034 (19.9%)
+   Simon Glass                       37488 (14.9%)
+   Marek Vasut                       17641 (7.0%)
+   Stefan Roese                      7535 (3.0%)
+   Shengzhou Liu                     5963 (2.4%)
+   Nobuhiro Iwamatsu                 5173 (2.1%)
+   Thierry Reding                    4841 (1.9%)
+   Bin Meng                          4301 (1.7%)
+   Ruchika Gupta                     2560 (1.0%)
+   Dirk Eibach                       2407 (1.0%)
+   Hans de Goede                     2190 (0.9%)
+   Oleksandr Tymoshenko              1843 (0.7%)
+   Nikita Kiryanov                   1812 (0.7%)
+   Khoronzhuk, Ivan                  1670 (0.7%)
+   Bo Shen                           1478 (0.6%)
+   Suriyan Ramasami                  1411 (0.6%)
+   Hao Zhang                         1389 (0.6%)
+   Igor Grinberg                     1168 (0.5%)
+   Ye.Li                             1093 (0.4%)
+   Marcel Ziswiler                   1035 (0.4%)
+   Vikas Manocha                     1005 (0.4%)
+   Heiko Schocher                    964 (0.4%)
+   Oliver Schinagl                   852 (0.3%)
+   Daniel Schwierzeck                836 (0.3%)
+   Peng Fan                          829 (0.3%)
+   Allen Martin                      810 (0.3%)
+   Soeren Moch                       728 (0.3%)
+   Rene Griessl                      718 (0.3%)
+   Fabio Estevam                     683 (0.3%)
+   Luc Verhaegen                     678 (0.3%)
+   Felipe Balbi                      632 (0.3%)
+   Alison Wang                       609 (0.2%)
+   Georges Savoundararadj            559 (0.2%)
+   Ying Zhang                        546 (0.2%)
+   Jeroen Hofstee                    512 (0.2%)
+   Jagannadha Sutradharudu Teki      485 (0.2%)
+   Xiubo Li                          462 (0.2%)
+   Chen-Yu Tsai                      460 (0.2%)
+   Shaohui Xie                       428 (0.2%)
+   Steve Rae                         391 (0.2%)
+   Ian Campbell                      387 (0.2%)
+   Vitaly Andrianov                  380 (0.2%)
+   WingMan Kwok                      379 (0.2%)
+   Tang Yuantian                     363 (0.1%)
+   Przemyslaw Marczak                341 (0.1%)
+   Gabe Black                        338 (0.1%)
+   Nikhil Badola                     328 (0.1%)
+   Guillaume GARDET                  294 (0.1%)
+   Chunhe Lan                        283 (0.1%)
+   Akshay Saraswat                   282 (0.1%)
+   Stephen Warren                    278 (0.1%)
+   Jeffrey Ladouceur                 275 (0.1%)
+   Scott Jiang                       268 (0.1%)
+   John Tobias                       252 (0.1%)
+   Zhao Qiang                        232 (0.1%)
+   Sjoerd Simons                     210 (0.1%)
+   Stefan Herbrechtsmeier            201 (0.1%)
+   Paul Kocialkowski                 191 (0.1%)
+   Christian Gmeiner                 190 (0.1%)
+   Iain Paton                        187 (0.1%)
+   Hyungwon Hwang                    173 (0.1%)
+   Stefan Agner                      165 (0.1%)
+   Chenhui Zhao                      162 (0.1%)
+   Linus Walleij                     155 (0.1%)
+   Tom Rini                          116 (0.0%)
+   Suresh Gupta                      114 (0.0%)
+   York Sun                          108 (0.0%)
+   Albert Aribaud                    107 (0.0%)
+   Markus Niebel                     105 (0.0%)
+   Minghuan Lian                     95 (0.0%)
+   Shaveta Leekha                    81 (0.0%)
+   Wu, Josh                          80 (0.0%)
+   Gerald Kerma                      77 (0.0%)
+   Yangbo Lu                         75 (0.0%)
+   Anatolij Gustschin                73 (0.0%)
+   Yao Yuan                          72 (0.0%)
+   Nikolay Dimitrov                  70 (0.0%)
+   Karicheri, Muralidharan           65 (0.0%)
+   Dmitry Lifshitz                   61 (0.0%)
+   Ashish Kumar                      61 (0.0%)
+   Ahmad Draidi                      57 (0.0%)
+   Maxime Ripard                     45 (0.0%)
+   Rob Herring                       44 (0.0%)
+   Andrew Gabbasov                   42 (0.0%)
+   Prabhakar Kushwaha                40 (0.0%)
+   Jeremiah Mahler                   40 (0.0%)
+   Pavel Machek                      40 (0.0%)
+   Łukasz Majewski                   37 (0.0%)
+   Eric Nelson                       36 (0.0%)
+   Tudor Laurentiu                   35 (0.0%)
+   Nishanth Menon                    33 (0.0%)
+   Nitin Garg                        31 (0.0%)
+   Tinghui Wang                      31 (0.0%)
+   Jan Luebbe                        30 (0.0%)
+   Andreas Bießmann                  29 (0.0%)
+   Axel Lin                          29 (0.0%)
+   Priyanka Jain                     29 (0.0%)
+   Peter Crosthwaite                 29 (0.0%)
+   Alexey Ignatov                    27 (0.0%)
+   Dinh Nguyen                       22 (0.0%)
+   Valentin Longchamp                21 (0.0%)
+   Alexey Brodkin                    21 (0.0%)
+   Alim Akhtar                       20 (0.0%)
+   Jason Jin                         18 (0.0%)
+   Sonic Zhang                       16 (0.0%)
+   Rabin Vincent                     15 (0.0%)
+   Hector Palacios                   14 (0.0%)
+   Dileep Katta                      14 (0.0%)
+   Jaehoon Chung                     12 (0.0%)
+   Robert Baldyga                    12 (0.0%)
+   John Schmoller                    10 (0.0%)
+   Kevin Hilman                      9 (0.0%)
+   Lubomir Popov                     8 (0.0%)
+   Andrew Ruder                      8 (0.0%)
+   Vadim Bendebury                   8 (0.0%)
+   Soren Brinkmann                   8 (0.0%)
+   Dominik Muth                      8 (0.0%)
+   Jorgen Lundman                    8 (0.0%)
+   Dirk Behme                        7 (0.0%)
+   Rostislav Lisovy                  7 (0.0%)
+   Matthias Fuchs                    7 (0.0%)
+   harninder rai                     6 (0.0%)
+   Luka Perkov                       5 (0.0%)
+   Pali Rohár                        5 (0.0%)
+   David Büchi                       5 (0.0%)
+   Holger Brunck                     5 (0.0%)
+   Gregoire Gentil                   5 (0.0%)
+   Timo Ketola                       5 (0.0%)
+   Vagrant Cascadian                 5 (0.0%)
+   Angelo Dureghello                 4 (0.0%)
+   Mark Tomlinson                    4 (0.0%)
+   Peter Tyser                       4 (0.0%)
+   Peter Howard                      4 (0.0%)
+   vijay rai                         4 (0.0%)
+   Joakim Tjernlund                  4 (0.0%)
+   Michal Simek                      3 (0.0%)
+   Robert P. J. Day                  3 (0.0%)
+   Pierre Aubert                     3 (0.0%)
+   Sanchayan Maity                   3 (0.0%)
+   Wills Wang                        3 (0.0%)
+   Adnan Ali                         2 (0.0%)
+   Bill Pringlemeir                  2 (0.0%)
+   Guido Martínez                    2 (0.0%)
+   Joonyoung Shim                    2 (0.0%)
+   Peter Kümmel                      2 (0.0%)
+   David Müller (ELSOFT AG)          2 (0.0%)
+   Paul Gortmaker                    2 (0.0%)
+   Noam Camus                        2 (0.0%)
+   Hua Yanghao                       1 (0.0%)
+   Anthoine Bourgeois                1 (0.0%)
+   gaurav rana                       1 (0.0%)
+   Jaiprakash Singh                  1 (0.0%)
+   Ramneek Mehresh                   1 (0.0%)
+   Xiaobo Xie                        1 (0.0%)
+   Franklin S Cooper Jr              1 (0.0%)
+   li pengbo                         1 (0.0%)
+   Zoltan HERPAI                     1 (0.0%)
+   Dominic Sacré                     1 (0.0%)
+   Yehuda Yitschak                   1 (0.0%)
+   Olaf Mandel                       1 (0.0%)
+   Alexandre Courbot                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   68164 (42.7%)
+   Wolfgang Denk                     49893 (31.3%)
+   Marek Vasut                       13397 (8.4%)
+   Nikita Kiryanov                   1435 (0.9%)
+   Jagannadha Sutradharudu Teki      393 (0.2%)
+   Georges Savoundararadj            238 (0.1%)
+   Sjoerd Simons                     102 (0.1%)
+   Scott Jiang                       74 (0.0%)
+   Iain Paton                        62 (0.0%)
+   Jeroen Hofstee                    38 (0.0%)
+   Axel Lin                          10 (0.0%)
+   Daniel Schwierzeck                7 (0.0%)
+   Kevin Hilman                      5 (0.0%)
+   Holger Brunck                     5 (0.0%)
+   Tom Rini                          4 (0.0%)
+   Joakim Tjernlund                  4 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 290)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Warren                        36 (12.4%)
+   Simon Glass                       32 (11.0%)
+   Minkyu Kang                       31 (10.7%)
+   Hans de Goede                     27 (9.3%)
+   Andreas Bießmann                  21 (7.2%)
+   Khoronzhuk, Ivan                  19 (6.6%)
+   Tom Rini                          16 (5.5%)
+   Hisashi Nakamura                  13 (4.5%)
+   Stefan Roese                      8 (2.8%)
+   Poonam Aggrwal                    6 (2.1%)
+   Chen-Yu Tsai                      6 (2.1%)
+   Nobuhiro Iwamatsu                 5 (1.7%)
+   Michal Simek                      4 (1.4%)
+   Michal Marek                      4 (1.4%)
+   Shaohui Xie                       4 (1.4%)
+   Ye.Li                             4 (1.4%)
+   Hao Zhang                         4 (1.4%)
+   Marek Vasut                       3 (1.0%)
+   Jason Jin                         3 (1.0%)
+   Ramneek Mehresh                   2 (0.7%)
+   Laurentiu Tudor                   2 (0.7%)
+   Doug Anderson                     2 (0.7%)
+   Xiaobo Xie                        2 (0.7%)
+   Alim Akhtar                       2 (0.7%)
+   Nitin Garg                        2 (0.7%)
+   Akshay Saraswat                   2 (0.7%)
+   Masahiro Yamada                   1 (0.3%)
+   Nikita Kiryanov                   1 (0.3%)
+   Peter Tyser                       1 (0.3%)
+   Mike Rapoport                     1 (0.3%)
+   Ben Dooks                         1 (0.3%)
+   Cristian Sovaiala                 1 (0.3%)
+   Chen Lu                           1 (0.3%)
+   Wujie Qiu                         1 (0.3%)
+   Sandeep Singh                     1 (0.3%)
+   Roy Zang                          1 (0.3%)
+   Ryo Kataoka                       1 (0.3%)
+   Horia Geanta                      1 (0.3%)
+   Randy Dunlap                      1 (0.3%)
+   Josh Triplett                     1 (0.3%)
+   Brian Norris                      1 (0.3%)
+   Borislav Petkov                   1 (0.3%)
+   Yoshiyuki Ito                     1 (0.3%)
+   Gabor Juhos                       1 (0.3%)
+   Nishanth Menon                    1 (0.3%)
+   Anatolij Gustschin                1 (0.3%)
+   Prabhakar Kushwaha                1 (0.3%)
+   Peter Crosthwaite                 1 (0.3%)
+   Maxime Ripard                     1 (0.3%)
+   Ian Campbell                      1 (0.3%)
+   Minghuan Lian                     1 (0.3%)
+   Suresh Gupta                      1 (0.3%)
+   Zhao Qiang                        1 (0.3%)
+   Stephen Warren                    1 (0.3%)
+   Felipe Balbi                      1 (0.3%)
+   Bo Shen                           1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 376)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   York Sun                          123 (32.7%)
+   Tom Rini                          70 (18.6%)
+   Jagannadha Sutradharudu Teki      63 (16.8%)
+   Bin Meng                          32 (8.5%)
+   Simon Glass                       14 (3.7%)
+   Andreas Bießmann                  11 (2.9%)
+   Masahiro Yamada                   10 (2.7%)
+   Bo Shen                           10 (2.7%)
+   Hans de Goede                     7 (1.9%)
+   Stefan Roese                      6 (1.6%)
+   Fabio Estevam                     6 (1.6%)
+   Marek Vasut                       5 (1.3%)
+   Łukasz Majewski                   3 (0.8%)
+   Benoît Thébaudeau                 2 (0.5%)
+   Bill Richardson                   2 (0.5%)
+   Gabe Black                        2 (0.5%)
+   Stephen Warren                    1 (0.3%)
+   Felipe Balbi                      1 (0.3%)
+   Sjoerd Simons                     1 (0.3%)
+   Stefano Babic                     1 (0.3%)
+   Sethi Varun-B16395                1 (0.3%)
+   Nikolay Dimitrov                  1 (0.3%)
+   Christian Gmeiner                 1 (0.3%)
+   Przemyslaw Marczak                1 (0.3%)
+   Steve Rae                         1 (0.3%)
+   Suriyan Ramasami                  1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 96)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       28 (29.2%)
+   Luka Perkov                       16 (16.7%)
+   Łukasz Majewski                   11 (11.5%)
+   Stephen Warren                    9 (9.4%)
+   Bin Meng                          4 (4.2%)
+   Kevin Hilman                      3 (3.1%)
+   Masahiro Yamada                   2 (2.1%)
+   Stefan Roese                      2 (2.1%)
+   Gabe Black                        2 (2.1%)
+   Nikolay Dimitrov                  2 (2.1%)
+   Nikita Kiryanov                   2 (2.1%)
+   Philippe Reynes                   2 (2.1%)
+   Guillaume GARDET                  2 (2.1%)
+   Hans de Goede                     1 (1.0%)
+   Sjoerd Simons                     1 (1.0%)
+   Stefano Babic                     1 (1.0%)
+   Przemyslaw Marczak                1 (1.0%)
+   Robert Nelson                     1 (1.0%)
+   Vince Hsu                         1 (1.0%)
+   Boris Brezillon                   1 (1.0%)
+   Pierre Aubert                     1 (1.0%)
+   Dinh Nguyen                       1 (1.0%)
+   Alexey Brodkin                    1 (1.0%)
+   Eric Nelson                       1 (1.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 96)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      17 (17.7%)
+   Bin Meng                          9 (9.4%)
+   Simon Glass                       8 (8.3%)
+   Masahiro Yamada                   6 (6.2%)
+   Hans de Goede                     5 (5.2%)
+   Akshay Saraswat                   5 (5.2%)
+   Przemyslaw Marczak                4 (4.2%)
+   Hyungwon Hwang                    4 (4.2%)
+   Stephen Warren                    3 (3.1%)
+   Sjoerd Simons                     3 (3.1%)
+   Marek Vasut                       3 (3.1%)
+   Albert Aribaud                    3 (3.1%)
+   Gabe Black                        2 (2.1%)
+   Jagannadha Sutradharudu Teki      2 (2.1%)
+   Steve Rae                         2 (2.1%)
+   Ian Campbell                      2 (2.1%)
+   Iain Paton                        2 (2.1%)
+   Bill Pringlemeir                  2 (2.1%)
+   Rob Herring                       2 (2.1%)
+   Guillaume GARDET                  1 (1.0%)
+   Tom Rini                          1 (1.0%)
+   Bo Shen                           1 (1.0%)
+   Alim Akhtar                       1 (1.0%)
+   Vadim Bendebury                   1 (1.0%)
+   Gerald Kerma                      1 (1.0%)
+   Markus Niebel                     1 (1.0%)
+   Stefan Agner                      1 (1.0%)
+   Soeren Moch                       1 (1.0%)
+   Marcel Ziswiler                   1 (1.0%)
+   Oleksandr Tymoshenko              1 (1.0%)
+   Thierry Reding                    1 (1.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 20)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Wolfgang Denk                     4 (20.0%)
+   Albert Aribaud                    2 (10.0%)
+   Jeroen Hofstee                    2 (10.0%)
+   Przemyslaw Marczak                1 (5.0%)
+   Stephen Warren                    1 (5.0%)
+   Bill Pringlemeir                  1 (5.0%)
+   Robert Nelson                     1 (5.0%)
+   Dinh Nguyen                       1 (5.0%)
+   York Sun                          1 (5.0%)
+   Siarhei Siamashka                 1 (5.0%)
+   Jens Rottmann                     1 (5.0%)
+   Martin Dorwig                     1 (5.0%)
+   Pantelis Antoniou                 1 (5.0%)
+   Tom Everett                       1 (5.0%)
+   Andrew Ruder                      1 (5.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 20)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       7 (35.0%)
+   Masahiro Yamada                   3 (15.0%)
+   Tom Rini                          2 (10.0%)
+   Rabin Vincent                     2 (10.0%)
+   Heiko Schocher                    2 (10.0%)
+   Hans de Goede                     1 (5.0%)
+   Guillaume GARDET                  1 (5.0%)
+   Nikita Kiryanov                   1 (5.0%)
+   Anatolij Gustschin                1 (5.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         357 (22.5%)
+   Google, Inc.                      306 (19.3%)
+   Freescale                         199 (12.5%)
+   Socionext Inc.                    182 (11.5%)
+   DENX Software Engineering         146 (9.2%)
+   Texas Instruments                 68 (4.3%)
+   Renesas Electronics               57 (3.6%)
+   Red Hat                           51 (3.2%)
+   NVidia                            40 (2.5%)
+   CompuLab                          35 (2.2%)
+   Samsung                           35 (2.2%)
+   Konsulko Group                    22 (1.4%)
+   Atmel                             13 (0.8%)
+   Guntermann & Drunck               10 (0.6%)
+   ST Microelectronics               10 (0.6%)
+   Linaro                            8 (0.5%)
+   Collabora Ltd.                    7 (0.4%)
+   Keymile                           6 (0.4%)
+   Broadcom                          5 (0.3%)
+   Boundary Devices                  4 (0.3%)
+   Citrix                            4 (0.3%)
+   Digi International                4 (0.3%)
+   Analog Devices                    3 (0.2%)
+   Free Electrons                    3 (0.2%)
+   AMD                               2 (0.1%)
+   Extreme Engineering Solutions     2 (0.1%)
+   Wind River                        1 (0.1%)
+   Debian.org                        1 (0.1%)
+   ESD Electronics                   1 (0.1%)
+   Marvell                           1 (0.1%)
+   Pengutronix                       1 (0.1%)
+   Toradex                           1 (0.1%)
+   Transmode Systems                 1 (0.1%)
+   Xilinx                            1 (0.1%)
+   Nobuhiro Iwamatsu                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Socionext Inc.                    77001 (30.6%)
+   DENX Software Engineering         76287 (30.3%)
+   Google, Inc.                      37834 (15.0%)
+   (Unknown)                         20165 (8.0%)
+   Freescale                         13030 (5.2%)
+   NVidia                            5657 (2.2%)
+   Renesas Electronics               5160 (2.0%)
+   Texas Instruments                 4549 (1.8%)
+   CompuLab                          3041 (1.2%)
+   Guntermann & Drunck               2407 (1.0%)
+   Red Hat                           2190 (0.9%)
+   Atmel                             1558 (0.6%)
+   ST Microelectronics               1005 (0.4%)
+   Samsung                           879 (0.3%)
+   Broadcom                          391 (0.2%)
+   Collabora Ltd.                    210 (0.1%)
+   Linaro                            178 (0.1%)
+   Konsulko Group                    116 (0.0%)
+   Citrix                            75 (0.0%)
+   Free Electrons                    45 (0.0%)
+   Boundary Devices                  36 (0.0%)
+   Pengutronix                       30 (0.0%)
+   Keymile                           26 (0.0%)
+   Analog Devices                    16 (0.0%)
+   Digi International                14 (0.0%)
+   Extreme Engineering Solutions     14 (0.0%)
+   Nobuhiro Iwamatsu                 13 (0.0%)
+   Xilinx                            8 (0.0%)
+   ESD Electronics                   7 (0.0%)
+   Debian.org                        5 (0.0%)
+   Transmode Systems                 4 (0.0%)
+   AMD                               3 (0.0%)
+   Toradex                           3 (0.0%)
+   Wind River                        2 (0.0%)
+   Marvell                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 290)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Texas Instruments                 41 (14.1%)
+   (Unknown)                         36 (12.4%)
+   NVidia                            36 (12.4%)
+   Samsung                           35 (12.1%)
+   Google, Inc.                      34 (11.7%)
+   Freescale                         34 (11.7%)
+   Red Hat                           27 (9.3%)
+   Renesas Electronics               15 (5.2%)
+   DENX Software Engineering         12 (4.1%)
+   Nobuhiro Iwamatsu                 5 (1.7%)
+   Novell                            5 (1.7%)
+   Xilinx                            4 (1.4%)
+   CompuLab                          2 (0.7%)
+   Atmel                             1 (0.3%)
+   Free Electrons                    1 (0.3%)
+   Extreme Engineering Solutions     1 (0.3%)
+   Panasonic                         1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 165)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         68 (41.2%)
+   Freescale                         33 (20.0%)
+   Texas Instruments                 8 (4.8%)
+   Samsung                           8 (4.8%)
+   DENX Software Engineering         6 (3.6%)
+   NVidia                            4 (2.4%)
+   Google, Inc.                      3 (1.8%)
+   CompuLab                          3 (1.8%)
+   Linaro                            3 (1.8%)
+   Atmel                             2 (1.2%)
+   Extreme Engineering Solutions     2 (1.2%)
+   Keymile                           2 (1.2%)
+   Red Hat                           1 (0.6%)
+   Renesas Electronics               1 (0.6%)
+   Nobuhiro Iwamatsu                 1 (0.6%)
+   Xilinx                            1 (0.6%)
+   Free Electrons                    1 (0.6%)
+   Socionext Inc.                    1 (0.6%)
+   Guntermann & Drunck               1 (0.6%)
+   ST Microelectronics               1 (0.6%)
+   Broadcom                          1 (0.6%)
+   Collabora Ltd.                    1 (0.6%)
+   Konsulko Group                    1 (0.6%)
+   Citrix                            1 (0.6%)
+   Boundary Devices                  1 (0.6%)
+   Pengutronix                       1 (0.6%)
+   Analog Devices                    1 (0.6%)
+   Digi International                1 (0.6%)
+   ESD Electronics                   1 (0.6%)
+   Debian.org                        1 (0.6%)
+   Transmode Systems                 1 (0.6%)
+   AMD                               1 (0.6%)
+   Toradex                           1 (0.6%)
+   Wind River                        1 (0.6%)
+   Marvell                           1 (0.6%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2015.04.rst b/doc/develop/statistics/u-boot-stats-v2015.04.rst
new file mode 100644
index 00000000000..75a0215af74
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2015.04.rst
@@ -0,0 +1,769 @@
+:orphan:
+
+Release Statistics for U-Boot v2015.04
+======================================
+
+* Processed 1585 changesets from 169 developers
+
+* 36 employers found
+
+* A total of 99448 lines added, 166603 removed (delta -67155)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       225 (14.2%)
+   Masahiro Yamada                   158 (10.0%)
+   Hans de Goede                     140 (8.8%)
+   Bin Meng                          67 (4.2%)
+   Michal Simek                      52 (3.3%)
+   Alexey Brodkin                    39 (2.5%)
+   Nikita Kiryanov                   39 (2.5%)
+   Fabio Estevam                     36 (2.3%)
+   Bo Shen                           33 (2.1%)
+   Przemyslaw Marczak                31 (2.0%)
+   Stephen Warren                    27 (1.7%)
+   Hannes Petermaier                 25 (1.6%)
+   Peng Fan                          25 (1.6%)
+   Marcel Ziswiler                   23 (1.5%)
+   Matthias Fuchs                    23 (1.5%)
+   Stefan Roese                      22 (1.4%)
+   Tom Rini                          21 (1.3%)
+   Heiko Schocher                    20 (1.3%)
+   Siarhei Siamashka                 18 (1.1%)
+   Diego Santa Cruz                  18 (1.1%)
+   York Sun                          16 (1.0%)
+   Akshay Saraswat                   16 (1.0%)
+   Albert ARIBAUD (3ADEV)            15 (0.9%)
+   Paul Burton                       15 (0.9%)
+   Andreas Bießmann                  14 (0.9%)
+   Marek Vasut                       14 (0.9%)
+   Nobuhiro Iwamatsu                 14 (0.9%)
+   Linus Walleij                     13 (0.8%)
+   Wu, Josh                          13 (0.8%)
+   Ruchika Gupta                     13 (0.8%)
+   Axel Lin                          11 (0.7%)
+   Daniel Schwierzeck                11 (0.7%)
+   Codrin Ciubotariu                 11 (0.7%)
+   Peter Tyser                       10 (0.6%)
+   Nishanth Menon                    10 (0.6%)
+   Guilherme Maciel Ferreira         10 (0.6%)
+   Sjoerd Simons                     9 (0.6%)
+   gaurav rana                       9 (0.6%)
+   Christian Gmeiner                 9 (0.6%)
+   Luka Perkov                       9 (0.6%)
+   Ajay Kumar                        8 (0.5%)
+   Rob Herring                       8 (0.5%)
+   Chen-Yu Tsai                      8 (0.5%)
+   Alison Wang                       8 (0.5%)
+   Vladimir Barinov                  8 (0.5%)
+   Tang Yuantian                     7 (0.4%)
+   Łukasz Majewski                   6 (0.4%)
+   Siva Durga Prasad Paladugu        6 (0.4%)
+   Stefano Babic                     6 (0.4%)
+   Minghuan Lian                     6 (0.4%)
+   Joonyoung Shim                    6 (0.4%)
+   Valentin Longchamp                6 (0.4%)
+   Albert ARIBAUD                    5 (0.3%)
+   Ian Campbell                      5 (0.3%)
+   Bhupesh Sharma                    5 (0.3%)
+   Otavio Salvador                   5 (0.3%)
+   Igor Guryanov                     5 (0.3%)
+   Felipe Balbi                      5 (0.3%)
+   Jan Kiszka                        4 (0.3%)
+   Iain Paton                        4 (0.3%)
+   Angelo Dureghello                 4 (0.3%)
+   Joe Hershberger                   4 (0.3%)
+   Paul Kocialkowski                 4 (0.3%)
+   Sonic Zhang                       4 (0.3%)
+   Dileep Katta                      4 (0.3%)
+   Jaehoon Chung                     4 (0.3%)
+   Michael Walle                     4 (0.3%)
+   Ye.Li                             4 (0.3%)
+   DrEagle                           4 (0.3%)
+   Pavel Machek                      3 (0.2%)
+   Stefan Agner                      3 (0.2%)
+   David Feng                        3 (0.2%)
+   Boris Brezillon                   3 (0.2%)
+   Matt Reimer                       3 (0.2%)
+   Sinan Akman                       3 (0.2%)
+   Graeme Russ                       3 (0.2%)
+   Shengzhou Liu                     3 (0.2%)
+   James Doublesin                   3 (0.2%)
+   Georgi Botev                      3 (0.2%)
+   Anatolij Gustschin                2 (0.1%)
+   Andrej Rosano                     2 (0.1%)
+   Chris Kuethe                      2 (0.1%)
+   Ulises Cardenas                   2 (0.1%)
+   Inha Song                         2 (0.1%)
+   Luca Ellero                       2 (0.1%)
+   Thierry Reding                    2 (0.1%)
+   Maxin B. John                     2 (0.1%)
+   Gilles Gameiro                    2 (0.1%)
+   Kim Phillips                      2 (0.1%)
+   Aleksei Mamlin                    2 (0.1%)
+   Marcus Cooper                     2 (0.1%)
+   Adam Sampson                      2 (0.1%)
+   Ajay Bhargav                      2 (0.1%)
+   Soeren Moch                       2 (0.1%)
+   Enric Balletbo i Serra            2 (0.1%)
+   Arnab Basu                        2 (0.1%)
+   Lubomir Popov                     2 (0.1%)
+   Eric Nelson                       2 (0.1%)
+   Vitaly Andrianov                  2 (0.1%)
+   Lokesh Vutla                      2 (0.1%)
+   Anton Habegger                    2 (0.1%)
+   Andrew Gabbasov                   2 (0.1%)
+   Anthoine Bourgeois                2 (0.1%)
+   Grazvydas Ignotas                 1 (0.1%)
+   Mario Schuknecht                  1 (0.1%)
+   Guillaume GARDET                  1 (0.1%)
+   David Dueck                       1 (0.1%)
+   Lucas Stach                       1 (0.1%)
+   Ravi Babu                         1 (0.1%)
+   Brian McFarland                   1 (0.1%)
+   Karsten Merker                    1 (0.1%)
+   Michal Marek                      1 (0.1%)
+   Sebastian Siewior                 1 (0.1%)
+   Roger Meier                       1 (0.1%)
+   Sekhar Nori                       1 (0.1%)
+   Praveen Rao                       1 (0.1%)
+   Angela Stegmaier                  1 (0.1%)
+   Volodymyr Riazantsev              1 (0.1%)
+   Dirk Behme                        1 (0.1%)
+   Jens Lucius                       1 (0.1%)
+   Gábor Nyers                       1 (0.1%)
+   Chen Gang                         1 (0.1%)
+   Ash Charles                       1 (0.1%)
+   Michal Sojka                      1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   vijay rai                         1 (0.1%)
+   Nikolaos Pasaloukos               1 (0.1%)
+   Ying Zhang                        1 (0.1%)
+   Shaveta Leekha                    1 (0.1%)
+   Doug Anderson                     1 (0.1%)
+   Michael Scott                     1 (0.1%)
+   Xiubo Li                          1 (0.1%)
+   chenhui zhao                      1 (0.1%)
+   J. German Rivera                  1 (0.1%)
+   Stuart Yoder                      1 (0.1%)
+   Kuldip Giroh                      1 (0.1%)
+   Pantelis Antoniou                 1 (0.1%)
+   Waldemar Brodkorb                 1 (0.1%)
+   Vladimir Zapolskiy                1 (0.1%)
+   Steve Kipisz                      1 (0.1%)
+   Egli, Samuel                      1 (0.1%)
+   Michal Suchanek                   1 (0.1%)
+   Scott Wood                        1 (0.1%)
+   Philippe De Muyter                1 (0.1%)
+   Yoshinori Sato                    1 (0.1%)
+   Claudiu Manoil                    1 (0.1%)
+   Dennis Gilmore                    1 (0.1%)
+   Martin Dorwig                     1 (0.1%)
+   Pieter Voorthuijsen               1 (0.1%)
+   Pali Rohár                        1 (0.1%)
+   Sebastien Ronsse                  1 (0.1%)
+   Priit Laes                        1 (0.1%)
+   Zoltan HERPAI                     1 (0.1%)
+   Thomas Langer                     1 (0.1%)
+   Alexandre Coffignal               1 (0.1%)
+   Rene Griessl                      1 (0.1%)
+   Alex Sadovsky                     1 (0.1%)
+   Shaohui Xie                       1 (0.1%)
+   harninder rai                     1 (0.1%)
+   Aneesh Bansal                     1 (0.1%)
+   Tudor Laurentiu                   1 (0.1%)
+   Chunhe Lan                        1 (0.1%)
+   Po Liu                            1 (0.1%)
+   Evgeni Dobrev                     1 (0.1%)
+   Bill Pringlemeir                  1 (0.1%)
+   Wolfgang Denk                     1 (0.1%)
+   Cooper Jr., Franklin              1 (0.1%)
+   Matwey V. Kornilov                1 (0.1%)
+   Daniel Mack                       1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Matthias Fuchs                    89003 (35.4%)
+   Masahiro Yamada                   61978 (24.7%)
+   Stefan Roese                      19579 (7.8%)
+   Simon Glass                       13611 (5.4%)
+   Bin Meng                          10014 (4.0%)
+   Hans de Goede                     6470 (2.6%)
+   Albert ARIBAUD (3ADEV)            4474 (1.8%)
+   Vladimir Barinov                  3047 (1.2%)
+   Nobuhiro Iwamatsu                 2794 (1.1%)
+   Alexey Brodkin                    2022 (0.8%)
+   gaurav rana                       1937 (0.8%)
+   Stephen Warren                    1767 (0.7%)
+   Nikita Kiryanov                   1651 (0.7%)
+   Bo Shen                           1562 (0.6%)
+   Gilles Gameiro                    1545 (0.6%)
+   Marek Vasut                       1445 (0.6%)
+   Siarhei Siamashka                 1395 (0.6%)
+   Michal Simek                      1259 (0.5%)
+   Anton Habegger                    1246 (0.5%)
+   Codrin Ciubotariu                 1191 (0.5%)
+   Angelo Dureghello                 1165 (0.5%)
+   Ruchika Gupta                     1143 (0.5%)
+   Akshay Saraswat                   1115 (0.4%)
+   Hannes Petermaier                 905 (0.4%)
+   Guilherme Maciel Ferreira         863 (0.3%)
+   Linus Walleij                     829 (0.3%)
+   Boris Brezillon                   785 (0.3%)
+   Minghuan Lian                     741 (0.3%)
+   Paul Burton                       706 (0.3%)
+   Andrej Rosano                     692 (0.3%)
+   Peng Fan                          648 (0.3%)
+   Daniel Schwierzeck                601 (0.2%)
+   Peter Tyser                       594 (0.2%)
+   J. German Rivera                  592 (0.2%)
+   Diego Santa Cruz                  575 (0.2%)
+   Andreas Bießmann                  522 (0.2%)
+   Ulises Cardenas                   493 (0.2%)
+   Evgeni Dobrev                     469 (0.2%)
+   York Sun                          460 (0.2%)
+   Wu, Josh                          441 (0.2%)
+   Przemyslaw Marczak                415 (0.2%)
+   Shaveta Leekha                    393 (0.2%)
+   Otavio Salvador                   381 (0.2%)
+   Dennis Gilmore                    341 (0.1%)
+   Heiko Schocher                    317 (0.1%)
+   Alison Wang                       290 (0.1%)
+   Nishanth Menon                    284 (0.1%)
+   Marcel Ziswiler                   270 (0.1%)
+   James Doublesin                   241 (0.1%)
+   Fabio Estevam                     238 (0.1%)
+   Christian Gmeiner                 232 (0.1%)
+   Jan Kiszka                        223 (0.1%)
+   Tang Yuantian                     222 (0.1%)
+   Felipe Balbi                      213 (0.1%)
+   Albert ARIBAUD                    201 (0.1%)
+   Bhupesh Sharma                    190 (0.1%)
+   Michael Walle                     164 (0.1%)
+   Martin Dorwig                     163 (0.1%)
+   Shaohui Xie                       161 (0.1%)
+   Graeme Russ                       157 (0.1%)
+   Lubomir Popov                     154 (0.1%)
+   Roger Meier                       150 (0.1%)
+   Sjoerd Simons                     149 (0.1%)
+   Grazvydas Ignotas                 141 (0.1%)
+   Anthoine Bourgeois                140 (0.1%)
+   Rob Herring                       133 (0.1%)
+   Ajay Kumar                        122 (0.0%)
+   Daniel Mack                       122 (0.0%)
+   Xiubo Li                          119 (0.0%)
+   Valentin Longchamp                113 (0.0%)
+   Dileep Katta                      113 (0.0%)
+   Tom Rini                          110 (0.0%)
+   Chen-Yu Tsai                      110 (0.0%)
+   Thomas Langer                     110 (0.0%)
+   Doug Anderson                     95 (0.0%)
+   Igor Guryanov                     87 (0.0%)
+   Joonyoung Shim                    82 (0.0%)
+   Siva Durga Prasad Paladugu        79 (0.0%)
+   DrEagle                           74 (0.0%)
+   David Feng                        71 (0.0%)
+   Łukasz Majewski                   70 (0.0%)
+   Shengzhou Liu                     69 (0.0%)
+   Anatolij Gustschin                69 (0.0%)
+   Kim Phillips                      64 (0.0%)
+   Axel Lin                          59 (0.0%)
+   Philippe De Muyter                58 (0.0%)
+   Jaehoon Chung                     57 (0.0%)
+   Karsten Merker                    47 (0.0%)
+   Paul Kocialkowski                 45 (0.0%)
+   vijay rai                         45 (0.0%)
+   Lokesh Vutla                      44 (0.0%)
+   Zoltan HERPAI                     44 (0.0%)
+   Pantelis Antoniou                 43 (0.0%)
+   Vitaly Andrianov                  38 (0.0%)
+   Luka Perkov                       37 (0.0%)
+   Joe Hershberger                   37 (0.0%)
+   Ye.Li                             32 (0.0%)
+   Marcus Cooper                     32 (0.0%)
+   Iain Paton                        31 (0.0%)
+   Enric Balletbo i Serra            31 (0.0%)
+   Yoshinori Sato                    30 (0.0%)
+   Soeren Moch                       29 (0.0%)
+   chenhui zhao                      28 (0.0%)
+   Arnab Basu                        27 (0.0%)
+   Pavel Machek                      24 (0.0%)
+   Stefano Babic                     23 (0.0%)
+   Brian McFarland                   22 (0.0%)
+   Ian Campbell                      21 (0.0%)
+   Chen Gang                         21 (0.0%)
+   Ash Charles                       21 (0.0%)
+   Stefan Agner                      20 (0.0%)
+   Aleksei Mamlin                    20 (0.0%)
+   Inha Song                         19 (0.0%)
+   Priit Laes                        19 (0.0%)
+   Dirk Behme                        18 (0.0%)
+   Matwey V. Kornilov                18 (0.0%)
+   Andrew Gabbasov                   17 (0.0%)
+   Wolfgang Denk                     17 (0.0%)
+   Jens Lucius                       16 (0.0%)
+   Sonic Zhang                       15 (0.0%)
+   Gábor Nyers                       15 (0.0%)
+   Michael Scott                     15 (0.0%)
+   Michal Suchanek                   15 (0.0%)
+   Michal Sojka                      14 (0.0%)
+   Rene Griessl                      14 (0.0%)
+   Cooper Jr., Franklin              14 (0.0%)
+   Praveen Rao                       13 (0.0%)
+   Eric Nelson                       12 (0.0%)
+   Po Liu                            12 (0.0%)
+   Adam Sampson                      11 (0.0%)
+   Sinan Akman                       10 (0.0%)
+   Ajay Bhargav                      10 (0.0%)
+   Maxin B. John                     9 (0.0%)
+   Michal Marek                      9 (0.0%)
+   Volodymyr Riazantsev              9 (0.0%)
+   Ravi Babu                         8 (0.0%)
+   Angela Stegmaier                  8 (0.0%)
+   Thierry Reding                    7 (0.0%)
+   Georgi Botev                      6 (0.0%)
+   David Dueck                       6 (0.0%)
+   Alexandre Coffignal               6 (0.0%)
+   Steve Kipisz                      5 (0.0%)
+   Matt Reimer                       4 (0.0%)
+   Mario Schuknecht                  4 (0.0%)
+   Egli, Samuel                      4 (0.0%)
+   Kuldip Giroh                      3 (0.0%)
+   Waldemar Brodkorb                 3 (0.0%)
+   Vladimir Zapolskiy                3 (0.0%)
+   Scott Wood                        3 (0.0%)
+   Chunhe Lan                        3 (0.0%)
+   Bill Pringlemeir                  3 (0.0%)
+   Chris Kuethe                      2 (0.0%)
+   Luca Ellero                       2 (0.0%)
+   Guillaume GARDET                  2 (0.0%)
+   Lucas Stach                       2 (0.0%)
+   Sebastian Siewior                 2 (0.0%)
+   Ying Zhang                        2 (0.0%)
+   Claudiu Manoil                    2 (0.0%)
+   Pieter Voorthuijsen               2 (0.0%)
+   Alex Sadovsky                     2 (0.0%)
+   harninder rai                     2 (0.0%)
+   Aneesh Bansal                     2 (0.0%)
+   Sekhar Nori                       1 (0.0%)
+   Chris Packham                     1 (0.0%)
+   Nikolaos Pasaloukos               1 (0.0%)
+   Stuart Yoder                      1 (0.0%)
+   Pali Rohár                        1 (0.0%)
+   Sebastien Ronsse                  1 (0.0%)
+   Tudor Laurentiu                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Matthias Fuchs                    88963 (53.4%)
+   Masahiro Yamada                   54187 (32.5%)
+   Peter Tyser                       339 (0.2%)
+   Paul Burton                       231 (0.1%)
+   Daniel Schwierzeck                193 (0.1%)
+   Grazvydas Ignotas                 105 (0.1%)
+   Thomas Langer                     102 (0.1%)
+   Anthoine Bourgeois                88 (0.1%)
+   Wu, Josh                          81 (0.0%)
+   James Doublesin                   62 (0.0%)
+   vijay rai                         45 (0.0%)
+   Rob Herring                       37 (0.0%)
+   Vitaly Andrianov                  19 (0.0%)
+   Tom Rini                          18 (0.0%)
+   Doug Anderson                     18 (0.0%)
+   Joe Hershberger                   18 (0.0%)
+   Ye.Li                             17 (0.0%)
+   Stefano Babic                     9 (0.0%)
+   Axel Lin                          7 (0.0%)
+   Enric Balletbo i Serra            3 (0.0%)
+   Bill Pringlemeir                  3 (0.0%)
+   Sebastian Siewior                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 222)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Hans de Goede                     49 (22.1%)
+   Minkyu Kang                       41 (18.5%)
+   Tom Warren                        33 (14.9%)
+   Nobuhiro Iwamatsu                 11 (5.0%)
+   Simon Glass                       7 (3.2%)
+   Andreas Bießmann                  6 (2.7%)
+   Michal Simek                      6 (2.7%)
+   Alexey Brodkin                    6 (2.7%)
+   Tom Rini                          4 (1.8%)
+   Joe Hershberger                   4 (1.8%)
+   Kimoon Kim                        4 (1.8%)
+   Ruchika Gupta                     4 (1.8%)
+   Boris BREZILLON                   3 (1.4%)
+   Ian Campbell                      3 (1.4%)
+   Igor Guryanov                     3 (1.4%)
+   Felipe Balbi                      3 (1.4%)
+   Igor Grinberg                     2 (0.9%)
+   Pantelis Antoniou                 2 (0.9%)
+   York Sun                          2 (0.9%)
+   Masahiro Yamada                   1 (0.5%)
+   Paul Burton                       1 (0.5%)
+   Rob Herring                       1 (0.5%)
+   Michal Marek                      1 (0.5%)
+   Angela Stegmaier                  1 (0.5%)
+   Andy Shevchenko                   1 (0.5%)
+   Nikhil Badola                     1 (0.5%)
+   Nitin Garg                        1 (0.5%)
+   Abhilash Kesavan                  1 (0.5%)
+   Valentine Barshak                 1 (0.5%)
+   Lijun Pan                         1 (0.5%)
+   Ranjani Vaidyanathan              1 (0.5%)
+   Damien Gotfroi                    1 (0.5%)
+   Poonam Aggrwal                    1 (0.5%)
+   Varun Sethi                       1 (0.5%)
+   Laurentiu Tudor                   1 (0.5%)
+   Mingkai.Hu                        1 (0.5%)
+   Antonios Vamporakis               1 (0.5%)
+   Lokesh Vutla                      1 (0.5%)
+   Marcel Ziswiler                   1 (0.5%)
+   Siva Durga Prasad Paladugu        1 (0.5%)
+   Xiubo Li                          1 (0.5%)
+   Nishanth Menon                    1 (0.5%)
+   Bhupesh Sharma                    1 (0.5%)
+   Linus Walleij                     1 (0.5%)
+   Alison Wang                       1 (0.5%)
+   Shaveta Leekha                    1 (0.5%)
+   Akshay Saraswat                   1 (0.5%)
+   Stephen Warren                    1 (0.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 293)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       93 (31.7%)
+   York Sun                          58 (19.8%)
+   Bin Meng                          32 (10.9%)
+   Tom Rini                          26 (8.9%)
+   Masahiro Yamada                   19 (6.5%)
+   Luka Perkov                       14 (4.8%)
+   Stefan Roese                      9 (3.1%)
+   Jagannadha Sutradharudu Teki      8 (2.7%)
+   Łukasz Majewski                   7 (2.4%)
+   Stephen Warren                    6 (2.0%)
+   Steve Rae                         3 (1.0%)
+   Hans de Goede                     2 (0.7%)
+   Alexey Brodkin                    2 (0.7%)
+   Roger Meier                       2 (0.7%)
+   Marek Vasut                       2 (0.7%)
+   Joe Hershberger                   1 (0.3%)
+   Ruchika Gupta                     1 (0.3%)
+   Boris BREZILLON                   1 (0.3%)
+   Linus Walleij                     1 (0.3%)
+   Peter Crosthwaite                 1 (0.3%)
+   Nathan Rossi                      1 (0.3%)
+   Guido Martínez                    1 (0.3%)
+   Volodymyr Riazantsev              1 (0.3%)
+   Fabio Estevam                     1 (0.3%)
+   Przemyslaw Marczak                1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 117)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       31 (26.5%)
+   Bo Shen                           14 (12.0%)
+   Wu, Josh                          13 (11.1%)
+   Matt Porter                       11 (9.4%)
+   Bin Meng                          8 (6.8%)
+   Heiko Schocher                    6 (5.1%)
+   Stephen Warren                    4 (3.4%)
+   Tom Rini                          2 (1.7%)
+   Łukasz Majewski                   2 (1.7%)
+   Alexey Brodkin                    2 (1.7%)
+   Michal Simek                      2 (1.7%)
+   Nishanth Menon                    2 (1.7%)
+   Chris Kuethe                      2 (1.7%)
+   Stefan Roese                      1 (0.9%)
+   Steve Rae                         1 (0.9%)
+   Hans de Goede                     1 (0.9%)
+   Guido Martínez                    1 (0.9%)
+   Fabio Estevam                     1 (0.9%)
+   Felipe Balbi                      1 (0.9%)
+   Marcel Ziswiler                   1 (0.9%)
+   Daniel Schwierzeck                1 (0.9%)
+   Stefano Babic                     1 (0.9%)
+   Vagrant Cascadian                 1 (0.9%)
+   Michal Vokáč                      1 (0.9%)
+   Mugunthan V N                     1 (0.9%)
+   Thierry Reding                    1 (0.9%)
+   Jaehoon Chung                     1 (0.9%)
+   Zoltan HERPAI                     1 (0.9%)
+   Chen-Yu Tsai                      1 (0.9%)
+   Jan Kiszka                        1 (0.9%)
+   Nikita Kiryanov                   1 (0.9%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 117)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Nikita Kiryanov                   32 (27.4%)
+   Simon Glass                       15 (12.8%)
+   Akshay Saraswat                   11 (9.4%)
+   Nishanth Menon                    8 (6.8%)
+   Ajay Kumar                        8 (6.8%)
+   Peter Tyser                       5 (4.3%)
+   Masahiro Yamada                   4 (3.4%)
+   Przemyslaw Marczak                4 (3.4%)
+   Hans de Goede                     3 (2.6%)
+   James Doublesin                   3 (2.6%)
+   Andrej Rosano                     3 (2.6%)
+   Tom Rini                          2 (1.7%)
+   Fabio Estevam                     2 (1.7%)
+   Pantelis Antoniou                 2 (1.7%)
+   Vitaly Andrianov                  2 (1.7%)
+   Andrew Gabbasov                   2 (1.7%)
+   Bo Shen                           1 (0.9%)
+   Andreas Bießmann                  1 (0.9%)
+   Guillaume GARDET                  1 (0.9%)
+   Lucas Stach                       1 (0.9%)
+   Inha Song                         1 (0.9%)
+   Michal Sojka                      1 (0.9%)
+   Praveen Rao                       1 (0.9%)
+   Michael Scott                     1 (0.9%)
+   Daniel Mack                       1 (0.9%)
+   Sjoerd Simons                     1 (0.9%)
+   Peng Fan                          1 (0.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 24)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stephen Warren                    4 (16.7%)
+   York Sun                          3 (12.5%)
+   Albert ARIBAUD                    3 (12.5%)
+   Masahiro Yamada                   2 (8.3%)
+   Tom Rini                          2 (8.3%)
+   Stefan Roese                      1 (4.2%)
+   Jan Kiszka                        1 (4.2%)
+   Chee-Yang Chau                    1 (4.2%)
+   Matthew Gerlach                   1 (4.2%)
+   Matt Ranostay                     1 (4.2%)
+   Valdis Kletnieks                  1 (4.2%)
+   Vivek Chengalvala                 1 (4.2%)
+   Scott Wood                        1 (4.2%)
+   Graeme Russ                       1 (4.2%)
+   Siarhei Siamashka                 1 (4.2%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 24)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       7 (29.2%)
+   Masahiro Yamada                   6 (25.0%)
+   Tom Rini                          2 (8.3%)
+   Stephen Warren                    1 (4.2%)
+   Nishanth Menon                    1 (4.2%)
+   Hans de Goede                     1 (4.2%)
+   Fabio Estevam                     1 (4.2%)
+   Pantelis Antoniou                 1 (4.2%)
+   Michal Simek                      1 (4.2%)
+   Michal Marek                      1 (4.2%)
+   Enric Balletbo i Serra            1 (4.2%)
+   Kim Phillips                      1 (4.2%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         422 (26.6%)
+   Google, Inc.                      226 (14.3%)
+   Socionext Inc.                    158 (10.0%)
+   Freescale                         152 (9.6%)
+   Red Hat                           140 (8.8%)
+   Samsung                           73 (4.6%)
+   DENX Software Engineering         68 (4.3%)
+   AMD                               52 (3.3%)
+   Atmel                             46 (2.9%)
+   CompuLab                          39 (2.5%)
+   Texas Instruments                 28 (1.8%)
+   NVidia                            24 (1.5%)
+   ESD Electronics                   23 (1.5%)
+   Konsulko Group                    22 (1.4%)
+   Linaro                            18 (1.1%)
+   MIPS                              15 (0.9%)
+   Renesas Electronics               13 (0.8%)
+   Collabora Ltd.                    10 (0.6%)
+   Extreme Engineering Solutions     10 (0.6%)
+   Keymile                           6 (0.4%)
+   Siemens                           6 (0.4%)
+   Xilinx                            6 (0.4%)
+   O.S. Systems                      5 (0.3%)
+   Analog Devices                    4 (0.3%)
+   National Instruments              4 (0.3%)
+   Ronetix                           3 (0.2%)
+   Boundary Devices                  2 (0.1%)
+   ENEA AB                           2 (0.1%)
+   Citrix                            1 (0.1%)
+   Bosch                             1 (0.1%)
+   Debian.org                        1 (0.1%)
+   linutronix                        1 (0.1%)
+   Macq Electronique                 1 (0.1%)
+   Novell                            1 (0.1%)
+   Nobuhiro Iwamatsu                 1 (0.1%)
+   Grazvydas Ignotas                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ESD Electronics                   89003 (35.4%)
+   Socionext Inc.                    61978 (24.7%)
+   (Unknown)                         35047 (13.9%)
+   DENX Software Engineering         21474 (8.5%)
+   Google, Inc.                      13706 (5.5%)
+   Freescale                         7971 (3.2%)
+   Red Hat                           6470 (2.6%)
+   Renesas Electronics               2782 (1.1%)
+   Atmel                             2003 (0.8%)
+   Samsung                           1880 (0.7%)
+   CompuLab                          1651 (0.7%)
+   NVidia                            1369 (0.5%)
+   AMD                               1259 (0.5%)
+   Linaro                            957 (0.4%)
+   Texas Instruments                 869 (0.3%)
+   MIPS                              706 (0.3%)
+   Extreme Engineering Solutions     594 (0.2%)
+   O.S. Systems                      381 (0.2%)
+   Siemens                           377 (0.1%)
+   Collabora Ltd.                    174 (0.1%)
+   Konsulko Group                    153 (0.1%)
+   Grazvydas Ignotas                 141 (0.1%)
+   Keymile                           113 (0.0%)
+   Xilinx                            79 (0.0%)
+   Macq Electronique                 58 (0.0%)
+   Debian.org                        47 (0.0%)
+   National Instruments              37 (0.0%)
+   Bosch                             18 (0.0%)
+   Analog Devices                    15 (0.0%)
+   Boundary Devices                  12 (0.0%)
+   Nobuhiro Iwamatsu                 12 (0.0%)
+   ENEA AB                           9 (0.0%)
+   Novell                            9 (0.0%)
+   Ronetix                           6 (0.0%)
+   linutronix                        2 (0.0%)
+   Citrix                            1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 222)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Red Hat                           49 (22.1%)
+   Samsung                           47 (21.2%)
+   NVidia                            34 (15.3%)
+   (Unknown)                         24 (10.8%)
+   Freescale                         18 (8.1%)
+   Nobuhiro Iwamatsu                 11 (5.0%)
+   Google, Inc.                      7 (3.2%)
+   Texas Instruments                 7 (3.2%)
+   Xilinx                            7 (3.2%)
+   Konsulko Group                    5 (2.3%)
+   National Instruments              4 (1.8%)
+   Free Electrons                    3 (1.4%)
+   CompuLab                          2 (0.9%)
+   Socionext Inc.                    1 (0.5%)
+   Linaro                            1 (0.5%)
+   Novell                            1 (0.5%)
+   Intel                             1 (0.5%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 173)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         78 (45.1%)
+   Freescale                         30 (17.3%)
+   Texas Instruments                 11 (6.4%)
+   Samsung                           7 (4.0%)
+   DENX Software Engineering         7 (4.0%)
+   Linaro                            3 (1.7%)
+   Siemens                           3 (1.7%)
+   NVidia                            2 (1.2%)
+   Google, Inc.                      2 (1.2%)
+   Konsulko Group                    2 (1.2%)
+   Atmel                             2 (1.2%)
+   Collabora Ltd.                    2 (1.2%)
+   Red Hat                           1 (0.6%)
+   Nobuhiro Iwamatsu                 1 (0.6%)
+   Xilinx                            1 (0.6%)
+   National Instruments              1 (0.6%)
+   CompuLab                          1 (0.6%)
+   Socionext Inc.                    1 (0.6%)
+   Novell                            1 (0.6%)
+   ESD Electronics                   1 (0.6%)
+   Renesas Electronics               1 (0.6%)
+   AMD                               1 (0.6%)
+   MIPS                              1 (0.6%)
+   Extreme Engineering Solutions     1 (0.6%)
+   O.S. Systems                      1 (0.6%)
+   Grazvydas Ignotas                 1 (0.6%)
+   Keymile                           1 (0.6%)
+   Macq Electronique                 1 (0.6%)
+   Debian.org                        1 (0.6%)
+   Bosch                             1 (0.6%)
+   Analog Devices                    1 (0.6%)
+   Boundary Devices                  1 (0.6%)
+   ENEA AB                           1 (0.6%)
+   Ronetix                           1 (0.6%)
+   linutronix                        1 (0.6%)
+   Citrix                            1 (0.6%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2015.07.rst b/doc/develop/statistics/u-boot-stats-v2015.07.rst
new file mode 100644
index 00000000000..ed6baee6b38
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2015.07.rst
@@ -0,0 +1,747 @@
+:orphan:
+
+Release Statistics for U-Boot v2015.07
+======================================
+
+* Processed 1563 changesets from 156 developers
+
+* 28 employers found
+
+* A total of 176355 lines added, 44130 removed (delta 132225)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       311 (19.9%)
+   Joe Hershberger                   111 (7.1%)
+   Hans de Goede                     106 (6.8%)
+   Tim Harvey                        77 (4.9%)
+   Masahiro Yamada                   68 (4.4%)
+   Bin Meng                          56 (3.6%)
+   Jagannadh Teki                    44 (2.8%)
+   Przemyslaw Marczak                43 (2.8%)
+   Paul Kocialkowski                 42 (2.7%)
+   Kishon Vijay Abraham I            41 (2.6%)
+   Stefan Roese                      38 (2.4%)
+   Fabio Estevam                     32 (2.0%)
+   Lokesh Vutla                      23 (1.5%)
+   Stephen Warren                    20 (1.3%)
+   Hannes Petermaier                 16 (1.0%)
+   Dinh Nguyen                       16 (1.0%)
+   Tom Rini                          15 (1.0%)
+   Heiko Schocher                    15 (1.0%)
+   Scott Wood                        15 (1.0%)
+   York Sun                          15 (1.0%)
+   Haikun Wang                       14 (0.9%)
+   Peter Robinson                    13 (0.8%)
+   Jan Kiszka                        13 (0.8%)
+   Marek Vasut                       12 (0.8%)
+   Siva Durga Prasad Paladugu        12 (0.8%)
+   Michal Simek                      11 (0.7%)
+   Chen-Yu Tsai                      11 (0.7%)
+   Prabhakar Kushwaha                10 (0.6%)
+   Peng Fan                          10 (0.6%)
+   Łukasz Majewski                   10 (0.6%)
+   Stefan Agner                      10 (0.6%)
+   Shengzhou Liu                     10 (0.6%)
+   Sjoerd Simons                     10 (0.6%)
+   Bhuvanchandra DV                  9 (0.6%)
+   Sanchayan Maity                   8 (0.5%)
+   Yegor Yefremov                    7 (0.4%)
+   Markus Niebel                     7 (0.4%)
+   Andreas Bießmann                  7 (0.4%)
+   Axel Lin                          6 (0.4%)
+   Soeren Moch                       6 (0.4%)
+   Linus Walleij                     6 (0.4%)
+   Yangbo Lu                         6 (0.4%)
+   Andrew Gabbasov                   6 (0.4%)
+   Roger Quadros                     5 (0.3%)
+   Pavel Machek                      5 (0.3%)
+   Mark Langsdorf                    5 (0.3%)
+   Nikhil Badola                     5 (0.3%)
+   Gabriel Huau                      5 (0.3%)
+   Nikolay Dimitrov                  5 (0.3%)
+   Thierry Reding                    5 (0.3%)
+   Minghuan Lian                     5 (0.3%)
+   Sergey Temerkhanov                5 (0.3%)
+   Tang Yuantian                     4 (0.3%)
+   Alexey Brodkin                    4 (0.3%)
+   Kevin Smith                       4 (0.3%)
+   Ian Campbell                      4 (0.3%)
+   Rob Herring                       4 (0.3%)
+   Ash Charles                       4 (0.3%)
+   Inha Song                         4 (0.3%)
+   Nobuhiro Iwamatsu                 4 (0.3%)
+   Matt Porter                       4 (0.3%)
+   Karl Apsite                       4 (0.3%)
+   Jörg Krause                       4 (0.3%)
+   Kamil Lulko                       4 (0.3%)
+   Marek Szyprowski                  4 (0.3%)
+   Antonio Borneo                    3 (0.2%)
+   Mugunthan V N                     3 (0.2%)
+   Daniel Schwierzeck                3 (0.2%)
+   Jeroen Hofstee                    3 (0.2%)
+   Stefano Babic                     3 (0.2%)
+   Andrew Bradford                   3 (0.2%)
+   Alison Wang                       3 (0.2%)
+   Eric Nelson                       3 (0.2%)
+   Wu, Josh                          3 (0.2%)
+   Vikas Manocha                     3 (0.2%)
+   Arun Bharadwaj                    3 (0.2%)
+   Zhao Qiang                        3 (0.2%)
+   Vishnu Patekar                    3 (0.2%)
+   Dileep Katta                      3 (0.2%)
+   Bhupesh Sharma                    3 (0.2%)
+   Pushpal Sidhu                     3 (0.2%)
+   Minkyu Kang                       2 (0.1%)
+   Shaohui Xie                       2 (0.1%)
+   Nishanth Menon                    2 (0.1%)
+   Angelo Dureghello                 2 (0.1%)
+   Chris Packham                     2 (0.1%)
+   Guillaume GARDET                  2 (0.1%)
+   Vitaly Andrianov                  2 (0.1%)
+   Cooper Jr., Franklin              2 (0.1%)
+   Joonyoung Shim                    2 (0.1%)
+   Christian Gmeiner                 2 (0.1%)
+   Lars Poeschel                     2 (0.1%)
+   Daniel Kochmański                 2 (0.1%)
+   Roy Spliet                        2 (0.1%)
+   Ricardo Ribalda                   2 (0.1%)
+   Tuomas Tynkkynen                  2 (0.1%)
+   Ulises Cardenas                   2 (0.1%)
+   Peter Howard                      2 (0.1%)
+   kunhuahuang                       2 (0.1%)
+   Jagannadha Sutradharudu Teki      2 (0.1%)
+   Oleksandr G Zhadan                2 (0.1%)
+   Chunhe Lan                        2 (0.1%)
+   Nathan Rossi                      2 (0.1%)
+   pankaj chauhan                    2 (0.1%)
+   gaurav rana                       2 (0.1%)
+   Alexander Merkle                  2 (0.1%)
+   Andre Przywara                    1 (0.1%)
+   Michael Scherban                  1 (0.1%)
+   Egli, Samuel                      1 (0.1%)
+   Albert ARIBAUD (3ADEV)            1 (0.1%)
+   Maxime Ripard                     1 (0.1%)
+   Tony Wu                           1 (0.1%)
+   Bernhard Nortmann                 1 (0.1%)
+   Maxin B. John                     1 (0.1%)
+   Karsten Merker                    1 (0.1%)
+   Pali Rohár                        1 (0.1%)
+   Chris Kuethe                      1 (0.1%)
+   Adam YH Lee                       1 (0.1%)
+   Stefan Wahren                     1 (0.1%)
+   Mitsuhiro Kimura                  1 (0.1%)
+   Peter Griffin                     1 (0.1%)
+   Hannes Schmelzer                  1 (0.1%)
+   Thomas Petazzoni                  1 (0.1%)
+   Evgeniy Dushistov                 1 (0.1%)
+   Ryan Harkin                       1 (0.1%)
+   Raghav Dogra                      1 (0.1%)
+   Laurent Itti                      1 (0.1%)
+   Brecht Neyrinck                   1 (0.1%)
+   Vincent Palatin                   1 (0.1%)
+   Du Huanpeng                       1 (0.1%)
+   Max Krummenacher                  1 (0.1%)
+   Alexander Stein                   1 (0.1%)
+   Kevin Liu                         1 (0.1%)
+   Valentin Longchamp                1 (0.1%)
+   Andrea Scian                      1 (0.1%)
+   David Dueck                       1 (0.1%)
+   Jaiprakash Singh                  1 (0.1%)
+   Bryan De Faria                    1 (0.1%)
+   Zhou Zhu                          1 (0.1%)
+   Xiang Wang                        1 (0.1%)
+   J. German Rivera                  1 (0.1%)
+   Yao Yuan                          1 (0.1%)
+   Andrey Skvortsov                  1 (0.1%)
+   Luca Ellero                       1 (0.1%)
+   Tim James                         1 (0.1%)
+   Codrin Ciubotariu                 1 (0.1%)
+   Ying Zhang                        1 (0.1%)
+   Alexander Graf                    1 (0.1%)
+   Curt Brune                        1 (0.1%)
+   Bryan Brinsko                     1 (0.1%)
+   Valentine Barshak                 1 (0.1%)
+   David Feng                        1 (0.1%)
+   Han Pengfei                       1 (0.1%)
+   Alexey Firago                     1 (0.1%)
+   Michael Scott                     1 (0.1%)
+   Franck Jullien                    1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   56181 (28.7%)
+   Simon Glass                       22872 (11.7%)
+   Hans de Goede                     19807 (10.1%)
+   Kishon Vijay Abraham I            15720 (8.0%)
+   Joe Hershberger                   13351 (6.8%)
+   Prabhakar Kushwaha                6857 (3.5%)
+   Przemyslaw Marczak                6471 (3.3%)
+   Stefan Roese                      3275 (1.7%)
+   Bin Meng                          3114 (1.6%)
+   Haikun Wang                       3058 (1.6%)
+   York Sun                          3015 (1.5%)
+   Heiko Schocher                    2735 (1.4%)
+   Tim Harvey                        2358 (1.2%)
+   Oleksandr G Zhadan                2304 (1.2%)
+   Jagannadh Teki                    2287 (1.2%)
+   Fabio Estevam                     2262 (1.2%)
+   Andreas Bießmann                  2029 (1.0%)
+   Kamil Lulko                       1944 (1.0%)
+   Angelo Dureghello                 1782 (0.9%)
+   Sanchayan Maity                   1404 (0.7%)
+   Yegor Yefremov                    1305 (0.7%)
+   Paul Kocialkowski                 1204 (0.6%)
+   Lokesh Vutla                      1199 (0.6%)
+   Peter Robinson                    1199 (0.6%)
+   Matt Porter                       938 (0.5%)
+   Peter Howard                      770 (0.4%)
+   Scott Wood                        735 (0.4%)
+   Hannes Petermaier                 685 (0.3%)
+   Vishnu Patekar                    600 (0.3%)
+   Bhuvanchandra DV                  580 (0.3%)
+   Shengzhou Liu                     524 (0.3%)
+   Peng Fan                          513 (0.3%)
+   Chen-Yu Tsai                      493 (0.3%)
+   Ian Campbell                      476 (0.2%)
+   Michal Simek                      446 (0.2%)
+   Arun Bharadwaj                    440 (0.2%)
+   Stephen Warren                    431 (0.2%)
+   Daniel Kochmański                 426 (0.2%)
+   Jan Kiszka                        395 (0.2%)
+   J. German Rivera                  395 (0.2%)
+   Siva Durga Prasad Paladugu        382 (0.2%)
+   Minghuan Lian                     380 (0.2%)
+   Bhupesh Sharma                    377 (0.2%)
+   Gabriel Huau                      372 (0.2%)
+   Alexey Brodkin                    345 (0.2%)
+   Karl Apsite                       341 (0.2%)
+   Mark Langsdorf                    330 (0.2%)
+   Nishanth Menon                    330 (0.2%)
+   Nobuhiro Iwamatsu                 301 (0.2%)
+   Andrea Scian                      287 (0.1%)
+   Yangbo Lu                         284 (0.1%)
+   Eric Nelson                       283 (0.1%)
+   Stefan Agner                      281 (0.1%)
+   Sjoerd Simons                     257 (0.1%)
+   Chunhe Lan                        187 (0.1%)
+   Tom Rini                          185 (0.1%)
+   Valentin Longchamp                164 (0.1%)
+   Marek Vasut                       163 (0.1%)
+   Dinh Nguyen                       161 (0.1%)
+   Sergey Temerkhanov                160 (0.1%)
+   gaurav rana                       152 (0.1%)
+   Łukasz Majewski                   149 (0.1%)
+   Daniel Schwierzeck                142 (0.1%)
+   Zhao Qiang                        130 (0.1%)
+   Jeroen Hofstee                    128 (0.1%)
+   Jaiprakash Singh                  126 (0.1%)
+   Adam YH Lee                       124 (0.1%)
+   Nikhil Badola                     121 (0.1%)
+   kunhuahuang                       111 (0.1%)
+   Roy Spliet                        94 (0.0%)
+   Markus Niebel                     90 (0.0%)
+   Rob Herring                       90 (0.0%)
+   Pushpal Sidhu                     88 (0.0%)
+   Alison Wang                       78 (0.0%)
+   Yao Yuan                          78 (0.0%)
+   Vikas Manocha                     66 (0.0%)
+   Pavel Machek                      62 (0.0%)
+   Nathan Rossi                      62 (0.0%)
+   Thierry Reding                    61 (0.0%)
+   Andrew Gabbasov                   59 (0.0%)
+   Shaohui Xie                       58 (0.0%)
+   Axel Lin                          57 (0.0%)
+   Jörg Krause                       56 (0.0%)
+   Bryan De Faria                    56 (0.0%)
+   Marek Szyprowski                  55 (0.0%)
+   Mugunthan V N                     55 (0.0%)
+   Dileep Katta                      55 (0.0%)
+   Xiang Wang                        55 (0.0%)
+   Tang Yuantian                     54 (0.0%)
+   Lars Poeschel                     52 (0.0%)
+   Bryan Brinsko                     51 (0.0%)
+   Nikolay Dimitrov                  50 (0.0%)
+   Joonyoung Shim                    50 (0.0%)
+   Jagannadha Sutradharudu Teki      50 (0.0%)
+   Linus Walleij                     46 (0.0%)
+   Vitaly Andrianov                  46 (0.0%)
+   Minkyu Kang                       38 (0.0%)
+   Tim James                         38 (0.0%)
+   Christian Gmeiner                 37 (0.0%)
+   Soeren Moch                       35 (0.0%)
+   Inha Song                         33 (0.0%)
+   Michael Scott                     33 (0.0%)
+   Ash Charles                       30 (0.0%)
+   Wu, Josh                          30 (0.0%)
+   Cooper Jr., Franklin              30 (0.0%)
+   Vincent Palatin                   29 (0.0%)
+   Franck Jullien                    28 (0.0%)
+   Kevin Smith                       26 (0.0%)
+   Han Pengfei                       26 (0.0%)
+   Maxime Ripard                     25 (0.0%)
+   Mitsuhiro Kimura                  25 (0.0%)
+   Ying Zhang                        18 (0.0%)
+   Egli, Samuel                      17 (0.0%)
+   Codrin Ciubotariu                 17 (0.0%)
+   Valentine Barshak                 17 (0.0%)
+   Chris Packham                     16 (0.0%)
+   Hannes Schmelzer                  16 (0.0%)
+   pankaj chauhan                    13 (0.0%)
+   Alexey Firago                     13 (0.0%)
+   David Dueck                       12 (0.0%)
+   Roger Quadros                     11 (0.0%)
+   Luca Ellero                       11 (0.0%)
+   Ulises Cardenas                   10 (0.0%)
+   Curt Brune                        9 (0.0%)
+   Guillaume GARDET                  8 (0.0%)
+   Ricardo Ribalda                   7 (0.0%)
+   Laurent Itti                      7 (0.0%)
+   Alexander Graf                    7 (0.0%)
+   Stefano Babic                     6 (0.0%)
+   Albert ARIBAUD (3ADEV)            6 (0.0%)
+   Stefan Wahren                     5 (0.0%)
+   Zhou Zhu                          5 (0.0%)
+   Andrey Skvortsov                  5 (0.0%)
+   Andrew Bradford                   4 (0.0%)
+   Tuomas Tynkkynen                  4 (0.0%)
+   Karsten Merker                    4 (0.0%)
+   Pali Rohár                        4 (0.0%)
+   Antonio Borneo                    3 (0.0%)
+   Alexander Merkle                  3 (0.0%)
+   Michael Scherban                  3 (0.0%)
+   Peter Griffin                     3 (0.0%)
+   David Feng                        3 (0.0%)
+   Andre Przywara                    2 (0.0%)
+   Chris Kuethe                      2 (0.0%)
+   Thomas Petazzoni                  2 (0.0%)
+   Alexander Stein                   2 (0.0%)
+   Kevin Liu                         2 (0.0%)
+   Tony Wu                           1 (0.0%)
+   Bernhard Nortmann                 1 (0.0%)
+   Maxin B. John                     1 (0.0%)
+   Evgeniy Dushistov                 1 (0.0%)
+   Ryan Harkin                       1 (0.0%)
+   Raghav Dogra                      1 (0.0%)
+   Brecht Neyrinck                   1 (0.0%)
+   Du Huanpeng                       1 (0.0%)
+   Max Krummenacher                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andreas Bießmann                  2018 (4.6%)
+   Angelo Dureghello                 1628 (3.7%)
+   Stefan Roese                      1117 (2.5%)
+   Peter Robinson                    1105 (2.5%)
+   Jagannadh Teki                    1001 (2.3%)
+   Ian Campbell                      354 (0.8%)
+   Valentin Longchamp                116 (0.3%)
+   Lars Poeschel                     52 (0.1%)
+   Jagannadha Sutradharudu Teki      41 (0.1%)
+   Stephen Warren                    15 (0.0%)
+   Andrey Skvortsov                  5 (0.0%)
+   Rob Herring                       4 (0.0%)
+   Zhou Zhu                          4 (0.0%)
+   Pali Rohár                        4 (0.0%)
+   Axel Lin                          1 (0.0%)
+   Jörg Krause                       1 (0.0%)
+   Nikolay Dimitrov                  1 (0.0%)
+   Egli, Samuel                      1 (0.0%)
+   Alexander Merkle                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 304)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Warren                        60 (19.7%)
+   Hans de Goede                     55 (18.1%)
+   Michal Simek                      19 (6.2%)
+   York Sun                          19 (6.2%)
+   Tom Rini                          10 (3.3%)
+   Nishanth Menon                    9 (3.0%)
+   Rabeeh Khoury                     8 (2.6%)
+   Andre Przywara                    6 (2.0%)
+   Rob Herring                       5 (1.6%)
+   Radha Mohan Chintakuntla          5 (1.6%)
+   Kouei Abe                         4 (1.3%)
+   Minkyu Kang                       4 (1.3%)
+   Scott Wood                        4 (1.3%)
+   Jan Kiszka                        4 (1.3%)
+   Simon Glass                       4 (1.3%)
+   Egli, Samuel                      3 (1.0%)
+   Ye.Li                             3 (1.0%)
+   Angela Stegmaier                  3 (1.0%)
+   Łukasz Majewski                   3 (1.0%)
+   Bhupesh Sharma                    3 (1.0%)
+   Tim Harvey                        3 (1.0%)
+   Joe Hershberger                   3 (1.0%)
+   Prabhakar Kushwaha                3 (1.0%)
+   Roger Quadros                     2 (0.7%)
+   Tomi Valkeinen                    2 (0.7%)
+   Ricardo Ribalda Delgado           2 (0.7%)
+   Jon Nettleton                     2 (0.7%)
+   Michael Durrant                   2 (0.7%)
+   Roy Zang                          2 (0.7%)
+   pankaj chauhan                    2 (0.7%)
+   Shaohui Xie                       2 (0.7%)
+   Ash Charles                       2 (0.7%)
+   Inha Song                         2 (0.7%)
+   Stefan Agner                      2 (0.7%)
+   Roy Spliet                        2 (0.7%)
+   Nobuhiro Iwamatsu                 2 (0.7%)
+   Lokesh Vutla                      2 (0.7%)
+   Sanchayan Maity                   2 (0.7%)
+   Jagannadh Teki                    1 (0.3%)
+   Jörg Krause                       1 (0.3%)
+   Rohit Dharmakan                   1 (0.3%)
+   Felipe Balbi                      1 (0.3%)
+   Peter Ujfalusi                    1 (0.3%)
+   Vishal Mahaveer                   1 (0.3%)
+   Ulf Magnusson                     1 (0.3%)
+   Philip Craig                      1 (0.3%)
+   Jakub Sitnicki                    1 (0.3%)
+   Vadim Bendebury                   1 (0.3%)
+   Richard Hu                        1 (0.3%)
+   Ruchika Gupta                     1 (0.3%)
+   Marcel Ziswiler                   1 (0.3%)
+   Pantelis Antoniou                 1 (0.3%)
+   Ed Swarthout                      1 (0.3%)
+   Jian Luo                          1 (0.3%)
+   Roy Pledge                        1 (0.3%)
+   Lijun Pan                         1 (0.3%)
+   Stuart Yoder                      1 (0.3%)
+   Geoff Thorpe                      1 (0.3%)
+   Haiying Wang                      1 (0.3%)
+   Cristian Sovaiala                 1 (0.3%)
+   Ramneek Mehresh                   1 (0.3%)
+   Anatolij Gustschin                1 (0.3%)
+   Vladimir Barinov                  1 (0.3%)
+   Mugunthan V N                     1 (0.3%)
+   Arun Bharadwaj                    1 (0.3%)
+   Joonyoung Shim                    1 (0.3%)
+   Peng Fan                          1 (0.3%)
+   J. German Rivera                  1 (0.3%)
+   Minghuan Lian                     1 (0.3%)
+   Hannes Petermaier                 1 (0.3%)
+   Siva Durga Prasad Paladugu        1 (0.3%)
+   Heiko Schocher                    1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 486)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       101 (20.8%)
+   Marek Vasut                       88 (18.1%)
+   Tom Rini                          80 (16.5%)
+   York Sun                          50 (10.3%)
+   Łukasz Majewski                   41 (8.4%)
+   Bin Meng                          38 (7.8%)
+   Hans de Goede                     15 (3.1%)
+   Joe Hershberger                   14 (2.9%)
+   Jagannadha Sutradharudu Teki      13 (2.7%)
+   Jagannadh Teki                    12 (2.5%)
+   Thierry Reding                    11 (2.3%)
+   Stefan Roese                      6 (1.2%)
+   Stefano Babic                     3 (0.6%)
+   Fabio Estevam                     3 (0.6%)
+   Nishanth Menon                    1 (0.2%)
+   Scott Wood                        1 (0.2%)
+   Prabhakar Kushwaha                1 (0.2%)
+   Nobuhiro Iwamatsu                 1 (0.2%)
+   Ruchika Gupta                     1 (0.2%)
+   Linus Walleij                     1 (0.2%)
+   Chakra Divi                       1 (0.2%)
+   Stefan Reinauer                   1 (0.2%)
+   Paul Walmsley                     1 (0.2%)
+   Eric Nelson                       1 (0.2%)
+   Przemyslaw Marczak                1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 127)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       17 (13.4%)
+   Kevin Smith                       14 (11.0%)
+   Dirk Eibach                       13 (10.2%)
+   Thierry Reding                    11 (8.7%)
+   Ian Campbell                      11 (8.7%)
+   Vagrant Cascadian                 9 (7.1%)
+   Jagannadh Teki                    8 (6.3%)
+   Haikun Wang                       6 (4.7%)
+   Bin Meng                          4 (3.1%)
+   Joe Hershberger                   3 (2.4%)
+   Tom Rini                          2 (1.6%)
+   Eric Nelson                       2 (1.6%)
+   Peng Fan                          2 (1.6%)
+   Nikolay Dimitrov                  2 (1.6%)
+   Marek Vasut                       1 (0.8%)
+   Łukasz Majewski                   1 (0.8%)
+   Hans de Goede                     1 (0.8%)
+   Stefan Roese                      1 (0.8%)
+   Stefan Reinauer                   1 (0.8%)
+   Michal Simek                      1 (0.8%)
+   Tim Harvey                        1 (0.8%)
+   Shaohui Xie                       1 (0.8%)
+   Lokesh Vutla                      1 (0.8%)
+   Maxin B. John                     1 (0.8%)
+   Review Code-CDREVIEW              1 (0.8%)
+   Jakub Kicinski                    1 (0.8%)
+   Keerthy                           1 (0.8%)
+   Yan Liu                           1 (0.8%)
+   Andrei Gherzan                    1 (0.8%)
+   Georg Schardt                     1 (0.8%)
+   Steve Rae                         1 (0.8%)
+   Bernhard Nortmann                 1 (0.8%)
+   David Dueck                       1 (0.8%)
+   Albert ARIBAUD (3ADEV)            1 (0.8%)
+   Maxime Ripard                     1 (0.8%)
+   Pavel Machek                      1 (0.8%)
+   Alison Wang                       1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 127)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      27 (21.3%)
+   Jan Kiszka                        18 (14.2%)
+   Fabio Estevam                     11 (8.7%)
+   Przemyslaw Marczak                11 (8.7%)
+   Simon Glass                       8 (6.3%)
+   Haikun Wang                       8 (6.3%)
+   Ian Campbell                      6 (4.7%)
+   Jagannadh Teki                    5 (3.9%)
+   Heiko Schocher                    4 (3.1%)
+   Bin Meng                          3 (2.4%)
+   Joe Hershberger                   2 (1.6%)
+   Tom Rini                          2 (1.6%)
+   Tim Harvey                        2 (1.6%)
+   Kevin Smith                       1 (0.8%)
+   Thierry Reding                    1 (0.8%)
+   Marek Vasut                       1 (0.8%)
+   Michal Simek                      1 (0.8%)
+   David Dueck                       1 (0.8%)
+   Pavel Machek                      1 (0.8%)
+   Jagannadha Sutradharudu Teki      1 (0.8%)
+   Nishanth Menon                    1 (0.8%)
+   Scott Wood                        1 (0.8%)
+   Andre Przywara                    1 (0.8%)
+   Mugunthan V N                     1 (0.8%)
+   Axel Lin                          1 (0.8%)
+   Cooper Jr., Franklin              1 (0.8%)
+   Ricardo Ribalda                   1 (0.8%)
+   Alexey Firago                     1 (0.8%)
+   Wu, Josh                          1 (0.8%)
+   Vincent Palatin                   1 (0.8%)
+   Daniel Schwierzeck                1 (0.8%)
+   Chen-Yu Tsai                      1 (0.8%)
+   Paul Kocialkowski                 1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       5 (23.8%)
+   Joe Hershberger                   2 (9.5%)
+   Ingrid Viitanen                   2 (9.5%)
+   Haikun Wang                       1 (4.8%)
+   Bin Meng                          1 (4.8%)
+   Tim Harvey                        1 (4.8%)
+   Michal Simek                      1 (4.8%)
+   Pavel Machek                      1 (4.8%)
+   Vagrant Cascadian                 1 (4.8%)
+   Maxin B. John                     1 (4.8%)
+   Andrei Gherzan                    1 (4.8%)
+   Roger Quadros                     1 (4.8%)
+   Albert ARIBAUD                    1 (4.8%)
+   Andy Kennedy                      1 (4.8%)
+   Shivasharan Nagalikar             1 (4.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       7 (33.3%)
+   Joe Hershberger                   5 (23.8%)
+   Lokesh Vutla                      3 (14.3%)
+   Fabio Estevam                     2 (9.5%)
+   Tom Rini                          1 (4.8%)
+   Jagannadha Sutradharudu Teki      1 (4.8%)
+   Daniel Schwierzeck                1 (4.8%)
+   Hans de Goede                     1 (4.8%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         425 (27.2%)
+   Google, Inc.                      312 (20.0%)
+   Freescale                         151 (9.7%)
+   National Instruments              111 (7.1%)
+   Red Hat                           106 (6.8%)
+   Texas Instruments                 79 (5.1%)
+   DENX Software Engineering         73 (4.7%)
+   Socionext Inc.                    68 (4.4%)
+   Samsung                           65 (4.2%)
+   Openedev                          44 (2.8%)
+   Konsulko Group                    19 (1.2%)
+   Toradex                           18 (1.2%)
+   Siemens                           14 (0.9%)
+   Xilinx                            14 (0.9%)
+   Linaro                            12 (0.8%)
+   AMD                               11 (0.7%)
+   Collabora Ltd.                    10 (0.6%)
+   NVidia                            8 (0.5%)
+   Renesas Electronics               5 (0.3%)
+   Atmel                             3 (0.2%)
+   Boundary Devices                  3 (0.2%)
+   Marvell                           3 (0.2%)
+   ST Microelectronics               3 (0.2%)
+   Free Electrons                    2 (0.1%)
+   Dave S.r.l.                       1 (0.1%)
+   Debian.org                        1 (0.1%)
+   ENEA AB                           1 (0.1%)
+   Keymile                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Socionext Inc.                    56181 (28.7%)
+   (Unknown)                         25214 (12.9%)
+   Google, Inc.                      22901 (11.7%)
+   Red Hat                           19807 (10.1%)
+   Freescale                         19443 (9.9%)
+   Texas Instruments                 17394 (8.9%)
+   National Instruments              13351 (6.8%)
+   Samsung                           6796 (3.5%)
+   DENX Software Engineering         6241 (3.2%)
+   Openedev                          2287 (1.2%)
+   Toradex                           1985 (1.0%)
+   Konsulko Group                    1123 (0.6%)
+   AMD                               446 (0.2%)
+   Xilinx                            444 (0.2%)
+   Siemens                           412 (0.2%)
+   Renesas Electronics               326 (0.2%)
+   Dave S.r.l.                       287 (0.1%)
+   Boundary Devices                  283 (0.1%)
+   Collabora Ltd.                    257 (0.1%)
+   Keymile                           164 (0.1%)
+   Linaro                            138 (0.1%)
+   NVidia                            86 (0.0%)
+   ST Microelectronics               66 (0.0%)
+   Marvell                           62 (0.0%)
+   Atmel                             30 (0.0%)
+   Free Electrons                    27 (0.0%)
+   Debian.org                        4 (0.0%)
+   ENEA AB                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 304)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   NVidia                            60 (19.7%)
+   Red Hat                           55 (18.1%)
+   Freescale                         51 (16.8%)
+   (Unknown)                         48 (15.8%)
+   Texas Instruments                 22 (7.2%)
+   Xilinx                            20 (6.6%)
+   Konsulko Group                    11 (3.6%)
+   Samsung                           10 (3.3%)
+   Siemens                           7 (2.3%)
+   Google, Inc.                      5 (1.6%)
+   Renesas Electronics               5 (1.6%)
+   National Instruments              3 (1.0%)
+   Toradex                           3 (1.0%)
+   DENX Software Engineering         2 (0.7%)
+   Openedev                          1 (0.3%)
+   Nobuhiro Iwamatsu                 1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 157)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         75 (47.8%)
+   Freescale                         25 (15.9%)
+   Texas Instruments                 8 (5.1%)
+   Samsung                           6 (3.8%)
+   DENX Software Engineering         5 (3.2%)
+   Linaro                            5 (3.2%)
+   Toradex                           3 (1.9%)
+   Marvell                           3 (1.9%)
+   NVidia                            2 (1.3%)
+   Xilinx                            2 (1.3%)
+   Konsulko Group                    2 (1.3%)
+   Siemens                           2 (1.3%)
+   Google, Inc.                      2 (1.3%)
+   Renesas Electronics               2 (1.3%)
+   Free Electrons                    2 (1.3%)
+   Red Hat                           1 (0.6%)
+   National Instruments              1 (0.6%)
+   Openedev                          1 (0.6%)
+   Socionext Inc.                    1 (0.6%)
+   AMD                               1 (0.6%)
+   Dave S.r.l.                       1 (0.6%)
+   Boundary Devices                  1 (0.6%)
+   Collabora Ltd.                    1 (0.6%)
+   Keymile                           1 (0.6%)
+   ST Microelectronics               1 (0.6%)
+   Atmel                             1 (0.6%)
+   Debian.org                        1 (0.6%)
+   ENEA AB                           1 (0.6%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2015.10.rst b/doc/develop/statistics/u-boot-stats-v2015.10.rst
new file mode 100644
index 00000000000..6936b36f872
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2015.10.rst
@@ -0,0 +1,861 @@
+:orphan:
+
+Release Statistics for U-Boot v2015.10
+======================================
+
+* Processed 2069 changesets from 182 developers
+
+* 32 employers found
+
+* A total of 180893 lines added, 90724 removed (delta 90169)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       376 (18.2%)
+   Marek Vasut                       263 (12.7%)
+   Bin Meng                          157 (7.6%)
+   Masahiro Yamada                   117 (5.7%)
+   Hans de Goede                     92 (4.4%)
+   Peng Fan                          81 (3.9%)
+   Stefan Roese                      60 (2.9%)
+   Paul Kocialkowski                 42 (2.0%)
+   Stephen Warren                    39 (1.9%)
+   Fabio Estevam                     38 (1.8%)
+   Michal Simek                      37 (1.8%)
+   Tom Rini                          30 (1.4%)
+   Marcel Ziswiler                   30 (1.4%)
+   Prabhakar Kushwaha                29 (1.4%)
+   Nikita Kiryanov                   25 (1.2%)
+   Thierry Reding                    24 (1.2%)
+   Adrian Alonso                     22 (1.1%)
+   Lokesh Vutla                      19 (0.9%)
+   Kishon Vijay Abraham I            18 (0.9%)
+   Codrin Ciubotariu                 17 (0.8%)
+   Otavio Salvador                   17 (0.8%)
+   Heiko Schocher                    16 (0.8%)
+   Peter Griffin                     16 (0.8%)
+   Nishanth Menon                    16 (0.8%)
+   Vladimir Zapolskiy                14 (0.7%)
+   Tom Warren                        13 (0.6%)
+   Lukasz Majewski                   13 (0.6%)
+   Sylvain Lemieux                   13 (0.6%)
+   Siva Durga Prasad Paladugu        13 (0.6%)
+   Dinh Nguyen                       12 (0.6%)
+   York Sun                          12 (0.6%)
+   Josh Wu                           11 (0.5%)
+   Haikun Wang                       11 (0.5%)
+   Ryan Harkin                       10 (0.5%)
+   Nikhil Badola                     10 (0.5%)
+   Vikas Manocha                     10 (0.5%)
+   Sjoerd Simons                     9 (0.4%)
+   Bernhard Nortmann                 9 (0.4%)
+   Anatolij Gustschin                9 (0.4%)
+   Mark Tomlinson                    8 (0.4%)
+   Ramneek Mehresh                   8 (0.4%)
+   Albert ARIBAUD (3ADEV)            7 (0.3%)
+   Alexander Stein                   7 (0.3%)
+   Paul Gortmaker                    6 (0.3%)
+   Alison Wang                       6 (0.3%)
+   Priyanka Jain                     6 (0.3%)
+   Ben Stoltz                        6 (0.3%)
+   Vitaly Andrianov                  5 (0.2%)
+   Benoît Thébaudeau                 5 (0.2%)
+   Tim Harvey                        5 (0.2%)
+   Jiandong Zheng                    5 (0.2%)
+   Stefano Babic                     5 (0.2%)
+   Bhupesh Sharma                    5 (0.2%)
+   Shengzhou Liu                     5 (0.2%)
+   Vignesh R                         5 (0.2%)
+   Tobias Jakobi                     4 (0.2%)
+   Przemyslaw Marczak                4 (0.2%)
+   Rob Herring                       4 (0.2%)
+   Siarhei Siamashka                 4 (0.2%)
+   Soeren Moch                       4 (0.2%)
+   Dmitry Lifshitz                   4 (0.2%)
+   Andreas Bießmann                  4 (0.2%)
+   Aneesh Bansal                     4 (0.2%)
+   Vladimir Barinov                  4 (0.2%)
+   Erik van Luijk                    4 (0.2%)
+   Max Krummenacher                  4 (0.2%)
+   Daniel Kochmański                 4 (0.2%)
+   Stuart Yoder                      4 (0.2%)
+   Stefan Agner                      3 (0.1%)
+   Guillaume GARDET                  3 (0.1%)
+   Igor Grinberg                     3 (0.1%)
+   Yao Yuan                          3 (0.1%)
+   Jian Luo                          3 (0.1%)
+   Enric Balletbò i Serra            3 (0.1%)
+   Jörg Krause                       3 (0.1%)
+   Chris Packham                     3 (0.1%)
+   Saket Sinha                       3 (0.1%)
+   Anton Schubert                    3 (0.1%)
+   Dennis Gilmore                    3 (0.1%)
+   Horia Geantă                      3 (0.1%)
+   Alex Porosanu                     3 (0.1%)
+   Wang Dongsheng                    3 (0.1%)
+   Antonio Borneo                    3 (0.1%)
+   Liviu Dudau                       2 (0.1%)
+   Jagan Teki                        2 (0.1%)
+   Mirza Krak                        2 (0.1%)
+   Alexey Brodkin                    2 (0.1%)
+   Troy Kisky                        2 (0.1%)
+   Simon Guinot                      2 (0.1%)
+   Łukasz Majewski                   2 (0.1%)
+   Hannes Petermaier                 2 (0.1%)
+   Stefan Brüns                      2 (0.1%)
+   Clemens Gruber                    2 (0.1%)
+   vpeter4                           2 (0.1%)
+   Zhuoyu Zhang                      2 (0.1%)
+   Yangbo Lu                         2 (0.1%)
+   Boris Brezillon                   2 (0.1%)
+   Ravi Babu                         2 (0.1%)
+   Kun-Hua Huang                     2 (0.1%)
+   Scott Wood                        2 (0.1%)
+   Andrew Ruder                      2 (0.1%)
+   Thomas Abraham                    2 (0.1%)
+   Gong Qianyu                       2 (0.1%)
+   Piotr Zierhoffer                  2 (0.1%)
+   Alexandre Courbot                 2 (0.1%)
+   Minghuan Lian                     2 (0.1%)
+   gaurav rana                       2 (0.1%)
+   Zhao Qiang                        2 (0.1%)
+   Shaohui Xie                       2 (0.1%)
+   Jaiprakash Singh                  2 (0.1%)
+   Zhichun Hua                       2 (0.1%)
+   J. German Rivera                  2 (0.1%)
+   Andrej Rosano                     1 (0.0%)
+   Ladislav Michl                    1 (0.0%)
+   Linus Walleij                     1 (0.0%)
+   Lubomir Rintel                    1 (0.0%)
+   Eric Cooper                       1 (0.0%)
+   Anthony Felice                    1 (0.0%)
+   Ludger Dreier                     1 (0.0%)
+   Ezequiel García                   1 (0.0%)
+   Vagrant Cascadian                 1 (0.0%)
+   Ian Campbell                      1 (0.0%)
+   Julius Werner                     1 (0.0%)
+   Bo Shen                           1 (0.0%)
+   Mugunthan V N                     1 (0.0%)
+   Philipp Rosenberger               1 (0.0%)
+   Sekhar Nori                       1 (0.0%)
+   Axel Lin                          1 (0.0%)
+   Andreas Färber                    1 (0.0%)
+   Imran Zaman                       1 (0.0%)
+   Sergey Kostanbaev                 1 (0.0%)
+   Michael Heimpold                  1 (0.0%)
+   Ye.Li                             1 (0.0%)
+   Gary Bisson                       1 (0.0%)
+   Daniel Gorsulowski                1 (0.0%)
+   Jelle van der Waa                 1 (0.0%)
+   Steve Rae                         1 (0.0%)
+   Adam Ford                         1 (0.0%)
+   Olaf Mandel                       1 (0.0%)
+   Chris Smith                       1 (0.0%)
+   Damien Riegel                     1 (0.0%)
+   Lucile Quirion                    1 (0.0%)
+   Eric Nelson                       1 (0.0%)
+   Baruch Siach                      1 (0.0%)
+   Varun Sethi                       1 (0.0%)
+   Claudiu Manoil                    1 (0.0%)
+   Igal Liberman                     1 (0.0%)
+   Misha Komarovskiy                 1 (0.0%)
+   Yousong Zhou                      1 (0.0%)
+   Chen-Yu Tsai                      1 (0.0%)
+   Marcus Cooper                     1 (0.0%)
+   Ulf Magnusson                     1 (0.0%)
+   Suriyan Ramasami                  1 (0.0%)
+   Jonathan Liu                      1 (0.0%)
+   Andrew Bradford                   1 (0.0%)
+   Ezequiel Garcia                   1 (0.0%)
+   Mingkai Hu                        1 (0.0%)
+   Pavel Machek                      1 (0.0%)
+   Govindraj Raja                    1 (0.0%)
+   Sergey Temerkhanov                1 (0.0%)
+   Vishal Mahaveer                   1 (0.0%)
+   Stoppa, Igor                      1 (0.0%)
+   Yoshinori Sato                    1 (0.0%)
+   Måns Rullgård                     1 (0.0%)
+   Ruchika Gupta                     1 (0.0%)
+   Andre Przywara                    1 (0.0%)
+   Daniel Inderbitzin                1 (0.0%)
+   Jeroen Hofstee                    1 (0.0%)
+   Karol Gugala                      1 (0.0%)
+   Aleksei Mamlin                    1 (0.0%)
+   Maxime Ripard                     1 (0.0%)
+   Miao Yan                          1 (0.0%)
+   chenhui zhao                      1 (0.0%)
+   Tang Yuantian                     1 (0.0%)
+   Raghav Dogra                      1 (0.0%)
+   Ying Zhang                        1 (0.0%)
+   Yegor Yefremov                    1 (0.0%)
+   Adam YH Lee                       1 (0.0%)
+   Kamil Lulko                       1 (0.0%)
+   Sudeep Holla                      1 (0.0%)
+   Ulises Cardenas                   1 (0.0%)
+   Peter Robinson                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       68254 (27.8%)
+   Stefan Roese                      30346 (12.4%)
+   Masahiro Yamada                   23310 (9.5%)
+   Marek Vasut                       19480 (7.9%)
+   Bin Meng                          14028 (5.7%)
+   Adrian Alonso                     10199 (4.2%)
+   Dinh Nguyen                       7920 (3.2%)
+   Tom Rini                          7247 (3.0%)
+   Peng Fan                          5138 (2.1%)
+   Tom Warren                        4975 (2.0%)
+   Hans de Goede                     4918 (2.0%)
+   Heiko Schocher                    3985 (1.6%)
+   Codrin Ciubotariu                 3567 (1.5%)
+   Vladimir Barinov                  3239 (1.3%)
+   Peter Griffin                     2488 (1.0%)
+   Ulf Magnusson                     2286 (0.9%)
+   Kun-Hua Huang                     2158 (0.9%)
+   Stephen Warren                    2124 (0.9%)
+   Paul Kocialkowski                 2103 (0.9%)
+   Prabhakar Kushwaha                1953 (0.8%)
+   Saket Sinha                       1744 (0.7%)
+   Michal Simek                      1391 (0.6%)
+   Albert ARIBAUD (3ADEV)            1317 (0.5%)
+   Nikita Kiryanov                   1238 (0.5%)
+   Scott Wood                        1119 (0.5%)
+   Sylvain Lemieux                   1045 (0.4%)
+   Lokesh Vutla                      887 (0.4%)
+   Enric Balletbò i Serra            839 (0.3%)
+   Otavio Salvador                   802 (0.3%)
+   Erik van Luijk                    707 (0.3%)
+   Kishon Vijay Abraham I            677 (0.3%)
+   Alison Wang                       600 (0.2%)
+   Ramneek Mehresh                   572 (0.2%)
+   Vladimir Zapolskiy                542 (0.2%)
+   Anton Schubert                    507 (0.2%)
+   Julius Werner                     471 (0.2%)
+   Ben Stoltz                        467 (0.2%)
+   Fabio Estevam                     449 (0.2%)
+   Marcel Ziswiler                   421 (0.2%)
+   Piotr Zierhoffer                  404 (0.2%)
+   Andrew Bradford                   388 (0.2%)
+   Lukasz Majewski                   387 (0.2%)
+   Lucile Quirion                    376 (0.2%)
+   vpeter4                           352 (0.1%)
+   Haikun Wang                       351 (0.1%)
+   Priyanka Jain                     307 (0.1%)
+   Josh Wu                           306 (0.1%)
+   Nishanth Menon                    305 (0.1%)
+   Stuart Yoder                      285 (0.1%)
+   Marcus Cooper                     266 (0.1%)
+   Jelle van der Waa                 252 (0.1%)
+   Ulises Cardenas                   245 (0.1%)
+   Minghuan Lian                     229 (0.1%)
+   Bhupesh Sharma                    226 (0.1%)
+   Mark Tomlinson                    223 (0.1%)
+   Siva Durga Prasad Paladugu        221 (0.1%)
+   Liviu Dudau                       217 (0.1%)
+   Jiandong Zheng                    211 (0.1%)
+   Vignesh R                         200 (0.1%)
+   Wang Dongsheng                    196 (0.1%)
+   Thierry Reding                    167 (0.1%)
+   Vikas Manocha                     164 (0.1%)
+   Shengzhou Liu                     164 (0.1%)
+   Benoît Thébaudeau                 161 (0.1%)
+   Stefan Agner                      159 (0.1%)
+   Bernhard Nortmann                 145 (0.1%)
+   Igal Liberman                     135 (0.1%)
+   Aneesh Bansal                     134 (0.1%)
+   Damien Riegel                     130 (0.1%)
+   Ryan Harkin                       128 (0.1%)
+   York Sun                          126 (0.1%)
+   Zhuoyu Zhang                      118 (0.0%)
+   Alexandre Courbot                 114 (0.0%)
+   Alexander Stein                   103 (0.0%)
+   Andrew Ruder                      93 (0.0%)
+   Sjoerd Simons                     89 (0.0%)
+   Ludger Dreier                     89 (0.0%)
+   Mirza Krak                        78 (0.0%)
+   Daniel Kochmański                 76 (0.0%)
+   Tang Yuantian                     75 (0.0%)
+   Nikhil Badola                     73 (0.0%)
+   Peter Robinson                    68 (0.0%)
+   Troy Kisky                        64 (0.0%)
+   Shaohui Xie                       62 (0.0%)
+   Antonio Borneo                    56 (0.0%)
+   Ezequiel Garcia                   56 (0.0%)
+   Clemens Gruber                    53 (0.0%)
+   Chris Packham                     51 (0.0%)
+   Yangbo Lu                         49 (0.0%)
+   Adam Ford                         48 (0.0%)
+   J. German Rivera                  47 (0.0%)
+   Chen-Yu Tsai                      47 (0.0%)
+   Tim Harvey                        42 (0.0%)
+   chenhui zhao                      34 (0.0%)
+   Jian Luo                          33 (0.0%)
+   Tobias Jakobi                     32 (0.0%)
+   Paul Gortmaker                    31 (0.0%)
+   Karol Gugala                      30 (0.0%)
+   Andre Przywara                    29 (0.0%)
+   Rob Herring                       28 (0.0%)
+   Linus Walleij                     28 (0.0%)
+   Dennis Gilmore                    26 (0.0%)
+   Alex Porosanu                     24 (0.0%)
+   Jörg Krause                       23 (0.0%)
+   Vitaly Andrianov                  22 (0.0%)
+   Przemyslaw Marczak                22 (0.0%)
+   Yao Yuan                          22 (0.0%)
+   Stefano Babic                     21 (0.0%)
+   Hannes Petermaier                 21 (0.0%)
+   Ian Campbell                      21 (0.0%)
+   Stoppa, Igor                      21 (0.0%)
+   Olaf Mandel                       20 (0.0%)
+   Horia Geantă                      19 (0.0%)
+   Łukasz Majewski                   19 (0.0%)
+   Anatolij Gustschin                18 (0.0%)
+   Andreas Bießmann                  18 (0.0%)
+   Max Krummenacher                  17 (0.0%)
+   Zhichun Hua                       17 (0.0%)
+   Guillaume GARDET                  16 (0.0%)
+   gaurav rana                       16 (0.0%)
+   Igor Grinberg                     14 (0.0%)
+   Sergey Temerkhanov                14 (0.0%)
+   Ladislav Michl                    13 (0.0%)
+   Dmitry Lifshitz                   12 (0.0%)
+   Soeren Moch                       11 (0.0%)
+   Bo Shen                           11 (0.0%)
+   Ying Zhang                        11 (0.0%)
+   Simon Guinot                      10 (0.0%)
+   Michael Heimpold                  10 (0.0%)
+   Jagan Teki                        9 (0.0%)
+   Boris Brezillon                   9 (0.0%)
+   Ravi Babu                         9 (0.0%)
+   Axel Lin                          9 (0.0%)
+   Varun Sethi                       9 (0.0%)
+   Claudiu Manoil                    9 (0.0%)
+   Suriyan Ramasami                  9 (0.0%)
+   Stefan Brüns                      8 (0.0%)
+   Thomas Abraham                    8 (0.0%)
+   Miao Yan                          8 (0.0%)
+   Jaiprakash Singh                  7 (0.0%)
+   Ruchika Gupta                     7 (0.0%)
+   Lubomir Rintel                    6 (0.0%)
+   Siarhei Siamashka                 5 (0.0%)
+   Alexey Brodkin                    5 (0.0%)
+   Vagrant Cascadian                 5 (0.0%)
+   Andreas Färber                    5 (0.0%)
+   Baruch Siach                      5 (0.0%)
+   Pavel Machek                      5 (0.0%)
+   Yoshinori Sato                    5 (0.0%)
+   Aleksei Mamlin                    5 (0.0%)
+   Gong Qianyu                       4 (0.0%)
+   Zhao Qiang                        4 (0.0%)
+   Misha Komarovskiy                 4 (0.0%)
+   Yousong Zhou                      4 (0.0%)
+   Mingkai Hu                        4 (0.0%)
+   Andrej Rosano                     3 (0.0%)
+   Ezequiel García                   3 (0.0%)
+   Daniel Inderbitzin                3 (0.0%)
+   Maxime Ripard                     3 (0.0%)
+   Yegor Yefremov                    3 (0.0%)
+   Eric Cooper                       2 (0.0%)
+   Sergey Kostanbaev                 2 (0.0%)
+   Ye.Li                             2 (0.0%)
+   Daniel Gorsulowski                2 (0.0%)
+   Jonathan Liu                      2 (0.0%)
+   Govindraj Raja                    2 (0.0%)
+   Jeroen Hofstee                    2 (0.0%)
+   Adam YH Lee                       2 (0.0%)
+   Anthony Felice                    1 (0.0%)
+   Mugunthan V N                     1 (0.0%)
+   Philipp Rosenberger               1 (0.0%)
+   Sekhar Nori                       1 (0.0%)
+   Imran Zaman                       1 (0.0%)
+   Gary Bisson                       1 (0.0%)
+   Steve Rae                         1 (0.0%)
+   Chris Smith                       1 (0.0%)
+   Eric Nelson                       1 (0.0%)
+   Vishal Mahaveer                   1 (0.0%)
+   Måns Rullgård                     1 (0.0%)
+   Raghav Dogra                      1 (0.0%)
+   Kamil Lulko                       1 (0.0%)
+   Sudeep Holla                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   8811 (9.7%)
+   Simon Glass                       8130 (9.0%)
+   Kun-Hua Huang                     2054 (2.3%)
+   Ulf Magnusson                     346 (0.4%)
+   Josh Wu                           70 (0.1%)
+   Peter Robinson                    64 (0.1%)
+   Alexander Stein                   26 (0.0%)
+   Adam Ford                         20 (0.0%)
+   Andrew Ruder                      15 (0.0%)
+   Shaohui Xie                       13 (0.0%)
+   Ludger Dreier                     12 (0.0%)
+   Igor Grinberg                     12 (0.0%)
+   Jörg Krause                       11 (0.0%)
+   Bo Shen                           11 (0.0%)
+   Hannes Petermaier                 9 (0.0%)
+   Axel Lin                          9 (0.0%)
+   Suriyan Ramasami                  8 (0.0%)
+   Zhichun Hua                       7 (0.0%)
+   Claudiu Manoil                    4 (0.0%)
+   Vagrant Cascadian                 4 (0.0%)
+   Thomas Abraham                    2 (0.0%)
+   Rob Herring                       1 (0.0%)
+   Alexey Brodkin                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 328)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Warren                        65 (19.8%)
+   Hans de Goede                     24 (7.3%)
+   Simon Glass                       22 (6.7%)
+   Ye.Li                             17 (5.2%)
+   Prabhakar Kushwaha                16 (4.9%)
+   Michal Simek                      14 (4.3%)
+   Tom Rini                          13 (4.0%)
+   Peng Fan                          11 (3.4%)
+   Stephen Warren                    10 (3.0%)
+   Minkyu Kang                       8 (2.4%)
+   Johnson Leung                     7 (2.1%)
+   Marcel Ziswiler                   7 (2.1%)
+   Bin Meng                          6 (1.8%)
+   Steve Rae                         5 (1.5%)
+   Vignesh R                         5 (1.5%)
+   Michal Marek                      4 (1.2%)
+   Nobuhiro Iwamatsu                 4 (1.2%)
+   Soren Brinkmann                   4 (1.2%)
+   Andreas Bießmann                  4 (1.2%)
+   York Sun                          4 (1.2%)
+   Fugang Duan                       3 (0.9%)
+   Enric Balletbo i Serra            3 (0.9%)
+   King Chung Lo@freescale.com       3 (0.9%)
+   Saksham Jain                      3 (0.9%)
+   Ruchika Gupta                     3 (0.9%)
+   Peter Gielda                      2 (0.6%)
+   Tomasz Gorochowik                 2 (0.6%)
+   Mateusz Holenko                   2 (0.6%)
+   Olof Johansson                    2 (0.6%)
+   Dai Haruki                        2 (0.6%)
+   Karol Gugala                      2 (0.6%)
+   Bhupesh Sharma                    2 (0.6%)
+   Minghuan Lian                     2 (0.6%)
+   Marek Vasut                       2 (0.6%)
+   Josh Wu                           1 (0.3%)
+   Igor Grinberg                     1 (0.3%)
+   Bhuvanchandra DV                  1 (0.3%)
+   Matthias Michel                   1 (0.3%)
+   Han Xu                            1 (0.3%)
+   Brian Norris                      1 (0.3%)
+   Radha Mohan Chintakuntla          1 (0.3%)
+   Pantelis Antoniou                 1 (0.3%)
+   Itai Katz                         1 (0.3%)
+   Robin Gong                        1 (0.3%)
+   Brown Oliver                      1 (0.3%)
+   Ezra Savard                       1 (0.3%)
+   Alex Wilson                       1 (0.3%)
+   Nathan Sullivan                   1 (0.3%)
+   Robert Richter                    1 (0.3%)
+   Heiko Carstens                    1 (0.3%)
+   Martin Schwidefsky                1 (0.3%)
+   Andrey Ryabinin                   1 (0.3%)
+   Nathan Rossi                      1 (0.3%)
+   Bjørn Forsman                     1 (0.3%)
+   Andrey Utkin                      1 (0.3%)
+   Jiri Kosina                       1 (0.3%)
+   Arjun Sreedharan                  1 (0.3%)
+   Arnaldo Carvalho de Melo          1 (0.3%)
+   Colin Ian King                    1 (0.3%)
+   Nitin Garg                        1 (0.3%)
+   Jason Liu                         1 (0.3%)
+   pankaj chauhan                    1 (0.3%)
+   Scott Wood                        1 (0.3%)
+   Ravi Babu                         1 (0.3%)
+   Przemyslaw Marczak                1 (0.3%)
+   Jian Luo                          1 (0.3%)
+   J. German Rivera                  1 (0.3%)
+   Andre Przywara                    1 (0.3%)
+   Stefan Agner                      1 (0.3%)
+   Lokesh Vutla                      1 (0.3%)
+   Thierry Reding                    1 (0.3%)
+   Damien Riegel                     1 (0.3%)
+   Wang Dongsheng                    1 (0.3%)
+   Stuart Yoder                      1 (0.3%)
+   Piotr Zierhoffer                  1 (0.3%)
+   Ben Stoltz                        1 (0.3%)
+   Anton Schubert                    1 (0.3%)
+   Codrin Ciubotariu                 1 (0.3%)
+   Stefan Roese                      1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 557)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   York Sun                          120 (21.5%)
+   Bin Meng                          105 (18.9%)
+   Tom Rini                          84 (15.1%)
+   Simon Glass                       82 (14.7%)
+   Jagan Teki                        34 (6.1%)
+   Heiko Schocher                    32 (5.7%)
+   Stefano Babic                     17 (3.1%)
+   Linus Walleij                     11 (2.0%)
+   Marek Vasut                       10 (1.8%)
+   Joe Hershberger                   9 (1.6%)
+   Hans de Goede                     6 (1.1%)
+   Łukasz Majewski                   6 (1.1%)
+   Fabio Estevam                     5 (0.9%)
+   Peng Fan                          4 (0.7%)
+   Murali Karicheri                  4 (0.7%)
+   Vitaly Andrianov                  4 (0.7%)
+   Stefan Roese                      3 (0.5%)
+   Masahiro Yamada                   3 (0.5%)
+   Brad Griffis                      3 (0.5%)
+   Nishanth Menon                    3 (0.5%)
+   Andreas Bießmann                  2 (0.4%)
+   Mingkai Hu                        2 (0.4%)
+   Bhupesh Sharma                    1 (0.2%)
+   Przemyslaw Marczak                1 (0.2%)
+   Bo Shen                           1 (0.2%)
+   Wolfgang Denk                     1 (0.2%)
+   Benoît Thébaudeau                 1 (0.2%)
+   Chris Packham                     1 (0.2%)
+   Ryan Harkin                       1 (0.2%)
+   Aneesh Bansal                     1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 136)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          21 (15.4%)
+   Simon Glass                       20 (14.7%)
+   Przemyslaw Marczak                13 (9.6%)
+   Łukasz Majewski                   11 (8.1%)
+   Stephen Warren                    8 (5.9%)
+   Marcel Ziswiler                   7 (5.1%)
+   Sylvain Lemieux                   6 (4.4%)
+   Fabio Estevam                     5 (3.7%)
+   Stefan Roese                      4 (2.9%)
+   Andrew Bradford                   4 (2.9%)
+   Vladimir Zapolskiy                3 (2.2%)
+   Jagan Teki                        2 (1.5%)
+   Marek Vasut                       2 (1.5%)
+   Vitaly Andrianov                  2 (1.5%)
+   Ryan Harkin                       2 (1.5%)
+   Jian Luo                          2 (1.5%)
+   Tim Harvey                        2 (1.5%)
+   Paul Kocialkowski                 2 (1.5%)
+   Andreas Bießmann                  1 (0.7%)
+   Wolfgang Denk                     1 (0.7%)
+   Michal Simek                      1 (0.7%)
+   Stefan Agner                      1 (0.7%)
+   Hannes Petermaier                 1 (0.7%)
+   Joakim Tjernlund                  1 (0.7%)
+   Sinan Akman                       1 (0.7%)
+   Uwe Scheffler                     1 (0.7%)
+   Kevin Smith                       1 (0.7%)
+   Andy Pont                         1 (0.7%)
+   Thomas Chou                       1 (0.7%)
+   Xing Lei                          1 (0.7%)
+   Pekon Gupta                       1 (0.7%)
+   Simon Guinot                      1 (0.7%)
+   Clemens Gruber                    1 (0.7%)
+   Alison Wang                       1 (0.7%)
+   Lukasz Majewski                   1 (0.7%)
+   Erik van Luijk                    1 (0.7%)
+   Otavio Salvador                   1 (0.7%)
+   Albert ARIBAUD (3ADEV)            1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 136)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       24 (17.6%)
+   Bin Meng                          16 (11.8%)
+   Stephen Warren                    7 (5.1%)
+   Vladimir Zapolskiy                6 (4.4%)
+   Tim Harvey                        6 (4.4%)
+   Peng Fan                          6 (4.4%)
+   Alexander Stein                   6 (4.4%)
+   Paul Kocialkowski                 5 (3.7%)
+   Tom Rini                          4 (2.9%)
+   Chris Packham                     4 (2.9%)
+   Przemyslaw Marczak                3 (2.2%)
+   Sylvain Lemieux                   3 (2.2%)
+   Stefan Roese                      3 (2.2%)
+   Vikas Manocha                     3 (2.2%)
+   Fabio Estevam                     2 (1.5%)
+   Stefan Agner                      2 (1.5%)
+   Ravi Babu                         2 (1.5%)
+   Lokesh Vutla                      2 (1.5%)
+   Ben Stoltz                        2 (1.5%)
+   Thomas Abraham                    2 (1.5%)
+   Guillaume GARDET                  2 (1.5%)
+   Liviu Dudau                       2 (1.5%)
+   Łukasz Majewski                   1 (0.7%)
+   Marcel Ziswiler                   1 (0.7%)
+   Andrew Bradford                   1 (0.7%)
+   Marek Vasut                       1 (0.7%)
+   Jian Luo                          1 (0.7%)
+   Michal Simek                      1 (0.7%)
+   Simon Guinot                      1 (0.7%)
+   Lukasz Majewski                   1 (0.7%)
+   Erik van Luijk                    1 (0.7%)
+   Masahiro Yamada                   1 (0.7%)
+   Tom Warren                        1 (0.7%)
+   Steve Rae                         1 (0.7%)
+   Josh Wu                           1 (0.7%)
+   Thierry Reding                    1 (0.7%)
+   Anton Schubert                    1 (0.7%)
+   Claudiu Manoil                    1 (0.7%)
+   Vagrant Cascadian                 1 (0.7%)
+   Måns Rullgård                     1 (0.7%)
+   Soeren Moch                       1 (0.7%)
+   Miao Yan                          1 (0.7%)
+   Troy Kisky                        1 (0.7%)
+   Ezequiel Garcia                   1 (0.7%)
+   Igal Liberman                     1 (0.7%)
+   Saket Sinha                       1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 28)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Yan Liu                           3 (10.7%)
+   Thierry Reding                    2 (7.1%)
+   Nishanth Menon                    2 (7.1%)
+   Simon Glass                       1 (3.6%)
+   Stephen Warren                    1 (3.6%)
+   Tim Harvey                        1 (3.6%)
+   Paul Kocialkowski                 1 (3.6%)
+   Przemyslaw Marczak                1 (3.6%)
+   Stefan Agner                      1 (3.6%)
+   Andrew Bradford                   1 (3.6%)
+   Simon Guinot                      1 (3.6%)
+   Vitaly Andrianov                  1 (3.6%)
+   Sinan Akman                       1 (3.6%)
+   Uwe Scheffler                     1 (3.6%)
+   Kevin Smith                       1 (3.6%)
+   Otavio Salvador                   1 (3.6%)
+   Murali Karicheri                  1 (3.6%)
+   Franklin S Cooper Jr              1 (3.6%)
+   Nicolas Chauvet                   1 (3.6%)
+   Mark Mckeown                      1 (3.6%)
+   Jeffery Zhu                       1 (3.6%)
+   Sachin Surendran                  1 (3.6%)
+   Fei Wang                          1 (3.6%)
+   Siva Durga Prasad Paladugu        1 (3.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 28)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Lokesh Vutla                      7 (25.0%)
+   Simon Glass                       3 (10.7%)
+   Stephen Warren                    3 (10.7%)
+   Fabio Estevam                     3 (10.7%)
+   Stefan Roese                      2 (7.1%)
+   Thierry Reding                    1 (3.6%)
+   Nishanth Menon                    1 (3.6%)
+   Bin Meng                          1 (3.6%)
+   Tom Rini                          1 (3.6%)
+   Chris Packham                     1 (3.6%)
+   Michal Simek                      1 (3.6%)
+   Måns Rullgård                     1 (3.6%)
+   Soeren Moch                       1 (3.6%)
+   York Sun                          1 (3.6%)
+   Mugunthan V N                     1 (3.6%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         427 (20.6%)
+   Google, Inc.                      382 (18.5%)
+   DENX Software Engineering         354 (17.1%)
+   Freescale                         302 (14.6%)
+   Socionext Inc.                    117 (5.7%)
+   Red Hat                           92 (4.4%)
+   NVidia                            75 (3.6%)
+   Texas Instruments                 68 (3.3%)
+   AMD                               37 (1.8%)
+   CompuLab                          32 (1.5%)
+   Konsulko Group                    30 (1.4%)
+   Linaro                            27 (1.3%)
+   Toradex                           26 (1.3%)
+   O.S. Systems                      17 (0.8%)
+   Xilinx                            13 (0.6%)
+   Atmel                             12 (0.6%)
+   ST Microelectronics               10 (0.5%)
+   Collabora Ltd.                    9 (0.4%)
+   Samsung                           8 (0.4%)
+   Broadcom                          6 (0.3%)
+   Wind River                        6 (0.3%)
+   Boundary Devices                  4 (0.2%)
+   ARM                               3 (0.1%)
+   Free Electrons                    2 (0.1%)
+   Intel                             2 (0.1%)
+   Openedev                          2 (0.1%)
+   Citrix                            1 (0.0%)
+   Debian.org                        1 (0.0%)
+   ESD Electronics                   1 (0.0%)
+   Keymile                           1 (0.0%)
+   linutronix                        1 (0.0%)
+   Novell                            1 (0.0%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Google, Inc.                      68721 (28.0%)
+   DENX Software Engineering         53855 (21.9%)
+   (Unknown)                         43396 (17.7%)
+   Freescale                         26602 (10.8%)
+   Socionext Inc.                    23310 (9.5%)
+   NVidia                            7344 (3.0%)
+   Konsulko Group                    7247 (3.0%)
+   Red Hat                           4918 (2.0%)
+   Linaro                            2644 (1.1%)
+   Texas Instruments                 2103 (0.9%)
+   AMD                               1391 (0.6%)
+   CompuLab                          1264 (0.5%)
+   O.S. Systems                      802 (0.3%)
+   Toradex                           393 (0.2%)
+   Atmel                             317 (0.1%)
+   Xilinx                            221 (0.1%)
+   ARM                               218 (0.1%)
+   Broadcom                          212 (0.1%)
+   ST Microelectronics               164 (0.1%)
+   Collabora Ltd.                    89 (0.0%)
+   Keymile                           89 (0.0%)
+   Boundary Devices                  66 (0.0%)
+   Free Electrons                    59 (0.0%)
+   Samsung                           49 (0.0%)
+   Wind River                        31 (0.0%)
+   Intel                             22 (0.0%)
+   Citrix                            21 (0.0%)
+   Openedev                          9 (0.0%)
+   Debian.org                        5 (0.0%)
+   Novell                            5 (0.0%)
+   ESD Electronics                   2 (0.0%)
+   linutronix                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 328)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Freescale                         85 (25.9%)
+   NVidia                            76 (23.2%)
+   (Unknown)                         31 (9.5%)
+   Red Hat                           25 (7.6%)
+   Google, Inc.                      23 (7.0%)
+   Xilinx                            20 (6.1%)
+   Konsulko Group                    14 (4.3%)
+   Samsung                           10 (3.0%)
+   Toradex                           9 (2.7%)
+   Texas Instruments                 7 (2.1%)
+   Broadcom                          5 (1.5%)
+   Novell                            5 (1.5%)
+   IBM                               4 (1.2%)
+   Nobuhiro Iwamatsu                 4 (1.2%)
+   DENX Software Engineering         3 (0.9%)
+   Collabora Ltd.                    3 (0.9%)
+   CompuLab                          1 (0.3%)
+   Atmel                             1 (0.3%)
+   National Instruments              1 (0.3%)
+   Siemens                           1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 185)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         83 (44.9%)
+   Freescale                         40 (21.6%)
+   Texas Instruments                 9 (4.9%)
+   DENX Software Engineering         6 (3.2%)
+   NVidia                            4 (2.2%)
+   Samsung                           3 (1.6%)
+   Toradex                           3 (1.6%)
+   CompuLab                          3 (1.6%)
+   Linaro                            3 (1.6%)
+   Boundary Devices                  3 (1.6%)
+   Google, Inc.                      2 (1.1%)
+   Broadcom                          2 (1.1%)
+   Atmel                             2 (1.1%)
+   ARM                               2 (1.1%)
+   Free Electrons                    2 (1.1%)
+   Intel                             2 (1.1%)
+   Red Hat                           1 (0.5%)
+   Xilinx                            1 (0.5%)
+   Konsulko Group                    1 (0.5%)
+   Novell                            1 (0.5%)
+   Collabora Ltd.                    1 (0.5%)
+   Socionext Inc.                    1 (0.5%)
+   AMD                               1 (0.5%)
+   O.S. Systems                      1 (0.5%)
+   ST Microelectronics               1 (0.5%)
+   Keymile                           1 (0.5%)
+   Wind River                        1 (0.5%)
+   Citrix                            1 (0.5%)
+   Openedev                          1 (0.5%)
+   Debian.org                        1 (0.5%)
+   ESD Electronics                   1 (0.5%)
+   linutronix                        1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2016.01.rst b/doc/develop/statistics/u-boot-stats-v2016.01.rst
new file mode 100644
index 00000000000..95ed8d11b60
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2016.01.rst
@@ -0,0 +1,735 @@
+:orphan:
+
+Release Statistics for U-Boot v2016.01
+======================================
+
+* Processed 1513 changesets from 149 developers
+
+* 33 employers found
+
+* A total of 94614 lines added, 32531 removed (delta 62083)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       137 (9.1%)
+   Thomas Chou                       128 (8.5%)
+   Bin Meng                          103 (6.8%)
+   Marek Vasut                       94 (6.2%)
+   Michal Simek                      75 (5.0%)
+   Jagan Teki                        71 (4.7%)
+   Peng Fan                          42 (2.8%)
+   Fabio Estevam                     41 (2.7%)
+   Stephen Warren                    34 (2.2%)
+   Chin Liang See                    33 (2.2%)
+   Tom Rini                          31 (2.0%)
+   Hans de Goede                     31 (2.0%)
+   Mugunthan V N                     27 (1.8%)
+   Masahiro Yamada                   26 (1.7%)
+   Stefan Roese                      26 (1.7%)
+   huang lin                         23 (1.5%)
+   Francois Retief                   23 (1.5%)
+   Prabhakar Kushwaha                21 (1.4%)
+   Maxime Ripard                     21 (1.4%)
+   Dirk Eibach                       19 (1.3%)
+   Przemyslaw Marczak                18 (1.2%)
+   Nikita Kiryanov                   18 (1.2%)
+   York Sun                          17 (1.1%)
+   Stefan Brüns                      14 (0.9%)
+   Lokesh Vutla                      14 (0.9%)
+   Sjoerd Simons                     13 (0.9%)
+   Gong Qianyu                       12 (0.8%)
+   Shaohui Xie                       12 (0.8%)
+   Wenyou Yang                       11 (0.7%)
+   Vitaly Andrianov                  11 (0.7%)
+   Heiko Schocher                    10 (0.7%)
+   Aneesh Bansal                     10 (0.7%)
+   Mingkai Hu                        10 (0.7%)
+   Daniel Hellstrom                  10 (0.7%)
+   Alison Wang                       10 (0.7%)
+   Valentin Longchamp                10 (0.7%)
+   Adrian Alonso                     10 (0.7%)
+   Holger Brunck                     9 (0.6%)
+   Otavio Salvador                   8 (0.5%)
+   Alexey Brodkin                    8 (0.5%)
+   Dinh Nguyen                       8 (0.5%)
+   Nathan Rossi                      8 (0.5%)
+   vishnupatekar                     8 (0.5%)
+   Quentin Armitage                  7 (0.5%)
+   Paul Kocialkowski                 7 (0.5%)
+   Lukasz Majewski                   6 (0.4%)
+   Yao Yuan                          6 (0.4%)
+   Nishanth Menon                    6 (0.4%)
+   Siva Durga Prasad Paladugu        6 (0.4%)
+   Minkyu Kang                       6 (0.4%)
+   Luka Perkov                       6 (0.4%)
+   Vignesh R                         6 (0.4%)
+   Ryan Harkin                       5 (0.3%)
+   Vagrant Cascadian                 5 (0.3%)
+   Jeffy Chen                        5 (0.3%)
+   Albert Aribaud                    5 (0.3%)
+   Yangbo Lu                         5 (0.3%)
+   Andy Fleming                      4 (0.3%)
+   Robert P. J. Day                  4 (0.3%)
+   Måns Rullgård                     4 (0.3%)
+   Shengzhou Liu                     4 (0.3%)
+   Siarhei Siamashka                 4 (0.3%)
+   Hou Zhiqiang                      4 (0.3%)
+   Patrick Delaunay                  4 (0.3%)
+   Daniel Schwierzeck                4 (0.3%)
+   Kevin Smith                       4 (0.3%)
+   Vadzim Dambrouski                 4 (0.3%)
+   Christophe Ricard                 4 (0.3%)
+   Stefano Babic                     3 (0.2%)
+   Andre Przywara                    3 (0.2%)
+   Miao Yan                          3 (0.2%)
+   Eric Nelson                       3 (0.2%)
+   Michael Heimpold                  3 (0.2%)
+   shengjiangwu                      3 (0.2%)
+   Tang Yuantian                     3 (0.2%)
+   Jens Kuske                        3 (0.2%)
+   Rajesh Bhagat                     3 (0.2%)
+   Reinhard Pfau                     3 (0.2%)
+   Alexandre Courbot                 3 (0.2%)
+   Josh Wu                           3 (0.2%)
+   George McCollister                3 (0.2%)
+   Robert Nelson                     2 (0.1%)
+   Ye.Li                             2 (0.1%)
+   Karsten Merker                    2 (0.1%)
+   Egli, Samuel                      2 (0.1%)
+   Kamil Lulko                       2 (0.1%)
+   Olliver Schinagl                  2 (0.1%)
+   Felipe Balbi                      2 (0.1%)
+   Wolfgang Denk                     2 (0.1%)
+   Ariel D'Alessandro                2 (0.1%)
+   Cooper Jr., Franklin              2 (0.1%)
+   Edgar E. Iglesias                 2 (0.1%)
+   Tobias Müller                     2 (0.1%)
+   Hannes Petermaier                 2 (0.1%)
+   Zhao Qiang                        2 (0.1%)
+   Scott Wood                        2 (0.1%)
+   Bernhard Nortmann                 2 (0.1%)
+   David Müller (ELSOFT AG)          1 (0.1%)
+   Rasmus Villemoes                  1 (0.1%)
+   Joe Hershberger                   1 (0.1%)
+   Andrey Skvortsov                  1 (0.1%)
+   Ladislav Michl                    1 (0.1%)
+   Michael Schanz                    1 (0.1%)
+   Maximilian Schwerin               1 (0.1%)
+   Aleksei Mamlin                    1 (0.1%)
+   Stuart Yoder                      1 (0.1%)
+   Alexander Stein                   1 (0.1%)
+   Pratiyush Mohan Srivastava        1 (0.1%)
+   Peter Robinson                    1 (0.1%)
+   Angelo Dureghello                 1 (0.1%)
+   Jeroen Hofstee                    1 (0.1%)
+   Philippe De Swert                 1 (0.1%)
+   Anatolij Gustschin                1 (0.1%)
+   Andreas Bießmann                  1 (0.1%)
+   Philipp Rosenberger               1 (0.1%)
+   Gerald Kerma                      1 (0.1%)
+   Sanchayan Maity                   1 (0.1%)
+   Thomas Fitzsimmons                1 (0.1%)
+   Marcel Ziswiler                   1 (0.1%)
+   Jelle de Jong                     1 (0.1%)
+   Stephane Ayotte                   1 (0.1%)
+   Christoph Dietrich                1 (0.1%)
+   Bagavathiannan Palanisamy         1 (0.1%)
+   Dmitry Lifshitz                   1 (0.1%)
+   Kipisz, Steven                    1 (0.1%)
+   Vincent Stehlé                    1 (0.1%)
+   Guillaume REMBERT                 1 (0.1%)
+   Vincent BENOIT                    1 (0.1%)
+   Matwey V. Kornilov                1 (0.1%)
+   Cheng Gu                          1 (0.1%)
+   Tom Warren                        1 (0.1%)
+   Tzu-Jung Lee                      1 (0.1%)
+   Zhenhua Luo                       1 (0.1%)
+   Daniel Gorsulowski                1 (0.1%)
+   Codrin Ciubotariu                 1 (0.1%)
+   Joakim Tjernlund                  1 (0.1%)
+   Damien Riegel                     1 (0.1%)
+   Sylvain Rochet                    1 (0.1%)
+   Jacob Stiffler                    1 (0.1%)
+   Sylvain Lemieux                   1 (0.1%)
+   Horia Geantă                      1 (0.1%)
+   Albert ARIBAUD (3ADEV)            1 (0.1%)
+   Roy Spliet                        1 (0.1%)
+   Pierre Aubert                     1 (0.1%)
+   Thomas Huth                       1 (0.1%)
+   Guillaume GARDET                  1 (0.1%)
+   Roger Quadros                     1 (0.1%)
+   David Batzle                      1 (0.1%)
+   Anthony Felice                    1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Nathan Rossi                      12429 (11.3%)
+   Thomas Chou                       7155 (6.5%)
+   Simon Glass                       5678 (5.2%)
+   Stefan Roese                      5459 (5.0%)
+   Mugunthan V N                     5433 (4.9%)
+   Tom Rini                          5187 (4.7%)
+   huang lin                         4015 (3.7%)
+   Bin Meng                          3746 (3.4%)
+   Marek Vasut                       3693 (3.4%)
+   Mingkai Hu                        3316 (3.0%)
+   Lokesh Vutla                      3249 (3.0%)
+   Daniel Hellstrom                  3133 (2.8%)
+   Hans de Goede                     2853 (2.6%)
+   Prabhakar Kushwaha                2791 (2.5%)
+   Dirk Eibach                       2590 (2.4%)
+   Heiko Schocher                    2582 (2.3%)
+   Shaohui Xie                       2048 (1.9%)
+   Przemyslaw Marczak                1947 (1.8%)
+   Jagan Teki                        1931 (1.8%)
+   Andy Fleming                      1847 (1.7%)
+   Michal Simek                      1817 (1.7%)
+   Francois Retief                   1740 (1.6%)
+   vishnupatekar                     1692 (1.5%)
+   Masahiro Yamada                   1616 (1.5%)
+   Stephen Warren                    1599 (1.5%)
+   Nishanth Menon                    1508 (1.4%)
+   Kevin Smith                       1455 (1.3%)
+   Wenyou Yang                       1415 (1.3%)
+   Maxime Ripard                     1151 (1.0%)
+   Peng Fan                          1087 (1.0%)
+   Fabio Estevam                     938 (0.9%)
+   Gong Qianyu                       779 (0.7%)
+   Vitaly Andrianov                  778 (0.7%)
+   York Sun                          708 (0.6%)
+   Albert Aribaud                    705 (0.6%)
+   Nikita Kiryanov                   690 (0.6%)
+   Jens Kuske                        685 (0.6%)
+   Otavio Salvador                   655 (0.6%)
+   Tom Warren                        425 (0.4%)
+   Gerald Kerma                      376 (0.3%)
+   Jelle de Jong                     319 (0.3%)
+   Sjoerd Simons                     312 (0.3%)
+   Wolfgang Denk                     310 (0.3%)
+   Tang Yuantian                     265 (0.2%)
+   Alexey Brodkin                    253 (0.2%)
+   Stefan Brüns                      248 (0.2%)
+   Lukasz Majewski                   248 (0.2%)
+   Aneesh Bansal                     244 (0.2%)
+   Edgar E. Iglesias                 231 (0.2%)
+   Jeffy Chen                        221 (0.2%)
+   Patrick Delaunay                  221 (0.2%)
+   Quentin Armitage                  199 (0.2%)
+   Angelo Dureghello                 176 (0.2%)
+   Siva Durga Prasad Paladugu        174 (0.2%)
+   Chin Liang See                    172 (0.2%)
+   Christophe Ricard                 171 (0.2%)
+   Paul Kocialkowski                 167 (0.2%)
+   Måns Rullgård                     165 (0.2%)
+   Kamil Lulko                       160 (0.1%)
+   Vagrant Cascadian                 159 (0.1%)
+   Yao Yuan                          158 (0.1%)
+   Hou Zhiqiang                      157 (0.1%)
+   Alison Wang                       140 (0.1%)
+   Robert P. J. Day                  113 (0.1%)
+   Daniel Schwierzeck                111 (0.1%)
+   Valentin Longchamp                109 (0.1%)
+   Ryan Harkin                       90 (0.1%)
+   Vincent BENOIT                    90 (0.1%)
+   George McCollister                87 (0.1%)
+   Adrian Alonso                     81 (0.1%)
+   Dinh Nguyen                       81 (0.1%)
+   Michael Heimpold                  76 (0.1%)
+   Holger Brunck                     73 (0.1%)
+   Shengzhou Liu                     69 (0.1%)
+   Bernhard Nortmann                 67 (0.1%)
+   Stefano Babic                     64 (0.1%)
+   Tobias Müller                     58 (0.1%)
+   Yangbo Lu                         53 (0.0%)
+   Siarhei Siamashka                 49 (0.0%)
+   Alexandre Courbot                 49 (0.0%)
+   Vignesh R                         43 (0.0%)
+   Roger Quadros                     43 (0.0%)
+   Christoph Dietrich                41 (0.0%)
+   Reinhard Pfau                     37 (0.0%)
+   Daniel Gorsulowski                36 (0.0%)
+   Albert ARIBAUD (3ADEV)            36 (0.0%)
+   Zhao Qiang                        35 (0.0%)
+   Luka Perkov                       34 (0.0%)
+   shengjiangwu                      34 (0.0%)
+   Sanchayan Maity                   32 (0.0%)
+   Minkyu Kang                       31 (0.0%)
+   Sylvain Rochet                    29 (0.0%)
+   Eric Nelson                       27 (0.0%)
+   Andreas Bießmann                  27 (0.0%)
+   Tzu-Jung Lee                      27 (0.0%)
+   Hannes Petermaier                 24 (0.0%)
+   Rajesh Bhagat                     20 (0.0%)
+   Roy Spliet                        19 (0.0%)
+   Philippe De Swert                 18 (0.0%)
+   Robert Nelson                     17 (0.0%)
+   Egli, Samuel                      15 (0.0%)
+   Ye.Li                             14 (0.0%)
+   Matwey V. Kornilov                14 (0.0%)
+   Guillaume GARDET                  14 (0.0%)
+   Stuart Yoder                      13 (0.0%)
+   Anatolij Gustschin                13 (0.0%)
+   Stephane Ayotte                   13 (0.0%)
+   Kipisz, Steven                    13 (0.0%)
+   Josh Wu                           11 (0.0%)
+   Scott Wood                        11 (0.0%)
+   Sylvain Lemieux                   11 (0.0%)
+   Karsten Merker                    10 (0.0%)
+   Ariel D'Alessandro                10 (0.0%)
+   Vadzim Dambrouski                 9 (0.0%)
+   Olliver Schinagl                  9 (0.0%)
+   Dmitry Lifshitz                   9 (0.0%)
+   Maximilian Schwerin               8 (0.0%)
+   Cooper Jr., Franklin              6 (0.0%)
+   Andre Przywara                    5 (0.0%)
+   Miao Yan                          5 (0.0%)
+   Joe Hershberger                   5 (0.0%)
+   Alexander Stein                   5 (0.0%)
+   Thomas Fitzsimmons                5 (0.0%)
+   Thomas Huth                       5 (0.0%)
+   Zhenhua Luo                       4 (0.0%)
+   Horia Geantă                      4 (0.0%)
+   Felipe Balbi                      3 (0.0%)
+   Vincent Stehlé                    3 (0.0%)
+   Codrin Ciubotariu                 3 (0.0%)
+   Joakim Tjernlund                  3 (0.0%)
+   Rasmus Villemoes                  2 (0.0%)
+   Andrey Skvortsov                  2 (0.0%)
+   Pratiyush Mohan Srivastava        2 (0.0%)
+   Jeroen Hofstee                    2 (0.0%)
+   Bagavathiannan Palanisamy         2 (0.0%)
+   Guillaume REMBERT                 2 (0.0%)
+   Cheng Gu                          2 (0.0%)
+   Damien Riegel                     2 (0.0%)
+   Jacob Stiffler                    2 (0.0%)
+   Pierre Aubert                     2 (0.0%)
+   David Batzle                      2 (0.0%)
+   David Müller (ELSOFT AG)          1 (0.0%)
+   Ladislav Michl                    1 (0.0%)
+   Michael Schanz                    1 (0.0%)
+   Aleksei Mamlin                    1 (0.0%)
+   Peter Robinson                    1 (0.0%)
+   Philipp Rosenberger               1 (0.0%)
+   Marcel Ziswiler                   1 (0.0%)
+   Anthony Felice                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          4784 (14.7%)
+   Kevin Smith                       1380 (4.2%)
+   Francois Retief                   482 (1.5%)
+   Masahiro Yamada                   374 (1.1%)
+   Wolfgang Denk                     302 (0.9%)
+   Vagrant Cascadian                 63 (0.2%)
+   Christophe Ricard                 53 (0.2%)
+   Robert P. J. Day                  44 (0.1%)
+   Quentin Armitage                  30 (0.1%)
+   Luka Perkov                       21 (0.1%)
+   Alexandre Courbot                 18 (0.1%)
+   Andreas Bießmann                  18 (0.1%)
+   Rajesh Bhagat                     14 (0.0%)
+   Stuart Yoder                      13 (0.0%)
+   Anatolij Gustschin                13 (0.0%)
+   Matwey V. Kornilov                12 (0.0%)
+   Paul Kocialkowski                 9 (0.0%)
+   Daniel Schwierzeck                7 (0.0%)
+   Olliver Schinagl                  6 (0.0%)
+   Josh Wu                           5 (0.0%)
+   Minkyu Kang                       4 (0.0%)
+   Zhenhua Luo                       4 (0.0%)
+   Holger Brunck                     3 (0.0%)
+   Ariel D'Alessandro                3 (0.0%)
+   Hannes Petermaier                 2 (0.0%)
+   Andre Przywara                    2 (0.0%)
+   Joe Hershberger                   1 (0.0%)
+   Ladislav Michl                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 226)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Hans de Goede                     29 (12.8%)
+   Michal Simek                      26 (11.5%)
+   Tom Warren                        19 (8.4%)
+   Minkyu Kang                       17 (7.5%)
+   Gong Qianyu                       16 (7.1%)
+   Lokesh Vutla                      14 (6.2%)
+   Valentin Longchamp                13 (5.8%)
+   Simon Glass                       8 (3.5%)
+   Mingkai Hu                        8 (3.5%)
+   Tom Rini                          7 (3.1%)
+   Hou Zhiqiang                      7 (3.1%)
+   Stefan Roese                      7 (3.1%)
+   Mugunthan V N                     6 (2.7%)
+   Thomas Chou                       5 (2.2%)
+   Marek Vasut                       4 (1.8%)
+   Andreas Bießmann                  3 (1.3%)
+   Jagan Teki                        3 (1.3%)
+   Pratiyush Mohan Srivastava        2 (0.9%)
+   Sriram Dash                       2 (0.9%)
+   Chris Kilgour                     2 (0.9%)
+   Frank Li                          2 (0.9%)
+   Li Yang                           2 (0.9%)
+   York Sun                          2 (0.9%)
+   Shaohui Xie                       2 (0.9%)
+   Luka Perkov                       1 (0.4%)
+   Ruchika Gupta                     1 (0.4%)
+   Ramneek Mehresh                   1 (0.4%)
+   Bogdan Hamciuc                    1 (0.4%)
+   Tony Dinh                         1 (0.4%)
+   Liviu Dudau                       1 (0.4%)
+   Ezequiel Garcia                   1 (0.4%)
+   Andreas Huber                     1 (0.4%)
+   Schuyler Patton                   1 (0.4%)
+   Yen Lin                           1 (0.4%)
+   Sonic Zhang                       1 (0.4%)
+   Lawish Deshmukh                   1 (0.4%)
+   Christoph Dietrich                1 (0.4%)
+   Tobias Müller                     1 (0.4%)
+   Stephen Warren                    1 (0.4%)
+   Peng Fan                          1 (0.4%)
+   Vitaly Andrianov                  1 (0.4%)
+   Bin Meng                          1 (0.4%)
+   Dirk Eibach                       1 (0.4%)
+   Prabhakar Kushwaha                1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 700)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       119 (17.0%)
+   Tom Rini                          117 (16.7%)
+   York Sun                          101 (14.4%)
+   Bin Meng                          98 (14.0%)
+   Jagan Teki                        49 (7.0%)
+   Heiko Schocher                    43 (6.1%)
+   Marek Vasut                       41 (5.9%)
+   Hans de Goede                     28 (4.0%)
+   Andreas Bießmann                  16 (2.3%)
+   Stefano Babic                     13 (1.9%)
+   Chin Liang See                    12 (1.7%)
+   Fabio Estevam                     12 (1.7%)
+   Stefan Roese                      7 (1.0%)
+   Lokesh Vutla                      4 (0.6%)
+   Mugunthan V N                     4 (0.6%)
+   Joe Hershberger                   4 (0.6%)
+   Linus Walleij                     4 (0.6%)
+   Eric Nelson                       3 (0.4%)
+   Przemyslaw Marczak                3 (0.4%)
+   Stephen Warren                    2 (0.3%)
+   Peng Fan                          2 (0.3%)
+   Thomas Chou                       1 (0.1%)
+   Masahiro Yamada                   1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Andre Przywara                    1 (0.1%)
+   Alexander Graf                    1 (0.1%)
+   Hector Palacios                   1 (0.1%)
+   James Doublesin                   1 (0.1%)
+   Roger Meier                       1 (0.1%)
+   Igor Grinberg                     1 (0.1%)
+   Zhengxiong Jin                    1 (0.1%)
+   Thierry Reding                    1 (0.1%)
+   Ley Foon Tan                      1 (0.1%)
+   Stefan Brüns                      1 (0.1%)
+   Ryan Harkin                       1 (0.1%)
+   Vignesh R                         1 (0.1%)
+   Sjoerd Simons                     1 (0.1%)
+   Alexey Brodkin                    1 (0.1%)
+   Albert Aribaud                    1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 98)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagan Teki                        17 (17.3%)
+   Bin Meng                          16 (16.3%)
+   Simon Glass                       10 (10.2%)
+   Stephen Warren                    9 (9.2%)
+   Anand Moon                        7 (7.1%)
+   Michal Simek                      5 (5.1%)
+   Masahiro Yamada                   3 (3.1%)
+   Lukasz Majewski                   3 (3.1%)
+   Hans de Goede                     2 (2.0%)
+   Fabio Estevam                     2 (2.0%)
+   Ryan Harkin                       2 (2.0%)
+   Vagrant Cascadian                 2 (2.0%)
+   Jian Luo                          2 (2.0%)
+   Tom Rini                          1 (1.0%)
+   York Sun                          1 (1.0%)
+   Marek Vasut                       1 (1.0%)
+   Stefano Babic                     1 (1.0%)
+   Lokesh Vutla                      1 (1.0%)
+   Mugunthan V N                     1 (1.0%)
+   Eric Nelson                       1 (1.0%)
+   Thomas Chou                       1 (1.0%)
+   Hector Palacios                   1 (1.0%)
+   Ezequiel Garcia                   1 (1.0%)
+   Kevin Smith                       1 (1.0%)
+   Ariel D'Alessandro                1 (1.0%)
+   Hannes Petermaier                 1 (1.0%)
+   Jaehoon Chung                     1 (1.0%)
+   Pavel Machek                      1 (1.0%)
+   Chen-Yu Tsai                      1 (1.0%)
+   Moritz Fischer                    1 (1.0%)
+   Siarhei Siamashka                 1 (1.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 98)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagan Teki                        25 (25.5%)
+   Simon Glass                       25 (25.5%)
+   Przemyslaw Marczak                11 (11.2%)
+   Bin Meng                          10 (10.2%)
+   Thomas Chou                       4 (4.1%)
+   Stephen Warren                    2 (2.0%)
+   Marek Vasut                       2 (2.0%)
+   Eric Nelson                       2 (2.0%)
+   Stefan Brüns                      2 (2.0%)
+   Siva Durga Prasad Paladugu        2 (2.0%)
+   Michal Simek                      1 (1.0%)
+   Hans de Goede                     1 (1.0%)
+   Fabio Estevam                     1 (1.0%)
+   Ryan Harkin                       1 (1.0%)
+   Vagrant Cascadian                 1 (1.0%)
+   Tom Rini                          1 (1.0%)
+   Stefano Babic                     1 (1.0%)
+   Heiko Schocher                    1 (1.0%)
+   Stefan Roese                      1 (1.0%)
+   Andre Przywara                    1 (1.0%)
+   Roger Quadros                     1 (1.0%)
+   Jens Kuske                        1 (1.0%)
+   Nishanth Menon                    1 (1.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 27)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stephen Warren                    4 (14.8%)
+   Tom Rini                          3 (11.1%)
+   Albert Aribaud                    3 (11.1%)
+   Thomas Chou                       1 (3.7%)
+   Fabio Estevam                     1 (3.7%)
+   Vagrant Cascadian                 1 (3.7%)
+   Jian Luo                          1 (3.7%)
+   Ezequiel Garcia                   1 (3.7%)
+   Ariel D'Alessandro                1 (3.7%)
+   Pavel Machek                      1 (3.7%)
+   Felipe Balbi                      1 (3.7%)
+   Jon Nettleton                     1 (3.7%)
+   Francisco Aguerre                 1 (3.7%)
+   Jason Kridner                     1 (3.7%)
+   Kevin Hilman                      1 (3.7%)
+   Zhichun Hua                       1 (3.7%)
+   Ivan Mercier                      1 (3.7%)
+   Matthijs van Duin                 1 (3.7%)
+   Robert Nelson                     1 (3.7%)
+   Shengzhou Liu                     1 (3.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 27)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          7 (25.9%)
+   Simon Glass                       4 (14.8%)
+   Thomas Chou                       3 (11.1%)
+   Fabio Estevam                     3 (11.1%)
+   Bin Meng                          2 (7.4%)
+   Michal Simek                      2 (7.4%)
+   Robert Nelson                     1 (3.7%)
+   Nishanth Menon                    1 (3.7%)
+   York Sun                          1 (3.7%)
+   Alexandre Courbot                 1 (3.7%)
+   Marcel Ziswiler                   1 (3.7%)
+   Alison Wang                       1 (3.7%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         469 (31.0%)
+   NXP                               220 (14.5%)
+   Google, Inc.                      137 (9.1%)
+   DENX Software Engineering         136 (9.0%)
+   AMD                               75 (5.0%)
+   Openedev                          71 (4.7%)
+   Texas Instruments                 71 (4.7%)
+   Red Hat                           31 (2.0%)
+   Konsulko Group                    31 (2.0%)
+   NVidia                            31 (2.0%)
+   Rockchip                          28 (1.9%)
+   Socionext Inc.                    26 (1.7%)
+   Samsung                           25 (1.7%)
+   Keymile                           23 (1.5%)
+   Guntermann & Drunck               22 (1.5%)
+   Free Electrons                    21 (1.4%)
+   CompuLab                          19 (1.3%)
+   Atmel                             14 (0.9%)
+   Collabora Ltd.                    13 (0.9%)
+   Gaisler Research                  10 (0.7%)
+   O.S. Systems                      8 (0.5%)
+   Xilinx                            8 (0.5%)
+   Debian.org                        6 (0.4%)
+   Linaro                            5 (0.3%)
+   ARM                               3 (0.2%)
+   Siemens                           2 (0.1%)
+   Toradex                           2 (0.1%)
+   Cisco                             1 (0.1%)
+   ESD Electronics                   1 (0.1%)
+   linutronix                        1 (0.1%)
+   Marvell                           1 (0.1%)
+   National Instruments              1 (0.1%)
+   Transmode Systems                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         35693 (32.5%)
+   NXP                               12926 (11.8%)
+   DENX Software Engineering         12121 (11.0%)
+   Texas Instruments                 11078 (10.1%)
+   Google, Inc.                      5678 (5.2%)
+   Konsulko Group                    5187 (4.7%)
+   Rockchip                          4236 (3.9%)
+   Gaisler Research                  3133 (2.8%)
+   Red Hat                           2853 (2.6%)
+   Guntermann & Drunck               2627 (2.4%)
+   Samsung                           1980 (1.8%)
+   Openedev                          1931 (1.8%)
+   NVidia                            1835 (1.7%)
+   AMD                               1817 (1.7%)
+   Socionext Inc.                    1616 (1.5%)
+   Atmel                             1426 (1.3%)
+   Free Electrons                    1151 (1.0%)
+   CompuLab                          699 (0.6%)
+   O.S. Systems                      655 (0.6%)
+   Xilinx                            405 (0.4%)
+   Collabora Ltd.                    312 (0.3%)
+   Keymile                           283 (0.3%)
+   Debian.org                        147 (0.1%)
+   Linaro                            90 (0.1%)
+   ESD Electronics                   36 (0.0%)
+   Toradex                           33 (0.0%)
+   Siemens                           15 (0.0%)
+   ARM                               5 (0.0%)
+   Cisco                             5 (0.0%)
+   National Instruments              5 (0.0%)
+   Transmode Systems                 3 (0.0%)
+   Marvell                           2 (0.0%)
+   linutronix                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 226)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   NXP                               49 (21.7%)
+   Red Hat                           29 (12.8%)
+   Xilinx                            26 (11.5%)
+   Texas Instruments                 22 (9.7%)
+   NVidia                            20 (8.8%)
+   Samsung                           17 (7.5%)
+   Keymile                           16 (7.1%)
+   (Unknown)                         15 (6.6%)
+   DENX Software Engineering         11 (4.9%)
+   Google, Inc.                      8 (3.5%)
+   Konsulko Group                    7 (3.1%)
+   Openedev                          3 (1.3%)
+   Guntermann & Drunck               1 (0.4%)
+   ARM                               1 (0.4%)
+   Analog Devices                    1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 153)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         68 (44.4%)
+   NXP                               25 (16.3%)
+   Texas Instruments                 10 (6.5%)
+   DENX Software Engineering         6 (3.9%)
+   Keymile                           5 (3.3%)
+   NVidia                            3 (2.0%)
+   Samsung                           3 (2.0%)
+   Xilinx                            2 (1.3%)
+   Guntermann & Drunck               2 (1.3%)
+   Rockchip                          2 (1.3%)
+   Atmel                             2 (1.3%)
+   CompuLab                          2 (1.3%)
+   Debian.org                        2 (1.3%)
+   Toradex                           2 (1.3%)
+   Red Hat                           1 (0.7%)
+   Google, Inc.                      1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   Openedev                          1 (0.7%)
+   ARM                               1 (0.7%)
+   Gaisler Research                  1 (0.7%)
+   AMD                               1 (0.7%)
+   Socionext Inc.                    1 (0.7%)
+   Free Electrons                    1 (0.7%)
+   O.S. Systems                      1 (0.7%)
+   Collabora Ltd.                    1 (0.7%)
+   Linaro                            1 (0.7%)
+   ESD Electronics                   1 (0.7%)
+   Siemens                           1 (0.7%)
+   Cisco                             1 (0.7%)
+   National Instruments              1 (0.7%)
+   Transmode Systems                 1 (0.7%)
+   Marvell                           1 (0.7%)
+   linutronix                        1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2016.03.rst b/doc/develop/statistics/u-boot-stats-v2016.03.rst
new file mode 100644
index 00000000000..f66aa028e82
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2016.03.rst
@@ -0,0 +1,623 @@
+:orphan:
+
+Release Statistics for U-Boot v2016.03
+======================================
+
+* Processed 1375 changesets from 126 developers
+
+* 26 employers found
+
+* A total of 83087 lines added, 24746 removed (delta 58341)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       309 (22.5%)
+   Masahiro Yamada                   113 (8.2%)
+   Bin Meng                          95 (6.9%)
+   Michal Simek                      95 (6.9%)
+   Stephen Warren                    81 (5.9%)
+   Mugunthan V N                     50 (3.6%)
+   Stefan Roese                      45 (3.3%)
+   Peng Fan                          33 (2.4%)
+   Tom Rini                          29 (2.1%)
+   Jagan Teki                        25 (1.8%)
+   Marek Vasut                       24 (1.7%)
+   Ricardo Ribalda                   23 (1.7%)
+   Wenyou Yang                       19 (1.4%)
+   Daniel Schwierzeck                18 (1.3%)
+   Purna Chandra Mandal              14 (1.0%)
+   Prabhakar Kushwaha                14 (1.0%)
+   Siva Durga Prasad Paladugu        13 (0.9%)
+   Fabio Estevam                     12 (0.9%)
+   Aneesh Bansal                     12 (0.9%)
+   Miao Yan                          12 (0.9%)
+   Nikita Kiryanov                   11 (0.8%)
+   Adam Ford                         11 (0.8%)
+   Bhuvanchandra DV                  10 (0.7%)
+   Sergey Temerkhanov                10 (0.7%)
+   Phil Sutter                       10 (0.7%)
+   David Müller (ELSOFT AG)          9 (0.7%)
+   Gong Qianyu                       9 (0.7%)
+   Chen-Yu Tsai                      9 (0.7%)
+   Qianyu Gong                       7 (0.5%)
+   Christophe Ricard                 7 (0.5%)
+   Ye.Li                             7 (0.5%)
+   Andreas Fenkart                   7 (0.5%)
+   Ladislav Michl                    7 (0.5%)
+   Stefan Brüns                      7 (0.5%)
+   Lubomir Rintel                    6 (0.4%)
+   Vikas Manocha                     6 (0.4%)
+   Hans de Goede                     6 (0.4%)
+   Alexey Brodkin                    6 (0.4%)
+   Mateusz Kulikowski                6 (0.4%)
+   Jeffy Chen                        5 (0.4%)
+   Dinh Nguyen                       5 (0.4%)
+   Alexandre Messier                 5 (0.4%)
+   Hannes Schmelzer                  5 (0.4%)
+   Andreas Bießmann                  5 (0.4%)
+   Nathan Rossi                      5 (0.4%)
+   Josh Wu                           5 (0.4%)
+   Shaohui Xie                       5 (0.4%)
+   Codrin Ciubotariu                 5 (0.4%)
+   Vladimir Zapolskiy                5 (0.4%)
+   Paul Kocialkowski                 4 (0.3%)
+   Alison Wang                       4 (0.3%)
+   Albert ARIBAUD                    4 (0.3%)
+   Zhao Qiang                        4 (0.3%)
+   Shengzhou Liu                     4 (0.3%)
+   Thomas Chou                       4 (0.3%)
+   Paul Burton                       4 (0.3%)
+   Vishnu Patekar                    4 (0.3%)
+   Pratiyush Mohan Srivastava        4 (0.3%)
+   Derald D. Woods                   3 (0.2%)
+   Soeren Moch                       3 (0.2%)
+   Yangbo Lu                         3 (0.2%)
+   Heiko Schocher                    3 (0.2%)
+   Jelle van der Waa                 3 (0.2%)
+   Julien CORJON                     3 (0.2%)
+   Gregory CLEMENT                   3 (0.2%)
+   Vignesh R                         3 (0.2%)
+   Kevin Smith                       3 (0.2%)
+   Ashish kumar                      3 (0.2%)
+   Lin Huang                         2 (0.1%)
+   Stanislav Galabov                 2 (0.1%)
+   Sam Protsenko                     2 (0.1%)
+   York Sun                          2 (0.1%)
+   Steve Rae                         2 (0.1%)
+   Łukasz Majewski                   2 (0.1%)
+   Vishwas Srivastava                2 (0.1%)
+   Clemens Gruber                    2 (0.1%)
+   Florian Fainelli                  2 (0.1%)
+   Wenbin Song                       2 (0.1%)
+   Michael van Slingerland           2 (0.1%)
+   Ying Zhang                        2 (0.1%)
+   Sanchayan Maity                   2 (0.1%)
+   Robert P. J. Day                  2 (0.1%)
+   Lokesh Vutla                      1 (0.1%)
+   Anand Moon                        1 (0.1%)
+   Chris Zhong                       1 (0.1%)
+   FUKAUMI Naoki                     1 (0.1%)
+   Vagrant Cascadian                 1 (0.1%)
+   Matthias Schiffer                 1 (0.1%)
+   Alexander Graf                    1 (0.1%)
+   Yuichiro Goto                     1 (0.1%)
+   Karsten Merker                    1 (0.1%)
+   William Cohen                     1 (0.1%)
+   Mingkai Hu                        1 (0.1%)
+   Ruchika Gupta                     1 (0.1%)
+   Ashish Kumar                      1 (0.1%)
+   Jason Wu                          1 (0.1%)
+   Ulises Cardenas                   1 (0.1%)
+   Guillaume GARDET                  1 (0.1%)
+   Samuel Mescoff                    1 (0.1%)
+   Matthias Michel                   1 (0.1%)
+   Roger Meier                       1 (0.1%)
+   Eddy Petrișor                     1 (0.1%)
+   Anatolij Gustschin                1 (0.1%)
+   Frank Wang                        1 (0.1%)
+   Peter Robinson                    1 (0.1%)
+   Andrei Pistirica                  1 (0.1%)
+   Paul Thacker                      1 (0.1%)
+   Wang Dongsheng                    1 (0.1%)
+   Sascha Hauer                      1 (0.1%)
+   Stefan Agner                      1 (0.1%)
+   Soren Brinkmann                   1 (0.1%)
+   Punnaiah Choudary Kalluri         1 (0.1%)
+   Ed Swarthout                      1 (0.1%)
+   Tang Yuantian                     1 (0.1%)
+   Andreas Neubacher                 1 (0.1%)
+   Ted Chen                          1 (0.1%)
+   rick                              1 (0.1%)
+   Oscar Curero                      1 (0.1%)
+   Robert Nelson                     1 (0.1%)
+   Enric Balletbò i Serra            1 (0.1%)
+   Erik Tideman                      1 (0.1%)
+   Dalon Westergreen                 1 (0.1%)
+   Ben Whitten                       1 (0.1%)
+   Tor Krill                         1 (0.1%)
+   Marco Schuster                    1 (0.1%)
+   Stefan Monnier                    1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       28854 (31.8%)
+   Masahiro Yamada                   6517 (7.2%)
+   Bin Meng                          6203 (6.8%)
+   Stephen Warren                    5173 (5.7%)
+   Stefan Roese                      3598 (4.0%)
+   Purna Chandra Mandal              3361 (3.7%)
+   Ted Chen                          3081 (3.4%)
+   Daniel Schwierzeck                2441 (2.7%)
+   Tom Rini                          2418 (2.7%)
+   Peng Fan                          1743 (1.9%)
+   Mugunthan V N                     1638 (1.8%)
+   Sergey Temerkhanov                1618 (1.8%)
+   Marek Vasut                       1576 (1.7%)
+   Michal Simek                      1438 (1.6%)
+   Christophe Ricard                 1269 (1.4%)
+   Aneesh Bansal                     1228 (1.4%)
+   Siva Durga Prasad Paladugu        1219 (1.3%)
+   Wenyou Yang                       1166 (1.3%)
+   Vikas Manocha                     1095 (1.2%)
+   Phil Sutter                       1070 (1.2%)
+   Tor Krill                         1046 (1.2%)
+   Ye.Li                             1026 (1.1%)
+   Miao Yan                          996 (1.1%)
+   Prabhakar Kushwaha                831 (0.9%)
+   Heiko Schocher                    750 (0.8%)
+   Ricardo Ribalda                   686 (0.8%)
+   Adam Ford                         604 (0.7%)
+   Codrin Ciubotariu                 480 (0.5%)
+   Gregory CLEMENT                   442 (0.5%)
+   Paul Kocialkowski                 397 (0.4%)
+   David Müller (ELSOFT AG)          341 (0.4%)
+   Andreas Fenkart                   317 (0.3%)
+   Bhuvanchandra DV                  287 (0.3%)
+   Nikita Kiryanov                   278 (0.3%)
+   Qianyu Gong                       271 (0.3%)
+   Jagan Teki                        261 (0.3%)
+   Chen-Yu Tsai                      243 (0.3%)
+   Stefan Brüns                      225 (0.2%)
+   Paul Thacker                      219 (0.2%)
+   Albert ARIBAUD                    216 (0.2%)
+   Derald D. Woods                   211 (0.2%)
+   Jelle van der Waa                 208 (0.2%)
+   Mateusz Kulikowski                195 (0.2%)
+   Alexey Brodkin                    190 (0.2%)
+   Thomas Chou                       188 (0.2%)
+   Vladimir Zapolskiy                181 (0.2%)
+   Gong Qianyu                       179 (0.2%)
+   Vishnu Patekar                    175 (0.2%)
+   Dinh Nguyen                       173 (0.2%)
+   Alison Wang                       139 (0.2%)
+   Hannes Schmelzer                  138 (0.2%)
+   Roger Meier                       129 (0.1%)
+   Wenbin Song                       108 (0.1%)
+   Shaohui Xie                       99 (0.1%)
+   Jeffy Chen                        95 (0.1%)
+   Paul Burton                       86 (0.1%)
+   Josh Wu                           81 (0.1%)
+   Zhao Qiang                        81 (0.1%)
+   Ben Whitten                       75 (0.1%)
+   Hans de Goede                     73 (0.1%)
+   Andrei Pistirica                  72 (0.1%)
+   Fabio Estevam                     64 (0.1%)
+   Stanislav Galabov                 61 (0.1%)
+   Lubomir Rintel                    60 (0.1%)
+   Ulises Cardenas                   59 (0.1%)
+   York Sun                          57 (0.1%)
+   Łukasz Majewski                   49 (0.1%)
+   Soeren Moch                       47 (0.1%)
+   Dalon Westergreen                 45 (0.0%)
+   Florian Fainelli                  44 (0.0%)
+   Alexandre Messier                 42 (0.0%)
+   Shengzhou Liu                     41 (0.0%)
+   Ying Zhang                        39 (0.0%)
+   Ladislav Michl                    34 (0.0%)
+   Ashish kumar                      30 (0.0%)
+   Nathan Rossi                      29 (0.0%)
+   Vignesh R                         29 (0.0%)
+   Sam Protsenko                     26 (0.0%)
+   Robert P. J. Day                  26 (0.0%)
+   Eddy Petrișor                     26 (0.0%)
+   Steve Rae                         25 (0.0%)
+   Michael van Slingerland           25 (0.0%)
+   Julien CORJON                     24 (0.0%)
+   Andreas Neubacher                 24 (0.0%)
+   Stefan Monnier                    21 (0.0%)
+   Mingkai Hu                        20 (0.0%)
+   Andreas Bießmann                  18 (0.0%)
+   Ruchika Gupta                     18 (0.0%)
+   Anatolij Gustschin                16 (0.0%)
+   rick                              16 (0.0%)
+   Sanchayan Maity                   15 (0.0%)
+   Matthias Michel                   14 (0.0%)
+   Wang Dongsheng                    14 (0.0%)
+   Yangbo Lu                         13 (0.0%)
+   Clemens Gruber                    13 (0.0%)
+   Samuel Mescoff                    13 (0.0%)
+   Kevin Smith                       12 (0.0%)
+   Robert Nelson                     12 (0.0%)
+   Pratiyush Mohan Srivastava        11 (0.0%)
+   Erik Tideman                      10 (0.0%)
+   Stefan Agner                      9 (0.0%)
+   Lokesh Vutla                      7 (0.0%)
+   Chris Zhong                       7 (0.0%)
+   Yuichiro Goto                     7 (0.0%)
+   Karsten Merker                    7 (0.0%)
+   Vishwas Srivastava                5 (0.0%)
+   Sascha Hauer                      5 (0.0%)
+   Tang Yuantian                     5 (0.0%)
+   Lin Huang                         3 (0.0%)
+   Oscar Curero                      3 (0.0%)
+   Enric Balletbò i Serra            3 (0.0%)
+   Alexander Graf                    2 (0.0%)
+   William Cohen                     2 (0.0%)
+   Ashish Kumar                      2 (0.0%)
+   Jason Wu                          2 (0.0%)
+   Frank Wang                        2 (0.0%)
+   Soren Brinkmann                   2 (0.0%)
+   Marco Schuster                    2 (0.0%)
+   Anand Moon                        1 (0.0%)
+   FUKAUMI Naoki                     1 (0.0%)
+   Vagrant Cascadian                 1 (0.0%)
+   Matthias Schiffer                 1 (0.0%)
+   Guillaume GARDET                  1 (0.0%)
+   Peter Robinson                    1 (0.0%)
+   Punnaiah Choudary Kalluri         1 (0.0%)
+   Ed Swarthout                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          1516 (6.1%)
+   Ricardo Ribalda                   410 (1.7%)
+   David Müller (ELSOFT AG)          315 (1.3%)
+   Roger Meier                       41 (0.2%)
+   Bhuvanchandra DV                  40 (0.2%)
+   Paul Burton                       36 (0.1%)
+   Steve Rae                         20 (0.1%)
+   Mateusz Kulikowski                13 (0.1%)
+   Fabio Estevam                     13 (0.1%)
+   Kevin Smith                       7 (0.0%)
+   Stefan Agner                      7 (0.0%)
+   Paul Kocialkowski                 6 (0.0%)
+   Ladislav Michl                    5 (0.0%)
+   Eddy Petrișor                     5 (0.0%)
+   Alexander Graf                    2 (0.0%)
+   Marco Schuster                    2 (0.0%)
+   Pratiyush Mohan Srivastava        1 (0.0%)
+   Jason Wu                          1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 194)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      41 (21.1%)
+   Tom Warren                        27 (13.9%)
+   Ricardo Ribalda Delgado           23 (11.9%)
+   Hans de Goede                     18 (9.3%)
+   Radha Mohan Chintakuntla          10 (5.2%)
+   Anatolij Gustschin                10 (5.2%)
+   Ye.Li                             10 (5.2%)
+   Andreas Bießmann                  7 (3.6%)
+   Saksham Jain                      5 (2.6%)
+   Tom Rini                          3 (1.5%)
+   Derald D. Woods                   3 (1.5%)
+   Alexey Brodkin                    3 (1.5%)
+   Wenyou Yang                       3 (1.5%)
+   Purna Chandra Mandal              3 (1.5%)
+   Scott Wood                        2 (1.0%)
+   Itai Katz                         2 (1.0%)
+   Emil Lenchak                      2 (1.0%)
+   Jagan Teki                        2 (1.0%)
+   Heiko Schocher                    2 (1.0%)
+   Peng Fan                          2 (1.0%)
+   Minkyu Kang                       1 (0.5%)
+   Sandeep Sheriker Mallikarjun      1 (0.5%)
+   Michal Marek                      1 (0.5%)
+   Enric Balletbo i Serra            1 (0.5%)
+   Ravi Babu                         1 (0.5%)
+   Corey Minyard                     1 (0.5%)
+   Wills Wang                        1 (0.5%)
+   Ruchika Gupta                     1 (0.5%)
+   Mingkai Hu                        1 (0.5%)
+   Jeffy Chen                        1 (0.5%)
+   Paul Thacker                      1 (0.5%)
+   Daniel Schwierzeck                1 (0.5%)
+   Stefan Roese                      1 (0.5%)
+   Stephen Warren                    1 (0.5%)
+   Bin Meng                          1 (0.5%)
+   Simon Glass                       1 (0.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 707)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          181 (25.6%)
+   Tom Rini                          156 (22.1%)
+   Simon Glass                       132 (18.7%)
+   York Sun                          74 (10.5%)
+   Jagan Teki                        36 (5.1%)
+   Andreas Bießmann                  27 (3.8%)
+   Michal Simek                      22 (3.1%)
+   Heiko Schocher                    15 (2.1%)
+   Daniel Schwierzeck                11 (1.6%)
+   Stephen Warren                    7 (1.0%)
+   Thomas Chou                       6 (0.8%)
+   Stefan Roese                      5 (0.7%)
+   Moritz Fischer                    5 (0.7%)
+   Stefano Babic                     5 (0.7%)
+   Alison Wang                       3 (0.4%)
+   Marek Vasut                       3 (0.4%)
+   Peng Fan                          2 (0.3%)
+   Joe Hershberger                   2 (0.3%)
+   Masahiro Yamada                   2 (0.3%)
+   Wenyou Yang                       1 (0.1%)
+   Purna Chandra Mandal              1 (0.1%)
+   Minkyu Kang                       1 (0.1%)
+   Roger Meier                       1 (0.1%)
+   Soren Brinkmann                   1 (0.1%)
+   Samuel Egli                       1 (0.1%)
+   Wolfgang Denk                     1 (0.1%)
+   Edgar E. Iglesias                 1 (0.1%)
+   Eric Nelson                       1 (0.1%)
+   Chin Liang See                    1 (0.1%)
+   Anand Moon                        1 (0.1%)
+   Łukasz Majewski                   1 (0.1%)
+   Mugunthan V N                     1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 153)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       41 (26.8%)
+   Bin Meng                          34 (22.2%)
+   Jagan Teki                        19 (12.4%)
+   Heiko Schocher                    16 (10.5%)
+   Stephen Warren                    13 (8.5%)
+   Mugunthan V N                     10 (6.5%)
+   Tom Rini                          2 (1.3%)
+   Hannes Schmelzer                  2 (1.3%)
+   Andreas Bießmann                  1 (0.7%)
+   Michal Simek                      1 (0.7%)
+   Daniel Schwierzeck                1 (0.7%)
+   Alison Wang                       1 (0.7%)
+   Marek Vasut                       1 (0.7%)
+   Anand Moon                        1 (0.7%)
+   Bhuvanchandra DV                  1 (0.7%)
+   Steve Rae                         1 (0.7%)
+   Mateusz Kulikowski                1 (0.7%)
+   Vagrant Cascadian                 1 (0.7%)
+   Siarhei Siamashka                 1 (0.7%)
+   Matthias Weisser                  1 (0.7%)
+   Sylvain Lemieux                   1 (0.7%)
+   Alexandre Messier                 1 (0.7%)
+   Soeren Moch                       1 (0.7%)
+   Miao Yan                          1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 153)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          41 (26.8%)
+   Jagan Teki                        35 (22.9%)
+   Simon Glass                       29 (19.0%)
+   Wenyou Yang                       15 (9.8%)
+   Miao Yan                          8 (5.2%)
+   Stephen Warren                    5 (3.3%)
+   Masahiro Yamada                   2 (1.3%)
+   Łukasz Majewski                   2 (1.3%)
+   Lubomir Rintel                    2 (1.3%)
+   Gregory CLEMENT                   2 (1.3%)
+   Heiko Schocher                    1 (0.7%)
+   Mateusz Kulikowski                1 (0.7%)
+   Stefan Roese                      1 (0.7%)
+   Roger Meier                       1 (0.7%)
+   Anatolij Gustschin                1 (0.7%)
+   Frank Wang                        1 (0.7%)
+   FUKAUMI Naoki                     1 (0.7%)
+   Lin Huang                         1 (0.7%)
+   Vladimir Zapolskiy                1 (0.7%)
+   Albert ARIBAUD                    1 (0.7%)
+   Jelle van der Waa                 1 (0.7%)
+   Sergey Temerkhanov                1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 11)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          1 (9.1%)
+   Tom Rini                          1 (9.1%)
+   Alexandre Messier                 1 (9.1%)
+   Soeren Moch                       1 (9.1%)
+   Alex Gdalevich                    1 (9.1%)
+   David Glessner                    1 (9.1%)
+   Chris Kohn                        1 (9.1%)
+   Sai Pavan Boddu                   1 (9.1%)
+   Behan Webster                     1 (9.1%)
+   Anton Blanchard                   1 (9.1%)
+   Santhosh Kumar Janardhanam        1 (9.1%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 11)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      3 (27.3%)
+   Tom Rini                          2 (18.2%)
+   Jagan Teki                        1 (9.1%)
+   Simon Glass                       1 (9.1%)
+   Łukasz Majewski                   1 (9.1%)
+   Anatolij Gustschin                1 (9.1%)
+   Vladimir Zapolskiy                1 (9.1%)
+   Sanchayan Maity                   1 (9.1%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         378 (27.5%)
+   Google, Inc.                      309 (22.5%)
+   NXP                               130 (9.5%)
+   Socionext Inc.                    113 (8.2%)
+   AMD                               84 (6.1%)
+   DENX Software Engineering         73 (5.3%)
+   NVidia                            67 (4.9%)
+   Texas Instruments                 54 (3.9%)
+   Konsulko Group                    29 (2.1%)
+   Xilinx                            26 (1.9%)
+   Openedev                          25 (1.8%)
+   Atmel                             24 (1.7%)
+   Toradex                           12 (0.9%)
+   CompuLab                          11 (0.8%)
+   Rockchip                          9 (0.7%)
+   Red Hat                           7 (0.5%)
+   ST Microelectronics               6 (0.4%)
+   MIPS                              4 (0.3%)
+   Free Electrons                    3 (0.2%)
+   Broadcom                          2 (0.1%)
+   Debian.org                        2 (0.1%)
+   Linaro                            2 (0.1%)
+   Samsung                           2 (0.1%)
+   Excito Elektronik                 1 (0.1%)
+   Pengutronix                       1 (0.1%)
+   Siemens                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Google, Inc.                      28854 (31.8%)
+   (Unknown)                         28744 (31.7%)
+   Socionext Inc.                    6517 (7.2%)
+   NXP                               6086 (6.7%)
+   DENX Software Engineering         5940 (6.5%)
+   NVidia                            2764 (3.0%)
+   Konsulko Group                    2418 (2.7%)
+   Texas Instruments                 1674 (1.8%)
+   AMD                               1380 (1.5%)
+   Xilinx                            1280 (1.4%)
+   Atmel                             1247 (1.4%)
+   ST Microelectronics               1095 (1.2%)
+   Excito Elektronik                 1046 (1.2%)
+   Free Electrons                    442 (0.5%)
+   Toradex                           302 (0.3%)
+   CompuLab                          278 (0.3%)
+   Openedev                          261 (0.3%)
+   Rockchip                          107 (0.1%)
+   MIPS                              86 (0.1%)
+   Red Hat                           75 (0.1%)
+   Samsung                           49 (0.1%)
+   Linaro                            26 (0.0%)
+   Broadcom                          25 (0.0%)
+   Siemens                           14 (0.0%)
+   Debian.org                        8 (0.0%)
+   Pengutronix                       5 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 194)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         56 (28.9%)
+   Xilinx                            43 (22.2%)
+   NVidia                            28 (14.4%)
+   NXP                               21 (10.8%)
+   Red Hat                           18 (9.3%)
+   DENX Software Engineering         13 (6.7%)
+   Konsulko Group                    3 (1.5%)
+   Atmel                             3 (1.5%)
+   Openedev                          2 (1.0%)
+   Google, Inc.                      1 (0.5%)
+   Texas Instruments                 1 (0.5%)
+   Rockchip                          1 (0.5%)
+   Samsung                           1 (0.5%)
+   Collabora Ltd.                    1 (0.5%)
+   MontaVista                        1 (0.5%)
+   Novell                            1 (0.5%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 129)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         65 (50.4%)
+   NXP                               25 (19.4%)
+   Xilinx                            4 (3.1%)
+   DENX Software Engineering         4 (3.1%)
+   Rockchip                          4 (3.1%)
+   Texas Instruments                 3 (2.3%)
+   Red Hat                           2 (1.6%)
+   Atmel                             2 (1.6%)
+   Toradex                           2 (1.6%)
+   Debian.org                        2 (1.6%)
+   NVidia                            1 (0.8%)
+   Konsulko Group                    1 (0.8%)
+   Openedev                          1 (0.8%)
+   Google, Inc.                      1 (0.8%)
+   Samsung                           1 (0.8%)
+   Socionext Inc.                    1 (0.8%)
+   AMD                               1 (0.8%)
+   ST Microelectronics               1 (0.8%)
+   Excito Elektronik                 1 (0.8%)
+   Free Electrons                    1 (0.8%)
+   CompuLab                          1 (0.8%)
+   MIPS                              1 (0.8%)
+   Linaro                            1 (0.8%)
+   Broadcom                          1 (0.8%)
+   Siemens                           1 (0.8%)
+   Pengutronix                       1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2016.05.rst b/doc/develop/statistics/u-boot-stats-v2016.05.rst
new file mode 100644
index 00000000000..792b3328a02
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2016.05.rst
@@ -0,0 +1,639 @@
+:orphan:
+
+Release Statistics for U-Boot v2016.05
+======================================
+
+* Processed 1043 changesets from 133 developers
+ 
+* 23 employers found
+
+* A total of 77779 lines added, 21905 removed (delta 55874)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       163 (15.6%)
+   Masahiro Yamada                   63 (6.0%)
+   Alexander Graf                    58 (5.6%)
+   Michal Simek                      57 (5.5%)
+   Stefan Roese                      47 (4.5%)
+   Tom Rini                          41 (3.9%)
+   Hans de Goede                     40 (3.8%)
+   Paul Kocialkowski                 38 (3.6%)
+   Marek Vasut                       31 (3.0%)
+   Stephen Warren                    28 (2.7%)
+   Lokesh Vutla                      26 (2.5%)
+   Nishanth Menon                    25 (2.4%)
+   Mateusz Kulikowski                24 (2.3%)
+   Bin Meng                          22 (2.1%)
+   Chen-Yu Tsai                      20 (1.9%)
+   Peng Fan                          18 (1.7%)
+   Fabio Estevam                     17 (1.6%)
+   Siva Durga Prasad Paladugu        15 (1.4%)
+   Saksham Jain                      14 (1.3%)
+   Vasily Khoruzhick                 11 (1.1%)
+   Robert P. J. Day                  10 (1.0%)
+   Semen Protsenko                   10 (1.0%)
+   Mugunthan V N                     9 (0.9%)
+   Roger Quadros                     8 (0.8%)
+   Prabhakar Kushwaha                7 (0.7%)
+   Peter Griffin                     7 (0.7%)
+   Akshay Bhat                       7 (0.7%)
+   Eric Nelson                       7 (0.7%)
+   Jagan Teki                        6 (0.6%)
+   Stuart Yoder                      6 (0.6%)
+   Jacob Chen                        6 (0.6%)
+   Vagrant Cascadian                 5 (0.5%)
+   Steve Rae                         5 (0.5%)
+   Purna Chandra Mandal              5 (0.5%)
+   Steve Kipisz                      5 (0.5%)
+   York Sun                          5 (0.5%)
+   Qianyu Gong                       5 (0.5%)
+   Alison Wang                       5 (0.5%)
+   Andreas Fenkart                   5 (0.5%)
+   Peter Korsgaard                   5 (0.5%)
+   Heiko Schocher                    4 (0.4%)
+   Moritz Fischer                    4 (0.4%)
+   Sriram Dash                       4 (0.4%)
+   Wenbin Song                       4 (0.4%)
+   Vitaly Andrianov                  4 (0.4%)
+   Stefan Agner                      3 (0.3%)
+   Andreas Bießmann                  3 (0.3%)
+   Martin Pietryka                   3 (0.3%)
+   Lukasz Majewski                   3 (0.3%)
+   Alexey Brodkin                    3 (0.3%)
+   Andreas Faerber                   3 (0.3%)
+   Vikas Manocha                     3 (0.3%)
+   Codrin Ciubotariu                 3 (0.3%)
+   Andreas Dannenberg                3 (0.3%)
+   Michael Haas                      3 (0.3%)
+   Aneesh Bansal                     3 (0.3%)
+   Alexander Merkle                  3 (0.3%)
+   Dirk Eibach                       3 (0.3%)
+   Dinh Nguyen                       2 (0.2%)
+   Anatolij Gustschin                2 (0.2%)
+   Ash Charles                       2 (0.2%)
+   Mario Six                         2 (0.2%)
+   John Tobias                       2 (0.2%)
+   Punnaiah Choudary Kalluri         2 (0.2%)
+   Hyun Kwon                         2 (0.2%)
+   Soren Brinkmann                   2 (0.2%)
+   P L Sai Krishna                   2 (0.2%)
+   Edgar E. Iglesias                 2 (0.2%)
+   Christian Kohn                    2 (0.2%)
+   Kevin Smith                       2 (0.2%)
+   Guy Thouret                       2 (0.2%)
+   Shaohui Xie                       2 (0.2%)
+   Siarhei Siamashka                 2 (0.2%)
+   Mingkai Hu                        2 (0.2%)
+   Ravi Babu                         2 (0.2%)
+   vishnupatekar                     2 (0.2%)
+   Shengzhou Liu                     2 (0.2%)
+   Przemyslaw Marczak                2 (0.2%)
+   Andrew F. Davis                   2 (0.2%)
+   Carlos Hernandez                  2 (0.2%)
+   Suman Anna                        2 (0.2%)
+   Andre Przywara                    1 (0.1%)
+   Russ Dill                         1 (0.1%)
+   Lev Iserovich                     1 (0.1%)
+   Enric Balletbo i Serra            1 (0.1%)
+   Matwey V. Kornilov                1 (0.1%)
+   Ronald Zachariah                  1 (0.1%)
+   Yoshinori Sato                    1 (0.1%)
+   Boris Brezillon                   1 (0.1%)
+   Justin Waters                     1 (0.1%)
+   Tang Yuantian                     1 (0.1%)
+   Angelo Dureghello                 1 (0.1%)
+   Schuyler Patton                   1 (0.1%)
+   Daniel Allred                     1 (0.1%)
+   Shawn Guo                         1 (0.1%)
+   Anurag Kumar Vulisha              1 (0.1%)
+   Bharat Kumar Gogada               1 (0.1%)
+   Naga Sureshkumar Relli            1 (0.1%)
+   VNSL Durga                        1 (0.1%)
+   Ranjit Waghmode                   1 (0.1%)
+   Alistair Francis                  1 (0.1%)
+   Rouven Behr                       1 (0.1%)
+   Vogt, Christof                    1 (0.1%)
+   Jeffy Chen                        1 (0.1%)
+   Denis Bakhvalov                   1 (0.1%)
+   Vincent Siles                     1 (0.1%)
+   Ed Swarthout                      1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Joe Hershberger                   1 (0.1%)
+   Karsten Merker                    1 (0.1%)
+   Scott Wood                        1 (0.1%)
+   Dan Murphy                        1 (0.1%)
+   Ahmed Samir Khalil                1 (0.1%)
+   Eric Anholt                       1 (0.1%)
+   Rob Herring                       1 (0.1%)
+   Graham Moore                      1 (0.1%)
+   Rai Harninder                     1 (0.1%)
+   Anton Persson                     1 (0.1%)
+   Leonid Iziumtsev                  1 (0.1%)
+   Ye Li                             1 (0.1%)
+   Alex Kaplan                       1 (0.1%)
+   Lawrence Yu                       1 (0.1%)
+   Marcus Cooper                     1 (0.1%)
+   Yangbo Lu                         1 (0.1%)
+   Pratiyush Mohan Srivastava        1 (0.1%)
+   Reinhard Pfau                     1 (0.1%)
+   Chin Liang See                    1 (0.1%)
+   Ted Chen                          1 (0.1%)
+   Yan Liu                           1 (0.1%)
+   Murali Karicheri                  1 (0.1%)
+   Adam Ford                         1 (0.1%)
+   David Lechner                     1 (0.1%)
+   Stuart Longland                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       18458 (21.9%)
+   Tom Rini                          11437 (13.5%)
+   Stefan Roese                      8292 (9.8%)
+   Hans de Goede                     7278 (8.6%)
+   Alexander Graf                    5292 (6.3%)
+   Michal Simek                      3901 (4.6%)
+   Masahiro Yamada                   3395 (4.0%)
+   Mateusz Kulikowski                3238 (3.8%)
+   Robert P. J. Day                  1867 (2.2%)
+   Bin Meng                          1539 (1.8%)
+   Akshay Bhat                       1398 (1.7%)
+   Lokesh Vutla                      1383 (1.6%)
+   Nishanth Menon                    1350 (1.6%)
+   Paul Kocialkowski                 1014 (1.2%)
+   Semen Protsenko                   916 (1.1%)
+   Siarhei Siamashka                 911 (1.1%)
+   Fabio Estevam                     852 (1.0%)
+   Stephen Warren                    832 (1.0%)
+   Siva Durga Prasad Paladugu        776 (0.9%)
+   Jagan Teki                        682 (0.8%)
+   Vasily Khoruzhick                 598 (0.7%)
+   Peng Fan                          576 (0.7%)
+   Vitaly Andrianov                  552 (0.7%)
+   Peter Griffin                     532 (0.6%)
+   David Lechner                     518 (0.6%)
+   Jacob Chen                        514 (0.6%)
+   Marek Vasut                       504 (0.6%)
+   Eric Nelson                       442 (0.5%)
+   Steve Kipisz                      411 (0.5%)
+   Saksham Jain                      376 (0.4%)
+   Stuart Yoder                      376 (0.4%)
+   Moritz Fischer                    371 (0.4%)
+   Purna Chandra Mandal              351 (0.4%)
+   York Sun                          311 (0.4%)
+   Sriram Dash                       296 (0.4%)
+   Chen-Yu Tsai                      282 (0.3%)
+   Soren Brinkmann                   211 (0.2%)
+   Prabhakar Kushwaha                187 (0.2%)
+   Heiko Schocher                    157 (0.2%)
+   Roger Quadros                     145 (0.2%)
+   Stuart Longland                   131 (0.2%)
+   Shengzhou Liu                     122 (0.1%)
+   Aneesh Bansal                     108 (0.1%)
+   Dinh Nguyen                       106 (0.1%)
+   Vikas Manocha                     73 (0.1%)
+   Dirk Eibach                       66 (0.1%)
+   Ravi Babu                         64 (0.1%)
+   Vagrant Cascadian                 63 (0.1%)
+   Andreas Bießmann                  55 (0.1%)
+   Andre Przywara                    46 (0.1%)
+   Rai Harninder                     43 (0.1%)
+   Lukasz Majewski                   42 (0.0%)
+   Guy Thouret                       41 (0.0%)
+   Mario Six                         39 (0.0%)
+   Punnaiah Choudary Kalluri         37 (0.0%)
+   Mugunthan V N                     36 (0.0%)
+   Peter Korsgaard                   35 (0.0%)
+   Michael Haas                      35 (0.0%)
+   Andreas Fenkart                   33 (0.0%)
+   Alexey Brodkin                    33 (0.0%)
+   Przemyslaw Marczak                33 (0.0%)
+   Joe Hershberger                   33 (0.0%)
+   Alison Wang                       32 (0.0%)
+   John Tobias                       31 (0.0%)
+   Adam Ford                         31 (0.0%)
+   Christian Kohn                    30 (0.0%)
+   Qianyu Gong                       26 (0.0%)
+   Wenbin Song                       24 (0.0%)
+   Martin Pietryka                   24 (0.0%)
+   Angelo Dureghello                 24 (0.0%)
+   Steve Rae                         22 (0.0%)
+   Andreas Faerber                   22 (0.0%)
+   Marcus Cooper                     21 (0.0%)
+   Chris Packham                     19 (0.0%)
+   Stefan Agner                      18 (0.0%)
+   Murali Karicheri                  17 (0.0%)
+   Shaohui Xie                       15 (0.0%)
+   Lev Iserovich                     14 (0.0%)
+   Edgar E. Iglesias                 13 (0.0%)
+   Andrew F. Davis                   12 (0.0%)
+   Eric Anholt                       12 (0.0%)
+   Graham Moore                      12 (0.0%)
+   Codrin Ciubotariu                 10 (0.0%)
+   Kevin Smith                       10 (0.0%)
+   Justin Waters                     10 (0.0%)
+   Bharat Kumar Gogada               10 (0.0%)
+   Rob Herring                       10 (0.0%)
+   Daniel Allred                     9 (0.0%)
+   Anurag Kumar Vulisha              9 (0.0%)
+   VNSL Durga                        8 (0.0%)
+   Ed Swarthout                      8 (0.0%)
+   Carlos Hernandez                  7 (0.0%)
+   Suman Anna                        7 (0.0%)
+   Enric Balletbo i Serra            7 (0.0%)
+   Naga Sureshkumar Relli            7 (0.0%)
+   Denis Bakhvalov                   7 (0.0%)
+   Dan Murphy                        7 (0.0%)
+   Leonid Iziumtsev                  7 (0.0%)
+   Pratiyush Mohan Srivastava        7 (0.0%)
+   Andreas Dannenberg                6 (0.0%)
+   Matwey V. Kornilov                6 (0.0%)
+   Shawn Guo                         6 (0.0%)
+   Reinhard Pfau                     6 (0.0%)
+   Chin Liang See                    6 (0.0%)
+   Alexander Merkle                  5 (0.0%)
+   Ash Charles                       5 (0.0%)
+   Hyun Kwon                         5 (0.0%)
+   Anatolij Gustschin                4 (0.0%)
+   Ahmed Samir Khalil                4 (0.0%)
+   Ye Li                             4 (0.0%)
+   Lawrence Yu                       4 (0.0%)
+   Yangbo Lu                         4 (0.0%)
+   Ted Chen                          4 (0.0%)
+   Yan Liu                           4 (0.0%)
+   P L Sai Krishna                   3 (0.0%)
+   Mingkai Hu                        3 (0.0%)
+   vishnupatekar                     3 (0.0%)
+   Vincent Siles                     3 (0.0%)
+   Schuyler Patton                   2 (0.0%)
+   Alistair Francis                  2 (0.0%)
+   Jeffy Chen                        2 (0.0%)
+   Karsten Merker                    2 (0.0%)
+   Anton Persson                     2 (0.0%)
+   Russ Dill                         1 (0.0%)
+   Ronald Zachariah                  1 (0.0%)
+   Yoshinori Sato                    1 (0.0%)
+   Boris Brezillon                   1 (0.0%)
+   Tang Yuantian                     1 (0.0%)
+   Ranjit Waghmode                   1 (0.0%)
+   Rouven Behr                       1 (0.0%)
+   Vogt, Christof                    1 (0.0%)
+   Scott Wood                        1 (0.0%)
+   Alex Kaplan                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Robert P. J. Day                  1663 (7.6%)
+   Bin Meng                          676 (3.1%)
+   York Sun                          125 (0.6%)
+   Heiko Schocher                    50 (0.2%)
+   Marek Vasut                       26 (0.1%)
+   Alexey Brodkin                    21 (0.1%)
+   Stuart Yoder                      18 (0.1%)
+   Andreas Faerber                   14 (0.1%)
+   Andreas Bießmann                  11 (0.1%)
+   Alison Wang                       5 (0.0%)
+   Stefan Agner                      3 (0.0%)
+   Matwey V. Kornilov                3 (0.0%)
+   vishnupatekar                     2 (0.0%)
+   Andreas Fenkart                   1 (0.0%)
+   Reinhard Pfau                     1 (0.0%)
+   Boris Brezillon                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 178)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      39 (21.9%)
+   Hans de Goede                     37 (20.8%)
+   Aneesh Bansal                     12 (6.7%)
+   Nishanth Menon                    12 (6.7%)
+   Lokesh Vutla                      11 (6.2%)
+   Tom Rini                          9 (5.1%)
+   Stefan Roese                      9 (5.1%)
+   Tom Warren                        4 (2.2%)
+   Sandor Yu                         3 (1.7%)
+   Christophe Ricard                 3 (1.7%)
+   Steve Kipisz                      3 (1.7%)
+   Bin Meng                          2 (1.1%)
+   Boris Brezillon                   2 (1.1%)
+   Pratiyush Mohan Srivastava        2 (1.1%)
+   Minkyu Kang                       2 (1.1%)
+   Rajesh Bhagat                     2 (1.1%)
+   Ramneek Mehresh                   2 (1.1%)
+   Maxime Ripard                     2 (1.1%)
+   Ruchika Gupta                     2 (1.1%)
+   Qianyu Gong                       2 (1.1%)
+   Alexander Graf                    2 (1.1%)
+   Schuyler Patton                   1 (0.6%)
+   Richard Hu                        1 (0.6%)
+   Ravi Kiran Gummaluri              1 (0.6%)
+   Olof Johansson                    1 (0.6%)
+   Cristian Birsan                   1 (0.6%)
+   Jason Wu                          1 (0.6%)
+   Kedareswara rao Appana            1 (0.6%)
+   Brian Norris                      1 (0.6%)
+   Kishon Vijay Abraham I            1 (0.6%)
+   Vignesh R                         1 (0.6%)
+   Dirk Eibach                       1 (0.6%)
+   Roger Quadros                     1 (0.6%)
+   Peng Fan                          1 (0.6%)
+   Akshay Bhat                       1 (0.6%)
+   Masahiro Yamada                   1 (0.6%)
+   Simon Glass                       1 (0.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 448)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          165 (36.8%)
+   Bin Meng                          81 (18.1%)
+   Simon Glass                       60 (13.4%)
+   York Sun                          59 (13.2%)
+   Hans de Goede                     17 (3.8%)
+   Lokesh Vutla                      8 (1.8%)
+   Joe Hershberger                   7 (1.6%)
+   Fabio Estevam                     5 (1.1%)
+   Peng Fan                          4 (0.9%)
+   Masahiro Yamada                   4 (0.9%)
+   Marek Vasut                       4 (0.9%)
+   Andreas Faerber                   4 (0.9%)
+   Stephen Warren                    4 (0.9%)
+   Heiko Schocher                    3 (0.7%)
+   Nathan Rossi                      3 (0.7%)
+   Hannes Schmelzer                  2 (0.4%)
+   Kevin Smith                       2 (0.4%)
+   Mugunthan V N                     2 (0.4%)
+   Jagan Teki                        2 (0.4%)
+   Stefan Roese                      1 (0.2%)
+   Boris Brezillon                   1 (0.2%)
+   Alexander Graf                    1 (0.2%)
+   Alison Wang                       1 (0.2%)
+   Thierry Reding                    1 (0.2%)
+   Anand Moon                        1 (0.2%)
+   Mark Tomlinson                    1 (0.2%)
+   Stefano Babic                     1 (0.2%)
+   Sekhar Nori                       1 (0.2%)
+   Prabhakar Kushwaha                1 (0.2%)
+   Soren Brinkmann                   1 (0.2%)
+   Peter Griffin                     1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 93)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stephen Warren                    37 (39.8%)
+   Simon Glass                       26 (28.0%)
+   Steve Rae                         6 (6.5%)
+   Andreas Faerber                   4 (4.3%)
+   Hannes Schmelzer                  2 (2.2%)
+   Karsten Merker                    2 (2.2%)
+   Lukasz Majewski                   2 (2.2%)
+   Tom Rini                          1 (1.1%)
+   Bin Meng                          1 (1.1%)
+   York Sun                          1 (1.1%)
+   Lokesh Vutla                      1 (1.1%)
+   Kevin Smith                       1 (1.1%)
+   Mugunthan V N                     1 (1.1%)
+   Anand Moon                        1 (1.1%)
+   Nishanth Menon                    1 (1.1%)
+   Christophe Ricard                 1 (1.1%)
+   Dennis Gilmore                    1 (1.1%)
+   Vishal Mahaveer                   1 (1.1%)
+   John Tobias                       1 (1.1%)
+   Michael Haas                      1 (1.1%)
+   Eric Nelson                       1 (1.1%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 93)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       31 (33.3%)
+   Alexander Graf                    16 (17.2%)
+   Mateusz Kulikowski                15 (16.1%)
+   Roger Quadros                     7 (7.5%)
+   Stefan Roese                      5 (5.4%)
+   Hans de Goede                     3 (3.2%)
+   John Tobias                       2 (2.2%)
+   Przemyslaw Marczak                2 (2.2%)
+   Martin Pietryka                   2 (2.2%)
+   Stephen Warren                    1 (1.1%)
+   Tom Rini                          1 (1.1%)
+   Nishanth Menon                    1 (1.1%)
+   Michael Haas                      1 (1.1%)
+   Peng Fan                          1 (1.1%)
+   Jagan Teki                        1 (1.1%)
+   Andreas Bießmann                  1 (1.1%)
+   Ted Chen                          1 (1.1%)
+   Eric Anholt                       1 (1.1%)
+   Ravi Babu                         1 (1.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 36)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          4 (11.1%)
+   Jose Rivera                       4 (11.1%)
+   Nishanth Menon                    3 (8.3%)
+   John Linn                         3 (8.3%)
+   Stephen Warren                    2 (5.6%)
+   Masahiro Yamada                   2 (5.6%)
+   Richard Woodruff                  2 (5.6%)
+   Denis Bakhvalov                   2 (5.6%)
+   Hans de Goede                     1 (2.8%)
+   Eric Anholt                       1 (2.8%)
+   Steve Rae                         1 (2.8%)
+   Andreas Faerber                   1 (2.8%)
+   Lukasz Majewski                   1 (2.8%)
+   York Sun                          1 (2.8%)
+   Dennis Gilmore                    1 (2.8%)
+   Marek Vasut                       1 (2.8%)
+   Nathan Rossi                      1 (2.8%)
+   Stefano Babic                     1 (2.8%)
+   Bin Liu                           1 (2.8%)
+   Yao Yuan                          1 (2.8%)
+   Mark Rutland                      1 (2.8%)
+   Yan Liu                           1 (2.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 36)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Nishanth Menon                    6 (16.7%)
+   Alexander Graf                    5 (13.9%)
+   Prabhakar Kushwaha                4 (11.1%)
+   Michal Simek                      4 (11.1%)
+   Lokesh Vutla                      3 (8.3%)
+   Stephen Warren                    2 (5.6%)
+   Simon Glass                       2 (5.6%)
+   Roger Quadros                     2 (5.6%)
+   Tom Rini                          1 (2.8%)
+   Denis Bakhvalov                   1 (2.8%)
+   Hans de Goede                     1 (2.8%)
+   Marek Vasut                       1 (2.8%)
+   Jagan Teki                        1 (2.8%)
+   Pratiyush Mohan Srivastava        1 (2.8%)
+   vishnupatekar                     1 (2.8%)
+   Andreas Fenkart                   1 (2.8%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         314 (30.1%)
+   Google, Inc.                      163 (15.6%)
+   Texas Instruments                 94 (9.0%)
+   NXP                               86 (8.2%)
+   DENX Software Engineering         84 (8.1%)
+   Socionext Inc.                    63 (6.0%)
+   AMD                               53 (5.1%)
+   Konsulko Group                    41 (3.9%)
+   Red Hat                           40 (3.8%)
+   Xilinx                            37 (3.5%)
+   Linaro                            18 (1.7%)
+   NVidia                            12 (1.2%)
+   Debian.org                        6 (0.6%)
+   Guntermann & Drunck               6 (0.6%)
+   Openedev                          6 (0.6%)
+   Broadcom                          5 (0.5%)
+   Samsung                           5 (0.5%)
+   Novell                            3 (0.3%)
+   ST Microelectronics               3 (0.3%)
+   ARM                               1 (0.1%)
+   Cisco                             1 (0.1%)
+   Collabora Ltd.                    1 (0.1%)
+   Rockchip                          1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         20431 (24.2%)
+   Google, Inc.                      18458 (21.9%)
+   Konsulko Group                    11437 (13.5%)
+   DENX Software Engineering         8957 (10.6%)
+   Red Hat                           7278 (8.6%)
+   Texas Instruments                 4013 (4.8%)
+   Socionext Inc.                    3395 (4.0%)
+   NXP                               2811 (3.3%)
+   AMD                               2525 (3.0%)
+   Xilinx                            2488 (2.9%)
+   Linaro                            1458 (1.7%)
+   Openedev                          682 (0.8%)
+   Guntermann & Drunck               111 (0.1%)
+   NVidia                            102 (0.1%)
+   Samsung                           75 (0.1%)
+   ST Microelectronics               73 (0.1%)
+   Debian.org                        65 (0.1%)
+   ARM                               46 (0.1%)
+   Broadcom                          22 (0.0%)
+   Novell                            22 (0.0%)
+   Collabora Ltd.                    7 (0.0%)
+   Rockchip                          2 (0.0%)
+   Cisco                             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 178)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Xilinx                            40 (22.5%)
+   Red Hat                           37 (20.8%)
+   Texas Instruments                 30 (16.9%)
+   NXP                               25 (14.0%)
+   (Unknown)                         9 (5.1%)
+   Konsulko Group                    9 (5.1%)
+   DENX Software Engineering         9 (5.1%)
+   NVidia                            4 (2.2%)
+   Free Electrons                    4 (2.2%)
+   ST Microelectronics               3 (1.7%)
+   Samsung                           2 (1.1%)
+   Novell                            2 (1.1%)
+   Google, Inc.                      1 (0.6%)
+   Socionext Inc.                    1 (0.6%)
+   Guntermann & Drunck               1 (0.6%)
+   IBM                               1 (0.6%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 136)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         56 (41.2%)
+   NXP                               21 (15.4%)
+   Texas Instruments                 17 (12.5%)
+   Xilinx                            14 (10.3%)
+   DENX Software Engineering         4 (2.9%)
+   Guntermann & Drunck               3 (2.2%)
+   Linaro                            3 (2.2%)
+   Samsung                           2 (1.5%)
+   Debian.org                        2 (1.5%)
+   Red Hat                           1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   NVidia                            1 (0.7%)
+   ST Microelectronics               1 (0.7%)
+   Novell                            1 (0.7%)
+   Google, Inc.                      1 (0.7%)
+   Socionext Inc.                    1 (0.7%)
+   AMD                               1 (0.7%)
+   Openedev                          1 (0.7%)
+   ARM                               1 (0.7%)
+   Broadcom                          1 (0.7%)
+   Collabora Ltd.                    1 (0.7%)
+   Rockchip                          1 (0.7%)
+   Cisco                             1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2016.07.rst b/doc/develop/statistics/u-boot-stats-v2016.07.rst
new file mode 100644
index 00000000000..d62729a678c
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2016.07.rst
@@ -0,0 +1,615 @@
+:orphan:
+
+Release Statistics for U-Boot v2016.07
+======================================
+
+* Processed 1078 changesets from 133 developers
+
+* 27 employers found
+
+* A total of 87409 lines added, 35501 removed (delta 51908)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       143 (13.3%)
+   Masahiro Yamada                   84 (7.8%)
+   Bin Meng                          78 (7.2%)
+   Marek Vasut                       57 (5.3%)
+   Michal Simek                      49 (4.5%)
+   Lokesh Vutla                      40 (3.7%)
+   Peng Fan                          35 (3.2%)
+   Stephen Warren                    30 (2.8%)
+   Heiko Schocher                    26 (2.4%)
+   Tim Harvey                        22 (2.0%)
+   Alexander Graf                    21 (1.9%)
+   Chen-Yu Tsai                      21 (1.9%)
+   Paul Burton                       21 (1.9%)
+   Wills Wang                        21 (1.9%)
+   mario.six@gdsys.cc                16 (1.5%)
+   Yuan Yao                          15 (1.4%)
+   Mugunthan V N                     14 (1.3%)
+   Hans de Goede                     13 (1.2%)
+   Steve Rae                         13 (1.2%)
+   Miao Yan                          13 (1.2%)
+   Prabhakar Kushwaha                12 (1.1%)
+   Nikita Kiryanov                   12 (1.1%)
+   Tom Rini                          11 (1.0%)
+   Gong Qianyu                       10 (0.9%)
+   Shengzhou Liu                     9 (0.8%)
+   Daniel Allred                     9 (0.8%)
+   York Sun                          8 (0.7%)
+   Alexey Brodkin                    8 (0.7%)
+   Stefan Roese                      8 (0.7%)
+   Boris Brezillon                   8 (0.7%)
+   Robert P. J. Day                  8 (0.7%)
+   Srinivas, Madan                   8 (0.7%)
+   Thomas Abraham                    8 (0.7%)
+   Andre Przywara                    7 (0.6%)
+   Sjoerd Simons                     7 (0.6%)
+   Andre Renaud                      7 (0.6%)
+   Wenyou Yang                       7 (0.6%)
+   Dan Murphy                        7 (0.6%)
+   Eric Nelson                       7 (0.6%)
+   Scott Wood                        6 (0.6%)
+   Andrew Shadura                    6 (0.6%)
+   Andreas Fenkart                   6 (0.6%)
+   Daniel Schwierzeck                5 (0.5%)
+   Sriram Dash                       5 (0.5%)
+   Roger Quadros                     5 (0.5%)
+   Joe Hershberger                   4 (0.4%)
+   Andreas Dannenberg                4 (0.4%)
+   Keerthy                           4 (0.4%)
+   Dirk Eibach                       4 (0.4%)
+   Suman Anna                        4 (0.4%)
+   Beniamino Galvani                 4 (0.4%)
+   Stanislav Galabov                 4 (0.4%)
+   Alex Porosanu                     4 (0.4%)
+   Abhimanyu Saini                   3 (0.3%)
+   Fabio Estevam                     3 (0.3%)
+   Max Krummenacher                  3 (0.3%)
+   Angelo Dureghello                 3 (0.3%)
+   Marco Franchi                     3 (0.3%)
+   Siarhei Siamashka                 3 (0.3%)
+   Purna Chandra Mandal              3 (0.3%)
+   Chris Packham                     3 (0.3%)
+   Siva Durga Prasad Paladugu        3 (0.3%)
+   Vincent Siles                     3 (0.3%)
+   Stefan Agner                      3 (0.3%)
+   Stefano Babic                     2 (0.2%)
+   Mingkai Hu                        2 (0.2%)
+   Mateusz Kulikowski                2 (0.2%)
+   Ye Li                             2 (0.2%)
+   Hannes Schmelzer                  2 (0.2%)
+   Vagrant Cascadian                 2 (0.2%)
+   Carlo Caione                      2 (0.2%)
+   Michael Trimarchi                 2 (0.2%)
+   Teddy Reed                        2 (0.2%)
+   Sergey Kubushyn                   2 (0.2%)
+   Guillaume GARDET                  2 (0.2%)
+   Petr Kulhavy                      2 (0.2%)
+   Shaohui Xie                       2 (0.2%)
+   Sebastien Bourdelin               2 (0.2%)
+   Ying Zhang                        2 (0.2%)
+   Aneesh Bansal                     2 (0.2%)
+   Kevin Smith                       2 (0.2%)
+   Alison Wang                       2 (0.2%)
+   Ziyuan Xu                         1 (0.1%)
+   Oleksandr Tymoshenko              1 (0.1%)
+   Ralf Hubert                       1 (0.1%)
+   Bernhard Nortmann                 1 (0.1%)
+   Quentin Schulz                    1 (0.1%)
+   Olliver Schinagl                  1 (0.1%)
+   Jaehoon Chung                     1 (0.1%)
+   Praneeth Bajjuri                  1 (0.1%)
+   Ravi Babu                         1 (0.1%)
+   Pratiyush Mohan Srivastava        1 (0.1%)
+   Andreas Bießmann                  1 (0.1%)
+   Rajesh Bhagat                     1 (0.1%)
+   Chris Brand                       1 (0.1%)
+   Andrej Rosano                     1 (0.1%)
+   Joris Lijssens                    1 (0.1%)
+   Daniel Gorsulowski                1 (0.1%)
+   Hou Zhiqiang                      1 (0.1%)
+   Nathan Rossi                      1 (0.1%)
+   Alexey Firago                     1 (0.1%)
+   Stefan Wahren                     1 (0.1%)
+   Fabian Mewes                      1 (0.1%)
+   Thomas Lange                      1 (0.1%)
+   Eran Matityahu                    1 (0.1%)
+   Schuyler Patton                   1 (0.1%)
+   Eddy Petrișor                     1 (0.1%)
+   Stoica Cosmin-Stefan              1 (0.1%)
+   Marcin Niestroj                   1 (0.1%)
+   Andrew F. Davis                   1 (0.1%)
+   George McCollister                1 (0.1%)
+   Yunhui Cui                        1 (0.1%)
+   Samuel Egli                       1 (0.1%)
+   Pavel Machek                      1 (0.1%)
+   Michael Heimpold                  1 (0.1%)
+   Kimmo Surakka                     1 (0.1%)
+   Ladislav Michl                    1 (0.1%)
+   Peter Howard                      1 (0.1%)
+   Ed Swarthout                      1 (0.1%)
+   Sumit Garg                        1 (0.1%)
+   Bogdan Purcareata                 1 (0.1%)
+   Yangbo Lu                         1 (0.1%)
+   Sylvain Lesne                     1 (0.1%)
+   Peter Robinson                    1 (0.1%)
+   Lukasz Majewski                   1 (0.1%)
+   Kunihiko Hayashi                  1 (0.1%)
+   Patrick Delaunay                  1 (0.1%)
+   Stefan Mavrodiev                  1 (0.1%)
+   Damien Riegel                     1 (0.1%)
+   Martin Hejnfelt                   1 (0.1%)
+   Tim Chick                         1 (0.1%)
+   Po Liu                            1 (0.1%)
+   Adrian Alonso                     1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          17039 (16.1%)
+   Simon Glass                       13892 (13.1%)
+   Heiko Schocher                    8276 (7.8%)
+   Marek Vasut                       7755 (7.3%)
+   Stephen Warren                    5584 (5.3%)
+   Wills Wang                        4848 (4.6%)
+   Lokesh Vutla                      3682 (3.5%)
+   Andre Renaud                      3544 (3.3%)
+   Steve Rae                         2874 (2.7%)
+   Eddy Petrișor                     2792 (2.6%)
+   Robert P. J. Day                  2791 (2.6%)
+   Scott Wood                        2791 (2.6%)
+   Masahiro Yamada                   2626 (2.5%)
+   Prabhakar Kushwaha                2453 (2.3%)
+   Michal Simek                      1728 (1.6%)
+   Kevin Smith                       1677 (1.6%)
+   Hans de Goede                     1668 (1.6%)
+   Pavel Machek                      1527 (1.4%)
+   Thomas Abraham                    1334 (1.3%)
+   Nikita Kiryanov                   1166 (1.1%)
+   Chen-Yu Tsai                      1033 (1.0%)
+   Peng Fan                          1015 (1.0%)
+   Alexander Graf                    967 (0.9%)
+   Beniamino Galvani                 958 (0.9%)
+   Purna Chandra Mandal              913 (0.9%)
+   mario.six@gdsys.cc                784 (0.7%)
+   Tom Rini                          650 (0.6%)
+   Daniel Allred                     593 (0.6%)
+   Miao Yan                          585 (0.6%)
+   Wenyou Yang                       564 (0.5%)
+   Paul Burton                       522 (0.5%)
+   Andre Przywara                    455 (0.4%)
+   Boris Brezillon                   428 (0.4%)
+   Schuyler Patton                   396 (0.4%)
+   Quentin Schulz                    393 (0.4%)
+   Yuan Yao                          384 (0.4%)
+   Tim Harvey                        337 (0.3%)
+   Angelo Dureghello                 329 (0.3%)
+   Sriram Dash                       321 (0.3%)
+   Shengzhou Liu                     316 (0.3%)
+   Mugunthan V N                     264 (0.2%)
+   Alex Porosanu                     229 (0.2%)
+   Stoica Cosmin-Stefan              224 (0.2%)
+   Dan Murphy                        192 (0.2%)
+   Keerthy                           192 (0.2%)
+   Sjoerd Simons                     183 (0.2%)
+   Srinivas, Madan                   164 (0.2%)
+   Dirk Eibach                       164 (0.2%)
+   Daniel Schwierzeck                149 (0.1%)
+   Stefan Roese                      121 (0.1%)
+   Andreas Fenkart                   121 (0.1%)
+   Abhimanyu Saini                   116 (0.1%)
+   Roger Quadros                     115 (0.1%)
+   Alexey Brodkin                    107 (0.1%)
+   Marco Franchi                     101 (0.1%)
+   Eric Nelson                       91 (0.1%)
+   Suman Anna                        77 (0.1%)
+   Stanislav Galabov                 76 (0.1%)
+   Joe Hershberger                   71 (0.1%)
+   Gong Qianyu                       63 (0.1%)
+   Teddy Reed                        62 (0.1%)
+   Eran Matityahu                    57 (0.1%)
+   Chris Packham                     52 (0.0%)
+   Andrew Shadura                    51 (0.0%)
+   Carlo Caione                      49 (0.0%)
+   Michael Trimarchi                 47 (0.0%)
+   Max Krummenacher                  45 (0.0%)
+   Alison Wang                       44 (0.0%)
+   Hannes Schmelzer                  43 (0.0%)
+   Vagrant Cascadian                 43 (0.0%)
+   Pratiyush Mohan Srivastava        39 (0.0%)
+   Mingkai Hu                        36 (0.0%)
+   Aneesh Bansal                     31 (0.0%)
+   Alexey Firago                     26 (0.0%)
+   York Sun                          22 (0.0%)
+   Andreas Dannenberg                22 (0.0%)
+   Siarhei Siamashka                 21 (0.0%)
+   Marcin Niestroj                   21 (0.0%)
+   Po Liu                            21 (0.0%)
+   Martin Hejnfelt                   20 (0.0%)
+   Siva Durga Prasad Paladugu        19 (0.0%)
+   Stefano Babic                     18 (0.0%)
+   Guillaume GARDET                  17 (0.0%)
+   Joris Lijssens                    16 (0.0%)
+   Yunhui Cui                        13 (0.0%)
+   Damien Riegel                     13 (0.0%)
+   Sumit Garg                        12 (0.0%)
+   Sebastien Bourdelin               10 (0.0%)
+   Bernhard Nortmann                 9 (0.0%)
+   Andrej Rosano                     9 (0.0%)
+   Vincent Siles                     8 (0.0%)
+   Ye Li                             8 (0.0%)
+   Fabio Estevam                     7 (0.0%)
+   Mateusz Kulikowski                7 (0.0%)
+   Shaohui Xie                       7 (0.0%)
+   Stefan Agner                      6 (0.0%)
+   Ying Zhang                        6 (0.0%)
+   Ralf Hubert                       6 (0.0%)
+   George McCollister                6 (0.0%)
+   Peter Howard                      6 (0.0%)
+   Bogdan Purcareata                 6 (0.0%)
+   Chris Brand                       5 (0.0%)
+   Hou Zhiqiang                      5 (0.0%)
+   Yangbo Lu                         5 (0.0%)
+   Nathan Rossi                      4 (0.0%)
+   Stefan Wahren                     4 (0.0%)
+   Stefan Mavrodiev                  4 (0.0%)
+   Petr Kulhavy                      3 (0.0%)
+   Kimmo Surakka                     3 (0.0%)
+   Sylvain Lesne                     3 (0.0%)
+   Lukasz Majewski                   3 (0.0%)
+   Kunihiko Hayashi                  3 (0.0%)
+   Sergey Kubushyn                   2 (0.0%)
+   Oleksandr Tymoshenko              2 (0.0%)
+   Olliver Schinagl                  2 (0.0%)
+   Jaehoon Chung                     2 (0.0%)
+   Andreas Bießmann                  2 (0.0%)
+   Rajesh Bhagat                     2 (0.0%)
+   Thomas Lange                      2 (0.0%)
+   Samuel Egli                       2 (0.0%)
+   Michael Heimpold                  2 (0.0%)
+   Ladislav Michl                    2 (0.0%)
+   Tim Chick                         2 (0.0%)
+   Ziyuan Xu                         1 (0.0%)
+   Praneeth Bajjuri                  1 (0.0%)
+   Ravi Babu                         1 (0.0%)
+   Daniel Gorsulowski                1 (0.0%)
+   Fabian Mewes                      1 (0.0%)
+   Andrew F. Davis                   1 (0.0%)
+   Ed Swarthout                      1 (0.0%)
+   Peter Robinson                    1 (0.0%)
+   Patrick Delaunay                  1 (0.0%)
+   Adrian Alonso                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Robert P. J. Day                  2538 (7.1%)
+   Scott Wood                        1385 (3.9%)
+   Hans de Goede                     258 (0.7%)
+   Abhimanyu Saini                   96 (0.3%)
+   Eric Nelson                       27 (0.1%)
+   Chris Packham                     21 (0.1%)
+   Chris Brand                       4 (0.0%)
+   Fabio Estevam                     3 (0.0%)
+   Nathan Rossi                      3 (0.0%)
+   Yangbo Lu                         1 (0.0%)
+   Petr Kulhavy                      1 (0.0%)
+   Lukasz Majewski                   1 (0.0%)
+   Andrew F. Davis                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 190)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Minkyu Kang                       36 (18.9%)
+   Hans de Goede                     31 (16.3%)
+   Tom Warren                        15 (7.9%)
+   Tom Rini                          11 (5.8%)
+   Srinivas, Madan                   9 (4.7%)
+   Daniel Schwierzeck                8 (4.2%)
+   Simon Glass                       8 (4.2%)
+   Calvin Johnson                    7 (3.7%)
+   Prabhakar Kushwaha                7 (3.7%)
+   Andreas Bießmann                  6 (3.2%)
+   Daniel Allred                     6 (3.2%)
+   Michal Simek                      6 (3.2%)
+   Rajesh Bhagat                     5 (2.6%)
+   Pratiyush Mohan Srivastava        5 (2.6%)
+   Scott Wood                        3 (1.6%)
+   Ye Li                             2 (1.1%)
+   Gong Qianyu                       2 (1.1%)
+   Stefan Roese                      2 (1.1%)
+   Peng Fan                          2 (1.1%)
+   Steve Rae                         2 (1.1%)
+   Lokesh Vutla                      2 (1.1%)
+   Abhimanyu Saini                   1 (0.5%)
+   Ravi Babu                         1 (0.5%)
+   Nishanth Menon                    1 (0.5%)
+   Makarand Pawagi                   1 (0.5%)
+   Michal Marek                      1 (0.5%)
+   Samuel Egli                       1 (0.5%)
+   Andreas Dannenberg                1 (0.5%)
+   Andrew Shadura                    1 (0.5%)
+   Roger Quadros                     1 (0.5%)
+   Mingkai Hu                        1 (0.5%)
+   Shengzhou Liu                     1 (0.5%)
+   Masahiro Yamada                   1 (0.5%)
+   Eddy Petrișor                     1 (0.5%)
+   Marek Vasut                       1 (0.5%)
+   Heiko Schocher                    1 (0.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 566)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       157 (27.7%)
+   Tom Rini                          105 (18.6%)
+   York Sun                          81 (14.3%)
+   Stefan Roese                      43 (7.6%)
+   Andreas Bießmann                  35 (6.2%)
+   Joe Hershberger                   28 (4.9%)
+   Heiko Schocher                    19 (3.4%)
+   Bin Meng                          18 (3.2%)
+   Lokesh Vutla                      17 (3.0%)
+   Hans de Goede                     16 (2.8%)
+   Fabio Estevam                     8 (1.4%)
+   Daniel Schwierzeck                5 (0.9%)
+   Peng Fan                          5 (0.9%)
+   Masahiro Yamada                   4 (0.7%)
+   Mugunthan V N                     4 (0.7%)
+   Stephen Warren                    4 (0.7%)
+   Michal Simek                      3 (0.5%)
+   Alexander Graf                    3 (0.5%)
+   Thomas Chou                       2 (0.4%)
+   Nishanth Menon                    1 (0.2%)
+   Andreas Dannenberg                1 (0.2%)
+   George McCollister                1 (0.2%)
+   Sylvain Lesne                     1 (0.2%)
+   Maxime Ripard                     1 (0.2%)
+   Benoît Thébaudeau                 1 (0.2%)
+   Tony O'Brien                      1 (0.2%)
+   Stefano Babic                     1 (0.2%)
+   Purna Chandra Mandal              1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 61)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      22 (36.1%)
+   Andreas Dannenberg                8 (13.1%)
+   Heiko Schocher                    7 (11.5%)
+   Michal Simek                      6 (9.8%)
+   Mugunthan V N                     5 (8.2%)
+   Fabio Estevam                     4 (6.6%)
+   George McCollister                2 (3.3%)
+   Simon Glass                       1 (1.6%)
+   Tom Rini                          1 (1.6%)
+   Masahiro Yamada                   1 (1.6%)
+   Sylvain Lesne                     1 (1.6%)
+   Jaehoon Chung                     1 (1.6%)
+   Daiane Angolini                   1 (1.6%)
+   Peter Robinson                    1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 61)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          23 (37.7%)
+   Simon Glass                       6 (9.8%)
+   Dan Murphy                        6 (9.8%)
+   Peng Fan                          4 (6.6%)
+   Srinivas, Madan                   4 (6.6%)
+   Lokesh Vutla                      3 (4.9%)
+   Daniel Allred                     3 (4.9%)
+   Steve Rae                         2 (3.3%)
+   Fabio Estevam                     1 (1.6%)
+   Masahiro Yamada                   1 (1.6%)
+   Stephen Warren                    1 (1.6%)
+   Alexander Graf                    1 (1.6%)
+   Scott Wood                        1 (1.6%)
+   Ye Li                             1 (1.6%)
+   Marek Vasut                       1 (1.6%)
+   Siva Durga Prasad Paladugu        1 (1.6%)
+   Ed Swarthout                      1 (1.6%)
+   Marco Franchi                     1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Srinivas, Madan                   1 (10.0%)
+   Daiane Angolini                   1 (10.0%)
+   Peter Robinson                    1 (10.0%)
+   Nishanth Menon                    1 (10.0%)
+   Chris Brand                       1 (10.0%)
+   Jonathan Gray                     1 (10.0%)
+   Richard Woodruff                  1 (10.0%)
+   Bernhard Nortmann                 1 (10.0%)
+   Suman Anna                        1 (10.0%)
+   Pavel Machek                      1 (10.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Lokesh Vutla                      2 (20.0%)
+   Keerthy                           2 (20.0%)
+   Peng Fan                          1 (10.0%)
+   Steve Rae                         1 (10.0%)
+   Fabio Estevam                     1 (10.0%)
+   Alexander Graf                    1 (10.0%)
+   Stefan Roese                      1 (10.0%)
+   Hans de Goede                     1 (10.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         341 (31.6%)
+   Google, Inc.                      143 (13.3%)
+   Texas Instruments                 99 (9.2%)
+   NXP                               95 (8.8%)
+   DENX Software Engineering         94 (8.7%)
+   Socionext Inc.                    85 (7.9%)
+   AMD                               49 (4.5%)
+   NVidia                            30 (2.8%)
+   MIPS                              21 (1.9%)
+   Guntermann & Drunck               20 (1.9%)
+   Collabora Ltd.                    13 (1.2%)
+   Red Hat                           13 (1.2%)
+   Broadcom                          12 (1.1%)
+   CompuLab                          12 (1.1%)
+   Konsulko Group                    11 (1.0%)
+   Samsung                           9 (0.8%)
+   ARM                               7 (0.6%)
+   Atmel                             7 (0.6%)
+   National Instruments              4 (0.4%)
+   Xilinx                            3 (0.3%)
+   Amarula Solutions                 2 (0.2%)
+   Debian.org                        2 (0.2%)
+   Sergey Kubushyn                   2 (0.2%)
+   ESD Electronics                   1 (0.1%)
+   Free Electrons                    1 (0.1%)
+   General Electric                  1 (0.1%)
+   Siemens                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         43154 (40.8%)
+   DENX Software Engineering         17697 (16.7%)
+   Google, Inc.                      13892 (13.1%)
+   Texas Instruments                 5700 (5.4%)
+   NVidia                            5584 (5.3%)
+   NXP                               4473 (4.2%)
+   Broadcom                          2864 (2.7%)
+   Socionext Inc.                    2629 (2.5%)
+   AMD                               1728 (1.6%)
+   Red Hat                           1668 (1.6%)
+   Samsung                           1336 (1.3%)
+   CompuLab                          1166 (1.1%)
+   Guntermann & Drunck               948 (0.9%)
+   Konsulko Group                    650 (0.6%)
+   Atmel                             564 (0.5%)
+   MIPS                              522 (0.5%)
+   ARM                               455 (0.4%)
+   Free Electrons                    393 (0.4%)
+   Collabora Ltd.                    234 (0.2%)
+   National Instruments              71 (0.1%)
+   Amarula Solutions                 47 (0.0%)
+   Debian.org                        43 (0.0%)
+   Xilinx                            19 (0.0%)
+   General Electric                  3 (0.0%)
+   Sergey Kubushyn                   2 (0.0%)
+   Siemens                           2 (0.0%)
+   ESD Electronics                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 190)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Samsung                           36 (18.9%)
+   NXP                               32 (16.8%)
+   Red Hat                           31 (16.3%)
+   Texas Instruments                 21 (11.1%)
+   (Unknown)                         20 (10.5%)
+   NVidia                            15 (7.9%)
+   Konsulko Group                    11 (5.8%)
+   Google, Inc.                      8 (4.2%)
+   Xilinx                            6 (3.2%)
+   DENX Software Engineering         4 (2.1%)
+   Broadcom                          2 (1.1%)
+   Socionext Inc.                    1 (0.5%)
+   Collabora Ltd.                    1 (0.5%)
+   Siemens                           1 (0.5%)
+   Novell                            1 (0.5%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 134)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         61 (45.5%)
+   NXP                               27 (20.1%)
+   Texas Instruments                 13 (9.7%)
+   DENX Software Engineering         5 (3.7%)
+   Samsung                           2 (1.5%)
+   Broadcom                          2 (1.5%)
+   Socionext Inc.                    2 (1.5%)
+   Collabora Ltd.                    2 (1.5%)
+   Guntermann & Drunck               2 (1.5%)
+   Red Hat                           1 (0.7%)
+   NVidia                            1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   Google, Inc.                      1 (0.7%)
+   Xilinx                            1 (0.7%)
+   Siemens                           1 (0.7%)
+   AMD                               1 (0.7%)
+   CompuLab                          1 (0.7%)
+   Atmel                             1 (0.7%)
+   MIPS                              1 (0.7%)
+   ARM                               1 (0.7%)
+   Free Electrons                    1 (0.7%)
+   National Instruments              1 (0.7%)
+   Amarula Solutions                 1 (0.7%)
+   Debian.org                        1 (0.7%)
+   General Electric                  1 (0.7%)
+   Sergey Kubushyn                   1 (0.7%)
+   ESD Electronics                   1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2016.09.rst b/doc/develop/statistics/u-boot-stats-v2016.09.rst
new file mode 100644
index 00000000000..75c033264a0
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2016.09.rst
@@ -0,0 +1,649 @@
+:orphan:
+
+Release Statistics for U-Boot v2016.09
+======================================
+
+* Processed 987 changesets from 129 developers
+
+* 30 employers found
+
+* A total of 76219 lines added, 14538 removed (delta 61681)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       172 (17.4%)
+   Masahiro Yamada                   70 (7.1%)
+   Stephen Warren                    37 (3.7%)
+   Vignesh R                         36 (3.6%)
+   Tom Rini                          24 (2.4%)
+   Ladislav Michl                    24 (2.4%)
+   Fabio Estevam                     23 (2.3%)
+   Mugunthan V N                     22 (2.2%)
+   Chen-Yu Tsai                      21 (2.1%)
+   Jaehoon Chung                     21 (2.1%)
+   Mario Six                         21 (2.1%)
+   Bin Meng                          20 (2.0%)
+   Joe Hershberger                   19 (1.9%)
+   Hans de Goede                     19 (1.9%)
+   Xu Ziyuan                         18 (1.8%)
+   Kever Yang                        18 (1.8%)
+   Max Filippov                      17 (1.7%)
+   Stefan Agner                      16 (1.6%)
+   Michal Simek                      16 (1.6%)
+   Nobuhiro Iwamatsu                 15 (1.5%)
+   Maxime Ripard                     14 (1.4%)
+   York Sun                          13 (1.3%)
+   Tim Harvey                        13 (1.3%)
+   Stefan Roese                      12 (1.2%)
+   Andreas Dannenberg                11 (1.1%)
+   Hou Zhiqiang                      11 (1.1%)
+   Wenyou Yang                       10 (1.0%)
+   Alexander Graf                    9 (0.9%)
+   Vanessa Maegima                   9 (0.9%)
+   Ziyuan Xu                         9 (0.9%)
+   Breno Lima                        8 (0.8%)
+   Alexey Brodkin                    8 (0.8%)
+   Sumit Garg                        8 (0.8%)
+   Lokesh Vutla                      7 (0.7%)
+   Stefano Babic                     7 (0.7%)
+   Heiko Stübner                     7 (0.7%)
+   Boris Brezillon                   7 (0.7%)
+   Christopher Spinrath              6 (0.6%)
+   Chris Packham                     6 (0.6%)
+   Andreas Fenkart                   6 (0.6%)
+   Rajesh Bhagat                     6 (0.6%)
+   Siva Durga Prasad Paladugu        6 (0.6%)
+   John Keeping                      5 (0.5%)
+   Sekhar Nori                       5 (0.5%)
+   Alban Bedel                       5 (0.5%)
+   Wenbin Song                       4 (0.4%)
+   Vagrant Cascadian                 4 (0.4%)
+   Beniamino Galvani                 4 (0.4%)
+   Scott Wood                        4 (0.4%)
+   karl beldan                       4 (0.4%)
+   Chris Zankel                      4 (0.4%)
+   Bryan Wu                          4 (0.4%)
+   Hongbo Zhang                      4 (0.4%)
+   Hannes Schmelzer                  3 (0.3%)
+   Robert P. J. Day                  3 (0.3%)
+   Andre Przywara                    3 (0.3%)
+   Andreas Färber                    3 (0.3%)
+   Steve Rae                         3 (0.3%)
+   Prabhakar Kushwaha                3 (0.3%)
+   Diego Dorta                       3 (0.3%)
+   Qianyu Gong                       3 (0.3%)
+   Anatolij Gustschin                3 (0.3%)
+   Toshifumi NISHINAGA               3 (0.3%)
+   Daniel Allred                     3 (0.3%)
+   Jonathan Gray                     2 (0.2%)
+   Nishanth Menon                    2 (0.2%)
+   Madan Srinivas                    2 (0.2%)
+   Andreas Bießmann                  2 (0.2%)
+   Soeren Moch                       2 (0.2%)
+   Icenowy Zheng                     2 (0.2%)
+   Tony Lindgren                     2 (0.2%)
+   Karl Beldan                       2 (0.2%)
+   Masakazu Mochizuki                2 (0.2%)
+   George McCollister                2 (0.2%)
+   Songjun Wu                        2 (0.2%)
+   Peng Fan                          2 (0.2%)
+   Mingkai Hu                        2 (0.2%)
+   Russ Dill                         2 (0.2%)
+   Hector Palacios                   2 (0.2%)
+   Thomas Gleixner                   2 (0.2%)
+   Kevin Hao                         2 (0.2%)
+   Ricardo Salveti de Araujo         2 (0.2%)
+   Andrej Rosano                     2 (0.2%)
+   Yoshinori Sato                    2 (0.2%)
+   Cyrille Pitchen                   1 (0.1%)
+   Heiko Schocher                    1 (0.1%)
+   Joshua Scott                      1 (0.1%)
+   Guillaume GARDET                  1 (0.1%)
+   Mian Yousaf Kaukab                1 (0.1%)
+   Adam Ford                         1 (0.1%)
+   Paul Kocialkowski                 1 (0.1%)
+   Eric Nelson                       1 (0.1%)
+   Akshay Bhat                       1 (0.1%)
+   Siarhei Siamashka                 1 (0.1%)
+   Stefan Mavrodiev                  1 (0.1%)
+   Peter Chubb                       1 (0.1%)
+   Jens Kuske                        1 (0.1%)
+   Simon Baatz                       1 (0.1%)
+   Dongpo Li                         1 (0.1%)
+   James Byrne                       1 (0.1%)
+   Yannick Gicquel                   1 (0.1%)
+   Hiroyuki Yokoyama                 1 (0.1%)
+   Yaroslav K                        1 (0.1%)
+   Yangbo Lu                         1 (0.1%)
+   Jon Medhurst (Tixy)               1 (0.1%)
+   Bibek Basu                        1 (0.1%)
+   Dirk Eibach                       1 (0.1%)
+   Mike Looijmans                    1 (0.1%)
+   Chin Liang See                    1 (0.1%)
+   Teddy Reed                        1 (0.1%)
+   Sandy Patterson                   1 (0.1%)
+   Yunhui Cui                        1 (0.1%)
+   Soren Brinkmann                   1 (0.1%)
+   Angelo Dureghello                 1 (0.1%)
+   Moritz Fischer                    1 (0.1%)
+   Alison Wang                       1 (0.1%)
+   Marcin Niestroj                   1 (0.1%)
+   Karicheri, Muralidharan           1 (0.1%)
+   Brian Norris                      1 (0.1%)
+   yeongjun Kim                      1 (0.1%)
+   Jeremy Hunt                       1 (0.1%)
+   Benjamin Kamath                   1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Amit Singh Tomar                  1 (0.1%)
+   Tobias Doerffel                   1 (0.1%)
+   Bernhard Nortmann                 1 (0.1%)
+   Gilles Chanteperdrix              1 (0.1%)
+   Petr Kulhavy                      1 (0.1%)
+   Hamish Martin                     1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Nobuhiro Iwamatsu                 6753 (8.5%)
+   Simon Glass                       6075 (7.6%)
+   Stephen Warren                    5971 (7.5%)
+   Masakazu Mochizuki                5036 (6.3%)
+   Chris Zankel                      4844 (6.1%)
+   Hans de Goede                     4539 (5.7%)
+   Kever Yang                        3372 (4.2%)
+   Wenyou Yang                       3297 (4.1%)
+   Tom Rini                          2867 (3.6%)
+   Max Filippov                      2337 (2.9%)
+   Masahiro Yamada                   2002 (2.5%)
+   Boris Brezillon                   1927 (2.4%)
+   Xu Ziyuan                         1795 (2.2%)
+   Stefano Babic                     1788 (2.2%)
+   Stefan Roese                      1472 (1.8%)
+   Thomas Gleixner                   1468 (1.8%)
+   Ziyuan Xu                         1390 (1.7%)
+   Maxime Ripard                     1378 (1.7%)
+   Beniamino Galvani                 1276 (1.6%)
+   Akshay Bhat                       1244 (1.6%)
+   Joe Hershberger                   1109 (1.4%)
+   Stefan Agner                      1084 (1.4%)
+   Peter Chubb                       1007 (1.3%)
+   Amit Singh Tomar                  902 (1.1%)
+   Vignesh R                         885 (1.1%)
+   Mario Six                         787 (1.0%)
+   Hou Zhiqiang                      707 (0.9%)
+   Tim Harvey                        692 (0.9%)
+   Toshifumi NISHINAGA               687 (0.9%)
+   Ladislav Michl                    686 (0.9%)
+   York Sun                          675 (0.8%)
+   George McCollister                530 (0.7%)
+   Mugunthan V N                     508 (0.6%)
+   Angelo Dureghello                 501 (0.6%)
+   Sumit Garg                        468 (0.6%)
+   Songjun Wu                        452 (0.6%)
+   Andreas Dannenberg                421 (0.5%)
+   Bin Meng                          392 (0.5%)
+   Mingkai Hu                        324 (0.4%)
+   Jaehoon Chung                     321 (0.4%)
+   Siarhei Siamashka                 311 (0.4%)
+   Fabio Estevam                     310 (0.4%)
+   Chen-Yu Tsai                      308 (0.4%)
+   Hongbo Zhang                      304 (0.4%)
+   Alexey Brodkin                    281 (0.4%)
+   Stefan Mavrodiev                  275 (0.3%)
+   Rajesh Bhagat                     272 (0.3%)
+   Alban Bedel                       269 (0.3%)
+   Vanessa Maegima                   255 (0.3%)
+   Michal Simek                      243 (0.3%)
+   Guillaume GARDET                  242 (0.3%)
+   Bryan Wu                          228 (0.3%)
+   Heiko Schocher                    222 (0.3%)
+   Andreas Fenkart                   178 (0.2%)
+   Peng Fan                          131 (0.2%)
+   Diego Dorta                       122 (0.2%)
+   Icenowy Zheng                     120 (0.2%)
+   Siva Durga Prasad Paladugu        117 (0.1%)
+   Alexander Graf                    110 (0.1%)
+   Daniel Allred                     97 (0.1%)
+   Lokesh Vutla                      96 (0.1%)
+   Steve Rae                         90 (0.1%)
+   Brian Norris                      73 (0.1%)
+   Qianyu Gong                       71 (0.1%)
+   James Byrne                       67 (0.1%)
+   Heiko Stübner                     64 (0.1%)
+   Robert P. J. Day                  64 (0.1%)
+   Christopher Spinrath              52 (0.1%)
+   Chris Packham                     48 (0.1%)
+   Scott Wood                        48 (0.1%)
+   Dirk Eibach                       45 (0.1%)
+   Jon Medhurst (Tixy)               44 (0.1%)
+   Andrej Rosano                     43 (0.1%)
+   John Keeping                      41 (0.1%)
+   karl beldan                       41 (0.1%)
+   Yoshinori Sato                    38 (0.0%)
+   Breno Lima                        36 (0.0%)
+   Hamish Martin                     36 (0.0%)
+   Sekhar Nori                       35 (0.0%)
+   Wenbin Song                       32 (0.0%)
+   Bernhard Nortmann                 29 (0.0%)
+   Vagrant Cascadian                 20 (0.0%)
+   Kevin Hao                         20 (0.0%)
+   Jonathan Gray                     18 (0.0%)
+   Gilles Chanteperdrix              18 (0.0%)
+   Russ Dill                         16 (0.0%)
+   Bibek Basu                        15 (0.0%)
+   Jeremy Hunt                       15 (0.0%)
+   Eric Nelson                       14 (0.0%)
+   Jens Kuske                        14 (0.0%)
+   Dongpo Li                         14 (0.0%)
+   Hannes Schmelzer                  12 (0.0%)
+   Adam Ford                         12 (0.0%)
+   Madan Srinivas                    11 (0.0%)
+   Soeren Moch                       10 (0.0%)
+   Marcin Niestroj                   10 (0.0%)
+   Hector Palacios                   8 (0.0%)
+   Simon Baatz                       8 (0.0%)
+   Andreas Färber                    7 (0.0%)
+   Paul Kocialkowski                 7 (0.0%)
+   Andre Przywara                    5 (0.0%)
+   Nishanth Menon                    5 (0.0%)
+   Tony Lindgren                     5 (0.0%)
+   Joshua Scott                      5 (0.0%)
+   Mian Yousaf Kaukab                5 (0.0%)
+   Chin Liang See                    5 (0.0%)
+   Tobias Doerffel                   5 (0.0%)
+   Prabhakar Kushwaha                4 (0.0%)
+   Yaroslav K                        4 (0.0%)
+   Mike Looijmans                    4 (0.0%)
+   Alison Wang                       4 (0.0%)
+   Anatolij Gustschin                3 (0.0%)
+   Andreas Bießmann                  3 (0.0%)
+   Ricardo Salveti de Araujo         3 (0.0%)
+   Yannick Gicquel                   3 (0.0%)
+   Yangbo Lu                         3 (0.0%)
+   Yunhui Cui                        3 (0.0%)
+   Karl Beldan                       2 (0.0%)
+   Hiroyuki Yokoyama                 2 (0.0%)
+   Sandy Patterson                   2 (0.0%)
+   Soren Brinkmann                   2 (0.0%)
+   Karicheri, Muralidharan           2 (0.0%)
+   Cyrille Pitchen                   1 (0.0%)
+   Teddy Reed                        1 (0.0%)
+   Moritz Fischer                    1 (0.0%)
+   yeongjun Kim                      1 (0.0%)
+   Benjamin Kamath                   1 (0.0%)
+   Daniel Schwierzeck                1 (0.0%)
+   Petr Kulhavy                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   York Sun                          120 (0.8%)
+   Angelo Dureghello                 52 (0.4%)
+   Siva Durga Prasad Paladugu        48 (0.3%)
+   karl beldan                       29 (0.2%)
+   Lokesh Vutla                      23 (0.2%)
+   Breno Lima                        21 (0.1%)
+   Adam Ford                         12 (0.1%)
+   Eric Nelson                       4 (0.0%)
+   Chris Packham                     3 (0.0%)
+   Jeremy Hunt                       3 (0.0%)
+   Russ Dill                         2 (0.0%)
+   Karicheri, Muralidharan           2 (0.0%)
+   Heiko Stübner                     1 (0.0%)
+   Robert P. J. Day                  1 (0.0%)
+   Tony Lindgren                     1 (0.0%)
+   Cyrille Pitchen                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 174)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Warren                        37 (21.3%)
+   Hans de Goede                     32 (18.4%)
+   Xu Ziyuan                         9 (5.2%)
+   Michal Simek                      8 (4.6%)
+   Minkyu Kang                       7 (4.0%)
+   Stefan Roese                      7 (4.0%)
+   Daniel Allred                     5 (2.9%)
+   Stephen Warren                    5 (2.9%)
+   Nobuhiro Iwamatsu                 5 (2.9%)
+   Karl Beldan                       4 (2.3%)
+   Wang Dongsheng                    4 (2.3%)
+   Jaehoon Chung                     4 (2.3%)
+   Tom Rini                          4 (2.3%)
+   Andreas Dannenberg                4 (2.3%)
+   Max Filippov                      4 (2.3%)
+   Simon Glass                       4 (2.3%)
+   Andrew F. Davis                   3 (1.7%)
+   Hiroyuki Yokoyama                 3 (1.7%)
+   Qianyu Gong                       3 (1.7%)
+   Calvin Johnson                    2 (1.1%)
+   Aneesh Bansal                     2 (1.1%)
+   Ladislav Michl                    2 (1.1%)
+   Boris Brezillon                   2 (1.1%)
+   York Sun                          1 (0.6%)
+   Abhimanyu Saini                   1 (0.6%)
+   Jagan Teki                        1 (0.6%)
+   Shaohui Xie                       1 (0.6%)
+   Mihai Bantea                      1 (0.6%)
+   Olof Johansson                    1 (0.6%)
+   Chris Johns                       1 (0.6%)
+   Anatolij Gustschin                1 (0.6%)
+   Wenbin Song                       1 (0.6%)
+   Mingkai Hu                        1 (0.6%)
+   Bin Meng                          1 (0.6%)
+   Hou Zhiqiang                      1 (0.6%)
+   Vignesh R                         1 (0.6%)
+   Wenyou Yang                       1 (0.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 532)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          144 (27.1%)
+   Simon Glass                       130 (24.4%)
+   York Sun                          44 (8.3%)
+   Jagan Teki                        31 (5.8%)
+   Bin Meng                          29 (5.5%)
+   Mugunthan V N                     19 (3.6%)
+   Fabio Estevam                     18 (3.4%)
+   Stefan Roese                      17 (3.2%)
+   Heiko Schocher                    15 (2.8%)
+   Teddy Reed                        11 (2.1%)
+   Hans de Goede                     7 (1.3%)
+   Stefano Babic                     7 (1.3%)
+   Alexander Graf                    6 (1.1%)
+   Jaehoon Chung                     4 (0.8%)
+   Aneesh Bansal                     4 (0.8%)
+   Lokesh Vutla                      4 (0.8%)
+   Eric Nelson                       4 (0.8%)
+   Andreas Bießmann                  3 (0.6%)
+   Andreas Färber                    3 (0.6%)
+   George McCollister                3 (0.6%)
+   Minkyu Kang                       2 (0.4%)
+   Stephen Warren                    2 (0.4%)
+   Nikita Kiryanov                   2 (0.4%)
+   Ruchika Gupta                     2 (0.4%)
+   Igor Grinberg                     2 (0.4%)
+   Marek Vasut                       2 (0.4%)
+   Siarhei Siamashka                 2 (0.4%)
+   Masahiro Yamada                   2 (0.4%)
+   Stefan Agner                      2 (0.4%)
+   Xu Ziyuan                         1 (0.2%)
+   Daniel Schwierzeck                1 (0.2%)
+   Keerthy                           1 (0.2%)
+   Ryan Harkin                       1 (0.2%)
+   Shawn Lin                         1 (0.2%)
+   Eddie Cai                         1 (0.2%)
+   Moritz Fischer                    1 (0.2%)
+   Nishanth Menon                    1 (0.2%)
+   Joe Hershberger                   1 (0.2%)
+   Mario Six                         1 (0.2%)
+   Kever Yang                        1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 29)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          3 (10.3%)
+   Fabio Estevam                     3 (10.3%)
+   George McCollister                3 (10.3%)
+   Jaehoon Chung                     2 (6.9%)
+   Stephen Warren                    2 (6.9%)
+   Marek Vasut                       2 (6.9%)
+   Lukasz Majewski                   2 (6.9%)
+   Simon Glass                       1 (3.4%)
+   Stefan Roese                      1 (3.4%)
+   Lokesh Vutla                      1 (3.4%)
+   Eric Nelson                       1 (3.4%)
+   Andreas Färber                    1 (3.4%)
+   Ryan Harkin                       1 (3.4%)
+   Mario Six                         1 (3.4%)
+   Ladislav Michl                    1 (3.4%)
+   Breno Lima                        1 (3.4%)
+   Kevin Hilman                      1 (3.4%)
+   Michael Trimarchi                 1 (3.4%)
+   Hannes Schmelzer                  1 (3.4%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 29)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          4 (13.8%)
+   Fabio Estevam                     3 (10.3%)
+   Bin Meng                          3 (10.3%)
+   Jaehoon Chung                     2 (6.9%)
+   Stefan Agner                      2 (6.9%)
+   Xu Ziyuan                         2 (6.9%)
+   Vignesh R                         2 (6.9%)
+   Cyrille Pitchen                   2 (6.9%)
+   Stephen Warren                    1 (3.4%)
+   Simon Glass                       1 (3.4%)
+   Mugunthan V N                     1 (3.4%)
+   Stefano Babic                     1 (3.4%)
+   Ricardo Salveti de Araujo         1 (3.4%)
+   Hamish Martin                     1 (3.4%)
+   Sekhar Nori                       1 (3.4%)
+   Jon Medhurst (Tixy)               1 (3.4%)
+   Ziyuan Xu                         1 (3.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 24)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          3 (12.5%)
+   York Sun                          2 (8.3%)
+   Teddy Reed                        2 (8.3%)
+   Robert P. J. Day                  2 (8.3%)
+   Guillaume GARDET                  2 (8.3%)
+   Xu Ziyuan                         1 (4.2%)
+   Eric Nelson                       1 (4.2%)
+   Breno Lima                        1 (4.2%)
+   Masahiro Yamada                   1 (4.2%)
+   Sandy Patterson                   1 (4.2%)
+   Stephen L Arnold                  1 (4.2%)
+   Ravi Babu                         1 (4.2%)
+   Andrew Bradford                   1 (4.2%)
+   Thomas Schaefer                   1 (4.2%)
+   Dave Liu                          1 (4.2%)
+   Alon Bar-Lev                      1 (4.2%)
+   Tom Van Deun                      1 (4.2%)
+   Vinoth Eswaran                    1 (4.2%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 24)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       6 (25.0%)
+   Tom Rini                          3 (12.5%)
+   York Sun                          2 (8.3%)
+   Fabio Estevam                     2 (8.3%)
+   Stephen Warren                    2 (8.3%)
+   Alexander Graf                    2 (8.3%)
+   Joe Hershberger                   2 (8.3%)
+   Kevin Hao                         2 (8.3%)
+   Masahiro Yamada                   1 (4.2%)
+   Daniel Schwierzeck                1 (4.2%)
+   Michal Simek                      1 (4.2%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         246 (24.9%)
+   Google, Inc.                      172 (17.4%)
+   NXP                               100 (10.1%)
+   Texas Instruments                 91 (9.2%)
+   Socionext Inc.                    70 (7.1%)
+   NVidia                            41 (4.2%)
+   Rockchip                          36 (3.6%)
+   Konsulko Group                    24 (2.4%)
+   DENX Software Engineering         23 (2.3%)
+   Guntermann & Drunck               22 (2.2%)
+   Samsung                           21 (2.1%)
+   Red Hat                           19 (1.9%)
+   National Instruments              19 (1.9%)
+   AMD                               16 (1.6%)
+   Nobuhiro Iwamatsu                 15 (1.5%)
+   Free Electrons                    14 (1.4%)
+   Toradex                           14 (1.4%)
+   Atmel                             13 (1.3%)
+   Xilinx                            7 (0.7%)
+   Debian.org                        4 (0.4%)
+   ARM                               3 (0.3%)
+   Novell                            3 (0.3%)
+   Atomide                           2 (0.2%)
+   BayLibre SAS                      2 (0.2%)
+   Wind River                        2 (0.2%)
+   Digi International                2 (0.2%)
+   Hitachi                           2 (0.2%)
+   linutronix                        2 (0.2%)
+   Linaro                            1 (0.1%)
+   Renesas Electronics               1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         21579 (27.0%)
+   Nobuhiro Iwamatsu                 6753 (8.5%)
+   NVidia                            6211 (7.8%)
+   Google, Inc.                      6075 (7.6%)
+   Rockchip                          5167 (6.5%)
+   Hitachi                           5036 (6.3%)
+   Red Hat                           4539 (5.7%)
+   Atmel                             3750 (4.7%)
+   NXP                               3590 (4.5%)
+   DENX Software Engineering         3485 (4.4%)
+   Konsulko Group                    2867 (3.6%)
+   Texas Instruments                 2076 (2.6%)
+   Socionext Inc.                    2002 (2.5%)
+   linutronix                        1468 (1.8%)
+   Free Electrons                    1378 (1.7%)
+   National Instruments              1109 (1.4%)
+   Toradex                           1079 (1.4%)
+   Guntermann & Drunck               832 (1.0%)
+   Samsung                           321 (0.4%)
+   AMD                               243 (0.3%)
+   Xilinx                            119 (0.1%)
+   Linaro                            44 (0.1%)
+   Debian.org                        20 (0.0%)
+   Wind River                        20 (0.0%)
+   Digi International                8 (0.0%)
+   Novell                            7 (0.0%)
+   ARM                               5 (0.0%)
+   Atomide                           5 (0.0%)
+   BayLibre SAS                      2 (0.0%)
+   Renesas Electronics               2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 174)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   NVidia                            42 (24.1%)
+   Red Hat                           32 (18.4%)
+   NXP                               18 (10.3%)
+   Texas Instruments                 13 (7.5%)
+   (Unknown)                         12 (6.9%)
+   Samsung                           11 (6.3%)
+   Rockchip                          9 (5.2%)
+   DENX Software Engineering         8 (4.6%)
+   Xilinx                            8 (4.6%)
+   Nobuhiro Iwamatsu                 5 (2.9%)
+   Google, Inc.                      4 (2.3%)
+   Konsulko Group                    4 (2.3%)
+   Renesas Electronics               3 (1.7%)
+   Free Electrons                    2 (1.1%)
+   Atmel                             1 (0.6%)
+   IBM                               1 (0.6%)
+   Openedev                          1 (0.6%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 131)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         68 (51.9%)
+   NXP                               16 (12.2%)
+   Texas Instruments                 10 (7.6%)
+   DENX Software Engineering         4 (3.1%)
+   NVidia                            3 (2.3%)
+   Atmel                             3 (2.3%)
+   Rockchip                          2 (1.5%)
+   Xilinx                            2 (1.5%)
+   Guntermann & Drunck               2 (1.5%)
+   Red Hat                           1 (0.8%)
+   Samsung                           1 (0.8%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   Google, Inc.                      1 (0.8%)
+   Konsulko Group                    1 (0.8%)
+   Renesas Electronics               1 (0.8%)
+   Free Electrons                    1 (0.8%)
+   Hitachi                           1 (0.8%)
+   Socionext Inc.                    1 (0.8%)
+   linutronix                        1 (0.8%)
+   National Instruments              1 (0.8%)
+   Toradex                           1 (0.8%)
+   AMD                               1 (0.8%)
+   Linaro                            1 (0.8%)
+   Debian.org                        1 (0.8%)
+   Wind River                        1 (0.8%)
+   Digi International                1 (0.8%)
+   Novell                            1 (0.8%)
+   ARM                               1 (0.8%)
+   Atomide                           1 (0.8%)
+   BayLibre SAS                      1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2016.11.rst b/doc/develop/statistics/u-boot-stats-v2016.11.rst
new file mode 100644
index 00000000000..9fb6e3e5266
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2016.11.rst
@@ -0,0 +1,562 @@
+:orphan:
+
+Release Statistics for U-Boot v2016.11
+======================================
+
+* Processed 1031 changesets from 114 developers
+
+* 26 employers found
+
+* A total of 73321 lines added, 20937 removed (delta 52384)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       195 (18.9%)
+   Masahiro Yamada                   109 (10.6%)
+   Stefan Brüns                      50 (4.8%)
+   Stephen Warren                    48 (4.7%)
+   Paul Burton                       38 (3.7%)
+   Stefan Roese                      36 (3.5%)
+   Peng Fan                          35 (3.4%)
+   Jagan Teki                        33 (3.2%)
+   Tom Rini                          30 (2.9%)
+   Kever Yang                        29 (2.8%)
+   York Sun                          22 (2.1%)
+   Alexander Graf                    21 (2.0%)
+   Wenyou Yang                       18 (1.7%)
+   Keerthy                           17 (1.6%)
+   Michal Simek                      15 (1.5%)
+   Sriram Dash                       13 (1.3%)
+   Bin Meng                          12 (1.2%)
+   Stefan Agner                      12 (1.2%)
+   Lokesh Vutla                      9 (0.9%)
+   Chris Packham                     9 (0.9%)
+   Jacob Chen                        9 (0.9%)
+   Chen-Yu Tsai                      9 (0.9%)
+   Chin Liang See                    9 (0.9%)
+   B, Ravi                           9 (0.9%)
+   Marcel Ziswiler                   8 (0.8%)
+   Heiko Schocher                    8 (0.8%)
+   Andrew F. Davis                   8 (0.8%)
+   Fabio Estevam                     7 (0.7%)
+   Jaehoon Chung                     7 (0.7%)
+   Hou Zhiqiang                      7 (0.7%)
+   Philipp Tomsich                   6 (0.6%)
+   Albert ARIBAUD (3ADEV)            6 (0.6%)
+   Zubair Lutfullah Kakakhel         6 (0.6%)
+   Ladislav Michl                    5 (0.5%)
+   Andre Przywara                    5 (0.5%)
+   Mugunthan V N                     5 (0.5%)
+   Moritz Fischer                    5 (0.5%)
+   Walter Schweizer                  5 (0.5%)
+   Hongbo Zhang                      5 (0.5%)
+   Daniel Allred                     5 (0.5%)
+   Sanchayan Maity                   5 (0.5%)
+   Shaohui Xie                       5 (0.5%)
+   Vignesh R                         4 (0.4%)
+   Siva Durga Prasad Paladugu        4 (0.4%)
+   Vagrant Cascadian                 4 (0.4%)
+   Sandy Patterson                   4 (0.4%)
+   Robert P. J. Day                  4 (0.4%)
+   Gary Bisson                       4 (0.4%)
+   Andreas Fenkart                   4 (0.4%)
+   Sumit Garg                        4 (0.4%)
+   Xu Ziyuan                         4 (0.4%)
+   Petr Kulhavy                      4 (0.4%)
+   Michael Walle                     4 (0.4%)
+   MengDongyang                      4 (0.4%)
+   Shengzhou Liu                     4 (0.4%)
+   Hans de Goede                     3 (0.3%)
+   Diego Dorta                       3 (0.3%)
+   Jelle van der Waa                 3 (0.3%)
+   Adam Ford                         3 (0.3%)
+   Nishanth Menon                    3 (0.3%)
+   John Keeping                      3 (0.3%)
+   Marek Vasut                       2 (0.2%)
+   Hannes Schmelzer                  2 (0.2%)
+   Tom Warren                        2 (0.2%)
+   Sylvain Lesne                     2 (0.2%)
+   Zhao Qiang                        2 (0.2%)
+   Peter Chubb                       2 (0.2%)
+   Roger Quadros                     2 (0.2%)
+   Pratiyush Srivastava              2 (0.2%)
+   Mingkai Hu                        2 (0.2%)
+   Tang Yuantian                     2 (0.2%)
+   Soeren Moch                       2 (0.2%)
+   Angelo Dureghello                 2 (0.2%)
+   Gong Qianyu                       2 (0.2%)
+   Fabien Parent                     1 (0.1%)
+   Alex G                            1 (0.1%)
+   Ash Charles                       1 (0.1%)
+   Tomeu Vizoso                      1 (0.1%)
+   Patrick Delaunay                  1 (0.1%)
+   Alexander von Gernler             1 (0.1%)
+   Amit Singh Tomar                  1 (0.1%)
+   Stefan Mavrodiev                  1 (0.1%)
+   Emmanuel Vadot                    1 (0.1%)
+   David Gibson                      1 (0.1%)
+   Nicolae Rosia                     1 (0.1%)
+   Lukasz Majewski                   1 (0.1%)
+   Ye Li                             1 (0.1%)
+   Maxime Ripard                     1 (0.1%)
+   Robin Randhawa                    1 (0.1%)
+   Andreas J. Reichel                1 (0.1%)
+   Prabhakar Kushwaha                1 (0.1%)
+   Guillaume GARDET                  1 (0.1%)
+   Andrea Merello                    1 (0.1%)
+   Josh Marshall                     1 (0.1%)
+   Jens Kuske                        1 (0.1%)
+   Ken Lin                           1 (0.1%)
+   Sudeep Holla                      1 (0.1%)
+   Semen Protsenko                   1 (0.1%)
+   Tomas Melin                       1 (0.1%)
+   Adam Oleksy                       1 (0.1%)
+   Siarhei Siamashka                 1 (0.1%)
+   Clemens Gruber                    1 (0.1%)
+   Wenbin Song                       1 (0.1%)
+   Xiaoliang Yang                    1 (0.1%)
+   Alexandre Courbot                 1 (0.1%)
+   Ross Parker                       1 (0.1%)
+   Filip Brozovic                    1 (0.1%)
+   Murali Karicheri                  1 (0.1%)
+   rick                              1 (0.1%)
+   Alban Bedel                       1 (0.1%)
+   Bryan Wu                          1 (0.1%)
+   jinghua                           1 (0.1%)
+   Lad, Prabhakar                    1 (0.1%)
+   Alexey Brodkin                    1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       20424 (25.5%)
+   Stefan Roese                      7593 (9.5%)
+   Masahiro Yamada                   6220 (7.8%)
+   Stephen Warren                    5686 (7.1%)
+   Jagan Teki                        5684 (7.1%)
+   Peng Fan                          5567 (7.0%)
+   Paul Burton                       1883 (2.4%)
+   Shaohui Xie                       1880 (2.3%)
+   Stefan Agner                      1791 (2.2%)
+   Philipp Tomsich                   1676 (2.1%)
+   Kever Yang                        1569 (2.0%)
+   Mingkai Hu                        1485 (1.9%)
+   Keerthy                           1320 (1.6%)
+   Stefan Brüns                      1026 (1.3%)
+   Wenyou Yang                       983 (1.2%)
+   Mugunthan V N                     853 (1.1%)
+   York Sun                          826 (1.0%)
+   Tom Rini                          769 (1.0%)
+   Walter Schweizer                  650 (0.8%)
+   Lokesh Vutla                      598 (0.7%)
+   Chris Packham                     597 (0.7%)
+   Bin Meng                          571 (0.7%)
+   Siva Durga Prasad Paladugu        558 (0.7%)
+   Alexander Graf                    555 (0.7%)
+   Albert ARIBAUD (3ADEV)            539 (0.7%)
+   Hongbo Zhang                      518 (0.6%)
+   Moritz Fischer                    466 (0.6%)
+   Hou Zhiqiang                      465 (0.6%)
+   Michael Walle                     455 (0.6%)
+   Heiko Schocher                    426 (0.5%)
+   Shengzhou Liu                     426 (0.5%)
+   Zubair Lutfullah Kakakhel         347 (0.4%)
+   Jacob Chen                        342 (0.4%)
+   Zhao Qiang                        325 (0.4%)
+   Fabio Estevam                     314 (0.4%)
+   MengDongyang                      299 (0.4%)
+   B, Ravi                           282 (0.4%)
+   Michal Simek                      275 (0.3%)
+   Daniel Allred                     262 (0.3%)
+   Petr Kulhavy                      259 (0.3%)
+   Tom Warren                        256 (0.3%)
+   Sanchayan Maity                   233 (0.3%)
+   Sumit Garg                        218 (0.3%)
+   Sriram Dash                       206 (0.3%)
+   Andrew F. Davis                   200 (0.2%)
+   Diego Dorta                       163 (0.2%)
+   Jelle van der Waa                 150 (0.2%)
+   Maxime Ripard                     147 (0.2%)
+   Jaehoon Chung                     135 (0.2%)
+   Roger Quadros                     121 (0.2%)
+   Marcel Ziswiler                   100 (0.1%)
+   Ladislav Michl                    87 (0.1%)
+   rick                              77 (0.1%)
+   Chen-Yu Tsai                      76 (0.1%)
+   Adam Oleksy                       67 (0.1%)
+   Amit Singh Tomar                  56 (0.1%)
+   Sudeep Holla                      53 (0.1%)
+   Vignesh R                         51 (0.1%)
+   Andre Przywara                    49 (0.1%)
+   Robert P. J. Day                  49 (0.1%)
+   Guillaume GARDET                  49 (0.1%)
+   Chin Liang See                    45 (0.1%)
+   Andreas Fenkart                   45 (0.1%)
+   Tomeu Vizoso                      44 (0.1%)
+   Gary Bisson                       43 (0.1%)
+   Jens Kuske                        43 (0.1%)
+   Hans de Goede                     42 (0.1%)
+   Adam Ford                         40 (0.0%)
+   Xu Ziyuan                         37 (0.0%)
+   Tomas Melin                       37 (0.0%)
+   Lukasz Majewski                   34 (0.0%)
+   Angelo Dureghello                 30 (0.0%)
+   Ash Charles                       26 (0.0%)
+   Semen Protsenko                   25 (0.0%)
+   Alban Bedel                       24 (0.0%)
+   Sandy Patterson                   21 (0.0%)
+   Hannes Schmelzer                  21 (0.0%)
+   Nishanth Menon                    18 (0.0%)
+   Marek Vasut                       18 (0.0%)
+   Vagrant Cascadian                 17 (0.0%)
+   Xiaoliang Yang                    17 (0.0%)
+   Pratiyush Srivastava              16 (0.0%)
+   Andrea Merello                    16 (0.0%)
+   Gong Qianyu                       15 (0.0%)
+   Tang Yuantian                     11 (0.0%)
+   Prabhakar Kushwaha                11 (0.0%)
+   Fabien Parent                     8 (0.0%)
+   David Gibson                      7 (0.0%)
+   Ken Lin                           6 (0.0%)
+   John Keeping                      5 (0.0%)
+   Peter Chubb                       5 (0.0%)
+   Emmanuel Vadot                    5 (0.0%)
+   Murali Karicheri                  5 (0.0%)
+   jinghua                           5 (0.0%)
+   Sylvain Lesne                     4 (0.0%)
+   Ye Li                             4 (0.0%)
+   Siarhei Siamashka                 4 (0.0%)
+   Soeren Moch                       3 (0.0%)
+   Robin Randhawa                    3 (0.0%)
+   Wenbin Song                       3 (0.0%)
+   Bryan Wu                          3 (0.0%)
+   Alexey Brodkin                    3 (0.0%)
+   Alex G                            2 (0.0%)
+   Nicolae Rosia                     2 (0.0%)
+   Andreas J. Reichel                2 (0.0%)
+   Josh Marshall                     2 (0.0%)
+   Clemens Gruber                    2 (0.0%)
+   Ross Parker                       2 (0.0%)
+   Patrick Delaunay                  1 (0.0%)
+   Alexander von Gernler             1 (0.0%)
+   Stefan Mavrodiev                  1 (0.0%)
+   Alexandre Courbot                 1 (0.0%)
+   Filip Brozovic                    1 (0.0%)
+   Lad, Prabhakar                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          202 (1.0%)
+   Tom Warren                        160 (0.8%)
+   Shengzhou Liu                     133 (0.6%)
+   Lokesh Vutla                      125 (0.6%)
+   York Sun                          66 (0.3%)
+   Ladislav Michl                    21 (0.1%)
+   Alban Bedel                       21 (0.1%)
+   Xu Ziyuan                         17 (0.1%)
+   Prabhakar Kushwaha                11 (0.1%)
+   Nishanth Menon                    4 (0.0%)
+   Robert P. J. Day                  3 (0.0%)
+   Andreas Fenkart                   3 (0.0%)
+   Adam Ford                         3 (0.0%)
+   Peter Chubb                       2 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 171)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Warren                        35 (20.5%)
+   Hans de Goede                     24 (14.0%)
+   Tom Rini                          17 (9.9%)
+   Alexander Graf                    11 (6.4%)
+   Stefan Roese                      10 (5.8%)
+   Ye Li                             8 (4.7%)
+   Gong Qianyu                       8 (4.7%)
+   Chen-Yu Tsai                      6 (3.5%)
+   Simon Glass                       6 (3.5%)
+   Rajesh Bhagat                     5 (2.9%)
+   Kever Yang                        4 (2.3%)
+   David Gibson                      3 (1.8%)
+   Michal Simek                      3 (1.8%)
+   Shengzhou Liu                     2 (1.2%)
+   Lokesh Vutla                      2 (1.2%)
+   Prabhakar Kushwaha                2 (1.2%)
+   Aneesh Bansal                     2 (1.2%)
+   Mingkai Hu                        2 (1.2%)
+   Stephen Warren                    2 (1.2%)
+   Xu Ziyuan                         1 (0.6%)
+   Peter Chubb                       1 (0.6%)
+   Songjun Wu                        1 (0.6%)
+   Utkarsh Gupta                     1 (0.6%)
+   Christian Storm                   1 (0.6%)
+   Jan Kiszka                        1 (0.6%)
+   Troy Kisky                        1 (0.6%)
+   Akshay Bhat                       1 (0.6%)
+   Bai Ping                          1 (0.6%)
+   Anson Huang                       1 (0.6%)
+   Elaine Zhang                      1 (0.6%)
+   Suman Anna                        1 (0.6%)
+   Andre Przywara                    1 (0.6%)
+   Gary Bisson                       1 (0.6%)
+   Marcel Ziswiler                   1 (0.6%)
+   Siva Durga Prasad Paladugu        1 (0.6%)
+   Keerthy                           1 (0.6%)
+   Shaohui Xie                       1 (0.6%)
+   Peng Fan                          1 (0.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 510)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          132 (25.9%)
+   Simon Glass                       120 (23.5%)
+   Bin Meng                          62 (12.2%)
+   York Sun                          62 (12.2%)
+   Jagan Teki                        20 (3.9%)
+   Lukasz Majewski                   16 (3.1%)
+   Heiko Schocher                    16 (3.1%)
+   Hans de Goede                     14 (2.7%)
+   Andreas Bießmann                  10 (2.0%)
+   Alexander Graf                    9 (1.8%)
+   Stefano Babic                     5 (1.0%)
+   Paul Burton                       5 (1.0%)
+   Kever Yang                        4 (0.8%)
+   Lokesh Vutla                      4 (0.8%)
+   Peng Fan                          4 (0.8%)
+   Javier Martinez Canillas          3 (0.6%)
+   Daniel Schwierzeck                3 (0.6%)
+   Marek Vasut                       3 (0.6%)
+   Jaehoon Chung                     3 (0.6%)
+   Stefan Roese                      2 (0.4%)
+   Joe Hershberger                   2 (0.4%)
+   Minkyu Kang                       2 (0.4%)
+   Stephen Warren                    1 (0.2%)
+   Sekhar Nori                       1 (0.2%)
+   Eric Nelson                       1 (0.2%)
+   Benoît Thébaudeau                 1 (0.2%)
+   Hannes Schmelzer                  1 (0.2%)
+   Angelo Dureghello                 1 (0.2%)
+   Andrew F. Davis                   1 (0.2%)
+   Fabio Estevam                     1 (0.2%)
+   Stefan Agner                      1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 18)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       4 (22.2%)
+   Vagrant Cascadian                 3 (16.7%)
+   Bin Meng                          2 (11.1%)
+   Javier Martinez Canillas          2 (11.1%)
+   Stephen Warren                    2 (11.1%)
+   Tom Rini                          1 (5.6%)
+   Troy Kisky                        1 (5.6%)
+   Marcel Ziswiler                   1 (5.6%)
+   Jon Medhurst                      1 (5.6%)
+   George McCollister                1 (5.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 18)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kever Yang                        5 (27.8%)
+   Simon Glass                       2 (11.1%)
+   Stephen Warren                    2 (11.1%)
+   Xu Ziyuan                         2 (11.1%)
+   Ladislav Michl                    2 (11.1%)
+   Paul Burton                       1 (5.6%)
+   Stefan Roese                      1 (5.6%)
+   Stefan Agner                      1 (5.6%)
+   Alexandre Courbot                 1 (5.6%)
+   Sudeep Holla                      1 (5.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       1 (20.0%)
+   Brad Griffis                      1 (20.0%)
+   Jon Masters                       1 (20.0%)
+   David Binderman                   1 (20.0%)
+   Stefan Brüns                      1 (20.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 5)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   2 (40.0%)
+   Stephen Warren                    1 (20.0%)
+   David Gibson                      1 (20.0%)
+   Nishanth Menon                    1 (20.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         230 (22.3%)
+   Google, Inc.                      195 (18.9%)
+   Socionext Inc.                    109 (10.6%)
+   NXP                               96 (9.3%)
+   Texas Instruments                 63 (6.1%)
+   NVidia                            52 (5.0%)
+   DENX Software Engineering         46 (4.5%)
+   Rockchip                          46 (4.5%)
+   MIPS                              38 (3.7%)
+   Konsulko Group                    30 (2.9%)
+   Toradex                           25 (2.4%)
+   Amarula Solutions                 22 (2.1%)
+   Atmel                             18 (1.7%)
+   AMD                               15 (1.5%)
+   Openedev                          11 (1.1%)
+   ARM                               7 (0.7%)
+   Samsung                           7 (0.7%)
+   Boundary Devices                  4 (0.4%)
+   Debian.org                        4 (0.4%)
+   Xilinx                            4 (0.4%)
+   Red Hat                           3 (0.3%)
+   BayLibre SAS                      1 (0.1%)
+   Collabora Ltd.                    1 (0.1%)
+   Free Electrons                    1 (0.1%)
+   Linaro                            1 (0.1%)
+   Marvell                           1 (0.1%)
+   Nokia                             1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Google, Inc.                      20424 (25.5%)
+   (Unknown)                         12922 (16.1%)
+   DENX Software Engineering         8037 (10.0%)
+   NXP                               7674 (9.6%)
+   Socionext Inc.                    6220 (7.8%)
+   NVidia                            5946 (7.4%)
+   Amarula Solutions                 5457 (6.8%)
+   Texas Instruments                 3710 (4.6%)
+   Rockchip                          2247 (2.8%)
+   Toradex                           2124 (2.7%)
+   MIPS                              1883 (2.4%)
+   Atmel                             983 (1.2%)
+   Konsulko Group                    769 (1.0%)
+   Xilinx                            558 (0.7%)
+   AMD                               275 (0.3%)
+   Openedev                          227 (0.3%)
+   Free Electrons                    147 (0.2%)
+   Samsung                           135 (0.2%)
+   ARM                               105 (0.1%)
+   Nokia                             67 (0.1%)
+   Collabora Ltd.                    44 (0.1%)
+   Boundary Devices                  43 (0.1%)
+   Red Hat                           42 (0.1%)
+   Linaro                            25 (0.0%)
+   Debian.org                        17 (0.0%)
+   BayLibre SAS                      8 (0.0%)
+   Marvell                           5 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 171)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   NVidia                            37 (21.6%)
+   NXP                               34 (19.9%)
+   Red Hat                           24 (14.0%)
+   Konsulko Group                    17 (9.9%)
+   (Unknown)                         13 (7.6%)
+   Novell                            11 (6.4%)
+   DENX Software Engineering         10 (5.8%)
+   Google, Inc.                      6 (3.5%)
+   Rockchip                          6 (3.5%)
+   Texas Instruments                 4 (2.3%)
+   Xilinx                            4 (2.3%)
+   Boundary Devices                  2 (1.2%)
+   Toradex                           1 (0.6%)
+   ARM                               1 (0.6%)
+   Siemens                           1 (0.6%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 116)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         51 (44.0%)
+   NXP                               19 (16.4%)
+   Texas Instruments                 10 (8.6%)
+   NVidia                            4 (3.4%)
+   Rockchip                          4 (3.4%)
+   DENX Software Engineering         3 (2.6%)
+   Toradex                           3 (2.6%)
+   ARM                               3 (2.6%)
+   Red Hat                           1 (0.9%)
+   Konsulko Group                    1 (0.9%)
+   Google, Inc.                      1 (0.9%)
+   Xilinx                            1 (0.9%)
+   Boundary Devices                  1 (0.9%)
+   Socionext Inc.                    1 (0.9%)
+   Amarula Solutions                 1 (0.9%)
+   MIPS                              1 (0.9%)
+   Atmel                             1 (0.9%)
+   AMD                               1 (0.9%)
+   Openedev                          1 (0.9%)
+   Free Electrons                    1 (0.9%)
+   Samsung                           1 (0.9%)
+   Nokia                             1 (0.9%)
+   Collabora Ltd.                    1 (0.9%)
+   Linaro                            1 (0.9%)
+   Debian.org                        1 (0.9%)
+   BayLibre SAS                      1 (0.9%)
+   Marvell                           1 (0.9%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2017.01.rst b/doc/develop/statistics/u-boot-stats-v2017.01.rst
new file mode 100644
index 00000000000..6f14d7e1c37
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2017.01.rst
@@ -0,0 +1,620 @@
+:orphan:
+
+Release Statistics for U-Boot v2017.01
+======================================
+
+* Processed 883 changesets from 137 developers
+
+* 29 employers found
+
+* A total of 112574 lines added, 72846 removed (delta 39728)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   York Sun                          134 (15.2%)
+   Simon Glass                       73 (8.3%)
+   Jagan Teki                        68 (7.7%)
+   Michal Simek                      54 (6.1%)
+   Vladimir Zapolskiy                24 (2.7%)
+   Peng Fan                          23 (2.6%)
+   Stefan Roese                      20 (2.3%)
+   Lokesh Vutla                      20 (2.3%)
+   Tom Rini                          19 (2.2%)
+   Fabien Parent                     19 (2.2%)
+   Alexander Graf                    18 (2.0%)
+   Masahiro Yamada                   16 (1.8%)
+   Marcel Ziswiler                   14 (1.6%)
+   Andrew F. Davis                   12 (1.4%)
+   Mugunthan V N                     12 (1.4%)
+   Marek Vasut                       11 (1.2%)
+   Breno Lima                        11 (1.2%)
+   Phil Edworthy                     11 (1.2%)
+   Konstantin Porotchkin             10 (1.1%)
+   Stefan Agner                      10 (1.1%)
+   Priyanka Jain                     10 (1.1%)
+   Stefan Brüns                      9 (1.0%)
+   Andre Przywara                    9 (1.0%)
+   Daniel Schwierzeck                9 (1.0%)
+   Fabian Vogt                       9 (1.0%)
+   Semen Protsenko                   9 (1.0%)
+   Nishanth Menon                    8 (0.9%)
+   Siva Durga Prasad Paladugu        8 (0.9%)
+   Keerthy                           7 (0.8%)
+   Fabio Estevam                     6 (0.7%)
+   Sven Ebenfeld                     6 (0.7%)
+   Jaehoon Chung                     6 (0.7%)
+   Chris Packham                     6 (0.7%)
+   Max Krummenacher                  6 (0.7%)
+   Hongbo Zhang                      6 (0.7%)
+   Eric Nelson                       6 (0.7%)
+   Vignesh R                         5 (0.6%)
+   Adam Ford                         5 (0.6%)
+   Kever Yang                        5 (0.6%)
+   Shengzhou Liu                     5 (0.6%)
+   Yuan Yao                          5 (0.6%)
+   Walt Feasel                       5 (0.6%)
+   Nathan Rossi                      4 (0.5%)
+   shaohui xie                       4 (0.5%)
+   Tomas Melin                       4 (0.5%)
+   Maxime Ripard                     4 (0.5%)
+   Andrew Duda                       4 (0.5%)
+   Filip Drazic                      4 (0.5%)
+   Dmitry Lifshitz                   3 (0.3%)
+   Emmanuel Vadot                    3 (0.3%)
+   Bin Meng                          3 (0.3%)
+   Marcin Niestroj                   3 (0.3%)
+   Hou Zhiqiang                      3 (0.3%)
+   Olliver Schinagl                  3 (0.3%)
+   Yegor Yefremov                    3 (0.3%)
+   Yann E. MORIN                     3 (0.3%)
+   Andreas Färber                    3 (0.3%)
+   Alison Wang                       3 (0.3%)
+   Kedareswara rao Appana            3 (0.3%)
+   Naga Sureshkumar Relli            3 (0.3%)
+   Mike Looijmans                    3 (0.3%)
+   Robert P. J. Day                  2 (0.2%)
+   Jean-Jacques Hiblot               2 (0.2%)
+   Jonathan Gray                     2 (0.2%)
+   Moritz Fischer                    2 (0.2%)
+   Sanchayan Maity                   2 (0.2%)
+   Stefano Babic                     2 (0.2%)
+   Łukasz Majewski                   2 (0.2%)
+   Suman Anna                        2 (0.2%)
+   Harinarayan Bhatta                2 (0.2%)
+   Sekhar Nori                       2 (0.2%)
+   Paul Burton                       2 (0.2%)
+   Christoph Fritz                   2 (0.2%)
+   Cédric Schieli                    2 (0.2%)
+   Heiko Schocher                    2 (0.2%)
+   Bharat Kumar Gogada               2 (0.2%)
+   Ladislav Michl                    1 (0.1%)
+   Misha Komarovskiy                 1 (0.1%)
+   Stephen Warren                    1 (0.1%)
+   Uri Mashiach                      1 (0.1%)
+   Kevin Hilman                      1 (0.1%)
+   George McCollister                1 (0.1%)
+   Baruch Siach                      1 (0.1%)
+   Ajay Bhargav                      1 (0.1%)
+   Philipp Skadorov                  1 (0.1%)
+   Zakharov Vlad                     1 (0.1%)
+   Icenowy Zheng                     1 (0.1%)
+   Bradley Bolen                     1 (0.1%)
+   Patrick Bruenn                    1 (0.1%)
+   Ye.Li                             1 (0.1%)
+   Cyrille Pitchen                   1 (0.1%)
+   Jyri Sarha                        1 (0.1%)
+   Christian Riesch                  1 (0.1%)
+   Yehuda Yitschak                   1 (0.1%)
+   Patrick Delaunay                  1 (0.1%)
+   Alex                              1 (0.1%)
+   Dinh Nguyen                       1 (0.1%)
+   Bill Randle                       1 (0.1%)
+   Anatolij Gustschin                1 (0.1%)
+   Changming Huang                   1 (0.1%)
+   Bartosz Golaszewski               1 (0.1%)
+   Shadi Ammouri                     1 (0.1%)
+   Niko Mauno                        1 (0.1%)
+   Schuyler Patton                   1 (0.1%)
+   Steve Kipisz                      1 (0.1%)
+   Madan Srinivas                    1 (0.1%)
+   Meng Yi                           1 (0.1%)
+   Seung-Woo Kim                     1 (0.1%)
+   Sebastien Bourdelin               1 (0.1%)
+   Lukasz Majewski                   1 (0.1%)
+   Angus Ainslie                     1 (0.1%)
+   Ken Lin                           1 (0.1%)
+   Soeren Moch                       1 (0.1%)
+   Liviu Dudau                       1 (0.1%)
+   Tien Fong Chee                    1 (0.1%)
+   Nicolae Rosia                     1 (0.1%)
+   Tang Yuantian                     1 (0.1%)
+   Mario Six                         1 (0.1%)
+   Philipp Tomsich                   1 (0.1%)
+   FUKAUMI Naoki                     1 (0.1%)
+   Boris Brezillon                   1 (0.1%)
+   Hans de Goede                     1 (0.1%)
+   Jelle van der Waa                 1 (0.1%)
+   Jacob Chen                        1 (0.1%)
+   Thomas Abraham                    1 (0.1%)
+   Radu Bacrau                       1 (0.1%)
+   Guillaume GARDET                  1 (0.1%)
+   Sriram Dash                       1 (0.1%)
+   Feng Li                           1 (0.1%)
+   Pratiyush Srivastava              1 (0.1%)
+   Anurag Kumar Vulisha              1 (0.1%)
+   Hyun Kwon                         1 (0.1%)
+   Sai Krishna Potthuri              1 (0.1%)
+   Nava kishore Manne                1 (0.1%)
+   Soren Brinkmann                   1 (0.1%)
+   VNSL Durga                        1 (0.1%)
+   Oleksandr Tymoshenko              1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          55400 (31.8%)
+   Michal Simek                      55205 (31.7%)
+   Simon Glass                       9330 (5.4%)
+   Max Krummenacher                  5204 (3.0%)
+   Jagan Teki                        5024 (2.9%)
+   Peng Fan                          4721 (2.7%)
+   Masahiro Yamada                   3790 (2.2%)
+   Lokesh Vutla                      3616 (2.1%)
+   York Sun                          3139 (1.8%)
+   Patrick Bruenn                    2557 (1.5%)
+   Konstantin Porotchkin             1968 (1.1%)
+   Anatolij Gustschin                1528 (0.9%)
+   Marcel Ziswiler                   1245 (0.7%)
+   Siva Durga Prasad Paladugu        1231 (0.7%)
+   Mike Looijmans                    1188 (0.7%)
+   Fabian Vogt                       1181 (0.7%)
+   Feng Li                           999 (0.6%)
+   Stefan Roese                      997 (0.6%)
+   Breno Lima                        971 (0.6%)
+   Vladimir Zapolskiy                949 (0.5%)
+   Dmitry Lifshitz                   847 (0.5%)
+   Christoph Fritz                   845 (0.5%)
+   Marcin Niestroj                   783 (0.4%)
+   Daniel Schwierzeck                582 (0.3%)
+   Misha Komarovskiy                 568 (0.3%)
+   Shadi Ammouri                     546 (0.3%)
+   Hongbo Zhang                      522 (0.3%)
+   Alison Wang                       471 (0.3%)
+   Mugunthan V N                     460 (0.3%)
+   Alexander Graf                    446 (0.3%)
+   Nathan Rossi                      406 (0.2%)
+   Priyanka Jain                     383 (0.2%)
+   Nishanth Menon                    370 (0.2%)
+   Sebastien Bourdelin               364 (0.2%)
+   Steve Kipisz                      286 (0.2%)
+   Jaehoon Chung                     277 (0.2%)
+   Harinarayan Bhatta                269 (0.2%)
+   Suman Anna                        263 (0.2%)
+   Semen Protsenko                   245 (0.1%)
+   Andrew Duda                       242 (0.1%)
+   Shengzhou Liu                     238 (0.1%)
+   Marek Vasut                       237 (0.1%)
+   Sven Ebenfeld                     237 (0.1%)
+   Stefan Brüns                      226 (0.1%)
+   Andrew F. Davis                   185 (0.1%)
+   Yegor Yefremov                    176 (0.1%)
+   shaohui xie                       170 (0.1%)
+   Sekhar Nori                       162 (0.1%)
+   Stefan Agner                      151 (0.1%)
+   Fabien Parent                     150 (0.1%)
+   Keerthy                           142 (0.1%)
+   Phil Edworthy                     124 (0.1%)
+   Chris Packham                     117 (0.1%)
+   Eric Nelson                       114 (0.1%)
+   Meng Yi                           114 (0.1%)
+   Yuan Yao                          106 (0.1%)
+   Stefano Babic                     97 (0.1%)
+   FUKAUMI Naoki                     93 (0.1%)
+   Tomas Melin                       89 (0.1%)
+   Emmanuel Vadot                    86 (0.0%)
+   Schuyler Patton                   86 (0.0%)
+   Yehuda Yitschak                   83 (0.0%)
+   Cédric Schieli                    76 (0.0%)
+   Fabio Estevam                     65 (0.0%)
+   Cyrille Pitchen                   63 (0.0%)
+   Uri Mashiach                      61 (0.0%)
+   Vignesh R                         54 (0.0%)
+   Ken Lin                           54 (0.0%)
+   Philipp Skadorov                  53 (0.0%)
+   Jonathan Gray                     51 (0.0%)
+   Kever Yang                        46 (0.0%)
+   Icenowy Zheng                     45 (0.0%)
+   Kedareswara rao Appana            44 (0.0%)
+   VNSL Durga                        44 (0.0%)
+   Filip Drazic                      43 (0.0%)
+   Guillaume GARDET                  43 (0.0%)
+   Jelle van der Waa                 40 (0.0%)
+   Heiko Schocher                    33 (0.0%)
+   Jyri Sarha                        33 (0.0%)
+   Soeren Moch                       33 (0.0%)
+   Bill Randle                       32 (0.0%)
+   Angus Ainslie                     30 (0.0%)
+   Bin Meng                          29 (0.0%)
+   Olliver Schinagl                  28 (0.0%)
+   Yann E. MORIN                     28 (0.0%)
+   Robert P. J. Day                  28 (0.0%)
+   George McCollister                28 (0.0%)
+   Moritz Fischer                    27 (0.0%)
+   Kevin Hilman                      26 (0.0%)
+   Adam Ford                         25 (0.0%)
+   Alex                              24 (0.0%)
+   Walt Feasel                       23 (0.0%)
+   Anurag Kumar Vulisha              23 (0.0%)
+   Oleksandr Tymoshenko              22 (0.0%)
+   Andre Przywara                    20 (0.0%)
+   Naga Sureshkumar Relli            19 (0.0%)
+   Stephen Warren                    18 (0.0%)
+   Maxime Ripard                     17 (0.0%)
+   Soren Brinkmann                   17 (0.0%)
+   Lukasz Majewski                   15 (0.0%)
+   Zakharov Vlad                     14 (0.0%)
+   Hou Zhiqiang                      13 (0.0%)
+   Ajay Bhargav                      13 (0.0%)
+   Thomas Abraham                    12 (0.0%)
+   Tang Yuantian                     11 (0.0%)
+   Sai Krishna Potthuri              9 (0.0%)
+   Jean-Jacques Hiblot               8 (0.0%)
+   Sanchayan Maity                   7 (0.0%)
+   Bharat Kumar Gogada               7 (0.0%)
+   Patrick Delaunay                  6 (0.0%)
+   Ye.Li                             5 (0.0%)
+   Dinh Nguyen                       5 (0.0%)
+   Sriram Dash                       5 (0.0%)
+   Hyun Kwon                         5 (0.0%)
+   Changming Huang                   4 (0.0%)
+   Tien Fong Chee                    4 (0.0%)
+   Radu Bacrau                       4 (0.0%)
+   Nava kishore Manne                4 (0.0%)
+   Andreas Färber                    3 (0.0%)
+   Łukasz Majewski                   3 (0.0%)
+   Boris Brezillon                   3 (0.0%)
+   Paul Burton                       2 (0.0%)
+   Ladislav Michl                    2 (0.0%)
+   Bradley Bolen                     2 (0.0%)
+   Christian Riesch                  2 (0.0%)
+   Hans de Goede                     2 (0.0%)
+   Baruch Siach                      1 (0.0%)
+   Bartosz Golaszewski               1 (0.0%)
+   Niko Mauno                        1 (0.0%)
+   Madan Srinivas                    1 (0.0%)
+   Seung-Woo Kim                     1 (0.0%)
+   Liviu Dudau                       1 (0.0%)
+   Nicolae Rosia                     1 (0.0%)
+   Mario Six                         1 (0.0%)
+   Philipp Tomsich                   1 (0.0%)
+   Jacob Chen                        1 (0.0%)
+   Pratiyush Srivastava              1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          54919 (75.4%)
+   Vladimir Zapolskiy                722 (1.0%)
+   Nathan Rossi                      170 (0.2%)
+   Stefan Brüns                      89 (0.1%)
+   Stefano Babic                     80 (0.1%)
+   Yegor Yefremov                    74 (0.1%)
+   Cyrille Pitchen                   61 (0.1%)
+   Andrew Duda                       54 (0.1%)
+   Sekhar Nori                       52 (0.1%)
+   Jonathan Gray                     43 (0.1%)
+   Phil Edworthy                     20 (0.0%)
+   Filip Drazic                      18 (0.0%)
+   Adam Ford                         15 (0.0%)
+   Andre Przywara                    4 (0.0%)
+   Moritz Fischer                    2 (0.0%)
+   Walt Feasel                       1 (0.0%)
+   Hans de Goede                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 156)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      35 (22.4%)
+   Alexander Graf                    16 (10.3%)
+   Stefan Roese                      15 (9.6%)
+   Lokesh Vutla                      14 (9.0%)
+   Tom Rini                          8 (5.1%)
+   Tom Warren                        6 (3.8%)
+   Hongbo Zhang                      6 (3.8%)
+   Prabhakar Kushwaha                5 (3.2%)
+   Hans de Goede                     4 (2.6%)
+   Nishanth Menon                    4 (2.6%)
+   Simon Glass                       4 (2.6%)
+   Minkyu Kang                       3 (1.9%)
+   Ye.Li                             3 (1.9%)
+   Uri Mashiach                      3 (1.9%)
+   Chenhui Zhao                      2 (1.3%)
+   Ashish Kumar                      2 (1.3%)
+   Soren Brinkmann                   2 (1.3%)
+   Heiko Schocher                    2 (1.3%)
+   Andrew F. Davis                   2 (1.3%)
+   Jagan Teki                        2 (1.3%)
+   Stefano Babic                     1 (0.6%)
+   Andre Przywara                    1 (0.6%)
+   Vlad Zakharov                     1 (0.6%)
+   Subhajit Paul                     1 (0.6%)
+   Akshay Bhat                       1 (0.6%)
+   Genevieve Chan                    1 (0.6%)
+   Ebony Zhu                         1 (0.6%)
+   Raghav Dogra                      1 (0.6%)
+   Harninder Rai                     1 (0.6%)
+   Bai Ping                          1 (0.6%)
+   Jagannadha Sutradharudu Teki      1 (0.6%)
+   Maxime Ripard                     1 (0.6%)
+   Anurag Kumar Vulisha              1 (0.6%)
+   Vignesh R                         1 (0.6%)
+   Tomas Melin                       1 (0.6%)
+   Yehuda Yitschak                   1 (0.6%)
+   Marcel Ziswiler                   1 (0.6%)
+   Peng Fan                          1 (0.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 393)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          120 (30.5%)
+   Simon Glass                       109 (27.7%)
+   York Sun                          45 (11.5%)
+   Jagan Teki                        43 (10.9%)
+   Fabio Estevam                     10 (2.5%)
+   Hans de Goede                     8 (2.0%)
+   Bin Meng                          8 (2.0%)
+   Marek Vasut                       8 (2.0%)
+   Stefan Roese                      7 (1.8%)
+   Siva Durga Prasad Paladugu        7 (1.8%)
+   Jaehoon Chung                     6 (1.5%)
+   George McCollister                5 (1.3%)
+   Lokesh Vutla                      3 (0.8%)
+   Andrew F. Davis                   2 (0.5%)
+   Benoît Thébaudeau                 2 (0.5%)
+   Chen-Yu Tsai                      2 (0.5%)
+   Stefano Babic                     1 (0.3%)
+   Peng Fan                          1 (0.3%)
+   Paul Burton                       1 (0.3%)
+   Kedareswara rao Appana            1 (0.3%)
+   Eric Nelson                       1 (0.3%)
+   Mugunthan V N                     1 (0.3%)
+   Sebastien Bourdelin               1 (0.3%)
+   Alison Wang                       1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 34)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          11 (32.4%)
+   Jagan Teki                        10 (29.4%)
+   George McCollister                4 (11.8%)
+   Hyun Kwon                         2 (5.9%)
+   Simon Glass                       1 (2.9%)
+   Paul Burton                       1 (2.9%)
+   Sekhar Nori                       1 (2.9%)
+   Carlos Hernandez                  1 (2.9%)
+   Ravi Babu                         1 (2.9%)
+   Dinh Nguyen                       1 (2.9%)
+   Kever Yang                        1 (2.9%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 34)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       11 (32.4%)
+   Jagan Teki                        10 (29.4%)
+   Sven Ebenfeld                     4 (11.8%)
+   Marek Vasut                       1 (2.9%)
+   Andrew F. Davis                   1 (2.9%)
+   Mugunthan V N                     1 (2.9%)
+   Michal Simek                      1 (2.9%)
+   Anurag Kumar Vulisha              1 (2.9%)
+   Stefan Brüns                      1 (2.9%)
+   Yann E. MORIN                     1 (2.9%)
+   Stefan Agner                      1 (2.9%)
+   Daniel Schwierzeck                1 (2.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Phani Kiran Kara                  2 (20.0%)
+   Sai Pavan Boddu                   2 (20.0%)
+   Sekhar Nori                       1 (10.0%)
+   Kever Yang                        1 (10.0%)
+   Vignesh R                         1 (10.0%)
+   frostybytes@protonmail.com        1 (10.0%)
+   Yan Liu                           1 (10.0%)
+   Jason Brown                       1 (10.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      2 (20.0%)
+   Stefan Brüns                      2 (20.0%)
+   Kedareswara rao Appana            2 (20.0%)
+   Jagan Teki                        1 (10.0%)
+   Mugunthan V N                     1 (10.0%)
+   Mario Six                         1 (10.0%)
+   Jean-Jacques Hiblot               1 (10.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         382 (43.3%)
+   Texas Instruments                 76 (8.6%)
+   Google, Inc.                      73 (8.3%)
+   AMD                               54 (6.1%)
+   Amarula Solutions                 42 (4.8%)
+   DENX Software Engineering         36 (4.1%)
+   Toradex                           27 (3.1%)
+   Openedev                          26 (2.9%)
+   Xilinx                            22 (2.5%)
+   BayLibre SAS                      21 (2.4%)
+   Konsulko Group                    19 (2.2%)
+   Socionext Inc.                    16 (1.8%)
+   Marvell                           12 (1.4%)
+   Novell                            12 (1.4%)
+   Renesas Electronics               11 (1.2%)
+   ARM                               10 (1.1%)
+   Samsung                           10 (1.1%)
+   Linaro                            9 (1.0%)
+   Rockchip                          6 (0.7%)
+   CompuLab                          4 (0.5%)
+   Free Electrons                    4 (0.5%)
+   NXP                               3 (0.3%)
+   MIPS                              2 (0.2%)
+   Atmel                             1 (0.1%)
+   Red Hat                           1 (0.1%)
+   Guntermann & Drunck               1 (0.1%)
+   Intel                             1 (0.1%)
+   NVidia                            1 (0.1%)
+   ST Microelectronics               1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Konsulko Group                    55400 (31.8%)
+   AMD                               55205 (31.7%)
+   (Unknown)                         27537 (15.8%)
+   Google, Inc.                      9330 (5.4%)
+   Texas Instruments                 5935 (3.4%)
+   Amarula Solutions                 3848 (2.2%)
+   Socionext Inc.                    3790 (2.2%)
+   DENX Software Engineering         2892 (1.7%)
+   Marvell                           2597 (1.5%)
+   Toradex                           1431 (0.8%)
+   Xilinx                            1403 (0.8%)
+   Novell                            1184 (0.7%)
+   Openedev                          1176 (0.7%)
+   CompuLab                          908 (0.5%)
+   NXP                               471 (0.3%)
+   Samsung                           293 (0.2%)
+   Linaro                            245 (0.1%)
+   BayLibre SAS                      177 (0.1%)
+   Renesas Electronics               124 (0.1%)
+   Atmel                             63 (0.0%)
+   Rockchip                          47 (0.0%)
+   ARM                               21 (0.0%)
+   NVidia                            18 (0.0%)
+   Free Electrons                    17 (0.0%)
+   ST Microelectronics               6 (0.0%)
+   Intel                             4 (0.0%)
+   MIPS                              2 (0.0%)
+   Red Hat                           2 (0.0%)
+   Guntermann & Drunck               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 156)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Xilinx                            39 (25.0%)
+   (Unknown)                         27 (17.3%)
+   Texas Instruments                 22 (14.1%)
+   DENX Software Engineering         18 (11.5%)
+   Novell                            16 (10.3%)
+   Konsulko Group                    8 (5.1%)
+   NVidia                            6 (3.8%)
+   Google, Inc.                      4 (2.6%)
+   Red Hat                           4 (2.6%)
+   CompuLab                          3 (1.9%)
+   Samsung                           3 (1.9%)
+   Openedev                          2 (1.3%)
+   Marvell                           1 (0.6%)
+   Toradex                           1 (0.6%)
+   ARM                               1 (0.6%)
+   Free Electrons                    1 (0.6%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 139)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         71 (51.1%)
+   Texas Instruments                 14 (10.1%)
+   Xilinx                            10 (7.2%)
+   DENX Software Engineering         5 (3.6%)
+   Samsung                           4 (2.9%)
+   Toradex                           4 (2.9%)
+   Marvell                           3 (2.2%)
+   BayLibre SAS                      3 (2.2%)
+   Novell                            2 (1.4%)
+   CompuLab                          2 (1.4%)
+   ARM                               2 (1.4%)
+   Rockchip                          2 (1.4%)
+   Konsulko Group                    1 (0.7%)
+   NVidia                            1 (0.7%)
+   Google, Inc.                      1 (0.7%)
+   Red Hat                           1 (0.7%)
+   Openedev                          1 (0.7%)
+   Free Electrons                    1 (0.7%)
+   AMD                               1 (0.7%)
+   Amarula Solutions                 1 (0.7%)
+   Socionext Inc.                    1 (0.7%)
+   NXP                               1 (0.7%)
+   Linaro                            1 (0.7%)
+   Renesas Electronics               1 (0.7%)
+   Atmel                             1 (0.7%)
+   ST Microelectronics               1 (0.7%)
+   Intel                             1 (0.7%)
+   MIPS                              1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2017.03.rst b/doc/develop/statistics/u-boot-stats-v2017.03.rst
new file mode 100644
index 00000000000..bce2fe17092
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2017.03.rst
@@ -0,0 +1,591 @@
+:orphan:
+
+Release Statistics for U-Boot v2017.03
+======================================
+
+* Processed 664 changesets from 126 developers
+
+* 29 employers found
+
+* A total of 41330 lines added, 31385 removed (delta 9945)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   102 (15.4%)
+   Simon Glass                       82 (12.3%)
+   Tom Rini                          42 (6.3%)
+   Jaehoon Chung                     25 (3.8%)
+   Andre Przywara                    19 (2.9%)
+   Michal Simek                      19 (2.9%)
+   Hou Zhiqiang                      17 (2.6%)
+   Minghuan Lian                     15 (2.3%)
+   Andrew F. Davis                   14 (2.1%)
+   Patrick Delaunay                  13 (2.0%)
+   Bin Meng                          13 (2.0%)
+   Mario Six                         13 (2.0%)
+   Stefan Roese                      10 (1.5%)
+   Moritz Fischer                    9 (1.4%)
+   Michael Kurz                      9 (1.4%)
+   Emmanuel Vadot                    8 (1.2%)
+   Prabhakar Kushwaha                8 (1.2%)
+   Ladislav Michl                    7 (1.1%)
+   Kever Yang                        7 (1.1%)
+   Peng Fan                          7 (1.1%)
+   Yangbo Lu                         7 (1.1%)
+   Sjoerd Simons                     7 (1.1%)
+   Markus Niebel                     6 (0.9%)
+   Phil Edworthy                     6 (0.9%)
+   Olliver Schinagl                  6 (0.9%)
+   Tang Yuantian                     6 (0.9%)
+   Adam Ford                         5 (0.8%)
+   Lokesh Vutla                      5 (0.8%)
+   Jacob Chen                        5 (0.8%)
+   Maxim Sloyko                      5 (0.8%)
+   Mugunthan V N                     5 (0.8%)
+   Jagan Teki                        5 (0.8%)
+   Siva Durga Prasad Paladugu        5 (0.8%)
+   Wenyou Yang                       4 (0.6%)
+   Andy Shevchenko                   4 (0.6%)
+   Fabio Estevam                     4 (0.6%)
+   Chris Packham                     4 (0.6%)
+   Mike Looijmans                    4 (0.6%)
+   Stefan Agner                      4 (0.6%)
+   Philipp Tomsich                   3 (0.5%)
+   Nickey Yang Nickey Yang           3 (0.5%)
+   Felipe Balbi                      3 (0.5%)
+   Vincent Tinelli                   3 (0.5%)
+   Peter Robinson                    3 (0.5%)
+   Breno Lima                        3 (0.5%)
+   Romain Perier                     3 (0.5%)
+   Robert P. J. Day                  3 (0.5%)
+   York Sun                          3 (0.5%)
+   Marcin Niestroj                   3 (0.5%)
+   Uri Mashiach                      3 (0.5%)
+   Andreas Färber                    3 (0.5%)
+   Fabien Parent                     3 (0.5%)
+   Tomas Melin                       3 (0.5%)
+   Jens Kuske                        3 (0.5%)
+   Kotaro Hayashi                    2 (0.3%)
+   Dalon Westergreen                 2 (0.3%)
+   Mark Marshall                     2 (0.3%)
+   Dirk Eibach                       2 (0.3%)
+   Lukasz Majewski                   2 (0.3%)
+   Gary Bisson                       2 (0.3%)
+   Tony O'Brien                      2 (0.3%)
+   Wenbin Song                       2 (0.3%)
+   Udit Agarwal                      2 (0.3%)
+   Icenowy Zheng                     2 (0.3%)
+   Oded Gabbay                       2 (0.3%)
+   Matthijs van Duin                 1 (0.2%)
+   Jörg Krause                       1 (0.2%)
+   Ryan Harkin                       1 (0.2%)
+   Rask Ingemann Lambertsen          1 (0.2%)
+   Nathan Rossi                      1 (0.2%)
+   Heiko Schocher                    1 (0.2%)
+   Albert ARIBAUD                    1 (0.2%)
+   Jonathan Golder                   1 (0.2%)
+   J. Tang                           1 (0.2%)
+   Andrey Yurovsky                   1 (0.2%)
+   Axel Haslam                       1 (0.2%)
+   Semen Protsenko                   1 (0.2%)
+   Eddie Cai                         1 (0.2%)
+   Fiach Antaw                       1 (0.2%)
+   John Haechten                     1 (0.2%)
+   Lars Poeschel                     1 (0.2%)
+   Keerthy                           1 (0.2%)
+   Jean-Jacques Hiblot               1 (0.2%)
+   Albert ARIBAUD (3ADEV)            1 (0.2%)
+   Joe Hershberger                   1 (0.2%)
+   Grygorii Strashko                 1 (0.2%)
+   Dan Murphy                        1 (0.2%)
+   Dinh Nguyen                       1 (0.2%)
+   Alex                              1 (0.2%)
+   Daniel Strnad                     1 (0.2%)
+   Heiner Kallweit                   1 (0.2%)
+   Anatolij Gustschin                1 (0.2%)
+   Reinhard Pfau                     1 (0.2%)
+   Bogdan Purcareata                 1 (0.2%)
+   Patrick Bruenn                    1 (0.2%)
+   Scott Wood                        1 (0.2%)
+   Stefan Brüns                      1 (0.2%)
+   Alexey Brodkin                    1 (0.2%)
+   Martin Kaiser                     1 (0.2%)
+   Konstantin Porotchkin             1 (0.2%)
+   Darwin Dingel                     1 (0.2%)
+   Cédric Schieli                    1 (0.2%)
+   Rick Altherr                      1 (0.2%)
+   Tuomas Tynkkynen                  1 (0.2%)
+   Stefan Herbrechtsmeier            1 (0.2%)
+   Wataru Okoshi                     1 (0.2%)
+   Sven Ebenfeld                     1 (0.2%)
+   Heinrich Schuchardt               1 (0.2%)
+   Sébastien Szymanski               1 (0.2%)
+   Alison Wang                       1 (0.2%)
+   Mingkai Hu                        1 (0.2%)
+   Priyanka Jain                     1 (0.2%)
+   Changming Huang                   1 (0.2%)
+   Javier Martinez Canillas          1 (0.2%)
+   Priit Laes                        1 (0.2%)
+   Jelle van der Waa                 1 (0.2%)
+   Meng Yi                           1 (0.2%)
+   Mark Kettenis                     1 (0.2%)
+   George McCollister                1 (0.2%)
+   David Gibson                      1 (0.2%)
+   Martin Michlmayr                  1 (0.2%)
+   Kamensky Ivan                     1 (0.2%)
+   Stefan Krsmanovic                 1 (0.2%)
+   Shubhrajyoti Datta                1 (0.2%)
+   Sudeep Holla                      1 (0.2%)
+   Sai Pavan Boddu                   1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          21331 (35.5%)
+   Masahiro Yamada                   8216 (13.7%)
+   Peng Fan                          3658 (6.1%)
+   Simon Glass                       3338 (5.6%)
+   Michael Kurz                      2570 (4.3%)
+   Maxim Sloyko                      1954 (3.2%)
+   Mario Six                         1951 (3.2%)
+   Minghuan Lian                     1945 (3.2%)
+   Patrick Delaunay                  1825 (3.0%)
+   Hou Zhiqiang                      1406 (2.3%)
+   Lukasz Majewski                   1246 (2.1%)
+   Jagan Teki                        1108 (1.8%)
+   Jaehoon Chung                     862 (1.4%)
+   Uri Mashiach                      844 (1.4%)
+   Marcin Niestroj                   757 (1.3%)
+   Stefan Roese                      608 (1.0%)
+   John Haechten                     517 (0.9%)
+   George McCollister                408 (0.7%)
+   Wenbin Song                       307 (0.5%)
+   Siva Durga Prasad Paladugu        300 (0.5%)
+   Andre Przywara                    282 (0.5%)
+   Prabhakar Kushwaha                279 (0.5%)
+   Moritz Fischer                    275 (0.5%)
+   Jens Kuske                        265 (0.4%)
+   Michal Simek                      231 (0.4%)
+   Mugunthan V N                     228 (0.4%)
+   Sjoerd Simons                     197 (0.3%)
+   Icenowy Zheng                     164 (0.3%)
+   Andrew F. Davis                   154 (0.3%)
+   Jacob Chen                        148 (0.2%)
+   Bin Meng                          145 (0.2%)
+   Tomas Melin                       145 (0.2%)
+   Adam Ford                         143 (0.2%)
+   Olliver Schinagl                  131 (0.2%)
+   Emmanuel Vadot                    129 (0.2%)
+   Yangbo Lu                         111 (0.2%)
+   Stefan Agner                      102 (0.2%)
+   Bogdan Purcareata                 101 (0.2%)
+   Alex                              92 (0.2%)
+   Lokesh Vutla                      85 (0.1%)
+   Dan Murphy                        81 (0.1%)
+   Philipp Tomsich                   77 (0.1%)
+   Kever Yang                        75 (0.1%)
+   Tang Yuantian                     71 (0.1%)
+   Dirk Eibach                       68 (0.1%)
+   Robert P. J. Day                  67 (0.1%)
+   Ladislav Michl                    66 (0.1%)
+   Dalon Westergreen                 64 (0.1%)
+   Wenyou Yang                       63 (0.1%)
+   Udit Agarwal                      54 (0.1%)
+   Stefan Herbrechtsmeier            52 (0.1%)
+   Nickey Yang Nickey Yang           51 (0.1%)
+   Alison Wang                       47 (0.1%)
+   Heiko Schocher                    46 (0.1%)
+   Fabien Parent                     40 (0.1%)
+   Joe Hershberger                   36 (0.1%)
+   Fabio Estevam                     33 (0.1%)
+   Mingkai Hu                        29 (0.0%)
+   Andy Shevchenko                   28 (0.0%)
+   Tuomas Tynkkynen                  27 (0.0%)
+   Meng Yi                           27 (0.0%)
+   Axel Haslam                       23 (0.0%)
+   Eddie Cai                         23 (0.0%)
+   Markus Niebel                     22 (0.0%)
+   Martin Kaiser                     22 (0.0%)
+   Konstantin Porotchkin             22 (0.0%)
+   Andreas Färber                    21 (0.0%)
+   Tony O'Brien                      21 (0.0%)
+   Phil Edworthy                     20 (0.0%)
+   Priyanka Jain                     20 (0.0%)
+   Chris Packham                     18 (0.0%)
+   Darwin Dingel                     17 (0.0%)
+   Stefan Krsmanovic                 17 (0.0%)
+   Rick Altherr                      16 (0.0%)
+   Changming Huang                   13 (0.0%)
+   Vincent Tinelli                   12 (0.0%)
+   Peter Robinson                    12 (0.0%)
+   Fiach Antaw                       12 (0.0%)
+   Jelle van der Waa                 11 (0.0%)
+   Patrick Bruenn                    10 (0.0%)
+   Kotaro Hayashi                    9 (0.0%)
+   Oded Gabbay                       9 (0.0%)
+   Dinh Nguyen                       9 (0.0%)
+   Felipe Balbi                      8 (0.0%)
+   York Sun                          8 (0.0%)
+   Lars Poeschel                     7 (0.0%)
+   Mike Looijmans                    6 (0.0%)
+   Cédric Schieli                    6 (0.0%)
+   David Gibson                      6 (0.0%)
+   Mark Marshall                     5 (0.0%)
+   Gary Bisson                       5 (0.0%)
+   Albert ARIBAUD (3ADEV)            5 (0.0%)
+   Sai Pavan Boddu                   5 (0.0%)
+   Jean-Jacques Hiblot               4 (0.0%)
+   Anatolij Gustschin                4 (0.0%)
+   Stefan Brüns                      4 (0.0%)
+   Javier Martinez Canillas          4 (0.0%)
+   Shubhrajyoti Datta                4 (0.0%)
+   Breno Lima                        3 (0.0%)
+   Romain Perier                     3 (0.0%)
+   Ryan Harkin                       2 (0.0%)
+   Jonathan Golder                   2 (0.0%)
+   Semen Protsenko                   2 (0.0%)
+   Grygorii Strashko                 2 (0.0%)
+   Reinhard Pfau                     2 (0.0%)
+   Wataru Okoshi                     2 (0.0%)
+   Kamensky Ivan                     2 (0.0%)
+   Sudeep Holla                      2 (0.0%)
+   Matthijs van Duin                 1 (0.0%)
+   Jörg Krause                       1 (0.0%)
+   Rask Ingemann Lambertsen          1 (0.0%)
+   Nathan Rossi                      1 (0.0%)
+   Albert ARIBAUD                    1 (0.0%)
+   J. Tang                           1 (0.0%)
+   Andrey Yurovsky                   1 (0.0%)
+   Keerthy                           1 (0.0%)
+   Daniel Strnad                     1 (0.0%)
+   Heiner Kallweit                   1 (0.0%)
+   Scott Wood                        1 (0.0%)
+   Alexey Brodkin                    1 (0.0%)
+   Sven Ebenfeld                     1 (0.0%)
+   Heinrich Schuchardt               1 (0.0%)
+   Sébastien Szymanski               1 (0.0%)
+   Priit Laes                        1 (0.0%)
+   Mark Kettenis                     1 (0.0%)
+   Martin Michlmayr                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          10466 (33.3%)
+   Jagan Teki                        687 (2.2%)
+   Lokesh Vutla                      47 (0.1%)
+   Jacob Chen                        28 (0.1%)
+   Fabio Estevam                     21 (0.1%)
+   Emmanuel Vadot                    20 (0.1%)
+   Rick Altherr                      13 (0.0%)
+   Peter Robinson                    8 (0.0%)
+   Lars Poeschel                     7 (0.0%)
+   Martin Kaiser                     6 (0.0%)
+   Robert P. J. Day                  5 (0.0%)
+   Reinhard Pfau                     2 (0.0%)
+   Phil Edworthy                     1 (0.0%)
+   Daniel Strnad                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 111)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Hou Zhiqiang                      19 (17.1%)
+   Michal Simek                      16 (14.4%)
+   Stefan Roese                      15 (13.5%)
+   Minkyu Kang                       13 (11.7%)
+   Simon Glass                       9 (8.1%)
+   Romain Perier                     6 (5.4%)
+   Andre Przywara                    5 (4.5%)
+   Andy Shevchenko                   4 (3.6%)
+   Masahiro Yamada                   3 (2.7%)
+   Olliver Schinagl                  2 (1.8%)
+   Abhimanyu Saini                   2 (1.8%)
+   Sumit Garg                        2 (1.8%)
+   Mingkai Hu                        2 (1.8%)
+   Mario Six                         2 (1.8%)
+   Tom Rini                          1 (0.9%)
+   Reinhard Pfau                     1 (0.9%)
+   Grygorii Strashko                 1 (0.9%)
+   Brennan Ashton                    1 (0.9%)
+   Gong Qianyu                       1 (0.9%)
+   Mateusz Kulikowski                1 (0.9%)
+   Pratiyush Srivastava              1 (0.9%)
+   Ladislav Michl                    1 (0.9%)
+   Stefan Agner                      1 (0.9%)
+   Dirk Eibach                       1 (0.9%)
+   Prabhakar Kushwaha                1 (0.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 361)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       86 (23.8%)
+   Bin Meng                          71 (19.7%)
+   York Sun                          70 (19.4%)
+   Tom Rini                          41 (11.4%)
+   Jagan Teki                        27 (7.5%)
+   Stefan Roese                      16 (4.4%)
+   Jaehoon Chung                     10 (2.8%)
+   Alexander Graf                    7 (1.9%)
+   Marek Vasut                       7 (1.9%)
+   Joe Hershberger                   3 (0.8%)
+   Lokesh Vutla                      2 (0.6%)
+   Thomas Graziadei                  2 (0.6%)
+   Chris Packham                     2 (0.6%)
+   Javier Martinez Canillas          2 (0.6%)
+   Michal Simek                      1 (0.3%)
+   Andre Przywara                    1 (0.3%)
+   Prabhakar Kushwaha                1 (0.3%)
+   Rick Altherr                      1 (0.3%)
+   Linus Walleij                     1 (0.3%)
+   Joakim Tjernlund                  1 (0.3%)
+   Stefano Babic                     1 (0.3%)
+   Vikas Manocha                     1 (0.3%)
+   Hamish Martin                     1 (0.3%)
+   Joel Stanley                      1 (0.3%)
+   Eric Nelson                       1 (0.3%)
+   Chen-Yu Tsai                      1 (0.3%)
+   Anatolij Gustschin                1 (0.3%)
+   Gary Bisson                       1 (0.3%)
+   Heiko Schocher                    1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       3 (14.3%)
+   Lokesh Vutla                      2 (9.5%)
+   Heiko Schocher                    2 (9.5%)
+   Ryan Harkin                       2 (9.5%)
+   Adam Ford                         2 (9.5%)
+   Bin Meng                          1 (4.8%)
+   Michal Simek                      1 (4.8%)
+   Masahiro Yamada                   1 (4.8%)
+   Ladislav Michl                    1 (4.8%)
+   Breno Lima                        1 (4.8%)
+   Priit Laes                        1 (4.8%)
+   Arno Steffens                     1 (4.8%)
+   Aparna Balasubramanian            1 (4.8%)
+   Oleksandr Tymoshenko              1 (4.8%)
+   Steve Rae                         1 (4.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          3 (14.3%)
+   Masahiro Yamada                   2 (9.5%)
+   Andre Przywara                    2 (9.5%)
+   Alison Wang                       2 (9.5%)
+   Moritz Fischer                    2 (9.5%)
+   Lokesh Vutla                      1 (4.8%)
+   Heiko Schocher                    1 (4.8%)
+   Adam Ford                         1 (4.8%)
+   Peter Robinson                    1 (4.8%)
+   Nathan Rossi                      1 (4.8%)
+   Stefan Brüns                      1 (4.8%)
+   Cédric Schieli                    1 (4.8%)
+   Wenyou Yang                       1 (4.8%)
+   Andrew F. Davis                   1 (4.8%)
+   Mugunthan V N                     1 (4.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Dan Murphy                        3 (30.0%)
+   Heiko Schocher                    1 (10.0%)
+   Arno Steffens                     1 (10.0%)
+   Oleksandr Tymoshenko              1 (10.0%)
+   Yogesh Siraswar                   1 (10.0%)
+   Thomas Schaefer                   1 (10.0%)
+   Ken Ma                            1 (10.0%)
+   Jens Kuske                        1 (10.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Lokesh Vutla                      3 (30.0%)
+   Tom Rini                          2 (20.0%)
+   Andre Przywara                    1 (10.0%)
+   Nathan Rossi                      1 (10.0%)
+   Stefan Brüns                      1 (10.0%)
+   Andrew F. Davis                   1 (10.0%)
+   Michal Simek                      1 (10.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   (Unknown)                           215 (32.4%)
+   Socionext Inc.                      105 (15.8%)
+   Google, Inc.                        88 (13.3%)
+   Konsulko Group                      42 (6.3%)
+   Texas Instruments                   28 (4.2%)
+   Samsung                             26 (3.9%)
+   ARM                                 20 (3.0%)
+   AMD                                 19 (2.9%)
+   Guntermann & Drunck                 16 (2.4%)
+   Rockchip                            15 (2.3%)
+   DENX Software Engineering           14 (2.1%)
+   ST Microelectronics                 12 (1.8%)
+   Collabora Ltd.                      10 (1.5%)
+   Intel                               10 (1.5%)
+   Xilinx                              7 (1.1%)
+   Renesas Electronics                 6 (0.9%)
+   Atmel                               4 (0.6%)
+   BayLibre SAS                        4 (0.6%)
+   Openedev                            4 (0.6%)
+   Toradex                             4 (0.6%)
+   CompuLab                            3 (0.5%)
+   Novell                              3 (0.5%)
+   Boundary Devices                    2 (0.3%)
+   Linaro                              2 (0.3%)
+   Amarula Solutions                   1 (0.2%)
+   NXP                                 1 (0.2%)
+   Marvell                             1 (0.2%)
+   National Instruments                1 (0.2%)
+   Weidmüller Interface GmbH & Co. KG  1 (0.2%)
+   ==================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   Konsulko Group                      21331 (35.5%)
+   (Unknown)                           14394 (23.9%)
+   Socionext Inc.                      8227 (13.7%)
+   Google, Inc.                        5308 (8.8%)
+   Guntermann & Drunck                 2021 (3.4%)
+   DENX Software Engineering           1904 (3.2%)
+   ST Microelectronics                 1801 (3.0%)
+   Openedev                            1105 (1.8%)
+   Samsung                             866 (1.4%)
+   CompuLab                            844 (1.4%)
+   Texas Instruments                   555 (0.9%)
+   Xilinx                              309 (0.5%)
+   ARM                                 284 (0.5%)
+   Rockchip                            274 (0.5%)
+   AMD                                 231 (0.4%)
+   Collabora Ltd.                      200 (0.3%)
+   Toradex                             102 (0.2%)
+   Atmel                               63 (0.1%)
+   BayLibre SAS                        63 (0.1%)
+   Weidmüller Interface GmbH & Co. KG  52 (0.1%)
+   Intel                               48 (0.1%)
+   NXP                                 47 (0.1%)
+   National Instruments                36 (0.1%)
+   Marvell                             22 (0.0%)
+   Novell                              21 (0.0%)
+   Renesas Electronics                 20 (0.0%)
+   Boundary Devices                    5 (0.0%)
+   Linaro                              4 (0.0%)
+   Amarula Solutions                   3 (0.0%)
+   ==================================  =====
+
+
+.. table:: Employers with the most signoffs (total 111)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         33 (29.7%)
+   Xilinx                            16 (14.4%)
+   DENX Software Engineering         15 (13.5%)
+   Samsung                           13 (11.7%)
+   Google, Inc.                      9 (8.1%)
+   Collabora Ltd.                    6 (5.4%)
+   ARM                               5 (4.5%)
+   Guntermann & Drunck               4 (3.6%)
+   Intel                             4 (3.6%)
+   Socionext Inc.                    3 (2.7%)
+   Konsulko Group                    1 (0.9%)
+   Texas Instruments                 1 (0.9%)
+   Toradex                           1 (0.9%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 128)
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   (Unknown)                           74 (57.8%)
+   Texas Instruments                   7 (5.5%)
+   DENX Software Engineering           4 (3.1%)
+   Xilinx                              3 (2.3%)
+   Google, Inc.                        3 (2.3%)
+   Guntermann & Drunck                 3 (2.3%)
+   Intel                               3 (2.3%)
+   Socionext Inc.                      3 (2.3%)
+   Rockchip                            3 (2.3%)
+   Samsung                             2 (1.6%)
+   Collabora Ltd.                      2 (1.6%)
+   ARM                                 2 (1.6%)
+   BayLibre SAS                        2 (1.6%)
+   Linaro                              2 (1.6%)
+   Konsulko Group                      1 (0.8%)
+   Toradex                             1 (0.8%)
+   ST Microelectronics                 1 (0.8%)
+   Openedev                            1 (0.8%)
+   CompuLab                            1 (0.8%)
+   AMD                                 1 (0.8%)
+   Atmel                               1 (0.8%)
+   Weidmüller Interface GmbH & Co. KG  1 (0.8%)
+   NXP                                 1 (0.8%)
+   National Instruments                1 (0.8%)
+   Marvell                             1 (0.8%)
+   Novell                              1 (0.8%)
+   Renesas Electronics                 1 (0.8%)
+   Boundary Devices                    1 (0.8%)
+   Amarula Solutions                   1 (0.8%)
+   ==================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2017.05.rst b/doc/develop/statistics/u-boot-stats-v2017.05.rst
new file mode 100644
index 00000000000..39e76846a7c
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2017.05.rst
@@ -0,0 +1,651 @@
+:orphan:
+
+Release Statistics for U-Boot v2017.05
+======================================
+
+* Processed 915 changesets from 139 developers
+
+* 29 employers found
+
+* A total of 86135 lines added, 116801 removed (delta -30666)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       86 (9.4%)
+   Stefan Roese                      37 (4.0%)
+   Philipp Tomsich                   34 (3.7%)
+   Konstantin Porotchkin             34 (3.7%)
+   Heiko Stuebner                    33 (3.6%)
+   Wenyou Yang                       30 (3.3%)
+   Jagan Teki                        27 (3.0%)
+   Tom Rini                          25 (2.7%)
+   Thomas Petazzoni                  23 (2.5%)
+   Peng Fan                          21 (2.3%)
+   Heinrich Schuchardt               20 (2.2%)
+   Kever Yang                        20 (2.2%)
+   Masahiro Yamada                   19 (2.1%)
+   Andrew F. Davis                   17 (1.9%)
+   Tim Harvey                        17 (1.9%)
+   Andre Przywara                    16 (1.7%)
+   Lokesh Vutla                      15 (1.6%)
+   Maxime Ripard                     15 (1.6%)
+   York Sun                          15 (1.6%)
+   Chen-Yu Tsai                      15 (1.6%)
+   Vikas Manocha                     15 (1.6%)
+   Hou Zhiqiang                      14 (1.5%)
+   Jean-Jacques Hiblot               14 (1.5%)
+   Stefan Agner                      14 (1.5%)
+   Jaehoon Chung                     13 (1.4%)
+   Patrice Chotard                   12 (1.3%)
+   Eddie Cai                         11 (1.2%)
+   Stefan Herbrechtsmeier            10 (1.1%)
+   Dalon Westergreen                 9 (1.0%)
+   Mylène Josserand                  9 (1.0%)
+   Lukasz Majewski                   9 (1.0%)
+   Vinitha Pillai                    8 (0.9%)
+   Jernej Skrabec                    8 (0.9%)
+   Felipe Balbi                      8 (0.9%)
+   Markus Niebel                     8 (0.9%)
+   Alexey Brodkin                    7 (0.8%)
+   Bharat Bhushan                    7 (0.8%)
+   Roger Quadros                     7 (0.8%)
+   Sumit Garg                        6 (0.7%)
+   Marek Vasut                       6 (0.7%)
+   Yung-Ching LIN                    6 (0.7%)
+   Sekhar Nori                       6 (0.7%)
+   Vlad Zakharov                     6 (0.7%)
+   Liam Beguin                       6 (0.7%)
+   Stefano Babic                     5 (0.5%)
+   Alexandru Gagniuc                 5 (0.5%)
+   Madan Srinivas                    5 (0.5%)
+   Mario Six                         5 (0.5%)
+   Fabio Estevam                     4 (0.4%)
+   Icenowy Zheng                     4 (0.4%)
+   Santan Kumar                      4 (0.4%)
+   Priyanka Jain                     4 (0.4%)
+   Ruchika Gupta                     4 (0.4%)
+   Eric Gao                          4 (0.4%)
+   Ye Li                             4 (0.4%)
+   Jacob Chen                        4 (0.4%)
+   Adam Ford                         3 (0.3%)
+   Udit Agarwal                      3 (0.3%)
+   Tyler Hall                        3 (0.3%)
+   George McCollister                3 (0.3%)
+   Vignesh R                         3 (0.3%)
+   Andy Shevchenko                   3 (0.3%)
+   Vitaly Andrianov                  3 (0.3%)
+   Robert Nelson                     3 (0.3%)
+   Boris Brezillon                   3 (0.3%)
+   Marcel Ziswiler                   3 (0.3%)
+   Sébastien Szymanski               3 (0.3%)
+   Yuantian Tang                     2 (0.2%)
+   Kyle Edwards                      2 (0.2%)
+   Bin Meng                          2 (0.2%)
+   Jelle van der Waa                 2 (0.2%)
+   Shengzhou Liu                     2 (0.2%)
+   Ashish kumar                      2 (0.2%)
+   Prabhakar Kushwaha                2 (0.2%)
+   Songjun Wu                        2 (0.2%)
+   Ley Foon Tan                      2 (0.2%)
+   Heiner Kallweit                   2 (0.2%)
+   Cooper Jr., Franklin              2 (0.2%)
+   Nobuhiro Iwamatsu                 2 (0.2%)
+   Dirk Eibach                       2 (0.2%)
+   Rabeeh Khoury                     2 (0.2%)
+   Xu Ziyuan                         2 (0.2%)
+   Kevin Liu                         2 (0.2%)
+   Suresh Gupta                      2 (0.2%)
+   Olliver Schinagl                  2 (0.2%)
+   Ladislav Michl                    2 (0.2%)
+   Siarhei Siamashka                 2 (0.2%)
+   Hannes Schmelzer                  1 (0.1%)
+   Suniel Mahesh                     1 (0.1%)
+   Moritz Fischer                    1 (0.1%)
+   Vagrant Cascadian                 1 (0.1%)
+   Andreas Färber                    1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Josua Mayer                       1 (0.1%)
+   Michal Simek                      1 (0.1%)
+   Mike Looijmans                    1 (0.1%)
+   Alison Wang                       1 (0.1%)
+   Yangbo Lu                         1 (0.1%)
+   Thomas Schaefer                   1 (0.1%)
+   Klaus Goger                       1 (0.1%)
+   Mugunthan V N                     1 (0.1%)
+   Troy Kisky                        1 (0.1%)
+   Tien Fong Chee                    1 (0.1%)
+   Georges Savoundararadj            1 (0.1%)
+   Stephen Arnold                    1 (0.1%)
+   Sanchayan Maity                   1 (0.1%)
+   Alex Deymo                        1 (0.1%)
+   Jocelyn Bohr                      1 (0.1%)
+   Carlo Caione                      1 (0.1%)
+   Alyssa Rosenzweig                 1 (0.1%)
+   tim.chick                         1 (0.1%)
+   Breno Lima                        1 (0.1%)
+   Joel Stanley                      1 (0.1%)
+   Vincent Tinelli                   1 (0.1%)
+   Misael Lopez Cruz                 1 (0.1%)
+   Joakim Tjernlund                  1 (0.1%)
+   Robert Clausecker                 1 (0.1%)
+   Florent Jacquet                   1 (0.1%)
+   Rask Ingemann Lambertsen          1 (0.1%)
+   Hans de Goede                     1 (0.1%)
+   Jakob Unterwurzacher              1 (0.1%)
+   Yingxi Yu                         1 (0.1%)
+   Wenbin Song                       1 (0.1%)
+   yuan linyu                        1 (0.1%)
+   Sylvain Lemieux                   1 (0.1%)
+   Felix Brack                       1 (0.1%)
+   James Balean                      1 (0.1%)
+   Tuomas Tynkkynen                  1 (0.1%)
+   Alexandre Messier                 1 (0.1%)
+   Suji Velupillai                   1 (0.1%)
+   Jon Mason                         1 (0.1%)
+   Axel Haslam                       1 (0.1%)
+   Max Filippov                      1 (0.1%)
+   Tero Kristo                       1 (0.1%)
+   Robert P. J. Day                  1 (0.1%)
+   Nishanth Menon                    1 (0.1%)
+   Sebastien Colleur                 1 (0.1%)
+   Phil Edworthy                     1 (0.1%)
+   Tang Yuantian                     1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          101228 (52.1%)
+   Peng Fan                          12134 (6.3%)
+   Wenyou Yang                       8585 (4.4%)
+   Kever Yang                        7187 (3.7%)
+   Heiko Stuebner                    5956 (3.1%)
+   Patrice Chotard                   5445 (2.8%)
+   Dirk Eibach                       5152 (2.7%)
+   Masahiro Yamada                   5117 (2.6%)
+   Simon Glass                       3435 (1.8%)
+   Philipp Tomsich                   3289 (1.7%)
+   Marcel Ziswiler                   3125 (1.6%)
+   Jernej Skrabec                    2535 (1.3%)
+   Maxime Ripard                     2191 (1.1%)
+   Dalon Westergreen                 1730 (0.9%)
+   Stefan Roese                      1546 (0.8%)
+   Jagan Teki                        1408 (0.7%)
+   Sébastien Szymanski               1399 (0.7%)
+   Konstantin Porotchkin             1380 (0.7%)
+   Stefan Herbrechtsmeier            1311 (0.7%)
+   Heiner Kallweit                   1207 (0.6%)
+   Adam Ford                         1157 (0.6%)
+   Ye Li                             1067 (0.5%)
+   Vikas Manocha                     994 (0.5%)
+   Tim Harvey                        886 (0.5%)
+   York Sun                          828 (0.4%)
+   Vlad Zakharov                     754 (0.4%)
+   Thomas Petazzoni                  683 (0.4%)
+   Icenowy Zheng                     620 (0.3%)
+   Rabeeh Khoury                     588 (0.3%)
+   Chen-Yu Tsai                      561 (0.3%)
+   Mario Six                         516 (0.3%)
+   Songjun Wu                        459 (0.2%)
+   Felipe Balbi                      436 (0.2%)
+   Stefan Agner                      417 (0.2%)
+   Rask Ingemann Lambertsen          410 (0.2%)
+   Andre Przywara                    402 (0.2%)
+   Carlo Caione                      387 (0.2%)
+   Jaehoon Chung                     361 (0.2%)
+   Hou Zhiqiang                      339 (0.2%)
+   Chris Packham                     283 (0.1%)
+   Klaus Goger                       281 (0.1%)
+   Markus Niebel                     278 (0.1%)
+   Sumit Garg                        272 (0.1%)
+   Ruchika Gupta                     270 (0.1%)
+   Jean-Jacques Hiblot               268 (0.1%)
+   Roger Quadros                     254 (0.1%)
+   Andrew F. Davis                   237 (0.1%)
+   Priyanka Jain                     227 (0.1%)
+   Liam Beguin                       224 (0.1%)
+   Andy Shevchenko                   211 (0.1%)
+   Vignesh R                         192 (0.1%)
+   Lokesh Vutla                      187 (0.1%)
+   Mylène Josserand                  178 (0.1%)
+   Lukasz Majewski                   172 (0.1%)
+   Vinitha Pillai                    170 (0.1%)
+   Jon Mason                         160 (0.1%)
+   Felix Brack                       153 (0.1%)
+   Stefano Babic                     151 (0.1%)
+   Hannes Schmelzer                  146 (0.1%)
+   Eddie Cai                         143 (0.1%)
+   Stephen Arnold                    136 (0.1%)
+   Bharat Bhushan                    133 (0.1%)
+   Alexandru Gagniuc                 133 (0.1%)
+   Vitaly Andrianov                  125 (0.1%)
+   Jelle van der Waa                 121 (0.1%)
+   Phil Edworthy                     118 (0.1%)
+   Sekhar Nori                       114 (0.1%)
+   Udit Agarwal                      105 (0.1%)
+   Alexey Brodkin                    70 (0.0%)
+   Nishanth Menon                    70 (0.0%)
+   Prabhakar Kushwaha                66 (0.0%)
+   Yung-Ching LIN                    64 (0.0%)
+   Eric Gao                          64 (0.0%)
+   Tyler Hall                        62 (0.0%)
+   Suji Velupillai                   60 (0.0%)
+   Bin Meng                          56 (0.0%)
+   Cooper Jr., Franklin              47 (0.0%)
+   Breno Lima                        47 (0.0%)
+   Heinrich Schuchardt               45 (0.0%)
+   Jacob Chen                        45 (0.0%)
+   Axel Haslam                       41 (0.0%)
+   Marek Vasut                       39 (0.0%)
+   Madan Srinivas                    39 (0.0%)
+   Yuantian Tang                     37 (0.0%)
+   Thomas Schaefer                   36 (0.0%)
+   Boris Brezillon                   32 (0.0%)
+   Olliver Schinagl                  31 (0.0%)
+   Siarhei Siamashka                 31 (0.0%)
+   Sanchayan Maity                   30 (0.0%)
+   Ashish kumar                      29 (0.0%)
+   Ley Foon Tan                      28 (0.0%)
+   Nobuhiro Iwamatsu                 28 (0.0%)
+   Santan Kumar                      27 (0.0%)
+   yuan linyu                        27 (0.0%)
+   Moritz Fischer                    24 (0.0%)
+   Mugunthan V N                     23 (0.0%)
+   Robert Nelson                     21 (0.0%)
+   Ladislav Michl                    20 (0.0%)
+   Florent Jacquet                   19 (0.0%)
+   Wenbin Song                       16 (0.0%)
+   Tien Fong Chee                    14 (0.0%)
+   Alex Deymo                        11 (0.0%)
+   James Balean                      10 (0.0%)
+   Fabio Estevam                     9 (0.0%)
+   George McCollister                8 (0.0%)
+   Shengzhou Liu                     8 (0.0%)
+   Xu Ziyuan                         8 (0.0%)
+   Kevin Liu                         8 (0.0%)
+   Georges Savoundararadj            8 (0.0%)
+   tim.chick                         8 (0.0%)
+   Joel Stanley                      8 (0.0%)
+   Robert P. J. Day                  8 (0.0%)
+   Andreas Färber                    7 (0.0%)
+   Hans de Goede                     7 (0.0%)
+   Tuomas Tynkkynen                  7 (0.0%)
+   Tero Kristo                       7 (0.0%)
+   Kyle Edwards                      6 (0.0%)
+   Jocelyn Bohr                      6 (0.0%)
+   Suresh Gupta                      5 (0.0%)
+   Josua Mayer                       5 (0.0%)
+   Robert Clausecker                 4 (0.0%)
+   Troy Kisky                        3 (0.0%)
+   Sylvain Lemieux                   3 (0.0%)
+   Yangbo Lu                         2 (0.0%)
+   Vincent Tinelli                   2 (0.0%)
+   Jakob Unterwurzacher              2 (0.0%)
+   Yingxi Yu                         2 (0.0%)
+   Sebastien Colleur                 2 (0.0%)
+   Tang Yuantian                     2 (0.0%)
+   Suniel Mahesh                     1 (0.0%)
+   Vagrant Cascadian                 1 (0.0%)
+   Michal Simek                      1 (0.0%)
+   Mike Looijmans                    1 (0.0%)
+   Alison Wang                       1 (0.0%)
+   Alyssa Rosenzweig                 1 (0.0%)
+   Misael Lopez Cruz                 1 (0.0%)
+   Joakim Tjernlund                  1 (0.0%)
+   Alexandre Messier                 1 (0.0%)
+   Max Filippov                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          100727 (86.2%)
+   Masahiro Yamada                   2626 (2.2%)
+   Jaehoon Chung                     220 (0.2%)
+   Alexandru Gagniuc                 110 (0.1%)
+   Stefan Herbrechtsmeier            65 (0.1%)
+   York Sun                          29 (0.0%)
+   Nobuhiro Iwamatsu                 27 (0.0%)
+   Mugunthan V N                     11 (0.0%)
+   Xu Ziyuan                         8 (0.0%)
+   Tien Fong Chee                    4 (0.0%)
+   Sylvain Lemieux                   3 (0.0%)
+   Kyle Edwards                      2 (0.0%)
+   Troy Kisky                        2 (0.0%)
+   Jakob Unterwurzacher              2 (0.0%)
+   Tang Yuantian                     2 (0.0%)
+   Suniel Mahesh                     1 (0.0%)
+   Michal Simek                      1 (0.0%)
+   Joakim Tjernlund                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 278)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      63 (22.7%)
+   Simon Glass                       24 (8.6%)
+   Tom Rini                          22 (7.9%)
+   Maxime Ripard                     21 (7.6%)
+   Minkyu Kang                       13 (4.7%)
+   Sumit Garg                        12 (4.3%)
+   Michal Simek                      11 (4.0%)
+   Andrew F. Davis                   9 (3.2%)
+   Ye Li                             8 (2.9%)
+   Sylvain Lemieux                   7 (2.5%)
+   William Zhang                     7 (2.5%)
+   Vinitha Pillai                    6 (2.2%)
+   Sanchayan Maity                   5 (1.8%)
+   Andy Shevchenko                   5 (1.8%)
+   Priyanka Jain                     4 (1.4%)
+   Jagan Teki                        4 (1.4%)
+   Peng Fan                          4 (1.4%)
+   Vincent Tinelli                   3 (1.1%)
+   Tom Warren                        3 (1.1%)
+   Arpit Goel                        3 (1.1%)
+   Andreas Färber                    3 (1.1%)
+   Madan Srinivas                    3 (1.1%)
+   Udit Agarwal                      3 (1.1%)
+   Roger Quadros                     3 (1.1%)
+   Tien Fong Chee                    2 (0.7%)
+   Terry Zhou                        2 (0.7%)
+   Ashish kumar                      2 (0.7%)
+   Mario Six                         2 (0.7%)
+   Rabeeh Khoury                     2 (0.7%)
+   Konstantin Porotchkin             2 (0.7%)
+   Philipp Tomsich                   2 (0.7%)
+   York Sun                          1 (0.4%)
+   Suman Anna                        1 (0.4%)
+   Chenhui Zhao                      1 (0.4%)
+   Steve Arnold                      1 (0.4%)
+   Neil Armstrong                    1 (0.4%)
+   Abhimanyu Saini                   1 (0.4%)
+   Minghuan Lian                     1 (0.4%)
+   Aneesh Bansal                     1 (0.4%)
+   Saksham Jain                      1 (0.4%)
+   Steve Rae                         1 (0.4%)
+   Alex Deymo                        1 (0.4%)
+   Prabhakar Kushwaha                1 (0.4%)
+   Jean-Jacques Hiblot               1 (0.4%)
+   Lokesh Vutla                      1 (0.4%)
+   Carlo Caione                      1 (0.4%)
+   Rask Ingemann Lambertsen          1 (0.4%)
+   Felipe Balbi                      1 (0.4%)
+   Heiner Kallweit                   1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 459)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       118 (25.7%)
+   Tom Rini                          81 (17.6%)
+   York Sun                          77 (16.8%)
+   Jagan Teki                        30 (6.5%)
+   Stefan Roese                      22 (4.8%)
+   Stefano Babic                     19 (4.1%)
+   Lokesh Vutla                      14 (3.1%)
+   Bin Meng                          13 (2.8%)
+   Andreas Bießmann                  10 (2.2%)
+   Ziping Chen                       9 (2.0%)
+   Kever Yang                        9 (2.0%)
+   Lukasz Majewski                   6 (1.3%)
+   Jaehoon Chung                     5 (1.1%)
+   Joe Hershberger                   5 (1.1%)
+   Heiko Schocher                    4 (0.9%)
+   Alison Wang                       4 (0.9%)
+   Hans de Goede                     4 (0.9%)
+   Eddie Cai                         4 (0.9%)
+   Heiko Stuebner                    3 (0.7%)
+   Michal Simek                      2 (0.4%)
+   Alexander Graf                    2 (0.4%)
+   Fabio Estevam                     2 (0.4%)
+   Ruchika Gupta                     2 (0.4%)
+   Maxime Ripard                     1 (0.2%)
+   Sumit Garg                        1 (0.2%)
+   Andreas Färber                    1 (0.2%)
+   Prabhakar Kushwaha                1 (0.2%)
+   Dinh Nguyen                       1 (0.2%)
+   Stefan Brüns                      1 (0.2%)
+   Christian Gmeiner                 1 (0.2%)
+   Arun Parameswaran                 1 (0.2%)
+   JD Zheng                          1 (0.2%)
+   Shamez Kurji                      1 (0.2%)
+   Hannes Schmelzer                  1 (0.2%)
+   Andre Przywara                    1 (0.2%)
+   Stefan Agner                      1 (0.2%)
+   Vikas Manocha                     1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 41)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kever Yang                        16 (39.0%)
+   Klaus Goger                       7 (17.1%)
+   Heiko Stuebner                    3 (7.3%)
+   Vinitha Pillai                    3 (7.3%)
+   Vagrant Cascadian                 3 (7.3%)
+   Andreas Färber                    2 (4.9%)
+   Bin Meng                          1 (2.4%)
+   Philipp Tomsich                   1 (2.4%)
+   Masahiro Yamada                   1 (2.4%)
+   Jakob Unterwurzacher              1 (2.4%)
+   Nickey Yang                       1 (2.4%)
+   Suji Velupillai                   1 (2.4%)
+   Chen-Yu Tsai                      1 (2.4%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 41)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heiko Stuebner                    15 (36.6%)
+   Philipp Tomsich                   8 (19.5%)
+   Simon Glass                       4 (9.8%)
+   Sumit Garg                        3 (7.3%)
+   Heinrich Schuchardt               3 (7.3%)
+   Kever Yang                        1 (2.4%)
+   Masahiro Yamada                   1 (2.4%)
+   Jakob Unterwurzacher              1 (2.4%)
+   Suji Velupillai                   1 (2.4%)
+   Maxime Ripard                     1 (2.4%)
+   Carlo Caione                      1 (2.4%)
+   Eric Gao                          1 (2.4%)
+   Jernej Skrabec                    1 (2.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 7)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Chen-Yu Tsai                      1 (14.3%)
+   Lokesh Vutla                      1 (14.3%)
+   Vishal Mahaveer                   1 (14.3%)
+   Michael Krummsdorf                1 (14.3%)
+   Richard Purdie                    1 (14.3%)
+   Shunji Sato                       1 (14.3%)
+   Sekhar Nori                       1 (14.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 7)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   2 (28.6%)
+   Lokesh Vutla                      1 (14.3%)
+   Maxime Ripard                     1 (14.3%)
+   Tom Rini                          1 (14.3%)
+   Tero Kristo                       1 (14.3%)
+   Markus Niebel                     1 (14.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   (Unknown)                           364 (39.8%)
+   Google, Inc.                        88 (9.6%)
+   Texas Instruments                   76 (8.3%)
+   DENX Software Engineering           57 (6.2%)
+   Free Electrons                      48 (5.2%)
+   Marvell                             34 (3.7%)
+   Atmel                               30 (3.3%)
+   Rockchip                            29 (3.2%)
+   ST Microelectronics                 27 (3.0%)
+   Konsulko Group                      25 (2.7%)
+   Amarula Solutions                   21 (2.3%)
+   Socionext Inc.                      19 (2.1%)
+   Toradex                             18 (2.0%)
+   ARM                                 16 (1.7%)
+   Intel                               16 (1.7%)
+   Samsung                             13 (1.4%)
+   Weidmüller Interface GmbH & Co. KG  10 (1.1%)
+   Guntermann & Drunck                 7 (0.8%)
+   Openedev                            6 (0.7%)
+   Nobuhiro Iwamatsu                   2 (0.2%)
+   AMD                                 1 (0.1%)
+   BayLibre SAS                        1 (0.1%)
+   Boundary Devices                    1 (0.1%)
+   Broadcom                            1 (0.1%)
+   Debian.org                          1 (0.1%)
+   NXP                                 1 (0.1%)
+   Red Hat                             1 (0.1%)
+   Novell                              1 (0.1%)
+   Renesas Electronics                 1 (0.1%)
+   ==================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   Konsulko Group                      101228 (52.1%)
+   (Unknown)                           40402 (20.8%)
+   Atmel                               8585 (4.4%)
+   Rockchip                            7303 (3.8%)
+   ST Microelectronics                 6439 (3.3%)
+   Guntermann & Drunck                 5668 (2.9%)
+   Socionext Inc.                      5117 (2.6%)
+   Toradex                             3572 (1.8%)
+   Google, Inc.                        3452 (1.8%)
+   Free Electrons                      3071 (1.6%)
+   DENX Software Engineering           1908 (1.0%)
+   Texas Instruments                   1564 (0.8%)
+   Marvell                             1380 (0.7%)
+   Weidmüller Interface GmbH & Co. KG  1311 (0.7%)
+   Amarula Solutions                   1261 (0.6%)
+   Intel                               693 (0.4%)
+   ARM                                 402 (0.2%)
+   Samsung                             361 (0.2%)
+   Openedev                            147 (0.1%)
+   Renesas Electronics                 118 (0.1%)
+   Broadcom                            60 (0.0%)
+   BayLibre SAS                        41 (0.0%)
+   Nobuhiro Iwamatsu                   28 (0.0%)
+   Red Hat                             7 (0.0%)
+   Novell                              7 (0.0%)
+   Boundary Devices                    3 (0.0%)
+   AMD                                 1 (0.0%)
+   Debian.org                          1 (0.0%)
+   NXP                                 1 (0.0%)
+   ==================================  =====
+
+
+.. table:: Employers with the most signoffs (total 278)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         65 (23.4%)
+   DENX Software Engineering         63 (22.7%)
+   Google, Inc.                      25 (9.0%)
+   Konsulko Group                    22 (7.9%)
+   Free Electrons                    21 (7.6%)
+   Texas Instruments                 18 (6.5%)
+   Samsung                           13 (4.7%)
+   Intel                             11 (4.0%)
+   Xilinx                            11 (4.0%)
+   Rockchip                          7 (2.5%)
+   Toradex                           5 (1.8%)
+   Marvell                           4 (1.4%)
+   Openedev                          4 (1.4%)
+   Novell                            3 (1.1%)
+   NVidia                            3 (1.1%)
+   Guntermann & Drunck               2 (0.7%)
+   BayLibre SAS                      1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 141)
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   (Unknown)                           81 (57.4%)
+   Texas Instruments                   13 (9.2%)
+   Intel                               6 (4.3%)
+   DENX Software Engineering           4 (2.8%)
+   Free Electrons                      4 (2.8%)
+   Rockchip                            4 (2.8%)
+   Google, Inc.                        3 (2.1%)
+   Toradex                             3 (2.1%)
+   Guntermann & Drunck                 2 (1.4%)
+   ST Microelectronics                 2 (1.4%)
+   Konsulko Group                      1 (0.7%)
+   Samsung                             1 (0.7%)
+   Marvell                             1 (0.7%)
+   Openedev                            1 (0.7%)
+   Novell                              1 (0.7%)
+   BayLibre SAS                        1 (0.7%)
+   Atmel                               1 (0.7%)
+   Socionext Inc.                      1 (0.7%)
+   Weidmüller Interface GmbH & Co. KG  1 (0.7%)
+   Amarula Solutions                   1 (0.7%)
+   ARM                                 1 (0.7%)
+   Renesas Electronics                 1 (0.7%)
+   Broadcom                            1 (0.7%)
+   Nobuhiro Iwamatsu                   1 (0.7%)
+   Red Hat                             1 (0.7%)
+   Boundary Devices                    1 (0.7%)
+   AMD                                 1 (0.7%)
+   Debian.org                          1 (0.7%)
+   NXP                                 1 (0.7%)
+   ==================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2017.07.rst b/doc/develop/statistics/u-boot-stats-v2017.07.rst
new file mode 100644
index 00000000000..3999d625cfa
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2017.07.rst
@@ -0,0 +1,637 @@
+:orphan:
+
+Release Statistics for U-Boot v2017.07
+======================================
+
+* Processed 1371 changesets from 129 developers
+
+* 31 employers found
+
+* A total of 100569 lines added, 201667 removed (delta -101098)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       293 (21.4%)
+   Tom Rini                          81 (5.9%)
+   Álvaro Fernández Rojas            78 (5.7%)
+   Philipp Tomsich                   68 (5.0%)
+   Jagan Teki                        49 (3.6%)
+   Wenyou Yang                       44 (3.2%)
+   Marek Vasut                       38 (2.8%)
+   Bin Meng                          34 (2.5%)
+   Vikas Manocha                     33 (2.4%)
+   Lokesh Vutla                      31 (2.3%)
+   Kever Yang                        29 (2.1%)
+   Peng Fan                          26 (1.9%)
+   York Sun                          24 (1.8%)
+   Masahiro Yamada                   21 (1.5%)
+   Andre Przywara                    20 (1.5%)
+   Stefan Roese                      17 (1.2%)
+   Ley Foon Tan                      17 (1.2%)
+   Heiko Schocher                    16 (1.2%)
+   Michal Simek                      16 (1.2%)
+   Maxim Sloyko                      16 (1.2%)
+   Jernej Skrabec                    15 (1.1%)
+   Icenowy Zheng                     15 (1.1%)
+   Fabio Estevam                     14 (1.0%)
+   Adam Ford                         14 (1.0%)
+   Christophe Leroy                  13 (0.9%)
+   Eric Gao                          13 (0.9%)
+   Uri Mashiach                      12 (0.9%)
+   Ladislav Michl                    11 (0.8%)
+   Andy Yan                          11 (0.8%)
+   Jean-Jacques Hiblot               11 (0.8%)
+   Sekhar Nori                       11 (0.8%)
+   Heinrich Schuchardt               10 (0.7%)
+   Alexey Brodkin                    10 (0.7%)
+   Semen Protsenko                   10 (0.7%)
+   Lothar Waßmann                    9 (0.7%)
+   Cooper Jr., Franklin              9 (0.7%)
+   Paul Burton                       9 (0.7%)
+   Konstantin Porotchkin             9 (0.7%)
+   Hannes Schmelzer                  7 (0.5%)
+   Siva Durga Prasad Paladugu        7 (0.5%)
+   Chris Packham                     7 (0.5%)
+   Keerthy                           7 (0.5%)
+   Peter Robinson                    6 (0.4%)
+   Meng Dongyang                     6 (0.4%)
+   Jacob Chen                        6 (0.4%)
+   Jaehoon Chung                     5 (0.4%)
+   Kouei Abe                         5 (0.4%)
+   Priyanka Jain                     5 (0.4%)
+   B, Ravi                           5 (0.4%)
+   Xu Ziyuan                         5 (0.4%)
+   Igal Liberman                     5 (0.4%)
+   Patrice Chotard                   4 (0.3%)
+   Alison Wang                       4 (0.3%)
+   Phil Edworthy                     4 (0.3%)
+   Benoît Thébaudeau                 4 (0.3%)
+   Gregory CLEMENT                   4 (0.3%)
+   rick                              4 (0.3%)
+   Andy Duan                         4 (0.3%)
+   Andreas Fenkart                   4 (0.3%)
+   Andy Shevchenko                   3 (0.2%)
+   Daniel Schwierzeck                3 (0.2%)
+   Santan Kumar                      3 (0.2%)
+   Tim Harvey                        3 (0.2%)
+   Patrick Wildt                     3 (0.2%)
+   Alex Deymo                        3 (0.2%)
+   Holger Brunck                     2 (0.1%)
+   Stephen Warren                    2 (0.1%)
+   Enric Balletbo i Serra            2 (0.1%)
+   Rob Clark                         2 (0.1%)
+   Alexander Graf                    2 (0.1%)
+   Jonathan Gray                     2 (0.1%)
+   Kunihiko Hayashi                  2 (0.1%)
+   Emmanuel Vadot                    2 (0.1%)
+   Ken Ma                            2 (0.1%)
+   Mike Looijmans                    2 (0.1%)
+   Jean-Francois Dagenais            2 (0.1%)
+   Chen-Yu Tsai                      2 (0.1%)
+   Hiroyuki Yokoyama                 2 (0.1%)
+   Klaus Goger                       2 (0.1%)
+   Andreas Färber                    2 (0.1%)
+   Heiko Stübner                     2 (0.1%)
+   Pantelis Antoniou                 2 (0.1%)
+   Madalin Bucur                     2 (0.1%)
+   Bogdan Purcareata                 2 (0.1%)
+   Mylene JOSSERAND                  2 (0.1%)
+   Suresh Gupta                      2 (0.1%)
+   Jelle van der Waa                 2 (0.1%)
+   Jonas Karlman                     2 (0.1%)
+   Pau Pajuelo                       2 (0.1%)
+   Baruch Siach                      1 (0.1%)
+   Martin Böh                        1 (0.1%)
+   Lukasz Majewski                   1 (0.1%)
+   Andrew F. Davis                   1 (0.1%)
+   Michael Welling                   1 (0.1%)
+   Mugunthan V N                     1 (0.1%)
+   Manfred Schlaegl                  1 (0.1%)
+   Mario Six                         1 (0.1%)
+   Axel Lin                          1 (0.1%)
+   Marek Behún                       1 (0.1%)
+   Chakra Divi                       1 (0.1%)
+   Toshifumi NISHINAGA               1 (0.1%)
+   Brock Zheng Techyauld Ltd         1 (0.1%)
+   Nobuhiro Iwamatsu                 1 (0.1%)
+   Romain Perier                     1 (0.1%)
+   Mark Kettenis                     1 (0.1%)
+   Anna, Suman                       1 (0.1%)
+   Vagrant Cascadian                 1 (0.1%)
+   Stefan Chulski                    1 (0.1%)
+   Olliver Schinagl                  1 (0.1%)
+   Zhao Qiang                        1 (0.1%)
+   Daniel Thompson                   1 (0.1%)
+   Vanessa Maegima                   1 (0.1%)
+   Heiner Kallweit                   1 (0.1%)
+   Udit Agarwal                      1 (0.1%)
+   Yogesh Gaur                       1 (0.1%)
+   Hou Zhiqiang                      1 (0.1%)
+   Stefano Babic                     1 (0.1%)
+   Liam Beguin                       1 (0.1%)
+   Siarhei Siamashka                 1 (0.1%)
+   Paulo Zaneti                      1 (0.1%)
+   Angelo Dureghello                 1 (0.1%)
+   Dinh Nguyen                       1 (0.1%)
+   James Balean                      1 (0.1%)
+   Nicolas Le Bayon                  1 (0.1%)
+   Eddie Cai                         1 (0.1%)
+   Jakob Unterwurzacher              1 (0.1%)
+   Paolo Pisati                      1 (0.1%)
+   Uwe Kleine-König                  1 (0.1%)
+   Nisal Menuka                      1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heiko Schocher                    157342 (55.7%)
+   Simon Glass                       23832 (8.4%)
+   Marek Vasut                       8410 (3.0%)
+   Wenyou Yang                       8187 (2.9%)
+   Christophe Leroy                  7484 (2.7%)
+   Ley Foon Tan                      6148 (2.2%)
+   Andy Shevchenko                   5885 (2.1%)
+   Philipp Tomsich                   5365 (1.9%)
+   Álvaro Fernández Rojas            5302 (1.9%)
+   Adam Ford                         5043 (1.8%)
+   Jagan Teki                        4860 (1.7%)
+   Andy Yan                          4225 (1.5%)
+   Tom Rini                          4123 (1.5%)
+   Kever Yang                        2912 (1.0%)
+   Maxim Sloyko                      2878 (1.0%)
+   Peng Fan                          2389 (0.8%)
+   Andreas Färber                    2114 (0.7%)
+   Vikas Manocha                     1882 (0.7%)
+   rick                              1746 (0.6%)
+   Lokesh Vutla                      1739 (0.6%)
+   York Sun                          1637 (0.6%)
+   Bin Meng                          1386 (0.5%)
+   Jernej Skrabec                    1319 (0.5%)
+   Jean-Jacques Hiblot               1306 (0.5%)
+   Andre Przywara                    1203 (0.4%)
+   Eric Gao                          1149 (0.4%)
+   Masahiro Yamada                   942 (0.3%)
+   Gregory CLEMENT                   712 (0.3%)
+   Fabio Estevam                     672 (0.2%)
+   Vanessa Maegima                   650 (0.2%)
+   Igal Liberman                     627 (0.2%)
+   Konstantin Porotchkin             529 (0.2%)
+   Semen Protsenko                   521 (0.2%)
+   Icenowy Zheng                     513 (0.2%)
+   Priyanka Jain                     513 (0.2%)
+   Keerthy                           385 (0.1%)
+   Mike Looijmans                    370 (0.1%)
+   Jaehoon Chung                     364 (0.1%)
+   Alexey Brodkin                    361 (0.1%)
+   Jacob Chen                        358 (0.1%)
+   Cooper Jr., Franklin              321 (0.1%)
+   Mylene JOSSERAND                  301 (0.1%)
+   Chris Packham                     300 (0.1%)
+   Stefan Roese                      297 (0.1%)
+   Ladislav Michl                    283 (0.1%)
+   Stephen Warren                    272 (0.1%)
+   Bogdan Purcareata                 239 (0.1%)
+   Santan Kumar                      162 (0.1%)
+   Pau Pajuelo                       145 (0.1%)
+   Kunihiko Hayashi                  142 (0.1%)
+   Siva Durga Prasad Paladugu        117 (0.0%)
+   Hiroyuki Yokoyama                 117 (0.0%)
+   Michal Simek                      103 (0.0%)
+   Paul Burton                       103 (0.0%)
+   Kouei Abe                         100 (0.0%)
+   Patrick Wildt                     100 (0.0%)
+   Sekhar Nori                       93 (0.0%)
+   Meng Dongyang                     93 (0.0%)
+   Jonas Karlman                     88 (0.0%)
+   Hannes Schmelzer                  87 (0.0%)
+   Uri Mashiach                      77 (0.0%)
+   Alex Deymo                        72 (0.0%)
+   Paolo Pisati                      70 (0.0%)
+   Jelle van der Waa                 68 (0.0%)
+   Daniel Thompson                   67 (0.0%)
+   Siarhei Siamashka                 67 (0.0%)
+   Tim Harvey                        66 (0.0%)
+   Andreas Fenkart                   62 (0.0%)
+   B, Ravi                           60 (0.0%)
+   Phil Edworthy                     59 (0.0%)
+   Patrice Chotard                   51 (0.0%)
+   Alison Wang                       51 (0.0%)
+   Lothar Waßmann                    50 (0.0%)
+   Benoît Thébaudeau                 48 (0.0%)
+   Liam Beguin                       46 (0.0%)
+   Klaus Goger                       42 (0.0%)
+   Stefan Chulski                    40 (0.0%)
+   Zhao Qiang                        40 (0.0%)
+   Xu Ziyuan                         39 (0.0%)
+   Peter Robinson                    27 (0.0%)
+   Chakra Divi                       25 (0.0%)
+   Heinrich Schuchardt               24 (0.0%)
+   Stefano Babic                     24 (0.0%)
+   Daniel Schwierzeck                23 (0.0%)
+   Andy Duan                         22 (0.0%)
+   Chen-Yu Tsai                      19 (0.0%)
+   Nisal Menuka                      18 (0.0%)
+   Rob Clark                         17 (0.0%)
+   Jonathan Gray                     16 (0.0%)
+   Enric Balletbo i Serra            13 (0.0%)
+   Yogesh Gaur                       13 (0.0%)
+   Holger Brunck                     12 (0.0%)
+   Udit Agarwal                      12 (0.0%)
+   Andrew F. Davis                   11 (0.0%)
+   Hou Zhiqiang                      10 (0.0%)
+   Nicolas Le Bayon                  10 (0.0%)
+   Emmanuel Vadot                    9 (0.0%)
+   Jean-Francois Dagenais            9 (0.0%)
+   Martin Böh                        8 (0.0%)
+   James Balean                      8 (0.0%)
+   Uwe Kleine-König                  8 (0.0%)
+   Alexander Graf                    7 (0.0%)
+   Paulo Zaneti                      6 (0.0%)
+   Pantelis Antoniou                 5 (0.0%)
+   Baruch Siach                      5 (0.0%)
+   Olliver Schinagl                  5 (0.0%)
+   Ken Ma                            4 (0.0%)
+   Madalin Bucur                     4 (0.0%)
+   Suresh Gupta                      4 (0.0%)
+   Michael Welling                   4 (0.0%)
+   Mark Kettenis                     4 (0.0%)
+   Eddie Cai                         4 (0.0%)
+   Heiko Stübner                     3 (0.0%)
+   Nobuhiro Iwamatsu                 3 (0.0%)
+   Lukasz Majewski                   2 (0.0%)
+   Mugunthan V N                     2 (0.0%)
+   Mario Six                         2 (0.0%)
+   Axel Lin                          2 (0.0%)
+   Angelo Dureghello                 2 (0.0%)
+   Dinh Nguyen                       2 (0.0%)
+   Manfred Schlaegl                  1 (0.0%)
+   Marek Behún                       1 (0.0%)
+   Toshifumi NISHINAGA               1 (0.0%)
+   Brock Zheng Techyauld Ltd         1 (0.0%)
+   Romain Perier                     1 (0.0%)
+   Anna, Suman                       1 (0.0%)
+   Vagrant Cascadian                 1 (0.0%)
+   Heiner Kallweit                   1 (0.0%)
+   Jakob Unterwurzacher              1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heiko Schocher                    157194 (77.9%)
+   Andy Shevchenko                   5862 (2.9%)
+   Simon Glass                       3259 (1.6%)
+   York Sun                          1334 (0.7%)
+   Jagan Teki                        928 (0.5%)
+   Fabio Estevam                     307 (0.2%)
+   Stephen Warren                    268 (0.1%)
+   Tom Rini                          111 (0.1%)
+   Andreas Fenkart                   20 (0.0%)
+   Holger Brunck                     12 (0.0%)
+   Hannes Schmelzer                  6 (0.0%)
+   Enric Balletbo i Serra            5 (0.0%)
+   Uwe Kleine-König                  3 (0.0%)
+   Suresh Gupta                      3 (0.0%)
+   Olliver Schinagl                  2 (0.0%)
+   Eddie Cai                         2 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 163)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          16 (9.8%)
+   Stefan Roese                      15 (9.2%)
+   Michal Simek                      12 (7.4%)
+   Tien Fong Chee                    11 (6.7%)
+   Maxime Ripard                     10 (6.1%)
+   Daniel Schwierzeck                9 (5.5%)
+   Philipp Tomsich                   9 (5.5%)
+   Igal Liberman                     8 (4.9%)
+   Simon Glass                       7 (4.3%)
+   Minkyu Kang                       5 (3.1%)
+   Alexander Graf                    5 (3.1%)
+   Priyanka Jain                     4 (2.5%)
+   Peng Fan                          4 (2.5%)
+   Jagan Teki                        3 (1.8%)
+   Hiroyuki Yokoyama                 3 (1.8%)
+   Santan Kumar                      3 (1.8%)
+   Mugunthan V N                     2 (1.2%)
+   Tom Warren                        2 (1.2%)
+   Abhimanyu Saini                   2 (1.2%)
+   Heinz Wrobel                      2 (1.2%)
+   Yehuda Yitschak                   2 (1.2%)
+   Ladislav Michl                    2 (1.2%)
+   Masahiro Yamada                   2 (1.2%)
+   B, Ravi                           2 (1.2%)
+   Jaehoon Chung                     2 (1.2%)
+   Andy Yan                          2 (1.2%)
+   Marek Vasut                       2 (1.2%)
+   York Sun                          1 (0.6%)
+   Suresh Gupta                      1 (0.6%)
+   Sriramakrishnan                   1 (0.6%)
+   Vitaly Wool                       1 (0.6%)
+   Grygorii Strashko                 1 (0.6%)
+   Sylvain Lemieux                   1 (0.6%)
+   George McCollister                1 (0.6%)
+   Elaine Zhang                      1 (0.6%)
+   Yoav Gvili                        1 (0.6%)
+   Hanna Hawa                        1 (0.6%)
+   Rabeeh Khoury                     1 (0.6%)
+   zachary                           1 (0.6%)
+   Haim Boot                         1 (0.6%)
+   Lokesh Vutla                      1 (0.6%)
+   Andre Przywara                    1 (0.6%)
+   Konstantin Porotchkin             1 (0.6%)
+   Álvaro Fernández Rojas            1 (0.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 656)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       313 (47.7%)
+   Tom Rini                          109 (16.6%)
+   Stefan Roese                      35 (5.3%)
+   Jagan Teki                        35 (5.3%)
+   Heiko Schocher                    35 (5.3%)
+   York Sun                          21 (3.2%)
+   Lokesh Vutla                      17 (2.6%)
+   Jaehoon Chung                     12 (1.8%)
+   Bin Meng                          12 (1.8%)
+   Marek Vasut                       9 (1.4%)
+   Philipp Tomsich                   8 (1.2%)
+   Kever Yang                        7 (1.1%)
+   Fabio Estevam                     6 (0.9%)
+   Nobuhiro Iwamatsu                 6 (0.9%)
+   Stefano Babic                     6 (0.9%)
+   Lukasz Majewski                   4 (0.6%)
+   Daniel Schwierzeck                2 (0.3%)
+   Peng Fan                          2 (0.3%)
+   Christophe KERELLO                2 (0.3%)
+   Patrick DELAUNAY                  2 (0.3%)
+   Roger Quadros                     2 (0.3%)
+   Alexander Graf                    1 (0.2%)
+   Andre Przywara                    1 (0.2%)
+   Stephen Warren                    1 (0.2%)
+   Hannes Schmelzer                  1 (0.2%)
+   Alexandru Gagniuc                 1 (0.2%)
+   Christian Gmeiner                 1 (0.2%)
+   Felix Brack                       1 (0.2%)
+   Andreas Bießmann                  1 (0.2%)
+   Igor Grinberg                     1 (0.2%)
+   Semen Protsenko                   1 (0.2%)
+   Jean-Jacques Hiblot               1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 104)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagan Teki                        28 (26.9%)
+   Stefan Roese                      24 (23.1%)
+   Philipp Tomsich                   10 (9.6%)
+   Kever Yang                        7 (6.7%)
+   Pau Pajuelo                       7 (6.7%)
+   Heiko Stübner                     6 (5.8%)
+   Bin Meng                          5 (4.8%)
+   Klaus Goger                       5 (4.8%)
+   Jakob Unterwurzacher              3 (2.9%)
+   Simon Glass                       1 (1.0%)
+   Heiko Schocher                    1 (1.0%)
+   Felix Brack                       1 (1.0%)
+   Jean-Jacques Hiblot               1 (1.0%)
+   Peter Chubb                       1 (1.0%)
+   Thierry Reding                    1 (1.0%)
+   Peter Senna Tschudin              1 (1.0%)
+   Pantelis Antoniou                 1 (1.0%)
+   Peter Robinson                    1 (1.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 104)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          24 (23.1%)
+   Andre Przywara                    18 (17.3%)
+   Simon Glass                       15 (14.4%)
+   Icenowy Zheng                     12 (11.5%)
+   Philipp Tomsich                   9 (8.7%)
+   Ladislav Michl                    5 (4.8%)
+   Jagan Teki                        4 (3.8%)
+   Andreas Fenkart                   4 (3.8%)
+   Paul Burton                       4 (3.8%)
+   Pau Pajuelo                       2 (1.9%)
+   Tom Rini                          2 (1.9%)
+   Kever Yang                        1 (1.0%)
+   Jakob Unterwurzacher              1 (1.0%)
+   Lukasz Majewski                   1 (1.0%)
+   James Balean                      1 (1.0%)
+   Tim Harvey                        1 (1.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 11)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stephen Warren                    2 (18.2%)
+   Pantelis Antoniou                 1 (9.1%)
+   Peter Robinson                    1 (9.1%)
+   Manfred Schlaegl                  1 (9.1%)
+   Nathan Rossi                      1 (9.1%)
+   Yan Liu                           1 (9.1%)
+   Steve Kipisz                      1 (9.1%)
+   Thomas Doerfler                   1 (9.1%)
+   Emmanuel Vadot                    1 (9.1%)
+   Sekhar Nori                       1 (9.1%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 11)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          3 (27.3%)
+   Michal Simek                      3 (27.3%)
+   Lokesh Vutla                      2 (18.2%)
+   Simon Glass                       1 (9.1%)
+   Cooper Jr., Franklin              1 (9.1%)
+   Keerthy                           1 (9.1%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         456 (33.3%)
+   Google, Inc.                      312 (22.8%)
+   Konsulko Group                    83 (6.1%)
+   Texas Instruments                 77 (5.6%)
+   DENX Software Engineering         73 (5.3%)
+   Rockchip                          65 (4.7%)
+   Amarula Solutions                 49 (3.6%)
+   Atmel                             44 (3.2%)
+   ST Microelectronics               38 (2.8%)
+   Socionext Inc.                    23 (1.7%)
+   ARM                               20 (1.5%)
+   Intel                             20 (1.5%)
+   Marvell                           17 (1.2%)
+   AMD                               16 (1.2%)
+   CompuLab                          12 (0.9%)
+   Linaro                            11 (0.8%)
+   Renesas Electronics               11 (0.8%)
+   MIPS                              9 (0.7%)
+   Xilinx                            7 (0.5%)
+   Free Electrons                    6 (0.4%)
+   Samsung                           5 (0.4%)
+   NXP                               4 (0.3%)
+   Collabora Ltd.                    3 (0.2%)
+   Keymile                           2 (0.1%)
+   Novell                            2 (0.1%)
+   Debian.org                        1 (0.1%)
+   Guntermann & Drunck               1 (0.1%)
+   NVidia                            1 (0.1%)
+   Openedev                          1 (0.1%)
+   Pengutronix                       1 (0.1%)
+   Nobuhiro Iwamatsu                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         166075 (58.8%)
+   (Unknown)                         37351 (13.2%)
+   Google, Inc.                      26782 (9.5%)
+   Intel                             12033 (4.3%)
+   Rockchip                          8435 (3.0%)
+   Atmel                             8187 (2.9%)
+   Amarula Solutions                 4860 (1.7%)
+   Konsulko Group                    4128 (1.5%)
+   Texas Instruments                 3918 (1.4%)
+   Novell                            2114 (0.7%)
+   ST Microelectronics               1943 (0.7%)
+   ARM                               1203 (0.4%)
+   Marvell                           1200 (0.4%)
+   Socionext Inc.                    1084 (0.4%)
+   Free Electrons                    1013 (0.4%)
+   Linaro                            588 (0.2%)
+   Samsung                           364 (0.1%)
+   Renesas Electronics               276 (0.1%)
+   NVidia                            268 (0.1%)
+   Xilinx                            117 (0.0%)
+   AMD                               103 (0.0%)
+   MIPS                              103 (0.0%)
+   CompuLab                          77 (0.0%)
+   NXP                               51 (0.0%)
+   Openedev                          25 (0.0%)
+   Collabora Ltd.                    14 (0.0%)
+   Keymile                           12 (0.0%)
+   Pengutronix                       8 (0.0%)
+   Nobuhiro Iwamatsu                 3 (0.0%)
+   Guntermann & Drunck               2 (0.0%)
+   Debian.org                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 163)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         43 (26.4%)
+   Konsulko Group                    17 (10.4%)
+   DENX Software Engineering         15 (9.2%)
+   Marvell                           15 (9.2%)
+   Xilinx                            12 (7.4%)
+   Intel                             11 (6.7%)
+   Free Electrons                    10 (6.1%)
+   Google, Inc.                      7 (4.3%)
+   Texas Instruments                 7 (4.3%)
+   Samsung                           7 (4.3%)
+   Novell                            5 (3.1%)
+   Rockchip                          3 (1.8%)
+   Renesas Electronics               3 (1.8%)
+   Socionext Inc.                    2 (1.2%)
+   NVidia                            2 (1.2%)
+   Openedev                          2 (1.2%)
+   Amarula Solutions                 1 (0.6%)
+   ARM                               1 (0.6%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 131)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         69 (52.7%)
+   Texas Instruments                 9 (6.9%)
+   Rockchip                          6 (4.6%)
+   DENX Software Engineering         5 (3.8%)
+   Marvell                           4 (3.1%)
+   Google, Inc.                      3 (2.3%)
+   Renesas Electronics               3 (2.3%)
+   ST Microelectronics               3 (2.3%)
+   Konsulko Group                    2 (1.5%)
+   Intel                             2 (1.5%)
+   Free Electrons                    2 (1.5%)
+   Socionext Inc.                    2 (1.5%)
+   Linaro                            2 (1.5%)
+   Collabora Ltd.                    2 (1.5%)
+   Xilinx                            1 (0.8%)
+   Samsung                           1 (0.8%)
+   Novell                            1 (0.8%)
+   NVidia                            1 (0.8%)
+   Openedev                          1 (0.8%)
+   Amarula Solutions                 1 (0.8%)
+   ARM                               1 (0.8%)
+   Atmel                             1 (0.8%)
+   AMD                               1 (0.8%)
+   MIPS                              1 (0.8%)
+   CompuLab                          1 (0.8%)
+   NXP                               1 (0.8%)
+   Keymile                           1 (0.8%)
+   Pengutronix                       1 (0.8%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   Guntermann & Drunck               1 (0.8%)
+   Debian.org                        1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2017.09.rst b/doc/develop/statistics/u-boot-stats-v2017.09.rst
new file mode 100644
index 00000000000..a6768da6e3d
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2017.09.rst
@@ -0,0 +1,680 @@
+:orphan:
+
+Release Statistics for U-Boot v2017.09
+======================================
+
+* Processed 1308 changesets from 130 developers
+
+* 27 employers found
+
+* A total of 64047 lines added, 36307 removed (delta 27740)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       246 (18.8%)
+   Bin Meng                          126 (9.6%)
+   Philipp Tomsich                   102 (7.8%)
+   Heinrich Schuchardt               56 (4.3%)
+   Kever Yang                        54 (4.1%)
+   Tom Rini                          49 (3.7%)
+   Masahiro Yamada                   42 (3.2%)
+   Patrice Chotard                   41 (3.1%)
+   Marek Vasut                       38 (2.9%)
+   Franklin S Cooper Jr              31 (2.4%)
+   Jagan Teki                        17 (1.3%)
+   Rob Clark                         17 (1.3%)
+   Grygorii Strashko                 17 (1.3%)
+   Stefan Roese                      16 (1.2%)
+   Thomas Petazzoni                  15 (1.1%)
+   Adam Ford                         15 (1.1%)
+   Wenyou Yang                       15 (1.1%)
+   Peng Fan                          15 (1.1%)
+   Christophe Leroy                  14 (1.1%)
+   Stefan Agner                      13 (1.0%)
+   Andy Shevchenko                   13 (1.0%)
+   Andy Yan                          13 (1.0%)
+   Alison Chaiken                    12 (0.9%)
+   Fabio Estevam                     12 (0.9%)
+   Siva Durga Prasad Paladugu        12 (0.9%)
+   Keerthy                           12 (0.9%)
+   Anatolij Gustschin                10 (0.8%)
+   Stefan Chulski                    10 (0.8%)
+   Andrew F. Davis                   10 (0.8%)
+   Alexandru Gagniuc                 9 (0.7%)
+   Eric Gao                          9 (0.7%)
+   Meng Dongyang                     9 (0.7%)
+   Chris Packham                     8 (0.6%)
+   Wadim Egorov                      8 (0.6%)
+   Santan Kumar                      8 (0.6%)
+   Tien Fong Chee                    8 (0.6%)
+   Maxime Ripard                     7 (0.5%)
+   Marek Behún                       7 (0.5%)
+   Michal Simek                      7 (0.5%)
+   Alexander Graf                    6 (0.5%)
+   Sam Protsenko                     5 (0.4%)
+   Angelo Dureghello                 5 (0.4%)
+   Lokesh Vutla                      5 (0.4%)
+   Karl Beldan                       5 (0.4%)
+   Jorge Ramirez-Ortiz               4 (0.3%)
+   Stefano Babic                     4 (0.3%)
+   Marcel Ziswiler                   4 (0.3%)
+   Zhikang Zhang                     4 (0.3%)
+   Hou Zhiqiang                      4 (0.3%)
+   Patrick Delaunay                  4 (0.3%)
+   Srinivas, Madan                   4 (0.3%)
+   Baruch Siach                      4 (0.3%)
+   Nobuhiro Iwamatsu                 3 (0.2%)
+   Madalin Bucur                     3 (0.2%)
+   Lukasz Majewski                   3 (0.2%)
+   Derald D. Woods                   3 (0.2%)
+   Breno Lima                        3 (0.2%)
+   Sumit Garg                        3 (0.2%)
+   Nishanth Menon                    3 (0.2%)
+   Icenowy Zheng                     3 (0.2%)
+   Alison Wang                       3 (0.2%)
+   Qianyu Gong                       3 (0.2%)
+   Jean-Jacques Hiblot               3 (0.2%)
+   Leo Wen                           3 (0.2%)
+   Romain Perier                     3 (0.2%)
+   Beniamino Galvani                 3 (0.2%)
+   Paul Burton                       3 (0.2%)
+   Fabio Berton                      3 (0.2%)
+   Heiko Schocher                    2 (0.2%)
+   Niko Mauno                        2 (0.2%)
+   Hannes Schmelzer                  2 (0.2%)
+   Christophe Kerello                2 (0.2%)
+   Clément Bœsch                     2 (0.2%)
+   Sébastien Szymanski               2 (0.2%)
+   Yuiko Oshino                      2 (0.2%)
+   Jon Nettleton                     2 (0.2%)
+   Emmanuel Vadot                    2 (0.2%)
+   Joe Hershberger                   2 (0.2%)
+   Christian Gmeiner                 2 (0.2%)
+   Felipe Balbi                      2 (0.2%)
+   Lothar Waßmann                    2 (0.2%)
+   Holger Brunck                     2 (0.2%)
+   Fiach Antaw                       2 (0.2%)
+   Patrick Bruenn                    2 (0.2%)
+   Vanessa Maegima                   2 (0.2%)
+   Paul Barker                       1 (0.1%)
+   Jonathan Gray                     1 (0.1%)
+   Peter Robinson                    1 (0.1%)
+   Clemens Gruber                    1 (0.1%)
+   Dave Prue                         1 (0.1%)
+   Chen-Yu Tsai                      1 (0.1%)
+   Dai Okamura                       1 (0.1%)
+   Wilson Lee                        1 (0.1%)
+   Stephen Boyd                      1 (0.1%)
+   Vikas Manocha                     1 (0.1%)
+   Pau Pajuelo                       1 (0.1%)
+   Ladislav Michl                    1 (0.1%)
+   Ruchika Gupta                     1 (0.1%)
+   Reno Farnesi                      1 (0.1%)
+   Suniel Mahesh                     1 (0.1%)
+   John Keeping                      1 (0.1%)
+   Peter Chubb                       1 (0.1%)
+   Vladimir Zapolskiy                1 (0.1%)
+   Peter Griffin                     1 (0.1%)
+   Prabhakar Kushwaha                1 (0.1%)
+   Klaus Goger                       1 (0.1%)
+   Olliver Schinagl                  1 (0.1%)
+   Igal Liberman                     1 (0.1%)
+   York Sun                          1 (0.1%)
+   Rajesh Bhagat                     1 (0.1%)
+   Yang Li                           1 (0.1%)
+   Sebastien Bourdelin               1 (0.1%)
+   Denis Pynkin                      1 (0.1%)
+   Holger Dengler                    1 (0.1%)
+   Arun Parameswaran                 1 (0.1%)
+   Suji Velupillai                   1 (0.1%)
+   Jimmy Du                          1 (0.1%)
+   VINITHA PILLAI                    1 (0.1%)
+   Zhang Ying-22455                  1 (0.1%)
+   Shengzhou Liu                     1 (0.1%)
+   Alexander Stein                   1 (0.1%)
+   Kishon Vijay Abraham I            1 (0.1%)
+   Vagrant Cascadian                 1 (0.1%)
+   Zubair Lutfullah Kakakhel         1 (0.1%)
+   Michael Heimpold                  1 (0.1%)
+   Diego Dorta                       1 (0.1%)
+   Gautam Bhat                       1 (0.1%)
+   Florian Fainelli                  1 (0.1%)
+   Mugunthan V N                     1 (0.1%)
+   Sjoerd Simons                     1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       15119 (18.7%)
+   Marek Vasut                       6778 (8.4%)
+   Bin Meng                          5289 (6.5%)
+   Tom Rini                          4891 (6.0%)
+   Philipp Tomsich                   4645 (5.7%)
+   Masahiro Yamada                   4108 (5.1%)
+   Kever Yang                        4042 (5.0%)
+   Patrice Chotard                   3266 (4.0%)
+   Zhikang Zhang                     2142 (2.6%)
+   Marek Behún                       1999 (2.5%)
+   Yuiko Oshino                      1565 (1.9%)
+   Alexandru Gagniuc                 1479 (1.8%)
+   Thomas Petazzoni                  1456 (1.8%)
+   Wenyou Yang                       1453 (1.8%)
+   Stefano Babic                     1441 (1.8%)
+   Jorge Ramirez-Ortiz               1387 (1.7%)
+   Wadim Egorov                      1200 (1.5%)
+   Vanessa Maegima                   1136 (1.4%)
+   Heinrich Schuchardt               1105 (1.4%)
+   Stefan Agner                      1016 (1.3%)
+   Tien Fong Chee                    949 (1.2%)
+   Stefan Roese                      817 (1.0%)
+   Angelo Dureghello                 796 (1.0%)
+   Siva Durga Prasad Paladugu        764 (0.9%)
+   Franklin S Cooper Jr              741 (0.9%)
+   Paul Burton                       674 (0.8%)
+   Beniamino Galvani                 606 (0.7%)
+   Sam Protsenko                     596 (0.7%)
+   Christophe Leroy                  594 (0.7%)
+   Andy Shevchenko                   590 (0.7%)
+   Andrew F. Davis                   576 (0.7%)
+   Jagan Teki                        566 (0.7%)
+   Alison Chaiken                    547 (0.7%)
+   Eric Gao                          433 (0.5%)
+   Adam Ford                         420 (0.5%)
+   Derald D. Woods                   398 (0.5%)
+   Felipe Balbi                      383 (0.5%)
+   Chris Packham                     354 (0.4%)
+   Alexander Graf                    324 (0.4%)
+   Sjoerd Simons                     296 (0.4%)
+   Peng Fan                          270 (0.3%)
+   Andy Yan                          215 (0.3%)
+   Breno Lima                        204 (0.3%)
+   Stefan Chulski                    169 (0.2%)
+   Fiach Antaw                       166 (0.2%)
+   Rob Clark                         163 (0.2%)
+   Meng Dongyang                     152 (0.2%)
+   Ladislav Michl                    149 (0.2%)
+   Ruchika Gupta                     142 (0.2%)
+   Igal Liberman                     142 (0.2%)
+   Pau Pajuelo                       124 (0.2%)
+   Alison Wang                       111 (0.1%)
+   Grygorii Strashko                 103 (0.1%)
+   Jean-Jacques Hiblot               100 (0.1%)
+   Sumit Garg                        90 (0.1%)
+   Patrick Delaunay                  88 (0.1%)
+   Maxime Ripard                     83 (0.1%)
+   Diego Dorta                       83 (0.1%)
+   Santan Kumar                      77 (0.1%)
+   Nishanth Menon                    73 (0.1%)
+   Fabio Estevam                     68 (0.1%)
+   Mugunthan V N                     65 (0.1%)
+   Arun Parameswaran                 63 (0.1%)
+   Baruch Siach                      61 (0.1%)
+   Qianyu Gong                       55 (0.1%)
+   VINITHA PILLAI                    53 (0.1%)
+   Shengzhou Liu                     50 (0.1%)
+   Christophe Kerello                49 (0.1%)
+   Zhang Ying-22455                  48 (0.1%)
+   Anatolij Gustschin                47 (0.1%)
+   Olliver Schinagl                  41 (0.1%)
+   Joe Hershberger                   40 (0.0%)
+   Michal Simek                      38 (0.0%)
+   Peter Griffin                     37 (0.0%)
+   Lokesh Vutla                      33 (0.0%)
+   Srinivas, Madan                   33 (0.0%)
+   Suji Velupillai                   31 (0.0%)
+   Hou Zhiqiang                      28 (0.0%)
+   Sebastien Bourdelin               28 (0.0%)
+   Lothar Waßmann                    27 (0.0%)
+   Holger Brunck                     27 (0.0%)
+   Keerthy                           23 (0.0%)
+   Marcel Ziswiler                   23 (0.0%)
+   Florian Fainelli                  22 (0.0%)
+   Madalin Bucur                     19 (0.0%)
+   Sébastien Szymanski               19 (0.0%)
+   Peter Robinson                    17 (0.0%)
+   Romain Perier                     16 (0.0%)
+   Nobuhiro Iwamatsu                 14 (0.0%)
+   Lukasz Majewski                   13 (0.0%)
+   Icenowy Zheng                     13 (0.0%)
+   Patrick Bruenn                    12 (0.0%)
+   Michael Heimpold                  12 (0.0%)
+   Denis Pynkin                      11 (0.0%)
+   Niko Mauno                        10 (0.0%)
+   Fabio Berton                      9 (0.0%)
+   Hannes Schmelzer                  8 (0.0%)
+   Christian Gmeiner                 8 (0.0%)
+   Alexander Stein                   8 (0.0%)
+   Leo Wen                           7 (0.0%)
+   Karl Beldan                       6 (0.0%)
+   Dave Prue                         6 (0.0%)
+   Suniel Mahesh                     6 (0.0%)
+   Gautam Bhat                       6 (0.0%)
+   Heiko Schocher                    4 (0.0%)
+   Clément Bœsch                     4 (0.0%)
+   Emmanuel Vadot                    4 (0.0%)
+   Paul Barker                       4 (0.0%)
+   Stephen Boyd                      4 (0.0%)
+   Rajesh Bhagat                     4 (0.0%)
+   Zubair Lutfullah Kakakhel         4 (0.0%)
+   Jon Nettleton                     3 (0.0%)
+   Dai Okamura                       3 (0.0%)
+   Prabhakar Kushwaha                3 (0.0%)
+   Kishon Vijay Abraham I            3 (0.0%)
+   Clemens Gruber                    2 (0.0%)
+   Wilson Lee                        2 (0.0%)
+   Vladimir Zapolskiy                2 (0.0%)
+   Klaus Goger                       2 (0.0%)
+   York Sun                          2 (0.0%)
+   Yang Li                           2 (0.0%)
+   Holger Dengler                    2 (0.0%)
+   Jimmy Du                          2 (0.0%)
+   Jonathan Gray                     1 (0.0%)
+   Chen-Yu Tsai                      1 (0.0%)
+   Vikas Manocha                     1 (0.0%)
+   Reno Farnesi                      1 (0.0%)
+   John Keeping                      1 (0.0%)
+   Peter Chubb                       1 (0.0%)
+   Vagrant Cascadian                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          3221 (8.9%)
+   Masahiro Yamada                   2888 (8.0%)
+   Thomas Petazzoni                  1407 (3.9%)
+   Christophe Leroy                  371 (1.0%)
+   Tom Rini                          207 (0.6%)
+   Breno Lima                        181 (0.5%)
+   Igal Liberman                     89 (0.2%)
+   Derald D. Woods                   67 (0.2%)
+   Vanessa Maegima                   51 (0.1%)
+   Fiach Antaw                       38 (0.1%)
+   Hou Zhiqiang                      10 (0.0%)
+   Stefan Chulski                    9 (0.0%)
+   Suniel Mahesh                     6 (0.0%)
+   Patrick Delaunay                  4 (0.0%)
+   Yang Li                           2 (0.0%)
+   Zhang Ying-22455                  1 (0.0%)
+   Dave Prue                         1 (0.0%)
+   Heiko Schocher                    1 (0.0%)
+   Kishon Vijay Abraham I            1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 224)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    52 (23.2%)
+   Nobuhiro Iwamatsu                 29 (12.9%)
+   Stefan Roese                      26 (11.6%)
+   Tom Rini                          16 (7.1%)
+   Michal Simek                      16 (7.1%)
+   Philipp Tomsich                   13 (5.8%)
+   Bin Meng                          8 (3.6%)
+   Tom Warren                        4 (1.8%)
+   Wenbin Song                       4 (1.8%)
+   Priyanka Jain                     4 (1.8%)
+   Jaehoon Chung                     4 (1.8%)
+   Jagan Teki                        4 (1.8%)
+   Vincent Tinelli                   3 (1.3%)
+   Otavio Salvador                   3 (1.3%)
+   Tomas Hlavacek                    3 (1.3%)
+   Masahiro Yamada                   2 (0.9%)
+   Anatolij Gustschin                2 (0.9%)
+   Shengzhou Liu                     2 (0.9%)
+   Andy Shevchenko                   2 (0.9%)
+   Simon Glass                       2 (0.9%)
+   Hou Zhiqiang                      1 (0.4%)
+   Keerthy                           1 (0.4%)
+   Steve Rae                         1 (0.4%)
+   Ashish Kumar                      1 (0.4%)
+   Ziyuan Xu                         1 (0.4%)
+   Rajat Srivastava                  1 (0.4%)
+   yinbo.zhu                         1 (0.4%)
+   Thanh Tran                        1 (0.4%)
+   Jason Zhu                         1 (0.4%)
+   Sriramakrishnan                   1 (0.4%)
+   Vitaly Wool                       1 (0.4%)
+   Tero Kristo                       1 (0.4%)
+   Jon Nettleton                     1 (0.4%)
+   Romain Perier                     1 (0.4%)
+   Ladislav Michl                    1 (0.4%)
+   Grygorii Strashko                 1 (0.4%)
+   Christophe Kerello                1 (0.4%)
+   Olliver Schinagl                  1 (0.4%)
+   Maxime Ripard                     1 (0.4%)
+   Sumit Garg                        1 (0.4%)
+   Jean-Jacques Hiblot               1 (0.4%)
+   Meng Dongyang                     1 (0.4%)
+   Felipe Balbi                      1 (0.4%)
+   Franklin S Cooper Jr              1 (0.4%)
+   Patrice Chotard                   1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 865)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       283 (32.7%)
+   Philipp Tomsich                   133 (15.4%)
+   Tom Rini                          124 (14.3%)
+   Bin Meng                          121 (14.0%)
+   Stefan Roese                      32 (3.7%)
+   York Sun                          27 (3.1%)
+   Jagan Teki                        16 (1.8%)
+   Lukasz Majewski                   12 (1.4%)
+   Stefano Babic                     12 (1.4%)
+   Igal Liberman                     10 (1.2%)
+   Fabio Estevam                     10 (1.2%)
+   Andy Shevchenko                   9 (1.0%)
+   Dinh Nguyen                       8 (0.9%)
+   Ley Foon Tan                      8 (0.9%)
+   Lokesh Vutla                      8 (0.9%)
+   Heiko Schocher                    7 (0.8%)
+   Nadav Haklai                      6 (0.7%)
+   Nobuhiro Iwamatsu                 3 (0.3%)
+   Joe Hershberger                   3 (0.3%)
+   Marek Vasut                       3 (0.3%)
+   Vikas Manocha                     2 (0.2%)
+   Wolfgang Denk                     2 (0.2%)
+   Daniel Schwierzeck                2 (0.2%)
+   Hannes Schmelzer                  2 (0.2%)
+   Jaehoon Chung                     1 (0.1%)
+   Keerthy                           1 (0.1%)
+   Sumit Garg                        1 (0.1%)
+   Franklin S Cooper Jr              1 (0.1%)
+   Vladimir Zapolskiy                1 (0.1%)
+   Klaus Goger                       1 (0.1%)
+   Jonathan Gray                     1 (0.1%)
+   Mark Kettenis                     1 (0.1%)
+   Jason Cooper                      1 (0.1%)
+   Stefan Brüns                      1 (0.1%)
+   Jakob Unterwurzacher              1 (0.1%)
+   Kostya Porotchkin                 1 (0.1%)
+   Yauheni Kaliuta                   1 (0.1%)
+   JD Zheng                          1 (0.1%)
+   Scott Branden                     1 (0.1%)
+   Moritz Fischer                    1 (0.1%)
+   Andreas Färber                    1 (0.1%)
+   Marcel Ziswiler                   1 (0.1%)
+   Christian Gmeiner                 1 (0.1%)
+   Sam Protsenko                     1 (0.1%)
+   Rob Clark                         1 (0.1%)
+   Heinrich Schuchardt               1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 133)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marcel Ziswiler                   36 (27.1%)
+   Stephen Warren                    26 (19.5%)
+   Stefan Roese                      19 (14.3%)
+   iSoC Platform CI                  10 (7.5%)
+   Bin Meng                          8 (6.0%)
+   Jagan Teki                        4 (3.0%)
+   Chen-Yu Tsai                      3 (2.3%)
+   VINITHA PILLAI                    3 (2.3%)
+   Simon Glass                       2 (1.5%)
+   Daniel Schwierzeck                2 (1.5%)
+   Jonathan Gray                     2 (1.5%)
+   Pau Pajuelo                       2 (1.5%)
+   Philipp Tomsich                   1 (0.8%)
+   Dinh Nguyen                       1 (0.8%)
+   Heiko Schocher                    1 (0.8%)
+   Marek Vasut                       1 (0.8%)
+   Hannes Schmelzer                  1 (0.8%)
+   Mark Kettenis                     1 (0.8%)
+   Heinrich Schuchardt               1 (0.8%)
+   Steve Rae                         1 (0.8%)
+   Joël Esponde                      1 (0.8%)
+   Vagrant Cascadian                 1 (0.8%)
+   Paul Barker                       1 (0.8%)
+   Peter Robinson                    1 (0.8%)
+   Suji Velupillai                   1 (0.8%)
+   Adam Ford                         1 (0.8%)
+   Peng Fan                          1 (0.8%)
+   Kever Yang                        1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 133)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       70 (52.6%)
+   Bin Meng                          22 (16.5%)
+   Stefan Chulski                    10 (7.5%)
+   Jagan Teki                        3 (2.3%)
+   Tom Rini                          3 (2.3%)
+   Sumit Garg                        3 (2.3%)
+   Maxime Ripard                     2 (1.5%)
+   Icenowy Zheng                     2 (1.5%)
+   Paul Burton                       2 (1.5%)
+   Stefan Roese                      1 (0.8%)
+   Pau Pajuelo                       1 (0.8%)
+   Philipp Tomsich                   1 (0.8%)
+   Paul Barker                       1 (0.8%)
+   Suji Velupillai                   1 (0.8%)
+   Peng Fan                          1 (0.8%)
+   Kever Yang                        1 (0.8%)
+   Andy Shevchenko                   1 (0.8%)
+   Christian Gmeiner                 1 (0.8%)
+   Sam Protsenko                     1 (0.8%)
+   Jon Nettleton                     1 (0.8%)
+   Ladislav Michl                    1 (0.8%)
+   Dave Prue                         1 (0.8%)
+   John Keeping                      1 (0.8%)
+   Alison Chaiken                    1 (0.8%)
+   Stefan Agner                      1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 25)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          2 (8.0%)
+   Patrick Delaunay                  2 (8.0%)
+   Ran Wang                          2 (8.0%)
+   Sumit Garg                        1 (4.0%)
+   Maxime Ripard                     1 (4.0%)
+   Stefan Roese                      1 (4.0%)
+   Andy Shevchenko                   1 (4.0%)
+   Heiko Schocher                    1 (4.0%)
+   Marek Vasut                       1 (4.0%)
+   Heinrich Schuchardt               1 (4.0%)
+   Joël Esponde                      1 (4.0%)
+   Peter Robinson                    1 (4.0%)
+   Stefano Babic                     1 (4.0%)
+   Alexander Graf                    1 (4.0%)
+   Jean-Jacques Hiblot               1 (4.0%)
+   Måns Rullgård                     1 (4.0%)
+   Artturi Alm                       1 (4.0%)
+   Bo Shen                           1 (4.0%)
+   Miquel RAYNAL                     1 (4.0%)
+   Takashi Matsuzawa                 1 (4.0%)
+   Kevin Hilman                      1 (4.0%)
+   Andy Yan                          1 (4.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 25)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Patrice Chotard                   5 (20.0%)
+   Tom Rini                          4 (16.0%)
+   Simon Glass                       4 (16.0%)
+   Bin Meng                          3 (12.0%)
+   Philipp Tomsich                   3 (12.0%)
+   Fabio Estevam                     3 (12.0%)
+   Heinrich Schuchardt               1 (4.0%)
+   Alexander Graf                    1 (4.0%)
+   Stefan Agner                      1 (4.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         520 (39.8%)
+   Google, Inc.                      246 (18.8%)
+   Rockchip                          87 (6.7%)
+   Texas Instruments                 87 (6.7%)
+   DENX Software Engineering         73 (5.6%)
+   Konsulko Group                    49 (3.7%)
+   ST Microelectronics               48 (3.7%)
+   Socionext Inc.                    43 (3.3%)
+   Intel                             23 (1.8%)
+   Free Electrons                    22 (1.7%)
+   Amarula Solutions                 17 (1.3%)
+   Toradex                           17 (1.3%)
+   Xilinx                            12 (0.9%)
+   Linaro                            11 (0.8%)
+   Marvell                           11 (0.8%)
+   Phytec                            8 (0.6%)
+   AMD                               7 (0.5%)
+   Collabora Ltd.                    5 (0.4%)
+   National Instruments              4 (0.3%)
+   NXP                               3 (0.2%)
+   MIPS                              3 (0.2%)
+   O.S. Systems                      3 (0.2%)
+   Nobuhiro Iwamatsu                 3 (0.2%)
+   Broadcom                          2 (0.2%)
+   Keymile                           2 (0.2%)
+   Debian.org                        1 (0.1%)
+   linutronix                        1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         26993 (33.4%)
+   Google, Inc.                      15119 (18.7%)
+   DENX Software Engineering         9100 (11.2%)
+   Konsulko Group                    4891 (6.0%)
+   Rockchip                          4848 (6.0%)
+   Socionext Inc.                    4111 (5.1%)
+   ST Microelectronics               3404 (4.2%)
+   Linaro                            2024 (2.5%)
+   Intel                             1922 (2.4%)
+   Texas Instruments                 1750 (2.2%)
+   Free Electrons                    1539 (1.9%)
+   Phytec                            1200 (1.5%)
+   Toradex                           1039 (1.3%)
+   Xilinx                            764 (0.9%)
+   MIPS                              674 (0.8%)
+   Amarula Solutions                 566 (0.7%)
+   Collabora Ltd.                    323 (0.4%)
+   Marvell                           311 (0.4%)
+   NXP                               111 (0.1%)
+   Broadcom                          94 (0.1%)
+   National Instruments              44 (0.1%)
+   AMD                               38 (0.0%)
+   Keymile                           27 (0.0%)
+   Nobuhiro Iwamatsu                 14 (0.0%)
+   O.S. Systems                      9 (0.0%)
+   linutronix                        2 (0.0%)
+   Debian.org                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 224)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Novell                            52 (23.2%)
+   (Unknown)                         43 (19.2%)
+   Nobuhiro Iwamatsu                 29 (12.9%)
+   DENX Software Engineering         28 (12.5%)
+   Konsulko Group                    17 (7.6%)
+   Xilinx                            16 (7.1%)
+   Texas Instruments                 7 (3.1%)
+   Intel                             6 (2.7%)
+   NVidia                            4 (1.8%)
+   Samsung                           4 (1.8%)
+   Rockchip                          3 (1.3%)
+   O.S. Systems                      3 (1.3%)
+   Google, Inc.                      2 (0.9%)
+   Socionext Inc.                    2 (0.9%)
+   ST Microelectronics               2 (0.9%)
+   Amarula Solutions                 2 (0.9%)
+   Openedev                          2 (0.9%)
+   Free Electrons                    1 (0.4%)
+   Collabora Ltd.                    1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 131)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         70 (53.4%)
+   Texas Instruments                 10 (7.6%)
+   DENX Software Engineering         6 (4.6%)
+   Rockchip                          5 (3.8%)
+   ST Microelectronics               4 (3.1%)
+   Linaro                            4 (3.1%)
+   Intel                             3 (2.3%)
+   Collabora Ltd.                    3 (2.3%)
+   National Instruments              3 (2.3%)
+   Socionext Inc.                    2 (1.5%)
+   Free Electrons                    2 (1.5%)
+   Toradex                           2 (1.5%)
+   Marvell                           2 (1.5%)
+   Broadcom                          2 (1.5%)
+   Nobuhiro Iwamatsu                 1 (0.8%)
+   Konsulko Group                    1 (0.8%)
+   Xilinx                            1 (0.8%)
+   O.S. Systems                      1 (0.8%)
+   Google, Inc.                      1 (0.8%)
+   Amarula Solutions                 1 (0.8%)
+   Phytec                            1 (0.8%)
+   MIPS                              1 (0.8%)
+   NXP                               1 (0.8%)
+   AMD                               1 (0.8%)
+   Keymile                           1 (0.8%)
+   linutronix                        1 (0.8%)
+   Debian.org                        1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2017.11.rst b/doc/develop/statistics/u-boot-stats-v2017.11.rst
new file mode 100644
index 00000000000..ba2f9e3ba6e
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2017.11.rst
@@ -0,0 +1,637 @@
+:orphan:
+
+Release Statistics for U-Boot v2017.11
+======================================
+
+* Processed 989 changesets from 123 developers
+
+* 28 employers found
+
+* A total of 107828 lines added, 22718 removed (delta 85110)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   77 (7.8%)
+   Heinrich Schuchardt               68 (6.9%)
+   Bin Meng                          64 (6.5%)
+   Philipp Tomsich                   51 (5.2%)
+   Rob Clark                         47 (4.8%)
+   Patrice Chotard                   45 (4.6%)
+   Marek Vasut                       44 (4.4%)
+   Tom Rini                          39 (3.9%)
+   Simon Glass                       31 (3.1%)
+   Wenyou Yang                       29 (2.9%)
+   Fabio Estevam                     28 (2.8%)
+   Kever Yang                        27 (2.7%)
+   Maxime Ripard                     25 (2.5%)
+   Tuomas Tynkkynen                  25 (2.5%)
+   Adam Ford                         20 (2.0%)
+   York Sun                          17 (1.7%)
+   Ran Wang                          16 (1.6%)
+   Lokesh Vutla                      15 (1.5%)
+   Jean-Jacques Hiblot               14 (1.4%)
+   David Wu                          14 (1.4%)
+   Marek Behún                       13 (1.3%)
+   Paul Burton                       13 (1.3%)
+   Jagan Teki                        12 (1.2%)
+   Pantelis Antoniou                 12 (1.2%)
+   Klaus Goger                       9 (0.9%)
+   Ashish Kumar                      9 (0.9%)
+   Diego Dorta                       9 (0.9%)
+   rick                              9 (0.9%)
+   Lukasz Majewski                   8 (0.8%)
+   Patrick Delaunay                  8 (0.8%)
+   Sam Protsenko                     8 (0.8%)
+   Icenowy Zheng                     7 (0.7%)
+   Chris Packham                     7 (0.7%)
+   Stephen Warren                    6 (0.6%)
+   Andrew F. Davis                   6 (0.6%)
+   Stefan Agner                      5 (0.5%)
+   Vasily Khoruzhick                 5 (0.5%)
+   Stefan Roese                      5 (0.5%)
+   Alexander Graf                    4 (0.4%)
+   Sumit Garg                        4 (0.4%)
+   Anatolij Gustschin                4 (0.4%)
+   Uri Mashiach                      4 (0.4%)
+   Alison Chaiken                    4 (0.4%)
+   Andy Yan                          4 (0.4%)
+   Chen-Yu Tsai                      3 (0.3%)
+   Andre Przywara                    3 (0.3%)
+   Christophe Kerello                3 (0.3%)
+   Praneeth Bajjuri                  3 (0.3%)
+   Vishal Mahaveer                   3 (0.3%)
+   zijun_hu                          3 (0.3%)
+   Elaine Zhang                      3 (0.3%)
+   Suresh Gupta                      3 (0.3%)
+   Yangbo Lu                         3 (0.3%)
+   Priyanka Jain                     3 (0.3%)
+   Hou Zhiqiang                      3 (0.3%)
+   Angelo Dureghello                 2 (0.2%)
+   Artturi Alm                       2 (0.2%)
+   Otavio Salvador                   2 (0.2%)
+   Dongjin Kim                       2 (0.2%)
+   Peng Fan                          2 (0.2%)
+   Jonathan Gray                     2 (0.2%)
+   Prabhakar Kushwaha                2 (0.2%)
+   Andy Shevchenko                   2 (0.2%)
+   Felix Brack                       2 (0.2%)
+   Suman Anna                        2 (0.2%)
+   Seung-Woo Kim                     2 (0.2%)
+   Baruch Siach                      2 (0.2%)
+   Sriram Dash                       2 (0.2%)
+   Santan Kumar                      2 (0.2%)
+   Peter Jones                       2 (0.2%)
+   William Wu                        2 (0.2%)
+   Udit Agarwal                      2 (0.2%)
+   Soeren Moch                       1 (0.1%)
+   Werner Böllmann                   1 (0.1%)
+   Goldschmidt Simon                 1 (0.1%)
+   Benoît Thébaudeau                 1 (0.1%)
+   Chris Brandt                      1 (0.1%)
+   Jan Kundrát                       1 (0.1%)
+   Shawn Guo                         1 (0.1%)
+   Michal Simek                      1 (0.1%)
+   Niko Mauno                        1 (0.1%)
+   Yuantian Tang                     1 (0.1%)
+   Benjamin Young                    1 (0.1%)
+   Quentin Schulz                    1 (0.1%)
+   Michal Oleszczyk                  1 (0.1%)
+   Vagrant Cascadian                 1 (0.1%)
+   Engling, Uwe                      1 (0.1%)
+   Jon Smith                         1 (0.1%)
+   Mirza                             1 (0.1%)
+   Vasily Gurevich                   1 (0.1%)
+   Sven-Ola Tuecke                   1 (0.1%)
+   Ilya Ledvich                      1 (0.1%)
+   Bogdan Purcareata                 1 (0.1%)
+   Gong Qianyu                       1 (0.1%)
+   Faiz Abbas                        1 (0.1%)
+   Bo Shen                           1 (0.1%)
+   Lee Jones                         1 (0.1%)
+   Nicolas Le Bayon                  1 (0.1%)
+   Stefan Mavrodiev                  1 (0.1%)
+   Karthik Tummala                   1 (0.1%)
+   Madan Srinivas                    1 (0.1%)
+   Ulf Magnusson                     1 (0.1%)
+   Joshua Scott                      1 (0.1%)
+   Vsevolod Gribov                   1 (0.1%)
+   Yogesh Gaur                       1 (0.1%)
+   Frank Kunz                        1 (0.1%)
+   Bharat Bhushan                    1 (0.1%)
+   Jörg Krause                       1 (0.1%)
+   Ian Ray                           1 (0.1%)
+   Dennis Gilmore                    1 (0.1%)
+   Vanessa Maegima                   1 (0.1%)
+   Eric Nelson                       1 (0.1%)
+   Harinarayan Bhatta                1 (0.1%)
+   Franklin S Cooper Jr              1 (0.1%)
+   Tien Fong Chee                    1 (0.1%)
+   Keng Soon Cheah                   1 (0.1%)
+   Moritz Fischer                    1 (0.1%)
+   Tomas Melin                       1 (0.1%)
+   Philippe CORNU                    1 (0.1%)
+   Holger Dengler                    1 (0.1%)
+   Steve Kipisz                      1 (0.1%)
+   Keerthy                           1 (0.1%)
+   Zhao Qiang                        1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          17143 (14.8%)
+   Bin Meng                          16572 (14.3%)
+   Marek Vasut                       15780 (13.6%)
+   Heinrich Schuchardt               6522 (5.6%)
+   Patrice Chotard                   6155 (5.3%)
+   Adam Ford                         5520 (4.8%)
+   Rob Clark                         4926 (4.2%)
+   Wenyou Yang                       4547 (3.9%)
+   Masahiro Yamada                   4398 (3.8%)
+   Marek Behún                       3793 (3.3%)
+   Lokesh Vutla                      3722 (3.2%)
+   Tuomas Tynkkynen                  3380 (2.9%)
+   Ashish Kumar                      3372 (2.9%)
+   Maxime Ripard                     2188 (1.9%)
+   Kever Yang                        1617 (1.4%)
+   Lukasz Majewski                   1471 (1.3%)
+   Ilya Ledvich                      1067 (0.9%)
+   Simon Glass                       1003 (0.9%)
+   Vasily Khoruzhick                 867 (0.7%)
+   Pantelis Antoniou                 825 (0.7%)
+   Alexander Graf                    814 (0.7%)
+   Jagan Teki                        796 (0.7%)
+   Jean-Jacques Hiblot               770 (0.7%)
+   rick                              622 (0.5%)
+   Philipp Tomsich                   504 (0.4%)
+   York Sun                          502 (0.4%)
+   Uri Mashiach                      483 (0.4%)
+   Andy Shevchenko                   481 (0.4%)
+   Fabio Estevam                     464 (0.4%)
+   Philippe CORNU                    463 (0.4%)
+   David Wu                          454 (0.4%)
+   Ran Wang                          394 (0.3%)
+   Paul Burton                       391 (0.3%)
+   Ian Ray                           378 (0.3%)
+   Stephen Warren                    214 (0.2%)
+   Peng Fan                          198 (0.2%)
+   Ulf Magnusson                     194 (0.2%)
+   Patrick Delaunay                  190 (0.2%)
+   Sumit Garg                        184 (0.2%)
+   Icenowy Zheng                     174 (0.2%)
+   Alison Chaiken                    163 (0.1%)
+   Klaus Goger                       140 (0.1%)
+   Elaine Zhang                      125 (0.1%)
+   Angelo Dureghello                 103 (0.1%)
+   Peter Jones                       101 (0.1%)
+   Andrew F. Davis                   98 (0.1%)
+   Stefan Mavrodiev                  97 (0.1%)
+   Chris Packham                     92 (0.1%)
+   Franklin S Cooper Jr              87 (0.1%)
+   Keerthy                           76 (0.1%)
+   Anatolij Gustschin                74 (0.1%)
+   William Wu                        70 (0.1%)
+   Christophe Kerello                67 (0.1%)
+   Suman Anna                        67 (0.1%)
+   Udit Agarwal                      67 (0.1%)
+   Hou Zhiqiang                      66 (0.1%)
+   Stefan Roese                      65 (0.1%)
+   Keng Soon Cheah                   56 (0.0%)
+   Sam Protsenko                     55 (0.0%)
+   Prabhakar Kushwaha                55 (0.0%)
+   Suresh Gupta                      45 (0.0%)
+   Joshua Scott                      45 (0.0%)
+   Praneeth Bajjuri                  43 (0.0%)
+   Soeren Moch                       42 (0.0%)
+   Moritz Fischer                    39 (0.0%)
+   Stefan Agner                      37 (0.0%)
+   Dennis Gilmore                    37 (0.0%)
+   Andre Przywara                    35 (0.0%)
+   Steve Kipisz                      34 (0.0%)
+   Diego Dorta                       27 (0.0%)
+   Baruch Siach                      24 (0.0%)
+   Priyanka Jain                     22 (0.0%)
+   Bogdan Purcareata                 22 (0.0%)
+   Vanessa Maegima                   17 (0.0%)
+   Felix Brack                       16 (0.0%)
+   Andy Yan                          15 (0.0%)
+   Vishal Mahaveer                   14 (0.0%)
+   Benoît Thébaudeau                 14 (0.0%)
+   Bharat Bhushan                    14 (0.0%)
+   Jonathan Gray                     13 (0.0%)
+   Sriram Dash                       13 (0.0%)
+   Otavio Salvador                   11 (0.0%)
+   Benjamin Young                    10 (0.0%)
+   Eric Nelson                       9 (0.0%)
+   Santan Kumar                      8 (0.0%)
+   Jon Smith                         8 (0.0%)
+   Chen-Yu Tsai                      7 (0.0%)
+   Michal Simek                      6 (0.0%)
+   Madan Srinivas                    6 (0.0%)
+   Harinarayan Bhatta                6 (0.0%)
+   zijun_hu                          5 (0.0%)
+   Seung-Woo Kim                     5 (0.0%)
+   Holger Dengler                    5 (0.0%)
+   Dongjin Kim                       4 (0.0%)
+   Jan Kundrát                       4 (0.0%)
+   Niko Mauno                        4 (0.0%)
+   Vagrant Cascadian                 4 (0.0%)
+   Sven-Ola Tuecke                   4 (0.0%)
+   Karthik Tummala                   4 (0.0%)
+   Yangbo Lu                         3 (0.0%)
+   Artturi Alm                       3 (0.0%)
+   Frank Kunz                        3 (0.0%)
+   Tomas Melin                       3 (0.0%)
+   Werner Böllmann                   2 (0.0%)
+   Michal Oleszczyk                  2 (0.0%)
+   Engling, Uwe                      2 (0.0%)
+   Mirza                             2 (0.0%)
+   Gong Qianyu                       2 (0.0%)
+   Jörg Krause                       2 (0.0%)
+   Zhao Qiang                        2 (0.0%)
+   Goldschmidt Simon                 1 (0.0%)
+   Chris Brandt                      1 (0.0%)
+   Shawn Guo                         1 (0.0%)
+   Yuantian Tang                     1 (0.0%)
+   Quentin Schulz                    1 (0.0%)
+   Vasily Gurevich                   1 (0.0%)
+   Faiz Abbas                        1 (0.0%)
+   Bo Shen                           1 (0.0%)
+   Lee Jones                         1 (0.0%)
+   Nicolas Le Bayon                  1 (0.0%)
+   Vsevolod Gribov                   1 (0.0%)
+   Yogesh Gaur                       1 (0.0%)
+   Tien Fong Chee                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tuomas Tynkkynen                  1809 (8.0%)
+   Masahiro Yamada                   630 (2.8%)
+   Paul Burton                       109 (0.5%)
+   Stefan Roese                      56 (0.2%)
+   Anatolij Gustschin                34 (0.1%)
+   Suman Anna                        13 (0.1%)
+   Andy Yan                          8 (0.0%)
+   Santan Kumar                      5 (0.0%)
+   Harinarayan Bhatta                4 (0.0%)
+   Karthik Tummala                   4 (0.0%)
+   Yangbo Lu                         2 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 223)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    81 (36.3%)
+   Nobuhiro Iwamatsu                 28 (12.6%)
+   Stefan Roese                      9 (4.0%)
+   Sriram Dash                       7 (3.1%)
+   Suresh Gupta                      7 (3.1%)
+   Prabhakar Kushwaha                7 (3.1%)
+   Philipp Tomsich                   7 (3.1%)
+   Tom Rini                          7 (3.1%)
+   Rajesh Bhagat                     6 (2.7%)
+   Maxime Ripard                     6 (2.7%)
+   Anatolij Gustschin                5 (2.2%)
+   Amrita Kumari                     4 (1.8%)
+   Ashish Kumar                      4 (1.8%)
+   Shaohui Xie                       3 (1.3%)
+   Jagan Teki                        3 (1.3%)
+   Kever Yang                        3 (1.3%)
+   Lokesh Vutla                      3 (1.3%)
+   Patrice Chotard                   3 (1.3%)
+   Boris Brezillon                   2 (0.9%)
+   Alison Wang                       2 (0.9%)
+   Raghav Dogra                      2 (0.9%)
+   Priyanka Jain                     2 (0.9%)
+   Praneeth Bajjuri                  2 (0.9%)
+   Andrew F. Davis                   2 (0.9%)
+   Rob Clark                         2 (0.9%)
+   Masahiro Yamada                   1 (0.4%)
+   Suman Anna                        1 (0.4%)
+   Joe Hershberger                   1 (0.4%)
+   Minkyu Kang                       1 (0.4%)
+   Joe Perches                       1 (0.4%)
+   Ben Young                         1 (0.4%)
+   Adrian Bunk                       1 (0.4%)
+   Anupam Kumar                      1 (0.4%)
+   Ioana Ciornei                     1 (0.4%)
+   Jose Alarcon                      1 (0.4%)
+   David Gibson                      1 (0.4%)
+   Vignesh R                         1 (0.4%)
+   Yogesh Gaur                       1 (0.4%)
+   Christophe Kerello                1 (0.4%)
+   Chris Packham                     1 (0.4%)
+   Fabio Estevam                     1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 554)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       217 (39.2%)
+   Philipp Tomsich                   64 (11.6%)
+   York Sun                          58 (10.5%)
+   Tom Rini                          48 (8.7%)
+   Bin Meng                          32 (5.8%)
+   Jagan Teki                        27 (4.9%)
+   Lukasz Majewski                   26 (4.7%)
+   Stefan Roese                      10 (1.8%)
+   Stefano Babic                     10 (1.8%)
+   Vikas Manocha                     9 (1.6%)
+   Rob Clark                         6 (1.1%)
+   Fabio Estevam                     6 (1.1%)
+   Jaehoon Chung                     4 (0.7%)
+   Heiko Schocher                    4 (0.7%)
+   Heinrich Schuchardt               4 (0.7%)
+   Lokesh Vutla                      3 (0.5%)
+   Joe Hershberger                   3 (0.5%)
+   Eric Nelson                       3 (0.5%)
+   Andre Przywara                    3 (0.5%)
+   Alexander Graf                    2 (0.4%)
+   Daniel Schwierzeck                2 (0.4%)
+   Stephen Warren                    2 (0.4%)
+   Kever Yang                        1 (0.2%)
+   Chris Packham                     1 (0.2%)
+   Benoît Thébaudeau                 1 (0.2%)
+   Christian Gmeiner                 1 (0.2%)
+   Stefan Agner                      1 (0.2%)
+   Peng Fan                          1 (0.2%)
+   Patrick Delaunay                  1 (0.2%)
+   David Wu                          1 (0.2%)
+   Andy Shevchenko                   1 (0.2%)
+   Marek Behún                       1 (0.2%)
+   Marek Vasut                       1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 61)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kever Yang                        15 (24.6%)
+   Stephen Warren                    6 (9.8%)
+   Derald D. Woods                   4 (6.6%)
+   Bin Meng                          3 (4.9%)
+   Klaus Goger                       3 (4.9%)
+   Philipp Tomsich                   2 (3.3%)
+   Fabio Estevam                     2 (3.3%)
+   Heinrich Schuchardt               2 (3.3%)
+   Peter Robinson                    2 (3.3%)
+   Angelo Dureghello                 2 (3.3%)
+   Chen-Yu Tsai                      2 (3.3%)
+   Adam Ford                         2 (3.3%)
+   Simon Glass                       1 (1.6%)
+   York Sun                          1 (1.6%)
+   Tom Rini                          1 (1.6%)
+   Jagan Teki                        1 (1.6%)
+   Lukasz Majewski                   1 (1.6%)
+   Stefan Roese                      1 (1.6%)
+   Rob Clark                         1 (1.6%)
+   Andre Przywara                    1 (1.6%)
+   Zhao Qiang                        1 (1.6%)
+   Uwe Scheffler                     1 (1.6%)
+   Mian Yousaf Kaukab                1 (1.6%)
+   Sébastien Szymanski               1 (1.6%)
+   David Müller                      1 (1.6%)
+   Aparna Balasubramanian            1 (1.6%)
+   Vinitha Pillai                    1 (1.6%)
+   Otavio Salvador                   1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 61)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       20 (32.8%)
+   Patrick Delaunay                  6 (9.8%)
+   Fabio Estevam                     5 (8.2%)
+   Adam Ford                         4 (6.6%)
+   Philipp Tomsich                   3 (4.9%)
+   Maxime Ripard                     3 (4.9%)
+   Bin Meng                          2 (3.3%)
+   York Sun                          2 (3.3%)
+   Tom Rini                          2 (3.3%)
+   Rob Clark                         2 (3.3%)
+   Stefan Agner                      2 (3.3%)
+   Paul Burton                       2 (3.3%)
+   Stephen Warren                    1 (1.6%)
+   Heinrich Schuchardt               1 (1.6%)
+   Lokesh Vutla                      1 (1.6%)
+   Sven-Ola Tuecke                   1 (1.6%)
+   Jonathan Gray                     1 (1.6%)
+   Michal Simek                      1 (1.6%)
+   Soeren Moch                       1 (1.6%)
+   Sumit Garg                        1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 30)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefano Babic                     6 (20.0%)
+   Simon Glass                       3 (10.0%)
+   Adam Ford                         3 (10.0%)
+   Heinrich Schuchardt               2 (6.7%)
+   Jonathan Gray                     2 (6.7%)
+   Philipp Tomsich                   1 (3.3%)
+   Stephen Warren                    1 (3.3%)
+   Kever Yang                        1 (3.3%)
+   Klaus Goger                       1 (3.3%)
+   Stefan Roese                      1 (3.3%)
+   Uwe Scheffler                     1 (3.3%)
+   Eric Nelson                       1 (3.3%)
+   Chris Packham                     1 (3.3%)
+   Walt Feasel                       1 (3.3%)
+   Gou, Hongmei                      1 (3.3%)
+   Yan Liu                           1 (3.3%)
+   Peter Kosa                        1 (3.3%)
+   Ebony Zhu                         1 (3.3%)
+   Joshua Scott                      1 (3.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 30)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Fabio Estevam                     8 (26.7%)
+   Simon Glass                       6 (20.0%)
+   Heinrich Schuchardt               4 (13.3%)
+   York Sun                          2 (6.7%)
+   Lokesh Vutla                      2 (6.7%)
+   Philipp Tomsich                   1 (3.3%)
+   Chris Packham                     1 (3.3%)
+   Bin Meng                          1 (3.3%)
+   Tom Rini                          1 (3.3%)
+   Rob Clark                         1 (3.3%)
+   Soeren Moch                       1 (3.3%)
+   Andre Przywara                    1 (3.3%)
+   Alexander Graf                    1 (3.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         510 (51.6%)
+   Socionext Inc.                    77 (7.8%)
+   DENX Software Engineering         61 (6.2%)
+   ST Microelectronics               58 (5.9%)
+   Konsulko Group                    51 (5.2%)
+   Rockchip                          50 (5.1%)
+   Texas Instruments                 49 (5.0%)
+   Google, Inc.                      31 (3.1%)
+   Free Electrons                    26 (2.6%)
+   MIPS                              13 (1.3%)
+   Linaro                            10 (1.0%)
+   Amarula Solutions                 9 (0.9%)
+   Atmel                             9 (0.9%)
+   NVidia                            6 (0.6%)
+   CompuLab                          5 (0.5%)
+   Toradex                           5 (0.5%)
+   ARM                               3 (0.3%)
+   Intel                             3 (0.3%)
+   Red Hat                           2 (0.2%)
+   O.S. Systems                      2 (0.2%)
+   Samsung                           2 (0.2%)
+   AMD                               1 (0.1%)
+   Debian.org                        1 (0.1%)
+   General Electric                  1 (0.1%)
+   linutronix                        1 (0.1%)
+   National Instruments              1 (0.1%)
+   Pepperl+Fuchs                     1 (0.1%)
+   Renesas Electronics               1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         51049 (44.0%)
+   Konsulko Group                    17968 (15.5%)
+   DENX Software Engineering         17390 (15.0%)
+   ST Microelectronics               6876 (5.9%)
+   Texas Instruments                 4924 (4.2%)
+   Socionext Inc.                    4398 (3.8%)
+   Atmel                             3786 (3.3%)
+   Rockchip                          2281 (2.0%)
+   Free Electrons                    2189 (1.9%)
+   CompuLab                          1550 (1.3%)
+   Google, Inc.                      1003 (0.9%)
+   Amarula Solutions                 781 (0.7%)
+   Intel                             482 (0.4%)
+   MIPS                              391 (0.3%)
+   General Electric                  378 (0.3%)
+   NVidia                            214 (0.2%)
+   Red Hat                           101 (0.1%)
+   Linaro                            57 (0.0%)
+   National Instruments              56 (0.0%)
+   Toradex                           37 (0.0%)
+   ARM                               35 (0.0%)
+   O.S. Systems                      11 (0.0%)
+   AMD                               6 (0.0%)
+   Samsung                           5 (0.0%)
+   linutronix                        5 (0.0%)
+   Debian.org                        4 (0.0%)
+   Pepperl+Fuchs                     1 (0.0%)
+   Renesas Electronics               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 223)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Novell                            81 (36.3%)
+   (Unknown)                         61 (27.4%)
+   Nobuhiro Iwamatsu                 28 (12.6%)
+   DENX Software Engineering         14 (6.3%)
+   Texas Instruments                 9 (4.0%)
+   Free Electrons                    8 (3.6%)
+   Konsulko Group                    7 (3.1%)
+   ST Microelectronics               4 (1.8%)
+   Rockchip                          3 (1.3%)
+   Openedev                          2 (0.9%)
+   Socionext Inc.                    1 (0.4%)
+   Amarula Solutions                 1 (0.4%)
+   General Electric                  1 (0.4%)
+   National Instruments              1 (0.4%)
+   Samsung                           1 (0.4%)
+   Debian.org                        1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 125)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         70 (56.0%)
+   Texas Instruments                 12 (9.6%)
+   ST Microelectronics               5 (4.0%)
+   Rockchip                          5 (4.0%)
+   DENX Software Engineering         4 (3.2%)
+   Linaro                            3 (2.4%)
+   Free Electrons                    2 (1.6%)
+   Konsulko Group                    2 (1.6%)
+   CompuLab                          2 (1.6%)
+   Intel                             2 (1.6%)
+   Socionext Inc.                    1 (0.8%)
+   Amarula Solutions                 1 (0.8%)
+   General Electric                  1 (0.8%)
+   National Instruments              1 (0.8%)
+   Samsung                           1 (0.8%)
+   Debian.org                        1 (0.8%)
+   Atmel                             1 (0.8%)
+   Google, Inc.                      1 (0.8%)
+   MIPS                              1 (0.8%)
+   NVidia                            1 (0.8%)
+   Red Hat                           1 (0.8%)
+   Toradex                           1 (0.8%)
+   ARM                               1 (0.8%)
+   O.S. Systems                      1 (0.8%)
+   AMD                               1 (0.8%)
+   linutronix                        1 (0.8%)
+   Pepperl+Fuchs                     1 (0.8%)
+   Renesas Electronics               1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2018.01.rst b/doc/develop/statistics/u-boot-stats-v2018.01.rst
new file mode 100644
index 00000000000..a5c68e7641e
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2018.01.rst
@@ -0,0 +1,660 @@
+:orphan:
+
+Release Statistics for U-Boot v2018.01
+======================================
+
+* Processed 785 changesets from 132 developers
+
+* 32 employers found
+
+* A total of 46990 lines added, 31695 removed (delta 15295)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Heinrich Schuchardt                90 (11.5%)
+   Michal Simek                       71 (9.0%)
+   Simon Glass                        56 (7.1%)
+   Marek Vasut                        54 (6.9%)
+   Philipp Tomsich                    51 (6.5%)
+   Masahiro Yamada                    39 (5.0%)
+   Kever Yang                         23 (2.9%)
+   Patrice Chotard                    18 (2.3%)
+   Jagan Teki                         15 (1.9%)
+   Rick Chen                          15 (1.9%)
+   Neil Armstrong                     14 (1.8%)
+   Tom Rini                           13 (1.7%)
+   Fabio Estevam                      11 (1.4%)
+   Siva Durga Prasad Paladugu         11 (1.4%)
+   Tuomas Tynkkynen                   11 (1.4%)
+   Ashish Kumar                       9 (1.1%)
+   Paul Burton                        9 (1.1%)
+   Boris Brezillon                    9 (1.1%)
+   Peng Fan                           7 (0.9%)
+   Christopher Spinrath               7 (0.9%)
+   Eugeniy Paltsev                    7 (0.9%)
+   Adam Ford                          6 (0.8%)
+   York Sun                           6 (0.8%)
+   Prabhakar Kushwaha                 6 (0.8%)
+   Sean Nyekjaer                      6 (0.8%)
+   Alexander Graf                     6 (0.8%)
+   Beniamino Galvani                  6 (0.8%)
+   Anurag Kumar Vulisha               6 (0.8%)
+   Fabio Berton                       6 (0.8%)
+   Breno Lima                         5 (0.6%)
+   Derald D. Woods                    5 (0.6%)
+   Maxime Ripard                      5 (0.6%)
+   Sascha Hauer                       5 (0.6%)
+   André Draszik                      5 (0.6%)
+   Stefan Agner                       4 (0.5%)
+   Felix Brack                        4 (0.5%)
+   Martyn Welch                       4 (0.5%)
+   Yangbo Lu                          4 (0.5%)
+   Stefan Roese                       4 (0.5%)
+   Baruch Siach                       4 (0.5%)
+   Alexey Brodkin                     4 (0.5%)
+   Andy Yan                           4 (0.5%)
+   Ludovic Desroches                  4 (0.5%)
+   Jon Nettleton                      4 (0.5%)
+   Shengzhou Liu                      4 (0.5%)
+   Andy Shevchenko                    3 (0.4%)
+   Jakob Unterwurzacher               3 (0.4%)
+   Stephen Warren                     3 (0.4%)
+   Yogesh Gaur                        3 (0.4%)
+   Jorge Ramirez-Ortiz                3 (0.4%)
+   Udit Agarwal                       3 (0.4%)
+   Ran Wang                           3 (0.4%)
+   Manish Narani                      3 (0.4%)
+   Nava kishore Manne                 3 (0.4%)
+   Tien Fong Chee                     3 (0.4%)
+   Faiz Abbas                         3 (0.4%)
+   Anatolij Gustschin                 2 (0.3%)
+   Sam Protsenko                      2 (0.3%)
+   Goldschmidt Simon                  2 (0.3%)
+   Wenbin song                        2 (0.3%)
+   Rajesh Bhagat                      2 (0.3%)
+   Patrick Delaunay                   2 (0.3%)
+   Chris Brandt                       2 (0.3%)
+   Alan Ott                           2 (0.3%)
+   Icenowy Zheng                      2 (0.3%)
+   Ben Whitten                        2 (0.3%)
+   Wenyou Yang                        2 (0.3%)
+   S. Lockwood-Childs                 2 (0.3%)
+   Wilson Lee                         2 (0.3%)
+   Shubhrajyoti Datta                 2 (0.3%)
+   Chirag Parekh                      2 (0.3%)
+   Rob Herring                        2 (0.3%)
+   Antony Antony                      2 (0.3%)
+   Ian Ray                            2 (0.3%)
+   Nandor Han                         2 (0.3%)
+   Clemens Gruber                     1 (0.1%)
+   Bin Meng                           1 (0.1%)
+   Eran Matityahu                     1 (0.1%)
+   Eric Nelson                        1 (0.1%)
+   Patrick Bruenn                     1 (0.1%)
+   Vagrant Cascadian                  1 (0.1%)
+   Lukasz Majewski                    1 (0.1%)
+   Emmanuel Vadot                     1 (0.1%)
+   Heiko Schocher                     1 (0.1%)
+   Jerome Brunet                      1 (0.1%)
+   Hans Verkuil                       1 (0.1%)
+   Klaus Goger                        1 (0.1%)
+   Jonathan Gray                      1 (0.1%)
+   Joe Hershberger                    1 (0.1%)
+   Javier Martinez Canillas           1 (0.1%)
+   Bhaskar Upadhaya                   1 (0.1%)
+   Dai Okamura                        1 (0.1%)
+   Chen-Yu Tsai                       1 (0.1%)
+   Andre Przywara                     1 (0.1%)
+   Nobuhiro Iwamatsu                  1 (0.1%)
+   Stefan Mavrodiev                   1 (0.1%)
+   Vinitha Pillai-B57223              1 (0.1%)
+   Marek Szyprowski                   1 (0.1%)
+   Jaehoon Chung                      1 (0.1%)
+   Dmitry Korunov                     1 (0.1%)
+   Peter Robinson                     1 (0.1%)
+   Vasily Khoruzhick                  1 (0.1%)
+   Rob Clark                          1 (0.1%)
+   Chris Packham                      1 (0.1%)
+   Anton Gerasimov                    1 (0.1%)
+   Jean-Francois Dagenais             1 (0.1%)
+   Marc Gonzalez                      1 (0.1%)
+   Bharat Kumar Gogada                1 (0.1%)
+   Jyotheeswar Reddy Mutthareddyvari  1 (0.1%)
+   Naga Sureshkumar Relli             1 (0.1%)
+   Hyun Kwon                          1 (0.1%)
+   Madhurkiran Harikrishnan           1 (0.1%)
+   Soren Brinkmann                    1 (0.1%)
+   Jolly Shah                         1 (0.1%)
+   Jyotheeswar Reddy                  1 (0.1%)
+   Sai Pavan Boddu                    1 (0.1%)
+   Jeff Westfahl                      1 (0.1%)
+   Tom McLeod                         1 (0.1%)
+   Vincent Prince                     1 (0.1%)
+   Dirk Behme                         1 (0.1%)
+   Suneel Garapati                    1 (0.1%)
+   M. Vefa Bicakci                    1 (0.1%)
+   Praneeth Bajjuri                   1 (0.1%)
+   Peter Senna Tschudin               1 (0.1%)
+   Dongjin Kim                        1 (0.1%)
+   Landheer-Cieslak, Ronald           1 (0.1%)
+   Minghuan Lian                      1 (0.1%)
+   Gan, Yau Wai                       1 (0.1%)
+   Keerthy                            1 (0.1%)
+   Bernhard Messerklinger             1 (0.1%)
+   VlaoMao                            1 (0.1%)
+   Kurt Kanzenbach                    1 (0.1%)
+   =================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Marek Vasut                        20756 (29.9%)
+   Masahiro Yamada                    5822 (8.4%)
+   Michal Simek                       4873 (7.0%)
+   Heinrich Schuchardt                4043 (5.8%)
+   Kever Yang                         3956 (5.7%)
+   Neil Armstrong                     3425 (4.9%)
+   Simon Glass                        3411 (4.9%)
+   Tuomas Tynkkynen                   2970 (4.3%)
+   Yogesh Gaur                        1333 (1.9%)
+   Peter Senna Tschudin               1105 (1.6%)
+   Philipp Tomsich                    1067 (1.5%)
+   Derald D. Woods                    980 (1.4%)
+   Eric Nelson                        894 (1.3%)
+   Ben Whitten                        826 (1.2%)
+   Jagan Teki                         817 (1.2%)
+   Patrice Chotard                    816 (1.2%)
+   Eugeniy Paltsev                    807 (1.2%)
+   Felix Brack                        761 (1.1%)
+   Boris Brezillon                    741 (1.1%)
+   Tom McLeod                         730 (1.1%)
+   Ludovic Desroches                  643 (0.9%)
+   Tom Rini                           621 (0.9%)
+   Jaehoon Chung                      558 (0.8%)
+   Rick Chen                          489 (0.7%)
+   Christopher Spinrath               467 (0.7%)
+   Adam Ford                          437 (0.6%)
+   Sascha Hauer                       421 (0.6%)
+   Nandor Han                         390 (0.6%)
+   Martyn Welch                       365 (0.5%)
+   Ashish Kumar                       357 (0.5%)
+   Beniamino Galvani                  314 (0.5%)
+   S. Lockwood-Childs                 262 (0.4%)
+   Faiz Abbas                         259 (0.4%)
+   Fabio Estevam                      181 (0.3%)
+   Udit Agarwal                       177 (0.3%)
+   Prabhakar Kushwaha                 172 (0.2%)
+   Andy Yan                           172 (0.2%)
+   Antony Antony                      162 (0.2%)
+   Ian Ray                            149 (0.2%)
+   Siva Durga Prasad Paladugu         141 (0.2%)
+   Maxime Ripard                      134 (0.2%)
+   Stephen Warren                     122 (0.2%)
+   Stefan Roese                       121 (0.2%)
+   Yangbo Lu                          106 (0.2%)
+   Rajesh Bhagat                      102 (0.1%)
+   Clemens Gruber                     91 (0.1%)
+   Jerome Brunet                      87 (0.1%)
+   Peng Fan                           82 (0.1%)
+   Jorge Ramirez-Ortiz                78 (0.1%)
+   Alexander Graf                     76 (0.1%)
+   Dmitry Korunov                     76 (0.1%)
+   André Draszik                      74 (0.1%)
+   Chris Brandt                       74 (0.1%)
+   Andre Przywara                     73 (0.1%)
+   Paul Burton                        67 (0.1%)
+   Shengzhou Liu                      65 (0.1%)
+   Andy Shevchenko                    64 (0.1%)
+   Goldschmidt Simon                  64 (0.1%)
+   Vinitha Pillai-B57223              61 (0.1%)
+   Jon Nettleton                      52 (0.1%)
+   York Sun                           50 (0.1%)
+   Sean Nyekjaer                      48 (0.1%)
+   Wenbin song                        46 (0.1%)
+   Marc Gonzalez                      43 (0.1%)
+   Breno Lima                         38 (0.1%)
+   Shubhrajyoti Datta                 33 (0.0%)
+   Tien Fong Chee                     31 (0.0%)
+   Anurag Kumar Vulisha               29 (0.0%)
+   Ran Wang                           26 (0.0%)
+   Naga Sureshkumar Relli             26 (0.0%)
+   Marek Szyprowski                   25 (0.0%)
+   Alan Ott                           24 (0.0%)
+   Klaus Goger                        24 (0.0%)
+   Stefan Agner                       21 (0.0%)
+   Jakob Unterwurzacher               21 (0.0%)
+   Fabio Berton                       20 (0.0%)
+   Nava kishore Manne                 19 (0.0%)
+   Patrick Delaunay                   19 (0.0%)
+   Wilson Lee                         19 (0.0%)
+   Jonathan Gray                      19 (0.0%)
+   Suneel Garapati                    19 (0.0%)
+   Chirag Parekh                      18 (0.0%)
+   Landheer-Cieslak, Ronald           18 (0.0%)
+   Alexey Brodkin                     16 (0.0%)
+   Baruch Siach                       15 (0.0%)
+   Stefan Mavrodiev                   14 (0.0%)
+   Manish Narani                      12 (0.0%)
+   Joe Hershberger                    12 (0.0%)
+   Nobuhiro Iwamatsu                  12 (0.0%)
+   Jeff Westfahl                      12 (0.0%)
+   Dongjin Kim                        12 (0.0%)
+   Icenowy Zheng                      11 (0.0%)
+   Wenyou Yang                        11 (0.0%)
+   Vasily Khoruzhick                  9 (0.0%)
+   Kurt Kanzenbach                    9 (0.0%)
+   Patrick Bruenn                     8 (0.0%)
+   Bin Meng                           7 (0.0%)
+   Keerthy                            7 (0.0%)
+   Chris Packham                      6 (0.0%)
+   Sai Pavan Boddu                    6 (0.0%)
+   Minghuan Lian                      5 (0.0%)
+   Rob Herring                        4 (0.0%)
+   Eran Matityahu                     4 (0.0%)
+   Vincent Prince                     4 (0.0%)
+   Sam Protsenko                      3 (0.0%)
+   Bhaskar Upadhaya                   3 (0.0%)
+   Peter Robinson                     3 (0.0%)
+   Jyotheeswar Reddy Mutthareddyvari  3 (0.0%)
+   Dirk Behme                         3 (0.0%)
+   M. Vefa Bicakci                    3 (0.0%)
+   Anatolij Gustschin                 2 (0.0%)
+   Lukasz Majewski                    2 (0.0%)
+   Emmanuel Vadot                     2 (0.0%)
+   Heiko Schocher                     2 (0.0%)
+   Hans Verkuil                       2 (0.0%)
+   Javier Martinez Canillas           2 (0.0%)
+   Rob Clark                          2 (0.0%)
+   Bharat Kumar Gogada                2 (0.0%)
+   Soren Brinkmann                    2 (0.0%)
+   Praneeth Bajjuri                   2 (0.0%)
+   VlaoMao                            2 (0.0%)
+   Vagrant Cascadian                  1 (0.0%)
+   Dai Okamura                        1 (0.0%)
+   Chen-Yu Tsai                       1 (0.0%)
+   Anton Gerasimov                    1 (0.0%)
+   Jean-Francois Dagenais             1 (0.0%)
+   Hyun Kwon                          1 (0.0%)
+   Madhurkiran Harikrishnan           1 (0.0%)
+   Jolly Shah                         1 (0.0%)
+   Jyotheeswar Reddy                  1 (0.0%)
+   Gan, Yau Wai                       1 (0.0%)
+   Bernhard Messerklinger             1 (0.0%)
+   =================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Marek Vasut                        4742 (15.0%)
+   Tuomas Tynkkynen                   2684 (8.5%)
+   Jagan Teki                         594 (1.9%)
+   Tom Rini                           293 (0.9%)
+   Yogesh Gaur                        241 (0.8%)
+   Michal Simek                       152 (0.5%)
+   Naga Sureshkumar Relli             25 (0.1%)
+   Alexander Graf                     21 (0.1%)
+   Alan Ott                           20 (0.1%)
+   Andre Przywara                     17 (0.1%)
+   Baruch Siach                       6 (0.0%)
+   Vasily Khoruzhick                  4 (0.0%)
+   Kurt Kanzenbach                    3 (0.0%)
+   =================================  =====
+
+
+.. table:: Developers with the most signoffs (total 235)
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Alexander Graf                     74 (31.5%)
+   Michal Simek                       43 (18.3%)
+   Masahiro Yamada                    17 (7.2%)
+   Stefan Roese                       14 (6.0%)
+   Boris Brezillon                    10 (4.3%)
+   Alexey Brodkin                     7 (3.0%)
+   Otavio Salvador                    6 (2.6%)
+   Philipp Tomsich                    6 (2.6%)
+   Martyn Welch                       5 (2.1%)
+   Baruch Siach                       4 (1.7%)
+   Wenyou Yang                        4 (1.7%)
+   Tom Rini                           2 (0.9%)
+   Bhaskar Upadhaya                   2 (0.9%)
+   Minkyu Kang                        2 (0.9%)
+   Dan Kephart                        2 (0.9%)
+   Christophe Priouzeau               2 (0.9%)
+   Raghav Dogra                       2 (0.9%)
+   Vinitha Pillai-B57223              2 (0.9%)
+   Prabhakar Kushwaha                 2 (0.9%)
+   Nandor Han                         2 (0.9%)
+   Neil Armstrong                     2 (0.9%)
+   Sumit Garg                         1 (0.4%)
+   Ye Li                              1 (0.4%)
+   Priyanka Jain                      1 (0.4%)
+   Marcin Niestroj                    1 (0.4%)
+   Keng Soon Cheah                    1 (0.4%)
+   Rajnikant Bhojani                  1 (0.4%)
+   Marc Zyngier                       1 (0.4%)
+   Arnd Bergmann                      1 (0.4%)
+   Alan Tull                          1 (0.4%)
+   Paweł Jarosz                       1 (0.4%)
+   Hou Zhiqiang                       1 (0.4%)
+   Zhang Ying                         1 (0.4%)
+   Amrita Kumari                      1 (0.4%)
+   Kushwaha Prabhakar                 1 (0.4%)
+   Anatolij Gustschin                 1 (0.4%)
+   Jyotheeswar Reddy Mutthareddyvari  1 (0.4%)
+   Rob Herring                        1 (0.4%)
+   Bin Meng                           1 (0.4%)
+   Fabio Estevam                      1 (0.4%)
+   Chirag Parekh                      1 (0.4%)
+   Wilson Lee                         1 (0.4%)
+   Ian Ray                            1 (0.4%)
+   Sascha Hauer                       1 (0.4%)
+   Simon Glass                        1 (0.4%)
+   Kever Yang                         1 (0.4%)
+   =================================  =====
+
+
+.. table:: Developers with the most reviews (total 299)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       92 (30.8%)
+   York Sun                          42 (14.0%)
+   Philipp Tomsich                   30 (10.0%)
+   Fabio Estevam                     22 (7.4%)
+   Bin Meng                          21 (7.0%)
+   Vikas Manocha                     12 (4.0%)
+   Jagan Teki                        11 (3.7%)
+   Lukasz Majewski                   9 (3.0%)
+   Stefano Babic                     7 (2.3%)
+   Heiko Schocher                    7 (2.3%)
+   Stefan Roese                      4 (1.3%)
+   Tom Rini                          4 (1.3%)
+   Andre Przywara                    4 (1.3%)
+   Heinrich Schuchardt               4 (1.3%)
+   Kever Yang                        3 (1.0%)
+   Lokesh Vutla                      3 (1.0%)
+   Peng Fan                          3 (1.0%)
+   Stephen Warren                    3 (1.0%)
+   Beniamino Galvani                 3 (1.0%)
+   Stefan Agner                      2 (0.7%)
+   Neil Armstrong                    1 (0.3%)
+   Sumit Garg                        1 (0.3%)
+   Anatolij Gustschin                1 (0.3%)
+   Sascha Hauer                      1 (0.3%)
+   Marek Vasut                       1 (0.3%)
+   Hyun Kwon                         1 (0.3%)
+   Mark Kettenis                     1 (0.3%)
+   Tomas Melin                       1 (0.3%)
+   Martin Elshuber                   1 (0.3%)
+   Marek Behun                       1 (0.3%)
+   Hannes Schmelzer                  1 (0.3%)
+   Sam Protsenko                     1 (0.3%)
+   Joe Hershberger                   1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 35)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andy Yan                          6 (17.1%)
+   Bin Meng                          4 (11.4%)
+   Klaus Goger                       3 (8.6%)
+   Jakob Unterwurzacher              3 (8.6%)
+   Philipp Tomsich                   2 (5.7%)
+   Marc Gonzalez                     2 (5.7%)
+   Heiko Schocher                    1 (2.9%)
+   Peng Fan                          1 (2.9%)
+   Anatolij Gustschin                1 (2.9%)
+   Marek Vasut                       1 (2.9%)
+   Mark Kettenis                     1 (2.9%)
+   Hannes Schmelzer                  1 (2.9%)
+   Michal Simek                      1 (2.9%)
+   Jörg Krause                       1 (2.9%)
+   Florian Fainelli                  1 (2.9%)
+   Krzysztof Kozlowski               1 (2.9%)
+   Artturi Alm                       1 (2.9%)
+   Koteswararao Nayudu               1 (2.9%)
+   Varga Zsolt                       1 (2.9%)
+   Peter Robinson                    1 (2.9%)
+   Breno Lima                        1 (2.9%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 35)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Philipp Tomsich                   13 (37.1%)
+   Fabio Estevam                     4 (11.4%)
+   Boris Brezillon                   2 (5.7%)
+   Jakob Unterwurzacher              1 (2.9%)
+   Heiko Schocher                    1 (2.9%)
+   Peng Fan                          1 (2.9%)
+   Simon Glass                       1 (2.9%)
+   York Sun                          1 (2.9%)
+   Stefan Roese                      1 (2.9%)
+   Kever Yang                        1 (2.9%)
+   Stefan Agner                      1 (2.9%)
+   Alexander Graf                    1 (2.9%)
+   Anton Gerasimov                   1 (2.9%)
+   Jolly Shah                        1 (2.9%)
+   Bernhard Messerklinger            1 (2.9%)
+   Marek Szyprowski                  1 (2.9%)
+   Suneel Garapati                   1 (2.9%)
+   Jonathan Gray                     1 (2.9%)
+   Goldschmidt Simon                 1 (2.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 13)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Agner                      1 (7.7%)
+   Jonathan Gray                     1 (7.7%)
+   Andy Yan                          1 (7.7%)
+   Michal Simek                      1 (7.7%)
+   Florian Fainelli                  1 (7.7%)
+   Varga Zsolt                       1 (7.7%)
+   Jagan Teki                        1 (7.7%)
+   Yousaf Kaukab                     1 (7.7%)
+   Tobi Wulff                        1 (7.7%)
+   Jason Wu                          1 (7.7%)
+   John Linn                         1 (7.7%)
+   Vladimir Boroda                   1 (7.7%)
+   Kyle Yan                          1 (7.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 13)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    3 (23.1%)
+   Fabio Estevam                     2 (15.4%)
+   Michal Simek                      1 (7.7%)
+   Jagan Teki                        1 (7.7%)
+   Philipp Tomsich                   1 (7.7%)
+   Stephen Warren                    1 (7.7%)
+   Alexey Brodkin                    1 (7.7%)
+   Rob Herring                       1 (7.7%)
+   Chris Packham                     1 (7.7%)
+   Siva Durga Prasad Paladugu        1 (7.7%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         301 (38.3%)
+   AMD                               70 (8.9%)
+   NXP                               67 (8.5%)
+   DENX Software Engineering         62 (7.9%)
+   Google, Inc.                      56 (7.1%)
+   Socionext Inc.                    40 (5.1%)
+   Xilinx                            37 (4.7%)
+   Rockchip                          27 (3.4%)
+   ST Microelectronics               20 (2.5%)
+   BayLibre SAS                      15 (1.9%)
+   Konsulko Group                    13 (1.7%)
+   MIPS                              9 (1.1%)
+   Intel                             7 (0.9%)
+   O.S. Systems                      6 (0.8%)
+   Bootlin                           5 (0.6%)
+   Collabora Ltd.                    5 (0.6%)
+   Linaro                            5 (0.6%)
+   Pengutronix                       5 (0.6%)
+   Texas Instruments                 5 (0.6%)
+   Amarula Solutions                 4 (0.5%)
+   General Electric                  4 (0.5%)
+   National Instruments              4 (0.5%)
+   Toradex                           4 (0.5%)
+   NVidia                            3 (0.4%)
+   Pepperl+Fuchs                     2 (0.3%)
+   Renesas Electronics               2 (0.3%)
+   Samsung                           2 (0.3%)
+   ARM                               1 (0.1%)
+   Cisco                             1 (0.1%)
+   Debian.org                        1 (0.1%)
+   linutronix                        1 (0.1%)
+   Nobuhiro Iwamatsu                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         20883 (30.1%)
+   (Unknown)                         18107 (26.1%)
+   Socionext Inc.                    5823 (8.4%)
+   AMD                               4868 (7.0%)
+   Rockchip                          4128 (5.9%)
+   BayLibre SAS                      3512 (5.1%)
+   Google, Inc.                      3411 (4.9%)
+   NXP                               2774 (4.0%)
+   Collabora Ltd.                    1470 (2.1%)
+   ST Microelectronics               835 (1.2%)
+   Konsulko Group                    621 (0.9%)
+   Samsung                           583 (0.8%)
+   General Electric                  539 (0.8%)
+   Pengutronix                       421 (0.6%)
+   Xilinx                            300 (0.4%)
+   Texas Instruments                 268 (0.4%)
+   Bootlin                           134 (0.2%)
+   NVidia                            122 (0.2%)
+   Intel                             96 (0.1%)
+   Linaro                            81 (0.1%)
+   Renesas Electronics               74 (0.1%)
+   ARM                               73 (0.1%)
+   MIPS                              67 (0.1%)
+   Pepperl+Fuchs                     64 (0.1%)
+   Amarula Solutions                 60 (0.1%)
+   National Instruments              43 (0.1%)
+   Toradex                           21 (0.0%)
+   O.S. Systems                      20 (0.0%)
+   Nobuhiro Iwamatsu                 12 (0.0%)
+   linutronix                        9 (0.0%)
+   Cisco                             2 (0.0%)
+   Debian.org                        1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 235)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   SUSE                              74 (31.5%)
+   Xilinx                            46 (19.6%)
+   (Unknown)                         29 (12.3%)
+   Socionext Inc.                    17 (7.2%)
+   NXP                               16 (6.8%)
+   DENX Software Engineering         15 (6.4%)
+   Bootlin                           10 (4.3%)
+   O.S. Systems                      6 (2.6%)
+   Collabora Ltd.                    5 (2.1%)
+   General Electric                  3 (1.3%)
+   BayLibre SAS                      2 (0.9%)
+   ST Microelectronics               2 (0.9%)
+   Konsulko Group                    2 (0.9%)
+   Samsung                           2 (0.9%)
+   National Instruments              2 (0.9%)
+   Rockchip                          1 (0.4%)
+   Google, Inc.                      1 (0.4%)
+   Pengutronix                       1 (0.4%)
+   ARM                               1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 135)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         56 (41.5%)
+   Xilinx                            16 (11.9%)
+   NXP                               16 (11.9%)
+   DENX Software Engineering         5 (3.7%)
+   National Instruments              3 (2.2%)
+   Texas Instruments                 3 (2.2%)
+   Intel                             3 (2.2%)
+   Socionext Inc.                    2 (1.5%)
+   Collabora Ltd.                    2 (1.5%)
+   General Electric                  2 (1.5%)
+   BayLibre SAS                      2 (1.5%)
+   ST Microelectronics               2 (1.5%)
+   Samsung                           2 (1.5%)
+   Rockchip                          2 (1.5%)
+   Linaro                            2 (1.5%)
+   Bootlin                           1 (0.7%)
+   O.S. Systems                      1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   Google, Inc.                      1 (0.7%)
+   Pengutronix                       1 (0.7%)
+   ARM                               1 (0.7%)
+   AMD                               1 (0.7%)
+   NVidia                            1 (0.7%)
+   Renesas Electronics               1 (0.7%)
+   MIPS                              1 (0.7%)
+   Pepperl+Fuchs                     1 (0.7%)
+   Amarula Solutions                 1 (0.7%)
+   Toradex                           1 (0.7%)
+   Nobuhiro Iwamatsu                 1 (0.7%)
+   linutronix                        1 (0.7%)
+   Cisco                             1 (0.7%)
+   Debian.org                        1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2018.03.rst b/doc/develop/statistics/u-boot-stats-v2018.03.rst
new file mode 100644
index 00000000000..7453aa177b4
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2018.03.rst
@@ -0,0 +1,722 @@
+:orphan:
+
+Release Statistics for U-Boot v2018.03
+======================================
+
+* Processed 1193 changesets from 151 developers
+
+* 30 employers found
+
+* A total of 101060 lines added, 25747 removed (delta 75313)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       89 (7.5%)
+   Heinrich Schuchardt               86 (7.2%)
+   Mario Six                         72 (6.0%)
+   Jean-Jacques Hiblot               60 (5.0%)
+   Peng Fan                          47 (3.9%)
+   Tom Rini                          44 (3.7%)
+   Patrice Chotard                   33 (2.8%)
+   Tuomas Tynkkynen                  32 (2.7%)
+   Bryan O'Donoghue                  30 (2.5%)
+   Michal Simek                      30 (2.5%)
+   Maxime Ripard                     28 (2.3%)
+   Masahiro Yamada                   27 (2.3%)
+   Adam Ford                         25 (2.1%)
+   Alexander Graf                    24 (2.0%)
+   Álvaro Fernández Rojas            24 (2.0%)
+   Kishon Vijay Abraham I            23 (1.9%)
+   David Wu                          20 (1.7%)
+   Simon Glass                       19 (1.6%)
+   Lokesh Vutla                      16 (1.3%)
+   Philipp Tomsich                   15 (1.3%)
+   Vipul Kumar                       14 (1.2%)
+   Alex Kiernan                      14 (1.2%)
+   Goldschmidt Simon                 14 (1.2%)
+   Stephen Warren                    14 (1.2%)
+   Jorge Ramirez-Ortiz               13 (1.1%)
+   Rick Chen                         13 (1.1%)
+   Fabio Estevam                     12 (1.0%)
+   Jagan Teki                        12 (1.0%)
+   Faiz Abbas                        12 (1.0%)
+   Eugeniy Paltsev                   12 (1.0%)
+   Lukasz Majewski                   12 (1.0%)
+   Rajesh Bhagat                     11 (0.9%)
+   York Sun                          10 (0.8%)
+   Andre Heider                      8 (0.7%)
+   Derald D. Woods                   8 (0.7%)
+   Siva Durga Prasad Paladugu        7 (0.6%)
+   Jaehoon Chung                     7 (0.6%)
+   Andre Przywara                    7 (0.6%)
+   Ashish Kumar                      7 (0.6%)
+   Stefan Agner                      6 (0.5%)
+   Hannes Schmelzer                  6 (0.5%)
+   Alexey Brodkin                    6 (0.5%)
+   Chris Packham                     6 (0.5%)
+   Breno Lima                        5 (0.4%)
+   Nobuhiro Iwamatsu                 5 (0.4%)
+   Ian Ray                           5 (0.4%)
+   Andrew F. Davis                   5 (0.4%)
+   Daniel Schwierzeck                5 (0.4%)
+   Bin Meng                          5 (0.4%)
+   Vignesh R                         5 (0.4%)
+   Hannu Lounento                    5 (0.4%)
+   Eddie Cai                         5 (0.4%)
+   Kever Yang                        4 (0.3%)
+   Max Filippov                      4 (0.3%)
+   Sumit Garg                        4 (0.3%)
+   Ulf Magnusson                     4 (0.3%)
+   Eran Matityahu                    4 (0.3%)
+   Patrick Bruenn                    4 (0.3%)
+   Andy Shevchenko                   4 (0.3%)
+   Chris Brandt                      4 (0.3%)
+   Jason Rush                        4 (0.3%)
+   Rob Clark                         4 (0.3%)
+   Florian Fainelli                  4 (0.3%)
+   Jeremy Boone                      3 (0.3%)
+   Bernhard Messerklinger            3 (0.3%)
+   Utkarsh Gupta                     3 (0.3%)
+   Eric Nelson                       3 (0.3%)
+   Martyn Welch                      3 (0.3%)
+   Anson Huang                       3 (0.3%)
+   Ezequiel Garcia                   3 (0.3%)
+   Joe Hershberger                   3 (0.3%)
+   Felix Brack                       3 (0.3%)
+   Yuantian Tang                     3 (0.3%)
+   Miquel Raynal                     3 (0.3%)
+   Ran Wang                          3 (0.3%)
+   Marek Behún                       2 (0.2%)
+   Masaru Nagai                      2 (0.2%)
+   Klaus Goger                       2 (0.2%)
+   Thierry Reding                    2 (0.2%)
+   Stefano Babic                     2 (0.2%)
+   Bin Chen                          2 (0.2%)
+   Zhao Qiang                        2 (0.2%)
+   Sriram Dash                       2 (0.2%)
+   Nandor Han                        2 (0.2%)
+   Andreas Färber                    2 (0.2%)
+   Priyanka Jain                     2 (0.2%)
+   Bhaskar Upadhaya                  2 (0.2%)
+   Christopher Spinrath              2 (0.2%)
+   Suniel Mahesh                     2 (0.2%)
+   Ahmed Mansour                     2 (0.2%)
+   Chen-Yu Tsai                      2 (0.2%)
+   Elaine Zhang                      2 (0.2%)
+   Stefan Theil                      1 (0.1%)
+   Yasushi SHOJI                     1 (0.1%)
+   Ed Bartosh                        1 (0.1%)
+   Paul Kocialkowski                 1 (0.1%)
+   Chin Liang See                    1 (0.1%)
+   Arno Steffens                     1 (0.1%)
+   Jonathan Gray                     1 (0.1%)
+   Anatolij Gustschin                1 (0.1%)
+   Karl Beldan                       1 (0.1%)
+   Alexander Kochetkov               1 (0.1%)
+   Maxim Yu. Osipov                  1 (0.1%)
+   Patrick Delaunay                  1 (0.1%)
+   Linus Walleij                     1 (0.1%)
+   Sam Protsenko                     1 (0.1%)
+   Sekhar Nori                       1 (0.1%)
+   Richard Weinberger                1 (0.1%)
+   Heiko Schocher                    1 (0.1%)
+   Stefan Mavrodiev                  1 (0.1%)
+   Lukas Auer                        1 (0.1%)
+   Vinitha Pillai-B57223             1 (0.1%)
+   Rajat Srivastava                  1 (0.1%)
+   Hou Zhiqiang                      1 (0.1%)
+   Martin Townsend                   1 (0.1%)
+   Justin Hibbits                    1 (0.1%)
+   Soeren Moch                       1 (0.1%)
+   Michael Trimarchi                 1 (0.1%)
+   Benoît Thébaudeau                 1 (0.1%)
+   Ye Li                             1 (0.1%)
+   Yogesh Gaur                       1 (0.1%)
+   Anders Hedlund                    1 (0.1%)
+   Андрей Мозжухин                   1 (0.1%)
+   Konstantin Porotchkin             1 (0.1%)
+   Alberto Sánchez Molero            1 (0.1%)
+   Jelle van der Waa                 1 (0.1%)
+   Bradley Bolen                     1 (0.1%)
+   Martin Etnestad                   1 (0.1%)
+   Chris Blake                       1 (0.1%)
+   Gustavo A. R. Silva               1 (0.1%)
+   Paul Burton                       1 (0.1%)
+   Jun Nie                           1 (0.1%)
+   Angelo Dureghello                 1 (0.1%)
+   Pankaj Bansal                     1 (0.1%)
+   Giulio Benetti                    1 (0.1%)
+   Stefan Brüns                      1 (0.1%)
+   Madan Srinivas                    1 (0.1%)
+   Drew Moseley                      1 (0.1%)
+   Tero Kristo                       1 (0.1%)
+   Tomi Valkeinen                    1 (0.1%)
+   Rex Chang                         1 (0.1%)
+   Alison Wang                       1 (0.1%)
+   Zhang Ying-22455                  1 (0.1%)
+   Jason Brown                       1 (0.1%)
+   Wilson Lee                        1 (0.1%)
+   Koen Vandeputte                   1 (0.1%)
+   Bao Xiaowei                       1 (0.1%)
+   Henry Zhang                       1 (0.1%)
+   Siarhei Siamashka                 1 (0.1%)
+   Florian Klink                     1 (0.1%)
+   Andrey Zhizhikin                  1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       40903 (36.5%)
+   Peng Fan                          8010 (7.1%)
+   Michal Simek                      7210 (6.4%)
+   Tom Rini                          4695 (4.2%)
+   Heinrich Schuchardt               4594 (4.1%)
+   Patrice Chotard                   4319 (3.8%)
+   Masahiro Yamada                   3510 (3.1%)
+   Rick Chen                         3470 (3.1%)
+   Álvaro Fernández Rojas            2382 (2.1%)
+   David Wu                          2274 (2.0%)
+   Jean-Jacques Hiblot               2259 (2.0%)
+   Mario Six                         2117 (1.9%)
+   Adam Ford                         1930 (1.7%)
+   Jorge Ramirez-Ortiz               1645 (1.5%)
+   Alexander Graf                    1583 (1.4%)
+   Felix Brack                       1362 (1.2%)
+   Tuomas Tynkkynen                  1292 (1.2%)
+   Kishon Vijay Abraham I            1175 (1.0%)
+   Derald D. Woods                   1175 (1.0%)
+   Eddie Cai                         1101 (1.0%)
+   Lokesh Vutla                      889 (0.8%)
+   Florian Fainelli                  798 (0.7%)
+   Rajesh Bhagat                     757 (0.7%)
+   Jaehoon Chung                     708 (0.6%)
+   Stephen Warren                    677 (0.6%)
+   Stefano Babic                     603 (0.5%)
+   Siva Durga Prasad Paladugu        544 (0.5%)
+   Bryan O'Donoghue                  482 (0.4%)
+   Ahmed Mansour                     479 (0.4%)
+   Lukasz Majewski                   456 (0.4%)
+   Philipp Tomsich                   445 (0.4%)
+   Andre Przywara                    403 (0.4%)
+   Simon Glass                       396 (0.4%)
+   Jagan Teki                        395 (0.4%)
+   Nandor Han                        394 (0.4%)
+   Eugeniy Paltsev                   390 (0.3%)
+   Maxime Ripard                     342 (0.3%)
+   Hannu Lounento                    314 (0.3%)
+   York Sun                          312 (0.3%)
+   Bhaskar Upadhaya                  296 (0.3%)
+   Michael Trimarchi                 290 (0.3%)
+   Goldschmidt Simon                 260 (0.2%)
+   Breno Lima                        224 (0.2%)
+   Elaine Zhang                      223 (0.2%)
+   Vipul Kumar                       214 (0.2%)
+   Chen-Yu Tsai                      211 (0.2%)
+   Ian Ray                           167 (0.1%)
+   Stefan Agner                      162 (0.1%)
+   Nobuhiro Iwamatsu                 137 (0.1%)
+   Chris Packham                     135 (0.1%)
+   Patrick Bruenn                    135 (0.1%)
+   Sumit Garg                        127 (0.1%)
+   Alex Kiernan                      121 (0.1%)
+   Jason Rush                        121 (0.1%)
+   Bin Chen                          121 (0.1%)
+   Utkarsh Gupta                     119 (0.1%)
+   Konstantin Porotchkin             119 (0.1%)
+   Soeren Moch                       116 (0.1%)
+   Vignesh R                         113 (0.1%)
+   Rex Chang                         106 (0.1%)
+   Fabio Estevam                     95 (0.1%)
+   Faiz Abbas                        95 (0.1%)
+   Wilson Lee                        87 (0.1%)
+   Bin Meng                          86 (0.1%)
+   Ashish Kumar                      84 (0.1%)
+   Hannes Schmelzer                  82 (0.1%)
+   Chris Brandt                      64 (0.1%)
+   Lukas Auer                        60 (0.1%)
+   Andre Heider                      55 (0.0%)
+   Rob Clark                         52 (0.0%)
+   Ran Wang                          51 (0.0%)
+   Martyn Welch                      50 (0.0%)
+   Tero Kristo                       50 (0.0%)
+   Yuantian Tang                     49 (0.0%)
+   Anson Huang                       48 (0.0%)
+   Alexey Brodkin                    43 (0.0%)
+   Ye Li                             43 (0.0%)
+   Андрей Мозжухин                   43 (0.0%)
+   Angelo Dureghello                 41 (0.0%)
+   Richard Weinberger                40 (0.0%)
+   Pankaj Bansal                     39 (0.0%)
+   Kever Yang                        35 (0.0%)
+   Andy Shevchenko                   30 (0.0%)
+   Christopher Spinrath              30 (0.0%)
+   Alison Wang                       29 (0.0%)
+   Andrew F. Davis                   24 (0.0%)
+   Vinitha Pillai-B57223             24 (0.0%)
+   Max Filippov                      21 (0.0%)
+   Jeremy Boone                      21 (0.0%)
+   Sriram Dash                       21 (0.0%)
+   Daniel Schwierzeck                20 (0.0%)
+   Eric Nelson                       20 (0.0%)
+   Siarhei Siamashka                 20 (0.0%)
+   Bernhard Messerklinger            19 (0.0%)
+   Miquel Raynal                     19 (0.0%)
+   Joe Hershberger                   18 (0.0%)
+   Florian Klink                     17 (0.0%)
+   Patrick Delaunay                  16 (0.0%)
+   Thierry Reding                    14 (0.0%)
+   Andrey Zhizhikin                  12 (0.0%)
+   Arno Steffens                     11 (0.0%)
+   Koen Vandeputte                   11 (0.0%)
+   Eran Matityahu                    9 (0.0%)
+   Anatolij Gustschin                9 (0.0%)
+   Jun Nie                           9 (0.0%)
+   Sam Protsenko                     8 (0.0%)
+   Karl Beldan                       7 (0.0%)
+   Hou Zhiqiang                      7 (0.0%)
+   Drew Moseley                      7 (0.0%)
+   Masaru Nagai                      6 (0.0%)
+   Linus Walleij                     6 (0.0%)
+   Sekhar Nori                       6 (0.0%)
+   Benoît Thébaudeau                 6 (0.0%)
+   Yogesh Gaur                       6 (0.0%)
+   Anders Hedlund                    6 (0.0%)
+   Ezequiel Garcia                   5 (0.0%)
+   Marek Behún                       5 (0.0%)
+   Suniel Mahesh                     5 (0.0%)
+   Martin Townsend                   5 (0.0%)
+   Alberto Sánchez Molero            5 (0.0%)
+   Jason Brown                       5 (0.0%)
+   Ulf Magnusson                     4 (0.0%)
+   Zhao Qiang                        4 (0.0%)
+   Andreas Färber                    4 (0.0%)
+   Stefan Mavrodiev                  4 (0.0%)
+   Rajat Srivastava                  4 (0.0%)
+   Paul Burton                       4 (0.0%)
+   Stefan Theil                      3 (0.0%)
+   Chin Liang See                    3 (0.0%)
+   Jonathan Gray                     3 (0.0%)
+   Justin Hibbits                    3 (0.0%)
+   Klaus Goger                       2 (0.0%)
+   Priyanka Jain                     2 (0.0%)
+   Yasushi SHOJI                     2 (0.0%)
+   Maxim Yu. Osipov                  2 (0.0%)
+   Jelle van der Waa                 2 (0.0%)
+   Bradley Bolen                     2 (0.0%)
+   Giulio Benetti                    2 (0.0%)
+   Stefan Brüns                      2 (0.0%)
+   Zhang Ying-22455                  2 (0.0%)
+   Bao Xiaowei                       2 (0.0%)
+   Ed Bartosh                        1 (0.0%)
+   Paul Kocialkowski                 1 (0.0%)
+   Alexander Kochetkov               1 (0.0%)
+   Heiko Schocher                    1 (0.0%)
+   Martin Etnestad                   1 (0.0%)
+   Chris Blake                       1 (0.0%)
+   Gustavo A. R. Silva               1 (0.0%)
+   Madan Srinivas                    1 (0.0%)
+   Tomi Valkeinen                    1 (0.0%)
+   Henry Zhang                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          2451 (9.5%)
+   Masahiro Yamada                   2220 (8.6%)
+   Tuomas Tynkkynen                  805 (3.1%)
+   Adam Ford                         206 (0.8%)
+   Lukasz Majewski                   171 (0.7%)
+   Goldschmidt Simon                 86 (0.3%)
+   Patrick Bruenn                    67 (0.3%)
+   Breno Lima                        64 (0.2%)
+   Chris Brandt                      54 (0.2%)
+   Bin Meng                          45 (0.2%)
+   Ran Wang                          31 (0.1%)
+   Alexey Brodkin                    26 (0.1%)
+   Ian Ray                           19 (0.1%)
+   Pankaj Bansal                     14 (0.1%)
+   Yuantian Tang                     9 (0.0%)
+   Siarhei Siamashka                 8 (0.0%)
+   Martin Townsend                   5 (0.0%)
+   Linus Walleij                     4 (0.0%)
+   Ulf Magnusson                     2 (0.0%)
+   Maxim Yu. Osipov                  2 (0.0%)
+   Jelle van der Waa                 2 (0.0%)
+   Karl Beldan                       1 (0.0%)
+   Zhao Qiang                        1 (0.0%)
+   Bao Xiaowei                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 312)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    66 (21.2%)
+   Stefan Roese                      41 (13.1%)
+   Michal Simek                      25 (8.0%)
+   Jean-Jacques Hiblot               23 (7.4%)
+   Sebastian Reichel                 15 (4.8%)
+   Tom Warren                        14 (4.5%)
+   Greentime Hu                      13 (4.2%)
+   Martyn Welch                      12 (3.8%)
+   Siva Durga Prasad Paladugu        11 (3.5%)
+   Tom Rini                          10 (3.2%)
+   Ashish Kumar                      10 (3.2%)
+   Alexey Brodkin                    9 (2.9%)
+   Kishon Vijay Abraham I            9 (2.9%)
+   Breno Lima                        3 (1.0%)
+   Ian Ray                           3 (1.0%)
+   Vignesh R                         3 (1.0%)
+   Marek Vasut                       3 (1.0%)
+   Christophe Priouzeau              2 (0.6%)
+   Krunal Bhargav                    2 (0.6%)
+   Chih-Mao Chen                     2 (0.6%)
+   Ye Li                             2 (0.6%)
+   Kever Yang                        2 (0.6%)
+   Philipp Tomsich                   2 (0.6%)
+   Lokesh Vutla                      2 (0.6%)
+   Goldschmidt Simon                 1 (0.3%)
+   Bin Meng                          1 (0.3%)
+   Heiko Schocher                    1 (0.3%)
+   Hiroyuki Yokoyama                 1 (0.3%)
+   Theo Buehler                      1 (0.3%)
+   Stuart Henderson                  1 (0.3%)
+   Pankit Garg                       1 (0.3%)
+   Raghav Dogra                      1 (0.3%)
+   Amrita Kumari                     1 (0.3%)
+   Dan Murphy                        1 (0.3%)
+   Franklin S Cooper Jr              1 (0.3%)
+   Raghu Bharadwaj                   1 (0.3%)
+   Karthik Tummala                   1 (0.3%)
+   Udit Agarwal                      1 (0.3%)
+   Andrea Merello                    1 (0.3%)
+   Alexandre Torgue                  1 (0.3%)
+   Andrew F. Davis                   1 (0.3%)
+   Sekhar Nori                       1 (0.3%)
+   Alex Kiernan                      1 (0.3%)
+   Faiz Abbas                        1 (0.3%)
+   Nobuhiro Iwamatsu                 1 (0.3%)
+   Sumit Garg                        1 (0.3%)
+   Maxime Ripard                     1 (0.3%)
+   Jagan Teki                        1 (0.3%)
+   Hannu Lounento                    1 (0.3%)
+   Simon Glass                       1 (0.3%)
+   Jaehoon Chung                     1 (0.3%)
+   Peng Fan                          1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 533)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       106 (19.9%)
+   Fabio Estevam                     66 (12.4%)
+   Jagan Teki                        52 (9.8%)
+   York Sun                          48 (9.0%)
+   Tom Rini                          35 (6.6%)
+   Philipp Tomsich                   32 (6.0%)
+   Stefano Babic                     28 (5.3%)
+   Daniel Schwierzeck                25 (4.7%)
+   Lukasz Majewski                   22 (4.1%)
+   Andre Przywara                    14 (2.6%)
+   Anatolij Gustschin                12 (2.3%)
+   Jaehoon Chung                     11 (2.1%)
+   Bin Meng                          10 (1.9%)
+   Lokesh Vutla                      9 (1.7%)
+   Stefan Roese                      8 (1.5%)
+   Konstantin Porotchkin             6 (1.1%)
+   Marek Vasut                       5 (0.9%)
+   Vikas Manocha                     5 (0.9%)
+   Heiko Schocher                    4 (0.8%)
+   Hannes Schmelzer                  4 (0.8%)
+   Jason Rush                        3 (0.6%)
+   Joe Hershberger                   3 (0.6%)
+   Ian Ray                           2 (0.4%)
+   Sam Protsenko                     2 (0.4%)
+   Andy Shevchenko                   2 (0.4%)
+   Bin Chen                          2 (0.4%)
+   Michal Simek                      1 (0.2%)
+   Jean-Jacques Hiblot               1 (0.2%)
+   Breno Lima                        1 (0.2%)
+   Kever Yang                        1 (0.2%)
+   Alex Kiernan                      1 (0.2%)
+   Peng Fan                          1 (0.2%)
+   Zhao Qiang                        1 (0.2%)
+   Paul Kocialkowski                 1 (0.2%)
+   Mark Kettenis                     1 (0.2%)
+   David Lechner                     1 (0.2%)
+   Peter Howard                      1 (0.2%)
+   Marek Behún                       1 (0.2%)
+   Benoît Thébaudeau                 1 (0.2%)
+   Stefan Agner                      1 (0.2%)
+   Alison Wang                       1 (0.2%)
+   Patrice Chotard                   1 (0.2%)
+   Heinrich Schuchardt               1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 82)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Breno Lima                        26 (31.7%)
+   Klaus Goger                       7 (8.5%)
+   Anand Moon                        5 (6.1%)
+   David Wu                          5 (6.1%)
+   Vignesh R                         4 (4.9%)
+   Goldschmidt Simon                 4 (4.9%)
+   Adam Ford                         4 (4.9%)
+   Alex Kiernan                      3 (3.7%)
+   Bin Meng                          2 (2.4%)
+   Tuomas Tynkkynen                  2 (2.4%)
+   Peter Robinson                    2 (2.4%)
+   Robert Nelson                     2 (2.4%)
+   Shawn Guo                         2 (2.4%)
+   Guillaume GARDET                  2 (2.4%)
+   Jonathan Gray                     2 (2.4%)
+   Lukas Auer                        2 (2.4%)
+   Stephen Warren                    2 (2.4%)
+   Lukasz Majewski                   1 (1.2%)
+   Michal Simek                      1 (1.2%)
+   Alison Wang                       1 (1.2%)
+   Vagrant Cascadian                 1 (1.2%)
+   Max Krummenacher                  1 (1.2%)
+   Bryan O'Donoghue                  1 (1.2%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 82)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bryan O'Donoghue                  27 (32.9%)
+   Philipp Tomsich                   12 (14.6%)
+   Jaehoon Chung                     8 (9.8%)
+   Jason Rush                        8 (9.8%)
+   Jean-Jacques Hiblot               5 (6.1%)
+   Alexander Graf                    4 (4.9%)
+   Lukasz Majewski                   3 (3.7%)
+   Fabio Estevam                     3 (3.7%)
+   Tom Rini                          3 (3.7%)
+   Heinrich Schuchardt               3 (3.7%)
+   Alex Kiernan                      1 (1.2%)
+   Lukas Auer                        1 (1.2%)
+   Anatolij Gustschin                1 (1.2%)
+   Kever Yang                        1 (1.2%)
+   Alberto Sánchez Molero            1 (1.2%)
+   Mario Six                         1 (1.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jonathan Gray                     3 (14.3%)
+   Peter Robinson                    2 (9.5%)
+   Göran Lundberg                    2 (9.5%)
+   Thomas Petazzoni                  2 (9.5%)
+   Heinrich Schuchardt               1 (4.8%)
+   Anatolij Gustschin                1 (4.8%)
+   Breno Lima                        1 (4.8%)
+   Michal Simek                      1 (4.8%)
+   Andre Przywara                    1 (4.8%)
+   Lokesh Vutla                      1 (4.8%)
+   eil Eilmsteiner Heribert          1 (4.8%)
+   Julia Cartwright                  1 (4.8%)
+   Ferry Toth                        1 (4.8%)
+   Steve Kipisz                      1 (4.8%)
+   Denys Dmytriyenko                 1 (4.8%)
+   Derald D. Woods                   1 (4.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    6 (28.6%)
+   Fabio Estevam                     3 (14.3%)
+   Heinrich Schuchardt               2 (9.5%)
+   Lokesh Vutla                      2 (9.5%)
+   Jean-Jacques Hiblot               2 (9.5%)
+   Breno Lima                        1 (4.8%)
+   Michal Simek                      1 (4.8%)
+   Philipp Tomsich                   1 (4.8%)
+   Goldschmidt Simon                 1 (4.8%)
+   Andy Shevchenko                   1 (4.8%)
+   Masahiro Yamada                   1 (4.8%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         388 (32.5%)
+   NXP                               127 (10.6%)
+   Texas Instruments                 126 (10.6%)
+   DENX Software Engineering         105 (8.8%)
+   Guntermann & Drunck               72 (6.0%)
+   Linaro                            47 (3.9%)
+   Konsulko Group                    44 (3.7%)
+   ST Microelectronics               34 (2.8%)
+   Bootlin                           31 (2.6%)
+   AMD                               30 (2.5%)
+   Socionext Inc.                    27 (2.3%)
+   Rockchip                          26 (2.2%)
+   Xilinx                            21 (1.8%)
+   Google, Inc.                      19 (1.6%)
+   NVidia                            16 (1.3%)
+   Pepperl+Fuchs                     14 (1.2%)
+   General Electric                  12 (1.0%)
+   ARM                               7 (0.6%)
+   Samsung                           7 (0.6%)
+   Intel                             6 (0.5%)
+   Renesas Electronics               6 (0.5%)
+   Toradex                           6 (0.5%)
+   Amarula Solutions                 5 (0.4%)
+   Nobuhiro Iwamatsu                 5 (0.4%)
+   National Instruments              4 (0.3%)
+   Collabora Ltd.                    3 (0.3%)
+   SUSE                              2 (0.2%)
+   BayLibre SAS                      1 (0.1%)
+   Marvell                           1 (0.1%)
+   MIPS                              1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         41972 (37.4%)
+   (Unknown)                         22427 (20.0%)
+   NXP                               10834 (9.7%)
+   AMD                               7210 (6.4%)
+   Texas Instruments                 4719 (4.2%)
+   Konsulko Group                    4695 (4.2%)
+   ST Microelectronics               4335 (3.9%)
+   Socionext Inc.                    3510 (3.1%)
+   Rockchip                          2532 (2.3%)
+   Linaro                            2269 (2.0%)
+   Guntermann & Drunck               2117 (1.9%)
+   General Electric                  875 (0.8%)
+   Xilinx                            758 (0.7%)
+   Samsung                           708 (0.6%)
+   NVidia                            691 (0.6%)
+   Amarula Solutions                 425 (0.4%)
+   ARM                               403 (0.4%)
+   Google, Inc.                      396 (0.4%)
+   Bootlin                           361 (0.3%)
+   Pepperl+Fuchs                     260 (0.2%)
+   Toradex                           162 (0.1%)
+   Nobuhiro Iwamatsu                 137 (0.1%)
+   Marvell                           119 (0.1%)
+   National Instruments              105 (0.1%)
+   Renesas Electronics               70 (0.1%)
+   Collabora Ltd.                    50 (0.0%)
+   Intel                             34 (0.0%)
+   SUSE                              4 (0.0%)
+   MIPS                              4 (0.0%)
+   BayLibre SAS                      2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 312)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   SUSE                              66 (21.2%)
+   Texas Instruments                 44 (14.1%)
+   DENX Software Engineering         43 (13.8%)
+   Xilinx                            36 (11.5%)
+   (Unknown)                         35 (11.2%)
+   Collabora Ltd.                    27 (8.7%)
+   NXP                               21 (6.7%)
+   NVidia                            14 (4.5%)
+   Konsulko Group                    10 (3.2%)
+   General Electric                  4 (1.3%)
+   ST Microelectronics               3 (1.0%)
+   Rockchip                          2 (0.6%)
+   Samsung                           1 (0.3%)
+   Amarula Solutions                 1 (0.3%)
+   Google, Inc.                      1 (0.3%)
+   Bootlin                           1 (0.3%)
+   Pepperl+Fuchs                     1 (0.3%)
+   Nobuhiro Iwamatsu                 1 (0.3%)
+   Renesas Electronics               1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 153)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         68 (44.4%)
+   NXP                               25 (16.3%)
+   Texas Instruments                 11 (7.2%)
+   Linaro                            6 (3.9%)
+   DENX Software Engineering         5 (3.3%)
+   General Electric                  3 (2.0%)
+   Rockchip                          3 (2.0%)
+   Intel                             3 (2.0%)
+   Xilinx                            2 (1.3%)
+   NVidia                            2 (1.3%)
+   ST Microelectronics               2 (1.3%)
+   Amarula Solutions                 2 (1.3%)
+   Bootlin                           2 (1.3%)
+   Renesas Electronics               2 (1.3%)
+   National Instruments              2 (1.3%)
+   SUSE                              1 (0.7%)
+   Collabora Ltd.                    1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   Samsung                           1 (0.7%)
+   Google, Inc.                      1 (0.7%)
+   Pepperl+Fuchs                     1 (0.7%)
+   Nobuhiro Iwamatsu                 1 (0.7%)
+   AMD                               1 (0.7%)
+   Socionext Inc.                    1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   ARM                               1 (0.7%)
+   Toradex                           1 (0.7%)
+   Marvell                           1 (0.7%)
+   MIPS                              1 (0.7%)
+   BayLibre SAS                      1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2018.05.rst b/doc/develop/statistics/u-boot-stats-v2018.05.rst
new file mode 100644
index 00000000000..648832a47c3
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2018.05.rst
@@ -0,0 +1,627 @@
+:orphan:
+
+Release Statistics for U-Boot v2018.05
+======================================
+
+* Processed 977 changesets from 128 developers
+
+* 26 employers found
+
+* A total of 72596 lines added, 38379 removed (delta 34217)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heinrich Schuchardt               101 (10.3%)
+   Marek Vasut                       80 (8.2%)
+   Michal Simek                      61 (6.2%)
+   Jagan Teki                        39 (4.0%)
+   Patrick Delaunay                  38 (3.9%)
+   Bryan O'Donoghue                  37 (3.8%)
+   Eugeniy Paltsev                   36 (3.7%)
+   Patrice Chotard                   33 (3.4%)
+   Tom Rini                          26 (2.7%)
+   Álvaro Fernández Rojas            24 (2.5%)
+   Kever Yang                        23 (2.4%)
+   Alex Kiernan                      22 (2.3%)
+   Bin Meng                          20 (2.0%)
+   Miquel Raynal                     20 (2.0%)
+   Rick Chen                         20 (2.0%)
+   Masahiro Yamada                   18 (1.8%)
+   Christophe Leroy                  17 (1.7%)
+   Mario Six                         15 (1.5%)
+   Andre Przywara                    14 (1.4%)
+   Alexander Graf                    14 (1.4%)
+   Neil Armstrong                    14 (1.4%)
+   Ken Ma                            14 (1.4%)
+   Joe Hershberger                   12 (1.2%)
+   Calvin Johnson                    12 (1.2%)
+   Siva Durga Prasad Paladugu        10 (1.0%)
+   Dinh Nguyen                       9 (0.9%)
+   Jean-Jacques Hiblot               8 (0.8%)
+   Alexey Brodkin                    8 (0.8%)
+   yannick fertre                    8 (0.8%)
+   Tuomas Tynkkynen                  7 (0.7%)
+   Philipp Tomsich                   7 (0.7%)
+   Liam Beguin                       7 (0.7%)
+   Lukasz Majewski                   6 (0.6%)
+   Vignesh R                         6 (0.6%)
+   Sam Protsenko                     6 (0.6%)
+   Peng Fan                          5 (0.5%)
+   Simon Glass                       5 (0.5%)
+   Mans Rullgard                     5 (0.5%)
+   Chris Packham                     5 (0.5%)
+   Alexander Kochetkov               5 (0.5%)
+   Vipul Kumar                       5 (0.5%)
+   Fabio Estevam                     4 (0.4%)
+   Lokesh Vutla                      4 (0.4%)
+   Stefan Mavrodiev                  4 (0.4%)
+   Stefan Roese                      4 (0.4%)
+   Wilson Ding                       4 (0.4%)
+   Eran Matityahu                    4 (0.4%)
+   Ashish Kumar                      4 (0.4%)
+   Adam Ford                         3 (0.3%)
+   Christophe Kerello                3 (0.3%)
+   Klaus Goger                       3 (0.3%)
+   Sjoerd Simons                     3 (0.3%)
+   Ivan Gorinov                      3 (0.3%)
+   Rasmus Villemoes                  3 (0.3%)
+   Petr Vorel                        3 (0.3%)
+   Andrew F. Davis                   3 (0.3%)
+   Jason Kridner                     3 (0.3%)
+   Wenyou Yang                       3 (0.3%)
+   Derald D. Woods                   3 (0.3%)
+   Peter Robinson                    2 (0.2%)
+   Hannes Schmelzer                  2 (0.2%)
+   Alexander Dahl                    2 (0.2%)
+   Sébastien Szymanski               2 (0.2%)
+   Pierre-Jean TEXIER                2 (0.2%)
+   Ezequiel Garcia                   2 (0.2%)
+   Kunihiko Hayashi                  2 (0.2%)
+   Matt Pelland                      2 (0.2%)
+   Christian Gmeiner                 2 (0.2%)
+   Ye Li                             2 (0.2%)
+   Luca Ceresoli                     2 (0.2%)
+   Nitin Jain                        2 (0.2%)
+   Anton Gerasimov                   2 (0.2%)
+   Jonathan Gray                     2 (0.2%)
+   Patrick Wildt                     2 (0.2%)
+   Andre Heider                      2 (0.2%)
+   Mark Kettenis                     2 (0.2%)
+   Jörg Krause                       2 (0.2%)
+   Sriram Dash                       2 (0.2%)
+   Priyanka Jain                     2 (0.2%)
+   Punit Agrawal                     2 (0.2%)
+   Faiz Abbas                        2 (0.2%)
+   Stephen Warren                    2 (0.2%)
+   Kyle Evans                        2 (0.2%)
+   Madan Srinivas                    2 (0.2%)
+   Kelvin Cheung                     1 (0.1%)
+   Keerthy                           1 (0.1%)
+   Trevor Woerner                    1 (0.1%)
+   Jaehoon Chung                     1 (0.1%)
+   Eugeniu Rosca                     1 (0.1%)
+   Tien Fong Chee                    1 (0.1%)
+   Mark Jonas                        1 (0.1%)
+   Patrick Uiterwijk                 1 (0.1%)
+   Wadim Egorov                      1 (0.1%)
+   Sean Nyekjaer                     1 (0.1%)
+   Chin Liang See                    1 (0.1%)
+   Jon Nettleton                     1 (0.1%)
+   Trent Piepho                      1 (0.1%)
+   Vanessa Maegima                   1 (0.1%)
+   Ian Ray                           1 (0.1%)
+   Ken Lin                           1 (0.1%)
+   Vasyl Vavrychuk                   1 (0.1%)
+   Bradley Bolen                     1 (0.1%)
+   Kristian Amlie                    1 (0.1%)
+   Guillaume GARDET                  1 (0.1%)
+   Javier Martinez Canillas          1 (0.1%)
+   Srinivas Goud                     1 (0.1%)
+   Jun Nie                           1 (0.1%)
+   Hauke Mehrtens                    1 (0.1%)
+   Marek Behún                       1 (0.1%)
+   Russ Dill                         1 (0.1%)
+   Dave Gerlach                      1 (0.1%)
+   Tero Kristo                       1 (0.1%)
+   Leif Lindholm                     1 (0.1%)
+   Andy Yan                          1 (0.1%)
+   Igal Liberman                     1 (0.1%)
+   Baruch Siach                      1 (0.1%)
+   Bernhard Messerklinger            1 (0.1%)
+   Nandor Han                        1 (0.1%)
+   Anatolij Gustschin                1 (0.1%)
+   Shreenidhi Shedi                  1 (0.1%)
+   David Lechner                     1 (0.1%)
+   Leonid Iziumtsev                  1 (0.1%)
+   Prabhakar Kushwaha                1 (0.1%)
+   Vinitha V Pillai                  1 (0.1%)
+   Philippe CORNU                    1 (0.1%)
+   Ruslan Bilovol                    1 (0.1%)
+   Samuel Holland                    1 (0.1%)
+   Chen-Yu Tsai                      1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          21406 (23.2%)
+   Michal Simek                      14398 (15.6%)
+   Marek Vasut                       7595 (8.2%)
+   Patrick Delaunay                  7363 (8.0%)
+   Calvin Johnson                    5104 (5.5%)
+   Heinrich Schuchardt               3709 (4.0%)
+   yannick fertre                    3448 (3.7%)
+   Eugeniy Paltsev                   2605 (2.8%)
+   Patrice Chotard                   2026 (2.2%)
+   Mario Six                         1692 (1.8%)
+   Álvaro Fernández Rojas            1581 (1.7%)
+   Jagan Teki                        1533 (1.7%)
+   Tuomas Tynkkynen                  1227 (1.3%)
+   Neil Armstrong                    1206 (1.3%)
+   Simon Glass                       1191 (1.3%)
+   Masahiro Yamada                   1161 (1.3%)
+   Lukasz Majewski                   979 (1.1%)
+   Alexander Kochetkov               913 (1.0%)
+   Rick Chen                         786 (0.9%)
+   Dinh Nguyen                       769 (0.8%)
+   Alex Kiernan                      750 (0.8%)
+   Wilson Ding                       746 (0.8%)
+   Alexey Brodkin                    727 (0.8%)
+   Adam Ford                         605 (0.7%)
+   Bin Meng                          517 (0.6%)
+   Alexander Graf                    478 (0.5%)
+   Stefan Mavrodiev                  432 (0.5%)
+   Jean-Jacques Hiblot               431 (0.5%)
+   Bryan O'Donoghue                  428 (0.5%)
+   Andre Przywara                    415 (0.4%)
+   Lokesh Vutla                      386 (0.4%)
+   Christophe Leroy                  346 (0.4%)
+   Ken Ma                            299 (0.3%)
+   Shreenidhi Shedi                  293 (0.3%)
+   Wenyou Yang                       276 (0.3%)
+   Tero Kristo                       269 (0.3%)
+   Stefan Roese                      263 (0.3%)
+   Miquel Raynal                     259 (0.3%)
+   Liam Beguin                       247 (0.3%)
+   Sriram Dash                       245 (0.3%)
+   Siva Durga Prasad Paladugu        241 (0.3%)
+   Kever Yang                        215 (0.2%)
+   Derald D. Woods                   212 (0.2%)
+   Vignesh R                         183 (0.2%)
+   Stephen Warren                    179 (0.2%)
+   Joe Hershberger                   169 (0.2%)
+   Ashish Kumar                      160 (0.2%)
+   Leif Lindholm                     130 (0.1%)
+   Philipp Tomsich                   116 (0.1%)
+   Vipul Kumar                       111 (0.1%)
+   Fabio Estevam                     105 (0.1%)
+   Klaus Goger                       102 (0.1%)
+   Chris Packham                     93 (0.1%)
+   Ivan Gorinov                      87 (0.1%)
+   Sébastien Szymanski               84 (0.1%)
+   Sam Protsenko                     83 (0.1%)
+   Igal Liberman                     58 (0.1%)
+   Madan Srinivas                    53 (0.1%)
+   Anton Gerasimov                   51 (0.1%)
+   Rasmus Villemoes                  50 (0.1%)
+   Jun Nie                           48 (0.1%)
+   Kyle Evans                        46 (0.0%)
+   Peng Fan                          43 (0.0%)
+   Priyanka Jain                     42 (0.0%)
+   Christophe Kerello                40 (0.0%)
+   Jonathan Gray                     37 (0.0%)
+   Petr Vorel                        35 (0.0%)
+   Nitin Jain                        34 (0.0%)
+   Chin Liang See                    33 (0.0%)
+   Eran Matityahu                    32 (0.0%)
+   Russ Dill                         30 (0.0%)
+   Ian Ray                           29 (0.0%)
+   Mans Rullgard                     28 (0.0%)
+   Jason Kridner                     27 (0.0%)
+   Ye Li                             25 (0.0%)
+   Patrick Wildt                     24 (0.0%)
+   Mark Kettenis                     20 (0.0%)
+   Christian Gmeiner                 18 (0.0%)
+   Jörg Krause                       16 (0.0%)
+   Prabhakar Kushwaha                15 (0.0%)
+   Ruslan Bilovol                    15 (0.0%)
+   Hannes Schmelzer                  14 (0.0%)
+   Ezequiel Garcia                   14 (0.0%)
+   Marek Behún                       14 (0.0%)
+   Wadim Egorov                      13 (0.0%)
+   Kunihiko Hayashi                  11 (0.0%)
+   Matt Pelland                      11 (0.0%)
+   Andy Yan                          11 (0.0%)
+   Andrew F. Davis                   10 (0.0%)
+   Luca Ceresoli                     10 (0.0%)
+   Vasyl Vavrychuk                   10 (0.0%)
+   Philippe CORNU                    9 (0.0%)
+   Keerthy                           8 (0.0%)
+   Trent Piepho                      8 (0.0%)
+   Vinitha V Pillai                  7 (0.0%)
+   Sjoerd Simons                     6 (0.0%)
+   Peter Robinson                    5 (0.0%)
+   Tien Fong Chee                    5 (0.0%)
+   Dave Gerlach                      5 (0.0%)
+   Pierre-Jean TEXIER                4 (0.0%)
+   Trevor Woerner                    4 (0.0%)
+   Jaehoon Chung                     4 (0.0%)
+   Eugeniu Rosca                     4 (0.0%)
+   Anatolij Gustschin                4 (0.0%)
+   Andre Heider                      3 (0.0%)
+   Faiz Abbas                        3 (0.0%)
+   Mark Jonas                        3 (0.0%)
+   Vanessa Maegima                   3 (0.0%)
+   Guillaume GARDET                  3 (0.0%)
+   Bernhard Messerklinger            3 (0.0%)
+   David Lechner                     3 (0.0%)
+   Alexander Dahl                    2 (0.0%)
+   Punit Agrawal                     2 (0.0%)
+   Patrick Uiterwijk                 2 (0.0%)
+   Jon Nettleton                     2 (0.0%)
+   Ken Lin                           2 (0.0%)
+   Javier Martinez Canillas          2 (0.0%)
+   Hauke Mehrtens                    2 (0.0%)
+   Nandor Han                        2 (0.0%)
+   Kelvin Cheung                     1 (0.0%)
+   Sean Nyekjaer                     1 (0.0%)
+   Bradley Bolen                     1 (0.0%)
+   Kristian Amlie                    1 (0.0%)
+   Srinivas Goud                     1 (0.0%)
+   Baruch Siach                      1 (0.0%)
+   Leonid Iziumtsev                  1 (0.0%)
+   Samuel Holland                    1 (0.0%)
+   Chen-Yu Tsai                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          11751 (30.6%)
+   Tuomas Tynkkynen                  1197 (3.1%)
+   Simon Glass                       1168 (3.0%)
+   Alexey Brodkin                    656 (1.7%)
+   Stefan Roese                      263 (0.7%)
+   Rick Chen                         247 (0.6%)
+   Christophe Leroy                  173 (0.5%)
+   Chris Packham                     90 (0.2%)
+   Fabio Estevam                     73 (0.2%)
+   Sébastien Szymanski               39 (0.1%)
+   Andre Przywara                    38 (0.1%)
+   Anton Gerasimov                   37 (0.1%)
+   Marek Behún                       14 (0.0%)
+   Ezequiel Garcia                   11 (0.0%)
+   Patrick Uiterwijk                 2 (0.0%)
+   Guillaume GARDET                  1 (0.0%)
+   Bernhard Messerklinger            1 (0.0%)
+   Jon Nettleton                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 224)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    67 (29.9%)
+   Alexey Brodkin                    28 (12.5%)
+   Michal Simek                      26 (11.6%)
+   Stefan Roese                      24 (10.7%)
+   Maxime Ripard                     22 (9.8%)
+   Anjaneyulu Jagarlmudi             10 (4.5%)
+   Patrice Chotard                   5 (2.2%)
+   Tom Rini                          4 (1.8%)
+   Ken Ma                            4 (1.8%)
+   Siva Durga Prasad Paladugu        4 (1.8%)
+   Keerthy                           3 (1.3%)
+   Sebastian Reichel                 2 (0.9%)
+   Priyanka Jain                     2 (0.9%)
+   Christophe Kerello                2 (0.9%)
+   Masahiro Yamada                   2 (0.9%)
+   yannick fertre                    2 (0.9%)
+   Tuomas Tynkkynen                  1 (0.4%)
+   Fabio Estevam                     1 (0.4%)
+   Linus Torvalds                    1 (0.4%)
+   Nava kishore Manne                1 (0.4%)
+   Rob Clark                         1 (0.4%)
+   Martin Fuzzey                     1 (0.4%)
+   Bhaskar Upadhaya                  1 (0.4%)
+   Pratiyush Srivastava              1 (0.4%)
+   Christophe Priouzeau              1 (0.4%)
+   Anatolij Gustschin                1 (0.4%)
+   Peter Robinson                    1 (0.4%)
+   Bin Meng                          1 (0.4%)
+   Jagan Teki                        1 (0.4%)
+   Adam Ford                         1 (0.4%)
+   Dinh Nguyen                       1 (0.4%)
+   Heinrich Schuchardt               1 (0.4%)
+   Calvin Johnson                    1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 289)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Philipp Tomsich                   49 (17.0%)
+   Simon Glass                       45 (15.6%)
+   Fabio Estevam                     32 (11.1%)
+   Jagan Teki                        32 (11.1%)
+   Tom Rini                          21 (7.3%)
+   Bin Meng                          9 (3.1%)
+   Duncan Hare                       7 (2.4%)
+   Hua Jing                          7 (2.4%)
+   Stephen Warren                    7 (2.4%)
+   Christian Gmeiner                 6 (2.1%)
+   Lokesh Vutla                      6 (2.1%)
+   Lukasz Majewski                   6 (2.1%)
+   Chris Packham                     5 (1.7%)
+   Daniel Schwierzeck                5 (1.7%)
+   York Sun                          5 (1.7%)
+   Alexander Graf                    4 (1.4%)
+   Stefan Roese                      4 (1.4%)
+   Stefano Babic                     4 (1.4%)
+   Ryan Harkin                       3 (1.0%)
+   Petr Vorel                        3 (1.0%)
+   Wilson Ding                       3 (1.0%)
+   Michal Simek                      2 (0.7%)
+   Heinrich Schuchardt               2 (0.7%)
+   Andre Przywara                    2 (0.7%)
+   Victor Gu                         2 (0.7%)
+   Jun Nie                           2 (0.7%)
+   Joe Hershberger                   2 (0.7%)
+   Masahiro Yamada                   1 (0.3%)
+   Heiko Schocher                    1 (0.3%)
+   Andy Shevchenko                   1 (0.3%)
+   Eric Nelson                       1 (0.3%)
+   Felix Brack                       1 (0.3%)
+   Kostya Porotchkin                 1 (0.3%)
+   Simon Goldschmidt                 1 (0.3%)
+   David Lechner                     1 (0.3%)
+   Peng Fan                          1 (0.3%)
+   Hannes Schmelzer                  1 (0.3%)
+   Igal Liberman                     1 (0.3%)
+   Jonathan Gray                     1 (0.3%)
+   Leif Lindholm                     1 (0.3%)
+   Patrick Delaunay                  1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 61)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Breno Lima                        23 (37.7%)
+   iSoC Platform CI                  9 (14.8%)
+   Peng Fan                          5 (8.2%)
+   Bin Meng                          2 (3.3%)
+   Wilson Ding                       2 (3.3%)
+   Peter Robinson                    2 (3.3%)
+   Sekhar Nori                       2 (3.3%)
+   Klaus Goger                       2 (3.3%)
+   Fabio Estevam                     1 (1.6%)
+   Jagan Teki                        1 (1.6%)
+   Hua Jing                          1 (1.6%)
+   Alexander Graf                    1 (1.6%)
+   Michal Simek                      1 (1.6%)
+   Felix Brack                       1 (1.6%)
+   Steve Kipisz                      1 (1.6%)
+   Anand Moon                        1 (1.6%)
+   Mylène Josserand                  1 (1.6%)
+   Vagrant Cascadian                 1 (1.6%)
+   Sean Nyekjaer                     1 (1.6%)
+   Sam Protsenko                     1 (1.6%)
+   Alex Kiernan                      1 (1.6%)
+   Jean-Jacques Hiblot               1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 61)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bryan O'Donoghue                  26 (42.6%)
+   Ken Ma                            10 (16.4%)
+   Tom Rini                          3 (4.9%)
+   Lokesh Vutla                      3 (4.9%)
+   Rasmus Villemoes                  3 (4.9%)
+   Wilson Ding                       2 (3.3%)
+   Philipp Tomsich                   2 (3.3%)
+   Ruslan Bilovol                    2 (3.3%)
+   Alexander Graf                    1 (1.6%)
+   Michal Simek                      1 (1.6%)
+   Christian Gmeiner                 1 (1.6%)
+   Heinrich Schuchardt               1 (1.6%)
+   Joe Hershberger                   1 (1.6%)
+   David Lechner                     1 (1.6%)
+   Trent Piepho                      1 (1.6%)
+   Chen-Yu Tsai                      1 (1.6%)
+   Jaehoon Chung                     1 (1.6%)
+   Mark Kettenis                     1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 16)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    3 (18.8%)
+   Peter Robinson                    2 (12.5%)
+   Sekhar Nori                       2 (12.5%)
+   Jean-Jacques Hiblot               2 (12.5%)
+   Heinrich Schuchardt               1 (6.2%)
+   Vagrant Cascadian                 1 (6.2%)
+   Masahiro Yamada                   1 (6.2%)
+   Martin Fuzzey                     1 (6.2%)
+   James Doublesin                   1 (6.2%)
+   Breno Matheus Lima                1 (6.2%)
+   Joe Perches                       1 (6.2%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 16)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      4 (25.0%)
+   Neil Armstrong                    3 (18.8%)
+   Tom Rini                          2 (12.5%)
+   Heinrich Schuchardt               1 (6.2%)
+   Bryan O'Donoghue                  1 (6.2%)
+   Lokesh Vutla                      1 (6.2%)
+   David Lechner                     1 (6.2%)
+   Fabio Estevam                     1 (6.2%)
+   Keerthy                           1 (6.2%)
+   Mario Six                         1 (6.2%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         399 (40.8%)
+   DENX Software Engineering         91 (9.3%)
+   ST Microelectronics               83 (8.5%)
+   AMD                               61 (6.2%)
+   Linaro                            45 (4.6%)
+   NXP                               34 (3.5%)
+   Amarula Solutions                 30 (3.1%)
+   Texas Instruments                 30 (3.1%)
+   Konsulko Group                    26 (2.7%)
+   Rockchip                          24 (2.5%)
+   Bootlin                           20 (2.0%)
+   Socionext Inc.                    20 (2.0%)
+   Marvell                           19 (1.9%)
+   Xilinx                            18 (1.8%)
+   ARM                               16 (1.6%)
+   Guntermann & Drunck               15 (1.5%)
+   BayLibre SAS                      14 (1.4%)
+   National Instruments              12 (1.2%)
+   Google, Inc.                      5 (0.5%)
+   Intel                             5 (0.5%)
+   Collabora Ltd.                    3 (0.3%)
+   General Electric                  2 (0.2%)
+   NVidia                            2 (0.2%)
+   Bosch                             1 (0.1%)
+   Phytec                            1 (0.1%)
+   Samsung                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Konsulko Group                    21406 (23.2%)
+   (Unknown)                         17700 (19.1%)
+   AMD                               14398 (15.6%)
+   ST Microelectronics               12886 (13.9%)
+   DENX Software Engineering         8841 (9.6%)
+   NXP                               5749 (6.2%)
+   Guntermann & Drunck               1692 (1.8%)
+   Texas Instruments                 1381 (1.5%)
+   Amarula Solutions                 1227 (1.3%)
+   BayLibre SAS                      1206 (1.3%)
+   Google, Inc.                      1191 (1.3%)
+   Socionext Inc.                    1172 (1.3%)
+   Marvell                           1103 (1.2%)
+   Linaro                            689 (0.7%)
+   ARM                               417 (0.5%)
+   Xilinx                            387 (0.4%)
+   Bootlin                           259 (0.3%)
+   Rockchip                          226 (0.2%)
+   NVidia                            179 (0.2%)
+   National Instruments              169 (0.2%)
+   Intel                             125 (0.1%)
+   General Electric                  31 (0.0%)
+   Phytec                            13 (0.0%)
+   Collabora Ltd.                    6 (0.0%)
+   Samsung                           4 (0.0%)
+   Bosch                             3 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 224)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   SUSE                              67 (29.9%)
+   (Unknown)                         36 (16.1%)
+   Xilinx                            31 (13.8%)
+   DENX Software Engineering         25 (11.2%)
+   Bootlin                           22 (9.8%)
+   NXP                               16 (7.1%)
+   ST Microelectronics               10 (4.5%)
+   Konsulko Group                    4 (1.8%)
+   Marvell                           4 (1.8%)
+   Texas Instruments                 3 (1.3%)
+   Socionext Inc.                    2 (0.9%)
+   Collabora Ltd.                    2 (0.9%)
+   Amarula Solutions                 1 (0.4%)
+   Linux Foundation                  1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 130)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         65 (50.0%)
+   Texas Instruments                 11 (8.5%)
+   NXP                               10 (7.7%)
+   ST Microelectronics               5 (3.8%)
+   Xilinx                            4 (3.1%)
+   DENX Software Engineering         4 (3.1%)
+   Linaro                            4 (3.1%)
+   Marvell                           3 (2.3%)
+   Intel                             3 (2.3%)
+   Socionext Inc.                    2 (1.5%)
+   ARM                               2 (1.5%)
+   Rockchip                          2 (1.5%)
+   General Electric                  2 (1.5%)
+   Bootlin                           1 (0.8%)
+   Konsulko Group                    1 (0.8%)
+   Collabora Ltd.                    1 (0.8%)
+   Amarula Solutions                 1 (0.8%)
+   AMD                               1 (0.8%)
+   Guntermann & Drunck               1 (0.8%)
+   BayLibre SAS                      1 (0.8%)
+   Google, Inc.                      1 (0.8%)
+   NVidia                            1 (0.8%)
+   National Instruments              1 (0.8%)
+   Phytec                            1 (0.8%)
+   Samsung                           1 (0.8%)
+   Bosch                             1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2018.07.rst b/doc/develop/statistics/u-boot-stats-v2018.07.rst
new file mode 100644
index 00000000000..da1b8aa1a4f
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2018.07.rst
@@ -0,0 +1,686 @@
+:orphan:
+
+Release Statistics for U-Boot v2018.07
+======================================
+
+* Processed 1055 changesets from 141 developers
+
+* 30 employers found
+
+* A total of 88664 lines added, 54500 removed (delta 34164)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       89 (8.4%)
+   Michal Simek                      54 (5.1%)
+   Bin Meng                          52 (4.9%)
+   Jagan Teki                        51 (4.8%)
+   Chris Packham                     48 (4.5%)
+   Lukasz Majewski                   48 (4.5%)
+   Heinrich Schuchardt               43 (4.1%)
+   Miquel Raynal                     32 (3.0%)
+   Simon Glass                       28 (2.7%)
+   Alex Kiernan                      28 (2.7%)
+   Masahiro Yamada                   25 (2.4%)
+   Ramon Fried                       25 (2.4%)
+   Tom Rini                          24 (2.3%)
+   Alexander Graf                    22 (2.1%)
+   Marek Behun                       21 (2.0%)
+   Patrice Chotard                   19 (1.8%)
+   Patrick Delaunay                  19 (1.8%)
+   Siva Durga Prasad Paladugu        18 (1.7%)
+   Álvaro Fernández Rojas            17 (1.6%)
+   Alexey Brodkin                    16 (1.5%)
+   Rick Chen                         16 (1.5%)
+   Stefan Agner                      15 (1.4%)
+   Vasily Khoruzhick                 11 (1.0%)
+   Neil Armstrong                    11 (1.0%)
+   Tuomas Tynkkynen                  11 (1.0%)
+   Marcel Ziswiler                   11 (1.0%)
+   Mario Six                         10 (0.9%)
+   Eugen Hristev                     10 (0.9%)
+   Ley Foon Tan                      9 (0.9%)
+   Bryan O'Donoghue                  9 (0.9%)
+   Igor Opaniuk                      8 (0.8%)
+   Jaehoon Chung                     8 (0.8%)
+   Adam Ford                         7 (0.7%)
+   Seung-Woo Kim                     7 (0.7%)
+   Tien Fong Chee                    7 (0.7%)
+   Ivan Gorinov                      6 (0.6%)
+   Fabio Estevam                     6 (0.6%)
+   Kunihiko Hayashi                  6 (0.6%)
+   Chen-Yu Tsai                      6 (0.6%)
+   Ian Ray                           6 (0.6%)
+   Lokesh Vutla                      6 (0.6%)
+   Peter Robinson                    5 (0.5%)
+   Hannes Schmelzer                  5 (0.5%)
+   Ashish Kumar                      5 (0.5%)
+   Jon Nettleton                     5 (0.5%)
+   David Lechner                     5 (0.5%)
+   Nishanth Menon                    4 (0.4%)
+   Jörg Krause                       4 (0.4%)
+   Matwey V. Kornilov                4 (0.4%)
+   Eugeniu Rosca                     4 (0.4%)
+   Christophe Kerello                4 (0.4%)
+   Ludovic Desroches                 4 (0.4%)
+   Patrick Bruenn                    4 (0.4%)
+   Andre Przywara                    3 (0.3%)
+   Emmanuel Vadot                    3 (0.3%)
+   Rabeeh Khoury                     3 (0.3%)
+   Baruch Siach                      3 (0.3%)
+   Joe Hershberger                   3 (0.3%)
+   Eugeniy Paltsev                   3 (0.3%)
+   Christian Gmeiner                 3 (0.3%)
+   Jagdish Gediya                    3 (0.3%)
+   Vagrant Cascadian                 3 (0.3%)
+   Ken Ma                            3 (0.3%)
+   Mugunthan V N                     3 (0.3%)
+   Fabrice Gasnier                   3 (0.3%)
+   Praneeth Bajjuri                  3 (0.3%)
+   Jassi Brar                        3 (0.3%)
+   Philipp Tomsich                   2 (0.2%)
+   Guillaume Gardet                  2 (0.2%)
+   Michael Trimarchi                 2 (0.2%)
+   Vipul Kumar                       2 (0.2%)
+   Beniamino Galvani                 2 (0.2%)
+   Yevgeny Popovych                  2 (0.2%)
+   Mans Rullgard                     2 (0.2%)
+   Hauke Mehrtens                    2 (0.2%)
+   Tomi Valkeinen                    2 (0.2%)
+   Bhaskar Upadhaya                  2 (0.2%)
+   Sam Protsenko                     2 (0.2%)
+   Michael Walle                     2 (0.2%)
+   Takeshi Kihara                    2 (0.2%)
+   Rob Herring                       2 (0.2%)
+   Rajan Vaja                        2 (0.2%)
+   Konstantin Porotchkin             2 (0.2%)
+   Nicolas Ferre                     2 (0.2%)
+   Magnus Lilja                      2 (0.2%)
+   Nandor Han                        2 (0.2%)
+   Jonathan Gray                     2 (0.2%)
+   Hou Zhiqiang                      2 (0.2%)
+   Lothar Felten                     1 (0.1%)
+   Stefan Roese                      1 (0.1%)
+   Zeng Tao                          1 (0.1%)
+   Andrew Thomas                     1 (0.1%)
+   Stefano Babic                     1 (0.1%)
+   Trent Piepho                      1 (0.1%)
+   Andrew F. Davis                   1 (0.1%)
+   Otavio Salvador                   1 (0.1%)
+   Ye Li                             1 (0.1%)
+   Luca Ceresoli                     1 (0.1%)
+   Quentin Schulz                    1 (0.1%)
+   Radu Bulie                        1 (0.1%)
+   Leonid Iziumtsev                  1 (0.1%)
+   Vicentiu Galanopulo               1 (0.1%)
+   Shyam Saini                       1 (0.1%)
+   Andy Shevchenko                   1 (0.1%)
+   Dennis Gilmore                    1 (0.1%)
+   Vinitha V Pillai                  1 (0.1%)
+   Priyanka Jain                     1 (0.1%)
+   Ran Wang                          1 (0.1%)
+   Riku Voipio                       1 (0.1%)
+   Carlo Caione                      1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Yoshihiro Shimoda                 1 (0.1%)
+   Ezequiel Garcia                   1 (0.1%)
+   Ibai Erkiaga                      1 (0.1%)
+   Alex Deymo                        1 (0.1%)
+   Matthias Blankertz                1 (0.1%)
+   David Sniatkiwicz                 1 (0.1%)
+   Evan Wang                         1 (0.1%)
+   Jun Nie                           1 (0.1%)
+   Kelvin Cheung                     1 (0.1%)
+   Radoslaw Pietrzyk                 1 (0.1%)
+   Maxime Ripard                     1 (0.1%)
+   Ladislav Michl                    1 (0.1%)
+   Ben Kalo                          1 (0.1%)
+   Sebastian Reichel                 1 (0.1%)
+   Kimmo Rautkoski                   1 (0.1%)
+   Kever Yang                        1 (0.1%)
+   Lothar Waßmann                    1 (0.1%)
+   zachary                           1 (0.1%)
+   Nitin Jain                        1 (0.1%)
+   Sanchayan Maity                   1 (0.1%)
+   Yogesh Gaur                       1 (0.1%)
+   Sumit Garg                        1 (0.1%)
+   Takuma Ueba                       1 (0.1%)
+   Ruchika Gupta                     1 (0.1%)
+   Sriram Dash                       1 (0.1%)
+   Rajat Srivastava                  1 (0.1%)
+   Clément Péron                     1 (0.1%)
+   Grygorii Strashko                 1 (0.1%)
+   Michalis Pappas                   1 (0.1%)
+   Andy Yan                          1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       32311 (27.3%)
+   Chris Packham                     14297 (12.1%)
+   Eugeniu Rosca                     10343 (8.7%)
+   Igor Opaniuk                      8197 (6.9%)
+   Tom Rini                          5556 (4.7%)
+   Miquel Raynal                     3987 (3.4%)
+   Jagan Teki                        3308 (2.8%)
+   Alex Kiernan                      2702 (2.3%)
+   Alexander Graf                    2190 (1.9%)
+   Neil Armstrong                    1978 (1.7%)
+   Tuomas Tynkkynen                  1967 (1.7%)
+   Marek Behun                       1877 (1.6%)
+   Ley Foon Tan                      1783 (1.5%)
+   Heinrich Schuchardt               1657 (1.4%)
+   Siva Durga Prasad Paladugu        1638 (1.4%)
+   Lukasz Majewski                   1526 (1.3%)
+   Patrick Delaunay                  1420 (1.2%)
+   Michal Simek                      1346 (1.1%)
+   Bin Meng                          1255 (1.1%)
+   Tien Fong Chee                    1240 (1.0%)
+   Patrice Chotard                   1038 (0.9%)
+   Simon Glass                       1035 (0.9%)
+   Kunihiko Hayashi                  1031 (0.9%)
+   Alexey Brodkin                    958 (0.8%)
+   Stefan Agner                      890 (0.8%)
+   Dennis Gilmore                    886 (0.7%)
+   Christophe Kerello                695 (0.6%)
+   Rob Herring                       642 (0.5%)
+   Ramon Fried                       632 (0.5%)
+   Mario Six                         617 (0.5%)
+   Beniamino Galvani                 582 (0.5%)
+   Masahiro Yamada                   545 (0.5%)
+   Bhaskar Upadhaya                  471 (0.4%)
+   Ezequiel Garcia                   470 (0.4%)
+   Vasily Khoruzhick                 392 (0.3%)
+   Lokesh Vutla                      380 (0.3%)
+   Jaehoon Chung                     362 (0.3%)
+   Marcel Ziswiler                   354 (0.3%)
+   Rick Chen                         322 (0.3%)
+   Álvaro Fernández Rojas            294 (0.2%)
+   Hauke Mehrtens                    290 (0.2%)
+   Chen-Yu Tsai                      245 (0.2%)
+   Adam Ford                         229 (0.2%)
+   Lothar Felten                     223 (0.2%)
+   Radu Bulie                        204 (0.2%)
+   Jon Nettleton                     194 (0.2%)
+   Fabrice Gasnier                   192 (0.2%)
+   Eugeniy Paltsev                   186 (0.2%)
+   Ibai Erkiaga                      173 (0.1%)
+   Ivan Gorinov                      148 (0.1%)
+   Guillaume Gardet                  146 (0.1%)
+   David Lechner                     134 (0.1%)
+   Ian Ray                           132 (0.1%)
+   Yoshihiro Shimoda                 131 (0.1%)
+   Jassi Brar                        124 (0.1%)
+   Vinitha V Pillai                  116 (0.1%)
+   Mugunthan V N                     108 (0.1%)
+   Mans Rullgard                     91 (0.1%)
+   Sumit Garg                        91 (0.1%)
+   Michalis Pappas                   87 (0.1%)
+   Konstantin Porotchkin             79 (0.1%)
+   Nitin Jain                        74 (0.1%)
+   Andre Przywara                    71 (0.1%)
+   Seung-Woo Kim                     61 (0.1%)
+   Sam Protsenko                     58 (0.0%)
+   Patrick Bruenn                    56 (0.0%)
+   Kelvin Cheung                     53 (0.0%)
+   Vicentiu Galanopulo               52 (0.0%)
+   Jörg Krause                       51 (0.0%)
+   Alex Deymo                        49 (0.0%)
+   Ludovic Desroches                 48 (0.0%)
+   Christian Gmeiner                 47 (0.0%)
+   Takeshi Kihara                    44 (0.0%)
+   Magnus Lilja                      42 (0.0%)
+   Ye Li                             42 (0.0%)
+   Matwey V. Kornilov                41 (0.0%)
+   Nandor Han                        39 (0.0%)
+   Ashish Kumar                      38 (0.0%)
+   Lothar Waßmann                    38 (0.0%)
+   Bryan O'Donoghue                  37 (0.0%)
+   Baruch Siach                      37 (0.0%)
+   Eugen Hristev                     34 (0.0%)
+   Peter Robinson                    34 (0.0%)
+   Jagdish Gediya                    34 (0.0%)
+   Sriram Dash                       34 (0.0%)
+   Ken Ma                            33 (0.0%)
+   Jun Nie                           32 (0.0%)
+   Fabio Estevam                     30 (0.0%)
+   Daniel Schwierzeck                29 (0.0%)
+   Radoslaw Pietrzyk                 29 (0.0%)
+   zachary                           28 (0.0%)
+   Nishanth Menon                    25 (0.0%)
+   Philipp Tomsich                   25 (0.0%)
+   Yevgeny Popovych                  23 (0.0%)
+   Michael Walle                     22 (0.0%)
+   Hannes Schmelzer                  21 (0.0%)
+   Rajat Srivastava                  21 (0.0%)
+   Joe Hershberger                   18 (0.0%)
+   Rajan Vaja                        18 (0.0%)
+   Yogesh Gaur                       17 (0.0%)
+   Evan Wang                         16 (0.0%)
+   Clément Péron                     13 (0.0%)
+   Jonathan Gray                     12 (0.0%)
+   Hou Zhiqiang                      12 (0.0%)
+   Maxime Ripard                     12 (0.0%)
+   Andy Yan                          11 (0.0%)
+   Emmanuel Vadot                    10 (0.0%)
+   Shyam Saini                       10 (0.0%)
+   Quentin Schulz                    9 (0.0%)
+   Ladislav Michl                    9 (0.0%)
+   Tomi Valkeinen                    8 (0.0%)
+   Nicolas Ferre                     8 (0.0%)
+   David Sniatkiwicz                 8 (0.0%)
+   Luca Ceresoli                     7 (0.0%)
+   Ran Wang                          7 (0.0%)
+   Takuma Ueba                       7 (0.0%)
+   Vagrant Cascadian                 6 (0.0%)
+   Stefan Roese                      6 (0.0%)
+   Kever Yang                        6 (0.0%)
+   Rabeeh Khoury                     5 (0.0%)
+   Praneeth Bajjuri                  5 (0.0%)
+   Ruchika Gupta                     5 (0.0%)
+   Michael Trimarchi                 4 (0.0%)
+   Vipul Kumar                       4 (0.0%)
+   Trent Piepho                      4 (0.0%)
+   Matthias Blankertz                4 (0.0%)
+   Leonid Iziumtsev                  3 (0.0%)
+   Kimmo Rautkoski                   3 (0.0%)
+   Ben Kalo                          2 (0.0%)
+   Sanchayan Maity                   2 (0.0%)
+   Zeng Tao                          1 (0.0%)
+   Andrew Thomas                     1 (0.0%)
+   Stefano Babic                     1 (0.0%)
+   Andrew F. Davis                   1 (0.0%)
+   Otavio Salvador                   1 (0.0%)
+   Andy Shevchenko                   1 (0.0%)
+   Priyanka Jain                     1 (0.0%)
+   Riku Voipio                       1 (0.0%)
+   Carlo Caione                      1 (0.0%)
+   Sebastian Reichel                 1 (0.0%)
+   Grygorii Strashko                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Eugeniu Rosca                     8641 (15.9%)
+   Tom Rini                          4271 (7.8%)
+   Tuomas Tynkkynen                  1834 (3.4%)
+   Jaehoon Chung                     314 (0.6%)
+   Ian Ray                           102 (0.2%)
+   Guillaume Gardet                  98 (0.2%)
+   Peter Robinson                    25 (0.0%)
+   Sam Protsenko                     20 (0.0%)
+   David Lechner                     15 (0.0%)
+   Maxime Ripard                     12 (0.0%)
+   David Sniatkiwicz                 8 (0.0%)
+   Philipp Tomsich                   7 (0.0%)
+   Andy Yan                          7 (0.0%)
+   Bryan O'Donoghue                  5 (0.0%)
+   Hannes Schmelzer                  2 (0.0%)
+   Ladislav Michl                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 280)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      68 (24.3%)
+   Alexander Graf                    41 (14.6%)
+   Michal Simek                      33 (11.8%)
+   Patrice Chotard                   17 (6.1%)
+   Tom Warren                        13 (4.6%)
+   Tom Rini                          12 (4.3%)
+   Sebastian Reichel                 8 (2.9%)
+   Baruch Siach                      8 (2.9%)
+   Bin Meng                          6 (2.1%)
+   Chin Liang See                    5 (1.8%)
+   Simone CIANNI                     5 (1.8%)
+   Raffaele RECALCATI                5 (1.8%)
+   Nandor Han                        5 (1.8%)
+   Masahiro Yamada                   5 (1.8%)
+   Christophe Kerello                4 (1.4%)
+   Eugen Hristev                     3 (1.1%)
+   Alexey Brodkin                    3 (1.1%)
+   Eugeniu Rosca                     2 (0.7%)
+   Evan Wang                         2 (0.7%)
+   Otavio Salvador                   2 (0.7%)
+   Oleksandr Tymoshenko              2 (0.7%)
+   Minkyu Kang                       2 (0.7%)
+   Marek Vasut                       2 (0.7%)
+   Patrick Delaunay                  2 (0.7%)
+   Neil Armstrong                    2 (0.7%)
+   Jagan Teki                        2 (0.7%)
+   Priyanka Jain                     1 (0.4%)
+   Ioan-Adrian Ratiu                 1 (0.4%)
+   Jocelyn Bohr                      1 (0.4%)
+   Richard Weinberger                1 (0.4%)
+   Amelie Delaunay                   1 (0.4%)
+   Prabhakar Kushwaha                1 (0.4%)
+   Yoshihisa Morizumi                1 (0.4%)
+   Jagdish Gediya                    1 (0.4%)
+   Fabio Estevam                     1 (0.4%)
+   Rabeeh Khoury                     1 (0.4%)
+   Kever Yang                        1 (0.4%)
+   Daniel Schwierzeck                1 (0.4%)
+   Ken Ma                            1 (0.4%)
+   Takeshi Kihara                    1 (0.4%)
+   Alex Deymo                        1 (0.4%)
+   Vinitha V Pillai                  1 (0.4%)
+   Yoshihiro Shimoda                 1 (0.4%)
+   Lokesh Vutla                      1 (0.4%)
+   Simon Glass                       1 (0.4%)
+   Marek Behun                       1 (0.4%)
+   Siva Durga Prasad Paladugu        1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 437)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       182 (41.6%)
+   Tom Rini                          53 (12.1%)
+   Stefan Roese                      45 (10.3%)
+   Jagan Teki                        36 (8.2%)
+   York Sun                          19 (4.3%)
+   Daniel Schwierzeck                17 (3.9%)
+   Bin Meng                          9 (2.1%)
+   Heinrich Schuchardt               9 (2.1%)
+   Alexander Graf                    7 (1.6%)
+   Masahiro Yamada                   7 (1.6%)
+   Fabio Estevam                     7 (1.6%)
+   Joe Hershberger                   5 (1.1%)
+   Philipp Tomsich                   3 (0.7%)
+   Alex Kiernan                      3 (0.7%)
+   Michal Simek                      2 (0.5%)
+   Marek Vasut                       2 (0.5%)
+   Sam Protsenko                     2 (0.5%)
+   Peng Fan                          2 (0.5%)
+   Heiko Schocher                    2 (0.5%)
+   Dinh Nguyen                       2 (0.5%)
+   Anand Moon                        2 (0.5%)
+   Jernej Skrabec                    2 (0.5%)
+   Stephen Warren                    2 (0.5%)
+   Stefano Babic                     2 (0.5%)
+   Lukasz Majewski                   2 (0.5%)
+   Chris Packham                     2 (0.5%)
+   Minkyu Kang                       1 (0.2%)
+   Jocelyn Bohr                      1 (0.2%)
+   Prabhakar Kushwaha                1 (0.2%)
+   Kever Yang                        1 (0.2%)
+   Marek Behun                       1 (0.2%)
+   Jaehoon Chung                     1 (0.2%)
+   Bin Chen                          1 (0.2%)
+   Anatolij Gustschin                1 (0.2%)
+   Felix Brack                       1 (0.2%)
+   Chih-Mao Chen                     1 (0.2%)
+   CITOOLS                           1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 38)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      6 (15.8%)
+   Petr Vorel                        3 (7.9%)
+   Jagan Teki                        2 (5.3%)
+   Bin Meng                          2 (5.3%)
+   Fabio Estevam                     2 (5.3%)
+   Marek Vasut                       2 (5.3%)
+   Chris Packham                     2 (5.3%)
+   Guillaume Gardet                  2 (5.3%)
+   Peter Robinson                    2 (5.3%)
+   Andreas Färber                    2 (5.3%)
+   Matthias Blankertz                2 (5.3%)
+   Heinrich Schuchardt               1 (2.6%)
+   Masahiro Yamada                   1 (2.6%)
+   Alex Kiernan                      1 (2.6%)
+   Felix Brack                       1 (2.6%)
+   Patrice Chotard                   1 (2.6%)
+   Michael Walle                     1 (2.6%)
+   Denis Pynkin                      1 (2.6%)
+   Andy Shevchenko                   1 (2.6%)
+   Lothar Waßmann                    1 (2.6%)
+   Mario Six                         1 (2.6%)
+   Ley Foon Tan                      1 (2.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 38)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andre Przywara                    6 (15.8%)
+   Lokesh Vutla                      5 (13.2%)
+   Bin Meng                          4 (10.5%)
+   Eugeniu Rosca                     3 (7.9%)
+   Rabeeh Khoury                     3 (7.9%)
+   Alexander Graf                    2 (5.3%)
+   Nishanth Menon                    2 (5.3%)
+   Michal Simek                      1 (2.6%)
+   Guillaume Gardet                  1 (2.6%)
+   Alex Kiernan                      1 (2.6%)
+   Patrice Chotard                   1 (2.6%)
+   Michael Walle                     1 (2.6%)
+   Lothar Waßmann                    1 (2.6%)
+   Simon Glass                       1 (2.6%)
+   Sam Protsenko                     1 (2.6%)
+   Siva Durga Prasad Paladugu        1 (2.6%)
+   Andrew Thomas                     1 (2.6%)
+   Jonathan Gray                     1 (2.6%)
+   Ivan Gorinov                      1 (2.6%)
+   Tien Fong Chee                    1 (2.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 13)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    1 (7.7%)
+   Simon Glass                       1 (7.7%)
+   Petr Vorel                        1 (7.7%)
+   Marek Vasut                       1 (7.7%)
+   Andreas Färber                    1 (7.7%)
+   Heinrich Schuchardt               1 (7.7%)
+   Masahiro Yamada                   1 (7.7%)
+   Jaehoon Chung                     1 (7.7%)
+   Tuomas Tynkkynen                  1 (7.7%)
+   Fabian Vogt                       1 (7.7%)
+   Udo Maslo                         1 (7.7%)
+   Jan Leonhardt                     1 (7.7%)
+   Kunihiko Hayashi                  1 (7.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 13)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    4 (30.8%)
+   Heinrich Schuchardt               1 (7.7%)
+   Masahiro Yamada                   1 (7.7%)
+   Bin Meng                          1 (7.7%)
+   Eugeniu Rosca                     1 (7.7%)
+   Michal Simek                      1 (7.7%)
+   Siva Durga Prasad Paladugu        1 (7.7%)
+   Tom Rini                          1 (7.7%)
+   Joe Hershberger                   1 (7.7%)
+   Seung-Woo Kim                     1 (7.7%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         448 (42.5%)
+   DENX Software Engineering         139 (13.2%)
+   AMD                               54 (5.1%)
+   Amarula Solutions                 51 (4.8%)
+   ST Microelectronics               45 (4.3%)
+   Bootlin                           34 (3.2%)
+   Socionext Inc.                    31 (2.9%)
+   Google, Inc.                      29 (2.7%)
+   NXP                               27 (2.6%)
+   Toradex                           27 (2.6%)
+   Konsulko Group                    24 (2.3%)
+   Xilinx                            24 (2.3%)
+   Intel                             23 (2.2%)
+   Texas Instruments                 20 (1.9%)
+   Samsung                           15 (1.4%)
+   BayLibre SAS                      11 (1.0%)
+   Guntermann & Drunck               10 (0.9%)
+   General Electric                  8 (0.8%)
+   Linaro                            8 (0.8%)
+   Marvell                           8 (0.8%)
+   ARM                               3 (0.3%)
+   Debian.org                        3 (0.3%)
+   National Instruments              3 (0.3%)
+   Renesas Electronics               3 (0.3%)
+   Rockchip                          2 (0.2%)
+   Fujitsu                           1 (0.1%)
+   Collabora Ltd.                    1 (0.1%)
+   FastMail.FM                       1 (0.1%)
+   Oracle                            1 (0.1%)
+   O.S. Systems                      1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         52177 (44.1%)
+   DENX Software Engineering         33844 (28.6%)
+   Konsulko Group                    5556 (4.7%)
+   Bootlin                           4008 (3.4%)
+   ST Microelectronics               3345 (2.8%)
+   Amarula Solutions                 3287 (2.8%)
+   Intel                             3172 (2.7%)
+   BayLibre SAS                      1978 (1.7%)
+   Xilinx                            1907 (1.6%)
+   Socionext Inc.                    1576 (1.3%)
+   AMD                               1346 (1.1%)
+   Toradex                           1246 (1.1%)
+   NXP                               1171 (1.0%)
+   Google, Inc.                      1084 (0.9%)
+   Guntermann & Drunck               617 (0.5%)
+   Texas Instruments                 528 (0.4%)
+   Samsung                           423 (0.4%)
+   Linaro                            227 (0.2%)
+   Renesas Electronics               175 (0.1%)
+   General Electric                  171 (0.1%)
+   Marvell                           164 (0.1%)
+   FastMail.FM                       87 (0.1%)
+   ARM                               71 (0.1%)
+   National Instruments              18 (0.0%)
+   Rockchip                          17 (0.0%)
+   Fujitsu                           7 (0.0%)
+   Debian.org                        6 (0.0%)
+   Collabora Ltd.                    1 (0.0%)
+   Oracle                            1 (0.0%)
+   O.S. Systems                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 280)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         68 (24.3%)
+   (Unknown)                         41 (14.6%)
+   SUSE                              41 (14.6%)
+   Xilinx                            33 (11.8%)
+   ST Microelectronics               24 (8.6%)
+   NVidia                            13 (4.6%)
+   Konsulko Group                    12 (4.3%)
+   Collabora Ltd.                    8 (2.9%)
+   Intel                             5 (1.8%)
+   Socionext Inc.                    5 (1.8%)
+   NXP                               5 (1.8%)
+   General Electric                  5 (1.8%)
+   Google, Inc.                      3 (1.1%)
+   Marvell                           3 (1.1%)
+   Amarula Solutions                 2 (0.7%)
+   BayLibre SAS                      2 (0.7%)
+   Samsung                           2 (0.7%)
+   Renesas Electronics               2 (0.7%)
+   O.S. Systems                      2 (0.7%)
+   Texas Instruments                 1 (0.4%)
+   National Instruments              1 (0.4%)
+   Rockchip                          1 (0.4%)
+   Fujitsu                           1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 144)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         62 (43.1%)
+   NXP                               16 (11.1%)
+   Texas Instruments                 7 (4.9%)
+   Xilinx                            5 (3.5%)
+   Marvell                           5 (3.5%)
+   Linaro                            5 (3.5%)
+   DENX Software Engineering         4 (2.8%)
+   ST Microelectronics               4 (2.8%)
+   Intel                             4 (2.8%)
+   Bootlin                           3 (2.1%)
+   Toradex                           3 (2.1%)
+   Socionext Inc.                    2 (1.4%)
+   General Electric                  2 (1.4%)
+   Google, Inc.                      2 (1.4%)
+   Amarula Solutions                 2 (1.4%)
+   Samsung                           2 (1.4%)
+   Renesas Electronics               2 (1.4%)
+   Rockchip                          2 (1.4%)
+   Konsulko Group                    1 (0.7%)
+   Collabora Ltd.                    1 (0.7%)
+   BayLibre SAS                      1 (0.7%)
+   O.S. Systems                      1 (0.7%)
+   National Instruments              1 (0.7%)
+   Fujitsu                           1 (0.7%)
+   AMD                               1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   FastMail.FM                       1 (0.7%)
+   ARM                               1 (0.7%)
+   Debian.org                        1 (0.7%)
+   Oracle                            1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2018.09.rst b/doc/develop/statistics/u-boot-stats-v2018.09.rst
new file mode 100644
index 00000000000..d360b9a8912
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2018.09.rst
@@ -0,0 +1,678 @@
+:orphan:
+
+Release Statistics for U-Boot v2018.09
+======================================
+
+* Processed 983 changesets from 138 developers
+
+* 32 employers found
+
+* A total of 62059 lines added, 23685 removed (delta 38374)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       75 (7.6%)
+   Michal Simek                      66 (6.7%)
+   Heinrich Schuchardt               54 (5.5%)
+   Marek Vasut                       49 (5.0%)
+   Bin Meng                          43 (4.4%)
+   Adam Ford                         38 (3.9%)
+   Tom Rini                          29 (3.0%)
+   Ley Foon Tan                      27 (2.7%)
+   Patrice Chotard                   25 (2.5%)
+   Joe Hershberger                   24 (2.4%)
+   Patrick Delaunay                  20 (2.0%)
+   Ramon Fried                       17 (1.7%)
+   Alexander Graf                    16 (1.6%)
+   Jagan Teki                        16 (1.6%)
+   Stefan Agner                      15 (1.5%)
+   Icenowy Zheng                     15 (1.5%)
+   York Sun                          13 (1.3%)
+   Mario Six                         13 (1.3%)
+   Baruch Siach                      13 (1.3%)
+   Hannes Schmelzer                  13 (1.3%)
+   Masahiro Yamada                   12 (1.2%)
+   Siva Durga Prasad Paladugu        12 (1.2%)
+   Lukasz Majewski                   11 (1.1%)
+   Fabio Estevam                     10 (1.0%)
+   Alex Kiernan                      10 (1.0%)
+   Manivannan Sadhasivam             10 (1.0%)
+   Miquel Raynal                     10 (1.0%)
+   Otavio Salvador                   9 (0.9%)
+   Ye Li                             9 (0.9%)
+   Simon Goldschmidt                 9 (0.9%)
+   Eugeniu Rosca                     9 (0.9%)
+   Stephen Warren                    9 (0.9%)
+   Andre Przywara                    9 (0.9%)
+   Sam Protsenko                     8 (0.8%)
+   Peng Fan                          8 (0.8%)
+   Laurentiu Tudor                   8 (0.8%)
+   Chris Packham                     8 (0.8%)
+   Vipul Kumar                       8 (0.8%)
+   Jean-Jacques Hiblot               7 (0.7%)
+   Alberto Panizzo                   7 (0.7%)
+   Luis Araneda                      7 (0.7%)
+   Jon Nettleton                     7 (0.7%)
+   Grygorii Strashko                 7 (0.7%)
+   Ludwig Zenz                       7 (0.7%)
+   Quentin Schulz                    6 (0.6%)
+   Lothar Felten                     6 (0.6%)
+   Paul Burton                       6 (0.6%)
+   Eugeniy Paltsev                   5 (0.5%)
+   Mark Kettenis                     5 (0.5%)
+   Fabrice Gasnier                   5 (0.5%)
+   Philippe Reynes                   5 (0.5%)
+   Michael Trimarchi                 5 (0.5%)
+   Alexey Brodkin                    4 (0.4%)
+   Philipp Tomsich                   4 (0.4%)
+   Thomas Fitzsimmons                4 (0.4%)
+   Ran Wang                          4 (0.4%)
+   Vagrant Cascadian                 4 (0.4%)
+   Adam Sampson                      4 (0.4%)
+   Yuantian Tang                     4 (0.4%)
+   Christophe Kerello                4 (0.4%)
+   Yaniv Levinsky                    4 (0.4%)
+   Shreenidhi Shedi                  4 (0.4%)
+   Anson Huang                       3 (0.3%)
+   Igor Opaniuk                      3 (0.3%)
+   Jagdish Gediya                    3 (0.3%)
+   Vinitha V Pillai                  3 (0.3%)
+   Minkyu Kang                       3 (0.3%)
+   Neil Armstrong                    3 (0.3%)
+   Carlo Caione                      3 (0.3%)
+   Loic Devulder                     3 (0.3%)
+   Ivan Gorinov                      3 (0.3%)
+   Tuomas Tynkkynen                  2 (0.2%)
+   Chen-Yu Tsai                      2 (0.2%)
+   Stefano Babic                     2 (0.2%)
+   Martin Kaiser                     2 (0.2%)
+   AKASHI Takahiro                   2 (0.2%)
+   Christian Gmeiner                 2 (0.2%)
+   Pankaj Bansal                     2 (0.2%)
+   Willy Tarreau                     2 (0.2%)
+   Mylène Josserand                  2 (0.2%)
+   Guillaume GARDET                  2 (0.2%)
+   Ashish Kumar                      2 (0.2%)
+   Klaus Goger                       2 (0.2%)
+   Alexander Kochetkov               2 (0.2%)
+   Teddy Reed                        2 (0.2%)
+   Fabio Berton                      1 (0.1%)
+   Jasper kcoding                    1 (0.1%)
+   Kever Yang                        1 (0.1%)
+   Praneeth Bajjuri                  1 (0.1%)
+   Christian Amann                   1 (0.1%)
+   Neil Stainton                     1 (0.1%)
+   Beniamino Galvani                 1 (0.1%)
+   Ievgen Maliarenko                 1 (0.1%)
+   Tom Warren                        1 (0.1%)
+   Nicolas Chauvet                   1 (0.1%)
+   Pierre-Jean Texier                1 (0.1%)
+   Andreas Dannenberg                1 (0.1%)
+   Andy Shevchenko                   1 (0.1%)
+   Derald D. Woods                   1 (0.1%)
+   Eugen Hristev                     1 (0.1%)
+   Caliph Nomble                     1 (0.1%)
+   Rob Bracero                       1 (0.1%)
+   Darwin Dingel                     1 (0.1%)
+   Troy Kisky                        1 (0.1%)
+   Seung-Woo Kim                     1 (0.1%)
+   Joakim Tjernlund                  1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Brendan Shanks                    1 (0.1%)
+   Vladimir Vid                      1 (0.1%)
+   Stefan Roese                      1 (0.1%)
+   Koen Kooi                         1 (0.1%)
+   Stefan Mavrodiev                  1 (0.1%)
+   Clément Laigle                    1 (0.1%)
+   Yannick Fertré                    1 (0.1%)
+   Simon Baatz                       1 (0.1%)
+   Nicholas Faustini                 1 (0.1%)
+   Jens Wiklander                    1 (0.1%)
+   Bibek Basu                        1 (0.1%)
+   Murali Karicheri                  1 (0.1%)
+   Andrew Thomas                     1 (0.1%)
+   Jeremy Gebben                     1 (0.1%)
+   Alison Wang                       1 (0.1%)
+   Breno Lima                        1 (0.1%)
+   Paulo Zaneti                      1 (0.1%)
+   Zubair Lutfullah Kakakhel         1 (0.1%)
+   Kay Potthoff                      1 (0.1%)
+   Rafał Miłecki                     1 (0.1%)
+   Holger Dengler                    1 (0.1%)
+   Mark Jonas                        1 (0.1%)
+   Uri Mashiach                      1 (0.1%)
+   Jakob Unterwurzacher              1 (0.1%)
+   Marek Behún                       1 (0.1%)
+   Thomas McKahan                    1 (0.1%)
+   Luca Ceresoli                     1 (0.1%)
+   Gao Pan                           1 (0.1%)
+   Tien Fong Chee                    1 (0.1%)
+   Ben Whitten                       1 (0.1%)
+   Michael Pratt                     1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mario Six                         9524 (13.2%)
+   Tom Rini                          8252 (11.4%)
+   Simon Glass                       5942 (8.2%)
+   Andre Przywara                    3869 (5.4%)
+   Adam Ford                         3850 (5.3%)
+   Jagan Teki                        3167 (4.4%)
+   Icenowy Zheng                     2387 (3.3%)
+   Siva Durga Prasad Paladugu        2374 (3.3%)
+   Patrick Delaunay                  2317 (3.2%)
+   Ley Foon Tan                      2240 (3.1%)
+   Michal Simek                      1880 (2.6%)
+   Marek Vasut                       1831 (2.5%)
+   Stefan Agner                      1772 (2.5%)
+   Hannes Schmelzer                  1726 (2.4%)
+   Ramon Fried                       1468 (2.0%)
+   Heinrich Schuchardt               1458 (2.0%)
+   Ye Li                             1412 (2.0%)
+   Bin Meng                          1374 (1.9%)
+   Thomas Fitzsimmons                1353 (1.9%)
+   Manivannan Sadhasivam             955 (1.3%)
+   Chris Packham                     954 (1.3%)
+   Fabrice Gasnier                   727 (1.0%)
+   Anson Huang                       639 (0.9%)
+   Jean-Jacques Hiblot               584 (0.8%)
+   Laurentiu Tudor                   489 (0.7%)
+   Luis Araneda                      463 (0.6%)
+   Stefan Mavrodiev                  462 (0.6%)
+   Joe Hershberger                   428 (0.6%)
+   Jon Nettleton                     412 (0.6%)
+   Eugeniy Paltsev                   396 (0.5%)
+   York Sun                          386 (0.5%)
+   Neil Armstrong                    361 (0.5%)
+   Sam Protsenko                     356 (0.5%)
+   Alexander Graf                    324 (0.4%)
+   Baruch Siach                      299 (0.4%)
+   Philippe Reynes                   290 (0.4%)
+   Fabio Estevam                     273 (0.4%)
+   Vipul Kumar                       261 (0.4%)
+   Patrice Chotard                   253 (0.4%)
+   Thomas McKahan                    252 (0.3%)
+   Alberto Panizzo                   250 (0.3%)
+   Michael Pratt                     224 (0.3%)
+   Ludwig Zenz                       223 (0.3%)
+   Masahiro Yamada                   217 (0.3%)
+   Shreenidhi Shedi                  210 (0.3%)
+   Stephen Warren                    200 (0.3%)
+   Yuantian Tang                     181 (0.3%)
+   Ran Wang                          179 (0.2%)
+   Alex Kiernan                      178 (0.2%)
+   Daniel Schwierzeck                166 (0.2%)
+   Quentin Schulz                    147 (0.2%)
+   Lothar Felten                     138 (0.2%)
+   Miquel Raynal                     133 (0.2%)
+   Otavio Salvador                   123 (0.2%)
+   Simon Goldschmidt                 118 (0.2%)
+   Peng Fan                          108 (0.1%)
+   Klaus Goger                       108 (0.1%)
+   Jagdish Gediya                    98 (0.1%)
+   Alexander Kochetkov               95 (0.1%)
+   Rob Bracero                       78 (0.1%)
+   Philipp Tomsich                   77 (0.1%)
+   Grygorii Strashko                 71 (0.1%)
+   Luca Ceresoli                     60 (0.1%)
+   Lukasz Majewski                   55 (0.1%)
+   Teddy Reed                        55 (0.1%)
+   Eugeniu Rosca                     52 (0.1%)
+   Michael Trimarchi                 51 (0.1%)
+   Igor Opaniuk                      50 (0.1%)
+   Bibek Basu                        50 (0.1%)
+   Yaniv Levinsky                    48 (0.1%)
+   Mark Kettenis                     45 (0.1%)
+   Christophe Kerello                41 (0.1%)
+   Darwin Dingel                     39 (0.1%)
+   Paul Burton                       30 (0.0%)
+   Yannick Fertré                    29 (0.0%)
+   Minkyu Kang                       25 (0.0%)
+   Vagrant Cascadian                 24 (0.0%)
+   Carlo Caione                      24 (0.0%)
+   Alexey Brodkin                    23 (0.0%)
+   Ashish Kumar                      22 (0.0%)
+   Koen Kooi                         20 (0.0%)
+   Nicholas Faustini                 19 (0.0%)
+   Tuomas Tynkkynen                  18 (0.0%)
+   Kever Yang                        18 (0.0%)
+   Ivan Gorinov                      17 (0.0%)
+   Jens Wiklander                    15 (0.0%)
+   Chen-Yu Tsai                      14 (0.0%)
+   Murali Karicheri                  13 (0.0%)
+   Beniamino Galvani                 12 (0.0%)
+   Caliph Nomble                     12 (0.0%)
+   Ben Whitten                       12 (0.0%)
+   Loic Devulder                     11 (0.0%)
+   Nicolas Chauvet                   10 (0.0%)
+   Gao Pan                           10 (0.0%)
+   Holger Dengler                    9 (0.0%)
+   Martin Kaiser                     8 (0.0%)
+   Jeremy Gebben                     8 (0.0%)
+   Rafał Miłecki                     8 (0.0%)
+   Mark Jonas                        8 (0.0%)
+   Adam Sampson                      7 (0.0%)
+   Derald D. Woods                   7 (0.0%)
+   Uri Mashiach                      7 (0.0%)
+   Vinitha V Pillai                  6 (0.0%)
+   Pankaj Bansal                     6 (0.0%)
+   Guillaume GARDET                  6 (0.0%)
+   Tom Warren                        6 (0.0%)
+   Eugen Hristev                     6 (0.0%)
+   Joakim Tjernlund                  6 (0.0%)
+   Stefano Babic                     4 (0.0%)
+   AKASHI Takahiro                   4 (0.0%)
+   Neil Stainton                     4 (0.0%)
+   Andy Shevchenko                   4 (0.0%)
+   Willy Tarreau                     3 (0.0%)
+   Mylène Josserand                  3 (0.0%)
+   Fabio Berton                      3 (0.0%)
+   Ievgen Maliarenko                 3 (0.0%)
+   Simon Baatz                       3 (0.0%)
+   Christian Gmeiner                 2 (0.0%)
+   Jasper kcoding                    2 (0.0%)
+   Praneeth Bajjuri                  2 (0.0%)
+   Christian Amann                   2 (0.0%)
+   Troy Kisky                        2 (0.0%)
+   Seung-Woo Kim                     2 (0.0%)
+   Brendan Shanks                    2 (0.0%)
+   Vladimir Vid                      2 (0.0%)
+   Zubair Lutfullah Kakakhel         2 (0.0%)
+   Jakob Unterwurzacher              2 (0.0%)
+   Pierre-Jean Texier                1 (0.0%)
+   Andreas Dannenberg                1 (0.0%)
+   Stefan Roese                      1 (0.0%)
+   Clément Laigle                    1 (0.0%)
+   Andrew Thomas                     1 (0.0%)
+   Alison Wang                       1 (0.0%)
+   Paulo Zaneti                      1 (0.0%)
+   Kay Potthoff                      1 (0.0%)
+   Marek Behún                       1 (0.0%)
+   Tien Fong Chee                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          6291 (26.6%)
+   Baruch Siach                      228 (1.0%)
+   Yuantian Tang                     30 (0.1%)
+   Minkyu Kang                       24 (0.1%)
+   Kever Yang                        18 (0.1%)
+   Lukasz Majewski                   14 (0.1%)
+   Ivan Gorinov                      12 (0.1%)
+   Beniamino Galvani                 12 (0.1%)
+   Tom Warren                        6 (0.0%)
+   Ben Whitten                       3 (0.0%)
+   Fabio Estevam                     2 (0.0%)
+   Yaniv Levinsky                    2 (0.0%)
+   Nicholas Faustini                 2 (0.0%)
+   Jeremy Gebben                     2 (0.0%)
+   Paulo Zaneti                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 188)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    51 (27.1%)
+   Michal Simek                      24 (12.8%)
+   Stefan Roese                      18 (9.6%)
+   Minkyu Kang                       13 (6.9%)
+   Chin Liang See                    9 (4.8%)
+   Tom Warren                        8 (4.3%)
+   Patrice Chotard                   8 (4.3%)
+   Otavio Salvador                   8 (4.3%)
+   Tom Rini                          7 (3.7%)
+   Baruch Siach                      7 (3.7%)
+   Alexey Brodkin                    4 (2.1%)
+   Vipul Kumar                       3 (1.6%)
+   Jagan Teki                        3 (1.6%)
+   Philipp Tomsich                   2 (1.1%)
+   Peng Fan                          2 (1.1%)
+   Fabrice Gasnier                   2 (1.1%)
+   Simon Glass                       2 (1.1%)
+   Yaniv Levinsky                    1 (0.5%)
+   Dave Gerlach                      1 (0.5%)
+   Tony Lindgren                     1 (0.5%)
+   Kurt Kanzenbach                   1 (0.5%)
+   Luka Perkov                       1 (0.5%)
+   Anatolij Gustschin                1 (0.5%)
+   Sandipan Patra                    1 (0.5%)
+   Ruchika Gupta                     1 (0.5%)
+   Boris Brezillon                   1 (0.5%)
+   AKASHI Takahiro                   1 (0.5%)
+   Fabio Berton                      1 (0.5%)
+   Eugeniu Rosca                     1 (0.5%)
+   Stephen Warren                    1 (0.5%)
+   Masahiro Yamada                   1 (0.5%)
+   Philippe Reynes                   1 (0.5%)
+   Neil Armstrong                    1 (0.5%)
+   Siva Durga Prasad Paladugu        1 (0.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 356)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       153 (43.0%)
+   Jagan Teki                        36 (10.1%)
+   York Sun                          32 (9.0%)
+   Philipp Tomsich                   15 (4.2%)
+   Tom Rini                          12 (3.4%)
+   Stephen Warren                    10 (2.8%)
+   Joe Hershberger                   8 (2.2%)
+   Bharat Bhushan                    7 (2.0%)
+   Igor Opaniuk                      7 (2.0%)
+   Heinrich Schuchardt               7 (2.0%)
+   Andre Przywara                    7 (2.0%)
+   Stefan Herbrechtsmeier            6 (1.7%)
+   Bin Meng                          6 (1.7%)
+   Daniel Schwierzeck                5 (1.4%)
+   Fabio Estevam                     4 (1.1%)
+   Heiko Schocher                    4 (1.1%)
+   Marek Vasut                       4 (1.1%)
+   Alexander Graf                    3 (0.8%)
+   Dennis Gilmore                    3 (0.8%)
+   Christian Gmeiner                 3 (0.8%)
+   Anatolij Gustschin                2 (0.6%)
+   Lukasz Majewski                   2 (0.6%)
+   Vikas Manocha                     2 (0.6%)
+   Stefano Babic                     2 (0.6%)
+   Michal Simek                      1 (0.3%)
+   Stefan Roese                      1 (0.3%)
+   Peng Fan                          1 (0.3%)
+   Eugeniu Rosca                     1 (0.3%)
+   Masahiro Yamada                   1 (0.3%)
+   Kever Yang                        1 (0.3%)
+   Jonathan Gray                     1 (0.3%)
+   Prabhakar Kushwaha                1 (0.3%)
+   Horia Geantă                      1 (0.3%)
+   Felix Brack                       1 (0.3%)
+   Igor Grinberg                     1 (0.3%)
+   Vadim Bendebury                   1 (0.3%)
+   Tuomas Tynkkynen                  1 (0.3%)
+   Simon Goldschmidt                 1 (0.3%)
+   Sam Protsenko                     1 (0.3%)
+   Hannes Schmelzer                  1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 82)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagan Teki                        32 (39.0%)
+   Anand Moon                        8 (9.8%)
+   Stephen Warren                    6 (7.3%)
+   Chen-Yu Tsai                      6 (7.3%)
+   Siva Durga Prasad Paladugu        4 (4.9%)
+   Andy Shevchenko                   4 (4.9%)
+   Dennis Gilmore                    3 (3.7%)
+   Klaus Goger                       3 (3.7%)
+   Michal Simek                      2 (2.4%)
+   Eugeniu Rosca                     2 (2.4%)
+   Heinrich Schuchardt               1 (1.2%)
+   Bin Meng                          1 (1.2%)
+   Jonathan Gray                     1 (1.2%)
+   Tuomas Tynkkynen                  1 (1.2%)
+   Kurt Kanzenbach                   1 (1.2%)
+   Michael Walle                     1 (1.2%)
+   Bryan O'Donoghue                  1 (1.2%)
+   Vagrant Cascadian                 1 (1.2%)
+   Alex Kiernan                      1 (1.2%)
+   Mark Kettenis                     1 (1.2%)
+   Patrick Delaunay                  1 (1.2%)
+   Stefan Agner                      1 (1.2%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 82)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagan Teki                        15 (18.3%)
+   Icenowy Zheng                     13 (15.9%)
+   Lukasz Majewski                   8 (9.8%)
+   Lothar Felten                     6 (7.3%)
+   Quentin Schulz                    6 (7.3%)
+   Bin Meng                          4 (4.9%)
+   Andre Przywara                    4 (4.9%)
+   Philipp Tomsich                   3 (3.7%)
+   Grygorii Strashko                 3 (3.7%)
+   Andy Shevchenko                   2 (2.4%)
+   Heinrich Schuchardt               2 (2.4%)
+   Igor Opaniuk                      2 (2.4%)
+   Baruch Siach                      2 (2.4%)
+   Klaus Goger                       1 (1.2%)
+   Tuomas Tynkkynen                  1 (1.2%)
+   Stefan Agner                      1 (1.2%)
+   Simon Glass                       1 (1.2%)
+   Marek Vasut                       1 (1.2%)
+   Yuantian Tang                     1 (1.2%)
+   Holger Dengler                    1 (1.2%)
+   Darwin Dingel                     1 (1.2%)
+   Murali Karicheri                  1 (1.2%)
+   Jon Nettleton                     1 (1.2%)
+   Anson Huang                       1 (1.2%)
+   Chris Packham                     1 (1.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 24)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Herbrechtsmeier            5 (20.8%)
+   Tuomas Tynkkynen                  4 (16.7%)
+   Tom Rini                          3 (12.5%)
+   Marek Vasut                       2 (8.3%)
+   Ioana Ciornei                     2 (8.3%)
+   Jagan Teki                        1 (4.2%)
+   Heinrich Schuchardt               1 (4.2%)
+   Eugeniu Rosca                     1 (4.2%)
+   Jonathan Gray                     1 (4.2%)
+   Mark Kettenis                     1 (4.2%)
+   AKASHI Takahiro                   1 (4.2%)
+   Mark Olsson                       1 (4.2%)
+   ericywl                           1 (4.2%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 24)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      5 (20.8%)
+   Patrice Chotard                   5 (20.8%)
+   Tom Rini                          2 (8.3%)
+   Heinrich Schuchardt               2 (8.3%)
+   Masahiro Yamada                   2 (8.3%)
+   Pankaj Bansal                     2 (8.3%)
+   Miquel Raynal                     2 (8.3%)
+   Tuomas Tynkkynen                  1 (4.2%)
+   Andy Shevchenko                   1 (4.2%)
+   Igor Opaniuk                      1 (4.2%)
+   Fabio Estevam                     1 (4.2%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         360 (36.6%)
+   Google, Inc.                      75 (7.6%)
+   AMD                               66 (6.7%)
+   NXP                               65 (6.6%)
+   DENX Software Engineering         63 (6.4%)
+   ST Microelectronics               55 (5.6%)
+   Intel                             32 (3.3%)
+   Konsulko Group                    29 (3.0%)
+   Amarula Solutions                 28 (2.8%)
+   National Instruments              24 (2.4%)
+   Linaro                            21 (2.1%)
+   Xilinx                            20 (2.0%)
+   Bootlin                           18 (1.8%)
+   Texas Instruments                 17 (1.7%)
+   Toradex                           15 (1.5%)
+   Guntermann & Drunck               13 (1.3%)
+   Socionext Inc.                    12 (1.2%)
+   NVidia                            11 (1.1%)
+   O.S. Systems                      10 (1.0%)
+   ARM                               9 (0.9%)
+   Pepperl+Fuchs                     9 (0.9%)
+   MIPS                              6 (0.6%)
+   CompuLab                          5 (0.5%)
+   Debian.org                        4 (0.4%)
+   Samsung                           4 (0.4%)
+   BayLibre SAS                      3 (0.3%)
+   SUSE                              3 (0.3%)
+   Bosch                             2 (0.2%)
+   Boundary Devices                  1 (0.1%)
+   linutronix                        1 (0.1%)
+   Oracle                            1 (0.1%)
+   Rockchip                          1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         19740 (27.4%)
+   Guntermann & Drunck               9524 (13.2%)
+   Konsulko Group                    8252 (11.4%)
+   Google, Inc.                      5942 (8.2%)
+   ARM                               3869 (5.4%)
+   NXP                               3586 (5.0%)
+   Amarula Solutions                 3468 (4.8%)
+   ST Microelectronics               3367 (4.7%)
+   Xilinx                            2635 (3.7%)
+   Intel                             2262 (3.1%)
+   DENX Software Engineering         1891 (2.6%)
+   AMD                               1880 (2.6%)
+   Toradex                           1772 (2.5%)
+   Linaro                            1330 (1.8%)
+   Texas Instruments                 671 (0.9%)
+   National Instruments              428 (0.6%)
+   BayLibre SAS                      361 (0.5%)
+   Bootlin                           283 (0.4%)
+   NVidia                            256 (0.4%)
+   Socionext Inc.                    217 (0.3%)
+   O.S. Systems                      126 (0.2%)
+   Pepperl+Fuchs                     118 (0.2%)
+   CompuLab                          55 (0.1%)
+   MIPS                              30 (0.0%)
+   Samsung                           27 (0.0%)
+   Debian.org                        24 (0.0%)
+   Rockchip                          18 (0.0%)
+   SUSE                              11 (0.0%)
+   Bosch                             10 (0.0%)
+   linutronix                        9 (0.0%)
+   Boundary Devices                  2 (0.0%)
+   Oracle                            1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 188)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   SUSE                              51 (27.1%)
+   Xilinx                            28 (14.9%)
+   DENX Software Engineering         19 (10.1%)
+   (Unknown)                         16 (8.5%)
+   Samsung                           13 (6.9%)
+   ST Microelectronics               10 (5.3%)
+   NVidia                            10 (5.3%)
+   Intel                             9 (4.8%)
+   O.S. Systems                      9 (4.8%)
+   Konsulko Group                    7 (3.7%)
+   NXP                               3 (1.6%)
+   Amarula Solutions                 3 (1.6%)
+   Google, Inc.                      2 (1.1%)
+   Linaro                            1 (0.5%)
+   Texas Instruments                 1 (0.5%)
+   BayLibre SAS                      1 (0.5%)
+   Bootlin                           1 (0.5%)
+   Socionext Inc.                    1 (0.5%)
+   CompuLab                          1 (0.5%)
+   linutronix                        1 (0.5%)
+   Atomide                           1 (0.5%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 139)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         66 (47.5%)
+   NXP                               15 (10.8%)
+   ST Microelectronics               5 (3.6%)
+   Texas Instruments                 5 (3.6%)
+   DENX Software Engineering         4 (2.9%)
+   Intel                             4 (2.9%)
+   Linaro                            4 (2.9%)
+   NVidia                            3 (2.2%)
+   Amarula Solutions                 3 (2.2%)
+   Bootlin                           3 (2.2%)
+   Xilinx                            2 (1.4%)
+   Samsung                           2 (1.4%)
+   O.S. Systems                      2 (1.4%)
+   CompuLab                          2 (1.4%)
+   Bosch                             2 (1.4%)
+   SUSE                              1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   Google, Inc.                      1 (0.7%)
+   BayLibre SAS                      1 (0.7%)
+   Socionext Inc.                    1 (0.7%)
+   linutronix                        1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   ARM                               1 (0.7%)
+   AMD                               1 (0.7%)
+   Toradex                           1 (0.7%)
+   National Instruments              1 (0.7%)
+   Pepperl+Fuchs                     1 (0.7%)
+   MIPS                              1 (0.7%)
+   Debian.org                        1 (0.7%)
+   Rockchip                          1 (0.7%)
+   Boundary Devices                  1 (0.7%)
+   Oracle                            1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2018.11.rst b/doc/develop/statistics/u-boot-stats-v2018.11.rst
new file mode 100644
index 00000000000..6ce39b9ae9c
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2018.11.rst
@@ -0,0 +1,663 @@
+:orphan:
+
+Release Statistics for U-Boot v2018.11
+======================================
+
+* Processed 1105 changesets from 130 developers
+
+* 31 employers found
+
+* A total of 78339 lines added, 18402 removed (delta 59937)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       120 (10.9%)
+   Heinrich Schuchardt               87 (7.9%)
+   Adam Ford                         51 (4.6%)
+   Marek Vasut                       49 (4.4%)
+   Bin Meng                          47 (4.3%)
+   Peng Fan                          42 (3.8%)
+   Eugen Hristev                     41 (3.7%)
+   Michal Simek                      38 (3.4%)
+   Lokesh Vutla                      31 (2.8%)
+   Mario Six                         30 (2.7%)
+   Akashi Takahiro                   29 (2.6%)
+   Jens Wiklander                    23 (2.1%)
+   Miquel Raynal                     22 (2.0%)
+   Stefan Roese                      19 (1.7%)
+   Alexey Brodkin                    17 (1.5%)
+   Tom Rini                          16 (1.4%)
+   Fabio Estevam                     15 (1.4%)
+   Otavio Salvador                   15 (1.4%)
+   Ramon Fried                       14 (1.3%)
+   Boris Brezillon                   13 (1.2%)
+   Patrick Delaunay                  13 (1.2%)
+   Patrice Chotard                   13 (1.2%)
+   Andreas Dannenberg                13 (1.2%)
+   Joe Hershberger                   10 (0.9%)
+   Masahiro Yamada                   10 (0.9%)
+   Ofer Heifetz                      10 (0.9%)
+   Hiroyuki Yokoyama                 9 (0.8%)
+   Alexander Graf                    8 (0.7%)
+   Liviu Dudau                       8 (0.7%)
+   Jagdish Gediya                    8 (0.7%)
+   Yinbo Zhu                         8 (0.7%)
+   Jagan Teki                        7 (0.6%)
+   Chris Packham                     7 (0.6%)
+   Pankaj Bansal                     7 (0.6%)
+   Breno Matheus Lima                7 (0.6%)
+   Peng Ma                           7 (0.6%)
+   Konstantin Porotchkin             7 (0.6%)
+   Daniel Schwierzeck                6 (0.5%)
+   Martin Fuzzey                     6 (0.5%)
+   Baruch Siach                      6 (0.5%)
+   Siva Durga Prasad Paladugu        6 (0.5%)
+   Marek Behún                       6 (0.5%)
+   Ley Foon Tan                      6 (0.5%)
+   Tien Fong Chee                    6 (0.5%)
+   Anatolij Gustschin                5 (0.5%)
+   Marcel Ziswiler                   5 (0.5%)
+   Vladimir Zapolskiy                5 (0.5%)
+   Janine Hagemann                   5 (0.5%)
+   Tuomas Tynkkynen                  5 (0.5%)
+   Georgii Staroselskii              5 (0.5%)
+   Lukasz Majewski                   4 (0.4%)
+   Simon Goldschmidt                 4 (0.4%)
+   Icenowy Zheng                     4 (0.4%)
+   Rui Miguel Silva                  4 (0.4%)
+   Stephen Warren                    4 (0.4%)
+   Kever Yang                        4 (0.4%)
+   Heiko Stuebner                    4 (0.4%)
+   Rajan Vaja                        4 (0.4%)
+   Maxime Ripard                     4 (0.4%)
+   Laurentiu Tudor                   4 (0.4%)
+   Quentin Schulz                    4 (0.4%)
+   Codrin Ciubotariu                 4 (0.4%)
+   Dalon Westergreen                 4 (0.4%)
+   Andy Shevchenko                   3 (0.3%)
+   Keerthy                           3 (0.3%)
+   Andre Przywara                    3 (0.3%)
+   Priyanka Jain                     3 (0.3%)
+   Jeremy Gebben                     3 (0.3%)
+   Priit Laes                        3 (0.3%)
+   Vasily Khoruzhick                 3 (0.3%)
+   Loic Devulder                     3 (0.3%)
+   Vikas Manocha                     3 (0.3%)
+   Pramod Kumar                      3 (0.3%)
+   Sekhar Nori                       3 (0.3%)
+   Philippe Reynes                   3 (0.3%)
+   Angelo Dureghello                 3 (0.3%)
+   Heiko Schocher                    2 (0.2%)
+   Sam Protsenko                     2 (0.2%)
+   Dirk Meul                         2 (0.2%)
+   Cédric Le Goater                  2 (0.2%)
+   Ian Ray                           2 (0.2%)
+   Ye Li                             2 (0.2%)
+   Ashish Kumar                      2 (0.2%)
+   Andrew F. Davis                   2 (0.2%)
+   Nicholas Faustini                 2 (0.2%)
+   Neil Armstrong                    2 (0.2%)
+   Sébastien Szymanski               2 (0.2%)
+   Yousaf Kaukab                     2 (0.2%)
+   Neil Stainton                     2 (0.2%)
+   Christian Gmeiner                 2 (0.2%)
+   Ran Wang                          2 (0.2%)
+   Peter Pan                         2 (0.2%)
+   Thomas Fitzsimmons                2 (0.2%)
+   Jun Nie                           1 (0.1%)
+   Lars Povlsen                      1 (0.1%)
+   Christoph Niedermaier             1 (0.1%)
+   Paul Davey                        1 (0.1%)
+   Andrei Stefanescu                 1 (0.1%)
+   Hannes Schmelzer                  1 (0.1%)
+   Hector Palacios                   1 (0.1%)
+   Bernhard Messerklinger            1 (0.1%)
+   Xiaoliang Yang                    1 (0.1%)
+   Dan Cimpoca                       1 (0.1%)
+   Fabien Lahoudere                  1 (0.1%)
+   Duncan Hare                       1 (0.1%)
+   Yevgeny Popovych                  1 (0.1%)
+   Trent Piepho                      1 (0.1%)
+   Daniel Gröber                     1 (0.1%)
+   Andreas Färber                    1 (0.1%)
+   Ooi, Joyce                        1 (0.1%)
+   Atsushi Nemoto                    1 (0.1%)
+   Rick Chen                         1 (0.1%)
+   Rasmus Villemoes                  1 (0.1%)
+   Alex Kiernan                      1 (0.1%)
+   Zhao Qiang                        1 (0.1%)
+   Prabhakar Kushwaha                1 (0.1%)
+   Nipun Gupta                       1 (0.1%)
+   Luis Araneda                      1 (0.1%)
+   Frieder Schrempf                  1 (0.1%)
+   Brian Norris                      1 (0.1%)
+   Ezequiel Garcia                   1 (0.1%)
+   Rabeeh Khoury                     1 (0.1%)
+   David Sniatkiwicz                 1 (0.1%)
+   Victor Axelrod                    1 (0.1%)
+   Jon Nettleton                     1 (0.1%)
+   Evgeni Dobrev                     1 (0.1%)
+   Michael Heimpold                  1 (0.1%)
+   Mark Tomlinson                    1 (0.1%)
+   Grazvydas Ignotas                 1 (0.1%)
+   Matt Weber                        1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       8404 (10.0%)
+   Peng Fan                          8366 (9.9%)
+   Jagan Teki                        7158 (8.5%)
+   Mario Six                         7127 (8.5%)
+   Heinrich Schuchardt               6089 (7.2%)
+   Lokesh Vutla                      5129 (6.1%)
+   Jens Wiklander                    3954 (4.7%)
+   Adam Ford                         3157 (3.7%)
+   Akashi Takahiro                   2640 (3.1%)
+   Michal Simek                      2281 (2.7%)
+   Boris Brezillon                   2221 (2.6%)
+   Stefan Roese                      2133 (2.5%)
+   Marek Vasut                       2011 (2.4%)
+   Peter Pan                         1832 (2.2%)
+   Andreas Dannenberg                1803 (2.1%)
+   Miquel Raynal                     1788 (2.1%)
+   Liviu Dudau                       1636 (1.9%)
+   Bin Meng                          1427 (1.7%)
+   Masahiro Yamada                   864 (1.0%)
+   Loic Devulder                     818 (1.0%)
+   Alexey Brodkin                    751 (0.9%)
+   Neil Armstrong                    734 (0.9%)
+   Maxime Ripard                     715 (0.8%)
+   Eugen Hristev                     682 (0.8%)
+   Tien Fong Chee                    645 (0.8%)
+   Joe Hershberger                   636 (0.8%)
+   Patrice Chotard                   488 (0.6%)
+   Chris Packham                     472 (0.6%)
+   Tom Rini                          465 (0.6%)
+   Fabio Estevam                     451 (0.5%)
+   Quentin Schulz                    385 (0.5%)
+   Tuomas Tynkkynen                  348 (0.4%)
+   Jeremy Gebben                     339 (0.4%)
+   Jagdish Gediya                    335 (0.4%)
+   Georgii Staroselskii              293 (0.3%)
+   Pankaj Bansal                     281 (0.3%)
+   Marek Behún                       276 (0.3%)
+   Otavio Salvador                   272 (0.3%)
+   Anatolij Gustschin                244 (0.3%)
+   Patrick Delaunay                  234 (0.3%)
+   Ramon Fried                       233 (0.3%)
+   Philippe Reynes                   218 (0.3%)
+   Ofer Heifetz                      193 (0.2%)
+   Daniel Schwierzeck                192 (0.2%)
+   Hiroyuki Yokoyama                 190 (0.2%)
+   Codrin Ciubotariu                 189 (0.2%)
+   Janine Hagemann                   179 (0.2%)
+   Peng Ma                           156 (0.2%)
+   Ley Foon Tan                      153 (0.2%)
+   Yinbo Zhu                         152 (0.2%)
+   Frieder Schrempf                  146 (0.2%)
+   Ashish Kumar                      141 (0.2%)
+   Konstantin Porotchkin             121 (0.1%)
+   Siva Durga Prasad Paladugu        119 (0.1%)
+   Alexander Graf                    116 (0.1%)
+   Laurentiu Tudor                   111 (0.1%)
+   Sekhar Nori                       109 (0.1%)
+   Dirk Meul                         107 (0.1%)
+   Kever Yang                        100 (0.1%)
+   Thomas Fitzsimmons                87 (0.1%)
+   Rajan Vaja                        78 (0.1%)
+   Andre Przywara                    75 (0.1%)
+   Breno Matheus Lima                68 (0.1%)
+   Simon Goldschmidt                 67 (0.1%)
+   Martin Fuzzey                     64 (0.1%)
+   Rui Miguel Silva                  63 (0.1%)
+   Heiko Stuebner                    56 (0.1%)
+   Sébastien Szymanski               56 (0.1%)
+   Keerthy                           50 (0.1%)
+   Andrew F. Davis                   49 (0.1%)
+   Yousaf Kaukab                     49 (0.1%)
+   Vladimir Zapolskiy                48 (0.1%)
+   Nipun Gupta                       46 (0.1%)
+   Baruch Siach                      43 (0.1%)
+   Angelo Dureghello                 36 (0.0%)
+   Stephen Warren                    33 (0.0%)
+   Duncan Hare                       32 (0.0%)
+   Ye Li                             30 (0.0%)
+   Brian Norris                      28 (0.0%)
+   Victor Axelrod                    27 (0.0%)
+   Marcel Ziswiler                   26 (0.0%)
+   Icenowy Zheng                     26 (0.0%)
+   Nicholas Faustini                 25 (0.0%)
+   Rabeeh Khoury                     23 (0.0%)
+   Vasily Khoruzhick                 21 (0.0%)
+   Ran Wang                          20 (0.0%)
+   Trent Piepho                      20 (0.0%)
+   Ian Ray                           19 (0.0%)
+   Pramod Kumar                      18 (0.0%)
+   Xiaoliang Yang                    18 (0.0%)
+   Grazvydas Ignotas                 18 (0.0%)
+   Priyanka Jain                     14 (0.0%)
+   Vikas Manocha                     13 (0.0%)
+   Ezequiel Garcia                   13 (0.0%)
+   Dalon Westergreen                 11 (0.0%)
+   Cédric Le Goater                  11 (0.0%)
+   Heiko Schocher                    10 (0.0%)
+   Jon Nettleton                     10 (0.0%)
+   Lukasz Majewski                   9 (0.0%)
+   Christoph Niedermaier             8 (0.0%)
+   Priit Laes                        7 (0.0%)
+   Christian Gmeiner                 7 (0.0%)
+   Prabhakar Kushwaha                7 (0.0%)
+   Neil Stainton                     6 (0.0%)
+   Andy Shevchenko                   5 (0.0%)
+   Sam Protsenko                     4 (0.0%)
+   Hannes Schmelzer                  4 (0.0%)
+   Andreas Färber                    4 (0.0%)
+   Michael Heimpold                  4 (0.0%)
+   Mark Tomlinson                    4 (0.0%)
+   Paul Davey                        3 (0.0%)
+   Dan Cimpoca                       3 (0.0%)
+   Daniel Gröber                     3 (0.0%)
+   Ooi, Joyce                        3 (0.0%)
+   Rasmus Villemoes                  3 (0.0%)
+   David Sniatkiwicz                 3 (0.0%)
+   Matt Weber                        3 (0.0%)
+   Jun Nie                           2 (0.0%)
+   Alex Kiernan                      2 (0.0%)
+   Zhao Qiang                        2 (0.0%)
+   Luis Araneda                      2 (0.0%)
+   Lars Povlsen                      1 (0.0%)
+   Andrei Stefanescu                 1 (0.0%)
+   Hector Palacios                   1 (0.0%)
+   Bernhard Messerklinger            1 (0.0%)
+   Fabien Lahoudere                  1 (0.0%)
+   Yevgeny Popovych                  1 (0.0%)
+   Atsushi Nemoto                    1 (0.0%)
+   Rick Chen                         1 (0.0%)
+   Evgeni Dobrev                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   667 (3.6%)
+   Jagan Teki                        479 (2.6%)
+   Tuomas Tynkkynen                  342 (1.9%)
+   Ashish Kumar                      135 (0.7%)
+   Tom Rini                          132 (0.7%)
+   Simon Goldschmidt                 54 (0.3%)
+   Dirk Meul                         52 (0.3%)
+   Peng Ma                           29 (0.2%)
+   Chris Packham                     20 (0.1%)
+   Hiroyuki Yokoyama                 19 (0.1%)
+   Daniel Schwierzeck                15 (0.1%)
+   Vikas Manocha                     10 (0.1%)
+   Breno Matheus Lima                5 (0.0%)
+   Lukasz Majewski                   4 (0.0%)
+   Sam Protsenko                     4 (0.0%)
+   Andy Shevchenko                   2 (0.0%)
+   Grazvydas Ignotas                 1 (0.0%)
+   Daniel Gröber                     1 (0.0%)
+   Luis Araneda                      1 (0.0%)
+   Lars Povlsen                      1 (0.0%)
+   Evgeni Dobrev                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 284)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    116 (40.8%)
+   Stefan Roese                      35 (12.3%)
+   Lokesh Vutla                      13 (4.6%)
+   Tom Rini                          12 (4.2%)
+   Chris Packham                     11 (3.9%)
+   Miquel Raynal                     11 (3.9%)
+   Otavio Salvador                   9 (3.2%)
+   Michal Simek                      7 (2.5%)
+   Fabio Berton                      5 (1.8%)
+   Bin Meng                          5 (1.8%)
+   Andreas Dannenberg                5 (1.8%)
+   Simon Glass                       5 (1.8%)
+   Bryan O'Donoghue                  4 (1.4%)
+   Nishanth Menon                    4 (1.4%)
+   Eugen Hristev                     4 (1.4%)
+   Fabien Lahoudere                  3 (1.1%)
+   Patrick Delaunay                  3 (1.1%)
+   Icenowy Zheng                     3 (1.1%)
+   Boris Brezillon                   3 (1.1%)
+   Daniel Schwierzeck                2 (0.7%)
+   Richard Weinberger                2 (0.7%)
+   Peter Howard                      2 (0.7%)
+   Vignesh R                         2 (0.7%)
+   Baruch Siach                      2 (0.7%)
+   Anatolij Gustschin                2 (0.7%)
+   Neil Armstrong                    2 (0.7%)
+   Masahiro Yamada                   1 (0.4%)
+   Jagan Teki                        1 (0.4%)
+   Minkyu Kang                       1 (0.4%)
+   Suresh Gupta                      1 (0.4%)
+   Yogesh Gaur                       1 (0.4%)
+   Jacek Anaszewski                  1 (0.4%)
+   Sean Nyekjær                      1 (0.4%)
+   Chin Liang See                    1 (0.4%)
+   Marcel Ziswiler                   1 (0.4%)
+   Ofer Heifetz                      1 (0.4%)
+   Marek Vasut                       1 (0.4%)
+   Peng Fan                          1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 479)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       132 (27.6%)
+   Tom Rini                          52 (10.9%)
+   Bin Meng                          43 (9.0%)
+   York Sun                          39 (8.1%)
+   Anatolij Gustschin                33 (6.9%)
+   Jagan Teki                        25 (5.2%)
+   Lukas Auer                        17 (3.5%)
+   Igal Liberman                     16 (3.3%)
+   Philipp Tomsich                   14 (2.9%)
+   Stefan Roese                      13 (2.7%)
+   Boris Brezillon                   13 (2.7%)
+   Heiko Schocher                    8 (1.7%)
+   Fabio Estevam                     8 (1.7%)
+   Heinrich Schuchardt               8 (1.7%)
+   Lukasz Majewski                   6 (1.3%)
+   Andy Shevchenko                   5 (1.0%)
+   Rick Chen                         5 (1.0%)
+   Miquel Raynal                     4 (0.8%)
+   Peng Fan                          4 (0.8%)
+   Lokesh Vutla                      3 (0.6%)
+   Andre Przywara                    3 (0.6%)
+   Alexander Graf                    2 (0.4%)
+   Eugen Hristev                     2 (0.4%)
+   Daniel Schwierzeck                2 (0.4%)
+   Marek Vasut                       2 (0.4%)
+   Simon Goldschmidt                 2 (0.4%)
+   Igor Opaniuk                      2 (0.4%)
+   Chris Packham                     1 (0.2%)
+   Michal Simek                      1 (0.2%)
+   Ofer Heifetz                      1 (0.2%)
+   Vikas Manocha                     1 (0.2%)
+   Jean-Jacques Hiblot               1 (0.2%)
+   Michael Trimarchi                 1 (0.2%)
+   Stefano Babic                     1 (0.2%)
+   David Wu                          1 (0.2%)
+   Philipp Tomisch                   1 (0.2%)
+   Mark Kettenis                     1 (0.2%)
+   Florian Fainelli                  1 (0.2%)
+   Hannes Schmelzer                  1 (0.2%)
+   Ye Li                             1 (0.2%)
+   Stephen Warren                    1 (0.2%)
+   Ley Foon Tan                      1 (0.2%)
+   Konstantin Porotchkin             1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 35)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          5 (14.3%)
+   Igor Opaniuk                      5 (14.3%)
+   Derald D. Woods                   3 (8.6%)
+   Stefan Roese                      2 (5.7%)
+   Hannes Schmelzer                  2 (5.7%)
+   Adam Ford                         2 (5.7%)
+   Simon Glass                       1 (2.9%)
+   York Sun                          1 (2.9%)
+   Heiko Schocher                    1 (2.9%)
+   Heinrich Schuchardt               1 (2.9%)
+   Chris Packham                     1 (2.9%)
+   Michal Simek                      1 (2.9%)
+   Ye Li                             1 (2.9%)
+   Sean Nyekjær                      1 (2.9%)
+   VlaoMao                           1 (2.9%)
+   Vagrant Cascadian                 1 (2.9%)
+   Peter Robinson                    1 (2.9%)
+   Rajat Srivastava                  1 (2.9%)
+   Ladislav Michl                    1 (2.9%)
+   Willy Tarreau                     1 (2.9%)
+   Marek Behún                       1 (2.9%)
+   Patrice Chotard                   1 (2.9%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 35)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Boris Brezillon                   5 (14.3%)
+   Jens Wiklander                    5 (14.3%)
+   Bin Meng                          2 (5.7%)
+   Adam Ford                         2 (5.7%)
+   Heinrich Schuchardt               2 (5.7%)
+   Michal Simek                      2 (5.7%)
+   Jagan Teki                        2 (5.7%)
+   Andy Shevchenko                   2 (5.7%)
+   Ashish Kumar                      2 (5.7%)
+   Stefan Roese                      1 (2.9%)
+   Simon Glass                       1 (2.9%)
+   Lokesh Vutla                      1 (2.9%)
+   Masahiro Yamada                   1 (2.9%)
+   Yevgeny Popovych                  1 (2.9%)
+   Bernhard Messerklinger            1 (2.9%)
+   Mark Tomlinson                    1 (2.9%)
+   Paul Davey                        1 (2.9%)
+   Vasily Khoruzhick                 1 (2.9%)
+   Kever Yang                        1 (2.9%)
+   Joe Hershberger                   1 (2.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 17)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          5 (29.4%)
+   Jagan Teki                        2 (11.8%)
+   Stefan Roese                      2 (11.8%)
+   Simon Glass                       1 (5.9%)
+   Hannes Schmelzer                  1 (5.9%)
+   Sean Nyekjær                      1 (5.9%)
+   Peter Robinson                    1 (5.9%)
+   Lars Povlsen                      1 (5.9%)
+   Tim Harvey                        1 (5.9%)
+   Tran Tien Dat                     1 (5.9%)
+   Yousaf Kaukab                     1 (5.9%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 17)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Boris Brezillon                   5 (29.4%)
+   Heinrich Schuchardt               4 (23.5%)
+   Fabio Estevam                     2 (11.8%)
+   Bin Meng                          1 (5.9%)
+   Andy Shevchenko                   1 (5.9%)
+   Kever Yang                        1 (5.9%)
+   Joe Hershberger                   1 (5.9%)
+   Daniel Schwierzeck                1 (5.9%)
+   Andreas Färber                    1 (5.9%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         409 (37.0%)
+   Google, Inc.                      120 (10.9%)
+   NXP                               100 (9.0%)
+   DENX Software Engineering         79 (7.1%)
+   Linaro                            59 (5.3%)
+   Texas Instruments                 52 (4.7%)
+   AMD                               38 (3.4%)
+   Bootlin                           30 (2.7%)
+   Guntermann & Drunck               30 (2.7%)
+   ST Microelectronics               29 (2.6%)
+   Marvell                           19 (1.7%)
+   Intel                             16 (1.4%)
+   Konsulko Group                    16 (1.4%)
+   O.S. Systems                      15 (1.4%)
+   ARM                               11 (1.0%)
+   National Instruments              10 (0.9%)
+   Socionext Inc.                    10 (0.9%)
+   Xilinx                            10 (0.9%)
+   Renesas Electronics               9 (0.8%)
+   Amarula Solutions                 7 (0.6%)
+   SUSE                              6 (0.5%)
+   Phytec                            5 (0.5%)
+   Toradex                           5 (0.5%)
+   NVidia                            4 (0.4%)
+   Pepperl+Fuchs                     4 (0.4%)
+   Rockchip                          4 (0.4%)
+   General Electric                  3 (0.3%)
+   BayLibre SAS                      2 (0.2%)
+   Collabora Ltd.                    1 (0.1%)
+   Digi International                1 (0.1%)
+   Grazvydas Ignotas                 1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         20211 (24.0%)
+   NXP                               9766 (11.6%)
+   Google, Inc.                      8404 (10.0%)
+   Amarula Solutions                 7158 (8.5%)
+   Texas Instruments                 7140 (8.5%)
+   Guntermann & Drunck               7127 (8.5%)
+   Linaro                            6663 (7.9%)
+   DENX Software Engineering         4407 (5.2%)
+   Bootlin                           2888 (3.4%)
+   AMD                               2281 (2.7%)
+   ARM                               1711 (2.0%)
+   SUSE                              871 (1.0%)
+   Socionext Inc.                    864 (1.0%)
+   Intel                             806 (1.0%)
+   ST Microelectronics               735 (0.9%)
+   BayLibre SAS                      734 (0.9%)
+   National Instruments              636 (0.8%)
+   Konsulko Group                    465 (0.6%)
+   Marvell                           344 (0.4%)
+   O.S. Systems                      272 (0.3%)
+   Xilinx                            197 (0.2%)
+   Renesas Electronics               190 (0.2%)
+   Phytec                            179 (0.2%)
+   Rockchip                          100 (0.1%)
+   Pepperl+Fuchs                     67 (0.1%)
+   NVidia                            33 (0.0%)
+   Toradex                           26 (0.0%)
+   General Electric                  22 (0.0%)
+   Grazvydas Ignotas                 18 (0.0%)
+   Collabora Ltd.                    1 (0.0%)
+   Digi International                1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 284)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   SUSE                              116 (40.8%)
+   DENX Software Engineering         37 (13.0%)
+   (Unknown)                         33 (11.6%)
+   Texas Instruments                 24 (8.5%)
+   Bootlin                           14 (4.9%)
+   O.S. Systems                      14 (4.9%)
+   Konsulko Group                    12 (4.2%)
+   Xilinx                            7 (2.5%)
+   Google, Inc.                      5 (1.8%)
+   Linaro                            4 (1.4%)
+   NXP                               3 (1.1%)
+   ST Microelectronics               3 (1.1%)
+   Collabora Ltd.                    3 (1.1%)
+   BayLibre SAS                      2 (0.7%)
+   Samsung                           2 (0.7%)
+   Amarula Solutions                 1 (0.4%)
+   Socionext Inc.                    1 (0.4%)
+   Intel                             1 (0.4%)
+   Marvell                           1 (0.4%)
+   Toradex                           1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 131)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         58 (44.3%)
+   NXP                               17 (13.0%)
+   DENX Software Engineering         5 (3.8%)
+   Texas Instruments                 5 (3.8%)
+   Linaro                            5 (3.8%)
+   Intel                             4 (3.1%)
+   Marvell                           4 (3.1%)
+   SUSE                              3 (2.3%)
+   Bootlin                           3 (2.3%)
+   ST Microelectronics               3 (2.3%)
+   Xilinx                            2 (1.5%)
+   ARM                               2 (1.5%)
+   General Electric                  2 (1.5%)
+   O.S. Systems                      1 (0.8%)
+   Konsulko Group                    1 (0.8%)
+   Google, Inc.                      1 (0.8%)
+   Collabora Ltd.                    1 (0.8%)
+   BayLibre SAS                      1 (0.8%)
+   Amarula Solutions                 1 (0.8%)
+   Socionext Inc.                    1 (0.8%)
+   Toradex                           1 (0.8%)
+   Guntermann & Drunck               1 (0.8%)
+   AMD                               1 (0.8%)
+   National Instruments              1 (0.8%)
+   Renesas Electronics               1 (0.8%)
+   Phytec                            1 (0.8%)
+   Rockchip                          1 (0.8%)
+   Pepperl+Fuchs                     1 (0.8%)
+   NVidia                            1 (0.8%)
+   Grazvydas Ignotas                 1 (0.8%)
+   Digi International                1 (0.8%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2019.01.rst b/doc/develop/statistics/u-boot-stats-v2019.01.rst
new file mode 100644
index 00000000000..32b7cca4c01
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2019.01.rst
@@ -0,0 +1,733 @@
+:orphan:
+
+Release Statistics for U-Boot v2019.01
+======================================
+
+* Processed 1149 changesets from 140 developers
+
+* 29 employers found
+
+* A total of 99015 lines added, 19344 removed (delta 79671)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       136 (11.8%)
+   Bin Meng                          88 (7.7%)
+   Jean-Jacques Hiblot               62 (5.4%)
+   Heinrich Schuchardt               48 (4.2%)
+   Marek Vasut                       37 (3.2%)
+   Álvaro Fernández Rojas            36 (3.1%)
+   Michal Simek                      28 (2.4%)
+   Lukas Auer                        28 (2.4%)
+   Peng Fan                          26 (2.3%)
+   Tom Rini                          21 (1.8%)
+   Stefan Roese                      21 (1.8%)
+   Patrice Chotard                   20 (1.7%)
+   Adam Ford                         20 (1.7%)
+   Rajesh Bhagat                     19 (1.7%)
+   Mario Six                         18 (1.6%)
+   Philipp Tomsich                   16 (1.4%)
+   Ryder Lee                         16 (1.4%)
+   Lukasz Majewski                   14 (1.2%)
+   Andy Shevchenko                   14 (1.2%)
+   Neil Armstrong                    14 (1.2%)
+   Jagan Teki                        13 (1.1%)
+   Lokesh Vutla                      13 (1.1%)
+   Jerome Brunet                     13 (1.1%)
+   Simon Goldschmidt                 13 (1.1%)
+   Cédric Le Goater                  13 (1.1%)
+   Christoph Muellner                11 (1.0%)
+   Chris Packham                     11 (1.0%)
+   Boris Brezillon                   11 (1.0%)
+   Otavio Salvador                   10 (0.9%)
+   Baruch Siach                      10 (0.9%)
+   Peng Ma                           10 (0.9%)
+   Christophe Leroy                  10 (0.9%)
+   Philippe Reynes                   10 (0.9%)
+   Masahiro Yamada                   9 (0.8%)
+   Gregory CLEMENT                   9 (0.8%)
+   Alexander Graf                    8 (0.7%)
+   Ang, Chee Hong                    8 (0.7%)
+   Olliver Schinagl                  8 (0.7%)
+   Grygorii Strashko                 8 (0.7%)
+   Ye Li                             7 (0.6%)
+   Andre Przywara                    7 (0.6%)
+   Kever Yang                        7 (0.6%)
+   Aditya Prayoga                    7 (0.6%)
+   Rick Chen                         7 (0.6%)
+   Anup Patel                        7 (0.6%)
+   AKASHI Takahiro                   7 (0.6%)
+   Alexey Brodkin                    7 (0.6%)
+   Vasily Khoruzhick                 7 (0.6%)
+   Stefan Agner                      6 (0.5%)
+   Daniel Schwierzeck                6 (0.5%)
+   Paul Burton                       5 (0.4%)
+   Patrick Delaunay                  5 (0.4%)
+   Siva Durga Prasad Paladugu        5 (0.4%)
+   Felix Brack                       5 (0.4%)
+   Keerthy                           5 (0.4%)
+   Priyanka Jain                     5 (0.4%)
+   Pankit Garg                       5 (0.4%)
+   Sven Schwermer                    5 (0.4%)
+   Tuomas Tynkkynen                  5 (0.4%)
+   Fabio Estevam                     4 (0.3%)
+   Michael Heimpold                  4 (0.3%)
+   Weijie Gao                        4 (0.3%)
+   Benjamin Gaignard                 4 (0.3%)
+   Yegor Yefremov                    4 (0.3%)
+   Marcin Niestroj                   4 (0.3%)
+   Fabrice Gasnier                   4 (0.3%)
+   Sam Protsenko                     3 (0.3%)
+   Guillaume GARDET                  3 (0.3%)
+   Martin Fuzzey                     3 (0.3%)
+   Denis Zalevskiy                   3 (0.3%)
+   Anatolij Gustschin                3 (0.3%)
+   Jonathan Gray                     3 (0.3%)
+   Andrew F. Davis                   3 (0.3%)
+   Vignesh R                         3 (0.3%)
+   York Sun                          3 (0.3%)
+   Manivannan Sadhasivam             3 (0.3%)
+   Miquel Raynal                     3 (0.3%)
+   Quentin Schulz                    3 (0.3%)
+   Shawn Guo                         2 (0.2%)
+   Soeren Moch                       2 (0.2%)
+   Stefan Mavrodiev                  2 (0.2%)
+   Gary Bisson                       2 (0.2%)
+   Xiaoliang Yang                    2 (0.2%)
+   Anand Moon                        2 (0.2%)
+   Martyn Welch                      2 (0.2%)
+   Sumit Garg                        2 (0.2%)
+   Heiko Schocher                    2 (0.2%)
+   Andreas Dannenberg                2 (0.2%)
+   Thomas RIENOESSL                  2 (0.2%)
+   Takeshi Kihara                    2 (0.2%)
+   Hiroyuki Yokoyama                 2 (0.2%)
+   Frank Wunderlich                  2 (0.2%)
+   Carlo Caione                      2 (0.2%)
+   Patrick Wildt                     2 (0.2%)
+   Heiko Stuebner                    2 (0.2%)
+   Richard Röjfors                   2 (0.2%)
+   Trevor Woerner                    2 (0.2%)
+   Icenowy Zheng                     2 (0.2%)
+   Liviu Dudau                       2 (0.2%)
+   Konrad Beckmann                   2 (0.2%)
+   Vladimir Zapolskiy                2 (0.2%)
+   Chris Spencer                     1 (0.1%)
+   Alex Elder                        1 (0.1%)
+   Tien Fong Chee                    1 (0.1%)
+   Priit Laes                        1 (0.1%)
+   Enric Balletbo i Serra            1 (0.1%)
+   Nikolai Zhubr                     1 (0.1%)
+   Harald Seiler                     1 (0.1%)
+   Stefano Babic                     1 (0.1%)
+   Parthiban Nallathambi             1 (0.1%)
+   Yaniv Levinsky                    1 (0.1%)
+   Martin Husemann                   1 (0.1%)
+   Fabien Lahoudere                  1 (0.1%)
+   Christian Gmeiner                 1 (0.1%)
+   From: Karl Palsson                1 (0.1%)
+   Cristian Ciocaltea                1 (0.1%)
+   Seung-Woo Kim                     1 (0.1%)
+   Loic Devulder                     1 (0.1%)
+   Pierre-Jean Texier                1 (0.1%)
+   Igor Opaniuk                      1 (0.1%)
+   Petr Štetiar                      1 (0.1%)
+   Sekhar Nori                       1 (0.1%)
+   Klaus Goger                       1 (0.1%)
+   Hannes Schmelzer                  1 (0.1%)
+   Eugen Hristev                      1 (0.1%)
+   Hou Zhiqiang                      1 (0.1%)
+   Ashish Kumar                      1 (0.1%)
+   Pramod Kumar                      1 (0.1%)
+   Alison Wang                       1 (0.1%)
+   Randy Li                          1 (0.1%)
+   Jorge Ramirez-Ortiz               1 (0.1%)
+   Vipul Kumar                       1 (0.1%)
+   T Karthik Reddy                   1 (0.1%)
+   Emmanuel Vadot                    1 (0.1%)
+   Martin Lund                       1 (0.1%)
+   Guochun Mao                       1 (0.1%)
+   Michael Trimarchi                 1 (0.1%)
+   Rabeeh Khoury                     1 (0.1%)
+   Prasanthi Chellakumar             1 (0.1%)
+   Jun Nie                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Ryder Lee                         9640 (9.2%)
+   Simon Glass                       8148 (7.8%)
+   Marek Vasut                       7684 (7.4%)
+   Peng Fan                          7178 (6.9%)
+   Bin Meng                          5545 (5.3%)
+   Neil Armstrong                    4029 (3.9%)
+   Álvaro Fernández Rojas            3615 (3.5%)
+   Gregory CLEMENT                   3539 (3.4%)
+   Paul Burton                       3514 (3.4%)
+   Lokesh Vutla                      3242 (3.1%)
+   Jean-Jacques Hiblot               2776 (2.7%)
+   Manivannan Sadhasivam             2577 (2.5%)
+   Rajesh Bhagat                     2282 (2.2%)
+   Jerome Brunet                     2058 (2.0%)
+   Cédric Le Goater                  1822 (1.7%)
+   Weijie Gao                        1793 (1.7%)
+   Mario Six                         1738 (1.7%)
+   Stefan Roese                      1546 (1.5%)
+   Tuomas Tynkkynen                  1502 (1.4%)
+   Grygorii Strashko                 1473 (1.4%)
+   Simon Goldschmidt                 1358 (1.3%)
+   Adam Ford                         1349 (1.3%)
+   Chris Packham                     1333 (1.3%)
+   Heinrich Schuchardt               1290 (1.2%)
+   Philipp Tomsich                   1241 (1.2%)
+   Philippe Reynes                   1206 (1.2%)
+   Otavio Salvador                   1179 (1.1%)
+   Masahiro Yamada                   1112 (1.1%)
+   Lukasz Majewski                   1110 (1.1%)
+   Andre Przywara                    1021 (1.0%)
+   Quentin Schulz                    1012 (1.0%)
+   Priyanka Jain                     829 (0.8%)
+   Patrice Chotard                   787 (0.8%)
+   Rick Chen                         740 (0.7%)
+   Felix Brack                       677 (0.6%)
+   Lukas Auer                        625 (0.6%)
+   Tom Rini                          618 (0.6%)
+   Martin Fuzzey                     580 (0.6%)
+   Christophe Leroy                  578 (0.6%)
+   Benjamin Gaignard                 560 (0.5%)
+   Pankit Garg                       520 (0.5%)
+   Jagan Teki                        491 (0.5%)
+   Ang, Chee Hong                    478 (0.5%)
+   Yegor Yefremov                    460 (0.4%)
+   Marcin Niestroj                   454 (0.4%)
+   Vasily Khoruzhick                 398 (0.4%)
+   Christoph Muellner                394 (0.4%)
+   Rabeeh Khoury                     391 (0.4%)
+   Andy Shevchenko                   385 (0.4%)
+   Vignesh R                         369 (0.4%)
+   Guochun Mao                       367 (0.4%)
+   Anup Patel                        366 (0.4%)
+   York Sun                          332 (0.3%)
+   Alexey Brodkin                    298 (0.3%)
+   Boris Brezillon                   240 (0.2%)
+   Michal Simek                      200 (0.2%)
+   Olliver Schinagl                  171 (0.2%)
+   Fabrice Gasnier                   159 (0.2%)
+   AKASHI Takahiro                   156 (0.1%)
+   Loic Devulder                     151 (0.1%)
+   Baruch Siach                      149 (0.1%)
+   Jun Nie                           140 (0.1%)
+   Daniel Schwierzeck                128 (0.1%)
+   Alexander Graf                    127 (0.1%)
+   Denis Zalevskiy                   127 (0.1%)
+   Miquel Raynal                     124 (0.1%)
+   Sven Schwermer                    117 (0.1%)
+   Prasanthi Chellakumar             114 (0.1%)
+   Fabien Lahoudere                  111 (0.1%)
+   Siva Durga Prasad Paladugu        106 (0.1%)
+   Aditya Prayoga                    99 (0.1%)
+   Ye Li                             95 (0.1%)
+   Peng Ma                           91 (0.1%)
+   Heiko Stuebner                    83 (0.1%)
+   Patrick Delaunay                  74 (0.1%)
+   Andreas Dannenberg                56 (0.1%)
+   Vipul Kumar                       54 (0.1%)
+   Kever Yang                        53 (0.1%)
+   Anatolij Gustschin                50 (0.0%)
+   Vladimir Zapolskiy                50 (0.0%)
+   Icenowy Zheng                     49 (0.0%)
+   Randy Li                          49 (0.0%)
+   Heiko Schocher                    42 (0.0%)
+   Fabio Estevam                     29 (0.0%)
+   Xiaoliang Yang                    28 (0.0%)
+   Sumit Garg                        28 (0.0%)
+   Liviu Dudau                       28 (0.0%)
+   Parthiban Nallathambi             27 (0.0%)
+   Pramod Kumar                      27 (0.0%)
+   Andrew F. Davis                   24 (0.0%)
+   Stefan Agner                      22 (0.0%)
+   Keerthy                           20 (0.0%)
+   T Karthik Reddy                   19 (0.0%)
+   Gary Bisson                       18 (0.0%)
+   Takeshi Kihara                    15 (0.0%)
+   Jonathan Gray                     14 (0.0%)
+   Patrick Wildt                     14 (0.0%)
+   Carlo Caione                      13 (0.0%)
+   Seung-Woo Kim                     12 (0.0%)
+   Hannes Schmelzer                  12 (0.0%)
+   Frank Wunderlich                  11 (0.0%)
+   Stefano Babic                     10 (0.0%)
+   From: Karl Palsson                10 (0.0%)
+   Eugen Hristev                      10 (0.0%)
+   Sam Protsenko                     9 (0.0%)
+   Shawn Guo                         9 (0.0%)
+   Stefan Mavrodiev                  8 (0.0%)
+   Hiroyuki Yokoyama                 8 (0.0%)
+   Konrad Beckmann                   8 (0.0%)
+   Sekhar Nori                       8 (0.0%)
+   Hou Zhiqiang                      7 (0.0%)
+   Ashish Kumar                      7 (0.0%)
+   Anand Moon                        6 (0.0%)
+   Thomas RIENOESSL                  6 (0.0%)
+   Michael Heimpold                  5 (0.0%)
+   Guillaume GARDET                  5 (0.0%)
+   Martyn Welch                      5 (0.0%)
+   Trevor Woerner                    5 (0.0%)
+   Yaniv Levinsky                    5 (0.0%)
+   Cristian Ciocaltea                5 (0.0%)
+   Petr Štetiar                      5 (0.0%)
+   Klaus Goger                       5 (0.0%)
+   Nikolai Zhubr                     4 (0.0%)
+   Martin Lund                       4 (0.0%)
+   Soeren Moch                       3 (0.0%)
+   Chris Spencer                     3 (0.0%)
+   Alex Elder                        3 (0.0%)
+   Igor Opaniuk                      3 (0.0%)
+   Richard Röjfors                   2 (0.0%)
+   Priit Laes                        2 (0.0%)
+   Christian Gmeiner                 2 (0.0%)
+   Pierre-Jean Texier                2 (0.0%)
+   Alison Wang                       2 (0.0%)
+   Tien Fong Chee                    1 (0.0%)
+   Enric Balletbo i Serra            1 (0.0%)
+   Harald Seiler                     1 (0.0%)
+   Martin Husemann                   1 (0.0%)
+   Jorge Ramirez-Ortiz               1 (0.0%)
+   Emmanuel Vadot                    1 (0.0%)
+   Michael Trimarchi                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          268 (1.4%)
+   Jagan Teki                        129 (0.7%)
+   Christophe Leroy                  128 (0.7%)
+   Daniel Schwierzeck                104 (0.5%)
+   Chris Packham                     91 (0.5%)
+   Grygorii Strashko                 90 (0.5%)
+   Vladimir Zapolskiy                10 (0.1%)
+   Patrick Delaunay                  7 (0.0%)
+   Sam Protsenko                     5 (0.0%)
+   Jonathan Gray                     3 (0.0%)
+   Shawn Guo                         3 (0.0%)
+   From: Karl Palsson                2 (0.0%)
+   Sekhar Nori                       1 (0.0%)
+   Christian Gmeiner                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 267)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    59 (22.1%)
+   Stefan Roese                      24 (9.0%)
+   Neil Armstrong                    15 (5.6%)
+   Pankit Garg                       12 (4.5%)
+   Michal Simek                      9 (3.4%)
+   Marek Vasut                       9 (3.4%)
+   Bin Meng                          9 (3.4%)
+   Priit Laes                        8 (3.0%)
+   Tom Rini                          7 (2.6%)
+   Ezequiel Garcia                   7 (2.6%)
+   Vinitha V Pillai                  7 (2.6%)
+   Andreas Dannenberg                7 (2.6%)
+   Minkyu Kang                       6 (2.2%)
+   Jagan Teki                        5 (1.9%)
+   Daniel Schwierzeck                4 (1.5%)
+   Jerome Brunet                     4 (1.5%)
+   Jean-Jacques Hiblot               4 (1.5%)
+   Simon Glass                       4 (1.5%)
+   Ruchika Gupta                     3 (1.1%)
+   Keerthy                           3 (1.1%)
+   Fabien Lahoudere                  3 (1.1%)
+   Philipp Tomsich                   3 (1.1%)
+   Weijie Gao                        3 (1.1%)
+   Rajesh Bhagat                     3 (1.1%)
+   Grygorii Strashko                 2 (0.7%)
+   Sriram Dash                       2 (0.7%)
+   Schuyler Patton                   2 (0.7%)
+   James Doublesin                   2 (0.7%)
+   Hiroyuki Yokoyama                 2 (0.7%)
+   York Sun                          2 (0.7%)
+   Anatolij Gustschin                2 (0.7%)
+   Heiko Stuebner                    2 (0.7%)
+   Siva Durga Prasad Paladugu        2 (0.7%)
+   Tuomas Tynkkynen                  2 (0.7%)
+   Peng Fan                          2 (0.7%)
+   Ryder Lee                         2 (0.7%)
+   Shawn Guo                         1 (0.4%)
+   Praneeth Bajjuri                  1 (0.4%)
+   Javier Martínez Canillas          1 (0.4%)
+   Jon Nettleton                     1 (0.4%)
+   Robert Berger                     1 (0.4%)
+   Josua Mayer                       1 (0.4%)
+   Bao Xiaowei                       1 (0.4%)
+   Meenakshi Aggarwal                1 (0.4%)
+   Vabhav Sharma                     1 (0.4%)
+   Rajat Srivastava                  1 (0.4%)
+   Fabio Berton                      1 (0.4%)
+   Oleksandr Tymoshenko              1 (0.4%)
+   Wu Zou                            1 (0.4%)
+   Christophe Kerello                1 (0.4%)
+   Hou Zhiqiang                      1 (0.4%)
+   Stefano Babic                     1 (0.4%)
+   Vignesh R                         1 (0.4%)
+   Icenowy Zheng                     1 (0.4%)
+   Baruch Siach                      1 (0.4%)
+   Lukas Auer                        1 (0.4%)
+   Christoph Muellner                1 (0.4%)
+   Vasily Khoruzhick                 1 (0.4%)
+   Patrice Chotard                   1 (0.4%)
+   Andre Przywara                    1 (0.4%)
+   Lokesh Vutla                      1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 665)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       197 (29.6%)
+   Tom Rini                          86 (12.9%)
+   Bin Meng                          47 (7.1%)
+   York Sun                          40 (6.0%)
+   Philipp Tomsich                   37 (5.6%)
+   Lukas Auer                        27 (4.1%)
+   Stefan Roese                      25 (3.8%)
+   Anup Patel                        22 (3.3%)
+   Heiko Schocher                    20 (3.0%)
+   Jagan Teki                        18 (2.7%)
+   Rick Chen                         18 (2.7%)
+   Daniel Schwierzeck                14 (2.1%)
+   Anatolij Gustschin                12 (1.8%)
+   Joel Stanley                      12 (1.8%)
+   Heinrich Schuchardt               10 (1.5%)
+   Lukasz Majewski                   9 (1.4%)
+   Alexander Graf                    6 (0.9%)
+   Marek Vasut                       6 (0.9%)
+   Dennis Gilmore                    6 (0.9%)
+   Peng Fan                          5 (0.8%)
+   Patrice Chotard                   4 (0.6%)
+   Patrick Delaunay                  3 (0.5%)
+   Stefan Agner                      3 (0.5%)
+   Breno Lima                        3 (0.5%)
+   Miquel Raynal                     3 (0.5%)
+   Felix Brack                       3 (0.5%)
+   Jean-Jacques Hiblot               2 (0.3%)
+   Andre Przywara                    2 (0.3%)
+   Lokesh Vutla                      2 (0.3%)
+   Christian Gmeiner                 2 (0.3%)
+   Joe Hershberger                   2 (0.3%)
+   Jerome Brunet                     1 (0.2%)
+   Weijie Gao                        1 (0.2%)
+   Stefano Babic                     1 (0.2%)
+   Sam Protsenko                     1 (0.2%)
+   Richard Röjfors                   1 (0.2%)
+   Faiz Abbas                        1 (0.2%)
+   Palmer Dabbelt                    1 (0.2%)
+   Jens Wiklander                    1 (0.2%)
+   Stephen Warren                    1 (0.2%)
+   Jack Mitchell                     1 (0.2%)
+   Joakim Tjernlund                  1 (0.2%)
+   Andy Yan                          1 (0.2%)
+   Nishanth Menon                    1 (0.2%)
+   Chen-Yu Tsai                      1 (0.2%)
+   Igor Opaniuk                      1 (0.2%)
+   Hannes Schmelzer                  1 (0.2%)
+   Sumit Garg                        1 (0.2%)
+   Boris Brezillon                   1 (0.2%)
+   Simon Goldschmidt                 1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 78)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heiko Schocher                    11 (14.1%)
+   Matthias Brugger                  7 (9.0%)
+   Bin Meng                          6 (7.7%)
+   Dennis Gilmore                    6 (7.7%)
+   Jerome Brunet                     4 (5.1%)
+   Peter Robinson                    4 (5.1%)
+   Maxime Ripard                     4 (5.1%)
+   Klaus Goger                       4 (5.1%)
+   Jagan Teki                        3 (3.8%)
+   Felix Brack                       3 (3.8%)
+   Priit Laes                        3 (3.8%)
+   Baruch Siach                      2 (2.6%)
+   Simon Glass                       1 (1.3%)
+   Lukas Auer                        1 (1.3%)
+   Stefan Roese                      1 (1.3%)
+   Sam Protsenko                     1 (1.3%)
+   Richard Röjfors                   1 (1.3%)
+   Stephen Warren                    1 (1.3%)
+   Jack Mitchell                     1 (1.3%)
+   Igor Opaniuk                      1 (1.3%)
+   Hannes Schmelzer                  1 (1.3%)
+   Sumit Garg                        1 (1.3%)
+   Ryder Lee                         1 (1.3%)
+   Christoph Muellner                1 (1.3%)
+   Vasily Khoruzhick                 1 (1.3%)
+   Jonathan Gray                     1 (1.3%)
+   Ricardo Salveti                   1 (1.3%)
+   Marek Kraus                       1 (1.3%)
+   Vagrant Cascadian                 1 (1.3%)
+   Patrick.Delaunay                  1 (1.3%)
+   Soeren Moch                       1 (1.3%)
+   Frank Wunderlich                  1 (1.3%)
+   Loic Devulder                     1 (1.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 78)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Boris Brezillon                   11 (14.1%)
+   Ryder Lee                         7 (9.0%)
+   Vasily Khoruzhick                 7 (9.0%)
+   Aditya Prayoga                    6 (7.7%)
+   Philipp Tomsich                   5 (6.4%)
+   Anup Patel                        5 (6.4%)
+   Alexander Graf                    5 (6.4%)
+   Jean-Jacques Hiblot               5 (6.4%)
+   Neil Armstrong                    4 (5.1%)
+   Patrick Delaunay                  3 (3.8%)
+   Bin Meng                          2 (2.6%)
+   Jagan Teki                        2 (2.6%)
+   Weijie Gao                        2 (2.6%)
+   Fabio Estevam                     2 (2.6%)
+   Kever Yang                        2 (2.6%)
+   Manivannan Sadhasivam             2 (2.6%)
+   Anatolij Gustschin                1 (1.3%)
+   Heinrich Schuchardt               1 (1.3%)
+   Andre Przywara                    1 (1.3%)
+   Shawn Guo                         1 (1.3%)
+   Icenowy Zheng                     1 (1.3%)
+   Chris Packham                     1 (1.3%)
+   From: Karl Palsson                1 (1.3%)
+   Randy Li                          1 (1.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 29)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heinrich Schuchardt               3 (10.3%)
+   Jean-Jacques Hiblot               2 (6.9%)
+   Jagan Teki                        1 (3.4%)
+   Priit Laes                        1 (3.4%)
+   Baruch Siach                      1 (3.4%)
+   Simon Glass                       1 (3.4%)
+   Lukas Auer                        1 (3.4%)
+   Stefan Roese                      1 (3.4%)
+   Sam Protsenko                     1 (3.4%)
+   Igor Opaniuk                      1 (3.4%)
+   Jonathan Gray                     1 (3.4%)
+   Ricardo Salveti                   1 (3.4%)
+   Loic Devulder                     1 (3.4%)
+   Marek Vasut                       1 (3.4%)
+   Patrice Chotard                   1 (3.4%)
+   Joakim Tjernlund                  1 (3.4%)
+   Alex Kiernan                      1 (3.4%)
+   Siarhei Siamashka                 1 (3.4%)
+   Assaf Agmon                       1 (3.4%)
+   Liam O'Shaughnessy                1 (3.4%)
+   Dominik Adamski                   1 (3.4%)
+   Roosen Henri                      1 (3.4%)
+   Jakob Unterwurzacher              1 (3.4%)
+   Chris Spencer                     1 (3.4%)
+   AKASHI Takahiro                   1 (3.4%)
+   Andy Shevchenko                   1 (3.4%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 29)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    6 (20.7%)
+   Heinrich Schuchardt               3 (10.3%)
+   Jean-Jacques Hiblot               3 (10.3%)
+   Bin Meng                          3 (10.3%)
+   Fabio Estevam                     2 (6.9%)
+   Tom Rini                          2 (6.9%)
+   Lokesh Vutla                      2 (6.9%)
+   Philipp Tomsich                   1 (3.4%)
+   Shawn Guo                         1 (3.4%)
+   Christoph Muellner                1 (3.4%)
+   Lukasz Majewski                   1 (3.4%)
+   Simon Goldschmidt                 1 (3.4%)
+   Christophe Leroy                  1 (3.4%)
+   Guillaume GARDET                  1 (3.4%)
+   Adam Ford                         1 (3.4%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         473 (41.2%)
+   Google, Inc.                      136 (11.8%)
+   Texas Instruments                 97 (8.4%)
+   NXP                               81 (7.0%)
+   DENX Software Engineering         80 (7.0%)
+   BayLibre SAS                      29 (2.5%)
+   ST Microelectronics               29 (2.5%)
+   AMD                               28 (2.4%)
+   Linaro                            24 (2.1%)
+   Intel                             23 (2.0%)
+   Konsulko Group                    21 (1.8%)
+   Guntermann & Drunck               18 (1.6%)
+   Bootlin                           15 (1.3%)
+   Amarula Solutions                 14 (1.2%)
+   Pepperl+Fuchs                     13 (1.1%)
+   O.S. Systems                      10 (0.9%)
+   ARM                               9 (0.8%)
+   Socionext Inc.                    9 (0.8%)
+   Rockchip                          7 (0.6%)
+   Xilinx                            7 (0.6%)
+   Toradex                           6 (0.5%)
+   MIPS                              5 (0.4%)
+   Renesas Electronics               4 (0.3%)
+   Collabora Ltd.                    3 (0.3%)
+   General Electric                  3 (0.3%)
+   Boundary Devices                  2 (0.2%)
+   CompuLab                          1 (0.1%)
+   Samsung                           1 (0.1%)
+   SUSE                              1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         38226 (36.6%)
+   NXP                               11398 (10.9%)
+   DENX Software Engineering         10470 (10.0%)
+   Google, Inc.                      8148 (7.8%)
+   Texas Instruments                 7968 (7.6%)
+   BayLibre SAS                      6100 (5.8%)
+   Bootlin                           4675 (4.5%)
+   MIPS                              3514 (3.4%)
+   Linaro                            3483 (3.3%)
+   Guntermann & Drunck               1738 (1.7%)
+   Pepperl+Fuchs                     1358 (1.3%)
+   O.S. Systems                      1179 (1.1%)
+   Socionext Inc.                    1112 (1.1%)
+   ARM                               1049 (1.0%)
+   ST Microelectronics               1020 (1.0%)
+   Intel                             864 (0.8%)
+   Konsulko Group                    618 (0.6%)
+   Amarula Solutions                 492 (0.5%)
+   AMD                               200 (0.2%)
+   Xilinx                            179 (0.2%)
+   SUSE                              151 (0.1%)
+   General Electric                  127 (0.1%)
+   Collabora Ltd.                    116 (0.1%)
+   Rockchip                          53 (0.1%)
+   Renesas Electronics               23 (0.0%)
+   Toradex                           22 (0.0%)
+   Boundary Devices                  18 (0.0%)
+   Samsung                           12 (0.0%)
+   CompuLab                          5 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 267)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   SUSE                              59 (22.1%)
+   (Unknown)                         55 (20.6%)
+   NXP                               36 (13.5%)
+   DENX Software Engineering         27 (10.1%)
+   Texas Instruments                 23 (8.6%)
+   BayLibre SAS                      19 (7.1%)
+   Collabora Ltd.                    10 (3.7%)
+   Xilinx                            9 (3.4%)
+   Konsulko Group                    7 (2.6%)
+   Samsung                           6 (2.2%)
+   Amarula Solutions                 5 (1.9%)
+   Google, Inc.                      4 (1.5%)
+   ST Microelectronics               2 (0.7%)
+   Renesas Electronics               2 (0.7%)
+   Linaro                            1 (0.4%)
+   O.S. Systems                      1 (0.4%)
+   ARM                               1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 141)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         65 (46.1%)
+   NXP                               12 (8.5%)
+   Linaro                            9 (6.4%)
+   DENX Software Engineering         8 (5.7%)
+   Texas Instruments                 8 (5.7%)
+   BayLibre SAS                      3 (2.1%)
+   Collabora Ltd.                    3 (2.1%)
+   Xilinx                            3 (2.1%)
+   ST Microelectronics               3 (2.1%)
+   Bootlin                           3 (2.1%)
+   Intel                             3 (2.1%)
+   Amarula Solutions                 2 (1.4%)
+   Renesas Electronics               2 (1.4%)
+   ARM                               2 (1.4%)
+   SUSE                              1 (0.7%)
+   Konsulko Group                    1 (0.7%)
+   Samsung                           1 (0.7%)
+   Google, Inc.                      1 (0.7%)
+   O.S. Systems                      1 (0.7%)
+   MIPS                              1 (0.7%)
+   Guntermann & Drunck               1 (0.7%)
+   Pepperl+Fuchs                     1 (0.7%)
+   Socionext Inc.                    1 (0.7%)
+   AMD                               1 (0.7%)
+   General Electric                  1 (0.7%)
+   Rockchip                          1 (0.7%)
+   Toradex                           1 (0.7%)
+   Boundary Devices                  1 (0.7%)
+   CompuLab                          1 (0.7%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2019.04.rst b/doc/develop/statistics/u-boot-stats-v2019.04.rst
new file mode 100644
index 00000000000..24920b6f24d
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2019.04.rst
@@ -0,0 +1,805 @@
+:orphan:
+
+Release Statistics for U-Boot v2019.04
+======================================
+
+* Processed 1193 changesets from 182 developers
+
+* 28 employers found
+
+* A total of 76038 lines added, 22237 removed (delta 53801)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heinrich Schuchardt               94 (7.9%)
+   Simon Glass                       90 (7.5%)
+   Michal Simek                      64 (5.4%)
+   Marek Vasut                       55 (4.6%)
+   Jagan Teki                        45 (3.8%)
+   Simon Goldschmidt                 32 (2.7%)
+   Chris Packham                     29 (2.4%)
+   Adam Ford                         26 (2.2%)
+   Horatiu Vultur                    26 (2.2%)
+   Fabio Estevam                     24 (2.0%)
+   Vignesh R                         23 (1.9%)
+   Abel Vesa                         21 (1.8%)
+   Tom Rini                          18 (1.5%)
+   Patrick Delaunay                  18 (1.5%)
+   AKASHI Takahiro                   18 (1.5%)
+   Krzysztof Kozlowski               17 (1.4%)
+   Tim Harvey                        17 (1.4%)
+   Philippe Reynes                   16 (1.3%)
+   Stefan Roese                      14 (1.2%)
+   Andrew F. Davis                   14 (1.2%)
+   Siva Durga Prasad Paladugu        14 (1.2%)
+   Mian Yousaf Kaukab                13 (1.1%)
+   Lars Povlsen                      13 (1.1%)
+   Baruch Siach                      12 (1.0%)
+   Peng Fan                          12 (1.0%)
+   Stefan Agner                      12 (1.0%)
+   David Wu                          10 (0.8%)
+   Rajesh Bhagat                     10 (0.8%)
+   Anup Patel                        10 (0.8%)
+   Marek Behún                       10 (0.8%)
+   Jean-Jacques Hiblot               9 (0.8%)
+   Martyn Welch                      9 (0.8%)
+   Hiroyuki Yokoyama                 9 (0.8%)
+   Weijie Gao                        9 (0.8%)
+   Lukasz Majewski                   8 (0.7%)
+   Philipp Tomsich                   8 (0.7%)
+   Masahiro Yamada                   8 (0.7%)
+   Bryan O'Donoghue                  8 (0.7%)
+   Andy Shevchenko                   8 (0.7%)
+   Peng Ma                           8 (0.7%)
+   Ramon Fried                       8 (0.7%)
+   Neil Armstrong                    7 (0.6%)
+   Alexander Graf                    7 (0.6%)
+   Daniel Schwierzeck                7 (0.6%)
+   Bin Meng                          7 (0.6%)
+   Ismael Luceno Cortes              7 (0.6%)
+   Lukas Auer                        7 (0.6%)
+   Tien Fong Chee                    7 (0.6%)
+   Breno Matheus Lima                7 (0.6%)
+   Boris Brezillon                   7 (0.6%)
+   Enric Balletbo i Serra            7 (0.6%)
+   Hannes Schmelzer                  6 (0.5%)
+   Alexey Brodkin                    6 (0.5%)
+   Andre Przywara                    6 (0.5%)
+   Peter Robinson                    6 (0.5%)
+   Priyanka Jain                     6 (0.5%)
+   Shawn Guo                         6 (0.5%)
+   Maxime Jourdan                    6 (0.5%)
+   Heiko Schocher                    5 (0.4%)
+   Pankaj Bansal                     5 (0.4%)
+   Atish Patra                       5 (0.4%)
+   Ye Li                             5 (0.4%)
+   Rick Chen                         5 (0.4%)
+   Lokesh Vutla                      4 (0.3%)
+   Faiz Abbas                        4 (0.3%)
+   Meenakshi Aggarwal                4 (0.3%)
+   Marcin Niestroj                   4 (0.3%)
+   Laurentiu Tudor                   4 (0.3%)
+   Manivannan Sadhasivam             4 (0.3%)
+   Priit Laes                        4 (0.3%)
+   Gregory CLEMENT                   4 (0.3%)
+   Eugen Hristev                     3 (0.3%)
+   Shyam Saini                       3 (0.3%)
+   Ley Foon Tan                      3 (0.3%)
+   Eugeniu Rosca                     3 (0.3%)
+   York Sun                          3 (0.3%)
+   Felix Brack                       3 (0.3%)
+   Tristan Bastian                   3 (0.3%)
+   Marcel Ziswiler                   3 (0.3%)
+   Pankit Garg                       3 (0.3%)
+   Chen-Yu Tsai                      3 (0.3%)
+   Patrick Bruenn                    3 (0.3%)
+   Xiaowei Bao                       3 (0.3%)
+   Andrejs Cainikovs                 2 (0.2%)
+   Matthias Brugger                  2 (0.2%)
+   Keerthy                           2 (0.2%)
+   Minkyu Kang                       2 (0.2%)
+   Vagrant Cascadian                 2 (0.2%)
+   Stephen Warren                    2 (0.2%)
+   Derald D. Woods                   2 (0.2%)
+   Igor Opaniuk                      2 (0.2%)
+   Roman Kapl                        2 (0.2%)
+   Max Krummenacher                  2 (0.2%)
+   Luis Araneda                      2 (0.2%)
+   Olaf Mandel                       2 (0.2%)
+   Sam Protsenko                     2 (0.2%)
+   Fabien Parent                     2 (0.2%)
+   Stefan Theil                      2 (0.2%)
+   Valentin-catalin Neacsu           2 (0.2%)
+   Mike Looijmans                    2 (0.2%)
+   Joakim Tjernlund                  2 (0.2%)
+   Hou Zhiqiang                      2 (0.2%)
+   Ezequiel Garcia                   2 (0.2%)
+   Thomas Petazzoni                  1 (0.1%)
+   默默                                1 (0.1%)
+   Chris Spencer                     1 (0.1%)
+   Michael Trimarchi                 1 (0.1%)
+   Kever Yang                        1 (0.1%)
+   BOUGH CHEN                        1 (0.1%)
+   Jernej Skrabec                    1 (0.1%)
+   Eugeniy Paltsev                   1 (0.1%)
+   Sébastien Szymanski               1 (0.1%)
+   Dalon Westergreen                 1 (0.1%)
+   Sean Nyekjaer                     1 (0.1%)
+   Alison Wang                       1 (0.1%)
+   Prabhakar Kushwaha                1 (0.1%)
+   Pramod Kumar                      1 (0.1%)
+   Ioana Ciocoi Radulescu            1 (0.1%)
+   Soeren Moch                       1 (0.1%)
+   Anand Moon                        1 (0.1%)
+   Dinh Nguyen                       1 (0.1%)
+   Jordan Hand                       1 (0.1%)
+   Ondrej Jirman                     1 (0.1%)
+   Stefan Mavrodiev                  1 (0.1%)
+   Alexander Dahl                    1 (0.1%)
+   Yunfeng Ding                      1 (0.1%)
+   David Rivshin                     1 (0.1%)
+   Julien Béraud                     1 (0.1%)
+   Jan Kiszka                        1 (0.1%)
+   Gerard Salvatella                 1 (0.1%)
+   Jonathan Hunter                   1 (0.1%)
+   Gervais, Francois                 1 (0.1%)
+   Bin Liu                           1 (0.1%)
+   Kurban Mallachiev                 1 (0.1%)
+   Zhao Qiang                        1 (0.1%)
+   Wen He                            1 (0.1%)
+   Udit Agarwal                      1 (0.1%)
+   Vabhav Sharma                     1 (0.1%)
+   Yinbo Zhu                         1 (0.1%)
+   Ang, Chee Hong                    1 (0.1%)
+   Venkatesh Yadav Abbarapu          1 (0.1%)
+   Shubhrajyoti Datta                1 (0.1%)
+   Amit Kucheria                     1 (0.1%)
+   Mounika Grace Akula               1 (0.1%)
+   Jonathan Gray                     1 (0.1%)
+   Adam Heinrich                     1 (0.1%)
+   Leif Lindholm                     1 (0.1%)
+   Tomas Novotny                     1 (0.1%)
+   Bernhard Messerklinger            1 (0.1%)
+   Hauke Mehrtens                    1 (0.1%)
+   Andreas Dannenberg                1 (0.1%)
+   Vladimir Vid                      1 (0.1%)
+   Marty E. Plummer                  1 (0.1%)
+   Mark Kettenis                     1 (0.1%)
+   Jorge Ramire-Ortiz                1 (0.1%)
+   Jorge Ramirez-Ortiz               1 (0.1%)
+   Jerome Brunet                     1 (0.1%)
+   Mario Six                         1 (0.1%)
+   Greg Czerniak                     1 (0.1%)
+   Angelo Dureghello                 1 (0.1%)
+   Robert P. J. Day                  1 (0.1%)
+   Sean Nyekjær                      1 (0.1%)
+   Carlo Caione                      1 (0.1%)
+   Aditya Prayoga                    1 (0.1%)
+   Andreas Pretzsch                  1 (0.1%)
+   Thomas RIENOESSL                  1 (0.1%)
+   Anton Gerasimov                   1 (0.1%)
+   Luca Ceresoli                     1 (0.1%)
+   T Karthik Reddy                   1 (0.1%)
+   Michael Tretter                   1 (0.1%)
+   Quentin Schulz                    1 (0.1%)
+   Aleksandr Aleksandrov             1 (0.1%)
+   Frank Wunderlich                  1 (0.1%)
+   Patrick Wildt                     1 (0.1%)
+   Florinel Iordache                 1 (0.1%)
+   Álvaro Fernández Rojas            1 (0.1%)
+   Josef Lusticky                    1 (0.1%)
+   Patrice Chotard                   1 (0.1%)
+   Tomasz Gorochowik                 1 (0.1%)
+   Sekhar Nori                       1 (0.1%)
+   Christian GMEINER                 1 (0.1%)
+   Yan Liu                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       10585 (11.8%)
+   David Wu                          9172 (10.2%)
+   Vignesh R                         6854 (7.7%)
+   Neil Armstrong                    5440 (6.1%)
+   Horatiu Vultur                    5136 (5.7%)
+   Jagan Teki                        4056 (4.5%)
+   AKASHI Takahiro                   3838 (4.3%)
+   Abel Vesa                         2983 (3.3%)
+   Heinrich Schuchardt               1925 (2.2%)
+   Weijie Gao                        1757 (2.0%)
+   Chris Packham                     1670 (1.9%)
+   Enric Balletbo i Serra            1647 (1.8%)
+   Pankaj Bansal                     1588 (1.8%)
+   Anup Patel                        1477 (1.6%)
+   Michal Simek                      1438 (1.6%)
+   Simon Goldschmidt                 1408 (1.6%)
+   Patrick Delaunay                  1337 (1.5%)
+   Lars Povlsen                      1304 (1.5%)
+   Adam Ford                         1260 (1.4%)
+   Priyanka Jain                     1244 (1.4%)
+   Leif Lindholm                     1183 (1.3%)
+   Breno Matheus Lima                1047 (1.2%)
+   Martyn Welch                      1039 (1.2%)
+   Fabio Estevam                     943 (1.1%)
+   Marek Vasut                       940 (1.0%)
+   Gregory CLEMENT                   916 (1.0%)
+   Heiko Schocher                    908 (1.0%)
+   Siva Durga Prasad Paladugu        778 (0.9%)
+   Rajesh Bhagat                     769 (0.9%)
+   Marek Behún                       683 (0.8%)
+   Stefan Roese                      681 (0.8%)
+   Tim Harvey                        671 (0.7%)
+   Pankit Garg                       650 (0.7%)
+   Shawn Guo                         573 (0.6%)
+   Boris Brezillon                   563 (0.6%)
+   Bryan O'Donoghue                  538 (0.6%)
+   Hannes Schmelzer                  501 (0.6%)
+   Jorge Ramirez-Ortiz               480 (0.5%)
+   Tom Rini                          479 (0.5%)
+   Lukasz Majewski                   440 (0.5%)
+   Peng Fan                          384 (0.4%)
+   Philippe Reynes                   359 (0.4%)
+   Atish Patra                       350 (0.4%)
+   Stefan Agner                      321 (0.4%)
+   Vladimir Vid                      313 (0.3%)
+   Marty E. Plummer                  304 (0.3%)
+   Tien Fong Chee                    299 (0.3%)
+   Aleksandr Aleksandrov             299 (0.3%)
+   Andrew F. Davis                   298 (0.3%)
+   Chen-Yu Tsai                      286 (0.3%)
+   Marcin Niestroj                   274 (0.3%)
+   Peter Robinson                    253 (0.3%)
+   Eugeniy Paltsev                   251 (0.3%)
+   Krzysztof Kozlowski               217 (0.2%)
+   Daniel Schwierzeck                212 (0.2%)
+   Philipp Tomsich                   197 (0.2%)
+   Peng Ma                           195 (0.2%)
+   Masahiro Yamada                   158 (0.2%)
+   Ramon Fried                       146 (0.2%)
+   Faiz Abbas                        146 (0.2%)
+   Roman Kapl                        140 (0.2%)
+   Andre Przywara                    132 (0.1%)
+   Andy Shevchenko                   130 (0.1%)
+   Jerome Brunet                     123 (0.1%)
+   Hiroyuki Yokoyama                 122 (0.1%)
+   Manivannan Sadhasivam             121 (0.1%)
+   Derald D. Woods                   119 (0.1%)
+   Meenakshi Aggarwal                112 (0.1%)
+   Jean-Jacques Hiblot               109 (0.1%)
+   Eugeniu Rosca                     102 (0.1%)
+   Mian Yousaf Kaukab                100 (0.1%)
+   Alexander Graf                    95 (0.1%)
+   Lukas Auer                        90 (0.1%)
+   Baruch Siach                      87 (0.1%)
+   Maxime Jourdan                    85 (0.1%)
+   Patrick Bruenn                    74 (0.1%)
+   Gerard Salvatella                 74 (0.1%)
+   Udit Agarwal                      71 (0.1%)
+   Ezequiel Garcia                   65 (0.1%)
+   Jordan Hand                       65 (0.1%)
+   Álvaro Fernández Rojas            62 (0.1%)
+   Alison Wang                       58 (0.1%)
+   Bernhard Messerklinger            55 (0.1%)
+   Lokesh Vutla                      54 (0.1%)
+   Ye Li                             53 (0.1%)
+   Ismael Luceno Cortes              52 (0.1%)
+   Bin Meng                          44 (0.0%)
+   Angelo Dureghello                 43 (0.0%)
+   Valentin-catalin Neacsu           39 (0.0%)
+   Jernej Skrabec                    37 (0.0%)
+   Xiaowei Bao                       36 (0.0%)
+   Matthias Brugger                  36 (0.0%)
+   Alexey Brodkin                    31 (0.0%)
+   Priit Laes                        31 (0.0%)
+   Ley Foon Tan                      30 (0.0%)
+   Carlo Caione                      29 (0.0%)
+   Eugen Hristev                     28 (0.0%)
+   Jonathan Hunter                   28 (0.0%)
+   Mike Looijmans                    27 (0.0%)
+   Laurentiu Tudor                   26 (0.0%)
+   Florinel Iordache                 25 (0.0%)
+   Max Krummenacher                  24 (0.0%)
+   Shyam Saini                       23 (0.0%)
+   Frank Wunderlich                  23 (0.0%)
+   York Sun                          22 (0.0%)
+   Sam Protsenko                     21 (0.0%)
+   T Karthik Reddy                   20 (0.0%)
+   Felix Brack                       19 (0.0%)
+   Andreas Dannenberg                18 (0.0%)
+   Rick Chen                         15 (0.0%)
+   默默                                15 (0.0%)
+   Stefan Mavrodiev                  15 (0.0%)
+   Shubhrajyoti Datta                15 (0.0%)
+   Aditya Prayoga                    15 (0.0%)
+   Jorge Ramire-Ortiz                14 (0.0%)
+   Marcel Ziswiler                   13 (0.0%)
+   Andrejs Cainikovs                 13 (0.0%)
+   Fabien Parent                     13 (0.0%)
+   Keerthy                           12 (0.0%)
+   Michael Tretter                   12 (0.0%)
+   Christian GMEINER                 12 (0.0%)
+   Luis Araneda                      11 (0.0%)
+   Bin Liu                           11 (0.0%)
+   Ang, Chee Hong                    11 (0.0%)
+   Igor Opaniuk                      9 (0.0%)
+   Joakim Tjernlund                  8 (0.0%)
+   Wen He                            8 (0.0%)
+   Tomasz Gorochowik                 8 (0.0%)
+   Stefan Theil                      7 (0.0%)
+   Sébastien Szymanski               7 (0.0%)
+   Hou Zhiqiang                      6 (0.0%)
+   Soeren Moch                       6 (0.0%)
+   Yunfeng Ding                      5 (0.0%)
+   Jonathan Gray                     5 (0.0%)
+   Patrice Chotard                   5 (0.0%)
+   Kurban Mallachiev                 4 (0.0%)
+   Tristan Bastian                   3 (0.0%)
+   Minkyu Kang                       3 (0.0%)
+   Stephen Warren                    3 (0.0%)
+   Dalon Westergreen                 3 (0.0%)
+   Ioana Ciocoi Radulescu            3 (0.0%)
+   Mario Six                         3 (0.0%)
+   Sean Nyekjær                      3 (0.0%)
+   Quentin Schulz                    3 (0.0%)
+   Vagrant Cascadian                 2 (0.0%)
+   Olaf Mandel                       2 (0.0%)
+   Thomas Petazzoni                  2 (0.0%)
+   Michael Trimarchi                 2 (0.0%)
+   BOUGH CHEN                        2 (0.0%)
+   Sean Nyekjaer                     2 (0.0%)
+   Pramod Kumar                      2 (0.0%)
+   Dinh Nguyen                       2 (0.0%)
+   Gervais, Francois                 2 (0.0%)
+   Vabhav Sharma                     2 (0.0%)
+   Mounika Grace Akula               2 (0.0%)
+   Hauke Mehrtens                    2 (0.0%)
+   Andreas Pretzsch                  2 (0.0%)
+   Thomas RIENOESSL                  2 (0.0%)
+   Sekhar Nori                       2 (0.0%)
+   Chris Spencer                     1 (0.0%)
+   Kever Yang                        1 (0.0%)
+   Prabhakar Kushwaha                1 (0.0%)
+   Anand Moon                        1 (0.0%)
+   Ondrej Jirman                     1 (0.0%)
+   Alexander Dahl                    1 (0.0%)
+   David Rivshin                     1 (0.0%)
+   Julien Béraud                     1 (0.0%)
+   Jan Kiszka                        1 (0.0%)
+   Zhao Qiang                        1 (0.0%)
+   Yinbo Zhu                         1 (0.0%)
+   Venkatesh Yadav Abbarapu          1 (0.0%)
+   Amit Kucheria                     1 (0.0%)
+   Adam Heinrich                     1 (0.0%)
+   Tomas Novotny                     1 (0.0%)
+   Mark Kettenis                     1 (0.0%)
+   Greg Czerniak                     1 (0.0%)
+   Robert P. J. Day                  1 (0.0%)
+   Anton Gerasimov                   1 (0.0%)
+   Luca Ceresoli                     1 (0.0%)
+   Patrick Wildt                     1 (0.0%)
+   Josef Lusticky                    1 (0.0%)
+   Yan Liu                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   David Wu                          4036 (18.1%)
+   Michal Simek                      461 (2.1%)
+   Eugeniy Paltsev                   251 (1.1%)
+   Peter Robinson                    187 (0.8%)
+   Tom Rini                          148 (0.7%)
+   Eugeniu Rosca                     100 (0.4%)
+   Tien Fong Chee                    39 (0.2%)
+   Shubhrajyoti Datta                15 (0.1%)
+   Baruch Siach                      14 (0.1%)
+   Derald D. Woods                   13 (0.1%)
+   Jean-Jacques Hiblot               11 (0.0%)
+   Alexey Brodkin                    10 (0.0%)
+   Keerthy                           10 (0.0%)
+   Eugen Hristev                     9 (0.0%)
+   Daniel Schwierzeck                8 (0.0%)
+   Andreas Dannenberg                8 (0.0%)
+   Lukas Auer                        7 (0.0%)
+   Ang, Chee Hong                    5 (0.0%)
+   Patrice Chotard                   5 (0.0%)
+   Minkyu Kang                       2 (0.0%)
+   Vabhav Sharma                     2 (0.0%)
+   Quentin Schulz                    1 (0.0%)
+   BOUGH CHEN                        1 (0.0%)
+   Hauke Mehrtens                    1 (0.0%)
+   Yinbo Zhu                         1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 252)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    49 (19.4%)
+   Stefan Roese                      29 (11.5%)
+   Michal Simek                      28 (11.1%)
+   Minkyu Kang                       16 (6.3%)
+   Tom Warren                        11 (4.4%)
+   Tom Rini                          9 (3.6%)
+   Marek Vasut                       9 (3.6%)
+   Neil Armstrong                    9 (3.6%)
+   Prabhakar Kushwaha                7 (2.8%)
+   Jagan Teki                        7 (2.8%)
+   Mark Lee                          5 (2.0%)
+   Atish Patra                       5 (2.0%)
+   Pankit Garg                       5 (2.0%)
+   Anup Patel                        5 (2.0%)
+   Sriram Dash                       4 (1.6%)
+   Maxime Jourdan                    4 (1.6%)
+   Otavio Salvador                   3 (1.2%)
+   Andre Przywara                    3 (1.2%)
+   Rajesh Bhagat                     3 (1.2%)
+   Wasim Khan                        2 (0.8%)
+   Wolfram Sang                      2 (0.8%)
+   Ruchika Gupta                     2 (0.8%)
+   Bin Meng                          2 (0.8%)
+   Matthias Brugger                  2 (0.8%)
+   Jorge Ramire-Ortiz                2 (0.8%)
+   Peng Ma                           2 (0.8%)
+   Alexey Brodkin                    1 (0.4%)
+   Vabhav Sharma                     1 (0.4%)
+   Yinbo Zhu                         1 (0.4%)
+   Shengzhou Liu                     1 (0.4%)
+   Paul Walmsley                     1 (0.4%)
+   Philippe Schenker                 1 (0.4%)
+   Yogesh Gaur                       1 (0.4%)
+   Chuanhua Han                      1 (0.4%)
+   Udit Kumar                        1 (0.4%)
+   Olof Johansson                    1 (0.4%)
+   Rob Clark                         1 (0.4%)
+   Lionel Debieve                    1 (0.4%)
+   Kevin Hilman                      1 (0.4%)
+   Nitin Garg                        1 (0.4%)
+   Wojciech Tatarski                 1 (0.4%)
+   Ryder Lee                         1 (0.4%)
+   Michael Trimarchi                 1 (0.4%)
+   Marcel Ziswiler                   1 (0.4%)
+   Álvaro Fernández Rojas            1 (0.4%)
+   Stefan Agner                      1 (0.4%)
+   Udit Agarwal                      1 (0.4%)
+   Meenakshi Aggarwal                1 (0.4%)
+   Siva Durga Prasad Paladugu        1 (0.4%)
+   Heinrich Schuchardt               1 (0.4%)
+   Vignesh R                         1 (0.4%)
+   AKASHI Takahiro                   1 (0.4%)
+   Simon Glass                       1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 616)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       87 (14.1%)
+   Bin Meng                          58 (9.4%)
+   Tom Rini                          42 (6.8%)
+   Philipp Tomsich                   42 (6.8%)
+   Prabhakar Kushwaha                41 (6.7%)
+   Jagan Teki                        34 (5.5%)
+   Lukasz Majewski                   27 (4.4%)
+   Heiko Schocher                    25 (4.1%)
+   Stefan Roese                      23 (3.7%)
+   Fabio Estevam                     23 (3.7%)
+   York Sun                          21 (3.4%)
+   Peng Fan                          20 (3.2%)
+   Alexander Graf                    17 (2.8%)
+   Daniel Schwierzeck                16 (2.6%)
+   Heinrich Schuchardt               15 (2.4%)
+   Anatolij Gustschin                15 (2.4%)
+   Andre Przywara                    13 (2.1%)
+   Kever Yang                        13 (2.1%)
+   Lukas Auer                        10 (1.6%)
+   Lokesh Vutla                      10 (1.6%)
+   Marek Vasut                       9 (1.5%)
+   Andy Shevchenko                   6 (1.0%)
+   Simon Goldschmidt                 6 (1.0%)
+   Minkyu Kang                       5 (0.8%)
+   Stefano Babic                     3 (0.5%)
+   Horia Geanta                      3 (0.5%)
+   Bharat Bhushan                    3 (0.5%)
+   Otavio Salvador                   2 (0.3%)
+   Stefan Agner                      2 (0.3%)
+   Ashish Kumar                      2 (0.3%)
+   Utkarsh Gupta                     2 (0.3%)
+   Miquel Raynal                     2 (0.3%)
+   Stephen Warren                    2 (0.3%)
+   Ye Li                             2 (0.3%)
+   Masahiro Yamada                   2 (0.3%)
+   Bryan O'Donoghue                  2 (0.3%)
+   Chris Packham                     2 (0.3%)
+   Michal Simek                      1 (0.2%)
+   Matthias Brugger                  1 (0.2%)
+   Marcel Ziswiler                   1 (0.2%)
+   AKASHI Takahiro                   1 (0.2%)
+   Mario Six                         1 (0.2%)
+   Dinh Nguyen                       1 (0.2%)
+   Fugang Duan                       1 (0.2%)
+   Christian Gmeiner                 1 (0.2%)
+   Liviu Dudau                       1 (0.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 111)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagan Teki                        17 (15.3%)
+   Stefan Roese                      13 (11.7%)
+   Simon Goldschmidt                 13 (11.7%)
+   Horatiu Vultur                    12 (10.8%)
+   Anand Moon                        9 (8.1%)
+   Bin Meng                          5 (4.5%)
+   Fabio Estevam                     4 (3.6%)
+   Simon Glass                       3 (2.7%)
+   Michal Simek                      3 (2.7%)
+   Heinrich Schuchardt               2 (1.8%)
+   Vignesh R                         2 (1.8%)
+   Derald D. Woods                   2 (1.8%)
+   Jörg Krause                       2 (1.8%)
+   Ezequiel Garcia                   2 (1.8%)
+   Shyam Saini                       2 (1.8%)
+   Tim Harvey                        2 (1.8%)
+   Lukasz Majewski                   1 (0.9%)
+   Daniel Schwierzeck                1 (0.9%)
+   Stephen Warren                    1 (0.9%)
+   Mario Six                         1 (0.9%)
+   Vagrant Cascadian                 1 (0.9%)
+   Fabio Berton                      1 (0.9%)
+   Leigh Brown                       1 (0.9%)
+   Marcelo Macedo                    1 (0.9%)
+   Martin Fuzzey                     1 (0.9%)
+   Ferry Toth                        1 (0.9%)
+   Vasily Khoruzhick                 1 (0.9%)
+   Dennis Gilmore                    1 (0.9%)
+   Chris Spencer                     1 (0.9%)
+   Andrejs Cainikovs                 1 (0.9%)
+   Stefan Mavrodiev                  1 (0.9%)
+   Frank Wunderlich                  1 (0.9%)
+   Breno Matheus Lima                1 (0.9%)
+   Adam Ford                         1 (0.9%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 111)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Vignesh R                         55 (49.5%)
+   Krzysztof Kozlowski               9 (8.1%)
+   Adam Ford                         6 (5.4%)
+   Fabio Estevam                     4 (3.6%)
+   Lukas Auer                        4 (3.6%)
+   Jagan Teki                        3 (2.7%)
+   Simon Goldschmidt                 3 (2.7%)
+   Tom Rini                          3 (2.7%)
+   Baruch Siach                      3 (2.7%)
+   Daniel Schwierzeck                2 (1.8%)
+   David Wu                          2 (1.8%)
+   Jean-Jacques Hiblot               2 (1.8%)
+   Hannes Schmelzer                  2 (1.8%)
+   Abel Vesa                         2 (1.8%)
+   Stefan Roese                      1 (0.9%)
+   Bin Meng                          1 (0.9%)
+   Simon Glass                       1 (0.9%)
+   Alexander Graf                    1 (0.9%)
+   Andy Shevchenko                   1 (0.9%)
+   Chris Packham                     1 (0.9%)
+   Michael Trimarchi                 1 (0.9%)
+   Joakim Tjernlund                  1 (0.9%)
+   Aditya Prayoga                    1 (0.9%)
+   Martyn Welch                      1 (0.9%)
+   Weijie Gao                        1 (0.9%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    3 (14.3%)
+   Leigh Brown                       2 (9.5%)
+   Lukas Auer                        1 (4.8%)
+   Michal Simek                      1 (4.8%)
+   Heinrich Schuchardt               1 (4.8%)
+   Stephen Warren                    1 (4.8%)
+   Vagrant Cascadian                 1 (4.8%)
+   Frank Wunderlich                  1 (4.8%)
+   Breno Matheus Lima                1 (4.8%)
+   Kever Yang                        1 (4.8%)
+   Otavio Salvador                   1 (4.8%)
+   Siva Durga Prasad Paladugu        1 (4.8%)
+   Pablo Sebastián Greco             1 (4.8%)
+   Влад Мао                          1 (4.8%)
+   Ofer Heifetz                      1 (4.8%)
+   Sven Auhagen                      1 (4.8%)
+   Daniel Evans                      1 (4.8%)
+   Richard Purdie                    1 (4.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 21)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Alexander Graf                    3 (14.3%)
+   Chris Packham                     3 (14.3%)
+   Heinrich Schuchardt               2 (9.5%)
+   Fabio Estevam                     2 (9.5%)
+   Simon Goldschmidt                 2 (9.5%)
+   Baruch Siach                      2 (9.5%)
+   Masahiro Yamada                   2 (9.5%)
+   Jagan Teki                        1 (4.8%)
+   Bin Meng                          1 (4.8%)
+   Martyn Welch                      1 (4.8%)
+   Derald D. Woods                   1 (4.8%)
+   Bryan O'Donoghue                  1 (4.8%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         477 (40.0%)
+   NXP                               107 (9.0%)
+   Google, Inc.                      90 (7.5%)
+   DENX Software Engineering         82 (6.9%)
+   AMD                               64 (5.4%)
+   Texas Instruments                 60 (5.0%)
+   Amarula Solutions                 49 (4.1%)
+   Linaro                            40 (3.4%)
+   Pepperl+Fuchs                     32 (2.7%)
+   Intel                             20 (1.7%)
+   ST Microelectronics               19 (1.6%)
+   BayLibre SAS                      18 (1.5%)
+   Konsulko Group                    18 (1.5%)
+   Toradex                           18 (1.5%)
+   Xilinx                            18 (1.5%)
+   Collabora Ltd.                    16 (1.3%)
+   SUSE                              15 (1.3%)
+   Rockchip                          11 (0.9%)
+   Renesas Electronics               9 (0.8%)
+   Socionext Inc.                    8 (0.7%)
+   ARM                               6 (0.5%)
+   Bootlin                           6 (0.5%)
+   NVidia                            3 (0.3%)
+   Debian.org                        2 (0.2%)
+   Samsung                           2 (0.2%)
+   Guntermann & Drunck               1 (0.1%)
+   Pengutronix                       1 (0.1%)
+   Siemens                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         24100 (26.9%)
+   Google, Inc.                      10585 (11.8%)
+   NXP                               9333 (10.4%)
+   Rockchip                          9173 (10.2%)
+   Texas Instruments                 7505 (8.4%)
+   Linaro                            6275 (7.0%)
+   BayLibre SAS                      5704 (6.4%)
+   Amarula Solutions                 4081 (4.6%)
+   DENX Software Engineering         2969 (3.3%)
+   Collabora Ltd.                    1891 (2.1%)
+   AMD                               1438 (1.6%)
+   Pepperl+Fuchs                     1408 (1.6%)
+   ST Microelectronics               1342 (1.5%)
+   Bootlin                           921 (1.0%)
+   Xilinx                            816 (0.9%)
+   Konsulko Group                    479 (0.5%)
+   Intel                             473 (0.5%)
+   Toradex                           432 (0.5%)
+   Socionext Inc.                    158 (0.2%)
+   SUSE                              136 (0.2%)
+   ARM                               132 (0.1%)
+   Renesas Electronics               122 (0.1%)
+   NVidia                            31 (0.0%)
+   Pengutronix                       12 (0.0%)
+   Samsung                           3 (0.0%)
+   Guntermann & Drunck               3 (0.0%)
+   Debian.org                        2 (0.0%)
+   Siemens                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 252)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   SUSE                              51 (20.2%)
+   (Unknown)                         35 (13.9%)
+   NXP                               34 (13.5%)
+   DENX Software Engineering         29 (11.5%)
+   Xilinx                            29 (11.5%)
+   BayLibre SAS                      16 (6.3%)
+   Samsung                           16 (6.3%)
+   NVidia                            11 (4.4%)
+   Konsulko Group                    9 (3.6%)
+   Amarula Solutions                 8 (3.2%)
+   Toradex                           3 (1.2%)
+   ARM                               3 (1.2%)
+   O.S. Systems                      3 (1.2%)
+   Google, Inc.                      1 (0.4%)
+   Texas Instruments                 1 (0.4%)
+   Linaro                            1 (0.4%)
+   ST Microelectronics               1 (0.4%)
+   IBM                               1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 183)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         86 (47.0%)
+   NXP                               27 (14.8%)
+   Texas Instruments                 10 (5.5%)
+   Linaro                            7 (3.8%)
+   BayLibre SAS                      6 (3.3%)
+   Xilinx                            5 (2.7%)
+   Intel                             5 (2.7%)
+   DENX Software Engineering         4 (2.2%)
+   Toradex                           4 (2.2%)
+   Amarula Solutions                 3 (1.6%)
+   Collabora Ltd.                    3 (1.6%)
+   Bootlin                           3 (1.6%)
+   SUSE                              2 (1.1%)
+   NVidia                            2 (1.1%)
+   ST Microelectronics               2 (1.1%)
+   Rockchip                          2 (1.1%)
+   Samsung                           1 (0.5%)
+   Konsulko Group                    1 (0.5%)
+   ARM                               1 (0.5%)
+   Google, Inc.                      1 (0.5%)
+   AMD                               1 (0.5%)
+   Pepperl+Fuchs                     1 (0.5%)
+   Socionext Inc.                    1 (0.5%)
+   Renesas Electronics               1 (0.5%)
+   Pengutronix                       1 (0.5%)
+   Guntermann & Drunck               1 (0.5%)
+   Debian.org                        1 (0.5%)
+   Siemens                           1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2019.07.rst b/doc/develop/statistics/u-boot-stats-v2019.07.rst
new file mode 100644
index 00000000000..eb2ff5ffc07
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2019.07.rst
@@ -0,0 +1,944 @@
+:orphan:
+
+Release Statistics for U-Boot v2019.07
+======================================
+
+* Processed 2047 changesets from 215 developers
+
+* 29 employers found
+
+* A total of 169802 lines added, 64752 removed (delta 105050)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heinrich Schuchardt               166 (8.1%)
+   Marek Vasut                       138 (6.7%)
+   Mario Six                         103 (5.0%)
+   Patrick Delaunay                  90 (4.4%)
+   Simon Glass                       74 (3.6%)
+   Jagan Teki                        69 (3.4%)
+   Marcel Ziswiler                   69 (3.4%)
+   Patrice Chotard                   60 (2.9%)
+   Kever Yang                        52 (2.5%)
+   Stefan Roese                      49 (2.4%)
+   Thierry Reding                    49 (2.4%)
+   Philippe Reynes                   43 (2.1%)
+   Lukasz Majewski                   42 (2.1%)
+   Simon Goldschmidt                 40 (2.0%)
+   AKASHI Takahiro                   31 (1.5%)
+   Chris Packham                     29 (1.4%)
+   Neil Armstrong                    26 (1.3%)
+   Peng Fan                          26 (1.3%)
+   Igor Opaniuk                      23 (1.1%)
+   Adam Ford                         23 (1.1%)
+   Marek Behún                       23 (1.1%)
+   Horatiu Vultur                    23 (1.1%)
+   Anatolij Gustschin                22 (1.1%)
+   Tom Rini                          21 (1.0%)
+   Fabio Estevam                     20 (1.0%)
+   Faiz Abbas                        18 (0.9%)
+   Hou Zhiqiang                      16 (0.8%)
+   Bartosz Golaszewski               16 (0.8%)
+   Eugeniu Rosca                     16 (0.8%)
+   Tien Fong Chee                    15 (0.7%)
+   Ley Foon Tan                      14 (0.7%)
+   Stefan Agner                      14 (0.7%)
+   Angelo Dureghello                 13 (0.6%)
+   Jean-Jacques Hiblot               12 (0.6%)
+   Lukas Auer                        12 (0.6%)
+   Rick Chen                         12 (0.6%)
+   Heiko Schocher                    11 (0.5%)
+   Philipp Tomsich                   11 (0.5%)
+   Max Krummenacher                  11 (0.5%)
+   Bin Meng                          10 (0.5%)
+   Michal Simek                      10 (0.5%)
+   David Wu                          10 (0.5%)
+   Baruch Siach                      10 (0.5%)
+   Andre Przywara                    10 (0.5%)
+   Soeren Moch                       10 (0.5%)
+   Ian Ray                           10 (0.5%)
+   Masahiro Yamada                   9 (0.4%)
+   Yinbo Zhu                         9 (0.4%)
+   Peng Ma                           9 (0.4%)
+   Hannes Schmelzer                  9 (0.4%)
+   Andrew F. Davis                   9 (0.4%)
+   Siva Durga Prasad Paladugu        9 (0.4%)
+   Murali Karicheri                  9 (0.4%)
+   Sjoerd Simons                     8 (0.4%)
+   Eugen Hristev                     8 (0.4%)
+   Jun Nie                           8 (0.4%)
+   Fabien Parent                     8 (0.4%)
+   Lokesh Vutla                      8 (0.4%)
+   Trent Piepho                      7 (0.3%)
+   Christoph Muellner                7 (0.3%)
+   Vignesh Raghavendra               7 (0.3%)
+   Shawn Guo                         6 (0.3%)
+   Andy Shevchenko                   6 (0.3%)
+   Alex Kiernan                      6 (0.3%)
+   Steffen Dirkwinkel                6 (0.3%)
+   Vagrant Cascadian                 6 (0.3%)
+   Brad Griffis                      6 (0.3%)
+   Dinh Nguyen                       6 (0.3%)
+   Pierre Bourdon                    6 (0.3%)
+   Michael Walle                     6 (0.3%)
+   Rosy Song                         6 (0.3%)
+   Weijie Gao                        5 (0.2%)
+   Ye Li                             5 (0.2%)
+   Mohammad Rasim                    5 (0.2%)
+   Guillaume La Roque                5 (0.2%)
+   Christophe Roullier               5 (0.2%)
+   Grygorii Strashko                 5 (0.2%)
+   Trevor Woerner                    5 (0.2%)
+   Andreas Dannenberg                5 (0.2%)
+   Joris Offouga                     5 (0.2%)
+   Gerard Salvatella                 5 (0.2%)
+   Jerome Brunet                     5 (0.2%)
+   Pierre-Jean Texier                4 (0.2%)
+   Breno Matheus Lima                4 (0.2%)
+   Mian Yousaf Kaukab                4 (0.2%)
+   Yuantian Tang                     4 (0.2%)
+   Christian Gmeiner                 4 (0.2%)
+   Christophe Kerello                4 (0.2%)
+   Carlo Caione                      4 (0.2%)
+   Ang, Chee Hong                    4 (0.2%)
+   Ismael Luceno Cortes              4 (0.2%)
+   Luca Ceresoli                     4 (0.2%)
+   Bhuvanchandra DV                  4 (0.2%)
+   Claudiu Beznea                    4 (0.2%)
+   Matwey V. Kornilov                3 (0.1%)
+   Pankit Garg                       3 (0.1%)
+   Wasim Khan                        3 (0.1%)
+   Maciej Pijanowski                 3 (0.1%)
+   Sam Protsenko                     3 (0.1%)
+   Parthiban Nallathambi             3 (0.1%)
+   Manivannan Sadhasivam             3 (0.1%)
+   Qiang Zhao                        3 (0.1%)
+   Clément Péron                     3 (0.1%)
+   Ibai Erkiaga                      3 (0.1%)
+   Krzysztof Kozlowski               3 (0.1%)
+   James Byrne                       3 (0.1%)
+   Robert P. J. Day                  3 (0.1%)
+   Paul Kocialkowski                 3 (0.1%)
+   Gregory CLEMENT                   3 (0.1%)
+   Eugeniy Paltsev                   3 (0.1%)
+   Mark Kettenis                     2 (0.1%)
+   Frieder Schrempf                  2 (0.1%)
+   Stephen Warren                    2 (0.1%)
+   Udit Agarwal                      2 (0.1%)
+   Alex Marginean                    2 (0.1%)
+   Ashish Kumar                      2 (0.1%)
+   Yangbo Lu                         2 (0.1%)
+   Pankaj Bansal                     2 (0.1%)
+   Ramon Fried                       2 (0.1%)
+   Maxime Jourdan                    2 (0.1%)
+   Christoph Fritz                   2 (0.1%)
+   Stefano Babic                     2 (0.1%)
+   Sébastien Szymanski               2 (0.1%)
+   Sekhar Nori                       2 (0.1%)
+   Nicolas Le Bayon                  2 (0.1%)
+   Rajat Srivastava                  2 (0.1%)
+   Keerthy                           2 (0.1%)
+   Stefan Mavrodiev                  2 (0.1%)
+   Dirk Eibach                       2 (0.1%)
+   Jonas Smedegaard                  2 (0.1%)
+   Leo Ruan                          2 (0.1%)
+   Fabrice Fontaine                  2 (0.1%)
+   David Abdurachmanov               2 (0.1%)
+   Chen-Yu Tsai                      2 (0.1%)
+   Chris Brandt                      2 (0.1%)
+   Peter Ujfalusi                    2 (0.1%)
+   Urja Rannikko                     2 (0.1%)
+   Miquel Raynal                     2 (0.1%)
+   Ludwig Zenz                       2 (0.1%)
+   Razvan Stefanescu                 2 (0.1%)
+   T Karthik Reddy                   2 (0.1%)
+   Sanchayan Maity                   2 (0.1%)
+   Joonas Aijala                     2 (0.1%)
+   Franklin S Cooper Jr              2 (0.1%)
+   Eran Matityahu                    2 (0.1%)
+   Marc Dietrich                     1 (0.0%)
+   Andy Yan                          1 (0.0%)
+   Kunihiko Hayashi                  1 (0.0%)
+   Philippe Schenker                 1 (0.0%)
+   Felix Brack                       1 (0.0%)
+   Joshua Watt                       1 (0.0%)
+   Prabhakar Kushwaha                1 (0.0%)
+   Robert Hancock                    1 (0.0%)
+   Moses Christopher                 1 (0.0%)
+   Oleksandr Zhadan                  1 (0.0%)
+   Patrick Doyle                     1 (0.0%)
+   Shannon Barber                    1 (0.0%)
+   Joel Stanley                      1 (0.0%)
+   Vabhav Sharma                     1 (0.0%)
+   Meenakshi Aggarwal                1 (0.0%)
+   Xiaowei Bao                       1 (0.0%)
+   Ran Wang                          1 (0.0%)
+   Berkus Decker                     1 (0.0%)
+   akaher                            1 (0.0%)
+   Ezequiel Garcia                   1 (0.0%)
+   Matti Vaittinen                   1 (0.0%)
+   Holger Brunck                     1 (0.0%)
+   David Lechner                     1 (0.0%)
+   Padmarao Begari                   1 (0.0%)
+   Karsten Merker                    1 (0.0%)
+   Dennis Gilmore                    1 (0.0%)
+   Vladimir Oltean                   1 (0.0%)
+   Thomas Fitzsimmons                1 (0.0%)
+   Tudor Ambarus                     1 (0.0%)
+   Vinitha V Pillai                  1 (0.0%)
+   Florin Chiculita                  1 (0.0%)
+   Chuanhua Han                      1 (0.0%)
+   Kuldeep Singh                     1 (0.0%)
+   Emmanuel Vadot                    1 (0.0%)
+   Tomas Melin                       1 (0.0%)
+   Alex Deymo                        1 (0.0%)
+   Luca Boccassi                     1 (0.0%)
+   Wolfgang Grandegger               1 (0.0%)
+   Atish Patra                       1 (0.0%)
+   Anup Patel                        1 (0.0%)
+   Luka Kovacic                      1 (0.0%)
+   Valentin-catalin Neacsu           1 (0.0%)
+   Philip Molloy                     1 (0.0%)
+   Paul Barker                       1 (0.0%)
+   Young Xiao                        1 (0.0%)
+   Björn Stenberg                    1 (0.0%)
+   Filip Brozovic                    1 (0.0%)
+   Lars Povlsen                      1 (0.0%)
+   Boris Brezillon                   1 (0.0%)
+   Marc Gonzalez                     1 (0.0%)
+   Brian Norris                      1 (0.0%)
+   Fabrice Gasnier                   1 (0.0%)
+   Ondrej Jirman                     1 (0.0%)
+   Uri Mashiach                      1 (0.0%)
+   Dominik Sliwa                     1 (0.0%)
+   Ilias Apalodimas                  1 (0.0%)
+   Patrick Wildt                     1 (0.0%)
+   Álvaro Fernández Rojas            1 (0.0%)
+   Martyn Welch                      1 (0.0%)
+   Jared Bents                       1 (0.0%)
+   Bernhard Messerklinger            1 (0.0%)
+   Leigh Brown                       1 (0.0%)
+   Jordan Hand                       1 (0.0%)
+   Julien Masson                     1 (0.0%)
+   Michael Trimarchi                 1 (0.0%)
+   Benjamin Lim                      1 (0.0%)
+   Anssi Hannula                     1 (0.0%)
+   Gero Schumacher                   1 (0.0%)
+   Ilko Iliev                        1 (0.0%)
+   Alexander Dahl                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Mario Six                         29373 (14.4%)
+   Marek Vasut                       28712 (14.1%)
+   Marek Behún                       8774 (4.3%)
+   Bartosz Golaszewski               8476 (4.2%)
+   Patrick Delaunay                  7620 (3.7%)
+   Patrice Chotard                   7290 (3.6%)
+   Heinrich Schuchardt               7036 (3.5%)
+   Jagan Teki                        6832 (3.4%)
+   Marcel Ziswiler                   5887 (2.9%)
+   Peng Fan                          4631 (2.3%)
+   Horatiu Vultur                    4529 (2.2%)
+   Tom Rini                          4492 (2.2%)
+   Philippe Reynes                   4413 (2.2%)
+   Grygorii Strashko                 4063 (2.0%)
+   Simon Glass                       4046 (2.0%)
+   Neil Armstrong                    3705 (1.8%)
+   Angelo Dureghello                 2716 (1.3%)
+   Vignesh Raghavendra               2321 (1.1%)
+   Chris Packham                     2317 (1.1%)
+   Jerome Brunet                     2192 (1.1%)
+   Hou Zhiqiang                      2090 (1.0%)
+   Thierry Reding                    2002 (1.0%)
+   Rosy Song                         1984 (1.0%)
+   Yuantian Tang                     1935 (1.0%)
+   Kever Yang                        1789 (0.9%)
+   Fabien Parent                     1784 (0.9%)
+   Uri Mashiach                      1685 (0.8%)
+   Stefan Roese                      1660 (0.8%)
+   Wolfgang Grandegger               1632 (0.8%)
+   Lukasz Majewski                   1631 (0.8%)
+   Christophe Kerello                1601 (0.8%)
+   Parthiban Nallathambi             1427 (0.7%)
+   Chris Brandt                      1384 (0.7%)
+   Simon Goldschmidt                 1374 (0.7%)
+   Peng Ma                           1170 (0.6%)
+   Sjoerd Simons                     1161 (0.6%)
+   David Wu                          955 (0.5%)
+   Igor Opaniuk                      924 (0.5%)
+   Boris Brezillon                   883 (0.4%)
+   Joris Offouga                     852 (0.4%)
+   AKASHI Takahiro                   822 (0.4%)
+   Anatolij Gustschin                796 (0.4%)
+   Tien Fong Chee                    769 (0.4%)
+   Shawn Guo                         740 (0.4%)
+   Mohammad Rasim                    735 (0.4%)
+   Andrew F. Davis                   732 (0.4%)
+   Vabhav Sharma                     730 (0.4%)
+   Faiz Abbas                        675 (0.3%)
+   Adam Ford                         669 (0.3%)
+   Soeren Moch                       655 (0.3%)
+   Manivannan Sadhasivam             639 (0.3%)
+   Eugen Hristev                     569 (0.3%)
+   Dirk Eibach                       566 (0.3%)
+   Lukas Auer                        510 (0.3%)
+   Lokesh Vutla                      503 (0.2%)
+   Fabio Estevam                     487 (0.2%)
+   Christophe Roullier               481 (0.2%)
+   Hannes Schmelzer                  479 (0.2%)
+   Jean-Jacques Hiblot               474 (0.2%)
+   Matwey V. Kornilov                455 (0.2%)
+   Ley Foon Tan                      453 (0.2%)
+   Rick Chen                         433 (0.2%)
+   Oleksandr Zhadan                  379 (0.2%)
+   Vagrant Cascadian                 373 (0.2%)
+   Luka Kovacic                      364 (0.2%)
+   Dinh Nguyen                       356 (0.2%)
+   Trevor Woerner                    346 (0.2%)
+   Jonas Smedegaard                  342 (0.2%)
+   Ian Ray                           333 (0.2%)
+   Eugeniy Paltsev                   315 (0.2%)
+   Heiko Schocher                    300 (0.1%)
+   Gerard Salvatella                 292 (0.1%)
+   Guillaume La Roque                291 (0.1%)
+   Steffen Dirkwinkel                271 (0.1%)
+   Masahiro Yamada                   264 (0.1%)
+   Alex Deymo                        246 (0.1%)
+   Carlo Caione                      234 (0.1%)
+   Clément Péron                     215 (0.1%)
+   Michael Walle                     214 (0.1%)
+   Jun Nie                           213 (0.1%)
+   Bin Meng                          193 (0.1%)
+   Julien Masson                     176 (0.1%)
+   Philipp Tomsich                   173 (0.1%)
+   Stephen Warren                    165 (0.1%)
+   Christoph Muellner                163 (0.1%)
+   Matti Vaittinen                   159 (0.1%)
+   Stefan Agner                      154 (0.1%)
+   Andre Przywara                    153 (0.1%)
+   Qiang Zhao                        147 (0.1%)
+   Padmarao Begari                   145 (0.1%)
+   Ye Li                             141 (0.1%)
+   Murali Karicheri                  135 (0.1%)
+   Ilko Iliev                        135 (0.1%)
+   James Byrne                       132 (0.1%)
+   Eugeniu Rosca                     130 (0.1%)
+   Trent Piepho                      126 (0.1%)
+   Pierre Bourdon                    124 (0.1%)
+   Alex Kiernan                      114 (0.1%)
+   Max Krummenacher                  111 (0.1%)
+   Franklin S Cooper Jr              100 (0.0%)
+   Baruch Siach                      98 (0.0%)
+   Michal Simek                      88 (0.0%)
+   Thomas Fitzsimmons                84 (0.0%)
+   Claudiu Beznea                    83 (0.0%)
+   Ang, Chee Hong                    82 (0.0%)
+   Kunihiko Hayashi                  76 (0.0%)
+   Andy Shevchenko                   75 (0.0%)
+   Yinbo Zhu                         68 (0.0%)
+   Frieder Schrempf                  64 (0.0%)
+   Atish Patra                       63 (0.0%)
+   Weijie Gao                        61 (0.0%)
+   Brad Griffis                      59 (0.0%)
+   Sam Protsenko                     53 (0.0%)
+   Andreas Dannenberg                51 (0.0%)
+   Wasim Khan                        50 (0.0%)
+   Ismael Luceno Cortes              49 (0.0%)
+   Leo Ruan                          48 (0.0%)
+   Bhuvanchandra DV                  44 (0.0%)
+   Paul Kocialkowski                 44 (0.0%)
+   Razvan Stefanescu                 39 (0.0%)
+   Ashish Kumar                      38 (0.0%)
+   Ludwig Zenz                       38 (0.0%)
+   Peter Ujfalusi                    36 (0.0%)
+   Mark Kettenis                     35 (0.0%)
+   Anssi Hannula                     34 (0.0%)
+   Yangbo Lu                         33 (0.0%)
+   Stefan Mavrodiev                  33 (0.0%)
+   Siva Durga Prasad Paladugu        31 (0.0%)
+   Pankaj Bansal                     31 (0.0%)
+   akaher                            31 (0.0%)
+   Maxime Jourdan                    29 (0.0%)
+   Joonas Aijala                     29 (0.0%)
+   Breno Matheus Lima                27 (0.0%)
+   Christian Gmeiner                 27 (0.0%)
+   Dominik Sliwa                     26 (0.0%)
+   Jared Bents                       26 (0.0%)
+   Keerthy                           25 (0.0%)
+   Xiaowei Bao                       25 (0.0%)
+   Meenakshi Aggarwal                22 (0.0%)
+   Shannon Barber                    21 (0.0%)
+   Robert P. J. Day                  20 (0.0%)
+   Kuldeep Singh                     20 (0.0%)
+   Alex Marginean                    19 (0.0%)
+   Rajat Srivastava                  18 (0.0%)
+   T Karthik Reddy                   18 (0.0%)
+   Luca Boccassi                     18 (0.0%)
+   Luca Ceresoli                     17 (0.0%)
+   Pankit Garg                       17 (0.0%)
+   Fabrice Gasnier                   17 (0.0%)
+   Pierre-Jean Texier                16 (0.0%)
+   Ibai Erkiaga                      15 (0.0%)
+   Urja Rannikko                     15 (0.0%)
+   Joshua Watt                       15 (0.0%)
+   Vinitha V Pillai                  15 (0.0%)
+   Jordan Hand                       15 (0.0%)
+   Benjamin Lim                      15 (0.0%)
+   Mian Yousaf Kaukab                14 (0.0%)
+   Ondrej Jirman                     14 (0.0%)
+   Eran Matityahu                    13 (0.0%)
+   Gregory CLEMENT                   12 (0.0%)
+   Brian Norris                      12 (0.0%)
+   Krzysztof Kozlowski               10 (0.0%)
+   Udit Agarwal                      10 (0.0%)
+   David Abdurachmanov               10 (0.0%)
+   Philippe Schenker                 10 (0.0%)
+   Florin Chiculita                  9 (0.0%)
+   Christoph Fritz                   8 (0.0%)
+   Stefano Babic                     8 (0.0%)
+   Fabrice Fontaine                  7 (0.0%)
+   Ran Wang                          7 (0.0%)
+   Vladimir Oltean                   7 (0.0%)
+   Lars Povlsen                      7 (0.0%)
+   Marc Gonzalez                     7 (0.0%)
+   Maciej Pijanowski                 6 (0.0%)
+   Sekhar Nori                       6 (0.0%)
+   Sanchayan Maity                   6 (0.0%)
+   Prabhakar Kushwaha                6 (0.0%)
+   Joel Stanley                      6 (0.0%)
+   Valentin-catalin Neacsu           6 (0.0%)
+   Álvaro Fernández Rojas            6 (0.0%)
+   Gero Schumacher                   6 (0.0%)
+   Sébastien Szymanski               5 (0.0%)
+   Nicolas Le Bayon                  5 (0.0%)
+   Chen-Yu Tsai                      5 (0.0%)
+   Alexander Dahl                    5 (0.0%)
+   Miquel Raynal                     4 (0.0%)
+   Robert Hancock                    4 (0.0%)
+   Ezequiel Garcia                   4 (0.0%)
+   Dennis Gilmore                    4 (0.0%)
+   Tomas Melin                       4 (0.0%)
+   Ramon Fried                       3 (0.0%)
+   Marc Dietrich                     3 (0.0%)
+   Holger Brunck                     3 (0.0%)
+   Moses Christopher                 2 (0.0%)
+   Tudor Ambarus                     2 (0.0%)
+   Emmanuel Vadot                    2 (0.0%)
+   Anup Patel                        2 (0.0%)
+   Filip Brozovic                    2 (0.0%)
+   Ilias Apalodimas                  2 (0.0%)
+   Andy Yan                          1 (0.0%)
+   Felix Brack                       1 (0.0%)
+   Patrick Doyle                     1 (0.0%)
+   Berkus Decker                     1 (0.0%)
+   David Lechner                     1 (0.0%)
+   Karsten Merker                    1 (0.0%)
+   Chuanhua Han                      1 (0.0%)
+   Philip Molloy                     1 (0.0%)
+   Paul Barker                       1 (0.0%)
+   Young Xiao                        1 (0.0%)
+   Björn Stenberg                    1 (0.0%)
+   Patrick Wildt                     1 (0.0%)
+   Martyn Welch                      1 (0.0%)
+   Bernhard Messerklinger            1 (0.0%)
+   Leigh Brown                       1 (0.0%)
+   Michael Trimarchi                 1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bartosz Golaszewski               8441 (13.0%)
+   Uri Mashiach                      1685 (2.6%)
+   Tom Rini                          704 (1.1%)
+   Michal Simek                      39 (0.1%)
+   Paul Kocialkowski                 29 (0.0%)
+   Thomas Fitzsimmons                26 (0.0%)
+   Mark Kettenis                     26 (0.0%)
+   Weijie Gao                        25 (0.0%)
+   Christoph Muellner                20 (0.0%)
+   Robert P. J. Day                  20 (0.0%)
+   Eugeniu Rosca                     19 (0.0%)
+   Alex Kiernan                      19 (0.0%)
+   Ismael Luceno Cortes              16 (0.0%)
+   Andreas Dannenberg                14 (0.0%)
+   Meenakshi Aggarwal                14 (0.0%)
+   Breno Matheus Lima                11 (0.0%)
+   Christian Gmeiner                 10 (0.0%)
+   Urja Rannikko                     9 (0.0%)
+   Krzysztof Kozlowski               9 (0.0%)
+   Udit Agarwal                      7 (0.0%)
+   Mian Yousaf Kaukab                5 (0.0%)
+   Peter Ujfalusi                    3 (0.0%)
+   Ian Ray                           2 (0.0%)
+   Ezequiel Garcia                   2 (0.0%)
+   Lars Povlsen                      1 (0.0%)
+   Sekhar Nori                       1 (0.0%)
+   Sébastien Szymanski               1 (0.0%)
+   Robert Hancock                    1 (0.0%)
+   Paul Barker                       1 (0.0%)
+   Leigh Brown                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 305)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      60 (19.7%)
+   Tom Warren                        33 (10.8%)
+   Neil Armstrong                    17 (5.6%)
+   Michal Simek                      16 (5.2%)
+   Kever Yang                        12 (3.9%)
+   Tom Rini                          11 (3.6%)
+   Patrick Delaunay                  10 (3.3%)
+   Patrice Chotard                   9 (3.0%)
+   Heinrich Schuchardt               7 (2.3%)
+   Keerthy                           6 (2.0%)
+   Vignesh Raghavendra               6 (2.0%)
+   Jagan Teki                        5 (1.6%)
+   Rajesh Bhagat                     4 (1.3%)
+   Matthias Brugger                  4 (1.3%)
+   Prabhakar Kushwaha                4 (1.3%)
+   Siva Durga Prasad Paladugu        4 (1.3%)
+   Sudhanshu Gupta                   3 (1.0%)
+   Rai Harninder                     3 (1.0%)
+   Bhaskar Upadhaya                  3 (1.0%)
+   Minkyu Kang                       3 (1.0%)
+   Alexey Brodkin                    3 (1.0%)
+   Dalon Westergreen                 3 (1.0%)
+   Yinbo Zhu                         3 (1.0%)
+   Bin Meng                          3 (1.0%)
+   Matwey V. Kornilov                3 (1.0%)
+   Peng Fan                          3 (1.0%)
+   Philippe Reynes                   3 (1.0%)
+   Peter Ujfalusi                    2 (0.7%)
+   Ian Ray                           2 (0.7%)
+   Martyn Welch                      2 (0.7%)
+   Akash Gajjar                      2 (0.7%)
+   Mark Jonas                        2 (0.7%)
+   Max Krummenacher                  2 (0.7%)
+   Masahiro Yamada                   2 (0.7%)
+   Faiz Abbas                        2 (0.7%)
+   Philipp Tomsich                   2 (0.7%)
+   Fabio Estevam                     2 (0.7%)
+   Joris Offouga                     2 (0.7%)
+   Christophe Kerello                2 (0.7%)
+   Marek Vasut                       2 (0.7%)
+   Mario Six                         2 (0.7%)
+   Bartosz Golaszewski               1 (0.3%)
+   Andreas Dannenberg                1 (0.3%)
+   Udit Agarwal                      1 (0.3%)
+   Miquel Raynal                     1 (0.3%)
+   Michael Durrant                   1 (0.3%)
+   Camelia Groza                     1 (0.3%)
+   Madalin Bucur                     1 (0.3%)
+   Pramod Kumar                      1 (0.3%)
+   Udit Kumar                        1 (0.3%)
+   Alexander Graf                    1 (0.3%)
+   Shyam Saini                       1 (0.3%)
+   Rob Clark                         1 (0.3%)
+   Dave Gerlach                      1 (0.3%)
+   Carlos Santos                     1 (0.3%)
+   Ricardo Martincoski               1 (0.3%)
+   Jörg Krause                       1 (0.3%)
+   Icenowy Zheng                     1 (0.3%)
+   Haibo Chen                        1 (0.3%)
+   Alexandre Torgue                  1 (0.3%)
+   Vladimir Oltean                   1 (0.3%)
+   Ran Wang                          1 (0.3%)
+   Bhuvanchandra DV                  1 (0.3%)
+   Pankit Garg                       1 (0.3%)
+   Rajat Srivastava                  1 (0.3%)
+   Xiaowei Bao                       1 (0.3%)
+   Sam Protsenko                     1 (0.3%)
+   Stefan Agner                      1 (0.3%)
+   Ang, Chee Hong                    1 (0.3%)
+   Ye Li                             1 (0.3%)
+   Clément Péron                     1 (0.3%)
+   Christophe Roullier               1 (0.3%)
+   Dirk Eibach                       1 (0.3%)
+   Anatolij Gustschin                1 (0.3%)
+   Boris Brezillon                   1 (0.3%)
+   Sjoerd Simons                     1 (0.3%)
+   Grygorii Strashko                 1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 802)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       106 (13.2%)
+   Bin Meng                          98 (12.2%)
+   Stefan Roese                      68 (8.5%)
+   Prabhakar Kushwaha                68 (8.5%)
+   Igor Opaniuk                      46 (5.7%)
+   Kever Yang                        45 (5.6%)
+   Tom Rini                          35 (4.4%)
+   Heinrich Schuchardt               34 (4.2%)
+   Heiko Schocher                    31 (3.9%)
+   Jagan Teki                        28 (3.5%)
+   Philipp Tomsich                   24 (3.0%)
+   Lukas Auer                        23 (2.9%)
+   Fabio Estevam                     20 (2.5%)
+   Lukasz Majewski                   18 (2.2%)
+   Lokesh Vutla                      14 (1.7%)
+   Anup Patel                        13 (1.6%)
+   Peng Fan                          11 (1.4%)
+   Marek Vasut                       11 (1.4%)
+   Daniel Schwierzeck                11 (1.4%)
+   Chris Packham                     10 (1.2%)
+   Patrick Delaunay                  7 (0.9%)
+   Andreas Dannenberg                7 (0.9%)
+   Max Krummenacher                  6 (0.7%)
+   Simon Goldschmidt                 5 (0.6%)
+   Stefan Agner                      4 (0.5%)
+   Rick Chen                         4 (0.5%)
+   Michal Simek                      3 (0.4%)
+   Patrice Chotard                   3 (0.4%)
+   Anatolij Gustschin                3 (0.4%)
+   Grygorii Strashko                 3 (0.4%)
+   Paul Kocialkowski                 3 (0.4%)
+   Stefano Babic                     3 (0.4%)
+   Atish Patra                       3 (0.4%)
+   Alexander Graf                    2 (0.2%)
+   Sam Protsenko                     2 (0.2%)
+   Ryder Lee                         2 (0.2%)
+   Philippe Schenker                 2 (0.2%)
+   Hannes Schmelzer                  2 (0.2%)
+   Marcel Ziswiler                   2 (0.2%)
+   Marek Behún                       2 (0.2%)
+   Neil Armstrong                    1 (0.1%)
+   Keerthy                           1 (0.1%)
+   Matthias Brugger                  1 (0.1%)
+   Peter Ujfalusi                    1 (0.1%)
+   Masahiro Yamada                   1 (0.1%)
+   Bartosz Golaszewski               1 (0.1%)
+   Miquel Raynal                     1 (0.1%)
+   Ye Li                             1 (0.1%)
+   Boris Brezillon                   1 (0.1%)
+   Eugeniu Rosca                     1 (0.1%)
+   Sekhar Nori                       1 (0.1%)
+   Tomas Melin                       1 (0.1%)
+   Felix Brack                       1 (0.1%)
+   Bernhard Messerklinger            1 (0.1%)
+   Klaus Goger                       1 (0.1%)
+   Evgeniy Paltsev                   1 (0.1%)
+   Alex Marginean                    1 (0.1%)
+   Andy Shevchenko                   1 (0.1%)
+   Stephen Warren                    1 (0.1%)
+   David Wu                          1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 77)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          8 (10.4%)
+   Heiko Schocher                    7 (9.1%)
+   Lukas Auer                        5 (6.5%)
+   Marcel Ziswiler                   5 (6.5%)
+   Andy Yan                          5 (6.5%)
+   Heinrich Schuchardt               3 (3.9%)
+   Neil Armstrong                    3 (3.9%)
+   Fabio Estevam                     2 (2.6%)
+   Patrick Delaunay                  2 (2.6%)
+   Michal Simek                      2 (2.6%)
+   Shyam Saini                       2 (2.6%)
+   Karsten Merker                    2 (2.6%)
+   Andreas Färber                    2 (2.6%)
+   Peter Howard                      2 (2.6%)
+   Adam Ford                         2 (2.6%)
+   Mohammad Rasim                    2 (2.6%)
+   Lukasz Majewski                   1 (1.3%)
+   Rick Chen                         1 (1.3%)
+   Hannes Schmelzer                  1 (1.3%)
+   Bernhard Messerklinger            1 (1.3%)
+   Alex Kiernan                      1 (1.3%)
+   Sébastien Szymanski               1 (1.3%)
+   Leigh Brown                       1 (1.3%)
+   Frank Wunderlich                  1 (1.3%)
+   Suniel Mahesh                     1 (1.3%)
+   Bryan O'Donoghue                  1 (1.3%)
+   Daniel Gröber                     1 (1.3%)
+   Alejandro Hernandez               1 (1.3%)
+   Anson Huang                       1 (1.3%)
+   Pablo Sebastián Greco             1 (1.3%)
+   Pierre-Jean Texier                1 (1.3%)
+   Maxime Jourdan                    1 (1.3%)
+   Baruch Siach                      1 (1.3%)
+   Ashish Kumar                      1 (1.3%)
+   Pierre Bourdon                    1 (1.3%)
+   Michael Walle                     1 (1.3%)
+   Jonas Smedegaard                  1 (1.3%)
+   Vagrant Cascadian                 1 (1.3%)
+   Eugen Hristev                     1 (1.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 77)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      10 (13.0%)
+   Lukas Auer                        9 (11.7%)
+   Bin Meng                          5 (6.5%)
+   Kever Yang                        5 (6.5%)
+   Sekhar Nori                       4 (5.2%)
+   Fabio Estevam                     3 (3.9%)
+   Lukasz Majewski                   3 (3.9%)
+   Jagan Teki                        3 (3.9%)
+   Weijie Gao                        3 (3.9%)
+   Guillaume La Roque                3 (3.9%)
+   AKASHI Takahiro                   3 (3.9%)
+   Alex Kiernan                      2 (2.6%)
+   Maxime Jourdan                    2 (2.6%)
+   Igor Opaniuk                      2 (2.6%)
+   Chris Packham                     2 (2.6%)
+   Christophe Kerello                2 (2.6%)
+   Jordan Hand                       2 (2.6%)
+   Frieder Schrempf                  2 (2.6%)
+   Neil Armstrong                    1 (1.3%)
+   Jonas Smedegaard                  1 (1.3%)
+   Tom Rini                          1 (1.3%)
+   Anup Patel                        1 (1.3%)
+   Marek Vasut                       1 (1.3%)
+   Atish Patra                       1 (1.3%)
+   Ye Li                             1 (1.3%)
+   Mian Yousaf Kaukab                1 (1.3%)
+   Gregory CLEMENT                   1 (1.3%)
+   Anssi Hannula                     1 (1.3%)
+   Andrew F. Davis                   1 (1.3%)
+   Shawn Guo                         1 (1.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 29)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Robert P. J. Day                  5 (17.2%)
+   Heinrich Schuchardt               2 (6.9%)
+   Mohammad Rasim                    2 (6.9%)
+   Stefano Babic                     2 (6.9%)
+   Fabio Estevam                     1 (3.4%)
+   AKASHI Takahiro                   1 (3.4%)
+   Tom Rini                          1 (3.4%)
+   Heiko Schocher                    1 (3.4%)
+   Andreas Färber                    1 (3.4%)
+   Adam Ford                         1 (3.4%)
+   Pierre-Jean Texier                1 (3.4%)
+   Lokesh Vutla                      1 (3.4%)
+   Keerthy                           1 (3.4%)
+   Klaus Goger                       1 (3.4%)
+   Alex Marginean                    1 (3.4%)
+   Christian Gmeiner                 1 (3.4%)
+   Frank Zhang                       1 (3.4%)
+   Levin Du                          1 (3.4%)
+   Jakob Unterwurzacher              1 (3.4%)
+   Roman Stratiienko                 1 (3.4%)
+   rafael mello                      1 (3.4%)
+   Sreeja Vadakattu                  1 (3.4%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 29)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Chris Packham                     5 (17.2%)
+   Fabio Estevam                     3 (10.3%)
+   Simon Goldschmidt                 3 (10.3%)
+   Maxime Jourdan                    2 (6.9%)
+   AKASHI Takahiro                   1 (3.4%)
+   Tom Rini                          1 (3.4%)
+   Stefan Roese                      1 (3.4%)
+   Igor Opaniuk                      1 (3.4%)
+   Neil Armstrong                    1 (3.4%)
+   Marek Vasut                       1 (3.4%)
+   Shawn Guo                         1 (3.4%)
+   Marcel Ziswiler                   1 (3.4%)
+   Michal Simek                      1 (3.4%)
+   Philipp Tomsich                   1 (3.4%)
+   Patrice Chotard                   1 (3.4%)
+   Eugeniu Rosca                     1 (3.4%)
+   Vladimir Oltean                   1 (3.4%)
+   Mark Kettenis                     1 (3.4%)
+   Christoph Muellner                1 (3.4%)
+   Breno Matheus Lima                1 (3.4%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         658 (32.1%)
+   DENX Software Engineering         264 (12.9%)
+   ST Microelectronics               162 (7.9%)
+   Guntermann & Drunck               105 (5.1%)
+   Toradex                           104 (5.1%)
+   NXP                               102 (5.0%)
+   Texas Instruments                 87 (4.3%)
+   Google, Inc.                      75 (3.7%)
+   Amarula Solutions                 70 (3.4%)
+   BayLibre SAS                      67 (3.3%)
+   Rockchip                          63 (3.1%)
+   Linaro                            52 (2.5%)
+   NVidia                            51 (2.5%)
+   Pepperl+Fuchs                     40 (2.0%)
+   Intel                             39 (1.9%)
+   Konsulko Group                    21 (1.0%)
+   Xilinx                            14 (0.7%)
+   General Electric                  12 (0.6%)
+   AMD                               10 (0.5%)
+   ARM                               10 (0.5%)
+   Collabora Ltd.                    10 (0.5%)
+   Socionext Inc.                    10 (0.5%)
+   Bootlin                           8 (0.4%)
+   Debian.org                        4 (0.2%)
+   SUSE                              4 (0.2%)
+   Renesas Electronics               2 (0.1%)
+   CompuLab                          1 (0.0%)
+   Ronetix                           1 (0.0%)
+   VMWare                            1 (0.0%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         47898 (23.6%)
+   DENX Software Engineering         33107 (16.3%)
+   Guntermann & Drunck               29939 (14.7%)
+   ST Microelectronics               17014 (8.4%)
+   BayLibre SAS                      16887 (8.3%)
+   NXP                               11247 (5.5%)
+   Texas Instruments                 9180 (4.5%)
+   Amarula Solutions                 6833 (3.4%)
+   Toradex                           6507 (3.2%)
+   Konsulko Group                    4492 (2.2%)
+   Google, Inc.                      4292 (2.1%)
+   Rockchip                          2745 (1.3%)
+   Linaro                            2469 (1.2%)
+   NVidia                            2167 (1.1%)
+   CompuLab                          1685 (0.8%)
+   Renesas Electronics               1384 (0.7%)
+   Intel                             1379 (0.7%)
+   Pepperl+Fuchs                     1374 (0.7%)
+   Collabora Ltd.                    1166 (0.6%)
+   Debian.org                        368 (0.2%)
+   General Electric                  362 (0.2%)
+   Socionext Inc.                    340 (0.2%)
+   ARM                               153 (0.1%)
+   Ronetix                           135 (0.1%)
+   AMD                               88 (0.0%)
+   Xilinx                            64 (0.0%)
+   Bootlin                           60 (0.0%)
+   VMWare                            31 (0.0%)
+   SUSE                              14 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 305)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         61 (20.0%)
+   (Unknown)                         35 (11.5%)
+   NXP                               35 (11.5%)
+   NVidia                            33 (10.8%)
+   ST Microelectronics               23 (7.5%)
+   Xilinx                            20 (6.6%)
+   Texas Instruments                 19 (6.2%)
+   BayLibre SAS                      18 (5.9%)
+   Rockchip                          12 (3.9%)
+   Konsulko Group                    11 (3.6%)
+   Amarula Solutions                 6 (2.0%)
+   Toradex                           4 (1.3%)
+   Intel                             4 (1.3%)
+   SUSE                              4 (1.3%)
+   Guntermann & Drunck               3 (1.0%)
+   Collabora Ltd.                    3 (1.0%)
+   Samsung                           3 (1.0%)
+   General Electric                  2 (0.7%)
+   Socionext Inc.                    2 (0.7%)
+   Bootlin                           2 (0.7%)
+   Bosch                             2 (0.7%)
+   Openedev                          2 (0.7%)
+   Linaro                            1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 217)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         106 (48.8%)
+   NXP                               25 (11.5%)
+   Texas Instruments                 13 (6.0%)
+   BayLibre SAS                      8 (3.7%)
+   Toradex                           8 (3.7%)
+   DENX Software Engineering         6 (2.8%)
+   ST Microelectronics               6 (2.8%)
+   Linaro                            6 (2.8%)
+   Intel                             4 (1.8%)
+   Xilinx                            3 (1.4%)
+   Rockchip                          3 (1.4%)
+   Collabora Ltd.                    3 (1.4%)
+   Bootlin                           3 (1.4%)
+   NVidia                            2 (0.9%)
+   Amarula Solutions                 2 (0.9%)
+   Guntermann & Drunck               2 (0.9%)
+   General Electric                  2 (0.9%)
+   Socionext Inc.                    2 (0.9%)
+   Google, Inc.                      2 (0.9%)
+   Debian.org                        2 (0.9%)
+   Konsulko Group                    1 (0.5%)
+   SUSE                              1 (0.5%)
+   CompuLab                          1 (0.5%)
+   Renesas Electronics               1 (0.5%)
+   Pepperl+Fuchs                     1 (0.5%)
+   ARM                               1 (0.5%)
+   Ronetix                           1 (0.5%)
+   AMD                               1 (0.5%)
+   VMWare                            1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2019.10.rst b/doc/develop/statistics/u-boot-stats-v2019.10.rst
new file mode 100644
index 00000000000..bd3eead6fa3
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2019.10.rst
@@ -0,0 +1,871 @@
+:orphan:
+
+Release Statistics for U-Boot v2019.10
+======================================
+
+* Processed 2007 changesets from 190 developers
+
+* 32 employers found
+
+* A total of 111008 lines added, 38325 removed (delta 72683)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       252 (12.6%)
+   Kever Yang                        142 (7.1%)
+   Heinrich Schuchardt               115 (5.7%)
+   Patrick Delaunay                  112 (5.6%)
+   Jagan Teki                        89 (4.4%)
+   Bin Meng                          70 (3.5%)
+   Hou Zhiqiang                      66 (3.3%)
+   Adam Ford                         55 (2.7%)
+   Lukasz Majewski                   46 (2.3%)
+   Peng Fan                          45 (2.2%)
+   Marek Vasut                       39 (1.9%)
+   Chuanhua Han                      35 (1.7%)
+   Andreas Dannenberg                34 (1.7%)
+   Tom Rini                          30 (1.5%)
+   Alex Marginean                    29 (1.4%)
+   Masahiro Yamada                   25 (1.2%)
+   Lokesh Vutla                      24 (1.2%)
+   Faiz Abbas                        24 (1.2%)
+   Igor Opaniuk                      23 (1.1%)
+   Heiko Schocher                    22 (1.1%)
+   Neil Armstrong                    18 (0.9%)
+   Sam Protsenko                     17 (0.8%)
+   Ramon Fried                       17 (0.8%)
+   Baruch Siach                      16 (0.8%)
+   Jean-Jacques Hiblot               15 (0.7%)
+   Anatolij Gustschin                15 (0.7%)
+   Patrice Chotard                   15 (0.7%)
+   Anup Patel                        15 (0.7%)
+   Bartosz Golaszewski               14 (0.7%)
+   Simon Goldschmidt                 13 (0.6%)
+   Park, Aiden                       13 (0.6%)
+   Pascal Linder                     13 (0.6%)
+   Andre Przywara                    13 (0.6%)
+   Andy Shevchenko                   12 (0.6%)
+   Suniel Mahesh                     12 (0.6%)
+   Weijie Gao                        12 (0.6%)
+   Miquel Raynal                     12 (0.6%)
+   Marek Behún                       11 (0.5%)
+   Lukas Auer                        11 (0.5%)
+   Ye Li                             11 (0.5%)
+   Bryan O'Donoghue                  11 (0.5%)
+   Eugeniu Rosca                     10 (0.5%)
+   Rick Chen                         10 (0.5%)
+   Fabien Dessenne                   10 (0.5%)
+   AKASHI Takahiro                   9 (0.4%)
+   Andrew F. Davis                   8 (0.4%)
+   Yinbo Zhu                         8 (0.4%)
+   Matwey V. Kornilov                8 (0.4%)
+   Urja Rannikko                     8 (0.4%)
+   Sekhar Nori                       8 (0.4%)
+   Marcel Ziswiler                   8 (0.4%)
+   Tudor Ambarus                     7 (0.3%)
+   Stefan Roese                      7 (0.3%)
+   Suman Anna                        7 (0.3%)
+   Manivannan Sadhasivam             7 (0.3%)
+   Luca Ceresoli                     7 (0.3%)
+   Vladimir Oltean                   7 (0.3%)
+   Ruslan Trofymenko                 7 (0.3%)
+   Markus Klotzbuecher               7 (0.3%)
+   Ley Foon Tan                      6 (0.3%)
+   Michal Simek                      6 (0.3%)
+   Mark Kettenis                     6 (0.3%)
+   Andrei Gherzan                    6 (0.3%)
+   T Karthik Reddy                   6 (0.3%)
+   Hannes Schmelzer                  6 (0.3%)
+   Shyam Saini                       6 (0.3%)
+   Ludwig Zenz                       6 (0.3%)
+   Peter Robinson                    6 (0.3%)
+   Michal Suchanek                   5 (0.2%)
+   liucheng (G)                      5 (0.2%)
+   Laurentiu Tudor                   5 (0.2%)
+   Trent Piepho                      5 (0.2%)
+   Alexander Dahl                    5 (0.2%)
+   Robert Hancock                    5 (0.2%)
+   Keerthy                           5 (0.2%)
+   Paul Emge                         5 (0.2%)
+   Yangbo Lu                         5 (0.2%)
+   Pierre-Jean Texier                4 (0.2%)
+   Vignesh Raghavendra               4 (0.2%)
+   Pankaj Bansal                     4 (0.2%)
+   Thomas Schaefer                   4 (0.2%)
+   Eddie James                       4 (0.2%)
+   Marcus Comstedt                   4 (0.2%)
+   Fabien Parent                     4 (0.2%)
+   Julius Werner                     4 (0.2%)
+   Chris Webb                        4 (0.2%)
+   Joel Stanley                      4 (0.2%)
+   Eugeniy Paltsev                   3 (0.1%)
+   Matthias Brugger                  3 (0.1%)
+   Grygorii Strashko                 3 (0.1%)
+   Andy Yan                          3 (0.1%)
+   Joe Hershberger                   3 (0.1%)
+   Alexey Brodkin                    3 (0.1%)
+   Rohan Garg                        3 (0.1%)
+   Ashish Kumar                      3 (0.1%)
+   Marek Szyprowski                  3 (0.1%)
+   Ryder Lee                         3 (0.1%)
+   Nick Xie                          3 (0.1%)
+   Bhargav Shah                      3 (0.1%)
+   Sven Schwermer                    3 (0.1%)
+   Derald D. Woods                   3 (0.1%)
+   Roman Stratiienko                 2 (0.1%)
+   Stephen Warren                    2 (0.1%)
+   Heiko Stuebner                    2 (0.1%)
+   Christophe Kerello                2 (0.1%)
+   Meenakshi Aggarwal                2 (0.1%)
+   Florin Chiculita                  2 (0.1%)
+   Fabian Vogt                       2 (0.1%)
+   Michael Walle                     2 (0.1%)
+   Ralph Siemsen                     2 (0.1%)
+   Sagar Shrikant Kadam              2 (0.1%)
+   Kunihiko Hayashi                  2 (0.1%)
+   Sudeep Holla                      2 (0.1%)
+   Chris Packham                     2 (0.1%)
+   Yuantian Tang                     2 (0.1%)
+   Uwe Kleine-König                  2 (0.1%)
+   Yegor Yefremov                    2 (0.1%)
+   Dalon Westergreen                 2 (0.1%)
+   Holger Brunck                     2 (0.1%)
+   Dominik Sliwa                     2 (0.1%)
+   Frank Wunderlich                  2 (0.1%)
+   Robert P. J. Day                  2 (0.1%)
+   Niklas Schulze                    2 (0.1%)
+   David Abdurachmanov               2 (0.1%)
+   Mickaël Tansorier                 2 (0.1%)
+   Radu Pirea                        2 (0.1%)
+   Horatiu Vultur                    2 (0.1%)
+   Ezequiel Garcia                   2 (0.1%)
+   Ilko Iliev                        2 (0.1%)
+   Cyrille Pitchen                   2 (0.1%)
+   Melin Tomas                       2 (0.1%)
+   Hamish Guthrie                    2 (0.1%)
+   Maxime Ripard                     1 (0.0%)
+   Ovidiu Panait                     1 (0.0%)
+   Andrius Štikonas                  1 (0.0%)
+   Joris Offouga                     1 (0.0%)
+   Biwen Li                          1 (0.0%)
+   Michael Trimarchi                 1 (0.0%)
+   Hugh Cole-Baker                   1 (0.0%)
+   Priyanka Jain                     1 (0.0%)
+   Bonnans, Laurent                  1 (0.0%)
+   Raul Benet                        1 (0.0%)
+   Guillaume GARDET                  1 (0.0%)
+   Matt Pelland                      1 (0.0%)
+   Florinel Iordache                 1 (0.0%)
+   Alistair Francis                  1 (0.0%)
+   Rasmus Villemoes                  1 (0.0%)
+   Ryan Harkin                       1 (0.0%)
+   Samuel Egli                       1 (0.0%)
+   Ricardo Ribalda Delgado           1 (0.0%)
+   Aaron Williams                    1 (0.0%)
+   Martin Vystrčil                   1 (0.0%)
+   Vikas Manocha                     1 (0.0%)
+   Nuno Gonçalves                    1 (0.0%)
+   Max Kellermann                    1 (0.0%)
+   Alison Wang                       1 (0.0%)
+   Levin Du                          1 (0.0%)
+   Nishanth Menon                    1 (0.0%)
+   Anselm Busse                      1 (0.0%)
+   Jerome Brunet                     1 (0.0%)
+   Stefan Agner                      1 (0.0%)
+   Bernhard Messerklinger            1 (0.0%)
+   Joshua Watt                       1 (0.0%)
+   Eugen Hristev                     1 (0.0%)
+   Alex Deymo                        1 (0.0%)
+   Anton Gerasimov                   1 (0.0%)
+   Eric Perie                        1 (0.0%)
+   Andrej Rosano                     1 (0.0%)
+   titron                            1 (0.0%)
+   Emmanuel Vadot                    1 (0.0%)
+   Jianchao Wang                     1 (0.0%)
+   Jonathan Corbet                   1 (0.0%)
+   Leon Yu                           1 (0.0%)
+   Breno Matheus Lima                1 (0.0%)
+   Sébastien Szymanski               1 (0.0%)
+   Matti Vaittinen                   1 (0.0%)
+   Oleksandr Zhadan                  1 (0.0%)
+   Vesa Jääskeläinen                 1 (0.0%)
+   Jernej Skrabec                    1 (0.0%)
+   Marcus Cooper                     1 (0.0%)
+   Akio Hirayama                     1 (0.0%)
+   Niel Fourie                       1 (0.0%)
+   David Lechner                     1 (0.0%)
+   Leo Ruan                          1 (0.0%)
+   Roman Kapl                        1 (0.0%)
+   Luka Kovacic                      1 (0.0%)
+   Thierry Reding                    1 (0.0%)
+   Vabhav Sharma                     1 (0.0%)
+   Jun Chen                          1 (0.0%)
+   Andreas Färber                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       15674 (12.4%)
+   Jagan Teki                        7394 (5.8%)
+   Kever Yang                        7177 (5.7%)
+   Marek Vasut                       6504 (5.1%)
+   Bin Meng                          5608 (4.4%)
+   Heinrich Schuchardt               5109 (4.0%)
+   Lukasz Majewski                   4813 (3.8%)
+   Patrick Delaunay                  3764 (3.0%)
+   Manivannan Sadhasivam             3703 (2.9%)
+   Neil Armstrong                    3599 (2.8%)
+   Yangbo Lu                         3043 (2.4%)
+   Alex Marginean                    3007 (2.4%)
+   Ramon Fried                       2610 (2.1%)
+   Peng Fan                          2450 (1.9%)
+   Uwe Kleine-König                  2338 (1.8%)
+   Hou Zhiqiang                      2293 (1.8%)
+   Tom Rini                          2261 (1.8%)
+   Eugeniu Rosca                     2112 (1.7%)
+   Lokesh Vutla                      1912 (1.5%)
+   Andreas Dannenberg                1831 (1.4%)
+   Luca Ceresoli                     1477 (1.2%)
+   Adam Ford                         1476 (1.2%)
+   Park, Aiden                       1421 (1.1%)
+   Sekhar Nori                       1420 (1.1%)
+   Chuanhua Han                      1307 (1.0%)
+   Hannes Schmelzer                  1272 (1.0%)
+   Niel Fourie                       1260 (1.0%)
+   Nick Xie                          1096 (0.9%)
+   Anup Patel                        1054 (0.8%)
+   Simon Goldschmidt                 1008 (0.8%)
+   Fabien Dessenne                   940 (0.7%)
+   Jianchao Wang                     921 (0.7%)
+   Heiko Schocher                    885 (0.7%)
+   Keerthy                           855 (0.7%)
+   Masahiro Yamada                   830 (0.7%)
+   Holger Brunck                     821 (0.6%)
+   Tudor Ambarus                     797 (0.6%)
+   Weijie Gao                        775 (0.6%)
+   Levin Du                          766 (0.6%)
+   Faiz Abbas                        743 (0.6%)
+   Patrice Chotard                   714 (0.6%)
+   Ruslan Trofymenko                 713 (0.6%)
+   Bhargav Shah                      705 (0.6%)
+   Lukas Auer                        694 (0.5%)
+   Andre Przywara                    664 (0.5%)
+   Pascal Linder                     609 (0.5%)
+   Matti Vaittinen                   607 (0.5%)
+   Suniel Mahesh                     587 (0.5%)
+   Shyam Saini                       575 (0.5%)
+   Horatiu Vultur                    518 (0.4%)
+   Igor Opaniuk                      486 (0.4%)
+   Bartosz Golaszewski               425 (0.3%)
+   Kunihiko Hayashi                  425 (0.3%)
+   Robert Hancock                    420 (0.3%)
+   Peter Robinson                    381 (0.3%)
+   Julius Werner                     376 (0.3%)
+   Jerome Brunet                     373 (0.3%)
+   Markus Klotzbuecher               366 (0.3%)
+   Jean-Jacques Hiblot               364 (0.3%)
+   Rick Chen                         350 (0.3%)
+   Anatolij Gustschin                323 (0.3%)
+   Ludwig Zenz                       306 (0.2%)
+   Fabien Parent                     288 (0.2%)
+   Anton Gerasimov                   281 (0.2%)
+   Hamish Guthrie                    266 (0.2%)
+   Rohan Garg                        245 (0.2%)
+   Marcus Cooper                     239 (0.2%)
+   Laurentiu Tudor                   216 (0.2%)
+   Urja Rannikko                     207 (0.2%)
+   Ilko Iliev                        198 (0.2%)
+   AKASHI Takahiro                   194 (0.2%)
+   Eugeniy Paltsev                   193 (0.2%)
+   Andy Shevchenko                   190 (0.1%)
+   Stefan Roese                      181 (0.1%)
+   Michael Walle                     181 (0.1%)
+   Grygorii Strashko                 178 (0.1%)
+   Eddie James                       174 (0.1%)
+   Bernhard Messerklinger            172 (0.1%)
+   Andrei Gherzan                    162 (0.1%)
+   Baruch Siach                      155 (0.1%)
+   Marcel Ziswiler                   152 (0.1%)
+   Sven Schwermer                    146 (0.1%)
+   Trent Piepho                      136 (0.1%)
+   Sam Protsenko                     135 (0.1%)
+   Yinbo Zhu                         127 (0.1%)
+   Frank Wunderlich                  126 (0.1%)
+   Leo Ruan                          121 (0.1%)
+   Alexey Brodkin                    115 (0.1%)
+   T Karthik Reddy                   114 (0.1%)
+   David Lechner                     102 (0.1%)
+   Ye Li                             101 (0.1%)
+   Marcus Comstedt                   98 (0.1%)
+   Pankaj Bansal                     97 (0.1%)
+   Meenakshi Aggarwal                97 (0.1%)
+   Miquel Raynal                     96 (0.1%)
+   Matwey V. Kornilov                93 (0.1%)
+   Dominik Sliwa                     90 (0.1%)
+   Alex Deymo                        90 (0.1%)
+   Suman Anna                        83 (0.1%)
+   Andrew F. Davis                   78 (0.1%)
+   Michal Suchanek                   75 (0.1%)
+   Alexander Dahl                    74 (0.1%)
+   Ryan Harkin                       70 (0.1%)
+   Ryder Lee                         68 (0.1%)
+   Ley Foon Tan                      60 (0.0%)
+   Oleksandr Zhadan                  60 (0.0%)
+   Bryan O'Donoghue                  59 (0.0%)
+   Jonathan Corbet                   59 (0.0%)
+   Derald D. Woods                   58 (0.0%)
+   Chris Webb                        56 (0.0%)
+   Vesa Jääskeläinen                 52 (0.0%)
+   Joshua Watt                       44 (0.0%)
+   Paul Emge                         41 (0.0%)
+   Matthias Brugger                  41 (0.0%)
+   Vladimir Oltean                   40 (0.0%)
+   Mark Kettenis                     38 (0.0%)
+   Yuantian Tang                     35 (0.0%)
+   Sagar Shrikant Kadam              30 (0.0%)
+   Thomas Schaefer                   29 (0.0%)
+   Marek Behún                       27 (0.0%)
+   Cyrille Pitchen                   27 (0.0%)
+   Ezequiel Garcia                   26 (0.0%)
+   Florinel Iordache                 26 (0.0%)
+   Anselm Busse                      26 (0.0%)
+   Niklas Schulze                    24 (0.0%)
+   Michael Trimarchi                 24 (0.0%)
+   David Abdurachmanov               22 (0.0%)
+   Pierre-Jean Texier                21 (0.0%)
+   Emmanuel Vadot                    21 (0.0%)
+   Sébastien Szymanski               21 (0.0%)
+   Stephen Warren                    20 (0.0%)
+   Aaron Williams                    19 (0.0%)
+   Michal Simek                      18 (0.0%)
+   Roman Stratiienko                 18 (0.0%)
+   Priyanka Jain                     17 (0.0%)
+   Vikas Manocha                     17 (0.0%)
+   Jernej Skrabec                    17 (0.0%)
+   liucheng (G)                      16 (0.0%)
+   Vignesh Raghavendra               16 (0.0%)
+   Marek Szyprowski                  14 (0.0%)
+   Melin Tomas                       13 (0.0%)
+   Joris Offouga                     13 (0.0%)
+   Joe Hershberger                   12 (0.0%)
+   Joel Stanley                      11 (0.0%)
+   Fabian Vogt                       11 (0.0%)
+   Eugen Hristev                     11 (0.0%)
+   Andy Yan                          10 (0.0%)
+   Ashish Kumar                      10 (0.0%)
+   Roman Kapl                        10 (0.0%)
+   Chris Packham                     9 (0.0%)
+   Matt Pelland                      8 (0.0%)
+   Yegor Yefremov                    7 (0.0%)
+   Raul Benet                        7 (0.0%)
+   Breno Matheus Lima                7 (0.0%)
+   Jun Chen                          7 (0.0%)
+   Dalon Westergreen                 6 (0.0%)
+   Eric Perie                        6 (0.0%)
+   Christophe Kerello                5 (0.0%)
+   Mickaël Tansorier                 5 (0.0%)
+   Radu Pirea                        5 (0.0%)
+   Ovidiu Panait                     5 (0.0%)
+   Leon Yu                           5 (0.0%)
+   Florin Chiculita                  4 (0.0%)
+   Sudeep Holla                      4 (0.0%)
+   Robert P. J. Day                  4 (0.0%)
+   Maxime Ripard                     4 (0.0%)
+   Bonnans, Laurent                  4 (0.0%)
+   Martin Vystrčil                   4 (0.0%)
+   Nishanth Menon                    4 (0.0%)
+   Stefan Agner                      4 (0.0%)
+   Vabhav Sharma                     4 (0.0%)
+   Heiko Stuebner                    3 (0.0%)
+   Hugh Cole-Baker                   3 (0.0%)
+   Samuel Egli                       3 (0.0%)
+   Alison Wang                       3 (0.0%)
+   Ralph Siemsen                     2 (0.0%)
+   Biwen Li                          2 (0.0%)
+   Ricardo Ribalda Delgado           2 (0.0%)
+   Andrej Rosano                     2 (0.0%)
+   titron                            2 (0.0%)
+   Akio Hirayama                     2 (0.0%)
+   Luka Kovacic                      2 (0.0%)
+   Thierry Reding                    2 (0.0%)
+   Andrius Štikonas                  1 (0.0%)
+   Guillaume GARDET                  1 (0.0%)
+   Alistair Francis                  1 (0.0%)
+   Rasmus Villemoes                  1 (0.0%)
+   Nuno Gonçalves                    1 (0.0%)
+   Max Kellermann                    1 (0.0%)
+   Andreas Färber                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Uwe Kleine-König                  2338 (6.1%)
+   Heinrich Schuchardt               1027 (2.7%)
+   Horatiu Vultur                    455 (1.2%)
+   Holger Brunck                     431 (1.1%)
+   Tom Rini                          418 (1.1%)
+   Patrice Chotard                   211 (0.6%)
+   Bartosz Golaszewski               193 (0.5%)
+   Ilko Iliev                        192 (0.5%)
+   Bernhard Messerklinger            77 (0.2%)
+   Ryan Harkin                       67 (0.2%)
+   Oleksandr Zhadan                  60 (0.2%)
+   Ludwig Zenz                       46 (0.1%)
+   Sébastien Szymanski               21 (0.1%)
+   Chris Webb                        19 (0.0%)
+   Derald D. Woods                   16 (0.0%)
+   Ye Li                             12 (0.0%)
+   Weijie Gao                        9 (0.0%)
+   Joe Hershberger                   8 (0.0%)
+   Joris Offouga                     7 (0.0%)
+   Vladimir Oltean                   5 (0.0%)
+   Martin Vystrčil                   4 (0.0%)
+   Robert P. J. Day                  3 (0.0%)
+   Sudeep Holla                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 335)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   YouMin Chen                       55 (16.4%)
+   Stefan Roese                      36 (10.7%)
+   Patrice Chotard                   23 (6.9%)
+   Michal Simek                      20 (6.0%)
+   Tom Warren                        16 (4.8%)
+   Tom Rini                          14 (4.2%)
+   Holger Brunck                     13 (3.9%)
+   Igor Opaniuk                      12 (3.6%)
+   Matthias Brugger                  10 (3.0%)
+   Bin Meng                          8 (2.4%)
+   Priyanka Jain                     7 (2.1%)
+   Loic Pallardy                     7 (2.1%)
+   Kever Yang                        7 (2.1%)
+   Lokesh Vutla                      7 (2.1%)
+   Andreas Dannenberg                7 (2.1%)
+   Jagan Teki                        6 (1.8%)
+   Matwey V. Kornilov                5 (1.5%)
+   Christophe Kerello                4 (1.2%)
+   Neil Armstrong                    4 (1.2%)
+   Heinrich Schuchardt               3 (0.9%)
+   Benjamin Gaignard                 3 (0.9%)
+   Anup Patel                        3 (0.9%)
+   Vignesh Raghavendra               3 (0.9%)
+   Sam Protsenko                     3 (0.9%)
+   Grygorii Strashko                 3 (0.9%)
+   Tudor Ambarus                     3 (0.9%)
+   Keerthy                           3 (0.9%)
+   Peng Fan                          3 (0.9%)
+   Patrick Delaunay                  3 (0.9%)
+   Vladimir Oltean                   2 (0.6%)
+   Zhao Qiang                        2 (0.6%)
+   Valentin Longchamp                2 (0.6%)
+   Biwen Li                          2 (0.6%)
+   Dominik Sliwa                     2 (0.6%)
+   Andrei Gherzan                    2 (0.6%)
+   Markus Klotzbuecher               2 (0.6%)
+   Nishanth Menon                    1 (0.3%)
+   Minkyu Kang                       1 (0.3%)
+   Ken Ma                            1 (0.3%)
+   Bossen WU                         1 (0.3%)
+   Nicolas Le Bayon                  1 (0.3%)
+   Kevin Hilman                      1 (0.3%)
+   Guillaume La Roque                1 (0.3%)
+   Bhuvanchandra DV                  1 (0.3%)
+   Max Krummenacher                  1 (0.3%)
+   Xiaoliang Yang                    1 (0.3%)
+   Mingkai Hu                        1 (0.3%)
+   Changming Huang                   1 (0.3%)
+   Catalin Horghidan                 1 (0.3%)
+   Kuldeep Singh                     1 (0.3%)
+   Sergey Kubushyn                   1 (0.3%)
+   Michael Durrant                   1 (0.3%)
+   Parthiban Nallathambi             1 (0.3%)
+   Mark Jonas                        1 (0.3%)
+   Stefan Agner                      1 (0.3%)
+   Ashish Kumar                      1 (0.3%)
+   Suman Anna                        1 (0.3%)
+   Marcel Ziswiler                   1 (0.3%)
+   Andre Przywara                    1 (0.3%)
+   Jean-Jacques Hiblot               1 (0.3%)
+   Masahiro Yamada                   1 (0.3%)
+   Faiz Abbas                        1 (0.3%)
+   Fabien Dessenne                   1 (0.3%)
+   Eugeniu Rosca                     1 (0.3%)
+   Lukasz Majewski                   1 (0.3%)
+   Marek Vasut                       1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 908)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          185 (20.4%)
+   Kever Yang                        130 (14.3%)
+   Prabhakar Kushwaha                108 (11.9%)
+   Simon Glass                       53 (5.8%)
+   Peng Fan                          40 (4.4%)
+   Jagan Teki                        35 (3.9%)
+   Lokesh Vutla                      32 (3.5%)
+   Oleksandr Suvorov                 31 (3.4%)
+   Stefan Roese                      26 (2.9%)
+   Anup Patel                        21 (2.3%)
+   Tom Rini                          19 (2.1%)
+   Heinrich Schuchardt               17 (1.9%)
+   Simon Goldschmidt                 17 (1.9%)
+   Igor Opaniuk                      15 (1.7%)
+   Sam Protsenko                     15 (1.7%)
+   Priyanka Jain                     11 (1.2%)
+   Marek Vasut                       10 (1.1%)
+   Heiko Schocher                    10 (1.1%)
+   Lukasz Majewski                   9 (1.0%)
+   Chris Packham                     8 (0.9%)
+   Andy Shevchenko                   8 (0.9%)
+   Alex Marginean                    8 (0.9%)
+   Patrice Chotard                   7 (0.8%)
+   Patrick Delaunay                  6 (0.7%)
+   Alistair Strachan                 6 (0.7%)
+   Rick Chen                         6 (0.7%)
+   Ramon Fried                       6 (0.7%)
+   Manivannan Sadhasivam             6 (0.7%)
+   Martyn Welch                      5 (0.6%)
+   Jernej Skrabec                    5 (0.6%)
+   Lukas Auer                        5 (0.6%)
+   Fabio Estevam                     4 (0.4%)
+   Cédric Le Goater                  4 (0.4%)
+   Horia Geantă                      4 (0.4%)
+   Park, Aiden                       4 (0.4%)
+   Eugeniu Rosca                     3 (0.3%)
+   Alexander Graf                    3 (0.3%)
+   Jean-Jacques Hiblot               2 (0.2%)
+   Joe Hershberger                   2 (0.2%)
+   Philipp Tomsich                   2 (0.2%)
+   Philippe Schenker                 2 (0.2%)
+   Daniel Schwierzeck                2 (0.2%)
+   Matthias Brugger                  1 (0.1%)
+   Grygorii Strashko                 1 (0.1%)
+   Vladimir Oltean                   1 (0.1%)
+   Nishanth Menon                    1 (0.1%)
+   Andre Przywara                    1 (0.1%)
+   Ryan Harkin                       1 (0.1%)
+   Frieder Schrempf                  1 (0.1%)
+   Linus Walleij                     1 (0.1%)
+   Padmarao Begari                   1 (0.1%)
+   Jun Nie                           1 (0.1%)
+   Stefano Babic                     1 (0.1%)
+   Andy Yan                          1 (0.1%)
+   Alistair Francis                  1 (0.1%)
+   Stephen Warren                    1 (0.1%)
+   David Abdurachmanov               1 (0.1%)
+   Andrew F. Davis                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 121)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          43 (35.5%)
+   Anup Patel                        7 (5.8%)
+   Heiko Schocher                    6 (5.0%)
+   Jernej Skrabec                    5 (4.1%)
+   Corentin Labbe                    5 (4.1%)
+   Steffen Dirkwinkel                5 (4.1%)
+   Adam Ford                         5 (4.1%)
+   Mark Kettenis                     4 (3.3%)
+   Heinrich Schuchardt               3 (2.5%)
+   Joris Offouga                     3 (2.5%)
+   Felix Brack                       3 (2.5%)
+   Pierre-Jean Texier                3 (2.5%)
+   Igor Opaniuk                      2 (1.7%)
+   Chris Packham                     2 (1.7%)
+   Alex Marginean                    2 (1.7%)
+   Patrick Delaunay                  2 (1.7%)
+   Michal Simek                      2 (1.7%)
+   Chris Webb                        2 (1.7%)
+   Frank Wunderlich                  2 (1.7%)
+   Marek Vasut                       1 (0.8%)
+   Fabio Estevam                     1 (0.8%)
+   Eugeniu Rosca                     1 (0.8%)
+   Vladimir Oltean                   1 (0.8%)
+   Andre Przywara                    1 (0.8%)
+   Frieder Schrempf                  1 (0.8%)
+   Padmarao Begari                   1 (0.8%)
+   Stephen Warren                    1 (0.8%)
+   David Abdurachmanov               1 (0.8%)
+   Matwey V. Kornilov                1 (0.8%)
+   Ludwig Zenz                       1 (0.8%)
+   Fancy Fang                        1 (0.8%)
+   Sagar Shrikant Kadam              1 (0.8%)
+   Eugen Hristev                     1 (0.8%)
+   Suniel Mahesh                     1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 121)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Park, Aiden                       12 (9.9%)
+   Lukas Auer                        11 (9.1%)
+   Andre Przywara                    10 (8.3%)
+   Simon Glass                       8 (6.6%)
+   Ramon Fried                       7 (5.8%)
+   Pierre-Jean Texier                6 (5.0%)
+   Yangbo Lu                         5 (4.1%)
+   Anup Patel                        4 (3.3%)
+   Marek Vasut                       4 (3.3%)
+   Neil Armstrong                    4 (3.3%)
+   Heinrich Schuchardt               3 (2.5%)
+   Patrick Delaunay                  3 (2.5%)
+   Sagar Shrikant Kadam              3 (2.5%)
+   Jagan Teki                        3 (2.5%)
+   Bhargav Shah                      3 (2.5%)
+   Heiko Schocher                    2 (1.7%)
+   Alex Marginean                    2 (1.7%)
+   Peng Fan                          2 (1.7%)
+   Stefan Roese                      2 (1.7%)
+   Sam Protsenko                     2 (1.7%)
+   Bartosz Golaszewski               2 (1.7%)
+   Weijie Gao                        2 (1.7%)
+   Ryder Lee                         2 (1.7%)
+   AKASHI Takahiro                   2 (1.7%)
+   Nick Xie                          2 (1.7%)
+   Adam Ford                         1 (0.8%)
+   Matwey V. Kornilov                1 (0.8%)
+   Kever Yang                        1 (0.8%)
+   Simon Goldschmidt                 1 (0.8%)
+   Marcel Ziswiler                   1 (0.8%)
+   Bernhard Messerklinger            1 (0.8%)
+   Ye Li                             1 (0.8%)
+   Marek Behún                       1 (0.8%)
+   Fabian Vogt                       1 (0.8%)
+   Urja Rannikko                     1 (0.8%)
+   Baruch Siach                      1 (0.8%)
+   Anatolij Gustschin                1 (0.8%)
+   Julius Werner                     1 (0.8%)
+   Chuanhua Han                      1 (0.8%)
+   Niel Fourie                       1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 28)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Fermín Serna                      5 (17.9%)
+   Ramon Fried                       4 (14.3%)
+   Simon Glass                       2 (7.1%)
+   Heinrich Schuchardt               2 (7.1%)
+   Jagan Teki                        2 (7.1%)
+   Sam Protsenko                     2 (7.1%)
+   Fabio Estevam                     2 (7.1%)
+   Marek Vasut                       1 (3.6%)
+   Kever Yang                        1 (3.6%)
+   Michal Simek                      1 (3.6%)
+   Tom Rini                          1 (3.6%)
+   Pontus Fuchs                      1 (3.6%)
+   Andre Heider                      1 (3.6%)
+   Wolfgang Grandegger               1 (3.6%)
+   Ard Biesheuvel                    1 (3.6%)
+   Michael Trimarchi                 1 (3.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 28)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heinrich Schuchardt               7 (25.0%)
+   liucheng (G)                      5 (17.9%)
+   Jagan Teki                        3 (10.7%)
+   Eugeniu Rosca                     3 (10.7%)
+   Anatolij Gustschin                2 (7.1%)
+   Bin Meng                          2 (7.1%)
+   Tom Rini                          1 (3.6%)
+   Simon Goldschmidt                 1 (3.6%)
+   Suniel Mahesh                     1 (3.6%)
+   Thierry Reding                    1 (3.6%)
+   Roman Stratiienko                 1 (3.6%)
+   Luca Ceresoli                     1 (3.6%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         607 (30.2%)
+   Google, Inc.                      253 (12.6%)
+   NXP                               216 (10.8%)
+   Rockchip                          144 (7.2%)
+   ST Microelectronics               140 (7.0%)
+   Texas Instruments                 133 (6.6%)
+   DENX Software Engineering         130 (6.5%)
+   Amarula Solutions                 96 (4.8%)
+   Linaro                            53 (2.6%)
+   BayLibre SAS                      37 (1.8%)
+   Intel                             33 (1.6%)
+   Konsulko Group                    30 (1.5%)
+   Socionext Inc.                    28 (1.4%)
+   ARM                               16 (0.8%)
+   Pepperl+Fuchs                     13 (0.6%)
+   Bootlin                           12 (0.6%)
+   SUSE                              11 (0.5%)
+   Toradex                           11 (0.5%)
+   AMD                               6 (0.3%)
+   Xilinx                            6 (0.3%)
+   Collabora Ltd.                    5 (0.2%)
+   Huawei Technologies               5 (0.2%)
+   IBM                               4 (0.2%)
+   NVidia                            4 (0.2%)
+   National Instruments              3 (0.1%)
+   Samsung                           3 (0.1%)
+   Pengutronix                       2 (0.1%)
+   Ronetix                           2 (0.1%)
+   LWN.net                           1 (0.0%)
+   Marvell                           1 (0.0%)
+   Renesas Electronics               1 (0.0%)
+   Siemens                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         35820 (28.2%)
+   Google, Inc.                      15764 (12.4%)
+   DENX Software Engineering         13966 (11.0%)
+   NXP                               13113 (10.3%)
+   Amarula Solutions                 7993 (6.3%)
+   Texas Instruments                 7484 (5.9%)
+   Rockchip                          7183 (5.7%)
+   ST Microelectronics               5440 (4.3%)
+   Linaro                            4849 (3.8%)
+   BayLibre SAS                      4685 (3.7%)
+   Pengutronix                       2338 (1.8%)
+   Konsulko Group                    2261 (1.8%)
+   Intel                             1677 (1.3%)
+   Socionext Inc.                    1257 (1.0%)
+   Pepperl+Fuchs                     1008 (0.8%)
+   ARM                               669 (0.5%)
+   Collabora Ltd.                    271 (0.2%)
+   Toradex                           246 (0.2%)
+   Ronetix                           198 (0.2%)
+   IBM                               174 (0.1%)
+   SUSE                              128 (0.1%)
+   Xilinx                            114 (0.1%)
+   Bootlin                           96 (0.1%)
+   LWN.net                           59 (0.0%)
+   NVidia                            27 (0.0%)
+   Marvell                           19 (0.0%)
+   AMD                               18 (0.0%)
+   Huawei Technologies               16 (0.0%)
+   Samsung                           14 (0.0%)
+   National Instruments              12 (0.0%)
+   Siemens                           3 (0.0%)
+   Renesas Electronics               2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 335)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Rockchip                          62 (18.5%)
+   (Unknown)                         53 (15.8%)
+   ST Microelectronics               43 (12.8%)
+   DENX Software Engineering         38 (11.3%)
+   Texas Instruments                 27 (8.1%)
+   NXP                               20 (6.0%)
+   Xilinx                            20 (6.0%)
+   NVidia                            16 (4.8%)
+   Konsulko Group                    14 (4.2%)
+   Toradex                           11 (3.3%)
+   SUSE                              10 (3.0%)
+   Amarula Solutions                 6 (1.8%)
+   BayLibre SAS                      6 (1.8%)
+   Linaro                            3 (0.9%)
+   Socionext Inc.                    1 (0.3%)
+   ARM                               1 (0.3%)
+   Marvell                           1 (0.3%)
+   Samsung                           1 (0.3%)
+   Bosch                             1 (0.3%)
+   Sergey Kubushyn                   1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 193)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         96 (49.7%)
+   NXP                               20 (10.4%)
+   Texas Instruments                 11 (5.7%)
+   Linaro                            7 (3.6%)
+   DENX Software Engineering         6 (3.1%)
+   ST Microelectronics               5 (2.6%)
+   SUSE                              4 (2.1%)
+   BayLibre SAS                      4 (2.1%)
+   Intel                             4 (2.1%)
+   NVidia                            3 (1.6%)
+   Toradex                           3 (1.6%)
+   Amarula Solutions                 3 (1.6%)
+   Socionext Inc.                    3 (1.6%)
+   ARM                               3 (1.6%)
+   Rockchip                          2 (1.0%)
+   Google, Inc.                      2 (1.0%)
+   Collabora Ltd.                    2 (1.0%)
+   Xilinx                            1 (0.5%)
+   Konsulko Group                    1 (0.5%)
+   Marvell                           1 (0.5%)
+   Samsung                           1 (0.5%)
+   Pengutronix                       1 (0.5%)
+   Pepperl+Fuchs                     1 (0.5%)
+   Ronetix                           1 (0.5%)
+   IBM                               1 (0.5%)
+   Bootlin                           1 (0.5%)
+   LWN.net                           1 (0.5%)
+   AMD                               1 (0.5%)
+   Huawei Technologies               1 (0.5%)
+   National Instruments              1 (0.5%)
+   Siemens                           1 (0.5%)
+   Renesas Electronics               1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2020.01.rst b/doc/develop/statistics/u-boot-stats-v2020.01.rst
new file mode 100644
index 00000000000..8aa9dc4006d
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2020.01.rst
@@ -0,0 +1,863 @@
+:orphan:
+
+Release Statistics for U-Boot v2020.01
+======================================
+
+* Processed 1826 changesets from 192 developers
+
+* 30 employers found
+
+* A total of 180486 lines added, 41174 removed (delta 139312)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       235 (12.9%)
+   Peng Fan                          124 (6.8%)
+   Michal Simek                      95 (5.2%)
+   Tom Rini                          70 (3.8%)
+   Heinrich Schuchardt               49 (2.7%)
+   Lokesh Vutla                      44 (2.4%)
+   Kever Yang                        42 (2.3%)
+   Lukasz Majewski                   41 (2.2%)
+   Fabio Estevam                     40 (2.2%)
+   Marek Vasut                       39 (2.1%)
+   AKASHI Takahiro                   30 (1.6%)
+   Vignesh Raghavendra               29 (1.6%)
+   Patrick Delaunay                  29 (1.6%)
+   Siva Durga Prasad Paladugu        28 (1.5%)
+   Weijie Gao                        28 (1.5%)
+   Jean-Jacques Hiblot               26 (1.4%)
+   Jagan Teki                        23 (1.3%)
+   Eugen Hristev                     23 (1.3%)
+   Miquel Raynal                     22 (1.2%)
+   Alex Marginean                    21 (1.2%)
+   Adam Ford                         20 (1.1%)
+   Igor Opaniuk                      20 (1.1%)
+   Yinbo Zhu                         20 (1.1%)
+   Bin Meng                          19 (1.0%)
+   Grygorii Strashko                 18 (1.0%)
+   Heiko Stuebner                    18 (1.0%)
+   Ye Li                             18 (1.0%)
+   Matthias Brugger                  17 (0.9%)
+   Anatolij Gustschin                16 (0.9%)
+   Patrice Chotard                   16 (0.9%)
+   Faiz Abbas                        16 (0.9%)
+   Neil Armstrong                    16 (0.9%)
+   Andy Yan                          15 (0.8%)
+   Ibai Erkiaga                      15 (0.8%)
+   Yangbo Lu                         14 (0.8%)
+   Heiko Schocher                    14 (0.8%)
+   T Karthik Reddy                   14 (0.8%)
+   Yannick Fertré                    14 (0.8%)
+   Suman Anna                        12 (0.7%)
+   Keerthy                           12 (0.7%)
+   Thomas Hebb                       11 (0.6%)
+   Simon Goldschmidt                 11 (0.6%)
+   Rick Chen                         11 (0.6%)
+   Patrick Wildt                     11 (0.6%)
+   Philippe Reynes                   11 (0.6%)
+   Tero Kristo                       11 (0.6%)
+   Álvaro Fernández Rojas            10 (0.5%)
+   Peng Ma                           8 (0.4%)
+   YouMin Chen                       8 (0.4%)
+   Troy Kisky                        7 (0.4%)
+   David Wu                          7 (0.4%)
+   Parthiban Nallathambi             7 (0.4%)
+   Marek Szyprowski                  7 (0.4%)
+   Tudor Ambarus                     7 (0.4%)
+   Kursad Oney                       7 (0.4%)
+   Andreas Dannenberg                7 (0.4%)
+   Michael Walle                     6 (0.3%)
+   Stefan Roese                      6 (0.3%)
+   Laurentiu Tudor                   6 (0.3%)
+   Sam Protsenko                     6 (0.3%)
+   Ryder Lee                         6 (0.3%)
+   Breno Matheus Lima                6 (0.3%)
+   Stefano Babic                     5 (0.3%)
+   Rasmus Villemoes                  5 (0.3%)
+   Peter Robinson                    5 (0.3%)
+   Lukas Auer                        5 (0.3%)
+   Nicolas Ferre                     5 (0.3%)
+   Joris Offouga                     5 (0.3%)
+   Frieder Schrempf                  5 (0.3%)
+   Bartosz Golaszewski               5 (0.3%)
+   mingming lee                      5 (0.3%)
+   Soeren Moch                       5 (0.3%)
+   Simon South                       5 (0.3%)
+   Claudius Heine                    5 (0.3%)
+   Otavio Salvador                   5 (0.3%)
+   Jacky Bai                         5 (0.3%)
+   Sandeep Sheriker Mallikarjun      5 (0.3%)
+   Robert Beckett                    4 (0.2%)
+   Roger Quadros                     4 (0.2%)
+   Joe Hershberger                   4 (0.2%)
+   Michael Trimarchi                 4 (0.2%)
+   Biwen Li                          4 (0.2%)
+   Vasily Khoruzhick                 4 (0.2%)
+   Elaine Zhang                      4 (0.2%)
+   Joseph Chen                       4 (0.2%)
+   Andreas Färber                    4 (0.2%)
+   Ricardo Salveti                   4 (0.2%)
+   Dario Binacchi                    3 (0.2%)
+   Jeffy Chen                        3 (0.2%)
+   Ben Wolsieffer                    3 (0.2%)
+   Nevo Hed                          3 (0.2%)
+   Paul Kocialkowski                 3 (0.2%)
+   Giulio Benetti                    3 (0.2%)
+   James Byrne                       3 (0.2%)
+   Pankaj Bansal                     3 (0.2%)
+   Baruch Siach                      3 (0.2%)
+   Yuantian Tang                     3 (0.2%)
+   Ley Foon Tan                      3 (0.2%)
+   Udit Agarwal                      3 (0.2%)
+   Sébastien Szymanski               3 (0.2%)
+   Robert Hancock                    3 (0.2%)
+   Alexey Brodkin                    3 (0.2%)
+   Eugeniy Paltsev                   3 (0.2%)
+   James Doublesin                   3 (0.2%)
+   Ashok Reddy Soma                  3 (0.2%)
+   Kuldeep Singh                     3 (0.2%)
+   Sjoerd Simons                     3 (0.2%)
+   Krunal Bhargav                    3 (0.2%)
+   Sergei Trofimovich                2 (0.1%)
+   Jorge Ramirez-Ortiz               2 (0.1%)
+   Ramon Fried                       2 (0.1%)
+   Hannes Schmelzer                  2 (0.1%)
+   Josef Holzmayr                    2 (0.1%)
+   Priyanka Jain                     2 (0.1%)
+   Masahiro Yamada                   2 (0.1%)
+   Ooi, Joyce                        2 (0.1%)
+   Finley Xiao                       2 (0.1%)
+   Mathew McBride                    2 (0.1%)
+   Andrew F. Davis                   2 (0.1%)
+   Alexander Dahl                    2 (0.1%)
+   Ralph Siemsen                     2 (0.1%)
+   Rajan Vaja                        2 (0.1%)
+   Harini Katakam                    2 (0.1%)
+   Nishant Mittal                    2 (0.1%)
+   Guillaume La Roque                2 (0.1%)
+   Sagar Shrikant Kadam              2 (0.1%)
+   Thomas Fitzsimmons                2 (0.1%)
+   Jun Nie                           2 (0.1%)
+   Shawn Guo                         2 (0.1%)
+   Mans Rullgard                     2 (0.1%)
+   Moses Christopher                 2 (0.1%)
+   Oleksandr Rybalko                 2 (0.1%)
+   Yann Gautier                      2 (0.1%)
+   Kevin Scholz                      1 (0.1%)
+   Stephen Warren                    1 (0.1%)
+   Robert P. J. Day                  1 (0.1%)
+   Patrik Dahlström                  1 (0.1%)
+   Jack Mitchell                     1 (0.1%)
+   Andy Shevchenko                   1 (0.1%)
+   Diego Rondini                     1 (0.1%)
+   Michael Auchter                   1 (0.1%)
+   Swapna Gurumani                   1 (0.1%)
+   Cédric Le Goater                  1 (0.1%)
+   Andre Przywara                    1 (0.1%)
+   Florin Laurentiu Chiculita        1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Thierry Reding                    1 (0.1%)
+   Grzegorz Jaszczyk                 1 (0.1%)
+   Stefan Chulski                    1 (0.1%)
+   Abhishek Shah                     1 (0.1%)
+   Lihua Zhao                        1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Wen He                            1 (0.1%)
+   Levin Du                          1 (0.1%)
+   Cristian Ciocaltea                1 (0.1%)
+   Vignesh Rajendran                 1 (0.1%)
+   Emmanuel Vadot                    1 (0.1%)
+   Xiaowei Bao                       1 (0.1%)
+   Chunfeng Yun                      1 (0.1%)
+   liu hao                           1 (0.1%)
+   Sherry Sun                        1 (0.1%)
+   Oliver Graute                     1 (0.1%)
+   Manivannan Sadhasivam             1 (0.1%)
+   Michal Sojka                      1 (0.1%)
+   Roman Kapl                        1 (0.1%)
+   Walter Lozano                     1 (0.1%)
+   Dmitry Torokhov                   1 (0.1%)
+   William Zhang                     1 (0.1%)
+   Icenowy Zheng                     1 (0.1%)
+   Clément Péron                     1 (0.1%)
+   Stefan Mavrodiev                  1 (0.1%)
+   Sunil Mohan Adapa                 1 (0.1%)
+   Jernej Skrabec                    1 (0.1%)
+   Naga Sureshkumar Relli            1 (0.1%)
+   Venkatesh Yadav Abbarapu          1 (0.1%)
+   Shubhrajyoti Datta                1 (0.1%)
+   Wasim Khan                        1 (0.1%)
+   Ran Wang                          1 (0.1%)
+   Daniel Drake                      1 (0.1%)
+   Atish Patra                       1 (0.1%)
+   Quentin Schulz                    1 (0.1%)
+   Douglas Anderson                  1 (0.1%)
+   Daniele Alessandrelli             1 (0.1%)
+   Kayla Theil                       1 (0.1%)
+   Shyam Saini                       1 (0.1%)
+   Jarkko Nikula                     1 (0.1%)
+   Kedar Chitnis                     1 (0.1%)
+   Arun Parameswaran                 1 (0.1%)
+   Saravanan Sekar                   1 (0.1%)
+   Fabio Berton                      1 (0.1%)
+   Vipul Kumar                       1 (0.1%)
+   Mian Yousaf Kaukab                1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Kevin Scholz                      32102 (16.6%)
+   Peng Fan                          18461 (9.5%)
+   Tom Rini                          13903 (7.2%)
+   Lokesh Vutla                      8837 (4.6%)
+   Simon Glass                       7574 (3.9%)
+   AKASHI Takahiro                   7491 (3.9%)
+   Vignesh Raghavendra               7427 (3.8%)
+   Michal Simek                      7352 (3.8%)
+   Kever Yang                        5101 (2.6%)
+   Daniel Schwierzeck                4671 (2.4%)
+   Andy Yan                          4421 (2.3%)
+   Heiko Stuebner                    4193 (2.2%)
+   Yannick Fertré                    3941 (2.0%)
+   Faiz Abbas                        3748 (1.9%)
+   Andreas Färber                    3705 (1.9%)
+   Neil Armstrong                    3053 (1.6%)
+   YouMin Chen                       3013 (1.6%)
+   Fabio Estevam                     3001 (1.5%)
+   mingming lee                      2890 (1.5%)
+   Patrick Wildt                     2540 (1.3%)
+   Lukasz Majewski                   2442 (1.3%)
+   Patrick Delaunay                  2228 (1.1%)
+   Weijie Gao                        2006 (1.0%)
+   Miquel Raynal                     1830 (0.9%)
+   Patrice Chotard                   1701 (0.9%)
+   Finley Xiao                       1646 (0.8%)
+   Heinrich Schuchardt               1510 (0.8%)
+   Siva Durga Prasad Paladugu        1425 (0.7%)
+   Igor Opaniuk                      1292 (0.7%)
+   Hannes Schmelzer                  1125 (0.6%)
+   Oliver Graute                     1107 (0.6%)
+   David Wu                          1100 (0.6%)
+   Ryder Lee                         1066 (0.5%)
+   Elaine Zhang                      1056 (0.5%)
+   Tero Kristo                       964 (0.5%)
+   Jean-Jacques Hiblot               950 (0.5%)
+   Heiko Schocher                    927 (0.5%)
+   Marek Vasut                       909 (0.5%)
+   Eugen Hristev                     870 (0.4%)
+   Sandeep Sheriker Mallikarjun      856 (0.4%)
+   Troy Kisky                        822 (0.4%)
+   Sam Protsenko                     771 (0.4%)
+   Shawn Guo                         721 (0.4%)
+   Keerthy                           656 (0.3%)
+   Peng Ma                           640 (0.3%)
+   Bin Meng                          627 (0.3%)
+   Rick Chen                         627 (0.3%)
+   Ibai Erkiaga                      626 (0.3%)
+   Joseph Chen                       622 (0.3%)
+   Jagan Teki                        597 (0.3%)
+   liu hao                           556 (0.3%)
+   Anatolij Gustschin                484 (0.2%)
+   Nicolas Ferre                     480 (0.2%)
+   Grygorii Strashko                 475 (0.2%)
+   Alex Marginean                    457 (0.2%)
+   Yangbo Lu                         451 (0.2%)
+   Suman Anna                        418 (0.2%)
+   Tudor Ambarus                     365 (0.2%)
+   Jacky Bai                         341 (0.2%)
+   James Doublesin                   316 (0.2%)
+   Manivannan Sadhasivam             299 (0.2%)
+   Matthias Brugger                  294 (0.2%)
+   Álvaro Fernández Rojas            288 (0.1%)
+   Ye Li                             286 (0.1%)
+   T Karthik Reddy                   275 (0.1%)
+   Arun Parameswaran                 271 (0.1%)
+   Roger Quadros                     247 (0.1%)
+   Jeffy Chen                        243 (0.1%)
+   Adam Ford                         235 (0.1%)
+   Sagar Shrikant Kadam              229 (0.1%)
+   Otavio Salvador                   226 (0.1%)
+   Philippe Reynes                   219 (0.1%)
+   Joris Offouga                     212 (0.1%)
+   Michael Trimarchi                 206 (0.1%)
+   Nevo Hed                          197 (0.1%)
+   Vasily Khoruzhick                 177 (0.1%)
+   Guillaume La Roque                172 (0.1%)
+   Diego Rondini                     165 (0.1%)
+   Soeren Moch                       158 (0.1%)
+   William Zhang                     156 (0.1%)
+   Rajan Vaja                        154 (0.1%)
+   Eugeniy Paltsev                   150 (0.1%)
+   Moses Christopher                 145 (0.1%)
+   Rasmus Villemoes                  136 (0.1%)
+   Udit Agarwal                      134 (0.1%)
+   Clément Péron                     131 (0.1%)
+   Andreas Dannenberg                129 (0.1%)
+   Laurentiu Tudor                   127 (0.1%)
+   Sébastien Szymanski               119 (0.1%)
+   Yinbo Zhu                         109 (0.1%)
+   Breno Matheus Lima                109 (0.1%)
+   Paul Kocialkowski                 109 (0.1%)
+   Parthiban Nallathambi             106 (0.1%)
+   Lukas Auer                        102 (0.1%)
+   Simon Goldschmidt                 94 (0.0%)
+   Stefan Roese                      92 (0.0%)
+   Douglas Anderson                  85 (0.0%)
+   Bartosz Golaszewski               83 (0.0%)
+   Kursad Oney                       71 (0.0%)
+   Peter Robinson                    71 (0.0%)
+   Robert Hancock                    65 (0.0%)
+   Stefano Babic                     64 (0.0%)
+   Alexey Brodkin                    63 (0.0%)
+   Cristian Ciocaltea                63 (0.0%)
+   Quentin Schulz                    61 (0.0%)
+   Naga Sureshkumar Relli            59 (0.0%)
+   Thomas Hebb                       57 (0.0%)
+   Joe Hershberger                   57 (0.0%)
+   Yuantian Tang                     57 (0.0%)
+   Jernej Skrabec                    54 (0.0%)
+   Frieder Schrempf                  53 (0.0%)
+   Yann Gautier                      53 (0.0%)
+   Lihua Zhao                        53 (0.0%)
+   Sunil Mohan Adapa                 46 (0.0%)
+   Daniel Drake                      37 (0.0%)
+   Marek Szyprowski                  36 (0.0%)
+   Claudius Heine                    36 (0.0%)
+   James Byrne                       35 (0.0%)
+   Sjoerd Simons                     34 (0.0%)
+   Michael Walle                     31 (0.0%)
+   Mans Rullgard                     30 (0.0%)
+   Krunal Bhargav                    29 (0.0%)
+   Ramon Fried                       27 (0.0%)
+   Jun Nie                           27 (0.0%)
+   Robert P. J. Day                  26 (0.0%)
+   Simon South                       25 (0.0%)
+   Josef Holzmayr                    25 (0.0%)
+   Sherry Sun                        25 (0.0%)
+   Grzegorz Jaszczyk                 23 (0.0%)
+   Jorge Ramirez-Ortiz               21 (0.0%)
+   Ashok Reddy Soma                  20 (0.0%)
+   Shubhrajyoti Datta                19 (0.0%)
+   Ley Foon Tan                      18 (0.0%)
+   Biwen Li                          16 (0.0%)
+   Ricardo Salveti                   15 (0.0%)
+   Florin Laurentiu Chiculita        15 (0.0%)
+   Ran Wang                          15 (0.0%)
+   Stefan Chulski                    14 (0.0%)
+   Mian Yousaf Kaukab                14 (0.0%)
+   Alexander Dahl                    12 (0.0%)
+   Icenowy Zheng                     12 (0.0%)
+   Roman Kapl                        11 (0.0%)
+   Kuldeep Singh                     10 (0.0%)
+   Chris Packham                     10 (0.0%)
+   Levin Du                          10 (0.0%)
+   Pankaj Bansal                     9 (0.0%)
+   Harini Katakam                    9 (0.0%)
+   Thomas Fitzsimmons                9 (0.0%)
+   Giulio Benetti                    8 (0.0%)
+   Masahiro Yamada                   8 (0.0%)
+   Oleksandr Rybalko                 8 (0.0%)
+   Swapna Gurumani                   8 (0.0%)
+   Cédric Le Goater                  8 (0.0%)
+   Baruch Siach                      6 (0.0%)
+   Mathew McBride                    6 (0.0%)
+   Atish Patra                       6 (0.0%)
+   Robert Beckett                    5 (0.0%)
+   Priyanka Jain                     5 (0.0%)
+   Nishant Mittal                    5 (0.0%)
+   Emmanuel Vadot                    5 (0.0%)
+   Dmitry Torokhov                   5 (0.0%)
+   Ben Wolsieffer                    4 (0.0%)
+   Wasim Khan                        4 (0.0%)
+   Shyam Saini                       4 (0.0%)
+   Kedar Chitnis                     4 (0.0%)
+   Dario Binacchi                    3 (0.0%)
+   Sergei Trofimovich                3 (0.0%)
+   Andrew F. Davis                   3 (0.0%)
+   Andy Shevchenko                   3 (0.0%)
+   Vignesh Rajendran                 3 (0.0%)
+   Michal Sojka                      3 (0.0%)
+   Ooi, Joyce                        2 (0.0%)
+   Ralph Siemsen                     2 (0.0%)
+   Wen He                            2 (0.0%)
+   Daniele Alessandrelli             2 (0.0%)
+   Kayla Theil                       2 (0.0%)
+   Saravanan Sekar                   2 (0.0%)
+   Stephen Warren                    1 (0.0%)
+   Patrik Dahlström                  1 (0.0%)
+   Jack Mitchell                     1 (0.0%)
+   Michael Auchter                   1 (0.0%)
+   Andre Przywara                    1 (0.0%)
+   Thierry Reding                    1 (0.0%)
+   Abhishek Shah                     1 (0.0%)
+   Xiaowei Bao                       1 (0.0%)
+   Chunfeng Yun                      1 (0.0%)
+   Walter Lozano                     1 (0.0%)
+   Stefan Mavrodiev                  1 (0.0%)
+   Venkatesh Yadav Abbarapu          1 (0.0%)
+   Jarkko Nikula                     1 (0.0%)
+   Fabio Berton                      1 (0.0%)
+   Vipul Kumar                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Daniel Schwierzeck                4671 (11.3%)
+   Yangbo Lu                         289 (0.7%)
+   Nevo Hed                          139 (0.3%)
+   Jacky Bai                         109 (0.3%)
+   Sébastien Szymanski               90 (0.2%)
+   William Zhang                     52 (0.1%)
+   Soeren Moch                       49 (0.1%)
+   Rasmus Villemoes                  48 (0.1%)
+   Bartosz Golaszewski               17 (0.0%)
+   Jun Nie                           14 (0.0%)
+   Mian Yousaf Kaukab                14 (0.0%)
+   Alexey Brodkin                    12 (0.0%)
+   Chris Packham                     10 (0.0%)
+   Stefano Babic                     5 (0.0%)
+   Josef Holzmayr                    5 (0.0%)
+   Masahiro Yamada                   4 (0.0%)
+   Frieder Schrempf                  3 (0.0%)
+   Andrew F. Davis                   2 (0.0%)
+   Daniele Alessandrelli             1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 322)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      68 (21.1%)
+   Bin Meng                          32 (9.9%)
+   Priyanka Jain                     26 (8.1%)
+   Lokesh Vutla                      18 (5.6%)
+   Peng Fan                          14 (4.3%)
+   Otavio Salvador                   13 (4.0%)
+   YouMin Chen                       13 (4.0%)
+   Tom Rini                          10 (3.1%)
+   Kever Yang                        10 (3.1%)
+   Siva Durga Prasad Paladugu        9 (2.8%)
+   Frank Wunderlich                  8 (2.5%)
+   Jean-Jacques Hiblot               7 (2.2%)
+   Keerthy                           7 (2.2%)
+   Neil Armstrong                    7 (2.2%)
+   Suman Anna                        6 (1.9%)
+   Heiko Stuebner                    5 (1.6%)
+   Tudor Ambarus                     4 (1.2%)
+   Jagan Teki                        4 (1.2%)
+   Simon Glass                       4 (1.2%)
+   Alexey Brodkin                    3 (0.9%)
+   Fabio Berton                      3 (0.9%)
+   Heinrich Schuchardt               3 (0.9%)
+   Elaine Zhang                      3 (0.9%)
+   Stefano Babic                     2 (0.6%)
+   Stefan Agner                      2 (0.6%)
+   Vladimir Olovyannikov             2 (0.6%)
+   Ashish Kumar                      2 (0.6%)
+   Claudiu Beznea                    2 (0.6%)
+   Stefan Roese                      2 (0.6%)
+   Ye Li                             2 (0.6%)
+   Anatolij Gustschin                2 (0.6%)
+   Nicolas Ferre                     2 (0.6%)
+   Lukasz Majewski                   2 (0.6%)
+   Kevin Scholz                      2 (0.6%)
+   Nevo Hed                          1 (0.3%)
+   Razvan Ionut Cirjan               1 (0.3%)
+   Sanchayan Maity                   1 (0.3%)
+   Philipp Tomsich                   1 (0.3%)
+   Chee Hong Ang                     1 (0.3%)
+   Veeraiyan Chidambaram             1 (0.3%)
+   Steven Hao                        1 (0.3%)
+   Anti Sullin                       1 (0.3%)
+   Christophe Kerello                1 (0.3%)
+   Corneliu Doban                    1 (0.3%)
+   Pramod Kumar                      1 (0.3%)
+   Pavithra Ravi                     1 (0.3%)
+   Bharat Kumar Reddy Gooty          1 (0.3%)
+   Prasanthi Chellakumar             1 (0.3%)
+   Harini Katakam                    1 (0.3%)
+   Florin Laurentiu Chiculita        1 (0.3%)
+   Ashok Reddy Soma                  1 (0.3%)
+   Ibai Erkiaga                      1 (0.3%)
+   Eugen Hristev                     1 (0.3%)
+   Tero Kristo                       1 (0.3%)
+   Fabio Estevam                     1 (0.3%)
+   Andy Yan                          1 (0.3%)
+   Vignesh Raghavendra               1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 709)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          144 (20.3%)
+   Kever Yang                        92 (13.0%)
+   Tom Rini                          54 (7.6%)
+   Simon Glass                       53 (7.5%)
+   Priyanka Jain                     52 (7.3%)
+   Peng Fan                          27 (3.8%)
+   Fabio Estevam                     24 (3.4%)
+   Stefan Roese                      22 (3.1%)
+   Jagan Teki                        16 (2.3%)
+   Oleksandr Suvorov                 16 (2.3%)
+   Boris Brezillon                   13 (1.8%)
+   Heinrich Schuchardt               10 (1.4%)
+   Anatolij Gustschin                10 (1.4%)
+   Ye Li                             9 (1.3%)
+   Ley Foon Tan                      9 (1.3%)
+   Simon Goldschmidt                 9 (1.3%)
+   Daniel Schwierzeck                8 (1.1%)
+   Philippe Reynes                   8 (1.1%)
+   Lukasz Majewski                   7 (1.0%)
+   Stephen Warren                    7 (1.0%)
+   Grygorii Strashko                 7 (1.0%)
+   Frieder Schrempf                  6 (0.8%)
+   Luca Ceresoli                     6 (0.8%)
+   Ramon Fried                       6 (0.8%)
+   Patrice Chotard                   6 (0.8%)
+   Rick Chen                         6 (0.8%)
+   Lokesh Vutla                      5 (0.7%)
+   Bartosz Golaszewski               5 (0.7%)
+   Chris Packham                     5 (0.7%)
+   Anup Patel                        5 (0.7%)
+   Horia Geanta                      5 (0.7%)
+   Heiko Schocher                    5 (0.7%)
+   Philipp Tomsich                   4 (0.6%)
+   Fabien Dessenne                   4 (0.6%)
+   Tudor Ambarus                     3 (0.4%)
+   Kursad Oney                       3 (0.4%)
+   Alex Marginean                    3 (0.4%)
+   Igor Opaniuk                      3 (0.4%)
+   Otavio Salvador                   2 (0.3%)
+   Neil Armstrong                    2 (0.3%)
+   Heiko Stuebner                    2 (0.3%)
+   Igal Liberman                     2 (0.3%)
+   Jens Wiklander                    2 (0.3%)
+   Patrick Wildt                     2 (0.3%)
+   Patrick Delaunay                  2 (0.3%)
+   Michal Simek                      1 (0.1%)
+   Jean-Jacques Hiblot               1 (0.1%)
+   Stefano Babic                     1 (0.1%)
+   Eugen Hristev                     1 (0.1%)
+   Ralph Siemsen                     1 (0.1%)
+   Andre Przywara                    1 (0.1%)
+   Joel Stanley                      1 (0.1%)
+   Eric Nelson                       1 (0.1%)
+   Wolfgang Grandegger               1 (0.1%)
+   Hou Zhiqiang                      1 (0.1%)
+   Aiden Park                        1 (0.1%)
+   Eugeniu Rosca                     1 (0.1%)
+   Maxime Ripard                     1 (0.1%)
+   Joe Hershberger                   1 (0.1%)
+   Peter Robinson                    1 (0.1%)
+   Michael Trimarchi                 1 (0.1%)
+   Roger Quadros                     1 (0.1%)
+   Marek Vasut                       1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 143)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          41 (28.7%)
+   Stephen Warren                    14 (9.8%)
+   Simon Glass                       11 (7.7%)
+   Levin Du                          8 (5.6%)
+   Frank Wunderlich                  6 (4.2%)
+   Frieder Schrempf                  5 (3.5%)
+   Bartosz Golaszewski               5 (3.5%)
+   Max Krummenacher                  5 (3.5%)
+   Chris Packham                     4 (2.8%)
+   Jagan Teki                        3 (2.1%)
+   Rick Chen                         3 (2.1%)
+   Joris Offouga                     3 (2.1%)
+   Tom Rini                          2 (1.4%)
+   Heinrich Schuchardt               2 (1.4%)
+   Simon Goldschmidt                 2 (1.4%)
+   Patrice Chotard                   2 (1.4%)
+   Igal Liberman                     2 (1.4%)
+   Eugen Hristev                     2 (1.4%)
+   Peter Robinson                    2 (1.4%)
+   Steffen Dirkwinkel                2 (1.4%)
+   Adam Ford                         2 (1.4%)
+   Fabio Estevam                     1 (0.7%)
+   Fabien Dessenne                   1 (0.7%)
+   Alex Marginean                    1 (0.7%)
+   Patrick Wildt                     1 (0.7%)
+   Aiden Park                        1 (0.7%)
+   Suman Anna                        1 (0.7%)
+   Aurelien Jarno                    1 (0.7%)
+   David Abdurachmanov               1 (0.7%)
+   Pierre-Jean Texier                1 (0.7%)
+   Anand Moon                        1 (0.7%)
+   Guillaume Gardet                  1 (0.7%)
+   thomas graichen                   1 (0.7%)
+   Robby Cai                         1 (0.7%)
+   Michael Walle                     1 (0.7%)
+   Cristian Ciocaltea                1 (0.7%)
+   Eugeniy Paltsev                   1 (0.7%)
+   Manivannan Sadhasivam             1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 143)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       37 (25.9%)
+   Tom Rini                          24 (16.8%)
+   Anatolij Gustschin                10 (7.0%)
+   Jagan Teki                        9 (6.3%)
+   Peng Fan                          7 (4.9%)
+   Adam Ford                         5 (3.5%)
+   Igor Opaniuk                      5 (3.5%)
+   Lukas Auer                        5 (3.5%)
+   Ryder Lee                         4 (2.8%)
+   Heinrich Schuchardt               3 (2.1%)
+   Vignesh Raghavendra               3 (2.1%)
+   Bin Meng                          2 (1.4%)
+   Fabio Estevam                     2 (1.4%)
+   Patrick Wildt                     2 (1.4%)
+   Lokesh Vutla                      2 (1.4%)
+   Marek Vasut                       2 (1.4%)
+   Masahiro Yamada                   2 (1.4%)
+   Oleksandr Rybalko                 2 (1.4%)
+   Matthias Brugger                  2 (1.4%)
+   Peter Robinson                    1 (0.7%)
+   Michael Walle                     1 (0.7%)
+   Jean-Jacques Hiblot               1 (0.7%)
+   Jacky Bai                         1 (0.7%)
+   Jun Nie                           1 (0.7%)
+   Stefan Chulski                    1 (0.7%)
+   Emmanuel Vadot                    1 (0.7%)
+   Pankaj Bansal                     1 (0.7%)
+   Grzegorz Jaszczyk                 1 (0.7%)
+   Jernej Skrabec                    1 (0.7%)
+   Robert Hancock                    1 (0.7%)
+   Vasily Khoruzhick                 1 (0.7%)
+   Sagar Shrikant Kadam              1 (0.7%)
+   T Karthik Reddy                   1 (0.7%)
+   Shawn Guo                         1 (0.7%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 27)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          2 (7.4%)
+   Anatolij Gustschin                2 (7.4%)
+   Heinrich Schuchardt               2 (7.4%)
+   Rick Chen                         2 (7.4%)
+   Luca Ceresoli                     2 (7.4%)
+   Faiz Abbas                        2 (7.4%)
+   Jagan Teki                        1 (3.7%)
+   Peter Robinson                    1 (3.7%)
+   Joris Offouga                     1 (3.7%)
+   Aurelien Jarno                    1 (3.7%)
+   Cristian Ciocaltea                1 (3.7%)
+   Eugeniy Paltsev                   1 (3.7%)
+   Tero Kristo                       1 (3.7%)
+   Andrew F. Davis                   1 (3.7%)
+   Dan Murphy                        1 (3.7%)
+   Ondrej Jirman                     1 (3.7%)
+   Gray Remlin                       1 (3.7%)
+   Christophe Priouzeau              1 (3.7%)
+   Richard Woodruff                  1 (3.7%)
+   Andy Shevchenko                   1 (3.7%)
+   Sam Protsenko                     1 (3.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 27)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Lokesh Vutla                      4 (14.8%)
+   Lukas Auer                        3 (11.1%)
+   Vignesh Raghavendra               3 (11.1%)
+   Matthias Brugger                  3 (11.1%)
+   Heinrich Schuchardt               2 (7.4%)
+   Fabio Estevam                     2 (7.4%)
+   Michal Simek                      2 (7.4%)
+   Tom Rini                          1 (3.7%)
+   Anatolij Gustschin                1 (3.7%)
+   Jagan Teki                        1 (3.7%)
+   Peng Fan                          1 (3.7%)
+   Patrice Chotard                   1 (3.7%)
+   Joe Hershberger                   1 (3.7%)
+   Keerthy                           1 (3.7%)
+   Breno Matheus Lima                1 (3.7%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         429 (23.5%)
+   NXP                               247 (13.5%)
+   Google, Inc.                      236 (12.9%)
+   Texas Instruments                 189 (10.4%)
+   DENX Software Engineering         133 (7.3%)
+   AMD                               95 (5.2%)
+   Rockchip                          84 (4.6%)
+   Konsulko Group                    70 (3.8%)
+   Xilinx                            70 (3.8%)
+   ST Microelectronics               61 (3.3%)
+   Linaro                            43 (2.4%)
+   Amarula Solutions                 28 (1.5%)
+   Bootlin                           26 (1.4%)
+   BayLibre SAS                      23 (1.3%)
+   SUSE                              22 (1.2%)
+   Pepperl+Fuchs                     11 (0.6%)
+   Broadcom                          10 (0.5%)
+   Collabora Ltd.                    8 (0.4%)
+   Boundary Devices                  7 (0.4%)
+   Samsung                           7 (0.4%)
+   Intel                             6 (0.3%)
+   O.S. Systems                      6 (0.3%)
+   National Instruments              5 (0.3%)
+   Gentoo                            2 (0.1%)
+   NVidia                            2 (0.1%)
+   Socionext Inc.                    2 (0.1%)
+   ARM                               1 (0.1%)
+   Wind River                        1 (0.1%)
+   Marvell                           1 (0.1%)
+   Semihalf Embedded Systems         1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Texas Instruments                 56305 (29.0%)
+   (Unknown)                         34059 (17.6%)
+   NXP                               21275 (11.0%)
+   Rockchip                          16479 (8.5%)
+   Konsulko Group                    13903 (7.2%)
+   Linaro                            9311 (4.8%)
+   ST Microelectronics               7923 (4.1%)
+   Google, Inc.                      7659 (3.9%)
+   AMD                               7352 (3.8%)
+   DENX Software Engineering         5060 (2.6%)
+   SUSE                              4013 (2.1%)
+   BayLibre SAS                      3308 (1.7%)
+   Xilinx                            2594 (1.3%)
+   Bootlin                           2000 (1.0%)
+   Boundary Devices                  822 (0.4%)
+   Amarula Solutions                 807 (0.4%)
+   Broadcom                          499 (0.3%)
+   O.S. Systems                      227 (0.1%)
+   Pepperl+Fuchs                     94 (0.0%)
+   National Instruments              58 (0.0%)
+   Wind River                        53 (0.0%)
+   Collabora Ltd.                    40 (0.0%)
+   Samsung                           36 (0.0%)
+   Intel                             23 (0.0%)
+   Semihalf Embedded Systems         23 (0.0%)
+   Marvell                           14 (0.0%)
+   Socionext Inc.                    8 (0.0%)
+   Gentoo                            3 (0.0%)
+   NVidia                            2 (0.0%)
+   ARM                               1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 322)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Xilinx                            80 (24.8%)
+   (Unknown)                         66 (20.5%)
+   NXP                               46 (14.3%)
+   Texas Instruments                 42 (13.0%)
+   Rockchip                          27 (8.4%)
+   O.S. Systems                      16 (5.0%)
+   Konsulko Group                    10 (3.1%)
+   DENX Software Engineering         8 (2.5%)
+   BayLibre SAS                      7 (2.2%)
+   Broadcom                          6 (1.9%)
+   Google, Inc.                      4 (1.2%)
+   Amarula Solutions                 4 (1.2%)
+   Toradex                           3 (0.9%)
+   ST Microelectronics               1 (0.3%)
+   Intel                             1 (0.3%)
+   Artec Design                      1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 194)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         79 (40.7%)
+   NXP                               22 (11.3%)
+   Texas Instruments                 15 (7.7%)
+   Xilinx                            11 (5.7%)
+   Rockchip                          8 (4.1%)
+   DENX Software Engineering         8 (4.1%)
+   Linaro                            6 (3.1%)
+   Broadcom                          4 (2.1%)
+   ST Microelectronics               4 (2.1%)
+   BayLibre SAS                      3 (1.5%)
+   Amarula Solutions                 3 (1.5%)
+   Intel                             3 (1.5%)
+   SUSE                              3 (1.5%)
+   Bootlin                           3 (1.5%)
+   Collabora Ltd.                    3 (1.5%)
+   O.S. Systems                      2 (1.0%)
+   Google, Inc.                      2 (1.0%)
+   National Instruments              2 (1.0%)
+   NVidia                            2 (1.0%)
+   Konsulko Group                    1 (0.5%)
+   AMD                               1 (0.5%)
+   Boundary Devices                  1 (0.5%)
+   Pepperl+Fuchs                     1 (0.5%)
+   Wind River                        1 (0.5%)
+   Samsung                           1 (0.5%)
+   Semihalf Embedded Systems         1 (0.5%)
+   Marvell                           1 (0.5%)
+   Socionext Inc.                    1 (0.5%)
+   Gentoo                            1 (0.5%)
+   ARM                               1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2020.04.rst b/doc/develop/statistics/u-boot-stats-v2020.04.rst
new file mode 100644
index 00000000000..c3f839f8982
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2020.04.rst
@@ -0,0 +1,855 @@
+:orphan:
+
+Release Statistics for U-Boot v2020.04
+======================================
+
+* Processed 1639 changesets from 189 developers
+
+* 30 employers found
+
+* A total of 108344 lines added, 33382 removed (delta 74962)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       309 (18.9%)
+   Heinrich Schuchardt               82 (5.0%)
+   Marek Vasut                       54 (3.3%)
+   Vignesh Raghavendra               49 (3.0%)
+   Michal Simek                      45 (2.7%)
+   Masahiro Yamada                   38 (2.3%)
+   Igor Opaniuk                      36 (2.2%)
+   Heiko Schocher                    32 (2.0%)
+   Fabio Estevam                     31 (1.9%)
+   Jagan Teki                        30 (1.8%)
+   Ley Foon Tan                      29 (1.8%)
+   Tom Rini                          28 (1.7%)
+   Peng Fan                          28 (1.7%)
+   Giulio Benetti                    27 (1.6%)
+   Faiz Abbas                        27 (1.6%)
+   Ran Wang                          23 (1.4%)
+   Patrick Delaunay                  21 (1.3%)
+   Baruch Siach                      21 (1.3%)
+   Philippe Reynes                   20 (1.2%)
+   Robert Beckett                    19 (1.2%)
+   Rasmus Villemoes                  18 (1.1%)
+   Holger Brunck                     17 (1.0%)
+   Biwen Li                          16 (1.0%)
+   Andre Przywara                    16 (1.0%)
+   Wolfgang Wallner                  15 (0.9%)
+   Anatolij Gustschin                15 (0.9%)
+   Kuldeep Singh                     14 (0.9%)
+   Alifer Moraes                     14 (0.9%)
+   Marek Szyprowski                  14 (0.9%)
+   mingming lee                      14 (0.9%)
+   Sean Anderson                     13 (0.8%)
+   Alex Marginean                    13 (0.8%)
+   Wasim Khan                        13 (0.8%)
+   Angelo Durgehello                 13 (0.8%)
+   Sughosh Ganu                      13 (0.8%)
+   Andrew F. Davis                   13 (0.8%)
+   Sam Protsenko                     12 (0.7%)
+   Jean-Jacques Hiblot               12 (0.7%)
+   Andy Shevchenko                   11 (0.7%)
+   Tom Warren                        11 (0.7%)
+   Sam Shih                          11 (0.7%)
+   Bin Meng                          10 (0.6%)
+   Joris Offouga                     10 (0.6%)
+   Ian Ray                           9 (0.5%)
+   Yangbo Lu                         8 (0.5%)
+   AKASHI Takahiro                   8 (0.5%)
+   Priyanka Singh                    7 (0.4%)
+   Lokesh Vutla                      7 (0.4%)
+   Lukasz Majewski                   7 (0.4%)
+   T Karthik Reddy                   7 (0.4%)
+   Peng Ma                           7 (0.4%)
+   Fabien Dessenne                   7 (0.4%)
+   Chunfeng Yun                      7 (0.4%)
+   Cristian Ciocaltea                7 (0.4%)
+   Peter Robinson                    6 (0.4%)
+   Kever Yang                        6 (0.4%)
+   Tudor Ambarus                     6 (0.4%)
+   Patrice Chotard                   6 (0.4%)
+   Eugeniy Paltsev                   6 (0.4%)
+   Yuantian Tang                     6 (0.4%)
+   Pedro Jardim                      6 (0.4%)
+   Michael Walle                     6 (0.4%)
+   Ashok Reddy Soma                  6 (0.4%)
+   Alex Nemirovsky                   5 (0.3%)
+   Meenakshi Aggarwal                5 (0.3%)
+   Michael Trimarchi                 5 (0.3%)
+   Suniel Mahesh                     5 (0.3%)
+   Andreas Dannenberg                5 (0.3%)
+   Joel Johnson                      5 (0.3%)
+   Flavio Suligoi                    5 (0.3%)
+   Yinbo Zhu                         5 (0.3%)
+   Stephan Gerhold                   5 (0.3%)
+   Ovidiu Panait                     4 (0.2%)
+   Alexey Brodkin                    4 (0.2%)
+   Alison Wang                       4 (0.2%)
+   Otavio Salvador                   4 (0.2%)
+   Marcel Ziswiler                   4 (0.2%)
+   Jason Li                          4 (0.2%)
+   MarkLee                           4 (0.2%)
+   Jorge Ramirez-Ortiz               4 (0.2%)
+   Caleb Robey                       4 (0.2%)
+   Steffen Dirkwinkel                4 (0.2%)
+   Ye Li                             3 (0.2%)
+   Jan Kiszka                        3 (0.2%)
+   Klaus H. Sorensen                 3 (0.2%)
+   Madalin Bucur                     3 (0.2%)
+   Oliver Graute                     3 (0.2%)
+   Frieder Schrempf                  3 (0.2%)
+   Heiko Stuebner                    3 (0.2%)
+   Dario Binacchi                    3 (0.2%)
+   Amit Singh Tomar                  3 (0.2%)
+   Martin Fuzzey                     3 (0.2%)
+   Chen-Yu Tsai                      3 (0.2%)
+   Pankaj Bansal                     3 (0.2%)
+   Pramod Kumar                      3 (0.2%)
+   Adam Ford                         3 (0.2%)
+   Eugeniu Rosca                     3 (0.2%)
+   Lars Povlsen                      2 (0.1%)
+   Stephen Warren                    2 (0.1%)
+   Kristian Amlie                    2 (0.1%)
+   Simon Goldschmidt                 2 (0.1%)
+   Frank Wunderlich                  2 (0.1%)
+   Fabien Lehoussel                  2 (0.1%)
+   Grygorii Strashko                 2 (0.1%)
+   Samuel Mendoza-Jonas              2 (0.1%)
+   Ilias Apalodimas                  2 (0.1%)
+   Christophe Leroy                  2 (0.1%)
+   Milan Obuch                       2 (0.1%)
+   Markus Klotzbuecher               2 (0.1%)
+   Bharat Kumar Reddy Gooty          2 (0.1%)
+   Antonio Borneo                    2 (0.1%)
+   Thirupathaiah Annapureddy         2 (0.1%)
+   Park, Aiden                       2 (0.1%)
+   YouMin Chen                       2 (0.1%)
+   Thomas Hebb                       2 (0.1%)
+   Udit Agarwal                      2 (0.1%)
+   Hou Zhiqiang                      2 (0.1%)
+   Anand Moon                        2 (0.1%)
+   Christian Hewitt                  2 (0.1%)
+   Thor Thayer                       2 (0.1%)
+   Claudius Heine                    2 (0.1%)
+   Denis Zalevskiy                   2 (0.1%)
+   Stefan Roese                      1 (0.1%)
+   Chee Hong Ang                     1 (0.1%)
+   Jan-Christoph Tebbe               1 (0.1%)
+   Jaehoon Chung                     1 (0.1%)
+   Vishruth                          1 (0.1%)
+   JC Kuo                            1 (0.1%)
+   Lihua Zhao                        1 (0.1%)
+   Vladimir Oltean                   1 (0.1%)
+   Vikas Singh                       1 (0.1%)
+   Petr Štetiar                      1 (0.1%)
+   Atish Patra                       1 (0.1%)
+   Marek Behún                       1 (0.1%)
+   Harald Seiler                     1 (0.1%)
+   Miquel Raynal                     1 (0.1%)
+   Tomasz Duszynski                  1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Walter Lozano                     1 (0.1%)
+   Alex Kiernan                      1 (0.1%)
+   Clemens Gruber                    1 (0.1%)
+   Matthias Brugger                  1 (0.1%)
+   Pankit Garg                       1 (0.1%)
+   Max Krummenacher                  1 (0.1%)
+   Stefano Babic                     1 (0.1%)
+   Arthur Li                         1 (0.1%)
+   Samuel Mescoff                    1 (0.1%)
+   Seung-Woo Kim                     1 (0.1%)
+   Rajan Vaja                        1 (0.1%)
+   Madan Srinivas                    1 (0.1%)
+   Carl Gelfand                      1 (0.1%)
+   Jared Baldridge                   1 (0.1%)
+   Hugh Cole-Baker                   1 (0.1%)
+   Tero Kristo                       1 (0.1%)
+   Roger Quadros                     1 (0.1%)
+   Marek Bykowski                    1 (0.1%)
+   Sébastien Szymanski               1 (0.1%)
+   Luka Kovacic                      1 (0.1%)
+   Robert Marko                      1 (0.1%)
+   Maxime Ripard                     1 (0.1%)
+   Rob Herring                       1 (0.1%)
+   Guillermo Rodríguez               1 (0.1%)
+   Christoph Müllner                 1 (0.1%)
+   Mark Kettenis                     1 (0.1%)
+   Marcin Wojtas                     1 (0.1%)
+   Jernej Skrabec                    1 (0.1%)
+   Fabien Parent                     1 (0.1%)
+   Eric Nelson                       1 (0.1%)
+   Shawn Guo                         1 (0.1%)
+   Patrik Dahlström                  1 (0.1%)
+   Xiaowei Bao                       1 (0.1%)
+   Dhananjay Phadke                  1 (0.1%)
+   Rainer Boschung                   1 (0.1%)
+   Matthias Schoepfer                1 (0.1%)
+   Arkadiusz Karas                   1 (0.1%)
+   Keerthy                           1 (0.1%)
+   Jason Kridner                     1 (0.1%)
+   Alexandre Besnard                 1 (0.1%)
+   Zumeng Chen                       1 (0.1%)
+   Sudeep Holla                      1 (0.1%)
+   Raviteja Narayanam                1 (0.1%)
+   Rajesh Ravi                       1 (0.1%)
+   Han Nandor                        1 (0.1%)
+   Parthiban Nallathambi             1 (0.1%)
+   Wen He                            1 (0.1%)
+   Vabhav Sharma                     1 (0.1%)
+   Florinel Iordache                 1 (0.1%)
+   Joakim Tjernlund                  1 (0.1%)
+   Michael Auchter                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       23135 (18.7%)
+   Peng Fan                          6869 (5.6%)
+   Heiko Schocher                    6326 (5.1%)
+   Michal Simek                      4952 (4.0%)
+   Ley Foon Tan                      4752 (3.8%)
+   Igor Opaniuk                      4700 (3.8%)
+   Baruch Siach                      4567 (3.7%)
+   Robert Beckett                    3815 (3.1%)
+   Giulio Benetti                    3134 (2.5%)
+   mingming lee                      2755 (2.2%)
+   Marek Vasut                       2569 (2.1%)
+   Sam Shih                          2530 (2.0%)
+   Holger Brunck                     2393 (1.9%)
+   Stephan Gerhold                   2290 (1.9%)
+   Tom Rini                          2200 (1.8%)
+   Philippe Reynes                   2105 (1.7%)
+   Jagan Teki                        2086 (1.7%)
+   Tom Warren                        1986 (1.6%)
+   Anatolij Gustschin                1954 (1.6%)
+   Chen-Yu Tsai                      1603 (1.3%)
+   Angelo Durgehello                 1600 (1.3%)
+   Vignesh Raghavendra               1593 (1.3%)
+   Fabio Estevam                     1519 (1.2%)
+   Heinrich Schuchardt               1510 (1.2%)
+   Andre Przywara                    1492 (1.2%)
+   Samuel Mendoza-Jonas              1384 (1.1%)
+   Sam Protsenko                     1357 (1.1%)
+   Peng Ma                           1188 (1.0%)
+   Michael Walle                     1091 (0.9%)
+   Lukasz Majewski                   1086 (0.9%)
+   Biwen Li                          1061 (0.9%)
+   Patrick Delaunay                  998 (0.8%)
+   Martin Fuzzey                     884 (0.7%)
+   Joris Offouga                     758 (0.6%)
+   Amit Singh Tomar                  745 (0.6%)
+   Parthiban Nallathambi             732 (0.6%)
+   Arkadiusz Karas                   730 (0.6%)
+   Stefano Babic                     691 (0.6%)
+   Sughosh Ganu                      670 (0.5%)
+   Cristian Ciocaltea                629 (0.5%)
+   Florinel Iordache                 620 (0.5%)
+   Masahiro Yamada                   613 (0.5%)
+   Jason Kridner                     577 (0.5%)
+   Faiz Abbas                        536 (0.4%)
+   Alex Nemirovsky                   497 (0.4%)
+   Ilias Apalodimas                  487 (0.4%)
+   Andrew F. Davis                   469 (0.4%)
+   Fabien Dessenne                   468 (0.4%)
+   Jason Li                          442 (0.4%)
+   Caleb Robey                       430 (0.3%)
+   Bin Meng                          397 (0.3%)
+   Alex Marginean                    373 (0.3%)
+   Ashok Reddy Soma                  322 (0.3%)
+   Andreas Dannenberg                317 (0.3%)
+   Han Nandor                        298 (0.2%)
+   Thirupathaiah Annapureddy         293 (0.2%)
+   Tudor Ambarus                     291 (0.2%)
+   Christian Hewitt                  291 (0.2%)
+   Bharat Kumar Reddy Gooty          250 (0.2%)
+   Jean-Jacques Hiblot               239 (0.2%)
+   Wasim Khan                        234 (0.2%)
+   Alexey Brodkin                    232 (0.2%)
+   Ran Wang                          231 (0.2%)
+   Rasmus Villemoes                  222 (0.2%)
+   Ye Li                             220 (0.2%)
+   YouMin Chen                       220 (0.2%)
+   Grygorii Strashko                 210 (0.2%)
+   Ian Ray                           206 (0.2%)
+   Kuldeep Singh                     201 (0.2%)
+   Arthur Li                         195 (0.2%)
+   Eugeniu Rosca                     191 (0.2%)
+   Klaus H. Sorensen                 185 (0.1%)
+   Pedro Jardim                      183 (0.1%)
+   Yangbo Lu                         181 (0.1%)
+   Andy Shevchenko                   180 (0.1%)
+   Heiko Stuebner                    173 (0.1%)
+   Marek Szyprowski                  172 (0.1%)
+   Suniel Mahesh                     157 (0.1%)
+   Wolfgang Wallner                  135 (0.1%)
+   Zumeng Chen                       135 (0.1%)
+   Eugeniy Paltsev                   133 (0.1%)
+   Chunfeng Yun                      130 (0.1%)
+   Sean Anderson                     129 (0.1%)
+   Yuantian Tang                     125 (0.1%)
+   MarkLee                           124 (0.1%)
+   Michael Trimarchi                 119 (0.1%)
+   Steffen Dirkwinkel                114 (0.1%)
+   Peter Robinson                    111 (0.1%)
+   Alifer Moraes                     110 (0.1%)
+   Adam Ford                         98 (0.1%)
+   Priyanka Singh                    91 (0.1%)
+   AKASHI Takahiro                   90 (0.1%)
+   Patrice Chotard                   79 (0.1%)
+   Denis Zalevskiy                   76 (0.1%)
+   Marcel Ziswiler                   61 (0.0%)
+   Joel Johnson                      60 (0.0%)
+   JC Kuo                            59 (0.0%)
+   T Karthik Reddy                   57 (0.0%)
+   Clemens Gruber                    55 (0.0%)
+   Maxime Ripard                     55 (0.0%)
+   Meenakshi Aggarwal                52 (0.0%)
+   Frieder Schrempf                  51 (0.0%)
+   Frank Wunderlich                  50 (0.0%)
+   Park, Aiden                       48 (0.0%)
+   Alex Kiernan                      43 (0.0%)
+   Alison Wang                       41 (0.0%)
+   Pankaj Bansal                     36 (0.0%)
+   Kever Yang                        35 (0.0%)
+   Atish Patra                       34 (0.0%)
+   Vladimir Oltean                   33 (0.0%)
+   Pramod Kumar                      31 (0.0%)
+   Udit Agarwal                      30 (0.0%)
+   Lars Povlsen                      28 (0.0%)
+   Thor Thayer                       27 (0.0%)
+   Lokesh Vutla                      25 (0.0%)
+   Stefan Roese                      24 (0.0%)
+   Ovidiu Panait                     23 (0.0%)
+   Chee Hong Ang                     22 (0.0%)
+   Hugh Cole-Baker                   21 (0.0%)
+   Rajesh Ravi                       21 (0.0%)
+   Otavio Salvador                   20 (0.0%)
+   Claudius Heine                    19 (0.0%)
+   Luka Kovacic                      19 (0.0%)
+   Simon Goldschmidt                 18 (0.0%)
+   Yinbo Zhu                         16 (0.0%)
+   Stephen Warren                    15 (0.0%)
+   Wen He                            15 (0.0%)
+   Roger Quadros                     13 (0.0%)
+   Guillermo Rodríguez               13 (0.0%)
+   Hou Zhiqiang                      12 (0.0%)
+   Seung-Woo Kim                     12 (0.0%)
+   Tomasz Duszynski                  11 (0.0%)
+   Marcin Wojtas                     11 (0.0%)
+   Madan Srinivas                    10 (0.0%)
+   Thomas Hebb                       9 (0.0%)
+   Madalin Bucur                     8 (0.0%)
+   Robert Marko                      8 (0.0%)
+   Xiaowei Bao                       8 (0.0%)
+   Oliver Graute                     7 (0.0%)
+   Christophe Leroy                  7 (0.0%)
+   Antonio Borneo                    7 (0.0%)
+   Marek Behún                       7 (0.0%)
+   Patrik Dahlström                  7 (0.0%)
+   Joakim Tjernlund                  7 (0.0%)
+   Flavio Suligoi                    6 (0.0%)
+   Dario Binacchi                    6 (0.0%)
+   Kristian Amlie                    6 (0.0%)
+   Rajan Vaja                        6 (0.0%)
+   Jorge Ramirez-Ortiz               5 (0.0%)
+   Pankit Garg                       5 (0.0%)
+   Jan Kiszka                        4 (0.0%)
+   Fabien Lehoussel                  4 (0.0%)
+   Markus Klotzbuecher               4 (0.0%)
+   Miquel Raynal                     4 (0.0%)
+   Sébastien Szymanski               4 (0.0%)
+   Rob Herring                       4 (0.0%)
+   Rainer Boschung                   4 (0.0%)
+   Sudeep Holla                      4 (0.0%)
+   Milan Obuch                       3 (0.0%)
+   Mark Kettenis                     3 (0.0%)
+   Anand Moon                        2 (0.0%)
+   Jaehoon Chung                     2 (0.0%)
+   Vishruth                          2 (0.0%)
+   Lihua Zhao                        2 (0.0%)
+   Harald Seiler                     2 (0.0%)
+   Chris Packham                     2 (0.0%)
+   Walter Lozano                     2 (0.0%)
+   Matthias Brugger                  2 (0.0%)
+   Max Krummenacher                  2 (0.0%)
+   Jared Baldridge                   2 (0.0%)
+   Jernej Skrabec                    2 (0.0%)
+   Dhananjay Phadke                  2 (0.0%)
+   Keerthy                           2 (0.0%)
+   Alexandre Besnard                 2 (0.0%)
+   Vabhav Sharma                     2 (0.0%)
+   Jan-Christoph Tebbe               1 (0.0%)
+   Vikas Singh                       1 (0.0%)
+   Petr Štetiar                      1 (0.0%)
+   Samuel Mescoff                    1 (0.0%)
+   Carl Gelfand                      1 (0.0%)
+   Tero Kristo                       1 (0.0%)
+   Marek Bykowski                    1 (0.0%)
+   Christoph Müllner                 1 (0.0%)
+   Fabien Parent                     1 (0.0%)
+   Eric Nelson                       1 (0.0%)
+   Shawn Guo                         1 (0.0%)
+   Matthias Schoepfer                1 (0.0%)
+   Raviteja Narayanam                1 (0.0%)
+   Michael Auchter                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      2438 (7.3%)
+   Peng Ma                           971 (2.9%)
+   Tom Warren                        727 (2.2%)
+   Stefano Babic                     691 (2.1%)
+   Andre Przywara                    558 (1.7%)
+   Tom Rini                          376 (1.1%)
+   Grygorii Strashko                 208 (0.6%)
+   Pedro Jardim                      173 (0.5%)
+   Yangbo Lu                         113 (0.3%)
+   Alifer Moraes                     87 (0.3%)
+   Denis Zalevskiy                   51 (0.2%)
+   Clemens Gruber                    45 (0.1%)
+   Steffen Dirkwinkel                39 (0.1%)
+   Park, Aiden                       35 (0.1%)
+   Hou Zhiqiang                      11 (0.0%)
+   Madan Srinivas                    10 (0.0%)
+   Thomas Hebb                       7 (0.0%)
+   Tomasz Duszynski                  6 (0.0%)
+   Chee Hong Ang                     4 (0.0%)
+   Ian Ray                           3 (0.0%)
+   Christophe Leroy                  3 (0.0%)
+   Sébastien Szymanski               2 (0.0%)
+   Max Krummenacher                  2 (0.0%)
+   Joakim Tjernlund                  1 (0.0%)
+   Rainer Boschung                   1 (0.0%)
+   Walter Lozano                     1 (0.0%)
+   Matthias Schoepfer                1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 307)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Lokesh Vutla                      102 (33.2%)
+   Priyanka Jain                     35 (11.4%)
+   Michal Simek                      20 (6.5%)
+   Bin Meng                          11 (3.6%)
+   Robert Beckett                    11 (3.6%)
+   Minkyu Kang                       8 (2.6%)
+   Heinrich Schuchardt               8 (2.6%)
+   Jagan Teki                        8 (2.6%)
+   Matthias Brugger                  7 (2.3%)
+   Alexey Brodkin                    6 (2.0%)
+   Neil Armstrong                    5 (1.6%)
+   Alex Nemirovsky                   5 (1.6%)
+   Andre Przywara                    4 (1.3%)
+   Ian Ray                           4 (1.3%)
+   Stefan Roese                      4 (1.3%)
+   Jason Kridner                     4 (1.3%)
+   Tom Warren                        3 (1.0%)
+   Vladimir Olovyannikov             3 (1.0%)
+   Rasmus Villemoes                  3 (1.0%)
+   Marcel Ziswiler                   3 (1.0%)
+   Patrick Delaunay                  3 (1.0%)
+   Tom Rini                          2 (0.7%)
+   Luis Araneda                      2 (0.7%)
+   Ryder Lee                         2 (0.7%)
+   Ashish Kumar                      2 (0.7%)
+   Rajat Srivastava                  2 (0.7%)
+   Kever Yang                        2 (0.7%)
+   Masahiro Yamada                   2 (0.7%)
+   Michael Trimarchi                 2 (0.7%)
+   Alex Marginean                    2 (0.7%)
+   Faiz Abbas                        2 (0.7%)
+   Igor Opaniuk                      2 (0.7%)
+   Peng Ma                           1 (0.3%)
+   Alifer Moraes                     1 (0.3%)
+   Chee Hong Ang                     1 (0.3%)
+   Max Krummenacher                  1 (0.3%)
+   Thierry Reding                    1 (0.3%)
+   Manish Tomar                      1 (0.3%)
+   Fabio Berton                      1 (0.3%)
+   Florin Chiculita                  1 (0.3%)
+   Shengzhou Liu                     1 (0.3%)
+   Valentin Longchamp                1 (0.3%)
+   Venkateswara Rao Mandela          1 (0.3%)
+   Quanyang Wang                     1 (0.3%)
+   Arnd Bergmann                     1 (0.3%)
+   Robin Gong                        1 (0.3%)
+   Tien Fong Chee                    1 (0.3%)
+   Brad Campbell                     1 (0.3%)
+   Stefan Agner                      1 (0.3%)
+   Yogesh Gaur                       1 (0.3%)
+   Sriram Dash                       1 (0.3%)
+   Tero Kristo                       1 (0.3%)
+   Andy Shevchenko                   1 (0.3%)
+   YouMin Chen                       1 (0.3%)
+   Jean-Jacques Hiblot               1 (0.3%)
+   Andreas Dannenberg                1 (0.3%)
+   Caleb Robey                       1 (0.3%)
+   Andrew F. Davis                   1 (0.3%)
+   Marek Vasut                       1 (0.3%)
+   Peng Fan                          1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 858)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          167 (19.5%)
+   Priyanka Jain                     107 (12.5%)
+   Simon Glass                       85 (9.9%)
+   Kever Yang                        45 (5.2%)
+   Patrice Chotard                   36 (4.2%)
+   Oleksandr Suvorov                 32 (3.7%)
+   Simon Goldschmidt                 31 (3.6%)
+   Jagan Teki                        30 (3.5%)
+   Stefan Roese                      30 (3.5%)
+   Heiko Schocher                    28 (3.3%)
+   Fabio Estevam                     25 (2.9%)
+   Patrick Delaunay                  22 (2.6%)
+   Lokesh Vutla                      19 (2.2%)
+   Heinrich Schuchardt               16 (1.9%)
+   Ryder Lee                         15 (1.7%)
+   Tom Rini                          14 (1.6%)
+   Peng Fan                          13 (1.5%)
+   Lukasz Majewski                   13 (1.5%)
+   Grygorii Strashko                 11 (1.3%)
+   Jaehoon Chung                     11 (1.3%)
+   Anatolij Gustschin                7 (0.8%)
+   Stefano Babic                     6 (0.7%)
+   Rick Chen                         6 (0.7%)
+   Eric Nelson                       5 (0.6%)
+   Daniel Schwierzeck                5 (0.6%)
+   Pragnesh Patel                    5 (0.6%)
+   Linus Walleij                     5 (0.6%)
+   Mario Six                         5 (0.6%)
+   Anand Moon                        5 (0.6%)
+   Ley Foon Tan                      5 (0.6%)
+   Jun Chen                          4 (0.5%)
+   Miquel Raynal                     4 (0.5%)
+   Neil Armstrong                    3 (0.3%)
+   Marek Vasut                       3 (0.3%)
+   Stephen Warren                    3 (0.3%)
+   Sam Protsenko                     3 (0.3%)
+   Andre Przywara                    2 (0.2%)
+   Alexandre Belloni                 2 (0.2%)
+   Horatiu Vultur                    2 (0.2%)
+   Lukas Auer                        2 (0.2%)
+   Joel Stanley                      2 (0.2%)
+   Ye Li                             2 (0.2%)
+   Sughosh Ganu                      2 (0.2%)
+   Masahiro Yamada                   1 (0.1%)
+   Michael Trimarchi                 1 (0.1%)
+   Alex Marginean                    1 (0.1%)
+   Andy Shevchenko                   1 (0.1%)
+   Yangbo Lu                         1 (0.1%)
+   Park, Aiden                       1 (0.1%)
+   Rob Herring                       1 (0.1%)
+   Keerthy                           1 (0.1%)
+   Mathieu Poirier                   1 (0.1%)
+   Angelo Dureghello                 1 (0.1%)
+   Cédric Le Goater                  1 (0.1%)
+   Oliver Graute                     1 (0.1%)
+   Frieder Schrempf                  1 (0.1%)
+   Atish Patra                       1 (0.1%)
+   Vladimir Oltean                   1 (0.1%)
+   Wolfgang Wallner                  1 (0.1%)
+   Heiko Stuebner                    1 (0.1%)
+   Kuldeep Singh                     1 (0.1%)
+   Vignesh Raghavendra               1 (0.1%)
+   Philippe Reynes                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 63)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          13 (20.6%)
+   Peter Robinson                    8 (12.7%)
+   Jagan Teki                        5 (7.9%)
+   Fabio Estevam                     4 (6.3%)
+   Simon Goldschmidt                 3 (4.8%)
+   Corentin Labbe                    3 (4.8%)
+   Patrice Chotard                   2 (3.2%)
+   Heinrich Schuchardt               2 (3.2%)
+   Guillaume La Roque                2 (3.2%)
+   Frank Wunderlich                  2 (3.2%)
+   Patrick Delaunay                  1 (1.6%)
+   Lokesh Vutla                      1 (1.6%)
+   Tom Rini                          1 (1.6%)
+   Marek Vasut                       1 (1.6%)
+   Andy Shevchenko                   1 (1.6%)
+   Park, Aiden                       1 (1.6%)
+   Wolfgang Wallner                  1 (1.6%)
+   Kuldeep Singh                     1 (1.6%)
+   Matthias Brugger                  1 (1.6%)
+   Alifer Moraes                     1 (1.6%)
+   Andreas Dannenberg                1 (1.6%)
+   Matt Porter                       1 (1.6%)
+   Mauro Condarelli                  1 (1.6%)
+   Álvaro Fernández Rojas            1 (1.6%)
+   Ferry Toth                        1 (1.6%)
+   Ard Biesheuvel                    1 (1.6%)
+   Robert Marko                      1 (1.6%)
+   Michael Walle                     1 (1.6%)
+   Baruch Siach                      1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 63)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagan Teki                        6 (9.5%)
+   Anatolij Gustschin                4 (6.3%)
+   Andre Przywara                    4 (6.3%)
+   Igor Opaniuk                      4 (6.3%)
+   Bin Meng                          3 (4.8%)
+   Heinrich Schuchardt               3 (4.8%)
+   Marek Vasut                       3 (4.8%)
+   Masahiro Yamada                   3 (4.8%)
+   Amit Singh Tomar                  3 (4.8%)
+   Tom Rini                          2 (3.2%)
+   Simon Glass                       2 (3.2%)
+   Peng Fan                          2 (3.2%)
+   Ye Li                             2 (3.2%)
+   Vignesh Raghavendra               2 (3.2%)
+   Sean Anderson                     2 (3.2%)
+   Sam Shih                          2 (3.2%)
+   Fabio Estevam                     1 (1.6%)
+   Patrick Delaunay                  1 (1.6%)
+   Andy Shevchenko                   1 (1.6%)
+   Wolfgang Wallner                  1 (1.6%)
+   Michael Walle                     1 (1.6%)
+   Stefan Roese                      1 (1.6%)
+   Lukasz Majewski                   1 (1.6%)
+   Alex Marginean                    1 (1.6%)
+   Keerthy                           1 (1.6%)
+   Philippe Reynes                   1 (1.6%)
+   Michal Simek                      1 (1.6%)
+   Tom Warren                        1 (1.6%)
+   Jean-Jacques Hiblot               1 (1.6%)
+   Jan Kiszka                        1 (1.6%)
+   Vishruth                          1 (1.6%)
+   Luka Kovacic                      1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 20)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Igor Opaniuk                      3 (15.0%)
+   Fabio Estevam                     3 (15.0%)
+   Tom Rini                          1 (5.0%)
+   Simon Glass                       1 (5.0%)
+   Patrick Delaunay                  1 (5.0%)
+   Andy Shevchenko                   1 (5.0%)
+   Michal Simek                      1 (5.0%)
+   Andreas Dannenberg                1 (5.0%)
+   Matt Porter                       1 (5.0%)
+   Oliver Graute                     1 (5.0%)
+   Carl Gelfand                      1 (5.0%)
+   Ramin Seyed-Moussavi              1 (5.0%)
+   Praneeth Bajjuri                  1 (5.0%)
+   Vagrant Cascadian                 1 (5.0%)
+   Vishal Mahaveer                   1 (5.0%)
+   Robert P. J. Day                  1 (5.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 20)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Anatolij Gustschin                6 (30.0%)
+   Fabio Estevam                     3 (15.0%)
+   Heinrich Schuchardt               2 (10.0%)
+   Michal Simek                      1 (5.0%)
+   Bin Meng                          1 (5.0%)
+   Ye Li                             1 (5.0%)
+   Vignesh Raghavendra               1 (5.0%)
+   Philippe Reynes                   1 (5.0%)
+   Lokesh Vutla                      1 (5.0%)
+   Rob Herring                       1 (5.0%)
+   Shawn Guo                         1 (5.0%)
+   Lars Povlsen                      1 (5.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         540 (32.9%)
+   Google, Inc.                      309 (18.9%)
+   NXP                               172 (10.5%)
+   Texas Instruments                 124 (7.6%)
+   DENX Software Engineering         113 (6.9%)
+   AMD                               45 (2.7%)
+   Intel                             45 (2.7%)
+   Socionext Inc.                    38 (2.3%)
+   Amarula Solutions                 37 (2.3%)
+   ST Microelectronics               36 (2.2%)
+   Konsulko Group                    28 (1.7%)
+   Linaro                            25 (1.5%)
+   Collabora Ltd.                    20 (1.2%)
+   ARM                               17 (1.0%)
+   Samsung                           16 (1.0%)
+   NVidia                            15 (0.9%)
+   Xilinx                            15 (0.9%)
+   General Electric                  11 (0.7%)
+   Rockchip                          8 (0.5%)
+   Toradex                           5 (0.3%)
+   O.S. Systems                      4 (0.2%)
+   Broadcom                          3 (0.2%)
+   Siemens                           3 (0.2%)
+   Bootlin                           2 (0.1%)
+   Wind River                        2 (0.1%)
+   Pepperl+Fuchs                     2 (0.1%)
+   BayLibre SAS                      1 (0.1%)
+   National Instruments              1 (0.1%)
+   Semihalf Embedded Systems         1 (0.1%)
+   SUSE                              1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         44534 (36.1%)
+   Google, Inc.                      23135 (18.7%)
+   DENX Software Engineering         12671 (10.3%)
+   NXP                               11684 (9.5%)
+   Intel                             5029 (4.1%)
+   AMD                               4952 (4.0%)
+   Texas Instruments                 4422 (3.6%)
+   Collabora Ltd.                    3817 (3.1%)
+   Amarula Solutions                 2346 (1.9%)
+   Konsulko Group                    2200 (1.8%)
+   NVidia                            2062 (1.7%)
+   ST Microelectronics               1552 (1.3%)
+   ARM                               1496 (1.2%)
+   Linaro                            1249 (1.0%)
+   Socionext Inc.                    613 (0.5%)
+   Xilinx                            386 (0.3%)
+   General Electric                  282 (0.2%)
+   Broadcom                          271 (0.2%)
+   Rockchip                          255 (0.2%)
+   Samsung                           186 (0.2%)
+   Wind River                        137 (0.1%)
+   Toradex                           63 (0.1%)
+   Bootlin                           59 (0.0%)
+   O.S. Systems                      20 (0.0%)
+   Pepperl+Fuchs                     18 (0.0%)
+   Semihalf Embedded Systems         11 (0.0%)
+   Siemens                           4 (0.0%)
+   SUSE                              2 (0.0%)
+   BayLibre SAS                      1 (0.0%)
+   National Instruments              1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 307)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Texas Instruments                 114 (37.1%)
+   NXP                               49 (16.0%)
+   (Unknown)                         41 (13.4%)
+   Xilinx                            20 (6.5%)
+   Collabora Ltd.                    11 (3.6%)
+   Amarula Solutions                 10 (3.3%)
+   Samsung                           8 (2.6%)
+   Toradex                           7 (2.3%)
+   SUSE                              7 (2.3%)
+   DENX Software Engineering         5 (1.6%)
+   BayLibre SAS                      5 (1.6%)
+   NVidia                            4 (1.3%)
+   ARM                               4 (1.3%)
+   General Electric                  4 (1.3%)
+   Intel                             3 (1.0%)
+   ST Microelectronics               3 (1.0%)
+   Broadcom                          3 (1.0%)
+   Rockchip                          3 (1.0%)
+   Konsulko Group                    2 (0.7%)
+   Socionext Inc.                    2 (0.7%)
+   Wind River                        1 (0.3%)
+   O.S. Systems                      1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 191)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         89 (46.6%)
+   NXP                               26 (13.6%)
+   Texas Instruments                 13 (6.8%)
+   DENX Software Engineering         8 (4.2%)
+   Intel                             5 (2.6%)
+   Linaro                            5 (2.6%)
+   Xilinx                            4 (2.1%)
+   NVidia                            4 (2.1%)
+   ST Microelectronics               4 (2.1%)
+   Amarula Solutions                 3 (1.6%)
+   Samsung                           3 (1.6%)
+   Collabora Ltd.                    2 (1.0%)
+   Toradex                           2 (1.0%)
+   ARM                               2 (1.0%)
+   General Electric                  2 (1.0%)
+   Broadcom                          2 (1.0%)
+   Rockchip                          2 (1.0%)
+   Wind River                        2 (1.0%)
+   Bootlin                           2 (1.0%)
+   SUSE                              1 (0.5%)
+   BayLibre SAS                      1 (0.5%)
+   Konsulko Group                    1 (0.5%)
+   Socionext Inc.                    1 (0.5%)
+   O.S. Systems                      1 (0.5%)
+   Google, Inc.                      1 (0.5%)
+   AMD                               1 (0.5%)
+   Pepperl+Fuchs                     1 (0.5%)
+   Semihalf Embedded Systems         1 (0.5%)
+   Siemens                           1 (0.5%)
+   National Instruments              1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2020.07.rst b/doc/develop/statistics/u-boot-stats-v2020.07.rst
new file mode 100644
index 00000000000..8218f976a6e
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2020.07.rst
@@ -0,0 +1,939 @@
+:orphan:
+
+Release Statistics for U-Boot v2020.07
+======================================
+
+* Processed 1918 changesets from 203 developers
+
+* 32 employers found
+
+* A total of 122895 lines added, 44517 removed (delta 78378)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       190 (9.9%)
+   Marek Vasut                       132 (6.9%)
+   Heinrich Schuchardt               127 (6.6%)
+   Patrick Delaunay                  124 (6.5%)
+   Jagan Teki                        77 (4.0%)
+   Tom Rini                          59 (3.1%)
+   Michal Simek                      54 (2.8%)
+   Peng Fan                          53 (2.8%)
+   Ye Li                             43 (2.2%)
+   AKASHI Takahiro                   37 (1.9%)
+   Fabio Estevam                     35 (1.8%)
+   Madalin Bucur                     34 (1.8%)
+   Bin Meng                          33 (1.7%)
+   Biwen Li                          32 (1.7%)
+   Eugeniy Paltsev                   31 (1.6%)
+   Giulio Benetti                    30 (1.6%)
+   Masahiro Yamada                   28 (1.5%)
+   Neil Armstrong                    26 (1.4%)
+   Ioana Ciornei                     26 (1.4%)
+   Joel Johnson                      22 (1.1%)
+   Rasmus Villemoes                  22 (1.1%)
+   Pragnesh Patel                    21 (1.1%)
+   Kever Yang                        19 (1.0%)
+   Kuldeep Singh                     19 (1.0%)
+   Weijie Gao                        19 (1.0%)
+   Dario Binacchi                    18 (0.9%)
+   Chunfeng Yun                      16 (0.8%)
+   Igor Opaniuk                      15 (0.8%)
+   Hou Zhiqiang                      15 (0.8%)
+   Vignesh Raghavendra               15 (0.8%)
+   Stefan Roese                      14 (0.7%)
+   Atish Patra                       13 (0.7%)
+   Amit Singh Tomar                  13 (0.7%)
+   Marek Behún                       13 (0.7%)
+   Michael Walle                     12 (0.6%)
+   Heiko Stuebner                    12 (0.6%)
+   Ovidiu Panait                     12 (0.6%)
+   Keerthy                           12 (0.6%)
+   Pali Rohár                        11 (0.6%)
+   Harald Seiler                     10 (0.5%)
+   Ley Foon Tan                      9 (0.5%)
+   Chen-Yu Tsai                      9 (0.5%)
+   Anatolij Gustschin                8 (0.4%)
+   Frank Wang                        8 (0.4%)
+   Lokesh Vutla                      8 (0.4%)
+   Trevor Woerner                    8 (0.4%)
+   Tero Kristo                       8 (0.4%)
+   Walter Lozano                     7 (0.4%)
+   Sean Anderson                     7 (0.4%)
+   Marcin Juszkiewicz                7 (0.4%)
+   Andy Shevchenko                   7 (0.4%)
+   Han Xu                            7 (0.4%)
+   Suman Anna                        7 (0.4%)
+   Andre Przywara                    7 (0.4%)
+   Philippe Schenker                 7 (0.4%)
+   Patrice Chotard                   6 (0.3%)
+   Peter Robinson                    6 (0.3%)
+   Matthias Brugger                  6 (0.3%)
+   Jerome Brunet                     6 (0.3%)
+   Jan Kiszka                        6 (0.3%)
+   Ilias Apalodimas                  6 (0.3%)
+   Michael Krummsdorf                6 (0.3%)
+   Heiko Schocher                    5 (0.3%)
+   Patrick Wildt                     5 (0.3%)
+   Yannick Fertre                    5 (0.3%)
+   Vladimir Oltean                   5 (0.3%)
+   Mark Kettenis                     5 (0.3%)
+   Samuel Holland                    5 (0.3%)
+   Alice Guo                         5 (0.3%)
+   Yuantian Tang                     5 (0.3%)
+   Lin Jinhan                        5 (0.3%)
+   T Karthik Reddy                   5 (0.3%)
+   Rayagonda Kokatanur               5 (0.3%)
+   Moses Christopher                 5 (0.3%)
+   Adam Ford                         4 (0.2%)
+   Lukasz Majewski                   4 (0.2%)
+   Bernhard Messerklinger            4 (0.2%)
+   Urja Rannikko                     4 (0.2%)
+   Ashok Reddy Soma                  4 (0.2%)
+   Claudius Heine                    4 (0.2%)
+   Florinel Iordache                 4 (0.2%)
+   Jun Chen                          4 (0.2%)
+   Suniel Mahesh                     3 (0.2%)
+   Haibo Chen                        3 (0.2%)
+   Jaehoon Chung                     3 (0.2%)
+   Max Krummenacher                  3 (0.2%)
+   Etienne Carriere                  3 (0.2%)
+   Hayes Wang                        3 (0.2%)
+   Christian Gmeiner                 3 (0.2%)
+   Laurentiu Tudor                   3 (0.2%)
+   Chris Packham                     3 (0.2%)
+   Andrew F. Davis                   3 (0.2%)
+   Fugang Duan                       3 (0.2%)
+   Frank Li                          3 (0.2%)
+   Philippe Reynes                   3 (0.2%)
+   Qu Wenruo                         3 (0.2%)
+   Sam Protsenko                     3 (0.2%)
+   Alexander Kochetkov               2 (0.1%)
+   Vagrant Cascadian                 2 (0.1%)
+   Otavio Salvador                   2 (0.1%)
+   Stefan Agner                      2 (0.1%)
+   Tom Warren                        2 (0.1%)
+   Jon Hunter                        2 (0.1%)
+   Yangbo Lu                         2 (0.1%)
+   b.l.huang                         2 (0.1%)
+   Frédéric Danis                    2 (0.1%)
+   Yoshio Furuyama                   2 (0.1%)
+   Robert Marko                      2 (0.1%)
+   Jakov Petrina                     2 (0.1%)
+   Ezra Buehler                      2 (0.1%)
+   Deepak Das                        2 (0.1%)
+   Sughosh Ganu                      2 (0.1%)
+   Petr Borsodi                      2 (0.1%)
+   Christophe Roullier               2 (0.1%)
+   Kyle Evans                        2 (0.1%)
+   Beniamino Galvani                 2 (0.1%)
+   Sven Roederer                     2 (0.1%)
+   Breno Lima                        2 (0.1%)
+   Álvaro Fernández Rojas            2 (0.1%)
+   Bharat Kumar Reddy Gooty          2 (0.1%)
+   Sam Shih                          2 (0.1%)
+   Nicolas Heemeryck                 2 (0.1%)
+   Oliver Graute                     1 (0.1%)
+   Martyn Welch                      1 (0.1%)
+   Oleksandr Suvorov                 1 (0.1%)
+   Marcel Ziswiler                   1 (0.1%)
+   Alex Nemirovsky                   1 (0.1%)
+   Arthur Li                         1 (0.1%)
+   Stefano Babic                     1 (0.1%)
+   Sébastien Szymanski               1 (0.1%)
+   Jaiprakash Singh                  1 (0.1%)
+   Joakim Tjernlund                  1 (0.1%)
+   Roman Stratiienko                 1 (0.1%)
+   Corentin Labbe                    1 (0.1%)
+   Eugen Hristev                     1 (0.1%)
+   Raul E Rangel                     1 (0.1%)
+   Luka Kovacic                      1 (0.1%)
+   Romain Naour                      1 (0.1%)
+   Kurt Miller                       1 (0.1%)
+   Andrius Štikonas                  1 (0.1%)
+   Gary Bisson                       1 (0.1%)
+   Andreas Dannenberg                1 (0.1%)
+   Praneeth Bajjuri                  1 (0.1%)
+   Pramod Kumar                      1 (0.1%)
+   Razvan Ionut Cirjan               1 (0.1%)
+   Pankit Garg                       1 (0.1%)
+   Ashish Kumar                      1 (0.1%)
+   Tiaki Rice                        1 (0.1%)
+   Jan Luebbe                        1 (0.1%)
+   Christophe Leroy                  1 (0.1%)
+   Jonathan Gray                     1 (0.1%)
+   Lionel Debieve                    1 (0.1%)
+   Marek Szyprowski                  1 (0.1%)
+   Nicolas Saenz Julienne            1 (0.1%)
+   Siva Durga Prasad Paladugu        1 (0.1%)
+   Leonard Crestez                   1 (0.1%)
+   Murali Karicheri                  1 (0.1%)
+   Thirupathaiah Annapureddy         1 (0.1%)
+   Josef Lusticky                    1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Sherry Sun                        1 (0.1%)
+   Marek Bykowski                    1 (0.1%)
+   Alifer Moraes                     1 (0.1%)
+   Franck LENORMAND                  1 (0.1%)
+   Seb Fagard                        1 (0.1%)
+   Tudor Ambarus                     1 (0.1%)
+   Bacem Daassi                      1 (0.1%)
+   Pratyush Yadav                    1 (0.1%)
+   Meenakshi Aggarwal                1 (0.1%)
+   Alison Wang                       1 (0.1%)
+   Arnaud Ferraris                   1 (0.1%)
+   Mauro Condarelli                  1 (0.1%)
+   Patrick van Gelder                1 (0.1%)
+   Saeed Nowshadi                    1 (0.1%)
+   Benedikt Grassl                   1 (0.1%)
+   Baruch Siach                      1 (0.1%)
+   Lihua Zhao                        1 (0.1%)
+   Peter Collingbourne               1 (0.1%)
+   Jonathan Corbet                   1 (0.1%)
+   Landen Chao                       1 (0.1%)
+   Charles Frey                      1 (0.1%)
+   Lukas Auer                        1 (0.1%)
+   Hiroyuki Yokoyama                 1 (0.1%)
+   Yinbo Zhu                         1 (0.1%)
+   Markus Niebel                     1 (0.1%)
+   Thomas Hebb                       1 (0.1%)
+   Yusuke Ashiduka                   1 (0.1%)
+   Francois Gervais                  1 (0.1%)
+   Karl Palsson                      1 (0.1%)
+   Josua Mayer                       1 (0.1%)
+   Josip Kelecic                     1 (0.1%)
+   Varalaxmi Bingi                   1 (0.1%)
+   Amit Kumar Mahapatra              1 (0.1%)
+   Manish Narani                     1 (0.1%)
+   Nava kishore Manne                1 (0.1%)
+   Sudeep Holla                      1 (0.1%)
+   Quanyang Wang                     1 (0.1%)
+   Alain Volmat                      1 (0.1%)
+   Ludovic Barre                     1 (0.1%)
+   Rob Herring                       1 (0.1%)
+   Michael Auchter                   1 (0.1%)
+   Eugeniu Rosca                     1 (0.1%)
+   Yegor Yefremov                    1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       15726 (11.5%)
+   Simon Glass                       13123 (9.6%)
+   Patrick Delaunay                  11073 (8.1%)
+   Jagan Teki                        8289 (6.1%)
+   Tom Rini                          6578 (4.8%)
+   AKASHI Takahiro                   5076 (3.7%)
+   Madalin Bucur                     4333 (3.2%)
+   Michal Simek                      3939 (2.9%)
+   Adam Ford                         3602 (2.6%)
+   Bernhard Messerklinger            3306 (2.4%)
+   Pragnesh Patel                    3121 (2.3%)
+   Neil Armstrong                    2955 (2.2%)
+   Masahiro Yamada                   2858 (2.1%)
+   Jerome Brunet                     2857 (2.1%)
+   Heinrich Schuchardt               2791 (2.0%)
+   Alifer Moraes                     2771 (2.0%)
+   Ioana Ciornei                     2600 (1.9%)
+   Peng Fan                          2524 (1.9%)
+   Giulio Benetti                    2044 (1.5%)
+   Weijie Gao                        2014 (1.5%)
+   Chen-Yu Tsai                      1856 (1.4%)
+   Kuldeep Singh                     1439 (1.1%)
+   Peter Robinson                    1377 (1.0%)
+   Amit Singh Tomar                  1349 (1.0%)
+   Biwen Li                          1310 (1.0%)
+   Chunfeng Yun                      1271 (0.9%)
+   Rayagonda Kokatanur               1185 (0.9%)
+   Eugeniy Paltsev                   1092 (0.8%)
+   Han Xu                            1050 (0.8%)
+   Franck LENORMAND                  1030 (0.8%)
+   Dario Binacchi                    1027 (0.8%)
+   Michael Krummsdorf                1024 (0.8%)
+   Ashok Reddy Soma                  1008 (0.7%)
+   Ilias Apalodimas                  847 (0.6%)
+   Ye Li                             839 (0.6%)
+   Marek Behún                       710 (0.5%)
+   Vignesh Raghavendra               616 (0.5%)
+   Landen Chao                       577 (0.4%)
+   Bin Meng                          541 (0.4%)
+   Heiko Stuebner                    520 (0.4%)
+   Keerthy                           519 (0.4%)
+   Heiko Schocher                    472 (0.3%)
+   Michael Walle                     453 (0.3%)
+   Pali Rohár                        453 (0.3%)
+   Hou Zhiqiang                      445 (0.3%)
+   Fabio Estevam                     420 (0.3%)
+   b.l.huang                         414 (0.3%)
+   Breno Lima                        404 (0.3%)
+   Kever Yang                        386 (0.3%)
+   Atish Patra                       378 (0.3%)
+   Joel Johnson                      357 (0.3%)
+   Frank Wang                        357 (0.3%)
+   Alice Guo                         338 (0.2%)
+   Ley Foon Tan                      313 (0.2%)
+   Hayes Wang                        279 (0.2%)
+   Mauro Condarelli                  279 (0.2%)
+   Sean Anderson                     269 (0.2%)
+   Tero Kristo                       268 (0.2%)
+   Stefan Roese                      262 (0.2%)
+   Beniamino Galvani                 259 (0.2%)
+   Lin Jinhan                        257 (0.2%)
+   Sam Shih                          248 (0.2%)
+   Walter Lozano                     242 (0.2%)
+   Philippe Schenker                 237 (0.2%)
+   Fugang Duan                       234 (0.2%)
+   Yuantian Tang                     227 (0.2%)
+   Sughosh Ganu                      225 (0.2%)
+   Lokesh Vutla                      208 (0.2%)
+   Rob Herring                       206 (0.2%)
+   Robert Marko                      204 (0.1%)
+   Luka Kovacic                      165 (0.1%)
+   Harald Seiler                     164 (0.1%)
+   Igor Opaniuk                      161 (0.1%)
+   Rasmus Villemoes                  158 (0.1%)
+   Trevor Woerner                    151 (0.1%)
+   Deepak Das                        148 (0.1%)
+   Andre Przywara                    142 (0.1%)
+   Ovidiu Panait                     133 (0.1%)
+   Suman Anna                        133 (0.1%)
+   Yoshio Furuyama                   130 (0.1%)
+   Petr Borsodi                      128 (0.1%)
+   Jaiprakash Singh                  111 (0.1%)
+   Laurentiu Tudor                   102 (0.1%)
+   Suniel Mahesh                     100 (0.1%)
+   Frédéric Danis                    87 (0.1%)
+   Moses Christopher                 84 (0.1%)
+   Florinel Iordache                 81 (0.1%)
+   Philippe Reynes                   81 (0.1%)
+   Martyn Welch                      72 (0.1%)
+   Vladimir Oltean                   71 (0.1%)
+   Michael Auchter                   69 (0.1%)
+   Andy Shevchenko                   68 (0.0%)
+   Chris Packham                     67 (0.0%)
+   Alain Volmat                      59 (0.0%)
+   Yangbo Lu                         58 (0.0%)
+   Christophe Roullier               55 (0.0%)
+   Andrew F. Davis                   53 (0.0%)
+   Yusuke Ashiduka                   53 (0.0%)
+   Marek Bykowski                    52 (0.0%)
+   Jan Kiszka                        50 (0.0%)
+   Yannick Fertre                    48 (0.0%)
+   Andreas Dannenberg                47 (0.0%)
+   Claudius Heine                    45 (0.0%)
+   Yinbo Zhu                         45 (0.0%)
+   Anatolij Gustschin                42 (0.0%)
+   Etienne Carriere                  42 (0.0%)
+   Thirupathaiah Annapureddy         41 (0.0%)
+   Lukas Auer                        40 (0.0%)
+   Qu Wenruo                         39 (0.0%)
+   Mark Kettenis                     38 (0.0%)
+   T Karthik Reddy                   38 (0.0%)
+   Christian Gmeiner                 36 (0.0%)
+   Samuel Holland                    31 (0.0%)
+   Matthias Brugger                  30 (0.0%)
+   Marcin Juszkiewicz                29 (0.0%)
+   Manish Narani                     29 (0.0%)
+   Patrick Wildt                     28 (0.0%)
+   Kurt Miller                       27 (0.0%)
+   Patrice Chotard                   26 (0.0%)
+   Jun Chen                          25 (0.0%)
+   Daniel Schwierzeck                23 (0.0%)
+   Haibo Chen                        22 (0.0%)
+   Álvaro Fernández Rojas            22 (0.0%)
+   Arthur Li                         22 (0.0%)
+   Peter Collingbourne               22 (0.0%)
+   Ludovic Barre                     22 (0.0%)
+   Max Krummenacher                  21 (0.0%)
+   Alexander Kochetkov               21 (0.0%)
+   Nicolas Heemeryck                 21 (0.0%)
+   Jan Luebbe                        21 (0.0%)
+   Urja Rannikko                     19 (0.0%)
+   Raul E Rangel                     17 (0.0%)
+   Pratyush Yadav                    17 (0.0%)
+   Lukasz Majewski                   15 (0.0%)
+   Ashish Kumar                      15 (0.0%)
+   Jakov Petrina                     14 (0.0%)
+   Kyle Evans                        14 (0.0%)
+   Praneeth Bajjuri                  14 (0.0%)
+   Razvan Ionut Cirjan               14 (0.0%)
+   Lihua Zhao                        14 (0.0%)
+   Jon Hunter                        13 (0.0%)
+   Meenakshi Aggarwal                13 (0.0%)
+   Otavio Salvador                   12 (0.0%)
+   Ezra Buehler                      12 (0.0%)
+   Andrius Štikonas                  12 (0.0%)
+   Benedikt Grassl                   12 (0.0%)
+   Frank Li                          11 (0.0%)
+   Oliver Graute                     11 (0.0%)
+   Joakim Tjernlund                  11 (0.0%)
+   Nava kishore Manne                11 (0.0%)
+   Jaehoon Chung                     10 (0.0%)
+   Leonard Crestez                   10 (0.0%)
+   Josip Kelecic                     10 (0.0%)
+   Pramod Kumar                      9 (0.0%)
+   Charles Frey                      9 (0.0%)
+   Sam Protsenko                     8 (0.0%)
+   Pankit Garg                       8 (0.0%)
+   Tiaki Rice                        8 (0.0%)
+   Eugen Hristev                     7 (0.0%)
+   Josua Mayer                       7 (0.0%)
+   Bharat Kumar Reddy Gooty          6 (0.0%)
+   Stefano Babic                     6 (0.0%)
+   Sébastien Szymanski               6 (0.0%)
+   Josef Lusticky                    6 (0.0%)
+   Quanyang Wang                     6 (0.0%)
+   Sven Roederer                     5 (0.0%)
+   Hiroyuki Yokoyama                 5 (0.0%)
+   Stefan Agner                      4 (0.0%)
+   Oleksandr Suvorov                 4 (0.0%)
+   Roman Stratiienko                 4 (0.0%)
+   Lionel Debieve                    4 (0.0%)
+   Nicolas Saenz Julienne            4 (0.0%)
+   Murali Karicheri                  4 (0.0%)
+   Seb Fagard                        4 (0.0%)
+   Alison Wang                       4 (0.0%)
+   Markus Niebel                     4 (0.0%)
+   Vagrant Cascadian                 3 (0.0%)
+   Alex Nemirovsky                   3 (0.0%)
+   Gary Bisson                       3 (0.0%)
+   Tudor Ambarus                     3 (0.0%)
+   Arnaud Ferraris                   3 (0.0%)
+   Saeed Nowshadi                    3 (0.0%)
+   Tom Warren                        2 (0.0%)
+   Corentin Labbe                    2 (0.0%)
+   Sherry Sun                        2 (0.0%)
+   Francois Gervais                  2 (0.0%)
+   Karl Palsson                      2 (0.0%)
+   Varalaxmi Bingi                   2 (0.0%)
+   Amit Kumar Mahapatra              2 (0.0%)
+   Eugeniu Rosca                     2 (0.0%)
+   Yegor Yefremov                    2 (0.0%)
+   Marcel Ziswiler                   1 (0.0%)
+   Romain Naour                      1 (0.0%)
+   Christophe Leroy                  1 (0.0%)
+   Jonathan Gray                     1 (0.0%)
+   Marek Szyprowski                  1 (0.0%)
+   Siva Durga Prasad Paladugu        1 (0.0%)
+   Bacem Daassi                      1 (0.0%)
+   Patrick van Gelder                1 (0.0%)
+   Baruch Siach                      1 (0.0%)
+   Jonathan Corbet                   1 (0.0%)
+   Thomas Hebb                       1 (0.0%)
+   Sudeep Holla                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Masahiro Yamada                   1021 (2.3%)
+   Kuldeep Singh                     682 (1.5%)
+   Ashok Reddy Soma                  179 (0.4%)
+   Frank Wang                        94 (0.2%)
+   Kever Yang                        89 (0.2%)
+   Heiko Schocher                    85 (0.2%)
+   Igor Opaniuk                      79 (0.2%)
+   Martyn Welch                      69 (0.2%)
+   Walter Lozano                     54 (0.1%)
+   Claudius Heine                    42 (0.1%)
+   Lukas Auer                        40 (0.1%)
+   Fabio Estevam                     29 (0.1%)
+   Lokesh Vutla                      28 (0.1%)
+   Max Krummenacher                  15 (0.0%)
+   Arthur Li                         10 (0.0%)
+   Rasmus Villemoes                  9 (0.0%)
+   Jakov Petrina                     6 (0.0%)
+   Michael Auchter                   5 (0.0%)
+   Benedikt Grassl                   5 (0.0%)
+   Sébastien Szymanski               5 (0.0%)
+   Trevor Woerner                    3 (0.0%)
+   Yannick Fertre                    3 (0.0%)
+   Alex Nemirovsky                   2 (0.0%)
+   Karl Palsson                      2 (0.0%)
+   Leonard Crestez                   1 (0.0%)
+   Seb Fagard                        1 (0.0%)
+   Romain Naour                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 285)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Peng Fan                          59 (20.7%)
+   Alexey Brodkin                    30 (10.5%)
+   Michal Simek                      16 (5.6%)
+   Priyanka Jain                     15 (5.3%)
+   Frank Wunderlich                  14 (4.9%)
+   Neil Armstrong                    11 (3.9%)
+   Patrick Delaunay                  11 (3.9%)
+   Matthias Brugger                  10 (3.5%)
+   Tom Rini                          8 (2.8%)
+   Ye Li                             7 (2.5%)
+   Bin Meng                          6 (2.1%)
+   Fabio Estevam                     5 (1.8%)
+   Simon Glass                       5 (1.8%)
+   Lokesh Vutla                      4 (1.4%)
+   Ashish Kumar                      4 (1.4%)
+   Frieder Schrempf                  4 (1.4%)
+   Vabhav Sharma                     4 (1.4%)
+   Bharat Kumar Reddy Gooty          4 (1.4%)
+   Jagan Teki                        4 (1.4%)
+   Miquel Raynal                     3 (1.1%)
+   Harald Seiler                     3 (1.1%)
+   Frank Wang                        2 (0.7%)
+   Wolfgang Wallner                  2 (0.7%)
+   Vladimir Vid                      2 (0.7%)
+   Vladimir Olovyannikov             2 (0.7%)
+   Vladimir Oltean                   2 (0.7%)
+   Andreas Dannenberg                2 (0.7%)
+   Suniel Mahesh                     2 (0.7%)
+   Robert Marko                      2 (0.7%)
+   Vignesh Raghavendra               2 (0.7%)
+   Han Xu                            2 (0.7%)
+   Rayagonda Kokatanur               2 (0.7%)
+   Masahiro Yamada                   1 (0.4%)
+   Kuldeep Singh                     1 (0.4%)
+   Ashok Reddy Soma                  1 (0.4%)
+   Kever Yang                        1 (0.4%)
+   Michael Auchter                   1 (0.4%)
+   Alex Nemirovsky                   1 (0.4%)
+   Christophe Leroy                  1 (0.4%)
+   Michael Trimarchi                 1 (0.4%)
+   Adrian Alonso                     1 (0.4%)
+   Russell King                      1 (0.4%)
+   Shawn Guo                         1 (0.4%)
+   Oleksij Rempel                    1 (0.4%)
+   David S. Miller                   1 (0.4%)
+   Holger Brunck                     1 (0.4%)
+   Faiz Abbas                        1 (0.4%)
+   Pipat Methavanitpong              1 (0.4%)
+   Bastian Krause                    1 (0.4%)
+   Catia Han                         1 (0.4%)
+   Florin Laurentiu Chiculita        1 (0.4%)
+   Shengzhou Liu                     1 (0.4%)
+   Xiaowei Bao                       1 (0.4%)
+   Arjun Jyothi                      1 (0.4%)
+   Sheetal Tigadoli                  1 (0.4%)
+   Filip Brozovic                    1 (0.4%)
+   Shiril Tichkule                   1 (0.4%)
+   Anatolij Gustschin                1 (0.4%)
+   Patrick Wildt                     1 (0.4%)
+   Yangbo Lu                         1 (0.4%)
+   Christophe Roullier               1 (0.4%)
+   Stefan Roese                      1 (0.4%)
+   Sean Anderson                     1 (0.4%)
+   Sughosh Ganu                      1 (0.4%)
+   Michael Walle                     1 (0.4%)
+   Michael Krummsdorf                1 (0.4%)
+   Ilias Apalodimas                  1 (0.4%)
+   Marek Vasut                       1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 1117)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       158 (14.1%)
+   Priyanka Jain                     130 (11.6%)
+   Bin Meng                          102 (9.1%)
+   Kever Yang                        91 (8.1%)
+   Stefan Roese                      66 (5.9%)
+   Patrice Chotard                   56 (5.0%)
+   Tom Rini                          49 (4.4%)
+   Jagan Teki                        42 (3.8%)
+   Patrick Delaunay                  41 (3.7%)
+   Fabio Estevam                     33 (3.0%)
+   Heinrich Schuchardt               28 (2.5%)
+   Peng Fan                          26 (2.3%)
+   Wolfgang Wallner                  21 (1.9%)
+   Anatolij Gustschin                18 (1.6%)
+   Daniel Schwierzeck                17 (1.5%)
+   Weijie Gao                        17 (1.5%)
+   Heiko Schocher                    12 (1.1%)
+   Jaehoon Chung                     11 (1.0%)
+   Atish Patra                       11 (1.0%)
+   Philipp Tomsich                   10 (0.9%)
+   Manivannan Sadhasivam             10 (0.9%)
+   Masahiro Yamada                   9 (0.8%)
+   Oleksandr Suvorov                 9 (0.8%)
+   Lukasz Majewski                   9 (0.8%)
+   Wasim Khan                        8 (0.7%)
+   Punit Agrawal                     8 (0.7%)
+   Andre Przywara                    8 (0.7%)
+   Marek Vasut                       7 (0.6%)
+   Rick Chen                         7 (0.6%)
+   Ye Li                             6 (0.5%)
+   Razvan Ionut Cirjan               6 (0.5%)
+   Andy Shevchenko                   6 (0.5%)
+   Pragnesh Patel                    6 (0.5%)
+   Lokesh Vutla                      5 (0.4%)
+   Linus Walleij                     5 (0.4%)
+   Neil Armstrong                    4 (0.4%)
+   Frieder Schrempf                  3 (0.3%)
+   Sagar Kadam                       3 (0.3%)
+   Minkyu Kang                       3 (0.3%)
+   Simon Goldschmidt                 3 (0.3%)
+   Marek Behún                       3 (0.3%)
+   Vladimir Oltean                   2 (0.2%)
+   Michael Walle                     2 (0.2%)
+   Enric Balletbo i Serra            2 (0.2%)
+   Luca Ceresoli                     2 (0.2%)
+   Anup Patel                        2 (0.2%)
+   Ramon Fried                       2 (0.2%)
+   Stefano Babic                     2 (0.2%)
+   Chris Packham                     2 (0.2%)
+   Fugang Duan                       2 (0.2%)
+   Michal Simek                      1 (0.1%)
+   Vignesh Raghavendra               1 (0.1%)
+   Michael Trimarchi                 1 (0.1%)
+   Russell King                      1 (0.1%)
+   Sughosh Ganu                      1 (0.1%)
+   Igor Opaniuk                      1 (0.1%)
+   Philippe Cornu                    1 (0.1%)
+   Eric Nelson                       1 (0.1%)
+   Wolfgang Denk                     1 (0.1%)
+   Furquan Shaikh                    1 (0.1%)
+   Palmer Dabbelt                    1 (0.1%)
+   Diana Craciun                     1 (0.1%)
+   George McCollister                1 (0.1%)
+   Florian Fainelli                  1 (0.1%)
+   Anson Huang                       1 (0.1%)
+   Bai Ping                          1 (0.1%)
+   Grygorii Strashko                 1 (0.1%)
+   Stephen Warren                    1 (0.1%)
+   Ryan Harkin                       1 (0.1%)
+   Vikas MANOCHA                     1 (0.1%)
+   Anand Moon                        1 (0.1%)
+   Magnus Lilja                      1 (0.1%)
+   Felix Brack                       1 (0.1%)
+   Eugeniu Rosca                     1 (0.1%)
+   Eugen Hristev                     1 (0.1%)
+   T Karthik Reddy                   1 (0.1%)
+   Luka Kovacic                      1 (0.1%)
+   Ley Foon Tan                      1 (0.1%)
+   Amit Singh Tomar                  1 (0.1%)
+   Ioana Ciornei                     1 (0.1%)
+   Adam Ford                         1 (0.1%)
+   AKASHI Takahiro                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 132)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          33 (25.0%)
+   Jagan Teki                        18 (13.6%)
+   Suniel Mahesh                     9 (6.8%)
+   Heiko Schocher                    6 (4.5%)
+   Sagar Kadam                       6 (4.5%)
+   Tom Rini                          5 (3.8%)
+   Peter Robinson                    5 (3.8%)
+   Loic Devulder                     4 (3.0%)
+   Peter Geis                        4 (3.0%)
+   Simon Glass                       3 (2.3%)
+   Heinrich Schuchardt               3 (2.3%)
+   Igor Opaniuk                      3 (2.3%)
+   Adam Ford                         3 (2.3%)
+   Vladimir Oltean                   2 (1.5%)
+   Luka Kovacic                      2 (1.5%)
+   Vagrant Cascadian                 2 (1.5%)
+   Dario Binacchi                    2 (1.5%)
+   Stefan Roese                      1 (0.8%)
+   Patrice Chotard                   1 (0.8%)
+   Patrick Delaunay                  1 (0.8%)
+   Wolfgang Wallner                  1 (0.8%)
+   Marek Vasut                       1 (0.8%)
+   Michal Simek                      1 (0.8%)
+   Russell King                      1 (0.8%)
+   Anand Moon                        1 (0.8%)
+   Ley Foon Tan                      1 (0.8%)
+   Frank Wunderlich                  1 (0.8%)
+   Walter Lozano                     1 (0.8%)
+   Sébastien Szymanski               1 (0.8%)
+   Soeren Moch                       1 (0.8%)
+   Troy Kisky                        1 (0.8%)
+   Marco Franchi                     1 (0.8%)
+   Derek Atkins                      1 (0.8%)
+   Jorge Ramirez-Ortiz               1 (0.8%)
+   Marcin Juszkiewicz                1 (0.8%)
+   Mark Kettenis                     1 (0.8%)
+   Jan Kiszka                        1 (0.8%)
+   Pali Rohár                        1 (0.8%)
+   Jerome Brunet                     1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 132)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Pragnesh Patel                    25 (18.9%)
+   Jagan Teki                        15 (11.4%)
+   Fabio Estevam                     15 (11.4%)
+   Simon Glass                       13 (9.8%)
+   Chen-Yu Tsai                      8 (6.1%)
+   Atish Patra                       6 (4.5%)
+   Andy Shevchenko                   4 (3.0%)
+   Ye Li                             3 (2.3%)
+   Frank Wang                        3 (2.3%)
+   Bernhard Messerklinger            3 (2.3%)
+   Peter Robinson                    2 (1.5%)
+   Dario Binacchi                    2 (1.5%)
+   Patrick Delaunay                  2 (1.5%)
+   Michal Simek                      2 (1.5%)
+   Mark Kettenis                     2 (1.5%)
+   Robert Marko                      2 (1.5%)
+   Jon Hunter                        2 (1.5%)
+   Philippe Schenker                 2 (1.5%)
+   Lin Jinhan                        2 (1.5%)
+   Hou Zhiqiang                      2 (1.5%)
+   Bin Meng                          1 (0.8%)
+   Heiko Schocher                    1 (0.8%)
+   Tom Rini                          1 (0.8%)
+   Heinrich Schuchardt               1 (0.8%)
+   Patrice Chotard                   1 (0.8%)
+   Jan Kiszka                        1 (0.8%)
+   Jerome Brunet                     1 (0.8%)
+   Anatolij Gustschin                1 (0.8%)
+   Masahiro Yamada                   1 (0.8%)
+   Neil Armstrong                    1 (0.8%)
+   Eugeniu Rosca                     1 (0.8%)
+   Kuldeep Singh                     1 (0.8%)
+   Patrick Wildt                     1 (0.8%)
+   Martyn Welch                      1 (0.8%)
+   Andrius Štikonas                  1 (0.8%)
+   Landen Chao                       1 (0.8%)
+   Alifer Moraes                     1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 38)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          4 (10.5%)
+   Tom Rini                          4 (10.5%)
+   Ard Biesheuvel                    3 (7.9%)
+   Fabio Estevam                     2 (5.3%)
+   Heinrich Schuchardt               2 (5.3%)
+   Jerome Brunet                     2 (5.3%)
+   Suniel Mahesh                     2 (5.3%)
+   Grygorii Strashko                 2 (5.3%)
+   Dario                             2 (5.3%)
+   Simon Glass                       1 (2.6%)
+   Michal Simek                      1 (2.6%)
+   Heiko Schocher                    1 (2.6%)
+   Adam Ford                         1 (2.6%)
+   Russell King                      1 (2.6%)
+   Soeren Moch                       1 (2.6%)
+   Derek Atkins                      1 (2.6%)
+   Jorge Ramirez-Ortiz               1 (2.6%)
+   Rick Chen                         1 (2.6%)
+   Michael Walle                     1 (2.6%)
+   Stefano Babic                     1 (2.6%)
+   Nicolas Carrier                   1 (2.6%)
+   Alex Kiernan                      1 (2.6%)
+   Chee Hong Ang                     1 (2.6%)
+   Sicris Rey Embay                  1 (2.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 38)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Fabio Estevam                     7 (18.4%)
+   Heinrich Schuchardt               6 (15.8%)
+   Tom Rini                          4 (10.5%)
+   Andy Shevchenko                   4 (10.5%)
+   Simon Glass                       3 (7.9%)
+   Jagan Teki                        2 (5.3%)
+   Neil Armstrong                    2 (5.3%)
+   Lokesh Vutla                      2 (5.3%)
+   Bin Meng                          1 (2.6%)
+   Masahiro Yamada                   1 (2.6%)
+   Eugeniu Rosca                     1 (2.6%)
+   Ley Foon Tan                      1 (2.6%)
+   Peng Fan                          1 (2.6%)
+   AKASHI Takahiro                   1 (2.6%)
+   Romain Naour                      1 (2.6%)
+   Andrew F. Davis                   1 (2.6%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         630 (32.8%)
+   NXP                               276 (14.4%)
+   Google, Inc.                      191 (10.0%)
+   DENX Software Engineering         178 (9.3%)
+   ST Microelectronics               140 (7.3%)
+   Amarula Solutions                 80 (4.2%)
+   Konsulko Group                    59 (3.1%)
+   Texas Instruments                 57 (3.0%)
+   AMD                               54 (2.8%)
+   Linaro                            48 (2.5%)
+   BayLibre SAS                      33 (1.7%)
+   Rockchip                          32 (1.7%)
+   Socionext Inc.                    28 (1.5%)
+   Intel                             16 (0.8%)
+   Xilinx                            15 (0.8%)
+   Toradex                           14 (0.7%)
+   Collabora Ltd.                    11 (0.6%)
+   SUSE                              9 (0.5%)
+   ARM                               8 (0.4%)
+   Wind River                        8 (0.4%)
+   Broadcom                          7 (0.4%)
+   Siemens                           6 (0.3%)
+   NVidia                            4 (0.2%)
+   Samsung                           4 (0.2%)
+   Debian.org                        2 (0.1%)
+   O.S. Systems                      2 (0.1%)
+   Boundary Devices                  1 (0.1%)
+   Fujitsu                           1 (0.1%)
+   LWN.net                           1 (0.1%)
+   National Instruments              1 (0.1%)
+   Pengutronix                       1 (0.1%)
+   Renesas Electronics               1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         37254 (27.3%)
+   NXP                               17353 (12.7%)
+   DENX Software Engineering         16732 (12.3%)
+   Google, Inc.                      13145 (9.6%)
+   ST Microelectronics               11287 (8.3%)
+   Amarula Solutions                 8389 (6.2%)
+   Konsulko Group                    6578 (4.8%)
+   Linaro                            6190 (4.5%)
+   BayLibre SAS                      5814 (4.3%)
+   AMD                               3939 (2.9%)
+   Socionext Inc.                    2858 (2.1%)
+   Texas Instruments                 1879 (1.4%)
+   Broadcom                          1191 (0.9%)
+   Xilinx                            1094 (0.8%)
+   Rockchip                          1000 (0.7%)
+   Collabora Ltd.                    404 (0.3%)
+   Intel                             381 (0.3%)
+   Toradex                           267 (0.2%)
+   ARM                               143 (0.1%)
+   SUSE                              69 (0.1%)
+   National Instruments              69 (0.1%)
+   Wind River                        61 (0.0%)
+   Fujitsu                           53 (0.0%)
+   Siemens                           50 (0.0%)
+   Pengutronix                       21 (0.0%)
+   NVidia                            15 (0.0%)
+   O.S. Systems                      12 (0.0%)
+   Samsung                           11 (0.0%)
+   Renesas Electronics               5 (0.0%)
+   Debian.org                        3 (0.0%)
+   Boundary Devices                  3 (0.0%)
+   LWN.net                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 285)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   NXP                               100 (35.1%)
+   (Unknown)                         79 (27.7%)
+   Xilinx                            17 (6.0%)
+   ST Microelectronics               12 (4.2%)
+   BayLibre SAS                      11 (3.9%)
+   Broadcom                          10 (3.5%)
+   SUSE                              10 (3.5%)
+   Texas Instruments                 9 (3.2%)
+   Konsulko Group                    8 (2.8%)
+   Amarula Solutions                 7 (2.5%)
+   DENX Software Engineering         5 (1.8%)
+   Google, Inc.                      5 (1.8%)
+   Rockchip                          3 (1.1%)
+   Bootlin                           3 (1.1%)
+   Linaro                            2 (0.7%)
+   Pengutronix                       2 (0.7%)
+   National Instruments              1 (0.4%)
+   Wind River                        1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 204)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         91 (44.6%)
+   NXP                               30 (14.7%)
+   Texas Instruments                 10 (4.9%)
+   Xilinx                            8 (3.9%)
+   DENX Software Engineering         8 (3.9%)
+   ST Microelectronics               7 (3.4%)
+   Toradex                           5 (2.5%)
+   Linaro                            4 (2.0%)
+   Collabora Ltd.                    4 (2.0%)
+   BayLibre SAS                      3 (1.5%)
+   Rockchip                          3 (1.5%)
+   Wind River                        3 (1.5%)
+   Broadcom                          2 (1.0%)
+   SUSE                              2 (1.0%)
+   Amarula Solutions                 2 (1.0%)
+   Google, Inc.                      2 (1.0%)
+   Intel                             2 (1.0%)
+   ARM                               2 (1.0%)
+   NVidia                            2 (1.0%)
+   Samsung                           2 (1.0%)
+   Konsulko Group                    1 (0.5%)
+   Pengutronix                       1 (0.5%)
+   National Instruments              1 (0.5%)
+   AMD                               1 (0.5%)
+   Socionext Inc.                    1 (0.5%)
+   Fujitsu                           1 (0.5%)
+   Siemens                           1 (0.5%)
+   O.S. Systems                      1 (0.5%)
+   Renesas Electronics               1 (0.5%)
+   Debian.org                        1 (0.5%)
+   Boundary Devices                  1 (0.5%)
+   LWN.net                           1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2020.10.rst b/doc/develop/statistics/u-boot-stats-v2020.10.rst
new file mode 100644
index 00000000000..fbd7e05ce26
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2020.10.rst
@@ -0,0 +1,977 @@
+:orphan:
+
+Release Statistics for U-Boot v2020.10
+======================================
+
+* Processed 2048 changesets from 227 developers
+
+* 31 employers found
+
+* A total of 166886 lines added, 60806 removed (delta 106080)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       352 (17.2%)
+   Heinrich Schuchardt               153 (7.5%)
+   Marek Vasut                       112 (5.5%)
+   Patrick Delaunay                  103 (5.0%)
+   Tom Rini                          80 (3.9%)
+   Jagan Teki                        74 (3.6%)
+   Michal Simek                      48 (2.3%)
+   Masahiro Yamada                   39 (1.9%)
+   AKASHI Takahiro                   36 (1.8%)
+   Stefan Roese                      34 (1.7%)
+   Peng Fan                          34 (1.7%)
+   Bin Meng                          27 (1.3%)
+   Michael Walle                     25 (1.2%)
+   Rayagonda Kokatanur               25 (1.2%)
+   Walter Lozano                     24 (1.2%)
+   Igor Opaniuk                      23 (1.1%)
+   Suneel Garapati                   22 (1.1%)
+   Ovidiu Panait                     22 (1.1%)
+   Sean Anderson                     20 (1.0%)
+   Vignesh Raghavendra               20 (1.0%)
+   Rasmus Villemoes                  19 (0.9%)
+   Andy Shevchenko                   19 (0.9%)
+   Dave Gerlach                      19 (0.9%)
+   Lokesh Vutla                      18 (0.9%)
+   Adam Ford                         17 (0.8%)
+   Anatolij Gustschin                17 (0.8%)
+   Pali Rohár                        16 (0.8%)
+   Frank Wunderlich                  16 (0.8%)
+   Faiz Abbas                        16 (0.8%)
+   Daniel Schwierzeck                14 (0.7%)
+   Joao Marcos Costa                 14 (0.7%)
+   Ye Li                             14 (0.7%)
+   Stefan Bosch                      14 (0.7%)
+   Heiko Stuebner                    13 (0.6%)
+   Anastasiia Lukianenko             12 (0.6%)
+   Dario Binacchi                    12 (0.6%)
+   Kever Yang                        11 (0.5%)
+   Christophe Kerello                11 (0.5%)
+   Philippe Reynes                   11 (0.5%)
+   Pragnesh Patel                    9 (0.4%)
+   Marek Szyprowski                  9 (0.4%)
+   Sagar Shrikant Kadam              9 (0.4%)
+   Niel Fourie                       9 (0.4%)
+   Xiaowei Bao                       9 (0.4%)
+   Amit Singh Tomar                  9 (0.4%)
+   Marcel Ziswiler                   9 (0.4%)
+   T Karthik Reddy                   8 (0.4%)
+   Lukasz Majewski                   8 (0.4%)
+   Ibai Erkiaga                      8 (0.4%)
+   Oleksandr Andrushchenko           8 (0.4%)
+   Tero Kristo                       8 (0.4%)
+   Fabio Estevam                     7 (0.3%)
+   John Robertson                    7 (0.3%)
+   Wolfgang Wallner                  7 (0.3%)
+   Andre Przywara                    7 (0.3%)
+   Dan Murphy                        7 (0.3%)
+   Patrice Chotard                   6 (0.3%)
+   Kuldeep Singh                     6 (0.3%)
+   Chuanjia Liu                      6 (0.3%)
+   Chia-Wei, Wang                    6 (0.3%)
+   Patrick Oppenlander               6 (0.3%)
+   Ilias Apalodimas                  6 (0.3%)
+   Zhao Qiang                        6 (0.3%)
+   Biwen Li                          6 (0.3%)
+   Johannes Krottmayer               6 (0.3%)
+   Shivamurthy Shastri               6 (0.3%)
+   Nicolas Saenz Julienne            6 (0.3%)
+   Denis 'GNUtoo' Carikli            6 (0.3%)
+   Baruch Siach                      5 (0.2%)
+   Chris Packham                     5 (0.2%)
+   Ashok Reddy Soma                  5 (0.2%)
+   Luka Kovacic                      5 (0.2%)
+   David Woodhouse                   5 (0.2%)
+   Ard Biesheuvel                    5 (0.2%)
+   Sylwester Nawrocki                5 (0.2%)
+   Simon Guinot                      5 (0.2%)
+   Andre Heider                      4 (0.2%)
+   Heiko Schocher                    4 (0.2%)
+   Peter Robinson                    4 (0.2%)
+   Hou Zhiqiang                      4 (0.2%)
+   Hayes Wang                        4 (0.2%)
+   Wig Cheng                         4 (0.2%)
+   Andrew F. Davis                   4 (0.2%)
+   Suman Anna                        4 (0.2%)
+   Jan Kiszka                        4 (0.2%)
+   Robert Marko                      4 (0.2%)
+   Yangbo Lu                         4 (0.2%)
+   Nicolas Boichat                   4 (0.2%)
+   Suniel Mahesh                     4 (0.2%)
+   Soeren Moch                       3 (0.1%)
+   Neil Armstrong                    3 (0.1%)
+   Wasim Khan                        3 (0.1%)
+   Chaitanya Sakinam                 3 (0.1%)
+   hui.song                          3 (0.1%)
+   Anand Moon                        3 (0.1%)
+   Jason Wessel                      3 (0.1%)
+   Sherry Sun                        3 (0.1%)
+   Roman Kovalivskyi                 3 (0.1%)
+   Stephen Warren                    3 (0.1%)
+   Bharat Gooty                      3 (0.1%)
+   Jian Li                           3 (0.1%)
+   Mike Looijmans                    3 (0.1%)
+   Lad Prabhakar                     2 (0.1%)
+   Madalin Bucur                     2 (0.1%)
+   Meenakshi Aggarwal                2 (0.1%)
+   Martin Kaistra                    2 (0.1%)
+   Vladimir Vid                      2 (0.1%)
+   Maxim Uvarov                      2 (0.1%)
+   Philippe Schenker                 2 (0.1%)
+   Konstantin Porotchkin             2 (0.1%)
+   Reuben Dowle                      2 (0.1%)
+   Ley Foon Tan                      2 (0.1%)
+   John Chau                         2 (0.1%)
+   Usama Arif                        2 (0.1%)
+   Andrii Anisov                     2 (0.1%)
+   Jway Lin                          2 (0.1%)
+   Bernhard Messerklinger            2 (0.1%)
+   Pramod Kumar                      2 (0.1%)
+   MarkLee                           2 (0.1%)
+   Jacky Bai                         2 (0.1%)
+   Johannes Holland                  2 (0.1%)
+   Yash Shah                         2 (0.1%)
+   Christian Hewitt                  2 (0.1%)
+   Luca Ceresoli                     2 (0.1%)
+   Gregory CLEMENT                   2 (0.1%)
+   Eugen Hristev                     2 (0.1%)
+   Peter Ujfalusi                    2 (0.1%)
+   Ravik Hasija                      2 (0.1%)
+   Etienne Carriere                  1 (0.0%)
+   Naoki Hayama                      1 (0.0%)
+   Rick Chen                         1 (0.0%)
+   Grigore Popescu                   1 (0.0%)
+   Thirupathaiah Annapureddy         1 (0.0%)
+   Ran Wang                          1 (0.0%)
+   Dennis Gilmore                    1 (0.0%)
+   Vladimir Oltean                   1 (0.0%)
+   Mian Yousaf Kaukab                1 (0.0%)
+   Mauro Condarelli                  1 (0.0%)
+   Ralph Siemsen                     1 (0.0%)
+   Thomas Fitzsimmons                1 (0.0%)
+   Haibo Chen                        1 (0.0%)
+   Denis Pynkin                      1 (0.0%)
+   Miquel Raynal                     1 (0.0%)
+   Thomas Petazzoni                  1 (0.0%)
+   Marek Behún                       1 (0.0%)
+   Manivannan Sadhasivam             1 (0.0%)
+   Ramon Fried                       1 (0.0%)
+   Robert Reither                    1 (0.0%)
+   Mingming Lee                      1 (0.0%)
+   Pedro Aguilar                     1 (0.0%)
+   Matthias Brugger                  1 (0.0%)
+   zachary                           1 (0.0%)
+   Chee Hong Ang                     1 (0.0%)
+   Gary Bisson                       1 (0.0%)
+   yurii.pidhornyi                   1 (0.0%)
+   Frank Li                          1 (0.0%)
+   Jassi Brar                        1 (0.0%)
+   Filip Brozovic                    1 (0.0%)
+   Wilson Ding                       1 (0.0%)
+   Evan Wang                         1 (0.0%)
+   Ruben Di Battista                 1 (0.0%)
+   Grygorii Tertychnyi               1 (0.0%)
+   Aaron Williams                    1 (0.0%)
+   Trommel, Kees (Contractor)        1 (0.0%)
+   Chunfeng Yun                      1 (0.0%)
+   Igor Lantsman                     1 (0.0%)
+   Matthias Schiffer                 1 (0.0%)
+   Stefano Babic                     1 (0.0%)
+   Srinath Mannam                    1 (0.0%)
+   Leo Liang                         1 (0.0%)
+   Kishon Vijay Abraham I            1 (0.0%)
+   Jean-Jacques Hiblot               1 (0.0%)
+   Derald D. Woods                   1 (0.0%)
+   Alex Nemirovsky                   1 (0.0%)
+   Icenowy Zheng                     1 (0.0%)
+   Brian Moyer                       1 (0.0%)
+   Yan Liu                           1 (0.0%)
+   Jonas Smedegaard                  1 (0.0%)
+   Yann Gautier                      1 (0.0%)
+   Doyle, Patrick                    1 (0.0%)
+   Parthiban Nallathambi             1 (0.0%)
+   Ivan Mikhaylov                    1 (0.0%)
+   Vikas Gupta                       1 (0.0%)
+   Abhishek Shah                     1 (0.0%)
+   chenshuo                          1 (0.0%)
+   Marcin Sloniewski                 1 (0.0%)
+   Jakob Riepler                     1 (0.0%)
+   Manish Tomar                      1 (0.0%)
+   Yuantian Tang                     1 (0.0%)
+   Udit Agarwal                      1 (0.0%)
+   Era Tiwari                        1 (0.0%)
+   Alex Bee                          1 (0.0%)
+   Stefan Sørensen                   1 (0.0%)
+   Holger Brunck                     1 (0.0%)
+   Mylène Josserand                  1 (0.0%)
+   Chin Liang See                    1 (0.0%)
+   Thomas Schaefer                   1 (0.0%)
+   Ilko Iliev                        1 (0.0%)
+   Mo, Yuezhang                      1 (0.0%)
+   Sébastien Szymanski               1 (0.0%)
+   Oliver Chen                       1 (0.0%)
+   Seung-Woo Kim                     1 (0.0%)
+   Bhargav Shah                      1 (0.0%)
+   Sven Auhagen                      1 (0.0%)
+   Arthur Li                         1 (0.0%)
+   Dhananjay Phadke                  1 (0.0%)
+   Bruno Thomsen                     1 (0.0%)
+   Pascal Vizeli                     1 (0.0%)
+   Volodymyr Babchuk                 1 (0.0%)
+   Fabrice Gasnier                   1 (0.0%)
+   Christian Gmeiner                 1 (0.0%)
+   Hugh Cole-Baker                   1 (0.0%)
+   Marcin Juszkiewicz                1 (0.0%)
+   Patrick van Gelder                1 (0.0%)
+   Saeed Nowshadi                    1 (0.0%)
+   Siva Durga Prasad Paladugu        1 (0.0%)
+   Rajan Vaja                        1 (0.0%)
+   Troy Kisky                        1 (0.0%)
+   Chuanhua Han                      1 (0.0%)
+   Harald Seiler                     1 (0.0%)
+   Bin Liu                           1 (0.0%)
+   Florin Chiculita                  1 (0.0%)
+   Tom Warren                        1 (0.0%)
+   Bryan O'Donoghue                  1 (0.0%)
+   Krebs, Olaf                       1 (0.0%)
+   Pratyush Yadav                    1 (0.0%)
+   Marcus Comstedt                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Suneel Garapati                   36718 (17.7%)
+   Jagan Teki                        34103 (16.4%)
+   Stefan Bosch                      17981 (8.7%)
+   Simon Glass                       16554 (8.0%)
+   Tero Kristo                       12230 (5.9%)
+   Tom Rini                          8307 (4.0%)
+   Adam Ford                         5638 (2.7%)
+   Oleksandr Andrushchenko           4905 (2.4%)
+   Heinrich Schuchardt               4360 (2.1%)
+   Marek Vasut                       4331 (2.1%)
+   Dave Gerlach                      3826 (1.8%)
+   Sean Anderson                     3710 (1.8%)
+   Joao Marcos Costa                 2936 (1.4%)
+   Patrick Delaunay                  2843 (1.4%)
+   AKASHI Takahiro                   2396 (1.2%)
+   Masahiro Yamada                   2348 (1.1%)
+   Peng Fan                          1515 (0.7%)
+   Vignesh Raghavendra               1474 (0.7%)
+   Lokesh Vutla                      1458 (0.7%)
+   Daniel Schwierzeck                1455 (0.7%)
+   Andrii Anisov                     1442 (0.7%)
+   Christophe Kerello                1428 (0.7%)
+   Niel Fourie                       1404 (0.7%)
+   Srinath Mannam                    1295 (0.6%)
+   Anastasiia Lukianenko             1186 (0.6%)
+   Rayagonda Kokatanur               1166 (0.6%)
+   Mike Looijmans                    1165 (0.6%)
+   Heiko Stuebner                    1095 (0.5%)
+   Walter Lozano                     993 (0.5%)
+   Xiaowei Bao                       987 (0.5%)
+   Jassi Brar                        890 (0.4%)
+   Parthiban Nallathambi             840 (0.4%)
+   Igor Opaniuk                      814 (0.4%)
+   Stefan Roese                      811 (0.4%)
+   Bharat Gooty                      803 (0.4%)
+   Michael Walle                     756 (0.4%)
+   Peter Ujfalusi                    752 (0.4%)
+   Frank Wunderlich                  734 (0.4%)
+   Luka Kovacic                      719 (0.3%)
+   Marcin Sloniewski                 709 (0.3%)
+   Christian Hewitt                  708 (0.3%)
+   Sylwester Nawrocki                666 (0.3%)
+   Rasmus Villemoes                  656 (0.3%)
+   Chuanjia Liu                      640 (0.3%)
+   Reuben Dowle                      637 (0.3%)
+   Ye Li                             509 (0.2%)
+   Faiz Abbas                        485 (0.2%)
+   Michal Simek                      484 (0.2%)
+   Philippe Reynes                   483 (0.2%)
+   Robert Marko                      477 (0.2%)
+   Hayes Wang                        471 (0.2%)
+   Arthur Li                         465 (0.2%)
+   David Woodhouse                   462 (0.2%)
+   Ilias Apalodimas                  430 (0.2%)
+   Marek Szyprowski                  356 (0.2%)
+   Jway Lin                          341 (0.2%)
+   Chuanhua Han                      337 (0.2%)
+   Zhao Qiang                        331 (0.2%)
+   Aaron Williams                    318 (0.2%)
+   Usama Arif                        317 (0.2%)
+   Anatolij Gustschin                281 (0.1%)
+   Bin Meng                          277 (0.1%)
+   Sagar Shrikant Kadam              265 (0.1%)
+   Ovidiu Panait                     254 (0.1%)
+   Dan Murphy                        253 (0.1%)
+   Nicolas Saenz Julienne            247 (0.1%)
+   Hou Zhiqiang                      240 (0.1%)
+   Vikas Gupta                       238 (0.1%)
+   Denis 'GNUtoo' Carikli            235 (0.1%)
+   Pali Rohár                        222 (0.1%)
+   Yash Shah                         210 (0.1%)
+   Amit Singh Tomar                  200 (0.1%)
+   Sherry Sun                        195 (0.1%)
+   Marcel Ziswiler                   193 (0.1%)
+   T Karthik Reddy                   184 (0.1%)
+   Lukasz Majewski                   179 (0.1%)
+   Oliver Chen                       177 (0.1%)
+   Jan Kiszka                        175 (0.1%)
+   Ibai Erkiaga                      169 (0.1%)
+   Andy Shevchenko                   160 (0.1%)
+   Roman Kovalivskyi                 152 (0.1%)
+   Simon Guinot                      149 (0.1%)
+   Dario Binacchi                    147 (0.1%)
+   John Chau                         141 (0.1%)
+   Shivamurthy Shastri               137 (0.1%)
+   Bhargav Shah                      130 (0.1%)
+   Yangbo Lu                         129 (0.1%)
+   John Robertson                    116 (0.1%)
+   Pramod Kumar                      108 (0.1%)
+   Kuldeep Singh                     101 (0.0%)
+   Biwen Li                          97 (0.0%)
+   Heiko Schocher                    97 (0.0%)
+   Dennis Gilmore                    93 (0.0%)
+   Chia-Wei, Wang                    88 (0.0%)
+   Ramon Fried                       86 (0.0%)
+   Filip Brozovic                    85 (0.0%)
+   Patrice Chotard                   84 (0.0%)
+   Patrick Oppenlander               79 (0.0%)
+   Evan Wang                         78 (0.0%)
+   Derald D. Woods                   76 (0.0%)
+   Andre Przywara                    74 (0.0%)
+   Ard Biesheuvel                    74 (0.0%)
+   Bernhard Messerklinger            73 (0.0%)
+   Manish Tomar                      73 (0.0%)
+   Johannes Krottmayer               65 (0.0%)
+   Andre Heider                      65 (0.0%)
+   Pascal Vizeli                     63 (0.0%)
+   hui.song                          61 (0.0%)
+   Ravik Hasija                      61 (0.0%)
+   Nicolas Boichat                   60 (0.0%)
+   Pragnesh Patel                    58 (0.0%)
+   Wig Cheng                         58 (0.0%)
+   Vladimir Oltean                   58 (0.0%)
+   Dhananjay Phadke                  57 (0.0%)
+   Kever Yang                        56 (0.0%)
+   Suniel Mahesh                     48 (0.0%)
+   Neil Armstrong                    47 (0.0%)
+   Abhishek Shah                     45 (0.0%)
+   Andrew F. Davis                   41 (0.0%)
+   Johannes Holland                  39 (0.0%)
+   Ran Wang                          37 (0.0%)
+   Peter Robinson                    35 (0.0%)
+   Chris Packham                     34 (0.0%)
+   Sven Auhagen                      34 (0.0%)
+   Wasim Khan                        32 (0.0%)
+   Fabio Estevam                     30 (0.0%)
+   Ralph Siemsen                     28 (0.0%)
+   Bin Liu                           28 (0.0%)
+   Baruch Siach                      25 (0.0%)
+   Anand Moon                        24 (0.0%)
+   Sébastien Szymanski               23 (0.0%)
+   Wolfgang Wallner                  22 (0.0%)
+   Wilson Ding                       21 (0.0%)
+   Troy Kisky                        21 (0.0%)
+   Chee Hong Ang                     20 (0.0%)
+   Ashok Reddy Soma                  19 (0.0%)
+   Ley Foon Tan                      19 (0.0%)
+   zachary                           19 (0.0%)
+   Ivan Mikhaylov                    19 (0.0%)
+   Suman Anna                        17 (0.0%)
+   Madalin Bucur                     17 (0.0%)
+   Chaitanya Sakinam                 16 (0.0%)
+   Florin Chiculita                  16 (0.0%)
+   Tom Warren                        16 (0.0%)
+   Bryan O'Donoghue                  16 (0.0%)
+   Jason Wessel                      15 (0.0%)
+   Lad Prabhakar                     15 (0.0%)
+   Gregory CLEMENT                   15 (0.0%)
+   Yuantian Tang                     15 (0.0%)
+   Mian Yousaf Kaukab                14 (0.0%)
+   Jonas Smedegaard                  14 (0.0%)
+   Fabrice Gasnier                   14 (0.0%)
+   Igor Lantsman                     13 (0.0%)
+   chenshuo                          13 (0.0%)
+   Mo, Yuezhang                      13 (0.0%)
+   Philippe Schenker                 12 (0.0%)
+   Eugen Hristev                     12 (0.0%)
+   Jakob Riepler                     12 (0.0%)
+   MarkLee                           11 (0.0%)
+   Mylène Josserand                  11 (0.0%)
+   Chin Liang See                    11 (0.0%)
+   Siva Durga Prasad Paladugu        11 (0.0%)
+   Stephen Warren                    10 (0.0%)
+   Meenakshi Aggarwal                10 (0.0%)
+   Yan Liu                           10 (0.0%)
+   Krebs, Olaf                       10 (0.0%)
+   Grygorii Tertychnyi               9 (0.0%)
+   Soeren Moch                       8 (0.0%)
+   Etienne Carriere                  8 (0.0%)
+   Stefan Sørensen                   8 (0.0%)
+   Volodymyr Babchuk                 8 (0.0%)
+   Luca Ceresoli                     7 (0.0%)
+   Jean-Jacques Hiblot               7 (0.0%)
+   Rajan Vaja                        7 (0.0%)
+   Haibo Chen                        6 (0.0%)
+   Ruben Di Battista                 6 (0.0%)
+   Vladimir Vid                      5 (0.0%)
+   Mauro Condarelli                  5 (0.0%)
+   Pedro Aguilar                     5 (0.0%)
+   Brian Moyer                       5 (0.0%)
+   Udit Agarwal                      5 (0.0%)
+   Holger Brunck                     5 (0.0%)
+   Saeed Nowshadi                    5 (0.0%)
+   Marek Behún                       4 (0.0%)
+   Manivannan Sadhasivam             4 (0.0%)
+   Kishon Vijay Abraham I            4 (0.0%)
+   Icenowy Zheng                     4 (0.0%)
+   Yann Gautier                      4 (0.0%)
+   Alex Bee                          4 (0.0%)
+   Pratyush Yadav                    4 (0.0%)
+   Jian Li                           3 (0.0%)
+   Maxim Uvarov                      3 (0.0%)
+   Robert Reither                    3 (0.0%)
+   Mingming Lee                      3 (0.0%)
+   Chunfeng Yun                      3 (0.0%)
+   Stefano Babic                     3 (0.0%)
+   Alex Nemirovsky                   3 (0.0%)
+   Bruno Thomsen                     3 (0.0%)
+   Christian Gmeiner                 3 (0.0%)
+   Marcus Comstedt                   3 (0.0%)
+   Martin Kaistra                    2 (0.0%)
+   Konstantin Porotchkin             2 (0.0%)
+   Jacky Bai                         2 (0.0%)
+   Rick Chen                         2 (0.0%)
+   Grigore Popescu                   2 (0.0%)
+   Thomas Fitzsimmons                2 (0.0%)
+   Gary Bisson                       2 (0.0%)
+   yurii.pidhornyi                   2 (0.0%)
+   Frank Li                          2 (0.0%)
+   Trommel, Kees (Contractor)        2 (0.0%)
+   Leo Liang                         2 (0.0%)
+   Marcin Juszkiewicz                2 (0.0%)
+   Patrick van Gelder                2 (0.0%)
+   Harald Seiler                     2 (0.0%)
+   Naoki Hayama                      1 (0.0%)
+   Thirupathaiah Annapureddy         1 (0.0%)
+   Denis Pynkin                      1 (0.0%)
+   Miquel Raynal                     1 (0.0%)
+   Thomas Petazzoni                  1 (0.0%)
+   Matthias Brugger                  1 (0.0%)
+   Matthias Schiffer                 1 (0.0%)
+   Doyle, Patrick                    1 (0.0%)
+   Era Tiwari                        1 (0.0%)
+   Thomas Schaefer                   1 (0.0%)
+   Ilko Iliev                        1 (0.0%)
+   Seung-Woo Kim                     1 (0.0%)
+   Hugh Cole-Baker                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Jagan Teki                        30007 (49.3%)
+   Tom Rini                          2437 (4.0%)
+   Andy Shevchenko                   114 (0.2%)
+   Bhargav Shah                      111 (0.2%)
+   Wig Cheng                         47 (0.1%)
+   Derald D. Woods                   33 (0.1%)
+   Ibai Erkiaga                      24 (0.0%)
+   Sébastien Szymanski               20 (0.0%)
+   Mian Yousaf Kaukab                14 (0.0%)
+   Lad Prabhakar                     13 (0.0%)
+   Gregory CLEMENT                   13 (0.0%)
+   Jonas Smedegaard                  13 (0.0%)
+   Jakob Riepler                     12 (0.0%)
+   Ashok Reddy Soma                  7 (0.0%)
+   Yangbo Lu                         6 (0.0%)
+   Rajan Vaja                        6 (0.0%)
+   Fabio Estevam                     5 (0.0%)
+   zachary                           5 (0.0%)
+   Grygorii Tertychnyi               5 (0.0%)
+   Chaitanya Sakinam                 4 (0.0%)
+   Chin Liang See                    3 (0.0%)
+   Masahiro Yamada                   2 (0.0%)
+   Alex Bee                          2 (0.0%)
+   Christian Gmeiner                 2 (0.0%)
+   Harald Seiler                     2 (0.0%)
+   Baruch Siach                      1 (0.0%)
+   Soeren Moch                       1 (0.0%)
+   Marcus Comstedt                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 252)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      30 (11.9%)
+   Peng Fan                          19 (7.5%)
+   Matthias Brugger                  16 (6.3%)
+   Tom Rini                          15 (6.0%)
+   Hou Zhiqiang                      13 (5.2%)
+   Bin Meng                          11 (4.4%)
+   Anastasiia Lukianenko             11 (4.4%)
+   Priyanka Jain                     10 (4.0%)
+   Oleksandr Andrushchenko           9 (3.6%)
+   Rayagonda Kokatanur               8 (3.2%)
+   Heinrich Schuchardt               7 (2.8%)
+   Jagan Teki                        5 (2.0%)
+   Henry Yen                         5 (2.0%)
+   Neil Armstrong                    5 (2.0%)
+   Stefan Roese                      5 (2.0%)
+   Simon Glass                       5 (2.0%)
+   Aaron Williams                    4 (1.6%)
+   Sylwester Nawrocki                4 (1.6%)
+   Bharat Gooty                      4 (1.6%)
+   Alex Nemirovsky                   3 (1.2%)
+   Siva Durga Prasad Paladugu        3 (1.2%)
+   Kever Yang                        3 (1.2%)
+   Andre Heider                      3 (1.2%)
+   Ye Li                             3 (1.2%)
+   Lokesh Vutla                      3 (1.2%)
+   Patrick Delaunay                  3 (1.2%)
+   Masahiro Yamada                   2 (0.8%)
+   Rajesh Ravi                       2 (0.8%)
+   Radu Bacrau                       2 (0.8%)
+   Suman Anna                        2 (0.8%)
+   Pali Rohár                        2 (0.8%)
+   Vignesh Raghavendra               2 (0.8%)
+   Tero Kristo                       2 (0.8%)
+   Ashok Reddy Soma                  1 (0.4%)
+   Jacky Bai                         1 (0.4%)
+   Thirupathaiah Annapureddy         1 (0.4%)
+   Ioana Ciornei                     1 (0.4%)
+   Heiko Thiery                      1 (0.4%)
+   Ken Ma                            1 (0.4%)
+   Roman Stratiienko                 1 (0.4%)
+   Vishal Mahaveer                   1 (0.4%)
+   Sheetal Tigadoli                  1 (0.4%)
+   Vladimir Olovyannikov             1 (0.4%)
+   Ashish Kumar                      1 (0.4%)
+   Anji J                            1 (0.4%)
+   Mark Adler                        1 (0.4%)
+   Silvano di Ninno                  1 (0.4%)
+   Roger Quadros                     1 (0.4%)
+   Konstantin Porotchkin             1 (0.4%)
+   Jean-Jacques Hiblot               1 (0.4%)
+   Biwen Li                          1 (0.4%)
+   Ley Foon Tan                      1 (0.4%)
+   Andrew F. Davis                   1 (0.4%)
+   Suniel Mahesh                     1 (0.4%)
+   Patrice Chotard                   1 (0.4%)
+   Pramod Kumar                      1 (0.4%)
+   Vikas Gupta                       1 (0.4%)
+   Nicolas Saenz Julienne            1 (0.4%)
+   Marek Szyprowski                  1 (0.4%)
+   Xiaowei Bao                       1 (0.4%)
+   Faiz Abbas                        1 (0.4%)
+   Daniel Schwierzeck                1 (0.4%)
+   Andrii Anisov                     1 (0.4%)
+   Dave Gerlach                      1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 1270)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          276 (21.7%)
+   Simon Glass                       262 (20.6%)
+   Wolfgang Wallner                  92 (7.2%)
+   Patrice Chotard                   85 (6.7%)
+   Priyanka Jain                     80 (6.3%)
+   Stefan Roese                      63 (5.0%)
+   Kever Yang                        56 (4.4%)
+   Tom Rini                          32 (2.5%)
+   Heiko Schocher                    28 (2.2%)
+   Pragnesh Patel                    25 (2.0%)
+   Anatolij Gustschin                23 (1.8%)
+   Rick Chen                         22 (1.7%)
+   Heinrich Schuchardt               20 (1.6%)
+   Peng Fan                          10 (0.8%)
+   Suman Anna                        10 (0.8%)
+   Ye Li                             9 (0.7%)
+   Fabio Estevam                     9 (0.7%)
+   Sean Anderson                     9 (0.7%)
+   Patrick Delaunay                  8 (0.6%)
+   Konstantin Porotchkin             7 (0.6%)
+   Linus Walleij                     7 (0.6%)
+   Ramon Fried                       7 (0.6%)
+   Nicolas Saenz Julienne            6 (0.5%)
+   Daniel Schwierzeck                6 (0.5%)
+   Stefano Babic                     6 (0.5%)
+   Jagan Teki                        5 (0.4%)
+   Grygorii Strashko                 5 (0.4%)
+   Leo Liang                         5 (0.4%)
+   Igor Opaniuk                      5 (0.4%)
+   Chunfeng Yun                      4 (0.3%)
+   Horia Geantă                      4 (0.3%)
+   Andre Przywara                    4 (0.3%)
+   Lukasz Majewski                   4 (0.3%)
+   Philippe Reynes                   4 (0.3%)
+   Marek Vasut                       4 (0.3%)
+   Michal Simek                      3 (0.2%)
+   Lokesh Vutla                      3 (0.2%)
+   Soeren Moch                       3 (0.2%)
+   Jaehoon Chung                     3 (0.2%)
+   Igal Liberman                     3 (0.2%)
+   Michael Trimarchi                 3 (0.2%)
+   Philipp Tomsich                   3 (0.2%)
+   Neil Armstrong                    2 (0.2%)
+   Andre Heider                      2 (0.2%)
+   Ashish Kumar                      2 (0.2%)
+   Andy Shevchenko                   2 (0.2%)
+   Aiden Park                        2 (0.2%)
+   Atish Patra                       2 (0.2%)
+   Luca Ceresoli                     2 (0.2%)
+   Manivannan Sadhasivam             2 (0.2%)
+   Kuldeep Singh                     2 (0.2%)
+   Rayagonda Kokatanur               1 (0.1%)
+   Sylwester Nawrocki                1 (0.1%)
+   Pali Rohár                        1 (0.1%)
+   Jacky Bai                         1 (0.1%)
+   Ley Foon Tan                      1 (0.1%)
+   Faiz Abbas                        1 (0.1%)
+   Biju Das                          1 (0.1%)
+   Sughosh Ganu                      1 (0.1%)
+   Grzegorz Jaszczyk                 1 (0.1%)
+   Stefan Chulski                    1 (0.1%)
+   Jun Li                            1 (0.1%)
+   Hua Jing                          1 (0.1%)
+   Marcin Niestroj                   1 (0.1%)
+   Eric Nelson                       1 (0.1%)
+   Richard Weinberger                1 (0.1%)
+   Frieder Schrempf                  1 (0.1%)
+   Kurt Kanzenbach                   1 (0.1%)
+   Julius Werner                     1 (0.1%)
+   Andy.Wu                           1 (0.1%)
+   Julien Grall                      1 (0.1%)
+   Yegor Yefremov                    1 (0.1%)
+   Alex Marginean                    1 (0.1%)
+   Jian Li                           1 (0.1%)
+   Stephen Warren                    1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Madalin Bucur                     1 (0.1%)
+   Vladimir Oltean                   1 (0.1%)
+   Ilias Apalodimas                  1 (0.1%)
+   Walter Lozano                     1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 130)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bin Meng                          36 (27.7%)
+   Andre Heider                      13 (10.0%)
+   Stefan Roese                      8 (6.2%)
+   Pragnesh Patel                    8 (6.2%)
+   Wolfgang Wallner                  4 (3.1%)
+   Angelo Dureghello                 4 (3.1%)
+   Anand Moon                        4 (3.1%)
+   Heinrich Schuchardt               3 (2.3%)
+   Soeren Moch                       3 (2.3%)
+   Masahiro Yamada                   3 (2.3%)
+   iSoC Platform CI                  3 (2.3%)
+   Tom Rini                          2 (1.5%)
+   Leo Liang                         2 (1.5%)
+   Philippe Reynes                   2 (1.5%)
+   Michal Simek                      2 (1.5%)
+   Pali Rohár                        2 (1.5%)
+   Suniel Mahesh                     2 (1.5%)
+   Petr Tesarik                      2 (1.5%)
+   Frank Wunderlich                  2 (1.5%)
+   Adam Ford                         2 (1.5%)
+   Anatolij Gustschin                1 (0.8%)
+   Rick Chen                         1 (0.8%)
+   Sean Anderson                     1 (0.8%)
+   Andre Przywara                    1 (0.8%)
+   Igal Liberman                     1 (0.8%)
+   Faiz Abbas                        1 (0.8%)
+   Biju Das                          1 (0.8%)
+   Hua Jing                          1 (0.8%)
+   Alex Marginean                    1 (0.8%)
+   Walter Lozano                     1 (0.8%)
+   Heiko Thiery                      1 (0.8%)
+   Silvano di Ninno                  1 (0.8%)
+   Derald D. Woods                   1 (0.8%)
+   Baruch Siach                      1 (0.8%)
+   Marek Behún                       1 (0.8%)
+   Scott K Logan                     1 (0.8%)
+   Dmitry N. Kolesnikov              1 (0.8%)
+   Ji Luo                            1 (0.8%)
+   Aníbal Limón                      1 (0.8%)
+   Matt Porter                       1 (0.8%)
+   Vagrant Cascadian                 1 (0.8%)
+   Guillaume La Roque                1 (0.8%)
+   Bartosz Golaszewski               1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 130)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       26 (20.0%)
+   Pali Rohár                        10 (7.7%)
+   Heinrich Schuchardt               9 (6.9%)
+   Daniel Schwierzeck                8 (6.2%)
+   Bin Meng                          7 (5.4%)
+   Pragnesh Patel                    6 (4.6%)
+   Jagan Teki                        6 (4.6%)
+   Stefan Roese                      4 (3.1%)
+   Michael Walle                     4 (3.1%)
+   Tom Rini                          3 (2.3%)
+   Anatolij Gustschin                3 (2.3%)
+   Neil Armstrong                    3 (2.3%)
+   Faiz Abbas                        2 (1.5%)
+   Marek Behún                       2 (1.5%)
+   Konstantin Porotchkin             2 (1.5%)
+   Ley Foon Tan                      2 (1.5%)
+   zachary                           2 (1.5%)
+   Jason Wessel                      2 (1.5%)
+   Wilson Ding                       2 (1.5%)
+   Ovidiu Panait                     2 (1.5%)
+   Evan Wang                         2 (1.5%)
+   Sagar Shrikant Kadam              2 (1.5%)
+   Christian Hewitt                  2 (1.5%)
+   Andre Heider                      1 (0.8%)
+   Wolfgang Wallner                  1 (0.8%)
+   Rick Chen                         1 (0.8%)
+   Walter Lozano                     1 (0.8%)
+   Peng Fan                          1 (0.8%)
+   Fabio Estevam                     1 (0.8%)
+   Lukasz Majewski                   1 (0.8%)
+   Marek Vasut                       1 (0.8%)
+   Manivannan Sadhasivam             1 (0.8%)
+   Chris Packham                     1 (0.8%)
+   Andrew F. Davis                   1 (0.8%)
+   Troy Kisky                        1 (0.8%)
+   Hugh Cole-Baker                   1 (0.8%)
+   Haibo Chen                        1 (0.8%)
+   Volodymyr Babchuk                 1 (0.8%)
+   Pascal Vizeli                     1 (0.8%)
+   David Woodhouse                   1 (0.8%)
+   Chuanjia Liu                      1 (0.8%)
+   AKASHI Takahiro                   1 (0.8%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 25)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Bosch                      5 (20.0%)
+   Tom Rini                          4 (16.0%)
+   Heinrich Schuchardt               2 (8.0%)
+   Scott K Logan                     2 (8.0%)
+   Pali Rohár                        1 (4.0%)
+   Andre Heider                      1 (4.0%)
+   Soeren Moch                       1 (4.0%)
+   Sean Anderson                     1 (4.0%)
+   Dmitry N. Kolesnikov              1 (4.0%)
+   Matt Porter                       1 (4.0%)
+   Vagrant Cascadian                 1 (4.0%)
+   Oleksandr Andrushchenko           1 (4.0%)
+   Tian Yuanhao                      1 (4.0%)
+   Goran Marinkovic                  1 (4.0%)
+   Igor Lantsman                     1 (4.0%)
+   Dennis Gilmore                    1 (4.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 25)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       5 (20.0%)
+   Heinrich Schuchardt               4 (16.0%)
+   Fabio Estevam                     3 (12.0%)
+   Tom Rini                          2 (8.0%)
+   Andre Heider                      2 (8.0%)
+   Igor Lantsman                     1 (4.0%)
+   Anatolij Gustschin                1 (4.0%)
+   Neil Armstrong                    1 (4.0%)
+   Volodymyr Babchuk                 1 (4.0%)
+   AKASHI Takahiro                   1 (4.0%)
+   Michal Simek                      1 (4.0%)
+   Baruch Siach                      1 (4.0%)
+   Kever Yang                        1 (4.0%)
+   Robert Reither                    1 (4.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         641 (31.3%)
+   Google, Inc.                      352 (17.2%)
+   DENX Software Engineering         187 (9.1%)
+   ST Microelectronics               122 (6.0%)
+   NXP                               116 (5.7%)
+   Texas Instruments                 103 (5.0%)
+   Konsulko Group                    80 (3.9%)
+   Amarula Solutions                 78 (3.8%)
+   AMD                               48 (2.3%)
+   Linaro                            48 (2.3%)
+   Socionext Inc.                    39 (1.9%)
+   Broadcom                          33 (1.6%)
+   Marvell                           28 (1.4%)
+   Collabora Ltd.                    26 (1.3%)
+   Wind River                        25 (1.2%)
+   Xilinx                            24 (1.2%)
+   Intel                             23 (1.1%)
+   Bootlin                           17 (0.8%)
+   Samsung                           15 (0.7%)
+   Rockchip                          11 (0.5%)
+   ARM                               9 (0.4%)
+   NVidia                            4 (0.2%)
+   Siemens                           4 (0.2%)
+   BayLibre SAS                      3 (0.1%)
+   Boundary Devices                  2 (0.1%)
+   linutronix                        2 (0.1%)
+   Renesas Electronics               2 (0.1%)
+   SUSE                              2 (0.1%)
+   Toradex                           2 (0.1%)
+   Sony                              1 (0.0%)
+   Ronetix                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         57323 (27.6%)
+   Marvell                           37156 (17.9%)
+   Amarula Solutions                 34151 (16.5%)
+   Texas Instruments                 20589 (9.9%)
+   Google, Inc.                      16554 (8.0%)
+   Konsulko Group                    8307 (4.0%)
+   DENX Software Engineering         7124 (3.4%)
+   NXP                               4974 (2.4%)
+   ST Microelectronics               4373 (2.1%)
+   Linaro                            3759 (1.8%)
+   Broadcom                          3655 (1.8%)
+   Bootlin                           2935 (1.4%)
+   Socionext Inc.                    2348 (1.1%)
+   Samsung                           1023 (0.5%)
+   Collabora Ltd.                    1005 (0.5%)
+   AMD                               484 (0.2%)
+   Xilinx                            395 (0.2%)
+   ARM                               391 (0.2%)
+   Wind River                        269 (0.1%)
+   Intel                             210 (0.1%)
+   Siemens                           175 (0.1%)
+   Rockchip                          56 (0.0%)
+   BayLibre SAS                      47 (0.0%)
+   NVidia                            26 (0.0%)
+   Boundary Devices                  23 (0.0%)
+   Renesas Electronics               15 (0.0%)
+   SUSE                              15 (0.0%)
+   Sony                              13 (0.0%)
+   Toradex                           12 (0.0%)
+   linutronix                        2 (0.0%)
+   Ronetix                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 252)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         57 (22.6%)
+   NXP                               53 (21.0%)
+   Xilinx                            34 (13.5%)
+   Broadcom                          17 (6.7%)
+   SUSE                              17 (6.7%)
+   Texas Instruments                 15 (6.0%)
+   Konsulko Group                    15 (6.0%)
+   Marvell                           6 (2.4%)
+   Amarula Solutions                 6 (2.4%)
+   Google, Inc.                      5 (2.0%)
+   DENX Software Engineering         5 (2.0%)
+   Samsung                           5 (2.0%)
+   BayLibre SAS                      5 (2.0%)
+   ST Microelectronics               4 (1.6%)
+   Intel                             3 (1.2%)
+   Rockchip                          3 (1.2%)
+   Socionext Inc.                    2 (0.8%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 228)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         109 (47.8%)
+   NXP                               28 (12.3%)
+   Texas Instruments                 14 (6.1%)
+   DENX Software Engineering         9 (3.9%)
+   Linaro                            7 (3.1%)
+   Xilinx                            6 (2.6%)
+   Broadcom                          6 (2.6%)
+   Marvell                           6 (2.6%)
+   ST Microelectronics               5 (2.2%)
+   Intel                             4 (1.8%)
+   Bootlin                           4 (1.8%)
+   Samsung                           3 (1.3%)
+   Collabora Ltd.                    3 (1.3%)
+   SUSE                              2 (0.9%)
+   Amarula Solutions                 2 (0.9%)
+   ARM                               2 (0.9%)
+   Wind River                        2 (0.9%)
+   NVidia                            2 (0.9%)
+   Boundary Devices                  2 (0.9%)
+   Konsulko Group                    1 (0.4%)
+   Google, Inc.                      1 (0.4%)
+   BayLibre SAS                      1 (0.4%)
+   Rockchip                          1 (0.4%)
+   Socionext Inc.                    1 (0.4%)
+   AMD                               1 (0.4%)
+   Siemens                           1 (0.4%)
+   Renesas Electronics               1 (0.4%)
+   Sony                              1 (0.4%)
+   Toradex                           1 (0.4%)
+   linutronix                        1 (0.4%)
+   Ronetix                           1 (0.4%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2021.01.rst b/doc/develop/statistics/u-boot-stats-v2021.01.rst
new file mode 100644
index 00000000000..41fb1932029
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2021.01.rst
@@ -0,0 +1,754 @@
+:orphan:
+
+Release Statistics for U-Boot v2021.01
+======================================
+
+* Processed 1694 changesets from 163 developers
+
+* 27 employers found
+
+* A total of 152587 lines added, 32307 removed (delta 120280)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       298 (17.6%)
+   Sean Anderson                     140 (8.3%)
+   Heinrich Schuchardt               107 (6.3%)
+   Michal Simek                      88 (5.2%)
+   Patrick Delaunay                  50 (3.0%)
+   Stefan Roese                      37 (2.2%)
+   Claudiu Beznea                    33 (1.9%)
+   Qu Wenruo                         32 (1.9%)
+   Xiaowei Bao                       29 (1.7%)
+   Richard Genoud                    28 (1.7%)
+   Neil Armstrong                    25 (1.5%)
+   Andre Przywara                    25 (1.5%)
+   Biju Das                          23 (1.4%)
+   Eugen Hristev                     23 (1.4%)
+   Tom Rini                          22 (1.3%)
+   Hou Zhiqiang                      21 (1.2%)
+   Sebastian Reichel                 20 (1.2%)
+   Chee Hong Ang                     19 (1.1%)
+   Samuel Holland                    18 (1.1%)
+   Chunfeng Yun                      18 (1.1%)
+   Marek Vasut                       16 (0.9%)
+   Pali Rohár                        16 (0.9%)
+   Alper Nebi Yasak                  16 (0.9%)
+   T Karthik Reddy                   16 (0.9%)
+   Robert Marko                      15 (0.9%)
+   Yangbo Lu                         15 (0.9%)
+   Heiko Schocher                    15 (0.9%)
+   Peng Fan                          14 (0.8%)
+   Michael Walle                     14 (0.8%)
+   Jagan Teki                        14 (0.8%)
+   Suman Anna                        14 (0.8%)
+   Wasim Khan                        13 (0.8%)
+   AKASHI Takahiro                   13 (0.8%)
+   Ashok Reddy Soma                  13 (0.8%)
+   Anatolij Gustschin                13 (0.8%)
+   Naoki Hayama                      13 (0.8%)
+   Aaron Williams                    13 (0.8%)
+   Igor Opaniuk                      11 (0.6%)
+   Priyanka Jain                     11 (0.6%)
+   Etienne Carriere                  11 (0.6%)
+   Jean-Jacques Hiblot               11 (0.6%)
+   Vignesh Raghavendra               11 (0.6%)
+   Ley Foon Tan                      10 (0.6%)
+   Marcel Ziswiler                   9 (0.5%)
+   Pratyush Yadav                    9 (0.5%)
+   Patrice Chotard                   8 (0.5%)
+   Philippe Reynes                   8 (0.5%)
+   Ilias Apalodimas                  8 (0.5%)
+   Andy Shevchenko                   8 (0.5%)
+   Lad Prabhakar                     8 (0.5%)
+   Jaehoon Chung                     8 (0.5%)
+   Oliver Graute                     7 (0.4%)
+   Andre Heider                      7 (0.4%)
+   Lukasz Majewski                   6 (0.4%)
+   Bin Meng                          6 (0.4%)
+   Holger Brunck                     6 (0.4%)
+   Icenowy Zheng                     6 (0.4%)
+   Dario Binacchi                    6 (0.4%)
+   Ovidiu Panait                     6 (0.4%)
+   Adam Ford                         5 (0.3%)
+   Max Krummenacher                  5 (0.3%)
+   Haibo Chen                        5 (0.3%)
+   Thirupathaiah Annapureddy         5 (0.3%)
+   Faiz Abbas                        5 (0.3%)
+   Marc Ferland                      4 (0.2%)
+   Fabio Estevam                     4 (0.2%)
+   Biwen Li                          4 (0.2%)
+   Baruch Siach                      4 (0.2%)
+   Peter Robinson                    4 (0.2%)
+   Pragnesh Patel                    4 (0.2%)
+   Nishanth Menon                    4 (0.2%)
+   Laurentiu Tudor                   4 (0.2%)
+   Suneel Garapati                   4 (0.2%)
+   Stefan Agner                      3 (0.2%)
+   Andrey Zhizhikin                  3 (0.2%)
+   Frieder Schrempf                  3 (0.2%)
+   Priyanka Singh                    3 (0.2%)
+   Ruchika Gupta                     3 (0.2%)
+   Meenakshi Aggarwal                3 (0.2%)
+   Luka Kovacic                      3 (0.2%)
+   Tim Harvey                        3 (0.2%)
+   Ian Ray                           3 (0.2%)
+   Christian Gmeiner                 3 (0.2%)
+   Siva Durga Prasad Paladugu        3 (0.2%)
+   Heiko Stuebner                    3 (0.2%)
+   Shmuel Hazan                      3 (0.2%)
+   Ryan Chen                         3 (0.2%)
+   Jonas Smedegaard                  3 (0.2%)
+   Frédéric Danis                    3 (0.2%)
+   Chuanhua Han                      3 (0.2%)
+   Edgar E. Iglesias                 3 (0.2%)
+   Hugh Cole-Baker                   2 (0.1%)
+   Paulo Alcantara                   2 (0.1%)
+   Marek Szyprowski                  2 (0.1%)
+   Hayes Wang                        2 (0.1%)
+   Ran Wang                          2 (0.1%)
+   Leo Yu-Chi Liang                  2 (0.1%)
+   Hui Song                          2 (0.1%)
+   Aleksandar Gerasimovski           2 (0.1%)
+   Manish Tomar                      2 (0.1%)
+   Madalin Bucur                     2 (0.1%)
+   Vladimir Oltean                   2 (0.1%)
+   Nicolas Ferre                     2 (0.1%)
+   Jack Mitchell                     2 (0.1%)
+   Grzegorz Jaszczyk                 2 (0.1%)
+   Chia-Wei, Wang                    2 (0.1%)
+   Chance.Yang                       2 (0.1%)
+   Rasmus Villemoes                  2 (0.1%)
+   Alexandru Gagniuc                 2 (0.1%)
+   Patrick Wildt                     2 (0.1%)
+   Otavio Salvador                   2 (0.1%)
+   David Woodhouse                   2 (0.1%)
+   Dalon Westergreen                 2 (0.1%)
+   Chin Liang See                    2 (0.1%)
+   Dylan Hung                        2 (0.1%)
+   Rayagonda Kokatanur               2 (0.1%)
+   Saeed Nowshadi                    2 (0.1%)
+   Matwey V. Kornilov                2 (0.1%)
+   Clément Péron                     1 (0.1%)
+   Sughosh Ganu                      1 (0.1%)
+   Hongwei Zhang                     1 (0.1%)
+   Pengpeng Chen                     1 (0.1%)
+   Mikhail Kshevetskiy               1 (0.1%)
+   Atish Patra                       1 (0.1%)
+   Brad Kim                          1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Alban Bedel                       1 (0.1%)
+   Ioana Ciornei                     1 (0.1%)
+   Zhao Qiang                        1 (0.1%)
+   Manuel Reis                       1 (0.1%)
+   Joshua Scott                      1 (0.1%)
+   Gerard Koskamp                    1 (0.1%)
+   Steven Lawrance                   1 (0.1%)
+   Matteo Ghidoni                    1 (0.1%)
+   Tyler Hicks                       1 (0.1%)
+   Arnaud Aujon Chevallier           1 (0.1%)
+   Hoyeonjiki Kim                    1 (0.1%)
+   Ivaylo Dimitrov                   1 (0.1%)
+   Roger Quadros                     1 (0.1%)
+   Parthiban Nallathambi             1 (0.1%)
+   Kever Yang                        1 (0.1%)
+   Amit Singh Tomar                  1 (0.1%)
+   Teresa Remmet                     1 (0.1%)
+   Jorge Ramirez-Ortiz               1 (0.1%)
+   Michael Trimarchi                 1 (0.1%)
+   Guillaume La Roque                1 (0.1%)
+   Igal Liberman                     1 (0.1%)
+   Alexandre GRIVEAUX                1 (0.1%)
+   Razvan Ionut Cirjan               1 (0.1%)
+   Fabien Parent                     1 (0.1%)
+   Ralph Siemsen                     1 (0.1%)
+   George Hilliard                   1 (0.1%)
+   Matthieu CASTET                   1 (0.1%)
+   Moses Christopher                 1 (0.1%)
+   Srinath Mannam                    1 (0.1%)
+   Ibai Erkiaga                      1 (0.1%)
+   Harini Katakam                    1 (0.1%)
+   Walter Lozano                     1 (0.1%)
+   Chuanjia Liu                      1 (0.1%)
+   Vladimir Olovyannikov             1 (0.1%)
+   Bharat Kumar Reddy Gooty          1 (0.1%)
+   Vikas Gupta                       1 (0.1%)
+   Trac Hoang                        1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Aaron Williams                    24898 (15.0%)
+   Simon Glass                       19251 (11.6%)
+   Suneel Garapati                   14230 (8.6%)
+   Qu Wenruo                         10501 (6.3%)
+   Heiko Schocher                    9806 (5.9%)
+   Claudiu Beznea                    6942 (4.2%)
+   Biju Das                          6394 (3.9%)
+   Sean Anderson                     5551 (3.4%)
+   Chunfeng Yun                      4928 (3.0%)
+   Priyanka Jain                     4504 (2.7%)
+   Tom Rini                          3126 (1.9%)
+   Heinrich Schuchardt               2991 (1.8%)
+   Sebastian Reichel                 2789 (1.7%)
+   Samuel Holland                    2669 (1.6%)
+   Neil Armstrong                    2661 (1.6%)
+   Teresa Remmet                     2658 (1.6%)
+   Lad Prabhakar                     2446 (1.5%)
+   Jean-Jacques Hiblot               2162 (1.3%)
+   Etienne Carriere                  2139 (1.3%)
+   Meenakshi Aggarwal                2124 (1.3%)
+   Stefan Roese                      2087 (1.3%)
+   Robert Marko                      1855 (1.1%)
+   Michal Simek                      1671 (1.0%)
+   Michael Walle                     1604 (1.0%)
+   Patrick Delaunay                  1236 (0.7%)
+   Grzegorz Jaszczyk                 1166 (0.7%)
+   Eugen Hristev                     1099 (0.7%)
+   Igor Opaniuk                      1014 (0.6%)
+   Peng Fan                          851 (0.5%)
+   Ilias Apalodimas                  845 (0.5%)
+   Icenowy Zheng                     824 (0.5%)
+   Hou Zhiqiang                      800 (0.5%)
+   Frédéric Danis                    793 (0.5%)
+   Alper Nebi Yasak                  656 (0.4%)
+   Pragnesh Patel                    650 (0.4%)
+   Pengpeng Chen                     587 (0.4%)
+   Ashok Reddy Soma                  561 (0.3%)
+   Luka Kovacic                      507 (0.3%)
+   Siva Durga Prasad Paladugu        497 (0.3%)
+   Laurentiu Tudor                   489 (0.3%)
+   Dalon Westergreen                 479 (0.3%)
+   Jagan Teki                        476 (0.3%)
+   Pratyush Yadav                    476 (0.3%)
+   Ley Foon Tan                      451 (0.3%)
+   Alexandre GRIVEAUX                413 (0.2%)
+   Marek Vasut                       404 (0.2%)
+   T Karthik Reddy                   387 (0.2%)
+   Paulo Alcantara                   382 (0.2%)
+   Chee Hong Ang                     380 (0.2%)
+   Patrice Chotard                   379 (0.2%)
+   Andre Przywara                    376 (0.2%)
+   Xiaowei Bao                       365 (0.2%)
+   Parthiban Nallathambi             352 (0.2%)
+   Yangbo Lu                         341 (0.2%)
+   Pali Rohár                        334 (0.2%)
+   AKASHI Takahiro                   325 (0.2%)
+   Richard Genoud                    303 (0.2%)
+   Andre Heider                      297 (0.2%)
+   Ruchika Gupta                     291 (0.2%)
+   Suman Anna                        280 (0.2%)
+   Philippe Reynes                   278 (0.2%)
+   Wasim Khan                        274 (0.2%)
+   Faiz Abbas                        268 (0.2%)
+   Bin Meng                          249 (0.2%)
+   Michael Trimarchi                 232 (0.1%)
+   Biwen Li                          205 (0.1%)
+   Marcel Ziswiler                   187 (0.1%)
+   Christian Gmeiner                 186 (0.1%)
+   Srinath Mannam                    185 (0.1%)
+   Adam Ford                         177 (0.1%)
+   Max Krummenacher                  177 (0.1%)
+   Ibai Erkiaga                      165 (0.1%)
+   Ovidiu Panait                     151 (0.1%)
+   Heiko Stuebner                    134 (0.1%)
+   Vikas Gupta                       126 (0.1%)
+   Andy Shevchenko                   123 (0.1%)
+   Shmuel Hazan                      123 (0.1%)
+   Marc Ferland                      122 (0.1%)
+   Oliver Graute                     115 (0.1%)
+   Vignesh Raghavendra               112 (0.1%)
+   Chia-Wei, Wang                    99 (0.1%)
+   Thirupathaiah Annapureddy         92 (0.1%)
+   Hui Song                          90 (0.1%)
+   Haibo Chen                        81 (0.0%)
+   Anatolij Gustschin                76 (0.0%)
+   Naoki Hayama                      75 (0.0%)
+   Ryan Chen                         73 (0.0%)
+   Patrick Wildt                     73 (0.0%)
+   Holger Brunck                     68 (0.0%)
+   Andrey Zhizhikin                  64 (0.0%)
+   Ran Wang                          63 (0.0%)
+   Lukasz Majewski                   60 (0.0%)
+   Madalin Bucur                     59 (0.0%)
+   Chuanhua Han                      55 (0.0%)
+   Trac Hoang                        47 (0.0%)
+   Harini Katakam                    40 (0.0%)
+   Bharat Kumar Reddy Gooty          40 (0.0%)
+   Dario Binacchi                    37 (0.0%)
+   George Hilliard                   35 (0.0%)
+   Peter Robinson                    32 (0.0%)
+   David Woodhouse                   32 (0.0%)
+   Edgar E. Iglesias                 30 (0.0%)
+   Saeed Nowshadi                    29 (0.0%)
+   Hayes Wang                        27 (0.0%)
+   Baruch Siach                      26 (0.0%)
+   Leo Yu-Chi Liang                  24 (0.0%)
+   Alban Bedel                       23 (0.0%)
+   Ian Ray                           22 (0.0%)
+   Ivaylo Dimitrov                   22 (0.0%)
+   Jack Mitchell                     21 (0.0%)
+   Rayagonda Kokatanur               21 (0.0%)
+   Jaehoon Chung                     20 (0.0%)
+   Stefan Agner                      19 (0.0%)
+   Frieder Schrempf                  17 (0.0%)
+   Rasmus Villemoes                  17 (0.0%)
+   Alexandru Gagniuc                 17 (0.0%)
+   Dylan Hung                        17 (0.0%)
+   Nicolas Ferre                     16 (0.0%)
+   Chance.Yang                       14 (0.0%)
+   Nishanth Menon                    13 (0.0%)
+   Tyler Hicks                       13 (0.0%)
+   Chuanjia Liu                      13 (0.0%)
+   Matteo Ghidoni                    12 (0.0%)
+   Fabio Estevam                     11 (0.0%)
+   Vladimir Oltean                   11 (0.0%)
+   Manuel Reis                       11 (0.0%)
+   Razvan Ionut Cirjan               11 (0.0%)
+   Chin Liang See                    10 (0.0%)
+   Ioana Ciornei                     10 (0.0%)
+   Mikhail Kshevetskiy               9 (0.0%)
+   Joshua Scott                      9 (0.0%)
+   Vladimir Olovyannikov             9 (0.0%)
+   Priyanka Singh                    8 (0.0%)
+   Hugh Cole-Baker                   8 (0.0%)
+   Matwey V. Kornilov                8 (0.0%)
+   Marek Szyprowski                  7 (0.0%)
+   Guillaume La Roque                7 (0.0%)
+   Tim Harvey                        6 (0.0%)
+   Aleksandar Gerasimovski           6 (0.0%)
+   Atish Patra                       6 (0.0%)
+   Sughosh Ganu                      5 (0.0%)
+   Roger Quadros                     5 (0.0%)
+   Igal Liberman                     5 (0.0%)
+   Matthieu CASTET                   5 (0.0%)
+   Jonas Smedegaard                  4 (0.0%)
+   Otavio Salvador                   4 (0.0%)
+   Steven Lawrance                   4 (0.0%)
+   Jorge Ramirez-Ortiz               4 (0.0%)
+   Manish Tomar                      3 (0.0%)
+   Fabien Parent                     3 (0.0%)
+   Clément Péron                     2 (0.0%)
+   Chris Packham                     2 (0.0%)
+   Gerard Koskamp                    2 (0.0%)
+   Ralph Siemsen                     2 (0.0%)
+   Hongwei Zhang                     1 (0.0%)
+   Brad Kim                          1 (0.0%)
+   Zhao Qiang                        1 (0.0%)
+   Arnaud Aujon Chevallier           1 (0.0%)
+   Hoyeonjiki Kim                    1 (0.0%)
+   Kever Yang                        1 (0.0%)
+   Amit Singh Tomar                  1 (0.0%)
+   Moses Christopher                 1 (0.0%)
+   Walter Lozano                     1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Priyanka Jain                     4493 (13.9%)
+   Tom Rini                          1211 (3.7%)
+   Grzegorz Jaszczyk                 1065 (3.3%)
+   Andre Przywara                    42 (0.1%)
+   Pali Rohár                        31 (0.1%)
+   Ibai Erkiaga                      27 (0.1%)
+   Dario Binacchi                    23 (0.1%)
+   Alban Bedel                       19 (0.1%)
+   Alexandru Gagniuc                 14 (0.0%)
+   Holger Brunck                     13 (0.0%)
+   Stefan Agner                      12 (0.0%)
+   Ioana Ciornei                     10 (0.0%)
+   Frieder Schrempf                  8 (0.0%)
+   Tyler Hicks                       8 (0.0%)
+   Fabio Estevam                     8 (0.0%)
+   Nishanth Menon                    4 (0.0%)
+   Hugh Cole-Baker                   4 (0.0%)
+   Baruch Siach                      2 (0.0%)
+   Rasmus Villemoes                  1 (0.0%)
+   Arnaud Aujon Chevallier           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 251)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      39 (15.5%)
+   Hou Zhiqiang                      35 (13.9%)
+   Priyanka Jain                     30 (12.0%)
+   Stefan Roese                      17 (6.8%)
+   Pratyush Yadav                    11 (4.4%)
+   Tom Warren                        8 (3.2%)
+   Bin Meng                          8 (3.2%)
+   Heinrich Schuchardt               8 (3.2%)
+   Tom Rini                          6 (2.4%)
+   Baruch Siach                      6 (2.4%)
+   Neil Armstrong                    6 (2.4%)
+   Minkyu Kang                       5 (2.0%)
+   Rayagonda Kokatanur               5 (2.0%)
+   Chee Hong Ang                     5 (2.0%)
+   Ashok Reddy Soma                  5 (2.0%)
+   Igor Opaniuk                      5 (2.0%)
+   Andre Przywara                    4 (1.6%)
+   Miquel Raynal                     3 (1.2%)
+   Matthias Brugger                  3 (1.2%)
+   Ley Foon Tan                      3 (1.2%)
+   Xiaowei Bao                       3 (1.2%)
+   Jagan Teki                        3 (1.2%)
+   Sebastian Reichel                 3 (1.2%)
+   Suniel Mahesh                     2 (0.8%)
+   Vladimir Oltean                   2 (0.8%)
+   Patrice Chotard                   2 (0.8%)
+   Michael Trimarchi                 2 (0.8%)
+   Siva Durga Prasad Paladugu        2 (0.8%)
+   Holger Brunck                     1 (0.4%)
+   Ioana Ciornei                     1 (0.4%)
+   Manish Tomar                      1 (0.4%)
+   Zhao Qiang                        1 (0.4%)
+   Lokesh Vutla                      1 (0.4%)
+   Alex Nemirovsky                   1 (0.4%)
+   Gaurav Jain                       1 (0.4%)
+   Vikas Singh                       1 (0.4%)
+   Daniel Schwierzeck                1 (0.4%)
+   Mattijs Korpershoek               1 (0.4%)
+   Ken Ma                            1 (0.4%)
+   Siew Chin Lim                     1 (0.4%)
+   Jaehoon Chung                     1 (0.4%)
+   Ran Wang                          1 (0.4%)
+   Hui Song                          1 (0.4%)
+   Luka Kovacic                      1 (0.4%)
+   Alper Nebi Yasak                  1 (0.4%)
+   Sean Anderson                     1 (0.4%)
+   Simon Glass                       1 (0.4%)
+   Aaron Williams                    1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 967)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       237 (24.5%)
+   Bin Meng                          138 (14.3%)
+   Priyanka Jain                     72 (7.4%)
+   Jagan Teki                        63 (6.5%)
+   Patrice Chotard                   35 (3.6%)
+   Marek Behún                       33 (3.4%)
+   Patrick Delaunay                  25 (2.6%)
+   Stefan Roese                      24 (2.5%)
+   Kever Yang                        24 (2.5%)
+   Rick Chen                         22 (2.3%)
+   Peng Fan                          21 (2.2%)
+   Ley Foon Tan                      20 (2.1%)
+   Heinrich Schuchardt               19 (2.0%)
+   Tom Rini                          19 (2.0%)
+   Jaehoon Chung                     19 (2.0%)
+   Lad Prabhakar                     19 (2.0%)
+   Wolfgang Wallner                  16 (1.7%)
+   Joao Marcos Costa                 15 (1.6%)
+   Vladimir Oltean                   9 (0.9%)
+   Oleksandr Suvorov                 9 (0.9%)
+   Andre Przywara                    8 (0.8%)
+   Biju Das                          8 (0.8%)
+   Stephen Warren                    7 (0.7%)
+   Heiko Schocher                    7 (0.7%)
+   Igor Opaniuk                      6 (0.6%)
+   Fabio Estevam                     6 (0.6%)
+   Ramon Fried                       5 (0.5%)
+   Leo Yu-Chi Liang                  5 (0.5%)
+   Daniel Schwierzeck                4 (0.4%)
+   Pali Rohár                        4 (0.4%)
+   Kevin Hilman                      4 (0.4%)
+   Ovidiu Panait                     4 (0.4%)
+   Ryan Chen                         4 (0.4%)
+   Philippe Reynes                   4 (0.4%)
+   Ilias Apalodimas                  4 (0.4%)
+   Claudiu Beznea                    4 (0.4%)
+   Boris Brezillon                   3 (0.3%)
+   Philipp Tomsich                   3 (0.3%)
+   Chia-Wei, Wang                    3 (0.3%)
+   Andy Shevchenko                   3 (0.3%)
+   Sean Anderson                     2 (0.2%)
+   Nishanth Menon                    2 (0.2%)
+   Yannick Fertré                    2 (0.2%)
+   Cédric Le Goater                  2 (0.2%)
+   Igal Liberman                     2 (0.2%)
+   Pragnesh Patel                    2 (0.2%)
+   Michal Simek                      1 (0.1%)
+   Matthias Brugger                  1 (0.1%)
+   Alper Nebi Yasak                  1 (0.1%)
+   Grzegorz Jaszczyk                 1 (0.1%)
+   Pavel Machek                      1 (0.1%)
+   Lukas Auer                        1 (0.1%)
+   Stefano Babic                     1 (0.1%)
+   Peter Chubb                       1 (0.1%)
+   Oleksandr Andrushchenko           1 (0.1%)
+   Wolfgang Denk                     1 (0.1%)
+   Joe Bloggs                        1 (0.1%)
+   Fred Bloggs                       1 (0.1%)
+   Horia Geanta                      1 (0.1%)
+   Grygorii Strashko                 1 (0.1%)
+   Mark Kettenis                     1 (0.1%)
+   Andre Heider                      1 (0.1%)
+   Atish Patra                       1 (0.1%)
+   Christian Gmeiner                 1 (0.1%)
+   Michael Walle                     1 (0.1%)
+   Qu Wenruo                         1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 91)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Patrick Delaunay                  47 (51.6%)
+   Amit Singh Tomar                  15 (16.5%)
+   Kevin Hilman                      4 (4.4%)
+   Heinrich Schuchardt               2 (2.2%)
+   Michal Simek                      2 (2.2%)
+   Dennis Gilmore                    2 (2.2%)
+   Michael Opdenacker                2 (2.2%)
+   Gérald Kerma                      2 (2.2%)
+   Heiko Thiery                      2 (2.2%)
+   Frank Wunderlich                  2 (2.2%)
+   Simon Glass                       1 (1.1%)
+   Wolfgang Wallner                  1 (1.1%)
+   Joao Marcos Costa                 1 (1.1%)
+   Vladimir Oltean                   1 (1.1%)
+   Pali Rohár                        1 (1.1%)
+   Michael Walle                     1 (1.1%)
+   Ashok Reddy Soma                  1 (1.1%)
+   Codrin Ciubotariu                 1 (1.1%)
+   Anand Moon                        1 (1.1%)
+   Lord Edmund Blackaddër            1 (1.1%)
+   Andrey Zhizhikin                  1 (1.1%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 91)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Sean Anderson                     46 (50.5%)
+   Andre Przywara                    15 (16.5%)
+   Neil Armstrong                    5 (5.5%)
+   Simon Glass                       3 (3.3%)
+   Pali Rohár                        2 (2.2%)
+   Michael Walle                     2 (2.2%)
+   Stefan Roese                      2 (2.2%)
+   Alper Nebi Yasak                  2 (2.2%)
+   Edgar E. Iglesias                 2 (2.2%)
+   Michal Simek                      1 (1.1%)
+   Heiko Schocher                    1 (1.1%)
+   Fabio Estevam                     1 (1.1%)
+   Alexandru Gagniuc                 1 (1.1%)
+   Arnaud Aujon Chevallier           1 (1.1%)
+   Gerard Koskamp                    1 (1.1%)
+   Chuanjia Liu                      1 (1.1%)
+   Manuel Reis                       1 (1.1%)
+   Ivaylo Dimitrov                   1 (1.1%)
+   Biwen Li                          1 (1.1%)
+   Eugen Hristev                     1 (1.1%)
+   Chunfeng Yun                      1 (1.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 18)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Damien Le Moal                    3 (16.7%)
+   Tom Rini                          2 (11.1%)
+   Mihai Sain                        2 (11.1%)
+   Simon Glass                       1 (5.6%)
+   Michael Walle                     1 (5.6%)
+   Patrick Delaunay                  1 (5.6%)
+   Heinrich Schuchardt               1 (5.6%)
+   Wolfgang Wallner                  1 (5.6%)
+   Andrey Zhizhikin                  1 (5.6%)
+   Anton Arapov                      1 (5.6%)
+   Otto Meier                        1 (5.6%)
+   Leo Krueger                       1 (5.6%)
+   François Ozog                     1 (5.6%)
+   Paulo Alcantara                   1 (5.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 18)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heinrich Schuchardt               3 (16.7%)
+   Sean Anderson                     3 (16.7%)
+   Neil Armstrong                    2 (11.1%)
+   Michal Simek                      2 (11.1%)
+   Eugen Hristev                     2 (11.1%)
+   Simon Glass                       1 (5.6%)
+   Michael Walle                     1 (5.6%)
+   Pali Rohár                        1 (5.6%)
+   Alper Nebi Yasak                  1 (5.6%)
+   Heiko Schocher                    1 (5.6%)
+   Fabio Estevam                     1 (5.6%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         613 (36.2%)
+   Google, Inc.                      298 (17.6%)
+   NXP                               141 (8.3%)
+   AMD                               88 (5.2%)
+   DENX Software Engineering         87 (5.1%)
+   ST Microelectronics               60 (3.5%)
+   Texas Instruments                 55 (3.2%)
+   Intel                             41 (2.4%)
+   Xilinx                            39 (2.3%)
+   Linaro                            32 (1.9%)
+   SUSE                              32 (1.9%)
+   Renesas Electronics               31 (1.8%)
+   BayLibre SAS                      27 (1.6%)
+   ARM                               25 (1.5%)
+   Collabora Ltd.                    24 (1.4%)
+   Konsulko Group                    22 (1.3%)
+   Marvell                           18 (1.1%)
+   Amarula Solutions                 15 (0.9%)
+   Toradex                           14 (0.8%)
+   Samsung                           10 (0.6%)
+   Broadcom                          7 (0.4%)
+   Wind River                        6 (0.4%)
+   General Electric                  3 (0.2%)
+   O.S. Systems                      2 (0.1%)
+   Semihalf Embedded Systems         2 (0.1%)
+   Phytec                            1 (0.1%)
+   Rockchip                          1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marvell                           39133 (23.6%)
+   (Unknown)                         36423 (22.0%)
+   Google, Inc.                      19251 (11.6%)
+   DENX Software Engineering         12433 (7.5%)
+   NXP                               10636 (6.4%)
+   SUSE                              10501 (6.3%)
+   Renesas Electronics               8840 (5.3%)
+   Collabora Ltd.                    3583 (2.2%)
+   Texas Instruments                 3316 (2.0%)
+   Linaro                            3299 (2.0%)
+   Konsulko Group                    3126 (1.9%)
+   BayLibre SAS                      2671 (1.6%)
+   Phytec                            2658 (1.6%)
+   Xilinx                            1709 (1.0%)
+   AMD                               1671 (1.0%)
+   ST Microelectronics               1632 (1.0%)
+   Intel                             1443 (0.9%)
+   Semihalf Embedded Systems         1166 (0.7%)
+   Amarula Solutions                 708 (0.4%)
+   Broadcom                          428 (0.3%)
+   ARM                               376 (0.2%)
+   Toradex                           364 (0.2%)
+   Wind River                        151 (0.1%)
+   Samsung                           27 (0.0%)
+   General Electric                  22 (0.0%)
+   O.S. Systems                      4 (0.0%)
+   Rockchip                          1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 251)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   NXP                               77 (30.7%)
+   Xilinx                            46 (18.3%)
+   (Unknown)                         28 (11.2%)
+   DENX Software Engineering         17 (6.8%)
+   Texas Instruments                 12 (4.8%)
+   Intel                             9 (3.6%)
+   NVidia                            8 (3.2%)
+   BayLibre SAS                      7 (2.8%)
+   Amarula Solutions                 7 (2.8%)
+   Konsulko Group                    6 (2.4%)
+   Samsung                           6 (2.4%)
+   Broadcom                          5 (2.0%)
+   Toradex                           5 (2.0%)
+   ARM                               4 (1.6%)
+   SUSE                              3 (1.2%)
+   Collabora Ltd.                    3 (1.2%)
+   Bootlin                           3 (1.2%)
+   Marvell                           2 (0.8%)
+   ST Microelectronics               2 (0.8%)
+   Google, Inc.                      1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 164)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         77 (47.0%)
+   NXP                               21 (12.8%)
+   Xilinx                            7 (4.3%)
+   Texas Instruments                 7 (4.3%)
+   Broadcom                          6 (3.7%)
+   DENX Software Engineering         5 (3.0%)
+   Intel                             5 (3.0%)
+   Linaro                            5 (3.0%)
+   BayLibre SAS                      3 (1.8%)
+   Collabora Ltd.                    3 (1.8%)
+   Marvell                           3 (1.8%)
+   ST Microelectronics               3 (1.8%)
+   Amarula Solutions                 2 (1.2%)
+   Samsung                           2 (1.2%)
+   Toradex                           2 (1.2%)
+   Renesas Electronics               2 (1.2%)
+   Konsulko Group                    1 (0.6%)
+   ARM                               1 (0.6%)
+   SUSE                              1 (0.6%)
+   Google, Inc.                      1 (0.6%)
+   Phytec                            1 (0.6%)
+   AMD                               1 (0.6%)
+   Semihalf Embedded Systems         1 (0.6%)
+   Wind River                        1 (0.6%)
+   General Electric                  1 (0.6%)
+   O.S. Systems                      1 (0.6%)
+   Rockchip                          1 (0.6%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2021.04.rst b/doc/develop/statistics/u-boot-stats-v2021.04.rst
new file mode 100644
index 00000000000..e47b6fc759b
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2021.04.rst
@@ -0,0 +1,851 @@
+:orphan:
+
+Release Statistics for U-Boot v2021.04
+======================================
+
+* Processed 1675 changesets from 194 developers
+
+* 28 employers found
+
+* A total of 117874 lines added, 48394 removed (delta 69480)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Simon Glass                        285 (17.0%)
+   Heinrich Schuchardt                203 (12.1%)
+   Patrick Delaunay                   85 (5.1%)
+   Bin Meng                           59 (3.5%)
+   Pali Rohár                         41 (2.4%)
+   Tom Rini                           40 (2.4%)
+   Dario Binacchi                     39 (2.3%)
+   Biwen Li                           34 (2.0%)
+   Claudiu Beznea                     27 (1.6%)
+   Marek Vasut                        26 (1.6%)
+   Andy Shevchenko                    26 (1.6%)
+   Marek Szyprowski                   25 (1.5%)
+   Weijie Gao                         25 (1.5%)
+   Ovidiu Panait                      25 (1.5%)
+   Marek Behún                        23 (1.4%)
+   Michael Walle                      22 (1.3%)
+   Michal Simek                       22 (1.3%)
+   Eugen Hristev                      20 (1.2%)
+   Jernej Skrabec                     20 (1.2%)
+   Faiz Abbas                         20 (1.2%)
+   Sean Anderson                      19 (1.1%)
+   Andre Przywara                     17 (1.0%)
+   Adam Ford                          16 (1.0%)
+   Priyanka Jain                      15 (0.9%)
+   Nicolas Saenz Julienne             15 (0.9%)
+   Li Jun                             15 (0.9%)
+   Sughosh Ganu                       15 (0.9%)
+   AKASHI Takahiro                    15 (0.9%)
+   Fabio Estevam                      14 (0.8%)
+   Peng Fan                           14 (0.8%)
+   Chee Hong Ang                      14 (0.8%)
+   Siew Chin Lim                      13 (0.8%)
+   Neil Armstrong                     13 (0.8%)
+   Jaehoon Chung                      13 (0.8%)
+   Ye Li                              13 (0.8%)
+   Patrice Chotard                    12 (0.7%)
+   Ilias Apalodimas                   11 (0.7%)
+   Alexandru Gagniuc                  11 (0.7%)
+   Matthias Brugger                   10 (0.6%)
+   Stefan Roese                       8 (0.5%)
+   Christian Hewitt                   8 (0.5%)
+   Moti Buskila                       7 (0.4%)
+   T Karthik Reddy                    7 (0.4%)
+   Fabien Parent                      7 (0.4%)
+   Padmarao Begari                    7 (0.4%)
+   Igor Opaniuk                       6 (0.4%)
+   Lokesh Vutla                       6 (0.4%)
+   Minkyu Kang                        6 (0.4%)
+   Rasmus Villemoes                   6 (0.4%)
+   Harm Berntsen                      6 (0.4%)
+   Aswath Govindraju                  6 (0.4%)
+   Philippe Reynes                    6 (0.4%)
+   Hou Zhiqiang                       5 (0.3%)
+   Kuldeep Singh                      5 (0.3%)
+   Aleksandar Gerasimovski            5 (0.3%)
+   Eugeniu Rosca                      5 (0.3%)
+   Alice Guo                          5 (0.3%)
+   Chia-Wei, Wang                     5 (0.3%)
+   Heiko Schocher                     4 (0.2%)
+   Tim Harvey                         4 (0.2%)
+   Klaus Heinrich Kiwi                4 (0.2%)
+   Peter Robinson                     4 (0.2%)
+   Niel Fourie                        4 (0.2%)
+   David Lechner                      4 (0.2%)
+   Dennis Gilmore                     4 (0.2%)
+   Robert Marko                       4 (0.2%)
+   Chris Packham                      3 (0.2%)
+   Ley Foon Tan                       3 (0.2%)
+   Chunfeng Yun                       3 (0.2%)
+   Wasim Khan                         3 (0.2%)
+   Alper Nebi Yasak                   3 (0.2%)
+   Pragnesh Patel                     3 (0.2%)
+   Alex Marginean                     3 (0.2%)
+   Mathew McBride                     3 (0.2%)
+   Kory Maincent                      3 (0.2%)
+   Kever Yang                         3 (0.2%)
+   Phil Sutter                        3 (0.2%)
+   Andre Heider                       3 (0.2%)
+   Joel Stanley                       3 (0.2%)
+   Greg Gallagher                     3 (0.2%)
+   Tudor Ambarus                      3 (0.2%)
+   Holger Brunck                      3 (0.2%)
+   Lad Prabhakar                      3 (0.2%)
+   Nishanth Menon                     3 (0.2%)
+   Vladimir Oltean                    2 (0.1%)
+   Mark Kettenis                      2 (0.1%)
+   Yannick Fertre                     2 (0.1%)
+   Etienne Carriere                   2 (0.1%)
+   Ramon Fried                        2 (0.1%)
+   Rajesh Bhagat                      2 (0.1%)
+   Oleksandr Suvorov                  2 (0.1%)
+   Baruch Siach                       2 (0.1%)
+   Alex Leibovich                     2 (0.1%)
+   Roger Pau Monne                    2 (0.1%)
+   Brandon Maier                      2 (0.1%)
+   Sinan Akman                        2 (0.1%)
+   Yuezhang Mo                        2 (0.1%)
+   Jorge Ramirez-Ortiz                2 (0.1%)
+   Vignesh Raghavendra                2 (0.1%)
+   Jean-Philippe ROMAIN               2 (0.1%)
+   Roman Kovalivskyi                  2 (0.1%)
+   Gary Bisson                        2 (0.1%)
+   Ravik Hasija                       2 (0.1%)
+   Stanislav Pinchuk                  2 (0.1%)
+   SkyLake.Huang                      2 (0.1%)
+   Ying-Chun Liu (PaulLiu)            2 (0.1%)
+   Marc Ferland                       2 (0.1%)
+   Shawn Lin                          2 (0.1%)
+   Hugh Cole-Baker                    2 (0.1%)
+   Hongwei Zhang                      2 (0.1%)
+   Kate Liu                           2 (0.1%)
+   Vabhav Sharma                      2 (0.1%)
+   Jerome Brunet                      2 (0.1%)
+   Nicolas Ferre                      2 (0.1%)
+   Philipp Tomsich                    2 (0.1%)
+   Peter Bergin                       1 (0.1%)
+   Andrey Zhizhikin                   1 (0.1%)
+   Samuel Holland                     1 (0.1%)
+   Jessica Clarke                     1 (0.1%)
+   Maxim Kochetkov                    1 (0.1%)
+   Frank Wunderlich                   1 (0.1%)
+   schspa                             1 (0.1%)
+   Daniel Golle                       1 (0.1%)
+   Sujeet Baranwal                    1 (0.1%)
+   Dalon Westergreen                  1 (0.1%)
+   Stephen Carlson                    1 (0.1%)
+   Bernhard Kirchen                   1 (0.1%)
+   Bharat Gooty                       1 (0.1%)
+   Haibo Chen                         1 (0.1%)
+   Frieder Schrempf                   1 (0.1%)
+   Stefan Brüns                       1 (0.1%)
+   Reto Schneider                     1 (0.1%)
+   Hauke Mehrtens                     1 (0.1%)
+   heaterC                            1 (0.1%)
+   Kostya Porotchkin                  1 (0.1%)
+   Su Baocheng                        1 (0.1%)
+   Diego Sueiro                       1 (0.1%)
+   Vincent Stehlé                     1 (0.1%)
+   Qu Wenruo                          1 (0.1%)
+   Jesper Schmitz Mouridsen           1 (0.1%)
+   Tobias Schramm                     1 (0.1%)
+   Moses Christopher                  1 (0.1%)
+   Stefan Bosch                       1 (0.1%)
+   Claudiu Manoil                     1 (0.1%)
+   Asherah Connor                     1 (0.1%)
+   Fabrice GIRARDOT                   1 (0.1%)
+   Nipun Gupta                        1 (0.1%)
+   Zhao Qiang                         1 (0.1%)
+   Ioana Ciornei                      1 (0.1%)
+   Roman Stratiienko                  1 (0.1%)
+   Suman Anna                         1 (0.1%)
+   Ashok Reddy Soma                   1 (0.1%)
+   Stephen Warren                     1 (0.1%)
+   Ilies CHERGUI                      1 (0.1%)
+   Seung-Woo Kim                      1 (0.1%)
+   Guillermo Rodriguez                1 (0.1%)
+   Biju Das                           1 (0.1%)
+   Volodymyr Babchuk                  1 (0.1%)
+   Alex Nemirovsky                    1 (0.1%)
+   Abbie Chang                        1 (0.1%)
+   Aaron Tseng                        1 (0.1%)
+   Yang Liu                           1 (0.1%)
+   Teresa Remmet                      1 (0.1%)
+   Martin Fuzzey                      1 (0.1%)
+   Han Xu                             1 (0.1%)
+   Martin Hundebøll                   1 (0.1%)
+   Kai Stuhlemmer (ebee Engineering)  1 (0.1%)
+   David Bauer                        1 (0.1%)
+   Campbell Suter                     1 (0.1%)
+   Atish Patra                        1 (0.1%)
+   David Wu                           1 (0.1%)
+   David Rivshin                      1 (0.1%)
+   Ian Ray                            1 (0.1%)
+   Matthias Schiffer                  1 (0.1%)
+   Ryan Chen                          1 (0.1%)
+   Dylan Hung                         1 (0.1%)
+   Florian Klink                      1 (0.1%)
+   Steve Bennett                      1 (0.1%)
+   Joel Peshkin                       1 (0.1%)
+   Corneliu Doban                     1 (0.1%)
+   Marcin Juszkiewicz                 1 (0.1%)
+   Artem Lapkin                       1 (0.1%)
+   Felix Brack                        1 (0.1%)
+   Praneeth Bajjuri                   1 (0.1%)
+   Tomas Novotny                      1 (0.1%)
+   Icenowy Zheng                      1 (0.1%)
+   Pascal Vizeli                      1 (0.1%)
+   Stefan Agner                       1 (0.1%)
+   Vikhyat Goyal                      1 (0.1%)
+   Harini Katakam                     1 (0.1%)
+   Siva Durga Prasad Paladugu         1 (0.1%)
+   Adrian Fiergolski                  1 (0.1%)
+   Lyle Franklin                      1 (0.1%)
+   Anton Leontiev                     1 (0.1%)
+   =================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Tom Rini                           19605 (13.8%)
+   Simon Glass                        17340 (12.2%)
+   Heinrich Schuchardt                10305 (7.3%)
+   Adam Ford                          6826 (4.8%)
+   Dario Binacchi                     6048 (4.3%)
+   Tim Harvey                         5842 (4.1%)
+   Weijie Gao                         4501 (3.2%)
+   Lokesh Vutla                       4408 (3.1%)
+   Jernej Skrabec                     4219 (3.0%)
+   Fabio Estevam                      4137 (2.9%)
+   Peng Fan                           3871 (2.7%)
+   Chia-Wei, Wang                     3182 (2.2%)
+   Niel Fourie                        2917 (2.1%)
+   Teresa Remmet                      2827 (2.0%)
+   AKASHI Takahiro                    2634 (1.9%)
+   Neil Armstrong                     2421 (1.7%)
+   Padmarao Begari                    2101 (1.5%)
+   Patrick Delaunay                   1799 (1.3%)
+   Kate Liu                           1755 (1.2%)
+   Christian Hewitt                   1731 (1.2%)
+   Ryan Chen                          1574 (1.1%)
+   Aaron Tseng                        1516 (1.1%)
+   Dylan Hung                         1286 (0.9%)
+   Marek Szyprowski                   1254 (0.9%)
+   Fabien Parent                      1237 (0.9%)
+   Sughosh Ganu                       1148 (0.8%)
+   Chee Hong Ang                      1108 (0.8%)
+   Shawn Lin                          1054 (0.7%)
+   Ilias Apalodimas                   1015 (0.7%)
+   Pali Rohár                         981 (0.7%)
+   Sean Anderson                      813 (0.6%)
+   Li Jun                             741 (0.5%)
+   Siew Chin Lim                      737 (0.5%)
+   Biju Das                           733 (0.5%)
+   Michael Walle                      705 (0.5%)
+   Bin Meng                           671 (0.5%)
+   Claudiu Manoil                     666 (0.5%)
+   Faiz Abbas                         653 (0.5%)
+   Marek Vasut                        637 (0.4%)
+   Eugen Hristev                      633 (0.4%)
+   Igor Opaniuk                       630 (0.4%)
+   SkyLake.Huang                      627 (0.4%)
+   Ying-Chun Liu (PaulLiu)            594 (0.4%)
+   Nicolas Saenz Julienne             565 (0.4%)
+   Alex Marginean                     562 (0.4%)
+   Andre Przywara                     539 (0.4%)
+   Michal Simek                       533 (0.4%)
+   Stephen Carlson                    519 (0.4%)
+   David Bauer                        516 (0.4%)
+   Biwen Li                           482 (0.3%)
+   Andre Heider                       467 (0.3%)
+   Ovidiu Panait                      456 (0.3%)
+   Jerome Brunet                      455 (0.3%)
+   Jaehoon Chung                      417 (0.3%)
+   Andy Shevchenko                    351 (0.2%)
+   Claudiu Beznea                     339 (0.2%)
+   Stefan Roese                       254 (0.2%)
+   Pragnesh Patel                     250 (0.2%)
+   Matthias Brugger                   245 (0.2%)
+   Greg Gallagher                     245 (0.2%)
+   Alexandru Gagniuc                  240 (0.2%)
+   Alice Guo                          227 (0.2%)
+   Praneeth Bajjuri                   219 (0.2%)
+   Moses Christopher                  208 (0.1%)
+   Corneliu Doban                     190 (0.1%)
+   Patrice Chotard                    161 (0.1%)
+   Abbie Chang                        147 (0.1%)
+   Jorge Ramirez-Ortiz                138 (0.1%)
+   Holger Brunck                      131 (0.1%)
+   Philippe Reynes                    129 (0.1%)
+   T Karthik Reddy                    118 (0.1%)
+   Marc Ferland                       118 (0.1%)
+   Heiko Schocher                     117 (0.1%)
+   Marek Behún                        109 (0.1%)
+   Brandon Maier                      106 (0.1%)
+   Zhao Qiang                         105 (0.1%)
+   Eugeniu Rosca                      96 (0.1%)
+   Sinan Akman                        87 (0.1%)
+   Bharat Gooty                       83 (0.1%)
+   Lad Prabhakar                      80 (0.1%)
+   Roman Kovalivskyi                  80 (0.1%)
+   Ley Foon Tan                       76 (0.1%)
+   Hou Zhiqiang                       75 (0.1%)
+   Reto Schneider                     69 (0.0%)
+   Dennis Gilmore                     64 (0.0%)
+   Ye Li                              60 (0.0%)
+   Kory Maincent                      60 (0.0%)
+   Suman Anna                         59 (0.0%)
+   David Lechner                      58 (0.0%)
+   Ioana Ciornei                      58 (0.0%)
+   Moti Buskila                       57 (0.0%)
+   Nicolas Ferre                      56 (0.0%)
+   Vabhav Sharma                      55 (0.0%)
+   Priyanka Jain                      54 (0.0%)
+   Vladimir Oltean                    54 (0.0%)
+   Phil Sutter                        50 (0.0%)
+   Alex Nemirovsky                    48 (0.0%)
+   Rasmus Villemoes                   46 (0.0%)
+   Aswath Govindraju                  45 (0.0%)
+   Etienne Carriere                   43 (0.0%)
+   Lyle Franklin                      36 (0.0%)
+   Wasim Khan                         35 (0.0%)
+   Hongwei Zhang                      35 (0.0%)
+   Campbell Suter                     35 (0.0%)
+   Tomas Novotny                      35 (0.0%)
+   Aleksandar Gerasimovski            32 (0.0%)
+   Peter Robinson                     32 (0.0%)
+   Chunfeng Yun                       27 (0.0%)
+   Jean-Philippe ROMAIN               26 (0.0%)
+   Kuldeep Singh                      25 (0.0%)
+   Vikhyat Goyal                      25 (0.0%)
+   Andrey Zhizhikin                   24 (0.0%)
+   Siva Durga Prasad Paladugu         24 (0.0%)
+   Chris Packham                      23 (0.0%)
+   Tudor Ambarus                      23 (0.0%)
+   Harini Katakam                     23 (0.0%)
+   Joel Stanley                       22 (0.0%)
+   Icenowy Zheng                      21 (0.0%)
+   Pascal Vizeli                      21 (0.0%)
+   Harm Berntsen                      20 (0.0%)
+   Nishanth Menon                     19 (0.0%)
+   Philipp Tomsich                    18 (0.0%)
+   Frieder Schrempf                   18 (0.0%)
+   Rajesh Bhagat                      17 (0.0%)
+   Robert Marko                       15 (0.0%)
+   Oleksandr Suvorov                  15 (0.0%)
+   Alex Leibovich                     15 (0.0%)
+   Vignesh Raghavendra                15 (0.0%)
+   Samuel Holland                     15 (0.0%)
+   Artem Lapkin                       15 (0.0%)
+   Peter Bergin                       14 (0.0%)
+   Dalon Westergreen                  14 (0.0%)
+   Stefan Brüns                       14 (0.0%)
+   Ian Ray                            14 (0.0%)
+   Joel Peshkin                       14 (0.0%)
+   Anton Leontiev                     14 (0.0%)
+   Mathew McBride                     13 (0.0%)
+   Stefan Agner                       13 (0.0%)
+   Kever Yang                         12 (0.0%)
+   Baruch Siach                       12 (0.0%)
+   Maxim Kochetkov                    10 (0.0%)
+   Matthias Schiffer                  10 (0.0%)
+   Mark Kettenis                      9 (0.0%)
+   Gary Bisson                        9 (0.0%)
+   Ravik Hasija                       9 (0.0%)
+   Han Xu                             8 (0.0%)
+   Minkyu Kang                        7 (0.0%)
+   Alper Nebi Yasak                   7 (0.0%)
+   Ramon Fried                        7 (0.0%)
+   Hugh Cole-Baker                    7 (0.0%)
+   Jessica Clarke                     7 (0.0%)
+   Sujeet Baranwal                    7 (0.0%)
+   Roger Pau Monne                    6 (0.0%)
+   Haibo Chen                         6 (0.0%)
+   Tobias Schramm                     6 (0.0%)
+   Yannick Fertre                     5 (0.0%)
+   Yuezhang Mo                        5 (0.0%)
+   Stanislav Pinchuk                  5 (0.0%)
+   Klaus Heinrich Kiwi                4 (0.0%)
+   Su Baocheng                        4 (0.0%)
+   Diego Sueiro                       4 (0.0%)
+   Stephen Warren                     4 (0.0%)
+   Seung-Woo Kim                      4 (0.0%)
+   Steve Bennett                      4 (0.0%)
+   Stefan Bosch                       3 (0.0%)
+   Ilies CHERGUI                      3 (0.0%)
+   David Rivshin                      3 (0.0%)
+   Daniel Golle                       2 (0.0%)
+   Qu Wenruo                          2 (0.0%)
+   Jesper Schmitz Mouridsen           2 (0.0%)
+   Fabrice GIRARDOT                   2 (0.0%)
+   Nipun Gupta                        2 (0.0%)
+   Roman Stratiienko                  2 (0.0%)
+   Guillermo Rodriguez                2 (0.0%)
+   Volodymyr Babchuk                  2 (0.0%)
+   Kai Stuhlemmer (ebee Engineering)  2 (0.0%)
+   David Wu                           2 (0.0%)
+   Felix Brack                        2 (0.0%)
+   Frank Wunderlich                   1 (0.0%)
+   schspa                             1 (0.0%)
+   Bernhard Kirchen                   1 (0.0%)
+   Hauke Mehrtens                     1 (0.0%)
+   heaterC                            1 (0.0%)
+   Kostya Porotchkin                  1 (0.0%)
+   Vincent Stehlé                     1 (0.0%)
+   Asherah Connor                     1 (0.0%)
+   Ashok Reddy Soma                   1 (0.0%)
+   Yang Liu                           1 (0.0%)
+   Martin Fuzzey                      1 (0.0%)
+   Martin Hundebøll                   1 (0.0%)
+   Atish Patra                        1 (0.0%)
+   Florian Klink                      1 (0.0%)
+   Marcin Juszkiewicz                 1 (0.0%)
+   Adrian Fiergolski                  1 (0.0%)
+   =================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          19221 (39.7%)
+   Pali Rohár                        387 (0.8%)
+   Jaehoon Chung                     184 (0.4%)
+   Alice Guo                         67 (0.1%)
+   Roman Kovalivskyi                 51 (0.1%)
+   Nicolas Ferre                     46 (0.1%)
+   Marc Ferland                      43 (0.1%)
+   Priyanka Jain                     43 (0.1%)
+   Stephen Carlson                   42 (0.1%)
+   Brandon Maier                     25 (0.1%)
+   Patrice Chotard                   23 (0.0%)
+   Kuldeep Singh                     16 (0.0%)
+   Samuel Holland                    15 (0.0%)
+   Etienne Carriere                  12 (0.0%)
+   Oleksandr Suvorov                 11 (0.0%)
+   David Lechner                     7 (0.0%)
+   Peter Robinson                    6 (0.0%)
+   Mathew McBride                    5 (0.0%)
+   Jessica Clarke                    5 (0.0%)
+   Peter Bergin                      1 (0.0%)
+   Hugh Cole-Baker                   1 (0.0%)
+   Roger Pau Monne                   1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 245)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andre Przywara                    28 (11.4%)
+   Peng Fan                          27 (11.0%)
+   Neil Armstrong                    26 (10.6%)
+   Aswath Govindraju                 20 (8.2%)
+   Michal Simek                      18 (7.3%)
+   Matthias Brugger                  17 (6.9%)
+   Marek Behún                       12 (4.9%)
+   Priyanka Jain                     8 (3.3%)
+   Siew Chin Lim                     7 (2.9%)
+   Bin Meng                          6 (2.4%)
+   Patrick Delaunay                  6 (2.4%)
+   Heinrich Schuchardt               6 (2.4%)
+   Roman Kovalivskyi                 5 (2.0%)
+   Minkyu Kang                       5 (2.0%)
+   Tom Rini                          4 (1.6%)
+   Jaehoon Chung                     4 (1.6%)
+   Alex Nemirovsky                   4 (1.6%)
+   Vladimir Oltean                   4 (1.6%)
+   Jernej Skrabec                    4 (1.6%)
+   Claudiu Manoil                    3 (1.2%)
+   Simon Glass                       3 (1.2%)
+   Rayagonda Kokatanur               2 (0.8%)
+   Rainer Boschung                   2 (0.8%)
+   Chia-Wei, Wang                    2 (0.8%)
+   Pali Rohár                        1 (0.4%)
+   Jagan Teki                        1 (0.4%)
+   Jane Wan                          1 (0.4%)
+   Boris Brezillon                   1 (0.4%)
+   Bruce Monroe                      1 (0.4%)
+   Arie Haenel                       1 (0.4%)
+   Julien Lenoir                     1 (0.4%)
+   Mark Brown                        1 (0.4%)
+   Valentin Longchamp                1 (0.4%)
+   Peter Chen                        1 (0.4%)
+   Sherry Sun                        1 (0.4%)
+   Sebastian Reichel                 1 (0.4%)
+   Kevin Scholz                      1 (0.4%)
+   Stefan Agner                      1 (0.4%)
+   Wasim Khan                        1 (0.4%)
+   Tudor Ambarus                     1 (0.4%)
+   Reto Schneider                    1 (0.4%)
+   Abbie Chang                       1 (0.4%)
+   Michael Walle                     1 (0.4%)
+   Alex Marginean                    1 (0.4%)
+   Marek Szyprowski                  1 (0.4%)
+   Tim Harvey                        1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 886)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       241 (27.2%)
+   Priyanka Jain                     117 (13.2%)
+   Patrice Chotard                   64 (7.2%)
+   Stefan Roese                      61 (6.9%)
+   Bin Meng                          54 (6.1%)
+   Jaehoon Chung                     37 (4.2%)
+   Andre Przywara                    25 (2.8%)
+   Peng Fan                          18 (2.0%)
+   Patrick Delaunay                  17 (1.9%)
+   Lukasz Majewski                   17 (1.9%)
+   Heiko Schocher                    16 (1.8%)
+   Heinrich Schuchardt               14 (1.6%)
+   Tom Rini                          13 (1.5%)
+   Samuel Holland                    13 (1.5%)
+   Jagan Teki                        10 (1.1%)
+   Kostya Porotchkin                 10 (1.1%)
+   Fabio Estevam                     10 (1.1%)
+   Jernej Skrabec                    8 (0.9%)
+   Ramon Fried                       8 (0.9%)
+   Ye Li                             8 (0.9%)
+   Peter Chen                        7 (0.8%)
+   Anup Patel                        7 (0.8%)
+   Kever Yang                        7 (0.8%)
+   Neil Armstrong                    6 (0.7%)
+   Andy Shevchenko                   6 (0.7%)
+   Ryan Chen                         6 (0.7%)
+   Marek Behún                       5 (0.6%)
+   Vladimir Oltean                   5 (0.6%)
+   Pratyush Yadav                    5 (0.6%)
+   Rick Chen                         5 (0.6%)
+   Sean Anderson                     5 (0.6%)
+   Qu Wenruo                         4 (0.5%)
+   Paulo Alcantara (SUSE)            4 (0.5%)
+   Nadav Haklai                      3 (0.3%)
+   Ley Foon Tan                      3 (0.3%)
+   Claudiu Manoil                    2 (0.2%)
+   Wasim Khan                        2 (0.2%)
+   Peter Robinson                    2 (0.2%)
+   Andrey Zhizhikin                  2 (0.2%)
+   Michael Trimarchi                 2 (0.2%)
+   Leo Liang                         2 (0.2%)
+   Jens Wiklander                    2 (0.2%)
+   Christian Gmeiner                 2 (0.2%)
+   Torsten Duwe                      2 (0.2%)
+   Alex Leibovich                    2 (0.2%)
+   Igor Opaniuk                      2 (0.2%)
+   Biju Das                          2 (0.2%)
+   Minkyu Kang                       1 (0.1%)
+   Pali Rohár                        1 (0.1%)
+   Michael Walle                     1 (0.1%)
+   Etienne Carriere                  1 (0.1%)
+   Ashok Reddy Soma                  1 (0.1%)
+   Stefan Chulski                    1 (0.1%)
+   Patrick Wildt                     1 (0.1%)
+   Andy Wu                           1 (0.1%)
+   Laurentiu Tudor                   1 (0.1%)
+   Fugang Duan                       1 (0.1%)
+   Madalin Bucur                     1 (0.1%)
+   Igal Liberman                     1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Pavel Machek                      1 (0.1%)
+   Luca Ceresoli                     1 (0.1%)
+   Stephen Warren                    1 (0.1%)
+   Sujeet Baranwal                   1 (0.1%)
+   Mark Kettenis                     1 (0.1%)
+   Moti Buskila                      1 (0.1%)
+   Marek Vasut                       1 (0.1%)
+   Pragnesh Patel                    1 (0.1%)
+   Ilias Apalodimas                  1 (0.1%)
+   Nicolas Saenz Julienne            1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 83)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Chris Packham                     20 (24.1%)
+   Peter Robinson                    17 (20.5%)
+   Jaehoon Chung                     5 (6.0%)
+   faqiang.zhu                       5 (6.0%)
+   Bin Meng                          4 (4.8%)
+   Jernej Skrabec                    4 (4.8%)
+   Andre Przywara                    2 (2.4%)
+   Samuel Holland                    2 (2.4%)
+   Wasim Khan                        2 (2.4%)
+   Patrice Chotard                   1 (1.2%)
+   Patrick Delaunay                  1 (1.2%)
+   Heinrich Schuchardt               1 (1.2%)
+   Tom Rini                          1 (1.2%)
+   Ye Li                             1 (1.2%)
+   Neil Armstrong                    1 (1.2%)
+   Andy Shevchenko                   1 (1.2%)
+   Andrey Zhizhikin                  1 (1.2%)
+   Michael Walle                     1 (1.2%)
+   Stephen Warren                    1 (1.2%)
+   Atish Patra                       1 (1.2%)
+   sa_ip-sw-jenkins                  1 (1.2%)
+   Suneel Garapati                   1 (1.2%)
+   Oliver Graute                     1 (1.2%)
+   iSoC Platform CI                  1 (1.2%)
+   Chrstopher Obbard                 1 (1.2%)
+   Miquel Raynal                     1 (1.2%)
+   Ondrej Jirman                     1 (1.2%)
+   Thomas Graichen                   1 (1.2%)
+   Priit Laes                        1 (1.2%)
+   Icenowy Zheng                     1 (1.2%)
+   Dario Binacchi                    1 (1.2%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 83)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Nicolas Saenz Julienne            13 (15.7%)
+   Andre Przywara                    9 (10.8%)
+   Marek Behún                       7 (8.4%)
+   Moti Buskila                      7 (8.4%)
+   Marek Szyprowski                  5 (6.0%)
+   Li Jun                            5 (6.0%)
+   Padmarao Begari                   4 (4.8%)
+   Matthias Brugger                  3 (3.6%)
+   Jernej Skrabec                    2 (2.4%)
+   Heinrich Schuchardt               2 (2.4%)
+   Fabio Estevam                     2 (2.4%)
+   Ramon Fried                       2 (2.4%)
+   Alex Leibovich                    2 (2.4%)
+   Sujeet Baranwal                   2 (2.4%)
+   Marek Vasut                       2 (2.4%)
+   Patrice Chotard                   1 (1.2%)
+   Tom Rini                          1 (1.2%)
+   Neil Armstrong                    1 (1.2%)
+   Andy Shevchenko                   1 (1.2%)
+   Michael Walle                     1 (1.2%)
+   Dario Binacchi                    1 (1.2%)
+   Kostya Porotchkin                 1 (1.2%)
+   Sean Anderson                     1 (1.2%)
+   Pali Rohár                        1 (1.2%)
+   Ilias Apalodimas                  1 (1.2%)
+   Stephen Carlson                   1 (1.2%)
+   heaterC                           1 (1.2%)
+   Hou Zhiqiang                      1 (1.2%)
+   Vignesh Raghavendra               1 (1.2%)
+   Baruch Siach                      1 (1.2%)
+   Andre Heider                      1 (1.2%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 50)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Bruce Monroe                      7 (14.0%)
+   Arie Haenel                       7 (14.0%)
+   Julien Lenoir                     7 (14.0%)
+   Heinrich Schuchardt               6 (12.0%)
+   Kever Yang                        3 (6.0%)
+   Peter Robinson                    2 (4.0%)
+   Bin Meng                          2 (4.0%)
+   Simon Glass                       2 (4.0%)
+   Nicolas Saenz Julienne            1 (2.0%)
+   Atish Patra                       1 (2.0%)
+   Suneel Garapati                   1 (2.0%)
+   Paulo Alcantara (SUSE)            1 (2.0%)
+   Peter Bergin                      1 (2.0%)
+   Jesper Schmitz Mouridsen          1 (2.0%)
+   Lukas Rusak                       1 (2.0%)
+   Markus Reichl                     1 (2.0%)
+   Dean Saridakis                    1 (2.0%)
+   Thorsten Spille                   1 (2.0%)
+   Junghoon Kim                      1 (2.0%)
+   Alexander von Gluck IV            1 (2.0%)
+   Moshe, Yaniv                      1 (2.0%)
+   Rasmus Villemoes                  1 (2.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 50)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       28 (56.0%)
+   Heinrich Schuchardt               6 (12.0%)
+   Tom Rini                          3 (6.0%)
+   Fabio Estevam                     2 (4.0%)
+   Ovidiu Panait                     2 (4.0%)
+   Andre Przywara                    1 (2.0%)
+   Ramon Fried                       1 (2.0%)
+   Andy Shevchenko                   1 (2.0%)
+   Ilias Apalodimas                  1 (2.0%)
+   Baruch Siach                      1 (2.0%)
+   Stephen Warren                    1 (2.0%)
+   Priyanka Jain                     1 (2.0%)
+   Michal Simek                      1 (2.0%)
+   Seung-Woo Kim                     1 (2.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         748 (44.7%)
+   Google, Inc.                      285 (17.0%)
+   NXP                               124 (7.4%)
+   ST Microelectronics               103 (6.1%)
+   Intel                             57 (3.4%)
+   Samsung                           45 (2.7%)
+   Linaro                            43 (2.6%)
+   DENX Software Engineering         42 (2.5%)
+   Konsulko Group                    40 (2.4%)
+   Texas Instruments                 39 (2.3%)
+   Wind River                        25 (1.5%)
+   AMD                               22 (1.3%)
+   BayLibre SAS                      22 (1.3%)
+   ARM                               18 (1.1%)
+   Marvell                           11 (0.7%)
+   SUSE                              11 (0.7%)
+   Xilinx                            11 (0.7%)
+   Rockchip                          6 (0.4%)
+   IBM                               4 (0.2%)
+   Renesas Electronics               4 (0.2%)
+   Bootlin                           3 (0.2%)
+   Broadcom                          3 (0.2%)
+   Sony                              2 (0.1%)
+   Boundary Devices                  2 (0.1%)
+   Toradex                           2 (0.1%)
+   General Electric                  1 (0.1%)
+   Phytec                            1 (0.1%)
+   Siemens                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         65641 (46.3%)
+   Konsulko Group                    19605 (13.8%)
+   Google, Inc.                      17340 (12.2%)
+   NXP                               7103 (5.0%)
+   Texas Instruments                 5418 (3.8%)
+   Linaro                            5391 (3.8%)
+   BayLibre SAS                      4113 (2.9%)
+   DENX Software Engineering         3925 (2.8%)
+   Phytec                            2827 (2.0%)
+   Intel                             2286 (1.6%)
+   ST Microelectronics               2034 (1.4%)
+   Samsung                           1682 (1.2%)
+   Rockchip                          1068 (0.8%)
+   Renesas Electronics               813 (0.6%)
+   ARM                               543 (0.4%)
+   AMD                               533 (0.4%)
+   Wind River                        456 (0.3%)
+   Broadcom                          287 (0.2%)
+   SUSE                              247 (0.2%)
+   Xilinx                            191 (0.1%)
+   Marvell                           80 (0.1%)
+   Bootlin                           60 (0.0%)
+   Toradex                           15 (0.0%)
+   General Electric                  14 (0.0%)
+   Boundary Devices                  9 (0.0%)
+   Sony                              5 (0.0%)
+   IBM                               4 (0.0%)
+   Siemens                           4 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 245)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         50 (20.4%)
+   NXP                               46 (18.8%)
+   ARM                               28 (11.4%)
+   BayLibre SAS                      26 (10.6%)
+   Texas Instruments                 21 (8.6%)
+   Xilinx                            18 (7.3%)
+   SUSE                              17 (6.9%)
+   Intel                             10 (4.1%)
+   Samsung                           10 (4.1%)
+   ST Microelectronics               6 (2.4%)
+   Konsulko Group                    4 (1.6%)
+   Google, Inc.                      3 (1.2%)
+   Broadcom                          2 (0.8%)
+   Bootlin                           1 (0.4%)
+   Amarula Solutions                 1 (0.4%)
+   Collabora Ltd.                    1 (0.4%)
+   Nokia                             1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 194)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         110 (56.7%)
+   NXP                               19 (9.8%)
+   Texas Instruments                 7 (3.6%)
+   Xilinx                            5 (2.6%)
+   Intel                             5 (2.6%)
+   ST Microelectronics               5 (2.6%)
+   Samsung                           4 (2.1%)
+   Linaro                            4 (2.1%)
+   DENX Software Engineering         4 (2.1%)
+   Marvell                           4 (2.1%)
+   BayLibre SAS                      3 (1.5%)
+   Broadcom                          3 (1.5%)
+   Rockchip                          3 (1.5%)
+   ARM                               2 (1.0%)
+   SUSE                              2 (1.0%)
+   Renesas Electronics               2 (1.0%)
+   Konsulko Group                    1 (0.5%)
+   Google, Inc.                      1 (0.5%)
+   Bootlin                           1 (0.5%)
+   Phytec                            1 (0.5%)
+   AMD                               1 (0.5%)
+   Wind River                        1 (0.5%)
+   Toradex                           1 (0.5%)
+   General Electric                  1 (0.5%)
+   Boundary Devices                  1 (0.5%)
+   Sony                              1 (0.5%)
+   IBM                               1 (0.5%)
+   Siemens                           1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2021.07.rst b/doc/develop/statistics/u-boot-stats-v2021.07.rst
new file mode 100644
index 00000000000..b41d2e3e517
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2021.07.rst
@@ -0,0 +1,833 @@
+:orphan:
+
+Release Statistics for U-Boot v2021.07
+======================================
+
+* Processed 1730 changesets from 187 developers
+
+* 30 employers found
+
+* A total of 402449 lines added, 82710 removed (delta 319739)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       293 (16.9%)
+   Aaron Williams                    90 (5.2%)
+   Tom Rini                          81 (4.7%)
+   Heinrich Schuchardt               66 (3.8%)
+   Bin Meng                          64 (3.7%)
+   Marek Vasut                       59 (3.4%)
+   Stefan Roese                      51 (2.9%)
+   Marek Behún                       48 (2.8%)
+   Sean Anderson                     43 (2.5%)
+   Patrick Delaunay                  38 (2.2%)
+   Neil Armstrong                    36 (2.1%)
+   Giulio Benetti                    34 (2.0%)
+   Dave Gerlach                      31 (1.8%)
+   Alexandru Gagniuc                 30 (1.7%)
+   Michal Simek                      27 (1.6%)
+   Ilias Apalodimas                  26 (1.5%)
+   Tim Harvey                        26 (1.5%)
+   Peng Fan                          22 (1.3%)
+   Peter Robinson                    22 (1.3%)
+   Dario Binacchi                    22 (1.3%)
+   Lokesh Vutla                      19 (1.1%)
+   Ye Li                             18 (1.0%)
+   Rasmus Villemoes                  16 (0.9%)
+   Camelia Groza                     15 (0.9%)
+   Vignesh Raghavendra               15 (0.9%)
+   Jagan Teki                        14 (0.8%)
+   Pali Rohár                        13 (0.8%)
+   Breno Lima                        13 (0.8%)
+   Aleksandar Gerasimovski           12 (0.7%)
+   Andre Przywara                    12 (0.7%)
+   Grzegorz Jaszczyk                 12 (0.7%)
+   Weijie Gao                        11 (0.6%)
+   Michael Walle                     11 (0.6%)
+   Green Wan                         11 (0.6%)
+   Igal Liberman                     11 (0.6%)
+   Jernej Skrabec                    11 (0.6%)
+   Siew Chin Lim                     11 (0.6%)
+   T Karthik Reddy                   10 (0.6%)
+   Kory Maincent                     10 (0.6%)
+   Jaehoon Chung                     9 (0.5%)
+   Harm Berntsen                     9 (0.5%)
+   Kostya Porotchkin                 9 (0.5%)
+   Igor Opaniuk                      9 (0.5%)
+   Arnaud Patard (Rtp)               9 (0.5%)
+   Fabio Estevam                     8 (0.5%)
+   Heiko Stuebner                    8 (0.5%)
+   Samuel Holland                    7 (0.4%)
+   Asherah Connor                    7 (0.4%)
+   dillon min                        7 (0.4%)
+   Andrey Zhizhikin                  6 (0.3%)
+   Ashok Reddy Soma                  6 (0.3%)
+   Hai Pham                          6 (0.3%)
+   Biju Das                          6 (0.3%)
+   Phil Sutter                       6 (0.3%)
+   Priyanka Jain                     5 (0.3%)
+   Yangbo Lu                         5 (0.3%)
+   Anatolij Gustschin                5 (0.3%)
+   Marcin Wojtas                     5 (0.3%)
+   Stefan Chulski                    5 (0.3%)
+   Ian Ray                           5 (0.3%)
+   Jose Marinho                      5 (0.3%)
+   Aymen Sghaier                     5 (0.3%)
+   Fabien Parent                     5 (0.3%)
+   Lad Prabhakar                     5 (0.3%)
+   Adam Ford                         4 (0.2%)
+   Masahisa Kojima                   4 (0.2%)
+   Alper Nebi Yasak                  4 (0.2%)
+   Suman Anna                        4 (0.2%)
+   Sughosh Ganu                      4 (0.2%)
+   Ying-Chun Liu (PaulLiu)           4 (0.2%)
+   Wasim Khan                        4 (0.2%)
+   Etienne Carriere                  4 (0.2%)
+   Trevor Woerner                    4 (0.2%)
+   Jorge Ramirez-Ortiz               4 (0.2%)
+   Harald Seiler                     4 (0.2%)
+   Da Xue                            3 (0.2%)
+   Masami Hiramatsu                  3 (0.2%)
+   Andy Shevchenko                   3 (0.2%)
+   Ley Foon Tan                      3 (0.2%)
+   Hou Zhiqiang                      3 (0.2%)
+   Vladimir Oltean                   3 (0.2%)
+   Aswath Govindraju                 3 (0.2%)
+   Ben Peled                         3 (0.2%)
+   Nishanth Menon                    3 (0.2%)
+   Yuichiro Goto                     3 (0.2%)
+   Haibo Chen                        3 (0.2%)
+   Franck LENORMAND                  3 (0.2%)
+   Roger Pau Monné                   3 (0.2%)
+   Kunihiko Hayashi                  2 (0.1%)
+   Matt Merhar                       2 (0.1%)
+   Wesley Sheng                      2 (0.1%)
+   Oleh Kravchenko                   2 (0.1%)
+   Daniil Stas                       2 (0.1%)
+   Rick Chen                         2 (0.1%)
+   Mian Yousaf Kaukab                2 (0.1%)
+   Oleksandr Suvorov                 2 (0.1%)
+   Horatiu Vultur                    2 (0.1%)
+   Daniel Schwierzeck                2 (0.1%)
+   Saeed Nowshadi                    2 (0.1%)
+   jinghua                           2 (0.1%)
+   Keerthy                           2 (0.1%)
+   Farhan Ali                        2 (0.1%)
+   Ilko Iliev                        2 (0.1%)
+   Sebastian Reichel                 2 (0.1%)
+   Chen Guanqiao                     2 (0.1%)
+   Qu Wenruo                         2 (0.1%)
+   Ivan Uvarov                       2 (0.1%)
+   Stefan Agner                      2 (0.1%)
+   Eugen Hristev                     2 (0.1%)
+   Brandon Maier                     2 (0.1%)
+   Icenowy Zheng                     2 (0.1%)
+   Wolfgang Wallner                  2 (0.1%)
+   Joel Stanley                      2 (0.1%)
+   Clement Faure                     2 (0.1%)
+   Utkarsh Gupta                     2 (0.1%)
+   Wagner Popov dos Santos           2 (0.1%)
+   Amit Kumar Mahapatra              2 (0.1%)
+   Christoph Muellner                2 (0.1%)
+   Sam Shih                          2 (0.1%)
+   Claudiu Beznea                    2 (0.1%)
+   Adarsh Babu Kalepalli             1 (0.1%)
+   David Lamparter                   1 (0.1%)
+   Jan Kiszka                        1 (0.1%)
+   Christian Melki                   1 (0.1%)
+   Reuben Dowle                      1 (0.1%)
+   Dimitri John Ledkov               1 (0.1%)
+   Jassi Brar                        1 (0.1%)
+   Ran Wang                          1 (0.1%)
+   Lasse Klok Mikkelsen              1 (0.1%)
+   Biwen Li                          1 (0.1%)
+   Kuldeep Singh                     1 (0.1%)
+   Chaitanya Sakinam                 1 (0.1%)
+   Jiafei Pan                        1 (0.1%)
+   Priyanka Singh                    1 (0.1%)
+   Manish Tomar                      1 (0.1%)
+   Adrian Fiergolski                 1 (0.1%)
+   Joao Marcos Costa                 1 (0.1%)
+   Navin Sankar Velliangiri          1 (0.1%)
+   Oliver Graute                     1 (0.1%)
+   João Loureiro                     1 (0.1%)
+   Patrice Chotard                   1 (0.1%)
+   Kishon Vijay Abraham I            1 (0.1%)
+   Heiko Schocher                    1 (0.1%)
+   Kever Yang                        1 (0.1%)
+   Grzegorz Szymaszek                1 (0.1%)
+   Christoph Niedermaier             1 (0.1%)
+   Faiz Abbas                        1 (0.1%)
+   Raviteja Narayanam                1 (0.1%)
+   Peng Wang                         1 (0.1%)
+   Ken Ma                            1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Vincent Chen                      1 (0.1%)
+   Dylan Jhong                       1 (0.1%)
+   Niko Mauno                        1 (0.1%)
+   Priit Laes                        1 (0.1%)
+   Evan Benn                         1 (0.1%)
+   Christine Gharzuzi                1 (0.1%)
+   Omri Itach                        1 (0.1%)
+   Mark Kettenis                     1 (0.1%)
+   AKASHI Takahiro                   1 (0.1%)
+   Joel Peshkin                      1 (0.1%)
+   Denys Drozdov                     1 (0.1%)
+   Suneel Garapati                   1 (0.1%)
+   Karl Beldan                       1 (0.1%)
+   Reinoud Zandijk                   1 (0.1%)
+   Manuel Reis                       1 (0.1%)
+   Martin Fuzzey                     1 (0.1%)
+   Arnaud Ferraris                   1 (0.1%)
+   Claudiu Manoil                    1 (0.1%)
+   Alex Marginean                    1 (0.1%)
+   Chan, Donald                      1 (0.1%)
+   Stefan Herbrechtsmeier            1 (0.1%)
+   Sylwester Nawrocki                1 (0.1%)
+   Max Krummenacher                  1 (0.1%)
+   Niel Fourie                       1 (0.1%)
+   Philippe Schenker                 1 (0.1%)
+   Clement Le Marquis                1 (0.1%)
+   Jacky Bai                         1 (0.1%)
+   haidong.zheng                     1 (0.1%)
+   Sherry Sun                        1 (0.1%)
+   Alexandre Vicenzi                 1 (0.1%)
+   Xiaobo Tian                       1 (0.1%)
+   Robert Hancock                    1 (0.1%)
+   Vincent Stehlé                    1 (0.1%)
+   Martin Townsend                   1 (0.1%)
+   Nicolas Boichat                   1 (0.1%)
+   Samuel Dionne-Riel                1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Aaron Williams                    237557 (52.4%)
+   Dave Gerlach                      45086 (10.0%)
+   Tom Rini                          44582 (9.8%)
+   Simon Glass                       14090 (3.1%)
+   Tim Harvey                        11805 (2.6%)
+   Ying-Chun Liu (PaulLiu)           9433 (2.1%)
+   Michal Simek                      8190 (1.8%)
+   Green Wan                         5339 (1.2%)
+   Stefan Roese                      5268 (1.2%)
+   Jagan Teki                        5124 (1.1%)
+   Ilko Iliev                        4015 (0.9%)
+   Ye Li                             3455 (0.8%)
+   Marek Vasut                       3434 (0.8%)
+   Kostya Porotchkin                 3111 (0.7%)
+   Neil Armstrong                    3058 (0.7%)
+   Peter Robinson                    3031 (0.7%)
+   Lokesh Vutla                      2780 (0.6%)
+   Peng Fan                          2716 (0.6%)
+   Vignesh Raghavendra               2052 (0.5%)
+   Oliver Graute                     1469 (0.3%)
+   Grzegorz Jaszczyk                 1467 (0.3%)
+   Bin Meng                          1268 (0.3%)
+   Aleksandar Gerasimovski           1256 (0.3%)
+   Ilias Apalodimas                  1215 (0.3%)
+   Jassi Brar                        1143 (0.3%)
+   dillon min                        1126 (0.2%)
+   Heinrich Schuchardt               1065 (0.2%)
+   Camelia Groza                     1056 (0.2%)
+   Oleh Kravchenko                   1043 (0.2%)
+   Jose Marinho                      970 (0.2%)
+   Marek Behún                       957 (0.2%)
+   Dario Binacchi                    944 (0.2%)
+   Alexandru Gagniuc                 941 (0.2%)
+   Lad Prabhakar                     934 (0.2%)
+   Navin Sankar Velliangiri          908 (0.2%)
+   Sean Anderson                     878 (0.2%)
+   Kory Maincent                     838 (0.2%)
+   Asherah Connor                    825 (0.2%)
+   Igal Liberman                     796 (0.2%)
+   Heiko Stuebner                    772 (0.2%)
+   Etienne Carriere                  760 (0.2%)
+   Ivan Uvarov                       750 (0.2%)
+   Daniel Schwierzeck                704 (0.2%)
+   Patrick Delaunay                  700 (0.2%)
+   Fabien Parent                     672 (0.1%)
+   Andre Przywara                    630 (0.1%)
+   Biju Das                          622 (0.1%)
+   Jacky Bai                         608 (0.1%)
+   Fabio Estevam                     602 (0.1%)
+   Breno Lima                        523 (0.1%)
+   Alex Marginean                    490 (0.1%)
+   Jaehoon Chung                     446 (0.1%)
+   Siew Chin Lim                     436 (0.1%)
+   Giulio Benetti                    415 (0.1%)
+   T Karthik Reddy                   366 (0.1%)
+   Masahisa Kojima                   358 (0.1%)
+   Pali Rohár                        333 (0.1%)
+   Claudiu Manoil                    329 (0.1%)
+   Clement Faure                     299 (0.1%)
+   Jorge Ramirez-Ortiz               260 (0.1%)
+   Keerthy                           239 (0.1%)
+   Harm Berntsen                     238 (0.1%)
+   Alper Nebi Yasak                  226 (0.0%)
+   Rasmus Villemoes                  224 (0.0%)
+   Xiaobo Tian                       223 (0.0%)
+   Heiko Schocher                    215 (0.0%)
+   Chaitanya Sakinam                 207 (0.0%)
+   Harald Seiler                     200 (0.0%)
+   Stefan Chulski                    189 (0.0%)
+   Phil Sutter                       187 (0.0%)
+   Adam Ford                         181 (0.0%)
+   haidong.zheng                     179 (0.0%)
+   Arnaud Patard (Rtp)               177 (0.0%)
+   Igor Opaniuk                      176 (0.0%)
+   Trevor Woerner                    165 (0.0%)
+   Weijie Gao                        154 (0.0%)
+   Jernej Skrabec                    154 (0.0%)
+   Evan Benn                         144 (0.0%)
+   Yangbo Lu                         143 (0.0%)
+   Michael Walle                     138 (0.0%)
+   Icenowy Zheng                     131 (0.0%)
+   Alexandre Vicenzi                 128 (0.0%)
+   Chris Packham                     114 (0.0%)
+   Reinoud Zandijk                   110 (0.0%)
+   Joel Peshkin                      105 (0.0%)
+   Marcin Wojtas                     102 (0.0%)
+   Chan, Donald                      102 (0.0%)
+   Hai Pham                          98 (0.0%)
+   Ashok Reddy Soma                  97 (0.0%)
+   Adarsh Babu Kalepalli             88 (0.0%)
+   Mian Yousaf Kaukab                83 (0.0%)
+   Nishanth Menon                    80 (0.0%)
+   Aymen Sghaier                     76 (0.0%)
+   jinghua                           69 (0.0%)
+   Suman Anna                        67 (0.0%)
+   Max Krummenacher                  66 (0.0%)
+   Andrey Zhizhikin                  63 (0.0%)
+   Brandon Maier                     62 (0.0%)
+   Joel Stanley                      61 (0.0%)
+   Samuel Holland                    58 (0.0%)
+   Farhan Ali                        57 (0.0%)
+   Chen Guanqiao                     55 (0.0%)
+   Ken Ma                            55 (0.0%)
+   Vladimir Oltean                   47 (0.0%)
+   Haibo Chen                        45 (0.0%)
+   Utkarsh Gupta                     45 (0.0%)
+   Horatiu Vultur                    42 (0.0%)
+   Clement Le Marquis                41 (0.0%)
+   Sebastian Reichel                 38 (0.0%)
+   Franck LENORMAND                  36 (0.0%)
+   Jiafei Pan                        36 (0.0%)
+   Anatolij Gustschin                34 (0.0%)
+   Wagner Popov dos Santos           29 (0.0%)
+   Qu Wenruo                         28 (0.0%)
+   Claudiu Beznea                    28 (0.0%)
+   Aswath Govindraju                 27 (0.0%)
+   Sherry Sun                        27 (0.0%)
+   Ian Ray                           26 (0.0%)
+   Omri Itach                        26 (0.0%)
+   Sughosh Ganu                      25 (0.0%)
+   Oleksandr Suvorov                 24 (0.0%)
+   Eugen Hristev                     23 (0.0%)
+   Niko Mauno                        21 (0.0%)
+   Andy Shevchenko                   19 (0.0%)
+   Hou Zhiqiang                      18 (0.0%)
+   Masami Hiramatsu                  17 (0.0%)
+   Robert Hancock                    17 (0.0%)
+   Yuichiro Goto                     16 (0.0%)
+   Adrian Fiergolski                 16 (0.0%)
+   Daniil Stas                       15 (0.0%)
+   Sam Shih                          15 (0.0%)
+   Arnaud Ferraris                   15 (0.0%)
+   Christoph Muellner                13 (0.0%)
+   Stefan Agner                      12 (0.0%)
+   Wolfgang Wallner                  12 (0.0%)
+   Reuben Dowle                      12 (0.0%)
+   Karl Beldan                       12 (0.0%)
+   Vincent Chen                      11 (0.0%)
+   Priyanka Jain                     10 (0.0%)
+   Joao Marcos Costa                 10 (0.0%)
+   Wasim Khan                        9 (0.0%)
+   Da Xue                            9 (0.0%)
+   Ben Peled                         9 (0.0%)
+   Kunihiko Hayashi                  9 (0.0%)
+   Saeed Nowshadi                    9 (0.0%)
+   Amit Kumar Mahapatra              9 (0.0%)
+   Priit Laes                        9 (0.0%)
+   Stefan Herbrechtsmeier            9 (0.0%)
+   Dimitri John Ledkov               8 (0.0%)
+   João Loureiro                     8 (0.0%)
+   Dylan Jhong                       8 (0.0%)
+   Martin Townsend                   8 (0.0%)
+   Ley Foon Tan                      7 (0.0%)
+   Ran Wang                          7 (0.0%)
+   Priyanka Singh                    7 (0.0%)
+   Raviteja Narayanam                6 (0.0%)
+   Rick Chen                         5 (0.0%)
+   Niel Fourie                       5 (0.0%)
+   David Lamparter                   4 (0.0%)
+   Lasse Klok Mikkelsen              4 (0.0%)
+   Patrice Chotard                   4 (0.0%)
+   Grzegorz Szymaszek                4 (0.0%)
+   Christine Gharzuzi                4 (0.0%)
+   Vincent Stehlé                    4 (0.0%)
+   Roger Pau Monné                   3 (0.0%)
+   Denys Drozdov                     3 (0.0%)
+   Suneel Garapati                   3 (0.0%)
+   Martin Fuzzey                     3 (0.0%)
+   Nicolas Boichat                   3 (0.0%)
+   Matt Merhar                       2 (0.0%)
+   Wesley Sheng                      2 (0.0%)
+   Kuldeep Singh                     2 (0.0%)
+   Faiz Abbas                        2 (0.0%)
+   Peng Wang                         2 (0.0%)
+   Sylwester Nawrocki                2 (0.0%)
+   Philippe Schenker                 2 (0.0%)
+   Jan Kiszka                        1 (0.0%)
+   Christian Melki                   1 (0.0%)
+   Biwen Li                          1 (0.0%)
+   Manish Tomar                      1 (0.0%)
+   Kishon Vijay Abraham I            1 (0.0%)
+   Kever Yang                        1 (0.0%)
+   Christoph Niedermaier             1 (0.0%)
+   Mark Kettenis                     1 (0.0%)
+   AKASHI Takahiro                   1 (0.0%)
+   Manuel Reis                       1 (0.0%)
+   Samuel Dionne-Riel                1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          42586 (51.5%)
+   Grzegorz Jaszczyk                 1248 (1.5%)
+   Daniel Schwierzeck                626 (0.8%)
+   Jacky Bai                         159 (0.2%)
+   Reinoud Zandijk                   66 (0.1%)
+   Harald Seiler                     51 (0.1%)
+   jinghua                           47 (0.1%)
+   Andrey Zhizhikin                  40 (0.0%)
+   Chan, Donald                      35 (0.0%)
+   Yangbo Lu                         28 (0.0%)
+   Jernej Skrabec                    12 (0.0%)
+   Marcin Wojtas                     11 (0.0%)
+   Daniil Stas                       11 (0.0%)
+   Ian Ray                           7 (0.0%)
+   Sughosh Ganu                      6 (0.0%)
+   Mian Yousaf Kaukab                5 (0.0%)
+   Joao Marcos Costa                 4 (0.0%)
+   Wasim Khan                        3 (0.0%)
+   Roger Pau Monné                   2 (0.0%)
+   Wesley Sheng                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 303)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      118 (38.9%)
+   Peng Fan                          44 (14.5%)
+   Andre Przywara                    22 (7.3%)
+   Michal Simek                      19 (6.3%)
+   Heinrich Schuchardt               10 (3.3%)
+   Dave Gerlach                      7 (2.3%)
+   Marek Vasut                       6 (2.0%)
+   Lokesh Vutla                      6 (2.0%)
+   Priyanka Jain                     5 (1.7%)
+   Sebastian Reichel                 5 (1.7%)
+   Bin Meng                          5 (1.7%)
+   Rainer Boschung                   4 (1.3%)
+   Kostya Porotchkin                 4 (1.3%)
+   Ye Li                             4 (1.3%)
+   Tom Rini                          3 (1.0%)
+   Neil Armstrong                    3 (1.0%)
+   Vladimir Oltean                   2 (0.7%)
+   Biwen Li                          2 (0.7%)
+   Kirill Kapranov                   2 (0.7%)
+   Uri Mashiach                      2 (0.7%)
+   Valentin Raevsky                  2 (0.7%)
+   Tien Fong Chee                    2 (0.7%)
+   Oleksandr Suvorov                 2 (0.7%)
+   Aswath Govindraju                 2 (0.7%)
+   Ken Ma                            2 (0.7%)
+   Grzegorz Jaszczyk                 1 (0.3%)
+   Marcin Wojtas                     1 (0.3%)
+   Anji J                            1 (0.3%)
+   Jesse Taube                       1 (0.3%)
+   Greentime Hu                      1 (0.3%)
+   Pankaj Dev                        1 (0.3%)
+   Ofir Fedida                       1 (0.3%)
+   Sinthu Raja                       1 (0.3%)
+   Matteo Lisi                       1 (0.3%)
+   Matteo Ghidoni                    1 (0.3%)
+   Raul Ulises Cardenas              1 (0.3%)
+   Alice Guo                         1 (0.3%)
+   Suman Anna                        1 (0.3%)
+   Nishanth Menon                    1 (0.3%)
+   Ashok Reddy Soma                  1 (0.3%)
+   Igor Opaniuk                      1 (0.3%)
+   Ilias Apalodimas                  1 (0.3%)
+   Igal Liberman                     1 (0.3%)
+   Alex Marginean                    1 (0.3%)
+   Marek Behún                       1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 754)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       146 (19.4%)
+   Priyanka Jain                     75 (9.9%)
+   Stefan Roese                      56 (7.4%)
+   Heinrich Schuchardt               48 (6.4%)
+   Bin Meng                          45 (6.0%)
+   Ramon Fried                       37 (4.9%)
+   Patrick Delaunay                  31 (4.1%)
+   Patrice Chotard                   24 (3.2%)
+   Rick Chen                         24 (3.2%)
+   Jaehoon Chung                     23 (3.1%)
+   Vladimir Oltean                   19 (2.5%)
+   Kever Yang                        18 (2.4%)
+   Ye Li                             17 (2.3%)
+   Andre Przywara                    16 (2.1%)
+   Fabio Estevam                     14 (1.9%)
+   Tom Rini                          11 (1.5%)
+   Ilias Apalodimas                  11 (1.5%)
+   Leo Yu-Chi Liang                  11 (1.5%)
+   Sean Anderson                     11 (1.5%)
+   Pratyush Yadav                    10 (1.3%)
+   Kostya Porotchkin                 9 (1.2%)
+   Marek Behún                       9 (1.2%)
+   Peng Fan                          7 (0.9%)
+   Pali Rohár                        7 (0.9%)
+   Oleksandr Suvorov                 5 (0.7%)
+   Igal Liberman                     5 (0.7%)
+   Ley Foon Tan                      5 (0.7%)
+   Stefan Chulski                    5 (0.7%)
+   Maxime Ripard                     4 (0.5%)
+   Biju Das                          4 (0.5%)
+   Grzegorz Jaszczyk                 3 (0.4%)
+   Jacky Bai                         3 (0.4%)
+   Jernej Skrabec                    3 (0.4%)
+   Padmarao Begari                   3 (0.4%)
+   Lad Prabhakar                     3 (0.4%)
+   Miquel Raynal                     2 (0.3%)
+   Andy Shevchenko                   2 (0.3%)
+   Hou Zhiqiang                      2 (0.3%)
+   Eugen Hristev                     2 (0.3%)
+   Heiko Stuebner                    2 (0.3%)
+   Marek Vasut                       1 (0.1%)
+   Lokesh Vutla                      1 (0.1%)
+   Neil Armstrong                    1 (0.1%)
+   Marcin Wojtas                     1 (0.1%)
+   Ashok Reddy Soma                  1 (0.1%)
+   Igor Opaniuk                      1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Wasim Khan                        1 (0.1%)
+   Nadav Haklai                      1 (0.1%)
+   Yan Markman                       1 (0.1%)
+   Atish Patra                       1 (0.1%)
+   Damien Le Moal                    1 (0.1%)
+   Grygorii Strashko                 1 (0.1%)
+   Michael Trimarchi                 1 (0.1%)
+   Horia Geantă                      1 (0.1%)
+   Utkarsh Gupta                     1 (0.1%)
+   Rasmus Villemoes                  1 (0.1%)
+   Heiko Schocher                    1 (0.1%)
+   Masahisa Kojima                   1 (0.1%)
+   Etienne Carriere                  1 (0.1%)
+   Alexandru Gagniuc                 1 (0.1%)
+   Oleh Kravchenko                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 61)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Peter Robinson                    13 (21.3%)
+   Bin Meng                          4 (6.6%)
+   Vladimir Oltean                   3 (4.9%)
+   Kostya Porotchkin                 3 (4.9%)
+   Padmarao Begari                   3 (4.9%)
+   Tim Harvey                        3 (4.9%)
+   Patrick Delaunay                  2 (3.3%)
+   Ilias Apalodimas                  2 (3.3%)
+   Harm Berntsen                     2 (3.3%)
+   Samuel Holland                    2 (3.3%)
+   Adam Ford                         2 (3.3%)
+   Heinrich Schuchardt               1 (1.6%)
+   Rick Chen                         1 (1.6%)
+   Jaehoon Chung                     1 (1.6%)
+   Tom Rini                          1 (1.6%)
+   Sean Anderson                     1 (1.6%)
+   Pali Rohár                        1 (1.6%)
+   Jacky Bai                         1 (1.6%)
+   Marek Vasut                       1 (1.6%)
+   Nadav Haklai                      1 (1.6%)
+   Alexandru Gagniuc                 1 (1.6%)
+   Anji J                            1 (1.6%)
+   Pierre-Jean Texier                1 (1.6%)
+   Richard Genoud                    1 (1.6%)
+   Simon Baatz                       1 (1.6%)
+   Derald D. Woods                   1 (1.6%)
+   Jagannadha Sutradharudu Teki      1 (1.6%)
+   Matt Merhar                       1 (1.6%)
+   Sherry Sun                        1 (1.6%)
+   Chris Packham                     1 (1.6%)
+   Kory Maincent                     1 (1.6%)
+   Green Wan                         1 (1.6%)
+   Ying-Chun Liu (PaulLiu)           1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 61)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Arnaud Patard (Rtp)               9 (14.8%)
+   Bin Meng                          5 (8.2%)
+   Simon Glass                       5 (8.2%)
+   Marek Behún                       4 (6.6%)
+   Vladimir Oltean                   3 (4.9%)
+   Andre Przywara                    3 (4.9%)
+   Marcin Wojtas                     3 (4.9%)
+   Marek Vasut                       2 (3.3%)
+   Ye Li                             2 (3.3%)
+   Wasim Khan                        2 (3.3%)
+   Yuichiro Goto                     2 (3.3%)
+   Harm Berntsen                     1 (1.6%)
+   Heinrich Schuchardt               1 (1.6%)
+   Tom Rini                          1 (1.6%)
+   Stefan Roese                      1 (1.6%)
+   Fabio Estevam                     1 (1.6%)
+   Peng Fan                          1 (1.6%)
+   Grzegorz Jaszczyk                 1 (1.6%)
+   Hou Zhiqiang                      1 (1.6%)
+   Neil Armstrong                    1 (1.6%)
+   Igor Opaniuk                      1 (1.6%)
+   Masahisa Kojima                   1 (1.6%)
+   Reinoud Zandijk                   1 (1.6%)
+   Mian Yousaf Kaukab                1 (1.6%)
+   Joao Marcos Costa                 1 (1.6%)
+   Sylwester Nawrocki                1 (1.6%)
+   Manuel Reis                       1 (1.6%)
+   Kunihiko Hayashi                  1 (1.6%)
+   Haibo Chen                        1 (1.6%)
+   Icenowy Zheng                     1 (1.6%)
+   Asherah Connor                    1 (1.6%)
+   Jagan Teki                        1 (1.6%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 27)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   B1oHazard                         3 (11.1%)
+   Heinrich Schuchardt               2 (7.4%)
+   Oleksandr Suvorov                 2 (7.4%)
+   Damien Le Moal                    2 (7.4%)
+   Matwey Kornilov                   2 (7.4%)
+   Marek Behún                       1 (3.7%)
+   Marek Vasut                       1 (3.7%)
+   Tom Rini                          1 (3.7%)
+   Samuel Holland                    1 (3.7%)
+   Sean Anderson                     1 (3.7%)
+   Alexandru Gagniuc                 1 (3.7%)
+   Ley Foon Tan                      1 (3.7%)
+   Michal Simek                      1 (3.7%)
+   Mark Kettenis                     1 (3.7%)
+   Kazuhiko Sakamoto                 1 (3.7%)
+   Minas Hambardzumyan               1 (3.7%)
+   Marek Szyprowski                  1 (3.7%)
+   Tom Warren                        1 (3.7%)
+   Roger Meier                       1 (3.7%)
+   Ard Biesheuvel                    1 (3.7%)
+   Horatiu Vultur                    1 (3.7%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 27)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          4 (14.8%)
+   Neil Armstrong                    4 (14.8%)
+   Sean Anderson                     3 (11.1%)
+   Simon Glass                       3 (11.1%)
+   Patrick Delaunay                  2 (7.4%)
+   Rasmus Villemoes                  2 (7.4%)
+   Qu Wenruo                         2 (7.4%)
+   Bin Meng                          1 (3.7%)
+   Andre Przywara                    1 (3.7%)
+   Fabio Estevam                     1 (3.7%)
+   Igor Opaniuk                      1 (3.7%)
+   Ilias Apalodimas                  1 (3.7%)
+   Suman Anna                        1 (3.7%)
+   Masami Hiramatsu                  1 (3.7%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   (Unknown)                           607 (35.1%)
+   Google, Inc.                        293 (16.9%)
+   DENX Software Engineering           125 (7.2%)
+   Marvell                             124 (7.2%)
+   NXP                                 116 (6.7%)
+   Konsulko Group                      81 (4.7%)
+   Texas Instruments                   79 (4.6%)
+   Linaro                              47 (2.7%)
+   BayLibre SAS                        41 (2.4%)
+   ST Microelectronics                 39 (2.3%)
+   AMD                                 27 (1.6%)
+   Xilinx                              22 (1.3%)
+   ARM                                 18 (1.0%)
+   Intel                               17 (1.0%)
+   Renesas Electronics                 17 (1.0%)
+   Semihalf Embedded Systems           17 (1.0%)
+   Amarula Solutions                   13 (0.8%)
+   Bootlin                             10 (0.6%)
+   Samsung                             10 (0.6%)
+   General Electric                    5 (0.3%)
+   SUSE                                5 (0.3%)
+   Toradex                             4 (0.2%)
+   Broadcom                            3 (0.2%)
+   Collabora Ltd.                      2 (0.1%)
+   Ronetix                             2 (0.1%)
+   Socionext Inc.                      2 (0.1%)
+   Rockchip                            1 (0.1%)
+   Siemens                             1 (0.1%)
+   Canonical                           1 (0.1%)
+   Weidmüller Interface GmbH & Co. KG  1 (0.1%)
+   ==================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   Marvell                             241819 (53.4%)
+   Texas Instruments                   50334 (11.1%)
+   Konsulko Group                      44582 (9.8%)
+   (Unknown)                           39820 (8.8%)
+   Google, Inc.                        14090 (3.1%)
+   Linaro                              12952 (2.9%)
+   NXP                                 10413 (2.3%)
+   DENX Software Engineering           9722 (2.1%)
+   AMD                                 8190 (1.8%)
+   Amarula Solutions                   5089 (1.1%)
+   Ronetix                             4015 (0.9%)
+   BayLibre SAS                        3730 (0.8%)
+   Renesas Electronics                 1654 (0.4%)
+   ARM                                 1604 (0.4%)
+   Semihalf Embedded Systems           1569 (0.3%)
+   Bootlin                             838 (0.2%)
+   ST Microelectronics                 704 (0.2%)
+   Xilinx                              522 (0.1%)
+   Intel                               462 (0.1%)
+   Samsung                             448 (0.1%)
+   SUSE                                239 (0.1%)
+   Broadcom                            162 (0.0%)
+   Collabora Ltd.                      38 (0.0%)
+   Toradex                             29 (0.0%)
+   General Electric                    26 (0.0%)
+   Socionext Inc.                      9 (0.0%)
+   Weidmüller Interface GmbH & Co. KG  9 (0.0%)
+   Canonical                           8 (0.0%)
+   Rockchip                            1 (0.0%)
+   Siemens                             1 (0.0%)
+   ==================================  =====
+
+
+.. table:: Employers with the most signoffs (total 303)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   DENX Software Engineering         118 (38.9%)
+   NXP                               61 (20.1%)
+   (Unknown)                         31 (10.2%)
+   ARM                               22 (7.3%)
+   Xilinx                            20 (6.6%)
+   Texas Instruments                 18 (5.9%)
+   Marvell                           8 (2.6%)
+   CompuLab                          6 (2.0%)
+   Collabora Ltd.                    5 (1.7%)
+   Konsulko Group                    3 (1.0%)
+   BayLibre SAS                      3 (1.0%)
+   Semihalf Embedded Systems         2 (0.7%)
+   Intel                             2 (0.7%)
+   Toradex                           2 (0.7%)
+   Linaro                            1 (0.3%)
+   ST Microelectronics               1 (0.3%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 189)
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   (Unknown)                           84 (44.4%)
+   NXP                                 27 (14.3%)
+   Marvell                             10 (5.3%)
+   Texas Instruments                   9 (4.8%)
+   Linaro                              8 (4.2%)
+   DENX Software Engineering           7 (3.7%)
+   Xilinx                              6 (3.2%)
+   ARM                                 3 (1.6%)
+   Intel                               3 (1.6%)
+   Toradex                             3 (1.6%)
+   Renesas Electronics                 3 (1.6%)
+   SUSE                                3 (1.6%)
+   BayLibre SAS                        2 (1.1%)
+   Semihalf Embedded Systems           2 (1.1%)
+   ST Microelectronics                 2 (1.1%)
+   Samsung                             2 (1.1%)
+   Broadcom                            2 (1.1%)
+   Collabora Ltd.                      1 (0.5%)
+   Konsulko Group                      1 (0.5%)
+   Google, Inc.                        1 (0.5%)
+   AMD                                 1 (0.5%)
+   Amarula Solutions                   1 (0.5%)
+   Ronetix                             1 (0.5%)
+   Bootlin                             1 (0.5%)
+   General Electric                    1 (0.5%)
+   Socionext Inc.                      1 (0.5%)
+   Weidmüller Interface GmbH & Co. KG  1 (0.5%)
+   Canonical                           1 (0.5%)
+   Rockchip                            1 (0.5%)
+   Siemens                             1 (0.5%)
+   ==================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2021.10.rst b/doc/develop/statistics/u-boot-stats-v2021.10.rst
new file mode 100644
index 00000000000..63c8f8b6ddd
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2021.10.rst
@@ -0,0 +1,752 @@
+:orphan:
+
+Release Statistics for U-Boot v2021.10
+======================================
+
+* Processed 1509 changesets from 176 developers
+
+* 28 employers found
+
+* A total of 98664 lines added, 74614 removed (delta 24050)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Simon Glass                        191 (12.7%)
+   Tom Rini                           92 (6.1%)
+   Michal Simek                       91 (6.0%)
+   Pali Rohár                         80 (5.3%)
+   Patrick Delaunay                   70 (4.6%)
+   Tim Harvey                         54 (3.6%)
+   Heinrich Schuchardt                51 (3.4%)
+   Marek Vasut                        38 (2.5%)
+   Aswath Govindraju                  37 (2.5%)
+   Alexandru Gagniuc                  29 (1.9%)
+   Marek Behún                        26 (1.7%)
+   Bin Meng                           26 (1.7%)
+   Ye Li                              26 (1.7%)
+   Pratyush Yadav                     26 (1.7%)
+   Peng Fan                           25 (1.7%)
+   Tero Kristo                        22 (1.5%)
+   Stephan Gerhold                    21 (1.4%)
+   Andre Przywara                     20 (1.3%)
+   Tony Dinh                          19 (1.3%)
+   Ashok Reddy Soma                   18 (1.2%)
+   Mattijs Korpershoek                18 (1.2%)
+   Masami Hiramatsu                   18 (1.2%)
+   Zong Li                            16 (1.1%)
+   Siew Chin Lim                      15 (1.0%)
+   Gireesh Hiremath                   15 (1.0%)
+   Suman Anna                         13 (0.9%)
+   Sean Anderson                      12 (0.8%)
+   Kishon Vijay Abraham I             12 (0.8%)
+   Masahisa Kojima                    10 (0.7%)
+   Teresa Remmet                      10 (0.7%)
+   Takahiro Kuwano                    10 (0.7%)
+   T Karthik Reddy                    9 (0.6%)
+   Artem Lapkin                       9 (0.6%)
+   Alper Nebi Yasak                   9 (0.6%)
+   Trevor Woerner                     9 (0.6%)
+   Rasmus Villemoes                   8 (0.5%)
+   Kuldeep Singh                      8 (0.5%)
+   Fabio Estevam                      8 (0.5%)
+   Steffen Jaeckel                    8 (0.5%)
+   Vignesh Raghavendra                8 (0.5%)
+   Stephen Carlson                    8 (0.5%)
+   Dario Binacchi                     8 (0.5%)
+   Samuel Holland                     7 (0.5%)
+   Adam Ford                          7 (0.5%)
+   Kunihiko Hayashi                   7 (0.5%)
+   Vladimir Oltean                    7 (0.5%)
+   Dave Gerlach                       6 (0.4%)
+   Roland Gaudig                      6 (0.4%)
+   AKASHI Takahiro                    6 (0.4%)
+   Daniel Schwierzeck                 6 (0.4%)
+   Gowtham Tammana                    6 (0.4%)
+   Lokesh Vutla                       5 (0.3%)
+   Priyanka Jain                      5 (0.3%)
+   Wasim Khan                         5 (0.3%)
+   Chris Morgan                       5 (0.3%)
+   Johan Jonker                       5 (0.3%)
+   Eugen Hristev                      5 (0.3%)
+   Hai Pham                           5 (0.3%)
+   Joseph Chen                        5 (0.3%)
+   Grzegorz Szymaszek                 5 (0.3%)
+   Patrice Chotard                    4 (0.3%)
+   Ilias Apalodimas                   4 (0.3%)
+   Matthias Schiffer                  4 (0.3%)
+   Oleksandr Suvorov                  4 (0.3%)
+   Michael Walle                      4 (0.3%)
+   Matwey V. Kornilov                 4 (0.3%)
+   Paul Barker                        4 (0.3%)
+   Nandor Han                         4 (0.3%)
+   Yifeng Zhao                        4 (0.3%)
+   Frieder Schrempf                   4 (0.3%)
+   Andy Shevchenko                    3 (0.2%)
+   Tien Fong Chee                     3 (0.2%)
+   Sebastian Reichel                  3 (0.2%)
+   Camelia Groza                      3 (0.2%)
+   Peter Robinson                     3 (0.2%)
+   Xiaobo Tian                        3 (0.2%)
+   John Keeping                       3 (0.2%)
+   Reto Schneider                     3 (0.2%)
+   Joao Marcos Costa                  3 (0.2%)
+   Moses Christopher                  3 (0.2%)
+   Tianrui Wei                        3 (0.2%)
+   Jassi Brar                         3 (0.2%)
+   Zhengxun                           3 (0.2%)
+   Anand Moon                         3 (0.2%)
+   Ilko Iliev                         3 (0.2%)
+   Marek Szyprowski                   2 (0.1%)
+   Matthias Brugger                   2 (0.1%)
+   Mark Kettenis                      2 (0.1%)
+   Roger Quadros                      2 (0.1%)
+   Stefan Agner                       2 (0.1%)
+   Raju Kumar Pothuraju               2 (0.1%)
+   Oleh Kravchenko                    2 (0.1%)
+   Dimitri John Ledkov                2 (0.1%)
+   Guillaume La Roque                 2 (0.1%)
+   Ming Liu                           2 (0.1%)
+   Adarsh Babu Kalepalli              2 (0.1%)
+   Thomas Perrot                      2 (0.1%)
+   Jean-Jacques Hiblot                2 (0.1%)
+   Piyush Mehta                       2 (0.1%)
+   Chen Baozi                         2 (0.1%)
+   Peter Hoyes                        2 (0.1%)
+   Anders Dellien                     2 (0.1%)
+   Lukasz Majewski                    2 (0.1%)
+   Cosmin-Florin Aluchenesei          2 (0.1%)
+   Vincent Chen                       2 (0.1%)
+   Breno Lima                         2 (0.1%)
+   MengLi                             2 (0.1%)
+   Keerthy                            2 (0.1%)
+   Sheep Sun                          2 (0.1%)
+   Koji Matsuoka                      2 (0.1%)
+   Elaine Zhang                       2 (0.1%)
+   Tudor Ambarus                      2 (0.1%)
+   Nicolas Saenz Julienne             1 (0.1%)
+   Robert Marko                       1 (0.1%)
+   Denis Odintsov                     1 (0.1%)
+   Ruchika Gupta                      1 (0.1%)
+   Simon Guinot                       1 (0.1%)
+   Martyn Welch                       1 (0.1%)
+   Nishanth Menon                     1 (0.1%)
+   Jan Kiszka                         1 (0.1%)
+   Christophe Leroy                   1 (0.1%)
+   Ivan T. Ivanov                     1 (0.1%)
+   Yuan Fang                          1 (0.1%)
+   Marcel Ziswiler                    1 (0.1%)
+   Derald D. Woods                    1 (0.1%)
+   Yuezhang Mo                        1 (0.1%)
+   Sven Auhagen                       1 (0.1%)
+   Thomas Skibo                       1 (0.1%)
+   Sai Krishna Potthuri               1 (0.1%)
+   Ley Foon Tan                       1 (0.1%)
+   Horia Geantă                       1 (0.1%)
+   Kshitiz Varshney                   1 (0.1%)
+   Jon Lin                            1 (0.1%)
+   Johan Gunnarsson                   1 (0.1%)
+   Alex Bee                           1 (0.1%)
+   Christian Hewitt                   1 (0.1%)
+   Campbell Suter                     1 (0.1%)
+   Linus Walleij                      1 (0.1%)
+   Icenowy Zheng                      1 (0.1%)
+   Chris Packham                      1 (0.1%)
+   litchipi                           1 (0.1%)
+   Marc Kleine-Budde                  1 (0.1%)
+   Chan, Donald                       1 (0.1%)
+   Alan Douglas                       1 (0.1%)
+   Faiz Abbas                         1 (0.1%)
+   Manish Narani                      1 (0.1%)
+   Mike Looijmans                     1 (0.1%)
+   Ricardo Salveti                    1 (0.1%)
+   Chia-Wei Wang                      1 (0.1%)
+   Patrick Wildt                      1 (0.1%)
+   Etienne Carriere                   1 (0.1%)
+   Chen Guanqiao                      1 (0.1%)
+   Vitaly Wool                        1 (0.1%)
+   Alfonso Sánchez-Beato              1 (0.1%)
+   Max Yang                           1 (0.1%)
+   Joel Stanley                       1 (0.1%)
+   Sven Roederer                      1 (0.1%)
+   Yann Dirson                        1 (0.1%)
+   Stefano Babic                      1 (0.1%)
+   Cody Gray                          1 (0.1%)
+   Kacper Kubkowski                   1 (0.1%)
+   Christoph Niedermaier              1 (0.1%)
+   Jernej Skrabec                     1 (0.1%)
+   Yu-Tung Chang                      1 (0.1%)
+   Paul Kocialkowski                  1 (0.1%)
+   Sinan Akman                        1 (0.1%)
+   Green Wan                          1 (0.1%)
+   Radu Pirea (NXP OSS)               1 (0.1%)
+   Jaime Liao                         1 (0.1%)
+   Srinivas Neeli                     1 (0.1%)
+   Stefano Stabellini                 1 (0.1%)
+   Jorge Ramirez-Ortiz                1 (0.1%)
+   Daniil Stas                        1 (0.1%)
+   Michael Opdenacker                 1 (0.1%)
+   Kevin Scholz                       1 (0.1%)
+   Kai Stuhlemmer (ebee Engineering)  1 (0.1%)
+   =================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Tom Rini                           48665 (30.6%)
+   Simon Glass                        14052 (8.8%)
+   Peng Fan                           8037 (5.1%)
+   Marek Vasut                        6463 (4.1%)
+   Joseph Chen                        5161 (3.2%)
+   Tim Harvey                         4466 (2.8%)
+   Elaine Zhang                       4389 (2.8%)
+   Zong Li                            3994 (2.5%)
+   Patrick Delaunay                   3410 (2.1%)
+   Aswath Govindraju                  3202 (2.0%)
+   Michal Simek                       2657 (1.7%)
+   Tien Fong Chee                     2547 (1.6%)
+   Masami Hiramatsu                   2163 (1.4%)
+   Tero Kristo                        2122 (1.3%)
+   Siew Chin Lim                      1925 (1.2%)
+   Pratyush Yadav                     1906 (1.2%)
+   Ye Li                              1793 (1.1%)
+   Sean Anderson                      1790 (1.1%)
+   Yifeng Zhao                        1658 (1.0%)
+   Stephan Gerhold                    1643 (1.0%)
+   Peter Robinson                     1578 (1.0%)
+   Dave Gerlach                       1550 (1.0%)
+   Ashok Reddy Soma                   1456 (0.9%)
+   Pali Rohár                         1432 (0.9%)
+   Trevor Woerner                     1352 (0.8%)
+   Steffen Jaeckel                    1326 (0.8%)
+   Alexandru Gagniuc                  1220 (0.8%)
+   Adam Ford                          1187 (0.7%)
+   Jean-Jacques Hiblot                1174 (0.7%)
+   Roland Gaudig                      1120 (0.7%)
+   Tianrui Wei                        1029 (0.6%)
+   Jassi Brar                         938 (0.6%)
+   Nandor Han                         933 (0.6%)
+   Keerthy                            931 (0.6%)
+   Chris Morgan                       800 (0.5%)
+   Kunihiko Hayashi                   781 (0.5%)
+   Lokesh Vutla                       778 (0.5%)
+   Alan Douglas                       760 (0.5%)
+   Zhengxun                           754 (0.5%)
+   Paul Barker                        730 (0.5%)
+   Andre Przywara                     706 (0.4%)
+   Linus Walleij                      667 (0.4%)
+   Johan Jonker                       643 (0.4%)
+   Vignesh Raghavendra                642 (0.4%)
+   Hai Pham                           622 (0.4%)
+   Heinrich Schuchardt                599 (0.4%)
+   Tony Dinh                          584 (0.4%)
+   Marek Behún                        573 (0.4%)
+   Masahisa Kojima                    517 (0.3%)
+   Ilias Apalodimas                   482 (0.3%)
+   Dario Binacchi                     479 (0.3%)
+   Fabio Estevam                      457 (0.3%)
+   Kishon Vijay Abraham I             456 (0.3%)
+   Joao Marcos Costa                  452 (0.3%)
+   Teresa Remmet                      450 (0.3%)
+   T Karthik Reddy                    406 (0.3%)
+   Stephen Carlson                    398 (0.3%)
+   Radu Pirea (NXP OSS)               368 (0.2%)
+   Takahiro Kuwano                    358 (0.2%)
+   Samuel Holland                     339 (0.2%)
+   Sebastian Reichel                  314 (0.2%)
+   Gireesh Hiremath                   301 (0.2%)
+   Daniel Schwierzeck                 274 (0.2%)
+   Alper Nebi Yasak                   254 (0.2%)
+   Bin Meng                           226 (0.1%)
+   Kevin Scholz                       220 (0.1%)
+   Jorge Ramirez-Ortiz                218 (0.1%)
+   Suman Anna                         214 (0.1%)
+   Mattijs Korpershoek                206 (0.1%)
+   Kuldeep Singh                      187 (0.1%)
+   Vladimir Oltean                    135 (0.1%)
+   Ilko Iliev                         134 (0.1%)
+   Wasim Khan                         129 (0.1%)
+   Artem Lapkin                       121 (0.1%)
+   Michael Walle                      110 (0.1%)
+   Yu-Tung Chang                      106 (0.1%)
+   Guillaume La Roque                 81 (0.1%)
+   Moses Christopher                  76 (0.0%)
+   Vincent Chen                       75 (0.0%)
+   Sinan Akman                        73 (0.0%)
+   AKASHI Takahiro                    70 (0.0%)
+   Koji Matsuoka                      65 (0.0%)
+   Patrice Chotard                    62 (0.0%)
+   Matwey V. Kornilov                 60 (0.0%)
+   Rasmus Villemoes                   57 (0.0%)
+   Eugen Hristev                      57 (0.0%)
+   Roger Quadros                      55 (0.0%)
+   Gowtham Tammana                    48 (0.0%)
+   Jaime Liao                         46 (0.0%)
+   Etienne Carriere                   44 (0.0%)
+   Matthias Schiffer                  42 (0.0%)
+   Priyanka Jain                      41 (0.0%)
+   Derald D. Woods                    40 (0.0%)
+   Frieder Schrempf                   39 (0.0%)
+   Matthias Brugger                   37 (0.0%)
+   Breno Lima                         37 (0.0%)
+   Peter Hoyes                        36 (0.0%)
+   Andy Shevchenko                    35 (0.0%)
+   Jon Lin                            32 (0.0%)
+   Grzegorz Szymaszek                 30 (0.0%)
+   Manish Narani                      30 (0.0%)
+   Piyush Mehta                       28 (0.0%)
+   Kshitiz Varshney                   27 (0.0%)
+   Yann Dirson                        27 (0.0%)
+   Oleksandr Suvorov                  25 (0.0%)
+   Lukasz Majewski                    24 (0.0%)
+   Ruchika Gupta                      24 (0.0%)
+   Camelia Groza                      22 (0.0%)
+   Xiaobo Tian                        22 (0.0%)
+   Stefan Agner                       21 (0.0%)
+   Michael Opdenacker                 21 (0.0%)
+   Sai Krishna Potthuri               20 (0.0%)
+   Kai Stuhlemmer (ebee Engineering)  19 (0.0%)
+   Nishanth Menon                     18 (0.0%)
+   Marcel Ziswiler                    18 (0.0%)
+   Oleh Kravchenko                    17 (0.0%)
+   Reto Schneider                     16 (0.0%)
+   MengLi                             16 (0.0%)
+   Chris Packham                      16 (0.0%)
+   litchipi                           16 (0.0%)
+   Daniil Stas                        15 (0.0%)
+   Ming Liu                           13 (0.0%)
+   Marc Kleine-Budde                  13 (0.0%)
+   Paul Kocialkowski                  13 (0.0%)
+   John Keeping                       11 (0.0%)
+   Anand Moon                         9 (0.0%)
+   Tudor Ambarus                      9 (0.0%)
+   Alfonso Sánchez-Beato              9 (0.0%)
+   Marek Szyprowski                   8 (0.0%)
+   Raju Kumar Pothuraju               8 (0.0%)
+   Chen Baozi                         8 (0.0%)
+   Mark Kettenis                      6 (0.0%)
+   Dimitri John Ledkov                6 (0.0%)
+   Sheep Sun                          6 (0.0%)
+   Denis Odintsov                     6 (0.0%)
+   Ivan T. Ivanov                     6 (0.0%)
+   Mike Looijmans                     6 (0.0%)
+   Vitaly Wool                        6 (0.0%)
+   Cosmin-Florin Aluchenesei          5 (0.0%)
+   Kacper Kubkowski                   5 (0.0%)
+   Adarsh Babu Kalepalli              4 (0.0%)
+   Sven Auhagen                       4 (0.0%)
+   Ley Foon Tan                       4 (0.0%)
+   Chia-Wei Wang                      4 (0.0%)
+   Cody Gray                          4 (0.0%)
+   Thomas Perrot                      3 (0.0%)
+   Anders Dellien                     3 (0.0%)
+   Martyn Welch                       3 (0.0%)
+   Alex Bee                           3 (0.0%)
+   Faiz Abbas                         3 (0.0%)
+   Chen Guanqiao                      3 (0.0%)
+   Jernej Skrabec                     3 (0.0%)
+   Green Wan                          3 (0.0%)
+   Robert Marko                       2 (0.0%)
+   Jan Kiszka                         2 (0.0%)
+   Yuezhang Mo                        2 (0.0%)
+   Christian Hewitt                   2 (0.0%)
+   Icenowy Zheng                      2 (0.0%)
+   Patrick Wildt                      2 (0.0%)
+   Max Yang                           2 (0.0%)
+   Joel Stanley                       2 (0.0%)
+   Sven Roederer                      2 (0.0%)
+   Stefano Babic                      2 (0.0%)
+   Christoph Niedermaier              2 (0.0%)
+   Stefano Stabellini                 2 (0.0%)
+   Nicolas Saenz Julienne             1 (0.0%)
+   Simon Guinot                       1 (0.0%)
+   Christophe Leroy                   1 (0.0%)
+   Yuan Fang                          1 (0.0%)
+   Thomas Skibo                       1 (0.0%)
+   Horia Geantă                       1 (0.0%)
+   Johan Gunnarsson                   1 (0.0%)
+   Campbell Suter                     1 (0.0%)
+   Chan, Donald                       1 (0.0%)
+   Ricardo Salveti                    1 (0.0%)
+   Srinivas Neeli                     1 (0.0%)
+   =================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Tom Rini                           46519 (62.3%)
+   Simon Glass                        1414 (1.9%)
+   Linus Walleij                      667 (0.9%)
+   Patrick Delaunay                   331 (0.4%)
+   Ilias Apalodimas                   293 (0.4%)
+   Sean Anderson                      274 (0.4%)
+   Ilko Iliev                         124 (0.2%)
+   Stephen Carlson                    56 (0.1%)
+   Suman Anna                         40 (0.1%)
+   Derald D. Woods                    34 (0.0%)
+   Xiaobo Tian                        20 (0.0%)
+   Michael Walle                      15 (0.0%)
+   Oleksandr Suvorov                  11 (0.0%)
+   Lukasz Majewski                    5 (0.0%)
+   Bin Meng                           2 (0.0%)
+   Anand Moon                         2 (0.0%)
+   Jan Kiszka                         2 (0.0%)
+   Kai Stuhlemmer (ebee Engineering)  1 (0.0%)
+   Ivan T. Ivanov                     1 (0.0%)
+   Anders Dellien                     1 (0.0%)
+   Yuezhang Mo                        1 (0.0%)
+   =================================  =====
+
+
+.. table:: Developers with the most signoffs (total 326)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Lokesh Vutla                      108 (33.1%)
+   Michal Simek                      37 (11.3%)
+   Neil Armstrong                    28 (8.6%)
+   Tom Rini                          13 (4.0%)
+   Peng Fan                          12 (3.7%)
+   Kishon Vijay Abraham I            10 (3.1%)
+   Andre Przywara                    10 (3.1%)
+   Alexandru Gagniuc                 8 (2.5%)
+   Marek Vasut                       7 (2.1%)
+   Heinrich Schuchardt               6 (1.8%)
+   Tero Kristo                       6 (1.8%)
+   Jon Lin                           5 (1.5%)
+   Guillaume La Roque                5 (1.5%)
+   Ashok Reddy Soma                  5 (1.5%)
+   Oleksandr Suvorov                 4 (1.2%)
+   Markus Niebel                     4 (1.2%)
+   Matthias Brugger                  4 (1.2%)
+   Vignesh Raghavendra               4 (1.2%)
+   Minkyu Kang                       3 (0.9%)
+   Dave Gerlach                      3 (0.9%)
+   Masami Hiramatsu                  3 (0.9%)
+   Aswath Govindraju                 3 (0.9%)
+   David Abdurachmanov               2 (0.6%)
+   Jagan Teki                        2 (0.6%)
+   Jonathan Balkind                  2 (0.6%)
+   Roger Quadros                     2 (0.6%)
+   Mattijs Korpershoek               2 (0.6%)
+   T Karthik Reddy                   2 (0.6%)
+   Hai Pham                          2 (0.6%)
+   Jean-Jacques Hiblot               2 (0.6%)
+   Ye Li                             2 (0.6%)
+   Siew Chin Lim                     2 (0.6%)
+   Patrick Delaunay                  1 (0.3%)
+   Suman Anna                        1 (0.3%)
+   Jan Kiszka                        1 (0.3%)
+   Tom Warren                        1 (0.3%)
+   Kever Yang                        1 (0.3%)
+   Timothée Cercueil                 1 (0.3%)
+   Murali Karicheri                  1 (0.3%)
+   Robert Jones                      1 (0.3%)
+   Paul Walmsley                     1 (0.3%)
+   Alessandro Temil                  1 (0.3%)
+   Praneeth Bajjuri                  1 (0.3%)
+   Priyanka Jain                     1 (0.3%)
+   Nishanth Menon                    1 (0.3%)
+   Tudor Ambarus                     1 (0.3%)
+   Patrice Chotard                   1 (0.3%)
+   Marek Behún                       1 (0.3%)
+   Pratyush Yadav                    1 (0.3%)
+   Tien Fong Chee                    1 (0.3%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 832)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      124 (14.9%)
+   Simon Glass                       120 (14.4%)
+   Patrice Chotard                   52 (6.2%)
+   Jagan Teki                        50 (6.0%)
+   Marek Behún                       45 (5.4%)
+   Jaehoon Chung                     42 (5.0%)
+   Ramon Fried                       38 (4.6%)
+   Kever Yang                        36 (4.3%)
+   Chris Packham                     31 (3.7%)
+   Bin Meng                          30 (3.6%)
+   Priyanka Jain                     28 (3.4%)
+   Leo Yu-Chi Liang                  28 (3.4%)
+   Heinrich Schuchardt               21 (2.5%)
+   Heiko Schocher                    20 (2.4%)
+   Patrick Delaunay                  13 (1.6%)
+   Pali Rohár                        13 (1.6%)
+   Sean Anderson                     11 (1.3%)
+   Miquel Raynal                     11 (1.3%)
+   Alexandru Gagniuc                 9 (1.1%)
+   Linus Walleij                     9 (1.1%)
+   Fabio Estevam                     9 (1.1%)
+   Pratyush Yadav                    8 (1.0%)
+   Tom Rini                          7 (0.8%)
+   Andre Przywara                    7 (0.8%)
+   Walter Lozano                     7 (0.8%)
+   Rick Chen                         6 (0.7%)
+   Patrick Wildt                     5 (0.6%)
+   Neil Armstrong                    4 (0.5%)
+   Ashok Reddy Soma                  4 (0.5%)
+   Nishanth Menon                    4 (0.5%)
+   Ilias Apalodimas                  4 (0.5%)
+   Konstantin Porotchkin             4 (0.5%)
+   Ye Li                             3 (0.4%)
+   Suman Anna                        3 (0.4%)
+   Igor Opaniuk                      3 (0.4%)
+   Nicolas Saenz Julienne            2 (0.2%)
+   Jernej Skrabec                    2 (0.2%)
+   Mark Kettenis                     2 (0.2%)
+   Marcel Ziswiler                   2 (0.2%)
+   Peng Fan                          1 (0.1%)
+   Masami Hiramatsu                  1 (0.1%)
+   Andy Wu                           1 (0.1%)
+   Asherah Connor                    1 (0.1%)
+   Qu Wenruo                         1 (0.1%)
+   Biju Bas                          1 (0.1%)
+   Heiko Stuebner                    1 (0.1%)
+   Jens Wiklander                    1 (0.1%)
+   Horatiu Vultur                    1 (0.1%)
+   Ley Foon Tan                      1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Sebastian Reichel                 1 (0.1%)
+   Joao Marcos Costa                 1 (0.1%)
+   Paul Barker                       1 (0.1%)
+   Steffen Jaeckel                   1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 67)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Chris Packham                     26 (38.8%)
+   Patrice Chotard                   14 (20.9%)
+   Simon Glass                       10 (14.9%)
+   Patrick Wildt                     3 (4.5%)
+   Michal Simek                      2 (3.0%)
+   Jaehoon Chung                     1 (1.5%)
+   Pali Rohár                        1 (1.5%)
+   Tom Rini                          1 (1.5%)
+   Andre Przywara                    1 (1.5%)
+   Suman Anna                        1 (1.5%)
+   Igor Opaniuk                      1 (1.5%)
+   Masami Hiramatsu                  1 (1.5%)
+   Tudor Ambarus                     1 (1.5%)
+   Derald D. Woods                   1 (1.5%)
+   Sughosh Ganu                      1 (1.5%)
+   Stefan Agner                      1 (1.5%)
+   Keerthy                           1 (1.5%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 67)
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Pali Rohár                         24 (35.8%)
+   Marek Behún                        13 (19.4%)
+   Bin Meng                           7 (10.4%)
+   Stephan Gerhold                    4 (6.0%)
+   Ye Li                              3 (4.5%)
+   Joao Marcos Costa                  3 (4.5%)
+   Ashok Reddy Soma                   2 (3.0%)
+   Ilias Apalodimas                   2 (3.0%)
+   Alexandru Gagniuc                  1 (1.5%)
+   Jernej Skrabec                     1 (1.5%)
+   Dave Gerlach                       1 (1.5%)
+   Aswath Govindraju                  1 (1.5%)
+   Kai Stuhlemmer (ebee Engineering)  1 (1.5%)
+   Kevin Scholz                       1 (1.5%)
+   Marek Szyprowski                   1 (1.5%)
+   Ming Liu                           1 (1.5%)
+   Adam Ford                          1 (1.5%)
+   =================================  =====
+
+
+.. table:: Developers with the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          3 (30.0%)
+   Marek Behún                       1 (10.0%)
+   Keerthy                           1 (10.0%)
+   Walter Lozano                     1 (10.0%)
+   Minkyu Kang                       1 (10.0%)
+   Jan Kiszka                        1 (10.0%)
+   Andreas Schwab                    1 (10.0%)
+   Fu Wei                            1 (10.0%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 10)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       4 (40.0%)
+   Tom Rini                          3 (30.0%)
+   Dave Gerlach                      1 (10.0%)
+   Dimitri John Ledkov               1 (10.0%)
+   Tianrui Wei                       1 (10.0%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   (Unknown)                           577 (38.2%)
+   Google, Inc.                        191 (12.7%)
+   Texas Instruments                   141 (9.3%)
+   Konsulko Group                      93 (6.2%)
+   AMD                                 91 (6.0%)
+   NXP                                 86 (5.7%)
+   ST Microelectronics                 74 (4.9%)
+   Linaro                              44 (2.9%)
+   DENX Software Engineering           43 (2.8%)
+   Xilinx                              35 (2.3%)
+   ARM                                 24 (1.6%)
+   Intel                               21 (1.4%)
+   BayLibre SAS                        20 (1.3%)
+   Rockchip                            12 (0.8%)
+   Phytec                              10 (0.7%)
+   Renesas Electronics                 7 (0.5%)
+   Socionext Inc.                      7 (0.5%)
+   Toradex                             6 (0.4%)
+   Weidmüller Interface GmbH & Co. KG  6 (0.4%)
+   Bootlin                             4 (0.3%)
+   Collabora Ltd.                      4 (0.3%)
+   Ronetix                             3 (0.2%)
+   SUSE                                3 (0.2%)
+   Wind River                          2 (0.1%)
+   Samsung                             2 (0.1%)
+   Sony                                1 (0.1%)
+   Pengutronix                         1 (0.1%)
+   Siemens                             1 (0.1%)
+   ==================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   Konsulko Group                      48671 (30.6%)
+   (Unknown)                           32467 (20.4%)
+   Google, Inc.                        14052 (8.8%)
+   Texas Instruments                   13223 (8.3%)
+   Rockchip                            11240 (7.1%)
+   NXP                                 10782 (6.8%)
+   DENX Software Engineering           6493 (4.1%)
+   Linaro                              4905 (3.1%)
+   Intel                               4507 (2.8%)
+   ST Microelectronics                 3472 (2.2%)
+   AMD                                 2657 (1.7%)
+   Xilinx                              1951 (1.2%)
+   Weidmüller Interface GmbH & Co. KG  1120 (0.7%)
+   Socionext Inc.                      781 (0.5%)
+   ARM                                 745 (0.5%)
+   Renesas Electronics                 687 (0.4%)
+   Phytec                              450 (0.3%)
+   Collabora Ltd.                      317 (0.2%)
+   BayLibre SAS                        287 (0.2%)
+   Ronetix                             134 (0.1%)
+   Toradex                             69 (0.0%)
+   SUSE                                43 (0.0%)
+   Bootlin                             37 (0.0%)
+   Wind River                          16 (0.0%)
+   Pengutronix                         13 (0.0%)
+   Samsung                             8 (0.0%)
+   Sony                                2 (0.0%)
+   Siemens                             2 (0.0%)
+   ==================================  =====
+
+
+.. table:: Employers with the most signoffs (total 326)
+   :widths: auto
+
+   =================================  =====
+   Name                               Count
+   =================================  =====
+   Texas Instruments                  138 (42.3%)
+   Xilinx                             44 (13.5%)
+   (Unknown)                          39 (12.0%)
+   BayLibre SAS                       35 (10.7%)
+   NXP                                15 (4.6%)
+   Konsulko Group                     13 (4.0%)
+   ARM                                10 (3.1%)
+   Rockchip                           6 (1.8%)
+   Toradex                            4 (1.2%)
+   SUSE                               4 (1.2%)
+   Linaro                             3 (0.9%)
+   Intel                              3 (0.9%)
+   ST Microelectronics                3 (0.9%)
+   Samsung                            3 (0.9%)
+   Renesas Electronics                2 (0.6%)
+   Amarula Solutions                  2 (0.6%)
+   Siemens                            1 (0.3%)
+   NVidia                             1 (0.3%)
+   =================================  =====
+
+
+.. table:: Employers with the most hackers (total 181)
+   :widths: auto
+
+   ==================================  =====
+   Name                                Count
+   ==================================  =====
+   (Unknown)                           94 (51.9%)
+   Texas Instruments                   15 (8.3%)
+   NXP                                 12 (6.6%)
+   Xilinx                              8 (4.4%)
+   Linaro                              8 (4.4%)
+   Rockchip                            4 (2.2%)
+   Toradex                             4 (2.2%)
+   DENX Software Engineering           4 (2.2%)
+   ARM                                 3 (1.7%)
+   Intel                               3 (1.7%)
+   Bootlin                             3 (1.7%)
+   BayLibre SAS                        2 (1.1%)
+   Konsulko Group                      2 (1.1%)
+   SUSE                                2 (1.1%)
+   ST Microelectronics                 2 (1.1%)
+   Renesas Electronics                 2 (1.1%)
+   Collabora Ltd.                      2 (1.1%)
+   Samsung                             1 (0.6%)
+   Siemens                             1 (0.6%)
+   Google, Inc.                        1 (0.6%)
+   AMD                                 1 (0.6%)
+   Weidmüller Interface GmbH & Co. KG  1 (0.6%)
+   Socionext Inc.                      1 (0.6%)
+   Phytec                              1 (0.6%)
+   Ronetix                             1 (0.6%)
+   Wind River                          1 (0.6%)
+   Pengutronix                         1 (0.6%)
+   Sony                                1 (0.6%)
+   ==================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2022.01.rst b/doc/develop/statistics/u-boot-stats-v2022.01.rst
new file mode 100644
index 00000000000..7b60c24a757
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2022.01.rst
@@ -0,0 +1,757 @@
+:orphan:
+
+Release Statistics for U-Boot v2022.01
+======================================
+
+* Processed 1417 changesets from 164 developers
+
+* 29 employers found
+
+* A total of 69397 lines added, 45876 removed (delta 23521)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          179 (12.6%)
+   Simon Glass                       141 (10.0%)
+   Pali Rohár                        124 (8.8%)
+   Marek Behún                       78 (5.5%)
+   Heinrich Schuchardt               67 (4.7%)
+   Marek Vasut                       56 (4.0%)
+   Vladimir Oltean                   53 (3.7%)
+   Samuel Holland                    53 (3.7%)
+   Michael Walle                     45 (3.2%)
+   Patrick Delaunay                  38 (2.7%)
+   Adam Ford                         19 (1.3%)
+   Bin Meng                          17 (1.2%)
+   Ilias Apalodimas                  17 (1.2%)
+   Tim Harvey                        16 (1.1%)
+   Marcel Ziswiler                   16 (1.1%)
+   Michal Simek                      15 (1.1%)
+   Masahisa Kojima                   14 (1.0%)
+   Fabio Estevam                     13 (0.9%)
+   Neil Armstrong                    13 (0.9%)
+   Mark Kettenis                     12 (0.8%)
+   Ye Li                             12 (0.8%)
+   Rasmus Villemoes                  12 (0.8%)
+   Patrice Chotard                   11 (0.8%)
+   Jan Kiszka                        10 (0.7%)
+   Mathew McBride                    10 (0.7%)
+   Dzmitry Sankouski                 10 (0.7%)
+   Teresa Remmet                     10 (0.7%)
+   Andy Shevchenko                   9 (0.6%)
+   Ricardo Salveti                   9 (0.6%)
+   Thierry Reding                    9 (0.6%)
+   Stephan Gerhold                   9 (0.6%)
+   Sean Anderson                     8 (0.6%)
+   Matthias Schiffer                 8 (0.6%)
+   Oleksandr Suvorov                 8 (0.6%)
+   Eugen Hristev                     8 (0.6%)
+   Peter Robinson                    7 (0.5%)
+   Peng Fan                          7 (0.5%)
+   AKASHI Takahiro                   7 (0.5%)
+   Masami Hiramatsu                  7 (0.5%)
+   Clément Léger                     7 (0.5%)
+   Chia-Wei Wang                     7 (0.5%)
+   Stefan Roese                      6 (0.4%)
+   Alexandru Gagniuc                 6 (0.4%)
+   Kuldeep Singh                     6 (0.4%)
+   Peter Hoyes                       6 (0.4%)
+   Chris Morgan                      5 (0.4%)
+   Padmarao Begari                   5 (0.4%)
+   Pierre-Clément Tosi               5 (0.4%)
+   Alistair Delva                    5 (0.4%)
+   Vyacheslav Bocharov               5 (0.4%)
+   Christian Hewitt                  5 (0.4%)
+   Andre Przywara                    4 (0.3%)
+   Leo Yu-Chi Liang                  4 (0.3%)
+   Ruchika Gupta                     4 (0.3%)
+   Thomas Huth                       4 (0.3%)
+   Priyanka Singh                    4 (0.3%)
+   Ashok Reddy Soma                  4 (0.3%)
+   Wolfgang Denk                     4 (0.3%)
+   Claudiu Beznea                    4 (0.3%)
+   Quentin Schulz                    3 (0.2%)
+   Kever Yang                        3 (0.2%)
+   Jagan Teki                        3 (0.2%)
+   Nico Cheng                        3 (0.2%)
+   Tien Fong Chee                    3 (0.2%)
+   Frieder Schrempf                  3 (0.2%)
+   Jorge Ramirez-Ortiz               3 (0.2%)
+   T Karthik Reddy                   3 (0.2%)
+   Max Krummenacher                  3 (0.2%)
+   Heiko Schocher                    3 (0.2%)
+   Dan Sneddon                       3 (0.2%)
+   Dario Binacchi                    3 (0.2%)
+   Arnaud Ferraris                   3 (0.2%)
+   Anatolij Gustschin                3 (0.2%)
+   Bharat Gooty                      3 (0.2%)
+   Gary Bisson                       2 (0.1%)
+   Heiko Thiery                      2 (0.1%)
+   Giulio Benetti                    2 (0.1%)
+   Ying-Chun Liu (PaulLiu)           2 (0.1%)
+   Yifeng Zhao                       2 (0.1%)
+   Icenowy Zheng                     2 (0.1%)
+   Thomas Skibo                      2 (0.1%)
+   Minkyu Kang                       2 (0.1%)
+   Zhaofeng Li                       2 (0.1%)
+   Stefan Agner                      2 (0.1%)
+   Usama Arif                        2 (0.1%)
+   Stephen Carlson                   2 (0.1%)
+   Philippe Reynes                   2 (0.1%)
+   Kris Chaplin                      2 (0.1%)
+   Stefano Babic                     2 (0.1%)
+   Philippe Schenker                 2 (0.1%)
+   Francesco Dolcini                 2 (0.1%)
+   Jon Lin                           2 (0.1%)
+   Johan Jonker                      2 (0.1%)
+   Haolin Li                         2 (0.1%)
+   Robert Marko                      2 (0.1%)
+   Andrej Rosano                     2 (0.1%)
+   Kristian Amlie                    2 (0.1%)
+   Paul Barker                       2 (0.1%)
+   Mihai Sain                        2 (0.1%)
+   Patrick Wildt                     1 (0.1%)
+   Pierre Bourdon                    1 (0.1%)
+   Yi Liu                            1 (0.1%)
+   Sjoerd Simons                     1 (0.1%)
+   John Keeping                      1 (0.1%)
+   Jaehoon Chung                     1 (0.1%)
+   Joakim Tjernlund                  1 (0.1%)
+   Ram Narayanan                     1 (0.1%)
+   Alexander Dahl                    1 (0.1%)
+   Ramon Fried                       1 (0.1%)
+   Mike Karels                       1 (0.1%)
+   Ivan Mikhaylov                    1 (0.1%)
+   Vincent Stehlé                    1 (0.1%)
+   schspa                            1 (0.1%)
+   Angelo Dureghello                 1 (0.1%)
+   Samuel Dionne-Riel                1 (0.1%)
+   Clemens Gruber                    1 (0.1%)
+   Marcin Niestroj                   1 (0.1%)
+   Artem Lapkin                      1 (0.1%)
+   William Grant                     1 (0.1%)
+   Hou Zhiqiang                      1 (0.1%)
+   Rajesh Bhagat                     1 (0.1%)
+   Maninder Singh                    1 (0.1%)
+   Cosmin-Florin Aluchenesei         1 (0.1%)
+   Wasim Khan                        1 (0.1%)
+   Kshitiz Varshney                  1 (0.1%)
+   Alban Bedel                       1 (0.1%)
+   Meenakshi Aggarwal                1 (0.1%)
+   Wei Fu                            1 (0.1%)
+   Chunfeng Yun                      1 (0.1%)
+   Hannu Lounento                    1 (0.1%)
+   Kirill Kapranov                   1 (0.1%)
+   Balamanikandan Gunasundar         1 (0.1%)
+   Takahiro Kuwano                   1 (0.1%)
+   Yanhong Wang                      1 (0.1%)
+   Ariel D'Alessandro                1 (0.1%)
+   Andrey Zhizhikin                  1 (0.1%)
+   Liam Beguin                       1 (0.1%)
+   Sven Auhagen                      1 (0.1%)
+   Denys Drozdov                     1 (0.1%)
+   Igor Opaniuk                      1 (0.1%)
+   Nick Hu                           1 (0.1%)
+   Amjad Ouled-Ameur                 1 (0.1%)
+   Hannes Schmelzer                  1 (0.1%)
+   Elaine Zhang                      1 (0.1%)
+   Holger Brunck                     1 (0.1%)
+   Vagrant Cascadian                 1 (0.1%)
+   Mark Tomlinson                    1 (0.1%)
+   Zhengxun Li                       1 (0.1%)
+   Chukun Pan                        1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Michael Scott                     1 (0.1%)
+   Nishanth Menon                    1 (0.1%)
+   Amit Kumar Mahapatra              1 (0.1%)
+   Denis Odintsov                    1 (0.1%)
+   Simon Guinot                      1 (0.1%)
+   Martyn Welch                      1 (0.1%)
+   Guillaume La Roque                1 (0.1%)
+   Reto Schneider                    1 (0.1%)
+   Hari Prasath                      1 (0.1%)
+   Thibault Ferrante                 1 (0.1%)
+   Jernej Skrabec                    1 (0.1%)
+   Andreas Schwab                    1 (0.1%)
+   Callum Sinclair                   1 (0.1%)
+   Thomas Hebb                       1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          29502 (31.2%)
+   Simon Glass                       7761 (8.2%)
+   Frieder Schrempf                  5561 (5.9%)
+   Michal Simek                      3516 (3.7%)
+   Pali Rohár                        3024 (3.2%)
+   Masahisa Kojima                   2724 (2.9%)
+   Dzmitry Sankouski                 2655 (2.8%)
+   Neil Armstrong                    2449 (2.6%)
+   Michael Walle                     2312 (2.4%)
+   Jan Kiszka                        2125 (2.2%)
+   Samuel Holland                    2042 (2.2%)
+   Mark Kettenis                     1835 (1.9%)
+   Ilias Apalodimas                  1532 (1.6%)
+   Padmarao Begari                   1439 (1.5%)
+   Patrick Delaunay                  1396 (1.5%)
+   Heinrich Schuchardt               1231 (1.3%)
+   Vyacheslav Bocharov               1226 (1.3%)
+   Marek Behún                       1210 (1.3%)
+   Marcel Ziswiler                   1183 (1.2%)
+   Adam Ford                         1108 (1.2%)
+   Wolfgang Denk                     1107 (1.2%)
+   Kristian Amlie                    1075 (1.1%)
+   Anatolij Gustschin                941 (1.0%)
+   Jagan Teki                        817 (0.9%)
+   Marek Vasut                       730 (0.8%)
+   Thierry Reding                    712 (0.8%)
+   Chia-Wei Wang                     635 (0.7%)
+   Eugen Hristev                     616 (0.7%)
+   Zhengxun Li                       610 (0.6%)
+   Stefan Roese                      598 (0.6%)
+   Christian Hewitt                  565 (0.6%)
+   Fabio Estevam                     548 (0.6%)
+   Ruchika Gupta                     516 (0.5%)
+   Tim Harvey                        420 (0.4%)
+   AKASHI Takahiro                   414 (0.4%)
+   Peter Hoyes                       409 (0.4%)
+   Rasmus Villemoes                  368 (0.4%)
+   Stephan Gerhold                   368 (0.4%)
+   Vladimir Oltean                   329 (0.3%)
+   Alexandru Gagniuc                 319 (0.3%)
+   Max Krummenacher                  317 (0.3%)
+   Rajesh Bhagat                     264 (0.3%)
+   Tien Fong Chee                    260 (0.3%)
+   Thomas Huth                       257 (0.3%)
+   Teresa Remmet                     240 (0.3%)
+   Dan Sneddon                       238 (0.3%)
+   Patrice Chotard                   229 (0.2%)
+   Peng Fan                          228 (0.2%)
+   Chukun Pan                        215 (0.2%)
+   Bin Meng                          174 (0.2%)
+   Andy Shevchenko                   173 (0.2%)
+   Mathew McBride                    165 (0.2%)
+   Claudiu Beznea                    160 (0.2%)
+   Yi Liu                            158 (0.2%)
+   Hannes Schmelzer                  158 (0.2%)
+   Dario Binacchi                    151 (0.2%)
+   Mihai Sain                        149 (0.2%)
+   Andrey Zhizhikin                  146 (0.2%)
+   Heiko Thiery                      141 (0.1%)
+   Sean Anderson                     140 (0.1%)
+   Guillaume La Roque                134 (0.1%)
+   Ye Li                             130 (0.1%)
+   Balamanikandan Gunasundar         124 (0.1%)
+   Chris Morgan                      115 (0.1%)
+   Andre Przywara                    103 (0.1%)
+   Kuldeep Singh                     102 (0.1%)
+   Cosmin-Florin Aluchenesei         97 (0.1%)
+   Ricardo Salveti                   90 (0.1%)
+   Bharat Gooty                      90 (0.1%)
+   Jon Lin                           78 (0.1%)
+   Matthias Schiffer                 75 (0.1%)
+   Ashok Reddy Soma                  75 (0.1%)
+   Jorge Ramirez-Ortiz               74 (0.1%)
+   Nico Cheng                        73 (0.1%)
+   Quentin Schulz                    72 (0.1%)
+   Heiko Schocher                    72 (0.1%)
+   Peter Robinson                    69 (0.1%)
+   Masami Hiramatsu                  68 (0.1%)
+   Thomas Skibo                      65 (0.1%)
+   Leo Yu-Chi Liang                  57 (0.1%)
+   Callum Sinclair                   56 (0.1%)
+   Mark Tomlinson                    52 (0.1%)
+   Oleksandr Suvorov                 49 (0.1%)
+   Clément Léger                     46 (0.0%)
+   Francesco Dolcini                 43 (0.0%)
+   Robert Marko                      40 (0.0%)
+   T Karthik Reddy                   38 (0.0%)
+   Ying-Chun Liu (PaulLiu)           38 (0.0%)
+   Zhaofeng Li                       38 (0.0%)
+   Stephen Carlson                   38 (0.0%)
+   Paul Barker                       30 (0.0%)
+   Priyanka Singh                    29 (0.0%)
+   Kshitiz Varshney                  29 (0.0%)
+   Arnaud Ferraris                   27 (0.0%)
+   Nishanth Menon                    27 (0.0%)
+   Alistair Delva                    24 (0.0%)
+   Kever Yang                        23 (0.0%)
+   Usama Arif                        21 (0.0%)
+   Takahiro Kuwano                   20 (0.0%)
+   Patrick Wildt                     19 (0.0%)
+   Pierre-Clément Tosi               16 (0.0%)
+   Hou Zhiqiang                      16 (0.0%)
+   Gary Bisson                       14 (0.0%)
+   Reto Schneider                    14 (0.0%)
+   Minkyu Kang                       13 (0.0%)
+   Philippe Schenker                 12 (0.0%)
+   Chris Packham                     12 (0.0%)
+   Thibault Ferrante                 12 (0.0%)
+   Johan Jonker                      10 (0.0%)
+   Haolin Li                         10 (0.0%)
+   Elaine Zhang                      10 (0.0%)
+   Michael Scott                     10 (0.0%)
+   Nick Hu                           9 (0.0%)
+   Philippe Reynes                   8 (0.0%)
+   Joakim Tjernlund                  8 (0.0%)
+   Maninder Singh                    8 (0.0%)
+   Wasim Khan                        8 (0.0%)
+   Yifeng Zhao                       7 (0.0%)
+   schspa                            7 (0.0%)
+   Ariel D'Alessandro                7 (0.0%)
+   Stefano Babic                     6 (0.0%)
+   Holger Brunck                     6 (0.0%)
+   Denis Odintsov                    6 (0.0%)
+   Thomas Hebb                       6 (0.0%)
+   Stefan Agner                      5 (0.0%)
+   Kris Chaplin                      5 (0.0%)
+   Jaehoon Chung                     5 (0.0%)
+   Ram Narayanan                     5 (0.0%)
+   Yanhong Wang                      5 (0.0%)
+   Giulio Benetti                    4 (0.0%)
+   Icenowy Zheng                     4 (0.0%)
+   Wei Fu                            4 (0.0%)
+   Denys Drozdov                     4 (0.0%)
+   Amit Kumar Mahapatra              4 (0.0%)
+   Pierre Bourdon                    3 (0.0%)
+   Sven Auhagen                      3 (0.0%)
+   Martyn Welch                      3 (0.0%)
+   Hari Prasath                      3 (0.0%)
+   Andrej Rosano                     2 (0.0%)
+   Sjoerd Simons                     2 (0.0%)
+   Mike Karels                       2 (0.0%)
+   Angelo Dureghello                 2 (0.0%)
+   Marcin Niestroj                   2 (0.0%)
+   Artem Lapkin                      2 (0.0%)
+   William Grant                     2 (0.0%)
+   Alban Bedel                       2 (0.0%)
+   Meenakshi Aggarwal                2 (0.0%)
+   Hannu Lounento                    2 (0.0%)
+   Kirill Kapranov                   2 (0.0%)
+   Igor Opaniuk                      2 (0.0%)
+   Andreas Schwab                    2 (0.0%)
+   John Keeping                      1 (0.0%)
+   Alexander Dahl                    1 (0.0%)
+   Ramon Fried                       1 (0.0%)
+   Ivan Mikhaylov                    1 (0.0%)
+   Vincent Stehlé                    1 (0.0%)
+   Samuel Dionne-Riel                1 (0.0%)
+   Clemens Gruber                    1 (0.0%)
+   Chunfeng Yun                      1 (0.0%)
+   Liam Beguin                       1 (0.0%)
+   Amjad Ouled-Ameur                 1 (0.0%)
+   Vagrant Cascadian                 1 (0.0%)
+   Simon Guinot                      1 (0.0%)
+   Jernej Skrabec                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          11969 (26.1%)
+   Anatolij Gustschin                917 (2.0%)
+   Patrick Delaunay                  813 (1.8%)
+   Eugen Hristev                     526 (1.1%)
+   Marcel Ziswiler                   395 (0.9%)
+   Thomas Huth                       256 (0.6%)
+   Wolfgang Denk                     238 (0.5%)
+   Marek Behún                       151 (0.3%)
+   Andrey Zhizhikin                  146 (0.3%)
+   Adam Ford                         142 (0.3%)
+   Rajesh Bhagat                     129 (0.3%)
+   Guillaume La Roque                81 (0.2%)
+   Mathew McBride                    44 (0.1%)
+   Tim Harvey                        33 (0.1%)
+   Mark Tomlinson                    32 (0.1%)
+   AKASHI Takahiro                   29 (0.1%)
+   Robert Marko                      24 (0.1%)
+   Kshitiz Varshney                  16 (0.0%)
+   Chris Packham                     12 (0.0%)
+   Pierre-Clément Tosi               5 (0.0%)
+   Quentin Schulz                    3 (0.0%)
+   Nishanth Menon                    3 (0.0%)
+   Philippe Schenker                 2 (0.0%)
+   Jon Lin                           1 (0.0%)
+   Holger Brunck                     1 (0.0%)
+   William Grant                     1 (0.0%)
+   Andreas Schwab                    1 (0.0%)
+   Vincent Stehlé                    1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 205)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andre Przywara                    44 (21.5%)
+   Marek Behún                       33 (16.1%)
+   Tom Rini                          13 (6.3%)
+   Oleksandr Suvorov                 11 (5.4%)
+   Neil Armstrong                    11 (5.4%)
+   Michal Simek                      10 (4.9%)
+   Tom Warren                        9 (4.4%)
+   Marcel Ziswiler                   8 (3.9%)
+   Ilias Apalodimas                  7 (3.4%)
+   Priyanka Jain                     6 (2.9%)
+   Heinrich Schuchardt               6 (2.9%)
+   Jaehoon Chung                     5 (2.4%)
+   Patrice Chotard                   5 (2.4%)
+   Markus Niebel                     4 (2.0%)
+   Sin Hui Kho                       3 (1.5%)
+   Matthias Brugger                  3 (1.5%)
+   Ashok Reddy Soma                  3 (1.5%)
+   Jagan Teki                        3 (1.5%)
+   Simon Glass                       3 (1.5%)
+   Eugen Hristev                     2 (1.0%)
+   Mattijs Korpershoek               2 (1.0%)
+   Rayagonda Kokatanur               2 (1.0%)
+   Ricardo Salveti                   2 (1.0%)
+   Max Krummenacher                  2 (1.0%)
+   Mark Kettenis                     2 (1.0%)
+   Jason Zhu                         1 (0.5%)
+   Adrian Fiergolski                 1 (0.5%)
+   Minkyu Kang                       1 (0.5%)
+   Kever Yang                        1 (0.5%)
+   Jorge Ramirez-Ortiz               1 (0.5%)
+   Bin Meng                          1 (0.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 989)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      165 (16.7%)
+   Simon Glass                       158 (16.0%)
+   Ramon Fried                       61 (6.2%)
+   Priyanka Jain                     56 (5.7%)
+   Bin Meng                          50 (5.1%)
+   Marek Behún                       48 (4.9%)
+   Heinrich Schuchardt               36 (3.6%)
+   Patrice Chotard                   32 (3.2%)
+   Fabio Estevam                     32 (3.2%)
+   Andre Przywara                    30 (3.0%)
+   Ilias Apalodimas                  28 (2.8%)
+   Leo Yu-Chi Liang                  27 (2.7%)
+   Vladimir Oltean                   24 (2.4%)
+   Kever Yang                        23 (2.3%)
+   Tom Rini                          20 (2.0%)
+   Jaehoon Chung                     18 (1.8%)
+   Artem Lapkin                      18 (1.8%)
+   Alexandru Gagniuc                 17 (1.7%)
+   Patrick Delaunay                  16 (1.6%)
+   Rick Chen                         14 (1.4%)
+   Jagan Teki                        13 (1.3%)
+   Peng Fan                          12 (1.2%)
+   Heiko Schocher                    10 (1.0%)
+   Sean Anderson                     9 (0.9%)
+   Peter Robinson                    6 (0.6%)
+   Oleksandr Suvorov                 4 (0.4%)
+   Neil Armstrong                    4 (0.4%)
+   Marcel Ziswiler                   4 (0.4%)
+   Igor Opaniuk                      4 (0.4%)
+   Patrick Wildt                     4 (0.4%)
+   Thomas Huth                       3 (0.3%)
+   Tien Fong Chee                    3 (0.3%)
+   Adrian Fiergolski                 2 (0.2%)
+   Minkyu Kang                       2 (0.2%)
+   Stefano Babic                     2 (0.2%)
+   Pratyush Yadav                    2 (0.2%)
+   Hou Zhiqiang                      2 (0.2%)
+   Heiko Thiery                      2 (0.2%)
+   Samuel Holland                    2 (0.2%)
+   Pali Rohár                        2 (0.2%)
+   Frieder Schrempf                  2 (0.2%)
+   Michal Simek                      1 (0.1%)
+   Mark Kettenis                     1 (0.1%)
+   Anatolij Gustschin                1 (0.1%)
+   Wolfgang Denk                     1 (0.1%)
+   Alexander Dahl                    1 (0.1%)
+   Philipp Tomsich                   1 (0.1%)
+   Lukasz Majewski                   1 (0.1%)
+   Ian Ray                           1 (0.1%)
+   Haibo Chen                        1 (0.1%)
+   Atish Patra                       1 (0.1%)
+   Jens Wiklander                    1 (0.1%)
+   Ryan Chen                         1 (0.1%)
+   Miquel Raynal                     1 (0.1%)
+   Qu Wenruo                         1 (0.1%)
+   Lokesh Vutla                      1 (0.1%)
+   Daniel Schwierzeck                1 (0.1%)
+   Aleksandar Gerasimovski           1 (0.1%)
+   Icenowy Zheng                     1 (0.1%)
+   Wasim Khan                        1 (0.1%)
+   Andy Shevchenko                   1 (0.1%)
+   Michael Walle                     1 (0.1%)
+   Jan Kiszka                        1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 66)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Artem Lapkin                      16 (24.2%)
+   Masami Hiramatsu                  7 (10.6%)
+   Michael Walle                     6 (9.1%)
+   Simon Glass                       2 (3.0%)
+   Bin Meng                          2 (3.0%)
+   Marek Behún                       2 (3.0%)
+   Patrice Chotard                   2 (3.0%)
+   Ilias Apalodimas                  2 (3.0%)
+   Vladimir Oltean                   2 (3.0%)
+   Samuel Holland                    2 (3.0%)
+   Pali Rohár                        2 (3.0%)
+   Ying-Chun Liu (PaulLiu)           2 (3.0%)
+   Chris Morgan                      2 (3.0%)
+   Andre Przywara                    1 (1.5%)
+   Tom Rini                          1 (1.5%)
+   Alexandru Gagniuc                 1 (1.5%)
+   Peter Robinson                    1 (1.5%)
+   Marcel Ziswiler                   1 (1.5%)
+   Patrick Wildt                     1 (1.5%)
+   Heiko Thiery                      1 (1.5%)
+   Frieder Schrempf                  1 (1.5%)
+   Wasim Khan                        1 (1.5%)
+   Mattijs Korpershoek               1 (1.5%)
+   Andrey Zhizhikin                  1 (1.5%)
+   Tim Harvey                        1 (1.5%)
+   Vincent Stehlé                    1 (1.5%)
+   Tommaso Merciai                   1 (1.5%)
+   Tony Dinh                         1 (1.5%)
+   Teresa Remmet                     1 (1.5%)
+   Vyacheslav Bocharov               1 (1.5%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 66)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       17 (25.8%)
+   Marek Behún                       8 (12.1%)
+   Vladimir Oltean                   8 (12.1%)
+   Patrick Delaunay                  4 (6.1%)
+   Ye Li                             3 (4.5%)
+   Michael Walle                     2 (3.0%)
+   Ilias Apalodimas                  2 (3.0%)
+   Stefan Roese                      2 (3.0%)
+   Heinrich Schuchardt               2 (3.0%)
+   Fabio Estevam                     2 (3.0%)
+   Jon Lin                           2 (3.0%)
+   Yifeng Zhao                       2 (3.0%)
+   Ruchika Gupta                     2 (3.0%)
+   Pali Rohár                        1 (1.5%)
+   Tom Rini                          1 (1.5%)
+   Frieder Schrempf                  1 (1.5%)
+   Peng Fan                          1 (1.5%)
+   Heiko Schocher                    1 (1.5%)
+   Neil Armstrong                    1 (1.5%)
+   Kirill Kapranov                   1 (1.5%)
+   Gary Bisson                       1 (1.5%)
+   Arnaud Ferraris                   1 (1.5%)
+   Kuldeep Singh                     1 (1.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 19)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Eugen Hristev                     4 (21.1%)
+   Alexandru Gagniuc                 3 (15.8%)
+   Herbert Poetzl                    2 (10.5%)
+   Michael Walle                     1 (5.3%)
+   Tom Rini                          1 (5.3%)
+   Neil Armstrong                    1 (5.3%)
+   Artem Lapkin                      1 (5.3%)
+   Masami Hiramatsu                  1 (5.3%)
+   Vyacheslav Bocharov               1 (5.3%)
+   5kft@5kft.org                     1 (5.3%)
+   Xin Lin                           1 (5.3%)
+   Coverity Scan                     1 (5.3%)
+   Michael Scott                     1 (5.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 19)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Claudiu Beznea                    4 (21.1%)
+   Patrick Delaunay                  3 (15.8%)
+   Tom Rini                          2 (10.5%)
+   Neil Armstrong                    2 (10.5%)
+   Patrice Chotard                   2 (10.5%)
+   Simon Glass                       1 (5.3%)
+   Marek Behún                       1 (5.3%)
+   Andre Przywara                    1 (5.3%)
+   Sean Anderson                     1 (5.3%)
+   Oleksandr Suvorov                 1 (5.3%)
+   Chunfeng Yun                      1 (5.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         654 (46.2%)
+   Konsulko Group                    179 (12.6%)
+   Google, Inc.                      151 (10.7%)
+   NXP                               89 (6.3%)
+   DENX Software Engineering         79 (5.6%)
+   ST Microelectronics               49 (3.5%)
+   Linaro                            48 (3.4%)
+   Toradex                           25 (1.8%)
+   AMD                               15 (1.1%)
+   BayLibre SAS                      15 (1.1%)
+   Intel                             14 (1.0%)
+   ARM                               13 (0.9%)
+   Rockchip                          12 (0.8%)
+   Siemens                           11 (0.8%)
+   Phytec                            10 (0.7%)
+   NVidia                            9 (0.6%)
+   Xilinx                            8 (0.6%)
+   Bootlin                           7 (0.5%)
+   Collabora Ltd.                    6 (0.4%)
+   Red Hat                           5 (0.4%)
+   Amarula Solutions                 3 (0.2%)
+   Broadcom                          3 (0.2%)
+   Debian.org                        3 (0.2%)
+   Samsung                           3 (0.2%)
+   Boundary Devices                  2 (0.1%)
+   CompuLab                          1 (0.1%)
+   SUSE                              1 (0.1%)
+   Texas Instruments                 1 (0.1%)
+   Canonical                         1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         31820 (33.6%)
+   Konsulko Group                    29502 (31.2%)
+   Google, Inc.                      7801 (8.2%)
+   Linaro                            5243 (5.5%)
+   DENX Software Engineering         3899 (4.1%)
+   AMD                               3516 (3.7%)
+   BayLibre SAS                      2584 (2.7%)
+   Siemens                           2126 (2.2%)
+   ST Microelectronics               1625 (1.7%)
+   Toradex                           1567 (1.7%)
+   NXP                               1242 (1.3%)
+   Amarula Solutions                 817 (0.9%)
+   NVidia                            712 (0.8%)
+   ARM                               534 (0.6%)
+   Intel                             438 (0.5%)
+   Rockchip                          349 (0.4%)
+   Red Hat                           261 (0.3%)
+   Phytec                            240 (0.3%)
+   Xilinx                            117 (0.1%)
+   Broadcom                          90 (0.1%)
+   Bootlin                           46 (0.0%)
+   Collabora Ltd.                    39 (0.0%)
+   Debian.org                        39 (0.0%)
+   Texas Instruments                 27 (0.0%)
+   Samsung                           18 (0.0%)
+   Boundary Devices                  14 (0.0%)
+   CompuLab                          2 (0.0%)
+   SUSE                              2 (0.0%)
+   Canonical                         2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 205)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         63 (30.7%)
+   ARM                               44 (21.5%)
+   Konsulko Group                    13 (6.3%)
+   BayLibre SAS                      13 (6.3%)
+   Xilinx                            13 (6.3%)
+   Toradex                           10 (4.9%)
+   NVidia                            9 (4.4%)
+   Linaro                            7 (3.4%)
+   NXP                               6 (2.9%)
+   Samsung                           6 (2.9%)
+   ST Microelectronics               5 (2.4%)
+   Google, Inc.                      3 (1.5%)
+   Amarula Solutions                 3 (1.5%)
+   Intel                             3 (1.5%)
+   SUSE                              3 (1.5%)
+   Rockchip                          2 (1.0%)
+   Broadcom                          2 (1.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 167)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         89 (53.3%)
+   NXP                               12 (7.2%)
+   DENX Software Engineering         7 (4.2%)
+   Toradex                           6 (3.6%)
+   Rockchip                          6 (3.6%)
+   Linaro                            5 (3.0%)
+   ARM                               4 (2.4%)
+   Collabora Ltd.                    4 (2.4%)
+   BayLibre SAS                      3 (1.8%)
+   Xilinx                            3 (1.8%)
+   Google, Inc.                      3 (1.8%)
+   Intel                             3 (1.8%)
+   Samsung                           2 (1.2%)
+   ST Microelectronics               2 (1.2%)
+   Siemens                           2 (1.2%)
+   Red Hat                           2 (1.2%)
+   Debian.org                        2 (1.2%)
+   Konsulko Group                    1 (0.6%)
+   NVidia                            1 (0.6%)
+   Amarula Solutions                 1 (0.6%)
+   SUSE                              1 (0.6%)
+   Broadcom                          1 (0.6%)
+   AMD                               1 (0.6%)
+   Phytec                            1 (0.6%)
+   Bootlin                           1 (0.6%)
+   Texas Instruments                 1 (0.6%)
+   Boundary Devices                  1 (0.6%)
+   CompuLab                          1 (0.6%)
+   Canonical                         1 (0.6%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2022.04.rst b/doc/develop/statistics/u-boot-stats-v2022.04.rst
new file mode 100644
index 00000000000..ef235114a47
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2022.04.rst
@@ -0,0 +1,843 @@
+:orphan:
+
+Release Statistics for U-Boot v2022.04
+======================================
+
+* Processed 1555 changesets from 193 developers
+
+* 27 employers found
+
+* A total of 118078 lines added, 34020 removed (delta 84058)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       342 (22.0%)
+   Pali Rohár                        154 (9.9%)
+   Heinrich Schuchardt               75 (4.8%)
+   Tom Rini                          66 (4.2%)
+   Patrick Delaunay                  56 (3.6%)
+   Michal Simek                      36 (2.3%)
+   Marek Vasut                       32 (2.1%)
+   Vladimir Oltean                   29 (1.9%)
+   Sean Anderson                     26 (1.7%)
+   Mark Kettenis                     26 (1.7%)
+   Ovidiu Panait                     25 (1.6%)
+   Aswath Govindraju                 24 (1.5%)
+   Marek Behún                       24 (1.5%)
+   Adam Ford                         24 (1.5%)
+   Andre Przywara                    22 (1.4%)
+   Sinthu Raja                       19 (1.2%)
+   Aleksandar Gerasimovski           18 (1.2%)
+   Alper Nebi Yasak                  17 (1.1%)
+   Ye Li                             15 (1.0%)
+   AKASHI Takahiro                   14 (0.9%)
+   Vignesh Raghavendra               14 (0.9%)
+   Tony Dinh                         12 (0.8%)
+   Heiko Thiery                      12 (0.8%)
+   Jan Kiszka                        11 (0.7%)
+   Patrice Chotard                   11 (0.7%)
+   Michael Walle                     11 (0.7%)
+   Keerthy                           11 (0.7%)
+   Lukasz Majewski                   11 (0.7%)
+   Vagrant Cascadian                 11 (0.7%)
+   Stefan Roese                      10 (0.6%)
+   Icenowy Zheng                     10 (0.6%)
+   Swapnil Jakhade                   10 (0.6%)
+   Etienne Carriere                  10 (0.6%)
+   Ilias Apalodimas                  9 (0.6%)
+   Masami Hiramatsu                  9 (0.6%)
+   Chia-Wei Wang                     9 (0.6%)
+   David Huang                       9 (0.6%)
+   Bin Meng                          8 (0.5%)
+   Tim Harvey                        7 (0.5%)
+   Angus Ainslie                     7 (0.5%)
+   Kishon Vijay Abraham I            7 (0.5%)
+   Mattijs Korpershoek               7 (0.5%)
+   Fabio Estevam                     6 (0.4%)
+   Samuel Holland                    6 (0.4%)
+   Ying-Chun Liu (PaulLiu)           6 (0.4%)
+   Dylan Hung                        6 (0.4%)
+   Amit Singh Tomar                  6 (0.4%)
+   Peter Hoyes                       6 (0.4%)
+   Andrey Zhizhikin                  5 (0.3%)
+   Andy Shevchenko                   5 (0.3%)
+   Niklas Cassel                     5 (0.3%)
+   Philippe Reynes                   5 (0.3%)
+   Patrick Wildt                     5 (0.3%)
+   Eugen Hristev                     5 (0.3%)
+   Damien Le Moal                    4 (0.3%)
+   Christian Gmeiner                 4 (0.3%)
+   Jesse Taube                       4 (0.3%)
+   Felix Brack                       4 (0.3%)
+   Anup Patel                        4 (0.3%)
+   Amjad Ouled-Ameur                 4 (0.3%)
+   Oleksandr Suvorov                 4 (0.3%)
+   T Karthik Reddy                   4 (0.3%)
+   Stefan Eichenberger               4 (0.3%)
+   Mihai Sain                        4 (0.3%)
+   Tudor Ambarus                     4 (0.3%)
+   Francesco Dolcini                 3 (0.2%)
+   Adrian Fiergolski                 3 (0.2%)
+   Neil Armstrong                    3 (0.2%)
+   Haibo Chen                        3 (0.2%)
+   Nam Nguyen                        3 (0.2%)
+   Janne Grunau                      3 (0.2%)
+   Hou Zhiqiang                      3 (0.2%)
+   Richard Zhu                       3 (0.2%)
+   Ricardo Salveti                   3 (0.2%)
+   Ashok Reddy Soma                  3 (0.2%)
+   Siva Durga Prasad Paladugu        3 (0.2%)
+   Qu Wenruo                         3 (0.2%)
+   Sughosh Ganu                      2 (0.1%)
+   Jernej Skrabec                    2 (0.1%)
+   Heiko Schocher                    2 (0.1%)
+   Nikita Yushchenko                 2 (0.1%)
+   Johannes Krottmayer               2 (0.1%)
+   Johan Jonker                      2 (0.1%)
+   Giulio Benetti                    2 (0.1%)
+   Robert Marko                      2 (0.1%)
+   Linus Walleij                     2 (0.1%)
+   Bharat Gooty                      2 (0.1%)
+   Marcel Ziswiler                   2 (0.1%)
+   Michael Trimarchi                 2 (0.1%)
+   Harald Seiler                     2 (0.1%)
+   Rafał Miłecki                     2 (0.1%)
+   Matthias Schiffer                 2 (0.1%)
+   Moritz Fischer                    2 (0.1%)
+   Rasmus Villemoes                  2 (0.1%)
+   Nishanth Menon                    2 (0.1%)
+   Sunil V L                         2 (0.1%)
+   Dario Binacchi                    2 (0.1%)
+   Oliver Graute                     2 (0.1%)
+   Alice Guo                         2 (0.1%)
+   Martin Schiller                   2 (0.1%)
+   Mathew McBride                    2 (0.1%)
+   Chris Morgan                      2 (0.1%)
+   Loic Poulain                      2 (0.1%)
+   John Keeping                      2 (0.1%)
+   qianfan Zhao                      2 (0.1%)
+   Samuel Dionne-Riel                2 (0.1%)
+   Henrik Grimler                    2 (0.1%)
+   Hari Prasath                      2 (0.1%)
+   Jon Lin                           2 (0.1%)
+   Joel Stanley                      2 (0.1%)
+   Han Xu                            1 (0.1%)
+   Jérôme Carretero                  1 (0.1%)
+   Hector Martin                     1 (0.1%)
+   Michael Opdenacker                1 (0.1%)
+   Alexander Graf                    1 (0.1%)
+   Matthias Brugger                  1 (0.1%)
+   Leonidas-Panagiotis Papadakos     1 (0.1%)
+   Marty E. Plummer                  1 (0.1%)
+   Max Merchel                       1 (0.1%)
+   Peng Fan                          1 (0.1%)
+   Gabriel Fernandez                 1 (0.1%)
+   Christophe Kerello                1 (0.1%)
+   Soeren Moch                       1 (0.1%)
+   Wolfgang Grandegger               1 (0.1%)
+   Yann Droneaud                     1 (0.1%)
+   Sébastien Szymanski               1 (0.1%)
+   Romain Naour                      1 (0.1%)
+   Chris Packham                     1 (0.1%)
+   Francois Berder                   1 (0.1%)
+   Daniel Klauer                     1 (0.1%)
+   Masahisa Kojima                   1 (0.1%)
+   Rayagonda Kokatanur               1 (0.1%)
+   Roger Quadros                     1 (0.1%)
+   Neal Liu                          1 (0.1%)
+   Suman Anna                        1 (0.1%)
+   Tommaso Merciai                   1 (0.1%)
+   Oleh Kravchenko                   1 (0.1%)
+   Stefan Agner                      1 (0.1%)
+   Luca Ceresoli                     1 (0.1%)
+   Nikita Maslov                     1 (0.1%)
+   Detlev Casanova                   1 (0.1%)
+   qthedev                           1 (0.1%)
+   Peter Cai                         1 (0.1%)
+   Zhang Ning                        1 (0.1%)
+   Thomas Watson                     1 (0.1%)
+   Sanket Parmar                     1 (0.1%)
+   Bryan Brattlof                    1 (0.1%)
+   Oliver Stäbler                    1 (0.1%)
+   Gary Bisson                       1 (0.1%)
+   Sven Schwermer                    1 (0.1%)
+   Christoph Niedermaier             1 (0.1%)
+   Mattias Hansson                   1 (0.1%)
+   Ariel D'Alessandro                1 (0.1%)
+   Haolin Li                         1 (0.1%)
+   Jacky Bai                         1 (0.1%)
+   Jorge Ramirez-Ortiz               1 (0.1%)
+   Codrin Ciubotariu                 1 (0.1%)
+   Ramon Fried                       1 (0.1%)
+   Greentime Hu                      1 (0.1%)
+   Jianpeng Bu                       1 (0.1%)
+   Camelia Groza                     1 (0.1%)
+   Sergey V. Lobanov                 1 (0.1%)
+   Daniel Wagenknecht                1 (0.1%)
+   Lars Weber                        1 (0.1%)
+   Jamin Lin                         1 (0.1%)
+   Roman Stratiienko                 1 (0.1%)
+   Anastasiia Lukianenko             1 (0.1%)
+   Alexandru Gagniuc                 1 (0.1%)
+   Shravya Kumbham                   1 (0.1%)
+   Manish Narani                     1 (0.1%)
+   AJ Bagwell                        1 (0.1%)
+   Thomas Huth                       1 (0.1%)
+   David Rivshin                     1 (0.1%)
+   Stefan Mätje                      1 (0.1%)
+   chao zeng                         1 (0.1%)
+   Markus Koch                       1 (0.1%)
+   Dominic Rath                      1 (0.1%)
+   Michael Liebert                   1 (0.1%)
+   Peter Robinson                    1 (0.1%)
+   Piotr Kubik                       1 (0.1%)
+   Joel Peshkin                      1 (0.1%)
+   Maciej W. Rozycki                 1 (0.1%)
+   Pierre Bourdon                    1 (0.1%)
+   Brian Norris                      1 (0.1%)
+   Sandeep Gundlupet Raju            1 (0.1%)
+   Ivan Mikhaylov                    1 (0.1%)
+   Alexander Preißner                1 (0.1%)
+   Radu Bulie                        1 (0.1%)
+   Ryan Chen                         1 (0.1%)
+   Walter Stoll                      1 (0.1%)
+   Alistair Delva                    1 (0.1%)
+   Johnny Huang                      1 (0.1%)
+   Julien Masson                     1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       22588 (17.2%)
+   Aswath Govindraju                 11980 (9.1%)
+   Tom Rini                          7855 (6.0%)
+   Ying-Chun Liu (PaulLiu)           6491 (4.9%)
+   Pali Rohár                        5387 (4.1%)
+   Heiko Thiery                      5341 (4.1%)
+   Mark Kettenis                     4624 (3.5%)
+   Heinrich Schuchardt               4142 (3.1%)
+   Sinthu Raja                       4120 (3.1%)
+   Tim Harvey                        4027 (3.1%)
+   Vladimir Oltean                   3994 (3.0%)
+   Marcel Ziswiler                   3699 (2.8%)
+   Bharat Gooty                      3544 (2.7%)
+   Ovidiu Panait                     3437 (2.6%)
+   Marek Vasut                       3434 (2.6%)
+   Patrick Delaunay                  3401 (2.6%)
+   Keerthy                           2274 (1.7%)
+   David Huang                       2032 (1.5%)
+   Ariel D'Alessandro                2003 (1.5%)
+   Michal Simek                      1465 (1.1%)
+   Mathew McBride                    1360 (1.0%)
+   AKASHI Takahiro                   1335 (1.0%)
+   Alper Nebi Yasak                  1124 (0.9%)
+   Icenowy Zheng                     1089 (0.8%)
+   Tony Dinh                         1083 (0.8%)
+   Swapnil Jakhade                   1000 (0.8%)
+   Sean Anderson                     919 (0.7%)
+   Ye Li                             787 (0.6%)
+   Andre Przywara                    728 (0.6%)
+   Loic Poulain                      696 (0.5%)
+   Michael Walle                     670 (0.5%)
+   Tudor Ambarus                     636 (0.5%)
+   Marek Behún                       603 (0.5%)
+   Qu Wenruo                         603 (0.5%)
+   Rayagonda Kokatanur               583 (0.4%)
+   Dominic Rath                      579 (0.4%)
+   Mattijs Korpershoek               568 (0.4%)
+   Amit Singh Tomar                  563 (0.4%)
+   Patrick Wildt                     530 (0.4%)
+   Ryan Chen                         469 (0.4%)
+   Lukasz Majewski                   454 (0.3%)
+   Oleksandr Suvorov                 427 (0.3%)
+   Adam Ford                         426 (0.3%)
+   Aleksandar Gerasimovski           407 (0.3%)
+   Johnny Huang                      403 (0.3%)
+   Etienne Carriere                  386 (0.3%)
+   Masami Hiramatsu                  368 (0.3%)
+   Angus Ainslie                     330 (0.3%)
+   Linus Walleij                     318 (0.2%)
+   Chia-Wei Wang                     299 (0.2%)
+   Vignesh Raghavendra               272 (0.2%)
+   Dylan Hung                        268 (0.2%)
+   Ilias Apalodimas                  255 (0.2%)
+   Jan Kiszka                        247 (0.2%)
+   T Karthik Reddy                   234 (0.2%)
+   Anup Patel                        232 (0.2%)
+   Neil Armstrong                    232 (0.2%)
+   Sunil V L                         227 (0.2%)
+   Maciej W. Rozycki                 189 (0.1%)
+   Damien Le Moal                    174 (0.1%)
+   Marty E. Plummer                  166 (0.1%)
+   Peter Hoyes                       160 (0.1%)
+   Kishon Vijay Abraham I            154 (0.1%)
+   Samuel Holland                    116 (0.1%)
+   Jamin Lin                         112 (0.1%)
+   Stefan Roese                      109 (0.1%)
+   Ricardo Salveti                   103 (0.1%)
+   Andy Shevchenko                   98 (0.1%)
+   Alexandru Gagniuc                 96 (0.1%)
+   Janne Grunau                      92 (0.1%)
+   Eugen Hristev                     90 (0.1%)
+   Moritz Fischer                    83 (0.1%)
+   Bin Meng                          80 (0.1%)
+   Zhang Ning                        79 (0.1%)
+   Jesse Taube                       73 (0.1%)
+   Alice Guo                         66 (0.1%)
+   Matthias Brugger                  65 (0.0%)
+   Rasmus Villemoes                  63 (0.0%)
+   qianfan Zhao                      63 (0.0%)
+   Rafał Miłecki                     62 (0.0%)
+   Han Xu                            62 (0.0%)
+   Roger Quadros                     62 (0.0%)
+   Richard Zhu                       59 (0.0%)
+   Felix Brack                       56 (0.0%)
+   Christian Gmeiner                 55 (0.0%)
+   Michael Trimarchi                 53 (0.0%)
+   Jacky Bai                         52 (0.0%)
+   Christoph Niedermaier             50 (0.0%)
+   Stefan Eichenberger               49 (0.0%)
+   Mihai Sain                        48 (0.0%)
+   Philippe Reynes                   46 (0.0%)
+   Amjad Ouled-Ameur                 46 (0.0%)
+   Fabio Estevam                     45 (0.0%)
+   Andrey Zhizhikin                  43 (0.0%)
+   Sughosh Ganu                      43 (0.0%)
+   Ramon Fried                       39 (0.0%)
+   Haibo Chen                        38 (0.0%)
+   Joel Stanley                      38 (0.0%)
+   David Rivshin                     36 (0.0%)
+   Detlev Casanova                   34 (0.0%)
+   Shravya Kumbham                   32 (0.0%)
+   Stefan Agner                      31 (0.0%)
+   Nishanth Menon                    29 (0.0%)
+   Daniel Klauer                     29 (0.0%)
+   AJ Bagwell                        29 (0.0%)
+   Patrice Chotard                   28 (0.0%)
+   Piotr Kubik                       28 (0.0%)
+   Bryan Brattlof                    27 (0.0%)
+   Thomas Watson                     26 (0.0%)
+   Matthias Schiffer                 24 (0.0%)
+   Michael Opdenacker                23 (0.0%)
+   Siva Durga Prasad Paladugu        22 (0.0%)
+   Chris Morgan                      22 (0.0%)
+   Hou Zhiqiang                      19 (0.0%)
+   Ashok Reddy Soma                  19 (0.0%)
+   Jorge Ramirez-Ortiz               19 (0.0%)
+   Codrin Ciubotariu                 19 (0.0%)
+   Masahisa Kojima                   18 (0.0%)
+   Peter Cai                         16 (0.0%)
+   Ivan Mikhaylov                    16 (0.0%)
+   Julien Masson                     15 (0.0%)
+   Francesco Dolcini                 14 (0.0%)
+   Sanket Parmar                     14 (0.0%)
+   Sven Schwermer                    14 (0.0%)
+   Max Merchel                       12 (0.0%)
+   Radu Bulie                        12 (0.0%)
+   Alistair Delva                    12 (0.0%)
+   Vagrant Cascadian                 11 (0.0%)
+   Samuel Dionne-Riel                10 (0.0%)
+   Oleh Kravchenko                   10 (0.0%)
+   Harald Seiler                     9 (0.0%)
+   Jon Lin                           9 (0.0%)
+   Christophe Kerello                9 (0.0%)
+   Martin Schiller                   8 (0.0%)
+   Henrik Grimler                    8 (0.0%)
+   Mattias Hansson                   8 (0.0%)
+   chao zeng                         8 (0.0%)
+   Brian Norris                      8 (0.0%)
+   Robert Marko                      7 (0.0%)
+   Niklas Cassel                     6 (0.0%)
+   Heiko Schocher                    6 (0.0%)
+   Johan Jonker                      6 (0.0%)
+   Hari Prasath                      6 (0.0%)
+   Gabriel Fernandez                 6 (0.0%)
+   Yann Droneaud                     5 (0.0%)
+   Tommaso Merciai                   5 (0.0%)
+   Jianpeng Bu                       5 (0.0%)
+   Thomas Huth                       5 (0.0%)
+   Michael Liebert                   5 (0.0%)
+   Adrian Fiergolski                 4 (0.0%)
+   Dario Binacchi                    4 (0.0%)
+   Suman Anna                        4 (0.0%)
+   Camelia Groza                     4 (0.0%)
+   Markus Koch                       4 (0.0%)
+   Peter Robinson                    4 (0.0%)
+   Nam Nguyen                        3 (0.0%)
+   Johannes Krottmayer               3 (0.0%)
+   Giulio Benetti                    3 (0.0%)
+   Oliver Graute                     3 (0.0%)
+   John Keeping                      3 (0.0%)
+   Wolfgang Grandegger               3 (0.0%)
+   Nikita Maslov                     3 (0.0%)
+   Pierre Bourdon                    3 (0.0%)
+   Jernej Skrabec                    2 (0.0%)
+   Nikita Yushchenko                 2 (0.0%)
+   Alexander Graf                    2 (0.0%)
+   Peng Fan                          2 (0.0%)
+   Chris Packham                     2 (0.0%)
+   Luca Ceresoli                     2 (0.0%)
+   qthedev                           2 (0.0%)
+   Oliver Stäbler                    2 (0.0%)
+   Gary Bisson                       2 (0.0%)
+   Haolin Li                         2 (0.0%)
+   Greentime Hu                      2 (0.0%)
+   Sergey V. Lobanov                 2 (0.0%)
+   Daniel Wagenknecht                2 (0.0%)
+   Lars Weber                        2 (0.0%)
+   Manish Narani                     2 (0.0%)
+   Stefan Mätje                      2 (0.0%)
+   Sandeep Gundlupet Raju            2 (0.0%)
+   Jérôme Carretero                  1 (0.0%)
+   Hector Martin                     1 (0.0%)
+   Leonidas-Panagiotis Papadakos     1 (0.0%)
+   Soeren Moch                       1 (0.0%)
+   Sébastien Szymanski               1 (0.0%)
+   Romain Naour                      1 (0.0%)
+   Francois Berder                   1 (0.0%)
+   Neal Liu                          1 (0.0%)
+   Roman Stratiienko                 1 (0.0%)
+   Anastasiia Lukianenko             1 (0.0%)
+   Joel Peshkin                      1 (0.0%)
+   Alexander Preißner                1 (0.0%)
+   Walter Stoll                      1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          3537 (10.4%)
+   Ovidiu Panait                     3237 (9.5%)
+   Patrick Delaunay                  1336 (3.9%)
+   Sean Anderson                     123 (0.4%)
+   Sughosh Ganu                      42 (0.1%)
+   Rafał Miłecki                     15 (0.0%)
+   Heiko Schocher                    5 (0.0%)
+   Thomas Huth                       4 (0.0%)
+   Mattias Hansson                   3 (0.0%)
+   Andy Shevchenko                   2 (0.0%)
+   Yann Droneaud                     2 (0.0%)
+   Haolin Li                         2 (0.0%)
+   Harald Seiler                     1 (0.0%)
+   Markus Koch                       1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 279)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Michal Simek                      33 (11.8%)
+   Marek Behún                       29 (10.4%)
+   Aswath Govindraju                 27 (9.7%)
+   Andre Przywara                    25 (9.0%)
+   Peng Fan                          18 (6.5%)
+   Amjad Ouled-Ameur                 10 (3.6%)
+   Jesse Taube                       9 (3.2%)
+   Marek Vasut                       8 (2.9%)
+   Tom Rini                          7 (2.5%)
+   Yangbo Lu                         7 (2.5%)
+   Neil Armstrong                    7 (2.5%)
+   Priyanka Jain                     6 (2.2%)
+   Simon Glass                       6 (2.2%)
+   Niklas Cassel                     5 (1.8%)
+   Ashok Reddy Soma                  4 (1.4%)
+   Michael Walle                     4 (1.4%)
+   Heinrich Schuchardt               4 (1.4%)
+   Hai Pham                          3 (1.1%)
+   Roman Bacik                       3 (1.1%)
+   Hari Nagalla                      3 (1.1%)
+   Shawn Guo                         3 (1.1%)
+   Guillaume La Roque                3 (1.1%)
+   Vignesh Raghavendra               3 (1.1%)
+   Chia-Wei Wang                     3 (1.1%)
+   Darren Huang                      2 (0.7%)
+   Kevin12.Chen                      2 (0.7%)
+   Phill.Liu                         2 (0.7%)
+   Tim Liang                         2 (0.7%)
+   wei.zeng                          2 (0.7%)
+   Sven Peter                        2 (0.7%)
+   Uri Mashiach                      2 (0.7%)
+   Rainer Boschung                   2 (0.7%)
+   Christian Melki                   2 (0.7%)
+   Minkyu Kang                       2 (0.7%)
+   René Straub                       2 (0.7%)
+   Nishanth Menon                    2 (0.7%)
+   Alper Nebi Yasak                  2 (0.7%)
+   Patrick Delaunay                  1 (0.4%)
+   Ramon Fried                       1 (0.4%)
+   Jernej Skrabec                    1 (0.4%)
+   Leonidas P. Papadakos             1 (0.4%)
+   Yifeng Zhao                       1 (0.4%)
+   Jaehoon Chung                     1 (0.4%)
+   Markus Niebel                     1 (0.4%)
+   Kevin Scholz                      1 (0.4%)
+   James Doublesin                   1 (0.4%)
+   Dave Gerlach                      1 (0.4%)
+   Vinod Koul                        1 (0.4%)
+   Andy Chiu                         1 (0.4%)
+   Anthony Bagwell                   1 (0.4%)
+   Faiz Abbas                        1 (0.4%)
+   Stefan Roese                      1 (0.4%)
+   Christian Gmeiner                 1 (0.4%)
+   Roger Quadros                     1 (0.4%)
+   Dylan Hung                        1 (0.4%)
+   Oleksandr Suvorov                 1 (0.4%)
+   Icenowy Zheng                     1 (0.4%)
+   Bharat Gooty                      1 (0.4%)
+   Marcel Ziswiler                   1 (0.4%)
+   Mark Kettenis                     1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 859)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Stefan Roese                      184 (21.4%)
+   Simon Glass                       143 (16.6%)
+   Heinrich Schuchardt               58 (6.8%)
+   Priyanka Jain                     48 (5.6%)
+   Fabio Estevam                     40 (4.7%)
+   Ramon Fried                       39 (4.5%)
+   Patrice Chotard                   38 (4.4%)
+   Marek Behún                       30 (3.5%)
+   Patrick Delaunay                  28 (3.3%)
+   Jaehoon Chung                     27 (3.1%)
+   Andre Przywara                    22 (2.6%)
+   Sean Anderson                     17 (2.0%)
+   Jagan Teki                        16 (1.9%)
+   Michael Walle                     13 (1.5%)
+   Bin Meng                          13 (1.5%)
+   Peng Fan                          12 (1.4%)
+   Kever Yang                        11 (1.3%)
+   Heiko Schocher                    8 (0.9%)
+   Pali Rohár                        8 (0.9%)
+   Tom Rini                          6 (0.7%)
+   Mark Kettenis                     5 (0.6%)
+   Joel Stanley                      5 (0.6%)
+   Samuel Holland                    4 (0.5%)
+   Ye Li                             4 (0.5%)
+   Vladimir Oltean                   4 (0.5%)
+   Aswath Govindraju                 3 (0.3%)
+   Marek Vasut                       3 (0.3%)
+   Rick Chen                         3 (0.3%)
+   Philipp Tomsich                   3 (0.3%)
+   Jens Wiklander                    3 (0.3%)
+   Matthias Brugger                  3 (0.3%)
+   Patrick Wildt                     3 (0.3%)
+   Tim Harvey                        3 (0.3%)
+   Neil Armstrong                    2 (0.2%)
+   Marcel Ziswiler                   2 (0.2%)
+   Andy Shevchenko                   2 (0.2%)
+   Giulio Benetti                    2 (0.2%)
+   Leo Yu-Chi Liang                  2 (0.2%)
+   Georgi Vlaev                      2 (0.2%)
+   Pratyush Yadav                    2 (0.2%)
+   Igor Opaniuk                      2 (0.2%)
+   Frieder Schrempf                  2 (0.2%)
+   Ilias Apalodimas                  2 (0.2%)
+   Eugen Hristev                     2 (0.2%)
+   Chia-Wei Wang                     1 (0.1%)
+   Sven Peter                        1 (0.1%)
+   Alper Nebi Yasak                  1 (0.1%)
+   Jernej Skrabec                    1 (0.1%)
+   Dave Gerlach                      1 (0.1%)
+   Oleksandr Suvorov                 1 (0.1%)
+   Thomas Huth                       1 (0.1%)
+   Miquel Raynal                     1 (0.1%)
+   Denys Dmytriyenko                 1 (0.1%)
+   Tero Kristo                       1 (0.1%)
+   Rob Herring                       1 (0.1%)
+   Wolfgang Denk                     1 (0.1%)
+   Claudiu Beznea                    1 (0.1%)
+   Jessica Clarke                    1 (0.1%)
+   Oleksandr Andrushchenko           1 (0.1%)
+   Artem Lapkin                      1 (0.1%)
+   Sudeep Holla                      1 (0.1%)
+   Otavio Salvador                   1 (0.1%)
+   Alexander Dahl                    1 (0.1%)
+   Dzmitry Sankouski                 1 (0.1%)
+   Nicolas Saenz Julienne            1 (0.1%)
+   Vyacheslav Bocharov               1 (0.1%)
+   Stephan Gerhold                   1 (0.1%)
+   Yann Gautier                      1 (0.1%)
+   Shawn Lin                         1 (0.1%)
+   Camelia Groza                     1 (0.1%)
+   Stefan Agner                      1 (0.1%)
+   Adam Ford                         1 (0.1%)
+   Linus Walleij                     1 (0.1%)
+   Ryan Chen                         1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 94)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       25 (26.6%)
+   Stefan Roese                      10 (10.6%)
+   Tony Dinh                         10 (10.6%)
+   Heinrich Schuchardt               7 (7.4%)
+   Tim Harvey                        6 (6.4%)
+   Marcel Ziswiler                   5 (5.3%)
+   Bin Meng                          3 (3.2%)
+   Chris Packham                     3 (3.2%)
+   Fabio Estevam                     2 (2.1%)
+   Mark Kettenis                     2 (2.1%)
+   Milan P. Stanić                   2 (2.1%)
+   Mattijs Korpershoek               2 (2.1%)
+   Marek Behún                       1 (1.1%)
+   Sean Anderson                     1 (1.1%)
+   Michael Walle                     1 (1.1%)
+   Pali Rohár                        1 (1.1%)
+   Eugen Hristev                     1 (1.1%)
+   Christian Gmeiner                 1 (1.1%)
+   Peter Robinson                    1 (1.1%)
+   Sean Nyekjaer                     1 (1.1%)
+   Petr Štetiar                      1 (1.1%)
+   Johann Neuhauser                  1 (1.1%)
+   Alexandre Ghiti                   1 (1.1%)
+   Ferry Toth                        1 (1.1%)
+   Damien Le Moal                    1 (1.1%)
+   Janne Grunau                      1 (1.1%)
+   Keerthy                           1 (1.1%)
+   Heiko Thiery                      1 (1.1%)
+   Ying-Chun Liu (PaulLiu)           1 (1.1%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 94)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Pali Rohár                        21 (22.3%)
+   Mark Kettenis                     15 (16.0%)
+   Simon Glass                       7 (7.4%)
+   Richard Zhu                       6 (6.4%)
+   Andre Przywara                    5 (5.3%)
+   Alper Nebi Yasak                  4 (4.3%)
+   Heinrich Schuchardt               3 (3.2%)
+   Marek Behún                       3 (3.2%)
+   Anup Patel                        3 (3.2%)
+   Sean Anderson                     2 (2.1%)
+   Han Xu                            2 (2.1%)
+   Marcel Ziswiler                   1 (1.1%)
+   Fabio Estevam                     1 (1.1%)
+   Heiko Thiery                      1 (1.1%)
+   Patrick Delaunay                  1 (1.1%)
+   Tom Rini                          1 (1.1%)
+   Samuel Holland                    1 (1.1%)
+   Andy Shevchenko                   1 (1.1%)
+   Ilias Apalodimas                  1 (1.1%)
+   Oleksandr Suvorov                 1 (1.1%)
+   Adam Ford                         1 (1.1%)
+   Niklas Cassel                     1 (1.1%)
+   Vignesh Raghavendra               1 (1.1%)
+   Sughosh Ganu                      1 (1.1%)
+   Roman Stratiienko                 1 (1.1%)
+   Alexander Preißner                1 (1.1%)
+   Gary Bisson                       1 (1.1%)
+   Michael Liebert                   1 (1.1%)
+   Philippe Reynes                   1 (1.1%)
+   Haibo Chen                        1 (1.1%)
+   Codrin Ciubotariu                 1 (1.1%)
+   Moritz Fischer                    1 (1.1%)
+   Marty E. Plummer                  1 (1.1%)
+   Jan Kiszka                        1 (1.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 17)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Milan P. Stanić                   3 (17.6%)
+   Tony Dinh                         2 (11.8%)
+   Pali Rohár                        1 (5.9%)
+   Sean Anderson                     1 (5.9%)
+   Marcel Ziswiler                   1 (5.9%)
+   Ilias Apalodimas                  1 (5.9%)
+   Tim Harvey                        1 (5.9%)
+   Christian Gmeiner                 1 (5.9%)
+   Johann Neuhauser                  1 (5.9%)
+   Alexandre Ghiti                   1 (5.9%)
+   Joerie de Gram                    1 (5.9%)
+   Neal Frager                       1 (5.9%)
+   George Makarov                    1 (5.9%)
+   Ross Burton                       1 (5.9%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 17)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Heinrich Schuchardt               6 (35.3%)
+   Pali Rohár                        3 (17.6%)
+   Fabio Estevam                     2 (11.8%)
+   Simon Glass                       1 (5.9%)
+   Andre Przywara                    1 (5.9%)
+   Patrick Delaunay                  1 (5.9%)
+   Tom Rini                          1 (5.9%)
+   Vignesh Raghavendra               1 (5.9%)
+   Luca Ceresoli                     1 (5.9%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         634 (40.8%)
+   Google, Inc.                      345 (22.2%)
+   Texas Instruments                 88 (5.7%)
+   ST Microelectronics               69 (4.4%)
+   Konsulko Group                    66 (4.2%)
+   DENX Software Engineering         62 (4.0%)
+   NXP                               61 (3.9%)
+   Linaro                            54 (3.5%)
+   AMD                               36 (2.3%)
+   ARM                               28 (1.8%)
+   Wind River                        25 (1.6%)
+   BayLibre SAS                      15 (1.0%)
+   Siemens                           13 (0.8%)
+   Xilinx                            13 (0.8%)
+   Debian.org                        11 (0.7%)
+   Toradex                           7 (0.5%)
+   Intel                             5 (0.3%)
+   Amarula Solutions                 4 (0.3%)
+   Broadcom                          4 (0.3%)
+   SUSE                              4 (0.3%)
+   Renesas Electronics               3 (0.2%)
+   Collabora Ltd.                    2 (0.1%)
+   Rockchip                          2 (0.1%)
+   Bootlin                           1 (0.1%)
+   Boundary Devices                  1 (0.1%)
+   ESD Electronics                   1 (0.1%)
+   Red Hat                           1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         39285 (29.8%)
+   Google, Inc.                      22683 (17.2%)
+   Texas Instruments                 20892 (15.9%)
+   Linaro                            9899 (7.5%)
+   Konsulko Group                    7855 (6.0%)
+   NXP                               5100 (3.9%)
+   Toradex                           4129 (3.1%)
+   Broadcom                          4128 (3.1%)
+   DENX Software Engineering         4056 (3.1%)
+   ST Microelectronics               3444 (2.6%)
+   Wind River                        3437 (2.6%)
+   Collabora Ltd.                    2037 (1.5%)
+   AMD                               1465 (1.1%)
+   ARM                               888 (0.7%)
+   BayLibre SAS                      861 (0.7%)
+   SUSE                              668 (0.5%)
+   Xilinx                            311 (0.2%)
+   Siemens                           271 (0.2%)
+   Intel                             98 (0.1%)
+   Amarula Solutions                 57 (0.0%)
+   Bootlin                           23 (0.0%)
+   Debian.org                        11 (0.0%)
+   Rockchip                          9 (0.0%)
+   Red Hat                           5 (0.0%)
+   Renesas Electronics               3 (0.0%)
+   Boundary Devices                  2 (0.0%)
+   ESD Electronics                   2 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 279)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         92 (33.0%)
+   Texas Instruments                 40 (14.3%)
+   Xilinx                            37 (13.3%)
+   NXP                               31 (11.1%)
+   ARM                               25 (9.0%)
+   BayLibre SAS                      20 (7.2%)
+   Konsulko Group                    7 (2.5%)
+   Google, Inc.                      6 (2.2%)
+   DENX Software Engineering         6 (2.2%)
+   Broadcom                          4 (1.4%)
+   Renesas Electronics               3 (1.1%)
+   Samsung                           3 (1.1%)
+   CompuLab                          2 (0.7%)
+   Toradex                           1 (0.4%)
+   ST Microelectronics               1 (0.4%)
+   Rockchip                          1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 196)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         115 (58.7%)
+   NXP                               12 (6.1%)
+   Texas Instruments                 9 (4.6%)
+   Linaro                            9 (4.6%)
+   Xilinx                            6 (3.1%)
+   DENX Software Engineering         6 (3.1%)
+   BayLibre SAS                      4 (2.0%)
+   ST Microelectronics               4 (2.0%)
+   Google, Inc.                      3 (1.5%)
+   Broadcom                          3 (1.5%)
+   Toradex                           3 (1.5%)
+   Siemens                           3 (1.5%)
+   ARM                               2 (1.0%)
+   Collabora Ltd.                    2 (1.0%)
+   SUSE                              2 (1.0%)
+   Amarula Solutions                 2 (1.0%)
+   Konsulko Group                    1 (0.5%)
+   Renesas Electronics               1 (0.5%)
+   Rockchip                          1 (0.5%)
+   Wind River                        1 (0.5%)
+   AMD                               1 (0.5%)
+   Intel                             1 (0.5%)
+   Bootlin                           1 (0.5%)
+   Debian.org                        1 (0.5%)
+   Red Hat                           1 (0.5%)
+   Boundary Devices                  1 (0.5%)
+   ESD Electronics                   1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2022.07.rst b/doc/develop/statistics/u-boot-stats-v2022.07.rst
new file mode 100644
index 00000000000..dc54e9a716c
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2022.07.rst
@@ -0,0 +1,805 @@
+:orphan:
+
+Release Statistics for U-Boot v2022.07
+======================================
+
+* Processed 1696 changesets from 183 developers
+
+* 27 employers found
+
+* A total of 148026 lines added, 56440 removed (delta 91586)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          164 (9.7%)
+   Simon Glass                       141 (8.3%)
+   Pali Rohár                        114 (6.7%)
+   Marek Vasut                       94 (5.5%)
+   Peng Fan                          61 (3.6%)
+   Sean Anderson                     59 (3.5%)
+   Heinrich Schuchardt               57 (3.4%)
+   Samuel Holland                    49 (2.9%)
+   Michal Simek                      49 (2.9%)
+   Johan Jonker                      45 (2.7%)
+   Aaron Williams                    40 (2.4%)
+   AKASHI Takahiro                   38 (2.2%)
+   Marek Behún                       36 (2.1%)
+   Tim Harvey                        33 (1.9%)
+   Philippe Reynes                   29 (1.7%)
+   Andre Przywara                    28 (1.7%)
+   Andrew Scull                      27 (1.6%)
+   Patrice Chotard                   26 (1.5%)
+   Patrick Delaunay                  25 (1.5%)
+   Fabio Estevam                     24 (1.4%)
+   Gaurav Jain                       20 (1.2%)
+   Ye Li                             20 (1.2%)
+   Ashok Reddy Soma                  16 (0.9%)
+   Stefan Roese                      13 (0.8%)
+   Sughosh Ganu                      12 (0.7%)
+   Masahisa Kojima                   12 (0.7%)
+   Michael Trimarchi                 11 (0.6%)
+   Paweł Anikiel                     11 (0.6%)
+   Adam Ford                         11 (0.6%)
+   Marcel Ziswiler                   11 (0.6%)
+   Dave Gerlach                      11 (0.6%)
+   Philip Oberfichtner               11 (0.6%)
+   T Karthik Reddy                   11 (0.6%)
+   Bin Meng                          9 (0.5%)
+   Tommaso Merciai                   9 (0.5%)
+   Heiko Thiery                      8 (0.5%)
+   Alper Nebi Yasak                  8 (0.5%)
+   Philippe Schenker                 8 (0.5%)
+   Vyacheslav Bocharov               8 (0.5%)
+   Michael Walle                     7 (0.4%)
+   Peter Robinson                    6 (0.4%)
+   Francesco Dolcini                 6 (0.4%)
+   Mark Kettenis                     6 (0.4%)
+   Neal Frager                       6 (0.4%)
+   Robert Marko                      6 (0.4%)
+   Jim Liu                           6 (0.4%)
+   Tudor Ambarus                     6 (0.4%)
+   Paweł Jarosz                      5 (0.3%)
+   Dinesh Maniyam                    5 (0.3%)
+   Ariel D'Alessandro                5 (0.3%)
+   Eugen Hristev                     5 (0.3%)
+   Sergiu Moga                       5 (0.3%)
+   Lukasz Majewski                   5 (0.3%)
+   Clément Léger                     5 (0.3%)
+   Huang Jianan                      5 (0.3%)
+   Etienne Carriere                  5 (0.3%)
+   Tien Fong Chee                    4 (0.2%)
+   Chris Morgan                      4 (0.2%)
+   Dario Binacchi                    4 (0.2%)
+   Frieder Schrempf                  4 (0.2%)
+   Janne Grunau                      4 (0.2%)
+   Josua Mayer                       4 (0.2%)
+   Vincent Stehlé                    4 (0.2%)
+   Chris Packham                     4 (0.2%)
+   Sai Pavan Boddu                   4 (0.2%)
+   Neil Armstrong                    4 (0.2%)
+   Jan Kiszka                        4 (0.2%)
+   Andrew Davis                      4 (0.2%)
+   Aswath Govindraju                 4 (0.2%)
+   Masami Hiramatsu                  4 (0.2%)
+   Durai Manickam KR                 4 (0.2%)
+   Billy Tsai                        4 (0.2%)
+   Angus Ainslie                     4 (0.2%)
+   Jesse Taube                       4 (0.2%)
+   Andrew Jeffery                    4 (0.2%)
+   Hari Nagalla                      4 (0.2%)
+   Icenowy Zheng                     4 (0.2%)
+   Romain Naour                      4 (0.2%)
+   Joel Stanley                      3 (0.2%)
+   Andrey Zhizhikin                  3 (0.2%)
+   Loic Poulain                      3 (0.2%)
+   Rasmus Villemoes                  3 (0.2%)
+   Vagrant Cascadian                 3 (0.2%)
+   Ilias Apalodimas                  3 (0.2%)
+   Eddie James                       3 (0.2%)
+   Gireesh Hiremath                  3 (0.2%)
+   Sam Shih                          3 (0.2%)
+   Luca Ellero                       3 (0.2%)
+   Tony Dinh                         3 (0.2%)
+   Paul Barker                       3 (0.2%)
+   Oleksandr Suvorov                 3 (0.2%)
+   Igor Opaniuk                      3 (0.2%)
+   Denys Drozdov                     3 (0.2%)
+   SESA644425                        3 (0.2%)
+   Vignesh Raghavendra               3 (0.2%)
+   Dzmitry Sankouski                 3 (0.2%)
+   Jernej Skrabec                    3 (0.2%)
+   Miquel Raynal                     2 (0.1%)
+   Christian Gmeiner                 2 (0.1%)
+   Nate Drude                        2 (0.1%)
+   Rick Chen                         2 (0.1%)
+   Yannick Fertre                    2 (0.1%)
+   Peter Hoyes                       2 (0.1%)
+   Dominic Rath                      2 (0.1%)
+   Du Huanpeng                       2 (0.1%)
+   Haolin Li                         2 (0.1%)
+   Clement Faure                     2 (0.1%)
+   Vladimir Oltean                   2 (0.1%)
+   Christoph Niedermaier             2 (0.1%)
+   Paul Barbieri                     1 (0.1%)
+   Hannes Schmelzer                  1 (0.1%)
+   Teik Heng Chong                   1 (0.1%)
+   Andrea Scian                      1 (0.1%)
+   Jerome Forissier                  1 (0.1%)
+   Emmanuel Vadot                    1 (0.1%)
+   Nicolas Iooss                     1 (0.1%)
+   Andrejs Cainikovs                 1 (0.1%)
+   qianfan Zhao                      1 (0.1%)
+   Yau Wai Gan                       1 (0.1%)
+   Corentin LABBE                    1 (0.1%)
+   Christophe Leroy                  1 (0.1%)
+   Chunfeng Yun                      1 (0.1%)
+   Camelia Groza                     1 (0.1%)
+   Wasim Khan                        1 (0.1%)
+   Georgi Vlaev                      1 (0.1%)
+   Andrea zi0Black Cappa             1 (0.1%)
+   Leo Yu-Chi Liang                  1 (0.1%)
+   Humberto Naves                    1 (0.1%)
+   Sean Nyekjaer                     1 (0.1%)
+   Christoph Fritz                   1 (0.1%)
+   Sergei Antonov                    1 (0.1%)
+   George Hilliard                   1 (0.1%)
+   Ying-Chun Liu (PaulLiu)           1 (0.1%)
+   Vishal Patel                      1 (0.1%)
+   Piyush Mehta                      1 (0.1%)
+   Amit Kumar Mahapatra              1 (0.1%)
+   Jorge Ramirez-Ortiz               1 (0.1%)
+   Ralph Siemsen                     1 (0.1%)
+   Ovidiu Panait                     1 (0.1%)
+   John Keeping                      1 (0.1%)
+   Oliver Graute                     1 (0.1%)
+   Nicolas Heemeryck                 1 (0.1%)
+   Stanley Chu                       1 (0.1%)
+   Josef Schlehofer                  1 (0.1%)
+   Stephen Carlson                   1 (0.1%)
+   Yuantian Tang                     1 (0.1%)
+   Hou Zhiqiang                      1 (0.1%)
+   Kyle Evans                        1 (0.1%)
+   Lyle Franklin                     1 (0.1%)
+   Andrew Abbott                     1 (0.1%)
+   Oleksii Titov                     1 (0.1%)
+   Kshitiz Varshney                  1 (0.1%)
+   Ian Ray                           1 (0.1%)
+   Rogier Stam                       1 (0.1%)
+   Diego Rondini                     1 (0.1%)
+   Daniel Golle                      1 (0.1%)
+   Peter Cai                         1 (0.1%)
+   Alexandre Besnard                 1 (0.1%)
+   Elmar Albert                      1 (0.1%)
+   Arjan Minzinga Zijlstra           1 (0.1%)
+   Oleksii Bidnichenko               1 (0.1%)
+   Ji Luo                            1 (0.1%)
+   Clark Wang                        1 (0.1%)
+   Clément Péron                     1 (0.1%)
+   Andy Shevchenko                   1 (0.1%)
+   Hajo Noerenberg                   1 (0.1%)
+   Ville Baillie                     1 (0.1%)
+   Paul HENRYS                       1 (0.1%)
+   Jérôme Carretero                  1 (0.1%)
+   Dhananjay Phadke                  1 (0.1%)
+   Ivan Vozvakhov                    1 (0.1%)
+   Tom Saeger                        1 (0.1%)
+   Adarsh Babu Kalepalli             1 (0.1%)
+   He Yong                           1 (0.1%)
+   Samuel Dionne-Riel                1 (0.1%)
+   Felix Vietmeyer                   1 (0.1%)
+   Yi Liu                            1 (0.1%)
+   Angelo Dureghello                 1 (0.1%)
+   Baltazár Radics                   1 (0.1%)
+   Alexander Graf                    1 (0.1%)
+   Mihai Sain                        1 (0.1%)
+   Sai Krishna Potthuri              1 (0.1%)
+   weichangzheng                     1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Aaron Williams                    31473 (16.9%)
+   Tom Rini                          25599 (13.7%)
+   Simon Glass                       17972 (9.7%)
+   Marek Vasut                       14707 (7.9%)
+   Tim Harvey                        11858 (6.4%)
+   Sean Anderson                     10323 (5.5%)
+   Samuel Holland                    8705 (4.7%)
+   Stefan Roese                      4394 (2.4%)
+   Johan Jonker                      3712 (2.0%)
+   Jim Liu                           3650 (2.0%)
+   Ariel D'Alessandro                3358 (1.8%)
+   Huang Jianan                      3272 (1.8%)
+   Philippe Reynes                   2587 (1.4%)
+   Philip Oberfichtner               2400 (1.3%)
+   Peng Fan                          2365 (1.3%)
+   Pali Rohár                        2277 (1.2%)
+   Paweł Jarosz                      2092 (1.1%)
+   AKASHI Takahiro                   1700 (0.9%)
+   Eugen Hristev                     1532 (0.8%)
+   Gaurav Jain                       1522 (0.8%)
+   Humberto Naves                    1498 (0.8%)
+   Marek Behún                       1353 (0.7%)
+   Andre Przywara                    1318 (0.7%)
+   Paul Barker                       1308 (0.7%)
+   Patrick Delaunay                  1200 (0.6%)
+   Paweł Anikiel                     1162 (0.6%)
+   Michal Simek                      1065 (0.6%)
+   Patrice Chotard                   1038 (0.6%)
+   Ashok Reddy Soma                  1000 (0.5%)
+   Sughosh Ganu                      954 (0.5%)
+   Denys Drozdov                     942 (0.5%)
+   Neal Frager                       894 (0.5%)
+   Angus Ainslie                     804 (0.4%)
+   Heinrich Schuchardt               692 (0.4%)
+   weichangzheng                     686 (0.4%)
+   Etienne Carriere                  652 (0.4%)
+   Janne Grunau                      648 (0.3%)
+   Marcel Ziswiler                   636 (0.3%)
+   Andrew Scull                      606 (0.3%)
+   Neil Armstrong                    598 (0.3%)
+   Masahisa Kojima                   567 (0.3%)
+   Adam Ford                         524 (0.3%)
+   Billy Tsai                        497 (0.3%)
+   Alper Nebi Yasak                  440 (0.2%)
+   Fabio Estevam                     420 (0.2%)
+   Michael Trimarchi                 393 (0.2%)
+   Durai Manickam KR                 378 (0.2%)
+   Vincent Stehlé                    369 (0.2%)
+   Andrew Jeffery                    359 (0.2%)
+   T Karthik Reddy                   322 (0.2%)
+   Francesco Dolcini                 306 (0.2%)
+   Ye Li                             303 (0.2%)
+   Nate Drude                        275 (0.1%)
+   Dave Gerlach                      263 (0.1%)
+   Sergiu Moga                       260 (0.1%)
+   Tony Dinh                         256 (0.1%)
+   Sam Shih                          252 (0.1%)
+   Ivan Vozvakhov                    252 (0.1%)
+   Dzmitry Sankouski                 244 (0.1%)
+   Tommaso Merciai                   242 (0.1%)
+   Yannick Fertre                    217 (0.1%)
+   Clément Léger                     208 (0.1%)
+   Eddie James                       202 (0.1%)
+   Ilias Apalodimas                  190 (0.1%)
+   Philippe Schenker                 189 (0.1%)
+   Adarsh Babu Kalepalli             174 (0.1%)
+   Igor Opaniuk                      160 (0.1%)
+   Michael Walle                     159 (0.1%)
+   Lukasz Majewski                   157 (0.1%)
+   Josua Mayer                       137 (0.1%)
+   Vyacheslav Bocharov               131 (0.1%)
+   Stanley Chu                       131 (0.1%)
+   Gireesh Hiremath                  127 (0.1%)
+   Hari Nagalla                      126 (0.1%)
+   Leo Yu-Chi Liang                  116 (0.1%)
+   Luca Ellero                       107 (0.1%)
+   Chris Morgan                      100 (0.1%)
+   Peter Hoyes                       100 (0.1%)
+   Ji Luo                            100 (0.1%)
+   George Hilliard                   82 (0.0%)
+   Mark Kettenis                     79 (0.0%)
+   Frieder Schrempf                  78 (0.0%)
+   Heiko Thiery                      72 (0.0%)
+   Icenowy Zheng                     69 (0.0%)
+   Joel Stanley                      66 (0.0%)
+   Diego Rondini                     64 (0.0%)
+   Robert Marko                      63 (0.0%)
+   Dinesh Maniyam                    59 (0.0%)
+   Andrejs Cainikovs                 49 (0.0%)
+   Samuel Dionne-Riel                48 (0.0%)
+   Mihai Sain                        45 (0.0%)
+   Bin Meng                          41 (0.0%)
+   Loic Poulain                      40 (0.0%)
+   SESA644425                        40 (0.0%)
+   Masami Hiramatsu                  39 (0.0%)
+   Clement Faure                     39 (0.0%)
+   He Yong                           39 (0.0%)
+   Rasmus Villemoes                  38 (0.0%)
+   Jernej Skrabec                    37 (0.0%)
+   Jerome Forissier                  35 (0.0%)
+   Paul HENRYS                       31 (0.0%)
+   Jérôme Carretero                  30 (0.0%)
+   Paul Barbieri                     28 (0.0%)
+   Aswath Govindraju                 27 (0.0%)
+   Jan Kiszka                        26 (0.0%)
+   Jesse Taube                       26 (0.0%)
+   Nicolas Heemeryck                 23 (0.0%)
+   Ville Baillie                     23 (0.0%)
+   Andrew Davis                      22 (0.0%)
+   Kyle Evans                        22 (0.0%)
+   Peter Robinson                    21 (0.0%)
+   Romain Naour                      21 (0.0%)
+   Peter Cai                         21 (0.0%)
+   Hou Zhiqiang                      20 (0.0%)
+   Clark Wang                        20 (0.0%)
+   Sai Pavan Boddu                   18 (0.0%)
+   Amit Kumar Mahapatra              18 (0.0%)
+   Elmar Albert                      18 (0.0%)
+   Tudor Ambarus                     16 (0.0%)
+   Oleksandr Suvorov                 16 (0.0%)
+   Chris Packham                     15 (0.0%)
+   Vagrant Cascadian                 15 (0.0%)
+   Dominic Rath                      13 (0.0%)
+   Andrea Scian                      13 (0.0%)
+   Christoph Fritz                   13 (0.0%)
+   Nicolas Iooss                     12 (0.0%)
+   Miquel Raynal                     11 (0.0%)
+   Vishal Patel                      11 (0.0%)
+   Georgi Vlaev                      9 (0.0%)
+   Dario Binacchi                    8 (0.0%)
+   Teik Heng Chong                   8 (0.0%)
+   Piyush Mehta                      8 (0.0%)
+   Ovidiu Panait                     8 (0.0%)
+   John Keeping                      8 (0.0%)
+   Dhananjay Phadke                  8 (0.0%)
+   Tom Saeger                        8 (0.0%)
+   Tien Fong Chee                    7 (0.0%)
+   Stephen Carlson                   7 (0.0%)
+   Lyle Franklin                     7 (0.0%)
+   Felix Vietmeyer                   7 (0.0%)
+   Alexander Graf                    7 (0.0%)
+   Andrey Zhizhikin                  6 (0.0%)
+   Vignesh Raghavendra               6 (0.0%)
+   Christian Gmeiner                 6 (0.0%)
+   Haolin Li                         6 (0.0%)
+   Daniel Golle                      6 (0.0%)
+   Rick Chen                         5 (0.0%)
+   Ying-Chun Liu (PaulLiu)           5 (0.0%)
+   Rogier Stam                       5 (0.0%)
+   Alexandre Besnard                 5 (0.0%)
+   Angelo Dureghello                 5 (0.0%)
+   Christoph Niedermaier             4 (0.0%)
+   Hannes Schmelzer                  4 (0.0%)
+   Chunfeng Yun                      4 (0.0%)
+   Kshitiz Varshney                  4 (0.0%)
+   Yi Liu                            4 (0.0%)
+   Baltazár Radics                   4 (0.0%)
+   Christophe Leroy                  3 (0.0%)
+   Wasim Khan                        3 (0.0%)
+   Andrea zi0Black Cappa             3 (0.0%)
+   Sean Nyekjaer                     3 (0.0%)
+   Andy Shevchenko                   3 (0.0%)
+   Du Huanpeng                       2 (0.0%)
+   Vladimir Oltean                   2 (0.0%)
+   Camelia Groza                     2 (0.0%)
+   Sergei Antonov                    2 (0.0%)
+   Oliver Graute                     2 (0.0%)
+   Yuantian Tang                     2 (0.0%)
+   Oleksii Titov                     2 (0.0%)
+   Arjan Minzinga Zijlstra           2 (0.0%)
+   Oleksii Bidnichenko               2 (0.0%)
+   Clément Péron                     2 (0.0%)
+   Hajo Noerenberg                   2 (0.0%)
+   Sai Krishna Potthuri              2 (0.0%)
+   Emmanuel Vadot                    1 (0.0%)
+   qianfan Zhao                      1 (0.0%)
+   Yau Wai Gan                       1 (0.0%)
+   Corentin LABBE                    1 (0.0%)
+   Jorge Ramirez-Ortiz               1 (0.0%)
+   Ralph Siemsen                     1 (0.0%)
+   Josef Schlehofer                  1 (0.0%)
+   Andrew Abbott                     1 (0.0%)
+   Ian Ray                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          19724 (34.9%)
+   Denys Drozdov                     941 (1.7%)
+   Marcel Ziswiler                   430 (0.8%)
+   Stefan Roese                      331 (0.6%)
+   Marek Behún                       309 (0.5%)
+   Adam Ford                         247 (0.4%)
+   Tony Dinh                         187 (0.3%)
+   Igor Opaniuk                      134 (0.2%)
+   Leo Yu-Chi Liang                  116 (0.2%)
+   Etienne Carriere                  97 (0.2%)
+   Francesco Dolcini                 30 (0.1%)
+   Rasmus Villemoes                  19 (0.0%)
+   Hou Zhiqiang                      16 (0.0%)
+   Frieder Schrempf                  14 (0.0%)
+   John Keeping                      8 (0.0%)
+   Romain Naour                      5 (0.0%)
+   Ying-Chun Liu (PaulLiu)           5 (0.0%)
+   Ovidiu Panait                     3 (0.0%)
+   Vignesh Raghavendra               3 (0.0%)
+   Andrea zi0Black Cappa             2 (0.0%)
+   Andy Shevchenko                   2 (0.0%)
+   Peter Robinson                    1 (0.0%)
+   Josef Schlehofer                  1 (0.0%)
+   Ian Ray                           1 (0.0%)
+   ================================  =====
+
+
+.. table:: Developers with the most signoffs (total 266)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Andre Przywara                    50 (18.8%)
+   Michal Simek                      43 (16.2%)
+   Stefan Roese                      41 (15.4%)
+   Patrice Chotard                   23 (8.6%)
+   Peng Fan                          17 (6.4%)
+   Marcel Ziswiler                   16 (6.0%)
+   Neil Armstrong                    9 (3.4%)
+   Priyanka Jain                     7 (2.6%)
+   Michael Trimarchi                 6 (2.3%)
+   Johan Jonker                      5 (1.9%)
+   Tom Rini                          4 (1.5%)
+   Tom Warren                        4 (1.5%)
+   T Karthik Reddy                   4 (1.5%)
+   Stanley Chu                       4 (1.5%)
+   Samuel Holland                    4 (1.5%)
+   Yau Wai Gan                       2 (0.8%)
+   Jagan Teki                        2 (0.8%)
+   Biwen Li                          2 (0.8%)
+   Ye Li                             2 (0.8%)
+   Ilias Apalodimas                  2 (0.8%)
+   Heinrich Schuchardt               2 (0.8%)
+   Ariel D'Alessandro                2 (0.8%)
+   Amit Kumar Mahapatra              1 (0.4%)
+   Wolfgang Wallner                  1 (0.4%)
+   Alexandru M Stan                  1 (0.4%)
+   Kever Yang                        1 (0.4%)
+   Chee Hong Ang                     1 (0.4%)
+   Yifan Gu                          1 (0.4%)
+   Horia Geantă                      1 (0.4%)
+   Richard Weinberger                1 (0.4%)
+   Anatolij Gustschin                1 (0.4%)
+   Gabriel Fernandez                 1 (0.4%)
+   Christian Gmeiner                 1 (0.4%)
+   Sai Krishna Potthuri              1 (0.4%)
+   Josua Mayer                       1 (0.4%)
+   Masahisa Kojima                   1 (0.4%)
+   Ashok Reddy Soma                  1 (0.4%)
+   ================================  =====
+
+
+.. table:: Developers with the most reviews (total 871)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       100 (11.5%)
+   Fabio Estevam                     69 (7.9%)
+   Stefan Roese                      67 (7.7%)
+   Ramon Fried                       65 (7.5%)
+   Kever Yang                        63 (7.2%)
+   Priyanka Jain                     53 (6.1%)
+   Patrice Chotard                   38 (4.4%)
+   Patrick Delaunay                  38 (4.4%)
+   Heinrich Schuchardt               35 (4.0%)
+   Andre Przywara                    31 (3.6%)
+   Peng Fan                          26 (3.0%)
+   Bin Meng                          25 (2.9%)
+   Alper Nebi Yasak                  23 (2.6%)
+   Tom Rini                          21 (2.4%)
+   Marek Behún                       21 (2.4%)
+   Jaehoon Chung                     19 (2.2%)
+   Ye Li                             13 (1.5%)
+   Marek Vasut                       12 (1.4%)
+   Heiko Schocher                    9 (1.0%)
+   Tien Fong Chee                    9 (1.0%)
+   Sean Anderson                     9 (1.0%)
+   Vladimir Oltean                   8 (0.9%)
+   Ilias Apalodimas                  7 (0.8%)
+   Leo Yu-Chi Liang                  6 (0.7%)
+   Mark Kettenis                     6 (0.7%)
+   Neil Armstrong                    5 (0.6%)
+   Samuel Holland                    5 (0.6%)
+   Jagan Teki                        5 (0.6%)
+   Masami Hiramatsu                  5 (0.6%)
+   Gaurav Jain                       5 (0.6%)
+   Christian Gmeiner                 4 (0.5%)
+   Chia-Wei Wang                     4 (0.5%)
+   Claudiu Beznea                    4 (0.5%)
+   Pali Rohár                        4 (0.5%)
+   Ashok Reddy Soma                  3 (0.3%)
+   Francesco Dolcini                 3 (0.3%)
+   Nishanth Menon                    3 (0.3%)
+   Stefano Babic                     3 (0.3%)
+   Holger Brunck                     3 (0.3%)
+   Miquel Raynal                     3 (0.3%)
+   Michael Walle                     3 (0.3%)
+   Michal Simek                      2 (0.2%)
+   Michael Trimarchi                 2 (0.2%)
+   Tony Dinh                         2 (0.2%)
+   Frieder Schrempf                  2 (0.2%)
+   Minkyu Kang                       2 (0.2%)
+   Rick Chen                         2 (0.2%)
+   Tudor Ambarus                     2 (0.2%)
+   Joel Stanley                      2 (0.2%)
+   Tim Harvey                        2 (0.2%)
+   Marcel Ziswiler                   1 (0.1%)
+   John Keeping                      1 (0.1%)
+   Peter Robinson                    1 (0.1%)
+   Peter Collingbourne               1 (0.1%)
+   Pankaj Gupta                      1 (0.1%)
+   Han Xu                            1 (0.1%)
+   Radhey Shyam Pandey               1 (0.1%)
+   Philipp Tomsich                   1 (0.1%)
+   Thomas Chou                       1 (0.1%)
+   Kristian Amlie                    1 (0.1%)
+   Qu Wenruo                         1 (0.1%)
+   Jacky Bai                         1 (0.1%)
+   Ley Foon Tan                      1 (0.1%)
+   Dylan Hung                        1 (0.1%)
+   Andrey Zhizhikin                  1 (0.1%)
+   Kshitiz Varshney                  1 (0.1%)
+   Andrew Scull                      1 (0.1%)
+   Janne Grunau                      1 (0.1%)
+   ================================  =====
+
+
+.. table:: Developers with the most test credits (total 66)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tim Harvey                        15 (22.7%)
+   Patrice Chotard                   5 (7.6%)
+   Mark Kettenis                     4 (6.1%)
+   Adam Ford                         4 (6.1%)
+   Fabio Estevam                     3 (4.5%)
+   Marek Vasut                       3 (4.5%)
+   Marcel Ziswiler                   3 (4.5%)
+   Derald D. Woods                   3 (4.5%)
+   Pali Rohár                        2 (3.0%)
+   Ariel D'Alessandro                2 (3.0%)
+   Heiko Thiery                      2 (3.0%)
+   Andre Przywara                    1 (1.5%)
+   Chia-Wei Wang                     1 (1.5%)
+   Stefano Babic                     1 (1.5%)
+   Frieder Schrempf                  1 (1.5%)
+   John Keeping                      1 (1.5%)
+   Peter Robinson                    1 (1.5%)
+   Peter Collingbourne               1 (1.5%)
+   Kshitiz Varshney                  1 (1.5%)
+   Janne Grunau                      1 (1.5%)
+   Josua Mayer                       1 (1.5%)
+   Ying-Chun Liu (PaulLiu)           1 (1.5%)
+   Peter Griffin                     1 (1.5%)
+   Tatsuhiko Yasumatsu               1 (1.5%)
+   Jincheng Wang                     1 (1.5%)
+   Gabriel Hojda                     1 (1.5%)
+   Arti Zirk                         1 (1.5%)
+   Merlijn Wajer                     1 (1.5%)
+   Soeren Moch                       1 (1.5%)
+   Raffaele RECALCATI                1 (1.5%)
+   Angus Ainslie                     1 (1.5%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 67)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Marek Vasut                       14 (20.9%)
+   Fabio Estevam                     6 (9.0%)
+   Michael Trimarchi                 6 (9.0%)
+   Heiko Thiery                      4 (6.0%)
+   Adam Ford                         3 (4.5%)
+   Heinrich Schuchardt               3 (4.5%)
+   Tom Rini                          3 (4.5%)
+   Pali Rohár                        2 (3.0%)
+   Andre Przywara                    2 (3.0%)
+   Frieder Schrempf                  2 (3.0%)
+   Janne Grunau                      2 (3.0%)
+   Miquel Raynal                     2 (3.0%)
+   Masahisa Kojima                   2 (3.0%)
+   Tim Harvey                        1 (1.5%)
+   Mark Kettenis                     1 (1.5%)
+   Angus Ainslie                     1 (1.5%)
+   Simon Glass                       1 (1.5%)
+   Peng Fan                          1 (1.5%)
+   Marek Behún                       1 (1.5%)
+   Ye Li                             1 (1.5%)
+   Gaurav Jain                       1 (1.5%)
+   Joel Stanley                      1 (1.5%)
+   Rasmus Villemoes                  1 (1.5%)
+   Christoph Niedermaier             1 (1.5%)
+   Peter Cai                         1 (1.5%)
+   Jerome Forissier                  1 (1.5%)
+   Andrejs Cainikovs                 1 (1.5%)
+   Nate Drude                        1 (1.5%)
+   AKASHI Takahiro                   1 (1.5%)
+   ================================  =====
+
+
+.. table:: Developers with the most report credits (total 19)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Tom Rini                          2 (10.5%)
+   Patrick Delaunay                  2 (10.5%)
+   Fabio Estevam                     1 (5.3%)
+   Tim Harvey                        1 (5.3%)
+   Tatsuhiko Yasumatsu               1 (5.3%)
+   Jincheng Wang                     1 (5.3%)
+   Gabriel Hojda                     1 (5.3%)
+   Nishanth Menon                    1 (5.3%)
+   Milan P. Stanić                   1 (5.3%)
+   Yun-Chien Yu                      1 (5.3%)
+   Nicolas Bidron                    1 (5.3%)
+   Balaji Anandapadmanaban           1 (5.3%)
+   David Mosberger-Tang              1 (5.3%)
+   Jesse Villarreal                  1 (5.3%)
+   Suman Anna                        1 (5.3%)
+   Vagrant Cascadian                 1 (5.3%)
+   Chris Morgan                      1 (5.3%)
+   ================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 19)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   Simon Glass                       5 (26.3%)
+   Andre Przywara                    3 (15.8%)
+   Heinrich Schuchardt               2 (10.5%)
+   Miquel Raynal                     2 (10.5%)
+   Aswath Govindraju                 2 (10.5%)
+   Tom Rini                          1 (5.3%)
+   Fabio Estevam                     1 (5.3%)
+   Samuel Holland                    1 (5.3%)
+   Tudor Ambarus                     1 (5.3%)
+   Chunfeng Yun                      1 (5.3%)
+   ================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         669 (39.4%)
+   Google, Inc.                      168 (9.9%)
+   Konsulko Group                    164 (9.7%)
+   DENX Software Engineering         147 (8.7%)
+   NXP                               112 (6.6%)
+   Linaro                            80 (4.7%)
+   ST Microelectronics               53 (3.1%)
+   AMD                               51 (3.0%)
+   Marvell                           40 (2.4%)
+   Xilinx                            39 (2.3%)
+   ARM                               34 (2.0%)
+   Toradex                           33 (1.9%)
+   Texas Instruments                 27 (1.6%)
+   Amarula Solutions                 24 (1.4%)
+   Intel                             12 (0.7%)
+   Semihalf Embedded Systems         11 (0.6%)
+   Bootlin                           7 (0.4%)
+   BayLibre SAS                      5 (0.3%)
+   Collabora Ltd.                    5 (0.3%)
+   Siemens                           4 (0.2%)
+   Debian.org                        3 (0.2%)
+   IBM                               3 (0.2%)
+   Wind River                        1 (0.1%)
+   Dave S.r.l.                       1 (0.1%)
+   General Electric                  1 (0.1%)
+   Oracle                            1 (0.1%)
+   Rockchip                          1 (0.1%)
+   ================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         63402 (34.0%)
+   Marvell                           31473 (16.9%)
+   Konsulko Group                    25599 (13.7%)
+   DENX Software Engineering         22078 (11.9%)
+   Google, Inc.                      18578 (10.0%)
+   NXP                               4382 (2.4%)
+   Linaro                            4183 (2.2%)
+   Collabora Ltd.                    3358 (1.8%)
+   ST Microelectronics               2455 (1.3%)
+   Xilinx                            2277 (1.2%)
+   Toradex                           2140 (1.1%)
+   ARM                               1787 (1.0%)
+   Semihalf Embedded Systems         1162 (0.6%)
+   AMD                               1061 (0.6%)
+   Amarula Solutions                 643 (0.3%)
+   BayLibre SAS                      599 (0.3%)
+   Texas Instruments                 453 (0.2%)
+   Bootlin                           219 (0.1%)
+   IBM                               202 (0.1%)
+   Intel                             78 (0.0%)
+   Siemens                           26 (0.0%)
+   Debian.org                        15 (0.0%)
+   Dave S.r.l.                       13 (0.0%)
+   Wind River                        8 (0.0%)
+   Oracle                            8 (0.0%)
+   Rockchip                          4 (0.0%)
+   General Electric                  1 (0.0%)
+   ================================  =====
+
+
+.. table:: Employers with the most signoffs (total 266)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   ARM                               50 (18.8%)
+   DENX Software Engineering         42 (15.8%)
+   Xilinx                            39 (14.7%)
+   NXP                               29 (10.9%)
+   ST Microelectronics               24 (9.0%)
+   (Unknown)                         21 (7.9%)
+   Toradex                           16 (6.0%)
+   AMD                               11 (4.1%)
+   BayLibre SAS                      9 (3.4%)
+   Amarula Solutions                 8 (3.0%)
+   Konsulko Group                    4 (1.5%)
+   NVidia                            4 (1.5%)
+   Linaro                            3 (1.1%)
+   Intel                             3 (1.1%)
+   Collabora Ltd.                    2 (0.8%)
+   Rockchip                          1 (0.4%)
+   ================================  =====
+
+
+.. table:: Employers with the most hackers (total 185)
+   :widths: auto
+
+   ================================  =====
+   Name                              Count
+   ================================  =====
+   (Unknown)                         102 (55.1%)
+   NXP                               12 (6.5%)
+   Linaro                            10 (5.4%)
+   Xilinx                            9 (4.9%)
+   Toradex                           7 (3.8%)
+   Texas Instruments                 6 (3.2%)
+   DENX Software Engineering         5 (2.7%)
+   Intel                             5 (2.7%)
+   ARM                               3 (1.6%)
+   ST Microelectronics               3 (1.6%)
+   Amarula Solutions                 3 (1.6%)
+   AMD                               2 (1.1%)
+   BayLibre SAS                      2 (1.1%)
+   Google, Inc.                      2 (1.1%)
+   Bootlin                           2 (1.1%)
+   Konsulko Group                    1 (0.5%)
+   Collabora Ltd.                    1 (0.5%)
+   Rockchip                          1 (0.5%)
+   Marvell                           1 (0.5%)
+   Semihalf Embedded Systems         1 (0.5%)
+   IBM                               1 (0.5%)
+   Siemens                           1 (0.5%)
+   Debian.org                        1 (0.5%)
+   Dave S.r.l.                       1 (0.5%)
+   Wind River                        1 (0.5%)
+   Oracle                            1 (0.5%)
+   General Electric                  1 (0.5%)
+   ================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2022.10.rst b/doc/develop/statistics/u-boot-stats-v2022.10.rst
new file mode 100644
index 00000000000..7a5fc2edc7c
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2022.10.rst
@@ -0,0 +1,728 @@
+:orphan:
+
+Release Statistics for U-Boot v2022.10
+======================================
+
+* Processed 1521 changesets from 151 developers
+
+* 25 employers found
+
+* A total of 162770 lines added, 76810 removed (delta 85960)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              265 (17.4%)
+   Pali Rohár                            133 (8.7%)
+   Simon Glass                           110 (7.2%)
+   Heinrich Schuchardt                   58 (3.8%)
+   Patrick Delaunay                      56 (3.7%)
+   Peng Fan                              55 (3.6%)
+   Michal Simek                          51 (3.4%)
+   Sean Anderson                         50 (3.3%)
+   Stefan Herbrechtsmeier                41 (2.7%)
+   Marcel Ziswiler                       31 (2.0%)
+   Michael Walle                         31 (2.0%)
+   Joel Stanley                          28 (1.8%)
+   Weijie Gao                            26 (1.7%)
+   Andrew Scull                          25 (1.6%)
+   Marek Vasut                           24 (1.6%)
+   Quentin Schulz                        23 (1.5%)
+   Etienne Carriere                      20 (1.3%)
+   Michael Trimarchi                     17 (1.1%)
+   Rasmus Villemoes                      17 (1.1%)
+   Ovidiu Panait                         17 (1.1%)
+   Ashok Reddy Soma                      15 (1.0%)
+   Oleksandr Suvorov                     14 (0.9%)
+   Ye Li                                 14 (0.9%)
+   Samuel Holland                        14 (0.9%)
+   Andrew Davis                          13 (0.9%)
+   T Karthik Reddy                       13 (0.9%)
+   Jim Liu                               12 (0.8%)
+   Chris Packham                         12 (0.8%)
+   Alper Nebi Yasak                      12 (0.8%)
+   Vaishnav Achath                       12 (0.8%)
+   Fabio Estevam                         10 (0.7%)
+   Sumit Garg                            9 (0.6%)
+   Nick Hawkins                          9 (0.6%)
+   Andre Przywara                        8 (0.5%)
+   Marek Behún                           8 (0.5%)
+   Jesse Taube                           8 (0.5%)
+   Patrice Chotard                       7 (0.5%)
+   Francesco Dolcini                     7 (0.5%)
+   Sughosh Ganu                          7 (0.5%)
+   Mamta Shukla                          7 (0.5%)
+   Stefan Roese                          6 (0.4%)
+   Tim Harvey                            6 (0.4%)
+   Masahisa Kojima                       6 (0.4%)
+   Eugen Hristev                         6 (0.4%)
+   Suman Anna                            6 (0.4%)
+   Nishanth Menon                        5 (0.3%)
+   Heiko Thiery                          5 (0.3%)
+   Vignesh Raghavendra                   5 (0.3%)
+   Philippe Schenker                     5 (0.3%)
+   Robert Marko                          5 (0.3%)
+   Rui Miguel Silva                      5 (0.3%)
+   Georgi Vlaev                          5 (0.3%)
+   Aswath Govindraju                     5 (0.3%)
+   Loic Poulain                          5 (0.3%)
+   Pierre-Clément Tosi                   4 (0.3%)
+   Michal Suchanek                       4 (0.3%)
+   Philip Oberfichtner                   4 (0.3%)
+   JaimeLiao                             4 (0.3%)
+   Angus Ainslie                         3 (0.2%)
+   Tony Dinh                             3 (0.2%)
+   Alain Volmat                          3 (0.2%)
+   Icenowy Zheng                         3 (0.2%)
+   John Keeping                          3 (0.2%)
+   Lee Jones                             3 (0.2%)
+   Geert Uytterhoeven                    3 (0.2%)
+   Paul Barker                           3 (0.2%)
+   Nikita Shubin                         3 (0.2%)
+   Kunihiko Hayashi                      3 (0.2%)
+   Ying-Chun Liu (PaulLiu)               3 (0.2%)
+   Alice Guo                             3 (0.2%)
+   Julien Panis                          3 (0.2%)
+   Sergiu Moga                           3 (0.2%)
+   Anthoine Bourgeois                    3 (0.2%)
+   Derald D. Woods                       3 (0.2%)
+   Johannes Schneider                    2 (0.1%)
+   Denys Drozdov                         2 (0.1%)
+   Gaurav Jain                           2 (0.1%)
+   Jorge Ramirez-Ortiz                   2 (0.1%)
+   Jose Marinho                          2 (0.1%)
+   Daniel Golle                          2 (0.1%)
+   Matwey V. Kornilov                    2 (0.1%)
+   Neil Armstrong                        2 (0.1%)
+   Kory Maincent                         2 (0.1%)
+   Dmytro Firsov                         2 (0.1%)
+   Chia-Wei Wang                         2 (0.1%)
+   Alexander Dahl                        2 (0.1%)
+   Matt Ranostay                         2 (0.1%)
+   Janne Grunau                          2 (0.1%)
+   Eddie James                           2 (0.1%)
+   Jan Kiszka                            2 (0.1%)
+   Ilias Apalodimas                      1 (0.1%)
+   Miaoqian Lin                          1 (0.1%)
+   Pankaj Raghav                         1 (0.1%)
+   Alison Huffman                        1 (0.1%)
+   Adam Ford                             1 (0.1%)
+   Michal Vasilek                        1 (0.1%)
+   Leo Yu-Chi Liang                      1 (0.1%)
+   Siarhei Yasinski                      1 (0.1%)
+   Ramon Fried                           1 (0.1%)
+   Jessica Clarke                        1 (0.1%)
+   Johan Jonker                          1 (0.1%)
+   Han Pengfei                           1 (0.1%)
+   qianfan Zhao                          1 (0.1%)
+   Mark Kettenis                         1 (0.1%)
+   Roger Knecht                          1 (0.1%)
+   Dario Binacchi                        1 (0.1%)
+   Sergei Antonov                        1 (0.1%)
+   Hector Martin                         1 (0.1%)
+   Holger Brunck                         1 (0.1%)
+   Dhananjay Phadke                      1 (0.1%)
+   Billy Tsai                            1 (0.1%)
+   AKASHI Takahiro                       1 (0.1%)
+   Camelia Groza                         1 (0.1%)
+   Joao Marcos Costa                     1 (0.1%)
+   Milan P. Stanić                       1 (0.1%)
+   Zev Weiss                             1 (0.1%)
+   Christophe Leroy                      1 (0.1%)
+   Andre Kalb                            1 (0.1%)
+   Jerome Brunet                         1 (0.1%)
+   Harald Seiler                         1 (0.1%)
+   Vyacheslav Bocharov                   1 (0.1%)
+   Martin Bonner                         1 (0.1%)
+   Konstantin Porotchkin                 1 (0.1%)
+   Jian Li                               1 (0.1%)
+   Martyn Welch                          1 (0.1%)
+   Jun Nie                               1 (0.1%)
+   Douglas Anderson                      1 (0.1%)
+   Siva Durga Prasad Paladugu            1 (0.1%)
+   Adrian Fiergolski                     1 (0.1%)
+   Ayan Kumar Halder                     1 (0.1%)
+   Yogesh Siraswar                       1 (0.1%)
+   Stephan Gerhold                       1 (0.1%)
+   Anand Gadiyar                         1 (0.1%)
+   Ramin Zaghi                           1 (0.1%)
+   Josua Mayer                           1 (0.1%)
+   Paul Doelle                           1 (0.1%)
+   Philippe Boos                         1 (0.1%)
+   Vincent Stehlé                        1 (0.1%)
+   Jae Hyun Yoo                          1 (0.1%)
+   Markus Hoffrogge                      1 (0.1%)
+   Johann Neuhauser                      1 (0.1%)
+   Lionel Debieve                        1 (0.1%)
+   Ralph Siemsen                         1 (0.1%)
+   Rafał Miłecki                         1 (0.1%)
+   Rogier Stam                           1 (0.1%)
+   Bryan Brattlof                        1 (0.1%)
+   Mihai Sain                            1 (0.1%)
+   Amit Kumar Mahapatra                  1 (0.1%)
+   Alison Wang                           1 (0.1%)
+   William Zhang                         1 (0.1%)
+   Judy Wang                             1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              98915 (47.3%)
+   Marcel Ziswiler                       19704 (9.4%)
+   Peng Fan                              8817 (4.2%)
+   Simon Glass                           7600 (3.6%)
+   Stefan Herbrechtsmeier                6191 (3.0%)
+   Jim Liu                               6080 (2.9%)
+   Weijie Gao                            5883 (2.8%)
+   Angus Ainslie                         5426 (2.6%)
+   Rui Miguel Silva                      4502 (2.2%)
+   Pali Rohár                            4121 (2.0%)
+   Patrick Delaunay                      3695 (1.8%)
+   Jesse Taube                           2771 (1.3%)
+   Ye Li                                 2675 (1.3%)
+   Nishanth Menon                        2621 (1.3%)
+   Marek Vasut                           2401 (1.1%)
+   Michal Simek                          2303 (1.1%)
+   Sean Anderson                         2264 (1.1%)
+   Suman Anna                            1842 (0.9%)
+   Sumit Garg                            1431 (0.7%)
+   Michael Trimarchi                     1353 (0.6%)
+   Andrew Scull                          1093 (0.5%)
+   Holger Brunck                         1089 (0.5%)
+   Heinrich Schuchardt                   969 (0.5%)
+   Ovidiu Panait                         895 (0.4%)
+   Nick Hawkins                          883 (0.4%)
+   Etienne Carriere                      858 (0.4%)
+   T Karthik Reddy                       778 (0.4%)
+   Fabio Estevam                         655 (0.3%)
+   Samuel Holland                        619 (0.3%)
+   Vignesh Raghavendra                   586 (0.3%)
+   Michael Walle                         509 (0.2%)
+   Alper Nebi Yasak                      420 (0.2%)
+   Andrew Davis                          395 (0.2%)
+   Anthoine Bourgeois                    394 (0.2%)
+   Mamta Shukla                          376 (0.2%)
+   Loic Poulain                          364 (0.2%)
+   Francesco Dolcini                     360 (0.2%)
+   Robert Marko                          350 (0.2%)
+   Quentin Schulz                        337 (0.2%)
+   Joel Stanley                          318 (0.2%)
+   William Zhang                         315 (0.2%)
+   Philip Oberfichtner                   302 (0.1%)
+   Chris Packham                         297 (0.1%)
+   Vaishnav Achath                       285 (0.1%)
+   Ashok Reddy Soma                      235 (0.1%)
+   Milan P. Stanić                       230 (0.1%)
+   Rasmus Villemoes                      211 (0.1%)
+   Oleksandr Suvorov                     200 (0.1%)
+   Sughosh Ganu                          199 (0.1%)
+   Ramon Fried                           183 (0.1%)
+   Andre Przywara                        182 (0.1%)
+   Stefan Roese                          178 (0.1%)
+   JaimeLiao                             176 (0.1%)
+   Tim Harvey                            163 (0.1%)
+   Philippe Boos                         146 (0.1%)
+   Eugen Hristev                         143 (0.1%)
+   Icenowy Zheng                         143 (0.1%)
+   Neil Armstrong                        134 (0.1%)
+   Chia-Wei Wang                         132 (0.1%)
+   Matwey V. Kornilov                    131 (0.1%)
+   Philippe Schenker                     127 (0.1%)
+   Jose Marinho                          111 (0.1%)
+   Alice Guo                             110 (0.1%)
+   Tony Dinh                             109 (0.1%)
+   Christophe Leroy                      104 (0.0%)
+   Paul Doelle                           90 (0.0%)
+   Michal Suchanek                       79 (0.0%)
+   Geert Uytterhoeven                    71 (0.0%)
+   Georgi Vlaev                          69 (0.0%)
+   Gaurav Jain                           68 (0.0%)
+   Rafał Miłecki                         67 (0.0%)
+   Marek Behún                           66 (0.0%)
+   Ying-Chun Liu (PaulLiu)               62 (0.0%)
+   Matt Ranostay                         61 (0.0%)
+   Camelia Groza                         55 (0.0%)
+   Dhananjay Phadke                      51 (0.0%)
+   Patrice Chotard                       50 (0.0%)
+   Masahisa Kojima                       47 (0.0%)
+   Lionel Debieve                        47 (0.0%)
+   Julien Panis                          45 (0.0%)
+   Heiko Thiery                          43 (0.0%)
+   Aswath Govindraju                     40 (0.0%)
+   Sergiu Moga                           40 (0.0%)
+   Dmytro Firsov                         36 (0.0%)
+   Eddie James                           34 (0.0%)
+   Kory Maincent                         32 (0.0%)
+   Ayan Kumar Halder                     30 (0.0%)
+   Jan Kiszka                            28 (0.0%)
+   Lee Jones                             26 (0.0%)
+   Martin Bonner                         26 (0.0%)
+   Pierre-Clément Tosi                   24 (0.0%)
+   Paul Barker                           23 (0.0%)
+   Alexander Dahl                        21 (0.0%)
+   John Keeping                          20 (0.0%)
+   Janne Grunau                          20 (0.0%)
+   Hector Martin                         20 (0.0%)
+   Jian Li                               20 (0.0%)
+   Douglas Anderson                      19 (0.0%)
+   Yogesh Siraswar                       19 (0.0%)
+   Kunihiko Hayashi                      18 (0.0%)
+   Daniel Golle                          15 (0.0%)
+   Harald Seiler                         15 (0.0%)
+   Adrian Fiergolski                     15 (0.0%)
+   Derald D. Woods                       14 (0.0%)
+   Johannes Schneider                    14 (0.0%)
+   Leo Yu-Chi Liang                      14 (0.0%)
+   Jessica Clarke                        14 (0.0%)
+   Stephan Gerhold                       14 (0.0%)
+   Alison Wang                           14 (0.0%)
+   Siva Durga Prasad Paladugu            12 (0.0%)
+   Josua Mayer                           12 (0.0%)
+   Rogier Stam                           12 (0.0%)
+   Alain Volmat                          11 (0.0%)
+   Nikita Shubin                         11 (0.0%)
+   AKASHI Takahiro                       11 (0.0%)
+   Bryan Brattlof                        11 (0.0%)
+   Andre Kalb                            10 (0.0%)
+   Jae Hyun Yoo                          10 (0.0%)
+   Jun Nie                               9 (0.0%)
+   Judy Wang                             9 (0.0%)
+   Johan Jonker                          8 (0.0%)
+   Jorge Ramirez-Ortiz                   7 (0.0%)
+   Ilias Apalodimas                      7 (0.0%)
+   Siarhei Yasinski                      7 (0.0%)
+   Dario Binacchi                        7 (0.0%)
+   Vyacheslav Bocharov                   7 (0.0%)
+   Denys Drozdov                         6 (0.0%)
+   Michal Vasilek                        6 (0.0%)
+   Jerome Brunet                         6 (0.0%)
+   Mihai Sain                            6 (0.0%)
+   Vincent Stehlé                        5 (0.0%)
+   Miaoqian Lin                          4 (0.0%)
+   Adam Ford                             4 (0.0%)
+   Alison Huffman                        3 (0.0%)
+   Konstantin Porotchkin                 3 (0.0%)
+   Ralph Siemsen                         3 (0.0%)
+   Pankaj Raghav                         2 (0.0%)
+   Han Pengfei                           2 (0.0%)
+   Zev Weiss                             2 (0.0%)
+   Johann Neuhauser                      2 (0.0%)
+   qianfan Zhao                          1 (0.0%)
+   Mark Kettenis                         1 (0.0%)
+   Roger Knecht                          1 (0.0%)
+   Sergei Antonov                        1 (0.0%)
+   Billy Tsai                            1 (0.0%)
+   Joao Marcos Costa                     1 (0.0%)
+   Martyn Welch                          1 (0.0%)
+   Anand Gadiyar                         1 (0.0%)
+   Ramin Zaghi                           1 (0.0%)
+   Markus Hoffrogge                      1 (0.0%)
+   Amit Kumar Mahapatra                  1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Marek Vasut                           1245 (1.6%)
+   Holger Brunck                         1086 (1.4%)
+   Chris Packham                         213 (0.3%)
+   Samuel Holland                        206 (0.3%)
+   Francesco Dolcini                     186 (0.2%)
+   Icenowy Zheng                         34 (0.0%)
+   Ayan Kumar Halder                     30 (0.0%)
+   Eugen Hristev                         12 (0.0%)
+   Andre Przywara                        11 (0.0%)
+   AKASHI Takahiro                       9 (0.0%)
+   Heiko Thiery                          7 (0.0%)
+   Alexander Dahl                        7 (0.0%)
+   Daniel Golle                          6 (0.0%)
+   Bryan Brattlof                        6 (0.0%)
+   Denys Drozdov                         6 (0.0%)
+   Derald D. Woods                       3 (0.0%)
+   Jerome Brunet                         3 (0.0%)
+   Alain Volmat                          2 (0.0%)
+   Pankaj Raghav                         2 (0.0%)
+   Johann Neuhauser                      2 (0.0%)
+   Anand Gadiyar                         1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most signoffs (total 266)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Michal Simek                          81 (30.5%)
+   Peng Fan                              41 (15.4%)
+   Andre Przywara                        16 (6.0%)
+   Ilias Apalodimas                      14 (5.3%)
+   Dario Binacchi                        14 (5.3%)
+   Marek Behún                           12 (4.5%)
+   Ashok Reddy Soma                      11 (4.1%)
+   Vignesh Raghavendra                   9 (3.4%)
+   Thomas Haemmerle                      7 (2.6%)
+   Ye Li                                 7 (2.6%)
+   Tom Rini                              6 (2.3%)
+   Heinrich Schuchardt                   5 (1.9%)
+   Satoru Okamoto                        4 (1.5%)
+   Aswath Govindraju                     4 (1.5%)
+   Simon Glass                           4 (1.5%)
+   Francesco Dolcini                     2 (0.8%)
+   Andrejs Cainikovs                     2 (0.8%)
+   Dave Gerlach                          2 (0.8%)
+   Gowtham Tammana                       2 (0.8%)
+   Alper Nebi Yasak                      2 (0.8%)
+   T Karthik Reddy                       2 (0.8%)
+   Nishanth Menon                        2 (0.8%)
+   Samuel Holland                        1 (0.4%)
+   Sebastian Krzyszkowiak                1 (0.4%)
+   Masami Hiramatsu                      1 (0.4%)
+   Jassi Brar                            1 (0.4%)
+   Rick Chen                             1 (0.4%)
+   Oliver Brown                          1 (0.4%)
+   Yangbo Lu                             1 (0.4%)
+   Yann Gautier                          1 (0.4%)
+   Kursad Oney                           1 (0.4%)
+   Anand Gore                            1 (0.4%)
+   Jorge Ramirez-Ortiz                   1 (0.4%)
+   Adrian Fiergolski                     1 (0.4%)
+   Alice Guo                             1 (0.4%)
+   Neil Armstrong                        1 (0.4%)
+   Oleksandr Suvorov                     1 (0.4%)
+   Joel Stanley                          1 (0.4%)
+   Patrick Delaunay                      1 (0.4%)
+   ====================================  =====
+
+
+.. table:: Developers with the most reviews (total 704)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           148 (21.0%)
+   Stefan Roese                          123 (17.5%)
+   Patrice Chotard                       60 (8.5%)
+   Tom Rini                              40 (5.7%)
+   Ramon Fried                           28 (4.0%)
+   Fabio Estevam                         27 (3.8%)
+   Ilias Apalodimas                      20 (2.8%)
+   Heinrich Schuchardt                   18 (2.6%)
+   Marek Behún                           16 (2.3%)
+   Heiko Schocher                        16 (2.3%)
+   Jaehoon Chung                         15 (2.1%)
+   Kever Yang                            15 (2.1%)
+   Andre Przywara                        12 (1.7%)
+   Patrick Delaunay                      11 (1.6%)
+   Daniel Schwierzeck                    11 (1.6%)
+   Peng Fan                              9 (1.3%)
+   Jagan Teki                            9 (1.3%)
+   ryan_chen                             8 (1.1%)
+   Leo Yu-Chi Liang                      8 (1.1%)
+   Pali Rohár                            8 (1.1%)
+   Alper Nebi Yasak                      7 (1.0%)
+   Cédric Le Goater                      7 (1.0%)
+   Marek Vasut                           6 (0.9%)
+   Chia-Wei Wang                         6 (0.9%)
+   Francesco Dolcini                     5 (0.7%)
+   Bin Meng                              4 (0.6%)
+   Minkyu Kang                           4 (0.6%)
+   Sean Anderson                         4 (0.6%)
+   Anastasiia Lukianenko                 3 (0.4%)
+   Andrey Zhizhikin                      3 (0.4%)
+   Tudor Ambarus                         3 (0.4%)
+   Michael Trimarchi                     3 (0.4%)
+   Neil Armstrong                        2 (0.3%)
+   Mark Kettenis                         2 (0.3%)
+   Qu Wenruo                             2 (0.3%)
+   Frieder Schrempf                      2 (0.3%)
+   Grzegorz Szymaszek                    2 (0.3%)
+   Xavier Drudis Ferran                  2 (0.3%)
+   Artem Lapkin                          2 (0.3%)
+   Vladimir Oltean                       2 (0.3%)
+   Michael Walle                         2 (0.3%)
+   Ye Li                                 1 (0.1%)
+   Dave Gerlach                          1 (0.1%)
+   Nishanth Menon                        1 (0.1%)
+   Rick Chen                             1 (0.1%)
+   Joel Stanley                          1 (0.1%)
+   Holger Brunck                         1 (0.1%)
+   Chris Packham                         1 (0.1%)
+   Heiko Thiery                          1 (0.1%)
+   Bryan Brattlof                        1 (0.1%)
+   Jerome Brunet                         1 (0.1%)
+   Alain Volmat                          1 (0.1%)
+   Philipp Tomsich                       1 (0.1%)
+   Jonathan Gray                         1 (0.1%)
+   Huang Jianan                          1 (0.1%)
+   Anup Patel                            1 (0.1%)
+   Igal Liberman                         1 (0.1%)
+   Baruch Siach                          1 (0.1%)
+   Miquel Raynal                         1 (0.1%)
+   Mattijs Korpershoek                   1 (0.1%)
+   Pratyush Yadav                        1 (0.1%)
+   Neal Liu                              1 (0.1%)
+   Ariel D'Alessandro                    1 (0.1%)
+   Philippe Reynes                       1 (0.1%)
+   Anand Jain                            1 (0.1%)
+   Billy Tsai                            1 (0.1%)
+   Kory Maincent                         1 (0.1%)
+   John Keeping                          1 (0.1%)
+   Etienne Carriere                      1 (0.1%)
+   Sumit Garg                            1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most test credits (total 72)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Adrian Fiergolski                     12 (16.7%)
+   Ricardo Salveti                       12 (16.7%)
+   Adam Ford                             9 (12.5%)
+   Marek Vasut                           5 (6.9%)
+   Xavier Drudis Ferran                  5 (6.9%)
+   Stefan Roese                          3 (4.2%)
+   Artem Lapkin                          3 (4.2%)
+   Tim Harvey                            3 (4.2%)
+   Patrick Delaunay                      2 (2.8%)
+   Frieder Schrempf                      2 (2.8%)
+   Teresa Remmet                         2 (2.8%)
+   Tony Dinh                             2 (2.8%)
+   Heinrich Schuchardt                   1 (1.4%)
+   Alper Nebi Yasak                      1 (1.4%)
+   Mark Kettenis                         1 (1.4%)
+   Heiko Thiery                          1 (1.4%)
+   Ariel D'Alessandro                    1 (1.4%)
+   Etienne Carriere                      1 (1.4%)
+   Peter Hoyes                           1 (1.4%)
+   Paweł Anikiel                         1 (1.4%)
+   Sergiu Moga                           1 (1.4%)
+   Michal Suchanek                       1 (1.4%)
+   Georgi Vlaev                          1 (1.4%)
+   Ovidiu Panait                         1 (1.4%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 72)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Oleksandr Suvorov                     23 (31.9%)
+   Peng Fan                              11 (15.3%)
+   Mamta Shukla                          7 (9.7%)
+   Pali Rohár                            5 (6.9%)
+   Quentin Schulz                        5 (6.9%)
+   Lee Jones                             4 (5.6%)
+   Philip Oberfichtner                   3 (4.2%)
+   Patrick Delaunay                      2 (2.8%)
+   Adrian Fiergolski                     1 (1.4%)
+   Stefan Roese                          1 (1.4%)
+   Heinrich Schuchardt                   1 (1.4%)
+   Andre Przywara                        1 (1.4%)
+   Sean Anderson                         1 (1.4%)
+   Alain Volmat                          1 (1.4%)
+   Michal Simek                          1 (1.4%)
+   Vignesh Raghavendra                   1 (1.4%)
+   Jorge Ramirez-Ortiz                   1 (1.4%)
+   Eugen Hristev                         1 (1.4%)
+   Hector Martin                         1 (1.4%)
+   Sughosh Ganu                          1 (1.4%)
+   ====================================  =====
+
+
+.. table:: Developers with the most report credits (total 24)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Pali Rohár                            4 (16.7%)
+   Tom Rini                              2 (8.3%)
+   Heinrich Schuchardt                   1 (4.2%)
+   Jorge Ramirez-Ortiz                   1 (4.2%)
+   Heiko Thiery                          1 (4.2%)
+   Etienne Carriere                      1 (4.2%)
+   Sergiu Moga                           1 (4.2%)
+   Ovidiu Panait                         1 (4.2%)
+   Marek Behún                           1 (4.2%)
+   Johan Jonker                          1 (4.2%)
+   Sergei Antonov                        1 (4.2%)
+   Jason Kridner                         1 (4.2%)
+   Bin Liu                               1 (4.2%)
+   George Hilliard                       1 (4.2%)
+   Gatien CHEVALLIER                     1 (4.2%)
+   Andrew Walbran                        1 (4.2%)
+   Gan, Yau Wai"                         1 (4.2%)
+   Michal Vasilek                        1 (4.2%)
+   Jan Kiszka                            1 (4.2%)
+   Jesse Taube                           1 (4.2%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 24)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              4 (16.7%)
+   Heinrich Schuchardt                   3 (12.5%)
+   Simon Glass                           3 (12.5%)
+   Pali Rohár                            2 (8.3%)
+   Andre Przywara                        2 (8.3%)
+   Peng Fan                              1 (4.2%)
+   Quentin Schulz                        1 (4.2%)
+   Patrick Delaunay                      1 (4.2%)
+   Alain Volmat                          1 (4.2%)
+   Michal Simek                          1 (4.2%)
+   Eugen Hristev                         1 (4.2%)
+   Fabio Estevam                         1 (4.2%)
+   Nishanth Menon                        1 (4.2%)
+   Anand Gadiyar                         1 (4.2%)
+   Pierre-Clément Tosi                   1 (4.2%)
+   ====================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             584 (38.4%)
+   Konsulko Group                        265 (17.4%)
+   Google, Inc.                          141 (9.3%)
+   NXP                                   77 (5.1%)
+   AMD                                   70 (4.6%)
+   ST Microelectronics                   67 (4.4%)
+   Linaro                                60 (3.9%)
+   Texas Instruments                     56 (3.7%)
+   DENX Software Engineering             45 (3.0%)
+   Toradex                               45 (3.0%)
+   Weidmüller Interface GmbH & Co. KG    41 (2.7%)
+   Amarula Solutions                     18 (1.2%)
+   Xilinx                                12 (0.8%)
+   ARM                                   11 (0.7%)
+   Collabora Ltd.                        7 (0.5%)
+   BayLibre SAS                          5 (0.3%)
+   SUSE                                  4 (0.3%)
+   Socionext Inc.                        3 (0.2%)
+   Bootlin                               2 (0.1%)
+   IBM                                   2 (0.1%)
+   Siemens                               2 (0.1%)
+   Broadcom                              1 (0.1%)
+   Debian.org                            1 (0.1%)
+   Marvell                               1 (0.1%)
+   Samsung                               1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Konsulko Group                        98915 (47.3%)
+   (Unknown)                             36630 (17.5%)
+   Toradex                               20197 (9.7%)
+   NXP                                   11759 (5.6%)
+   Google, Inc.                          8739 (4.2%)
+   Linaro                                7623 (3.6%)
+   Weidmüller Interface GmbH & Co. KG    6191 (3.0%)
+   Texas Instruments                     5930 (2.8%)
+   ST Microelectronics                   3803 (1.8%)
+   DENX Software Engineering             3551 (1.7%)
+   AMD                                   2591 (1.2%)
+   Amarula Solutions                     1360 (0.7%)
+   Xilinx                                768 (0.4%)
+   Broadcom                              315 (0.2%)
+   ARM                                   298 (0.1%)
+   BayLibre SAS                          197 (0.1%)
+   Collabora Ltd.                        144 (0.1%)
+   SUSE                                  79 (0.0%)
+   IBM                                   34 (0.0%)
+   Bootlin                               32 (0.0%)
+   Siemens                               28 (0.0%)
+   Socionext Inc.                        18 (0.0%)
+   Debian.org                            4 (0.0%)
+   Marvell                               3 (0.0%)
+   Samsung                               2 (0.0%)
+   ====================================  =====
+
+
+.. table:: Employers with the most signoffs (total 266)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   AMD                                   81 (30.5%)
+   NXP                                   51 (19.2%)
+   (Unknown)                             28 (10.5%)
+   Texas Instruments                     19 (7.1%)
+   Linaro                                16 (6.0%)
+   ARM                                   16 (6.0%)
+   Amarula Solutions                     14 (5.3%)
+   Xilinx                                13 (4.9%)
+   Konsulko Group                        6 (2.3%)
+   Canonical                             5 (1.9%)
+   Toradex                               4 (1.5%)
+   Google, Inc.                          4 (1.5%)
+   Socionext Inc.                        4 (1.5%)
+   ST Microelectronics                   2 (0.8%)
+   Broadcom                              2 (0.8%)
+   BayLibre SAS                          1 (0.4%)
+   ====================================  =====
+
+
+.. table:: Employers with the most hackers (total 153)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             77 (50.3%)
+   Linaro                                12 (7.8%)
+   Texas Instruments                     11 (7.2%)
+   NXP                                   7 (4.6%)
+   AMD                                   6 (3.9%)
+   Google, Inc.                          5 (3.3%)
+   DENX Software Engineering             5 (3.3%)
+   Toradex                               4 (2.6%)
+   ST Microelectronics                   4 (2.6%)
+   ARM                                   3 (2.0%)
+   BayLibre SAS                          3 (2.0%)
+   Amarula Solutions                     2 (1.3%)
+   Collabora Ltd.                        2 (1.3%)
+   Xilinx                                1 (0.7%)
+   Konsulko Group                        1 (0.7%)
+   Socionext Inc.                        1 (0.7%)
+   Broadcom                              1 (0.7%)
+   Weidmüller Interface GmbH & Co. KG    1 (0.7%)
+   SUSE                                  1 (0.7%)
+   IBM                                   1 (0.7%)
+   Bootlin                               1 (0.7%)
+   Siemens                               1 (0.7%)
+   Debian.org                            1 (0.7%)
+   Marvell                               1 (0.7%)
+   Samsung                               1 (0.7%)
+   ====================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2023.01.rst b/doc/develop/statistics/u-boot-stats-v2023.01.rst
new file mode 100644
index 00000000000..793aaa5bbb6
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2023.01.rst
@@ -0,0 +1,719 @@
+:orphan:
+
+Release Statistics for U-Boot v2023.01
+======================================
+
+* Processed 1396 changesets from 152 developers
+
+* 24 employers found
+
+* A total of 91252 lines added, 42422 removed (delta 48830)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           266 (19.1%)
+   Heinrich Schuchardt                   103 (7.4%)
+   Pali Rohár                            57 (4.1%)
+   Tom Rini                              48 (3.4%)
+   Michal Simek                          45 (3.2%)
+   Marek Vasut                           39 (2.8%)
+   Michal Suchanek                       35 (2.5%)
+   Weijie Gao                            32 (2.3%)
+   Stefan Roese                          28 (2.0%)
+   Marcel Ziswiler                       28 (2.0%)
+   Masahisa Kojima                       27 (1.9%)
+   William Zhang                         27 (1.9%)
+   Frieder Schrempf                      25 (1.8%)
+   Andre Przywara                        24 (1.7%)
+   Ashok Reddy Soma                      23 (1.6%)
+   Quentin Schulz                        21 (1.5%)
+   Patrick Delaunay                      20 (1.4%)
+   Viacheslav Mitrofanov                 20 (1.4%)
+   Sughosh Ganu                          20 (1.4%)
+   Tim Harvey                            18 (1.3%)
+   Rasmus Villemoes                      18 (1.3%)
+   Patrice Chotard                       17 (1.2%)
+   Adam Ford                             16 (1.1%)
+   Sumit Garg                            15 (1.1%)
+   Fabio Estevam                         14 (1.0%)
+   Andrew Davis                          14 (1.0%)
+   Chin-Ting Kuo                         14 (1.0%)
+   Venkatesh Yadav Abbarapu              13 (0.9%)
+   Paul Barker                           13 (0.9%)
+   Roger Quadros                         12 (0.9%)
+   Michael Trimarchi                     11 (0.8%)
+   Ovidiu Panait                         11 (0.8%)
+   Alexander Dahl                        11 (0.8%)
+   Sean Anderson                         10 (0.7%)
+   Ilias Apalodimas                      9 (0.6%)
+   Jim Liu                               9 (0.6%)
+   Johan Jonker                          9 (0.6%)
+   Bin Meng                              8 (0.6%)
+   Conor Dooley                          8 (0.6%)
+   Oliver Graute                         8 (0.6%)
+   Takahiro Kuwano                       8 (0.6%)
+   Dario Binacchi                        7 (0.5%)
+   Chris Packham                         7 (0.5%)
+   Etienne Carriere                      6 (0.4%)
+   John Keeping                          6 (0.4%)
+   Martyn Welch                          5 (0.4%)
+   Robert Marko                          5 (0.4%)
+   Sergiu Moga                           5 (0.4%)
+   Bernhard Messerklinger                5 (0.4%)
+   Stefan Herbrechtsmeier                5 (0.4%)
+   Manoj Sai                             4 (0.3%)
+   Daniel Schwierzeck                    4 (0.3%)
+   Yann Gautier                          4 (0.3%)
+   Ying-Chun Liu (PaulLiu)               4 (0.3%)
+   Padmarao Begari                       4 (0.3%)
+   Sergei Antonov                        4 (0.3%)
+   Cédric Le Goater                      4 (0.3%)
+   Alice Guo                             4 (0.3%)
+   Jay Buddhabhatti                      4 (0.3%)
+   Jagan Teki                            3 (0.2%)
+   Philippe Schenker                     3 (0.2%)
+   Bryan Brattlof                        3 (0.2%)
+   FUKAUMI Naoki                         3 (0.2%)
+   Samuel Holland                        3 (0.2%)
+   Alistair Delva                        3 (0.2%)
+   Rick Chen                             3 (0.2%)
+   Kautuk Consul                         3 (0.2%)
+   Gabriel Fernandez                     3 (0.2%)
+   T Karthik Reddy                       3 (0.2%)
+   Mihai Sain                            3 (0.2%)
+   Dylan Hung                            3 (0.2%)
+   Yu Chien Peter Lin                    3 (0.2%)
+   Andrejs Cainikovs                     3 (0.2%)
+   Ye Li                                 3 (0.2%)
+   Mattijs Korpershoek                   3 (0.2%)
+   Samuel Mendoza-Jonas                  3 (0.2%)
+   Philip Oberfichtner                   3 (0.2%)
+   Samuel Obuch                          3 (0.2%)
+   Durai Manickam KR                     3 (0.2%)
+   Dai Okamura                           2 (0.1%)
+   Michael Walle                         2 (0.1%)
+   Vincent Stehlé                        2 (0.1%)
+   Maxim Cournoyer                       2 (0.1%)
+   Olivier Moysan                        2 (0.1%)
+   Andy Chiu                             2 (0.1%)
+   Joel Stanley                          2 (0.1%)
+   Baruch Siach                          2 (0.1%)
+   Edoardo Tomelleri                     2 (0.1%)
+   Stefano Babic                         2 (0.1%)
+   Julien Masson                         2 (0.1%)
+   Francesco Dolcini                     2 (0.1%)
+   Kunihiko Hayashi                      2 (0.1%)
+   Holger Brunck                         2 (0.1%)
+   Soeren Moch                           2 (0.1%)
+   Icenowy Zheng                         2 (0.1%)
+   Dave Gerlach                          2 (0.1%)
+   Roger Knecht                          2 (0.1%)
+   Steven Lawrance                       2 (0.1%)
+   Ravi Gunasekaran                      2 (0.1%)
+   Jassi Brar                            2 (0.1%)
+   Jayesh Choudhary                      2 (0.1%)
+   Kever Yang                            1 (0.1%)
+   Peter Robinson                        1 (0.1%)
+   Mark Kettenis                         1 (0.1%)
+   Derek LaHousse                        1 (0.1%)
+   Szymon Heidrich                       1 (0.1%)
+   Hugo SIMELIERE                        1 (0.1%)
+   Zong Li                               1 (0.1%)
+   Algapally Santosh Sagar               1 (0.1%)
+   Jan Kiszka                            1 (0.1%)
+   Dhruva Gole                           1 (0.1%)
+   Luca Ceresoli                         1 (0.1%)
+   Lukas Funke                           1 (0.1%)
+   Matthias Brugger                      1 (0.1%)
+   Yaron Micher                          1 (0.1%)
+   Balaji Prakash J                      1 (0.1%)
+   Christian Hewitt                      1 (0.1%)
+   Christian Kohn                        1 (0.1%)
+   Mikhail Ilin                          1 (0.1%)
+   Alexandre Mergnat                     1 (0.1%)
+   Matthias Schiffer                     1 (0.1%)
+   Loic Poulain                          1 (0.1%)
+   Hamish Martin                         1 (0.1%)
+   AKASHI Takahiro                       1 (0.1%)
+   Janne Grunau                          1 (0.1%)
+   Nylon Chen                            1 (0.1%)
+   Christian Gmeiner                     1 (0.1%)
+   Takumi Sueda                          1 (0.1%)
+   Neha Malcom Francis                   1 (0.1%)
+   Benjamin Bara                         1 (0.1%)
+   Ariel D'Alessandro                    1 (0.1%)
+   Andy Yan                              1 (0.1%)
+   Xavier Drudis Ferran                  1 (0.1%)
+   Matt Ranostay                         1 (0.1%)
+   Wei Lu                                1 (0.1%)
+   Ignacio Zamora                        1 (0.1%)
+   Oleksandr Suvorov                     1 (0.1%)
+   Nick Desaulniers                      1 (0.1%)
+   Alexandre Ghiti                       1 (0.1%)
+   Nikita Shubin                         1 (0.1%)
+   Christophe Kerello                    1 (0.1%)
+   Xiang W                               1 (0.1%)
+   Alexander Sowarka                     1 (0.1%)
+   Nathan Barrett-Morrison               1 (0.1%)
+   Aaron Williams                        1 (0.1%)
+   Piyush Mehta                          1 (0.1%)
+   Harini Katakam                        1 (0.1%)
+   Amit Kumar Mahapatra                  1 (0.1%)
+   Janne Ylalehto                        1 (0.1%)
+   Samuel Dionne-Riel                    1 (0.1%)
+   Matwey V. Kornilov                    1 (0.1%)
+   Davidson K                            1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           19199 (17.5%)
+   Weijie Gao                            9580 (8.7%)
+   Marcel Ziswiler                       6676 (6.1%)
+   Tom Rini                              6622 (6.0%)
+   William Zhang                         4635 (4.2%)
+   Masahisa Kojima                       4438 (4.0%)
+   Martyn Welch                          3311 (3.0%)
+   Sughosh Ganu                          3208 (2.9%)
+   Frieder Schrempf                      3180 (2.9%)
+   Manoj Sai                             2829 (2.6%)
+   Holger Brunck                         2622 (2.4%)
+   Jim Liu                               2607 (2.4%)
+   Roger Quadros                         2152 (2.0%)
+   Gabriel Fernandez                     2100 (1.9%)
+   Viacheslav Mitrofanov                 1922 (1.8%)
+   FUKAUMI Naoki                         1899 (1.7%)
+   Chin-Ting Kuo                         1877 (1.7%)
+   Heinrich Schuchardt                   1856 (1.7%)
+   Ying-Chun Liu (PaulLiu)               1850 (1.7%)
+   Andre Przywara                        1550 (1.4%)
+   Michal Simek                          1425 (1.3%)
+   Bernhard Messerklinger                1404 (1.3%)
+   Adam Ford                             1378 (1.3%)
+   Chris Packham                         1299 (1.2%)
+   Tim Harvey                            1229 (1.1%)
+   Stefan Roese                          1195 (1.1%)
+   Sumit Garg                            1110 (1.0%)
+   Andy Yan                              1025 (0.9%)
+   Andrew Davis                          848 (0.8%)
+   Johan Jonker                          839 (0.8%)
+   Ashok Reddy Soma                      813 (0.7%)
+   Pali Rohár                            788 (0.7%)
+   Marek Vasut                           756 (0.7%)
+   Sergiu Moga                           612 (0.6%)
+   Padmarao Begari                       594 (0.5%)
+   Patrice Chotard                       569 (0.5%)
+   Patrick Delaunay                      533 (0.5%)
+   Michal Suchanek                       476 (0.4%)
+   Stefan Herbrechtsmeier                419 (0.4%)
+   Roger Knecht                          412 (0.4%)
+   Jayesh Choudhary                      398 (0.4%)
+   Rasmus Villemoes                      385 (0.4%)
+   Michael Trimarchi                     382 (0.3%)
+   Alice Guo                             348 (0.3%)
+   Oliver Graute                         313 (0.3%)
+   Joel Stanley                          308 (0.3%)
+   Kautuk Consul                         305 (0.3%)
+   Bryan Brattlof                        292 (0.3%)
+   Ravi Gunasekaran                      280 (0.3%)
+   Conor Dooley                          278 (0.3%)
+   Quentin Schulz                        275 (0.3%)
+   Ilias Apalodimas                      272 (0.2%)
+   Alexander Dahl                        268 (0.2%)
+   Dave Gerlach                          249 (0.2%)
+   Etienne Carriere                      242 (0.2%)
+   Robert Marko                          239 (0.2%)
+   Aaron Williams                        200 (0.2%)
+   Paul Barker                           160 (0.1%)
+   Dylan Hung                            157 (0.1%)
+   Samuel Dionne-Riel                    143 (0.1%)
+   Ovidiu Panait                         140 (0.1%)
+   Sergei Antonov                        139 (0.1%)
+   Edoardo Tomelleri                     120 (0.1%)
+   Sean Anderson                         114 (0.1%)
+   Fabio Estevam                         113 (0.1%)
+   Venkatesh Yadav Abbarapu              111 (0.1%)
+   Daniel Schwierzeck                    102 (0.1%)
+   Samuel Holland                        92 (0.1%)
+   Dario Binacchi                        89 (0.1%)
+   Olivier Moysan                        79 (0.1%)
+   Samuel Mendoza-Jonas                  78 (0.1%)
+   Takahiro Kuwano                       74 (0.1%)
+   Kunihiko Hayashi                      72 (0.1%)
+   Matt Ranostay                         72 (0.1%)
+   Andy Chiu                             68 (0.1%)
+   Steven Lawrance                       51 (0.0%)
+   Wei Lu                                50 (0.0%)
+   Ye Li                                 48 (0.0%)
+   Yu Chien Peter Lin                    44 (0.0%)
+   Yaron Micher                          39 (0.0%)
+   AKASHI Takahiro                       38 (0.0%)
+   Julien Masson                         37 (0.0%)
+   Philip Oberfichtner                   35 (0.0%)
+   Jassi Brar                            35 (0.0%)
+   Maxim Cournoyer                       34 (0.0%)
+   Neha Malcom Francis                   34 (0.0%)
+   Balaji Prakash J                      33 (0.0%)
+   Bin Meng                              32 (0.0%)
+   Matwey V. Kornilov                    32 (0.0%)
+   Lukas Funke                           29 (0.0%)
+   Andrejs Cainikovs                     28 (0.0%)
+   Rick Chen                             26 (0.0%)
+   Durai Manickam KR                     25 (0.0%)
+   Nathan Barrett-Morrison               25 (0.0%)
+   Baruch Siach                          22 (0.0%)
+   Yann Gautier                          20 (0.0%)
+   Christian Gmeiner                     20 (0.0%)
+   Mattijs Korpershoek                   18 (0.0%)
+   Derek LaHousse                        17 (0.0%)
+   John Keeping                          16 (0.0%)
+   Vincent Stehlé                        15 (0.0%)
+   Nikita Shubin                         15 (0.0%)
+   Samuel Obuch                          12 (0.0%)
+   Francesco Dolcini                     12 (0.0%)
+   Alexandre Mergnat                     10 (0.0%)
+   Alexandre Ghiti                       10 (0.0%)
+   Piyush Mehta                          10 (0.0%)
+   Cédric Le Goater                      9 (0.0%)
+   Jagan Teki                            9 (0.0%)
+   Jan Kiszka                            9 (0.0%)
+   Philippe Schenker                     8 (0.0%)
+   Christian Hewitt                      7 (0.0%)
+   Amit Kumar Mahapatra                  7 (0.0%)
+   T Karthik Reddy                       6 (0.0%)
+   Stefano Babic                         6 (0.0%)
+   Soeren Moch                           6 (0.0%)
+   Szymon Heidrich                       6 (0.0%)
+   Matthias Schiffer                     6 (0.0%)
+   Harini Katakam                        6 (0.0%)
+   Jay Buddhabhatti                      5 (0.0%)
+   Takumi Sueda                          5 (0.0%)
+   Alistair Delva                        4 (0.0%)
+   Mihai Sain                            4 (0.0%)
+   Dai Okamura                           4 (0.0%)
+   Hugo SIMELIERE                        4 (0.0%)
+   Ignacio Zamora                        4 (0.0%)
+   Alexander Sowarka                     4 (0.0%)
+   Davidson K                            4 (0.0%)
+   Janne Ylalehto                        3 (0.0%)
+   Michael Walle                         2 (0.0%)
+   Icenowy Zheng                         2 (0.0%)
+   Matthias Brugger                      2 (0.0%)
+   Benjamin Bara                         2 (0.0%)
+   Christophe Kerello                    2 (0.0%)
+   Kever Yang                            1 (0.0%)
+   Peter Robinson                        1 (0.0%)
+   Mark Kettenis                         1 (0.0%)
+   Zong Li                               1 (0.0%)
+   Algapally Santosh Sagar               1 (0.0%)
+   Dhruva Gole                           1 (0.0%)
+   Luca Ceresoli                         1 (0.0%)
+   Christian Kohn                        1 (0.0%)
+   Mikhail Ilin                          1 (0.0%)
+   Loic Poulain                          1 (0.0%)
+   Hamish Martin                         1 (0.0%)
+   Janne Grunau                          1 (0.0%)
+   Nylon Chen                            1 (0.0%)
+   Ariel D'Alessandro                    1 (0.0%)
+   Xavier Drudis Ferran                  1 (0.0%)
+   Oleksandr Suvorov                     1 (0.0%)
+   Nick Desaulniers                      1 (0.0%)
+   Xiang W                               1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Holger Brunck                         2621 (6.2%)
+   Bernhard Messerklinger                1180 (2.8%)
+   Tom Rini                              1163 (2.7%)
+   Adam Ford                             728 (1.7%)
+   Andre Przywara                        353 (0.8%)
+   Patrice Chotard                       75 (0.2%)
+   Samuel Holland                        72 (0.2%)
+   Michal Suchanek                       49 (0.1%)
+   Daniel Schwierzeck                    32 (0.1%)
+   AKASHI Takahiro                       26 (0.1%)
+   Venkatesh Yadav Abbarapu              19 (0.0%)
+   Philippe Schenker                     4 (0.0%)
+   Stefano Babic                         4 (0.0%)
+   Soeren Moch                           3 (0.0%)
+   Ignacio Zamora                        2 (0.0%)
+   Icenowy Zheng                         1 (0.0%)
+   Mark Kettenis                         1 (0.0%)
+   Oleksandr Suvorov                     1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most signoffs (total 169)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Michal Simek                          75 (44.4%)
+   Dario Binacchi                        22 (13.0%)
+   Peng Fan                              6 (3.6%)
+   Andre Przywara                        4 (2.4%)
+   Ashok Reddy Soma                      4 (2.4%)
+   Marek Vasut                           4 (2.4%)
+   Heinrich Schuchardt                   4 (2.4%)
+   Duncan Hare                           3 (1.8%)
+   Jagan Teki                            3 (1.8%)
+   Ilias Apalodimas                      3 (1.8%)
+   Joel Stanley                          3 (1.8%)
+   Simon Glass                           3 (1.8%)
+   Tom Rini                              2 (1.2%)
+   Neil Armstrong                        2 (1.2%)
+   Alexandre Torgue                      2 (1.2%)
+   Anand Gadiyar                         2 (1.2%)
+   Fabio Estevam                         2 (1.2%)
+   Sean Anderson                         2 (1.2%)
+   Michael Trimarchi                     2 (1.2%)
+   Stefan Roese                          2 (1.2%)
+   Alistair Delva                        1 (0.6%)
+   Da Xue                                1 (0.6%)
+   dsx724                                1 (0.6%)
+   Mikhail Kshevetskiy                   1 (0.6%)
+   Anup Patel                            1 (0.6%)
+   Jerome Brunet                         1 (0.6%)
+   Julien STEPHAN                        1 (0.6%)
+   Naga Sureshkumar Relli                1 (0.6%)
+   Stanley Chu                           1 (0.6%)
+   Anatolij Gustschin                    1 (0.6%)
+   SkyLake.Huang                         1 (0.6%)
+   Philip Oberfichtner                   1 (0.6%)
+   Yann Gautier                          1 (0.6%)
+   Baruch Siach                          1 (0.6%)
+   Conor Dooley                          1 (0.6%)
+   Patrick Delaunay                      1 (0.6%)
+   Alice Guo                             1 (0.6%)
+   Jayesh Choudhary                      1 (0.6%)
+   Pali Rohár                            1 (0.6%)
+   ====================================  =====
+
+
+.. table:: Developers with the most reviews (total 769)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           203 (26.4%)
+   Ilias Apalodimas                      50 (6.5%)
+   Ramon Fried                           42 (5.5%)
+   Fabio Estevam                         41 (5.3%)
+   Kever Yang                            38 (4.9%)
+   Patrice Chotard                       37 (4.8%)
+   Heinrich Schuchardt                   34 (4.4%)
+   Patrick Delaunay                      33 (4.3%)
+   Stefan Roese                          28 (3.6%)
+   Peng Fan                              19 (2.5%)
+   Jaehoon Chung                         19 (2.5%)
+   Rick Chen                             18 (2.3%)
+   Michael Trimarchi                     16 (2.1%)
+   Philippe Reynes                       15 (2.0%)
+   Dario Binacchi                        14 (1.8%)
+   Sean Anderson                         14 (1.8%)
+   Jagan Teki                            13 (1.7%)
+   Leo Yu-Chi Liang                      13 (1.7%)
+   Marek Vasut                           10 (1.3%)
+   Padmarao Begari                       10 (1.3%)
+   Heiko Schocher                        8 (1.0%)
+   Tom Rini                              7 (0.9%)
+   Jernej Skrabec                        7 (0.9%)
+   Cédric Le Goater                      7 (0.9%)
+   Conor Dooley                          5 (0.7%)
+   Bin Meng                              5 (0.7%)
+   Florian Fainelli                      5 (0.7%)
+   Wolfgang Wallner                      5 (0.7%)
+   Andre Przywara                        4 (0.5%)
+   Samuel Holland                        4 (0.5%)
+   Marek Behún                           4 (0.5%)
+   Joel Stanley                          3 (0.4%)
+   Peter Robinson                        3 (0.4%)
+   Dhruva Gole                           3 (0.4%)
+   Etienne Carriere                      3 (0.4%)
+   Michal Simek                          2 (0.3%)
+   Neil Armstrong                        2 (0.3%)
+   Jens Wiklander                        2 (0.3%)
+   Greentime Hu                          2 (0.3%)
+   Quentin Schulz                        2 (0.3%)
+   Yann Gautier                          1 (0.1%)
+   Pali Rohár                            1 (0.1%)
+   Daniel Schwierzeck                    1 (0.1%)
+   Luca Ceresoli                         1 (0.1%)
+   Peter Hoyes                           1 (0.1%)
+   Sultan Qasim Khan                     1 (0.1%)
+   Linus Walleij                         1 (0.1%)
+   François-Frédéric Ozog                1 (0.1%)
+   Giulio Benetti                        1 (0.1%)
+   Gaurav Jain                           1 (0.1%)
+   Heiko Thiery                          1 (0.1%)
+   Wadim Egorov                          1 (0.1%)
+   Claudiu Beznea                        1 (0.1%)
+   Eugen Hristev                         1 (0.1%)
+   Jason Liu                             1 (0.1%)
+   Jan Kiszka                            1 (0.1%)
+   Ye Li                                 1 (0.1%)
+   Tim Harvey                            1 (0.1%)
+   Viacheslav Mitrofanov                 1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most test credits (total 90)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Daniel Golle                          21 (23.3%)
+   Tony Dinh                             9 (10.0%)
+   Tom Rini                              8 (8.9%)
+   Tim Harvey                            8 (8.9%)
+   Waldemar Brodkorb                     7 (7.8%)
+   Stefan Roese                          5 (5.6%)
+   Padmarao Begari                       3 (3.3%)
+   Samuel Holland                        3 (3.3%)
+   Marek Vasut                           2 (2.2%)
+   Peter Robinson                        2 (2.2%)
+   Quentin Schulz                        2 (2.2%)
+   Pali Rohár                            2 (2.2%)
+   Ivan Shishkin                         2 (2.2%)
+   Fabio Estevam                         1 (1.1%)
+   Patrice Chotard                       1 (1.1%)
+   Heinrich Schuchardt                   1 (1.1%)
+   Patrick Delaunay                      1 (1.1%)
+   Heiko Schocher                        1 (1.1%)
+   Peter Hoyes                           1 (1.1%)
+   Giulio Benetti                        1 (1.1%)
+   Mikhail Kshevetskiy                   1 (1.1%)
+   Michal Suchanek                       1 (1.1%)
+   Leo Yan                               1 (1.1%)
+   Jerome Forissier                      1 (1.1%)
+   Yangjie Zhang                         1 (1.1%)
+   Heiko Stuebner                        1 (1.1%)
+   Christian Stewart                     1 (1.1%)
+   Felix Yan                             1 (1.1%)
+   Janne Grunau                          1 (1.1%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 90)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Weijie Gao                            21 (23.3%)
+   Stefan Roese                          14 (15.6%)
+   Rasmus Villemoes                      10 (11.1%)
+   Patrice Chotard                       7 (7.8%)
+   Andre Przywara                        5 (5.6%)
+   Marek Vasut                           4 (4.4%)
+   Marcel Ziswiler                       4 (4.4%)
+   Alexandre Ghiti                       3 (3.3%)
+   Tom Rini                              2 (2.2%)
+   Pali Rohár                            2 (2.2%)
+   Conor Dooley                          2 (2.2%)
+   John Keeping                          2 (2.2%)
+   Quentin Schulz                        1 (1.1%)
+   Heinrich Schuchardt                   1 (1.1%)
+   Patrick Delaunay                      1 (1.1%)
+   Michal Suchanek                       1 (1.1%)
+   Simon Glass                           1 (1.1%)
+   Ilias Apalodimas                      1 (1.1%)
+   Dario Binacchi                        1 (1.1%)
+   Bin Meng                              1 (1.1%)
+   Baruch Siach                          1 (1.1%)
+   Hugo SIMELIERE                        1 (1.1%)
+   Xavier Drudis Ferran                  1 (1.1%)
+   Xiang W                               1 (1.1%)
+   Gabriel Fernandez                     1 (1.1%)
+   William Zhang                         1 (1.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most report credits (total 20)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Pali Rohár                            2 (10.0%)
+   Marek Vasut                           1 (5.0%)
+   Marcel Ziswiler                       1 (5.0%)
+   Tom Rini                              1 (5.0%)
+   Quentin Schulz                        1 (5.0%)
+   Bin Meng                              1 (5.0%)
+   Tim Harvey                            1 (5.0%)
+   Peter Robinson                        1 (5.0%)
+   Mikhail Kshevetskiy                   1 (5.0%)
+   Yangjie Zhang                         1 (5.0%)
+   Neil Armstrong                        1 (5.0%)
+   François-Frédéric Ozog                1 (5.0%)
+   Heiko Thiery                          1 (5.0%)
+   Venkatesh Yadav Abbarapu              1 (5.0%)
+   Mihai Sain                            1 (5.0%)
+   Marcin Gołaś                          1 (5.0%)
+   Andreas Buerkler                      1 (5.0%)
+   Shravan Chippa                        1 (5.0%)
+   Manoj Sai                             1 (5.0%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 20)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              5 (25.0%)
+   Conor Dooley                          2 (10.0%)
+   Simon Glass                           2 (10.0%)
+   Fabio Estevam                         2 (10.0%)
+   Bin Meng                              1 (5.0%)
+   Heinrich Schuchardt                   1 (5.0%)
+   Patrick Delaunay                      1 (5.0%)
+   Michael Trimarchi                     1 (5.0%)
+   Jagan Teki                            1 (5.0%)
+   Michal Simek                          1 (5.0%)
+   Stefano Babic                         1 (5.0%)
+   Sergiu Moga                           1 (5.0%)
+   Frieder Schrempf                      1 (5.0%)
+   ====================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             556 (39.8%)
+   Google, Inc.                          270 (19.3%)
+   AMD                                   90 (6.4%)
+   DENX Software Engineering             86 (6.2%)
+   Linaro                                85 (6.1%)
+   Konsulko Group                        48 (3.4%)
+   ST Microelectronics                   47 (3.4%)
+   SUSE                                  36 (2.6%)
+   Toradex                               36 (2.6%)
+   ARM                                   27 (1.9%)
+   Broadcom                              27 (1.9%)
+   Texas Instruments                     26 (1.9%)
+   Amarula Solutions                     24 (1.7%)
+   NXP                                   8 (0.6%)
+   BayLibre SAS                          6 (0.4%)
+   Collabora Ltd.                        6 (0.4%)
+   Weidmüller Interface GmbH & Co. KG    6 (0.4%)
+   Socionext Inc.                        4 (0.3%)
+   Xilinx                                3 (0.2%)
+   Edgeble AI Technologies Pvt. Ltd.     1 (0.1%)
+   Marvell                               1 (0.1%)
+   Rockchip                              1 (0.1%)
+   Siemens                               1 (0.1%)
+   Canonical                             1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             41551 (37.8%)
+   Google, Inc.                          19204 (17.5%)
+   Linaro                                11194 (10.2%)
+   Toradex                               6724 (6.1%)
+   Konsulko Group                        6622 (6.0%)
+   Broadcom                              4635 (4.2%)
+   Collabora Ltd.                        3312 (3.0%)
+   Amarula Solutions                     3308 (3.0%)
+   ST Microelectronics                   3303 (3.0%)
+   AMD                                   2379 (2.2%)
+   Texas Instruments                     2174 (2.0%)
+   DENX Software Engineering             2105 (1.9%)
+   ARM                                   1569 (1.4%)
+   SUSE                                  478 (0.4%)
+   Weidmüller Interface GmbH & Co. KG    448 (0.4%)
+   NXP                                   446 (0.4%)
+   Marvell                               200 (0.2%)
+   Socionext Inc.                        76 (0.1%)
+   BayLibre SAS                          65 (0.1%)
+   Canonical                             10 (0.0%)
+   Siemens                               9 (0.0%)
+   Xilinx                                6 (0.0%)
+   Edgeble AI Technologies Pvt. Ltd.     1 (0.0%)
+   Rockchip                              1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Employers with the most signoffs (total 169)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   AMD                                   79 (46.7%)
+   Amarula Solutions                     27 (16.0%)
+   (Unknown)                             18 (10.7%)
+   DENX Software Engineering             10 (5.9%)
+   NXP                                   7 (4.1%)
+   Linaro                                5 (3.0%)
+   Google, Inc.                          4 (2.4%)
+   ST Microelectronics                   4 (2.4%)
+   ARM                                   4 (2.4%)
+   Canonical                             4 (2.4%)
+   Texas Instruments                     3 (1.8%)
+   Konsulko Group                        2 (1.2%)
+   BayLibre SAS                          2 (1.2%)
+   ====================================  =====
+
+
+.. table:: Employers with the most hackers (total 153)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             80 (52.3%)
+   AMD                                   9 (5.9%)
+   Linaro                                9 (5.9%)
+   Texas Instruments                     8 (5.2%)
+   ST Microelectronics                   6 (3.9%)
+   DENX Software Engineering             5 (3.3%)
+   Amarula Solutions                     4 (2.6%)
+   Toradex                               4 (2.6%)
+   NXP                                   3 (2.0%)
+   Google, Inc.                          3 (2.0%)
+   ARM                                   3 (2.0%)
+   BayLibre SAS                          3 (2.0%)
+   Collabora Ltd.                        2 (1.3%)
+   SUSE                                  2 (1.3%)
+   Weidmüller Interface GmbH & Co. KG    2 (1.3%)
+   Socionext Inc.                        2 (1.3%)
+   Canonical                             1 (0.7%)
+   Konsulko Group                        1 (0.7%)
+   Broadcom                              1 (0.7%)
+   Marvell                               1 (0.7%)
+   Siemens                               1 (0.7%)
+   Xilinx                                1 (0.7%)
+   Edgeble AI Technologies Pvt. Ltd.     1 (0.7%)
+   Rockchip                              1 (0.7%)
+   ====================================  =====
+
diff --git a/doc/develop/statistics/u-boot-stats-v2023.04.rst b/doc/develop/statistics/u-boot-stats-v2023.04.rst
new file mode 100644
index 00000000000..73a3583e9f9
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2023.04.rst
@@ -0,0 +1,764 @@
+:orphan:
+
+Release Statistics for U-Boot v2023.04
+======================================
+
+* Processed 1691 changesets from 157 developers
+
+* 28 employers found
+
+* A total of 174471 lines added, 78380 removed (delta 96091)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           381 (22.5%)
+   Tom Rini                              333 (19.7%)
+   Marek Vasut                           101 (6.0%)
+   Heinrich Schuchardt                   70 (4.1%)
+   Jagan Teki                            53 (3.1%)
+   Jonas Karlman                         36 (2.1%)
+   Patrick Delaunay                      35 (2.1%)
+   Hai Pham                              21 (1.2%)
+   Michal Simek                          20 (1.2%)
+   Maxim Cournoyer                       20 (1.2%)
+   Svyatoslav Ryhel                      17 (1.0%)
+   Sean Anderson                         15 (0.9%)
+   Fabio Estevam                         14 (0.8%)
+   Pali Rohár                            14 (0.8%)
+   Sumit Garg                            14 (0.8%)
+   Bryan Brattlof                        14 (0.8%)
+   Sinthu Raja                           13 (0.8%)
+   Andre Przywara                        13 (0.8%)
+   Heiko Schocher                        13 (0.8%)
+   Yu Chien Peter Lin                    12 (0.7%)
+   Tim Harvey                            12 (0.7%)
+   Peng Fan                              12 (0.7%)
+   Tony Dinh                             11 (0.7%)
+   Angelo Dureghello                     11 (0.7%)
+   Masahisa Kojima                       11 (0.7%)
+   Quentin Schulz                        11 (0.7%)
+   Roger Quadros                         11 (0.7%)
+   Marcel Ziswiler                       11 (0.7%)
+   Holger Brunck                         10 (0.6%)
+   Mark Kettenis                         10 (0.6%)
+   Sergiu Moga                           10 (0.6%)
+   Nikhil M Jain                         9 (0.5%)
+   Jim Liu                               9 (0.5%)
+   Christophe Leroy                      9 (0.5%)
+   Balamanikandan Gunasundar             9 (0.5%)
+   Dario Binacchi                        8 (0.5%)
+   Samuel Holland                        8 (0.5%)
+   Frieder Schrempf                      8 (0.5%)
+   Mikhail Ilin                          8 (0.5%)
+   Sjoerd Simons                         7 (0.4%)
+   Neil Armstrong                        7 (0.4%)
+   Eugen Hristev                         7 (0.4%)
+   Chris Morgan                          7 (0.4%)
+   Dzmitry Sankouski                     7 (0.4%)
+   Ioana Ciornei                         7 (0.4%)
+   Ilias Apalodimas                      6 (0.4%)
+   Peter Robinson                        6 (0.4%)
+   Paweł Anikiel                         6 (0.4%)
+   Andrejs Cainikovs                     6 (0.4%)
+   Rob Herring                           6 (0.4%)
+   John Keeping                          5 (0.3%)
+   Mihai Sain                            5 (0.3%)
+   Rick Chen                             5 (0.3%)
+   Sergei Antonov                        5 (0.3%)
+   Ashok Reddy Soma                      5 (0.3%)
+   Algapally Santosh Sagar               5 (0.3%)
+   Dhruva Gole                           5 (0.3%)
+   Brandon Maier                         5 (0.3%)
+   Alexey Romanov                        5 (0.3%)
+   Vasily Khoruzhick                     4 (0.2%)
+   Manoj Sai                             4 (0.2%)
+   Jan Kiszka                            4 (0.2%)
+   Ovidiu Panait                         4 (0.2%)
+   Takahiro Kuwano                       4 (0.2%)
+   Enric Balletbo i Serra                4 (0.2%)
+   Fabrice Gasnier                       4 (0.2%)
+   Victor Lim                            4 (0.2%)
+   Stefan Bosch                          4 (0.2%)
+   Vincent Stehlé                        3 (0.2%)
+   Tam Nguyen                            3 (0.2%)
+   Leo Yu-Chi Liang                      3 (0.2%)
+   Mattijs Korpershoek                   3 (0.2%)
+   Ye Li                                 3 (0.2%)
+   Oleksandr Suvorov                     3 (0.2%)
+   Max Krummenacher                      3 (0.2%)
+   Andrew Davis                          3 (0.2%)
+   Michael Walle                         3 (0.2%)
+   Andreas Kemnade                       3 (0.2%)
+   Kshitiz Varshney                      3 (0.2%)
+   Dai Okamura                           3 (0.2%)
+   Stefan Roese                          2 (0.1%)
+   Vincent Fazio                         2 (0.1%)
+   Kamlesh Gurudasani                    2 (0.1%)
+   Johan Jonker                          2 (0.1%)
+   Antoine Mazeas                        2 (0.1%)
+   Christopher Obbard                    2 (0.1%)
+   Akash Gajjar                          2 (0.1%)
+   Ilko Iliev                            2 (0.1%)
+   Qu Wenruo                             2 (0.1%)
+   Etienne Carriere                      2 (0.1%)
+   Thomas Fitzsimmons                    2 (0.1%)
+   Pei Yue Ho                            2 (0.1%)
+   Ryan Chen                             2 (0.1%)
+   Adam Ford                             2 (0.1%)
+   Philippe Schenker                     2 (0.1%)
+   Linus Walleij                         2 (0.1%)
+   Sean Edmond                           2 (0.1%)
+   Nikita Shubin                         2 (0.1%)
+   Ying-Chun Liu (PaulLiu)               2 (0.1%)
+   Loic Poulain                          2 (0.1%)
+   Pengfei Fan                           2 (0.1%)
+   Jernej Skrabec                        2 (0.1%)
+   Neha Malcom Francis                   2 (0.1%)
+   Harald Seiler                         2 (0.1%)
+   Shenlin Liang                         2 (0.1%)
+   Martyn Welch                          2 (0.1%)
+   Harini Katakam                        2 (0.1%)
+   Marc Kleine-Budde                     2 (0.1%)
+   David Sebek                           1 (0.1%)
+   Jonathan Liu                          1 (0.1%)
+   Vignesh Raghavendra                   1 (0.1%)
+   Sebastian Andrzej Siewior             1 (0.1%)
+   annsai01                              1 (0.1%)
+   Peter Geis                            1 (0.1%)
+   Ralph Siemsen                         1 (0.1%)
+   Robert Marko                          1 (0.1%)
+   Michal Suchanek                       1 (0.1%)
+   Jaehoon Chung                         1 (0.1%)
+   Christian Kohlschütter                1 (0.1%)
+   Ramin Khonsari                        1 (0.1%)
+   Maxim Schwalm                         1 (0.1%)
+   Venkatesh Yadav Abbarapu              1 (0.1%)
+   Ivan Khoronzhuk                       1 (0.1%)
+   Ulf Samuelsson                        1 (0.1%)
+   Jade Lovelace                         1 (0.1%)
+   Michael Trimarchi                     1 (0.1%)
+   Matwey V. Kornilov                    1 (0.1%)
+   KaDiWa                                1 (0.1%)
+   Christian Marangi                     1 (0.1%)
+   Ehsan Mohandesi                       1 (0.1%)
+   Aurelien Jarno                        1 (0.1%)
+   Mario Kicherer                        1 (0.1%)
+   Arnaud Ferraris                       1 (0.1%)
+   Detlev Casanova                       1 (0.1%)
+   Igor Opaniuk                          1 (0.1%)
+   Massimo Pegorer                       1 (0.1%)
+   Kunihiko Hayashi                      1 (0.1%)
+   Joost van Zwieten                     1 (0.1%)
+   Jorge Ramirez-Ortiz                   1 (0.1%)
+   Jay Buddhabhatti                      1 (0.1%)
+   Andrey Dolnikov                       1 (0.1%)
+   chenzhipeng                           1 (0.1%)
+   Olivier Moysan                        1 (0.1%)
+   Ville Skyttä                          1 (0.1%)
+   David Oberhollenzer                   1 (0.1%)
+   Haijun Qin                            1 (0.1%)
+   Neal Frager                           1 (0.1%)
+   Luca Ceresoli                         1 (0.1%)
+   Viacheslav Bocharov                   1 (0.1%)
+   Yuepeng Xing                          1 (0.1%)
+   Cristian Birsan                       1 (0.1%)
+   Lokanathan, Raaj                      1 (0.1%)
+   Christian Gmeiner                     1 (0.1%)
+   Daniel Golle                          1 (0.1%)
+   Manuel Traut                          1 (0.1%)
+   Ben Dooks                             1 (0.1%)
+   Kasper Revsbech                       1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Bryan Brattlof                        38811 (18.1%)
+   Tom Rini                              36464 (17.0%)
+   Simon Glass                           30090 (14.0%)
+   Jagan Teki                            23918 (11.1%)
+   Marek Vasut                           14720 (6.9%)
+   Brandon Maier                         13759 (6.4%)
+   Tony Dinh                             7399 (3.4%)
+   Balamanikandan Gunasundar             4239 (2.0%)
+   Jim Liu                               4106 (1.9%)
+   Fabio Estevam                         3264 (1.5%)
+   Christophe Leroy                      2145 (1.0%)
+   Neil Armstrong                        2020 (0.9%)
+   Nikhil M Jain                         1681 (0.8%)
+   Sumit Garg                            1671 (0.8%)
+   Tim Harvey                            1524 (0.7%)
+   Jonas Karlman                         1439 (0.7%)
+   Roger Quadros                         1431 (0.7%)
+   Quentin Schulz                        1296 (0.6%)
+   Heinrich Schuchardt                   1277 (0.6%)
+   Michal Simek                          1274 (0.6%)
+   Svyatoslav Ryhel                      1259 (0.6%)
+   Akash Gajjar                          1057 (0.5%)
+   Mark Kettenis                         1042 (0.5%)
+   Sinthu Raja                           967 (0.5%)
+   Holger Brunck                         966 (0.5%)
+   Chris Morgan                          965 (0.4%)
+   Peter Robinson                        919 (0.4%)
+   Luca Ceresoli                         860 (0.4%)
+   Hai Pham                              712 (0.3%)
+   Andre Przywara                        702 (0.3%)
+   Kunihiko Hayashi                      695 (0.3%)
+   Dario Binacchi                        690 (0.3%)
+   Patrick Delaunay                      668 (0.3%)
+   Samuel Holland                        568 (0.3%)
+   Dhruva Gole                           527 (0.2%)
+   Ryan Chen                             504 (0.2%)
+   Sergei Antonov                        464 (0.2%)
+   Sean Anderson                         439 (0.2%)
+   Ashok Reddy Soma                      399 (0.2%)
+   Masahisa Kojima                       391 (0.2%)
+   Sergiu Moga                           382 (0.2%)
+   Maxim Cournoyer                       380 (0.2%)
+   Massimo Pegorer                       353 (0.2%)
+   Linus Walleij                         317 (0.1%)
+   Eugen Hristev                         295 (0.1%)
+   Alexey Romanov                        285 (0.1%)
+   Yu Chien Peter Lin                    267 (0.1%)
+   Stefan Bosch                          260 (0.1%)
+   Dzmitry Sankouski                     257 (0.1%)
+   Heiko Schocher                        221 (0.1%)
+   Enric Balletbo i Serra                214 (0.1%)
+   Kshitiz Varshney                      211 (0.1%)
+   Thomas Fitzsimmons                    205 (0.1%)
+   Mihai Sain                            191 (0.1%)
+   Angelo Dureghello                     167 (0.1%)
+   Adam Ford                             162 (0.1%)
+   Marcel Ziswiler                       160 (0.1%)
+   Mattijs Korpershoek                   154 (0.1%)
+   Etienne Carriere                      154 (0.1%)
+   Leo Yu-Chi Liang                      135 (0.1%)
+   Ramin Khonsari                        131 (0.1%)
+   Pali Rohár                            127 (0.1%)
+   Olivier Moysan                        116 (0.1%)
+   Vincent Fazio                         106 (0.0%)
+   Fabrice Gasnier                       98 (0.0%)
+   Max Krummenacher                      80 (0.0%)
+   Takahiro Kuwano                       76 (0.0%)
+   Victor Lim                            73 (0.0%)
+   Frieder Schrempf                      72 (0.0%)
+   Manoj Sai                             70 (0.0%)
+   Andrew Davis                          70 (0.0%)
+   Mikhail Ilin                          69 (0.0%)
+   Dai Okamura                           65 (0.0%)
+   Tam Nguyen                            63 (0.0%)
+   Peng Fan                              61 (0.0%)
+   Sjoerd Simons                         61 (0.0%)
+   Cristian Birsan                       59 (0.0%)
+   Antoine Mazeas                        51 (0.0%)
+   Rick Chen                             49 (0.0%)
+   Paweł Anikiel                         47 (0.0%)
+   Andreas Kemnade                       45 (0.0%)
+   Jan Kiszka                            43 (0.0%)
+   Andrejs Cainikovs                     41 (0.0%)
+   Michael Trimarchi                     41 (0.0%)
+   Rob Herring                           40 (0.0%)
+   Martyn Welch                          36 (0.0%)
+   Stefan Roese                          35 (0.0%)
+   Neha Malcom Francis                   35 (0.0%)
+   Algapally Santosh Sagar               34 (0.0%)
+   Jernej Skrabec                        34 (0.0%)
+   Maxim Schwalm                         30 (0.0%)
+   Qu Wenruo                             29 (0.0%)
+   Loic Poulain                          29 (0.0%)
+   Ioana Ciornei                         28 (0.0%)
+   Christian Kohlschütter                28 (0.0%)
+   Michael Walle                         23 (0.0%)
+   Vasily Khoruzhick                     22 (0.0%)
+   Pei Yue Ho                            22 (0.0%)
+   Vincent Stehlé                        19 (0.0%)
+   Venkatesh Yadav Abbarapu              19 (0.0%)
+   Pengfei Fan                           16 (0.0%)
+   Harald Seiler                         16 (0.0%)
+   Ville Skyttä                          16 (0.0%)
+   Sean Edmond                           14 (0.0%)
+   Harini Katakam                        14 (0.0%)
+   Robert Marko                          14 (0.0%)
+   John Keeping                          13 (0.0%)
+   Ovidiu Panait                         13 (0.0%)
+   Kamlesh Gurudasani                    13 (0.0%)
+   Nikita Shubin                         13 (0.0%)
+   Marc Kleine-Budde                     13 (0.0%)
+   Detlev Casanova                       13 (0.0%)
+   David Oberhollenzer                   11 (0.0%)
+   Ilias Apalodimas                      10 (0.0%)
+   Mario Kicherer                        10 (0.0%)
+   Yuepeng Xing                          10 (0.0%)
+   Jaehoon Chung                         9 (0.0%)
+   KaDiWa                                9 (0.0%)
+   Oleksandr Suvorov                     8 (0.0%)
+   Christian Gmeiner                     8 (0.0%)
+   Ye Li                                 7 (0.0%)
+   Christopher Obbard                    7 (0.0%)
+   Ying-Chun Liu (PaulLiu)               7 (0.0%)
+   Johan Jonker                          6 (0.0%)
+   Jonathan Liu                          6 (0.0%)
+   Andrey Dolnikov                       6 (0.0%)
+   Daniel Golle                          6 (0.0%)
+   Philippe Schenker                     5 (0.0%)
+   Michal Suchanek                       5 (0.0%)
+   Ivan Khoronzhuk                       5 (0.0%)
+   Ilko Iliev                            4 (0.0%)
+   Manuel Traut                          4 (0.0%)
+   Shenlin Liang                         3 (0.0%)
+   annsai01                              3 (0.0%)
+   Ulf Samuelsson                        3 (0.0%)
+   Matwey V. Kornilov                    3 (0.0%)
+   Jay Buddhabhatti                      3 (0.0%)
+   chenzhipeng                           3 (0.0%)
+   Ben Dooks                             3 (0.0%)
+   Peter Geis                            2 (0.0%)
+   Ralph Siemsen                         2 (0.0%)
+   Christian Marangi                     2 (0.0%)
+   Jorge Ramirez-Ortiz                   2 (0.0%)
+   David Sebek                           1 (0.0%)
+   Vignesh Raghavendra                   1 (0.0%)
+   Sebastian Andrzej Siewior             1 (0.0%)
+   Jade Lovelace                         1 (0.0%)
+   Ehsan Mohandesi                       1 (0.0%)
+   Aurelien Jarno                        1 (0.0%)
+   Arnaud Ferraris                       1 (0.0%)
+   Igor Opaniuk                          1 (0.0%)
+   Joost van Zwieten                     1 (0.0%)
+   Haijun Qin                            1 (0.0%)
+   Neal Frager                           1 (0.0%)
+   Viacheslav Bocharov                   1 (0.0%)
+   Lokanathan, Raaj                      1 (0.0%)
+   Kasper Revsbech                       1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              18089 (23.1%)
+   Simon Glass                           5998 (7.7%)
+   Luca Ceresoli                         860 (1.1%)
+   Holger Brunck                         532 (0.7%)
+   Leo Yu-Chi Liang                      90 (0.1%)
+   Mattijs Korpershoek                   83 (0.1%)
+   Andrew Davis                          43 (0.1%)
+   Pali Rohár                            28 (0.0%)
+   Maxim Schwalm                         27 (0.0%)
+   Dai Okamura                           12 (0.0%)
+   Michael Walle                         12 (0.0%)
+   Ovidiu Panait                         10 (0.0%)
+   Peng Fan                              7 (0.0%)
+   Ioana Ciornei                         6 (0.0%)
+   Michal Suchanek                       4 (0.0%)
+   Rob Herring                           3 (0.0%)
+   Johan Jonker                          3 (0.0%)
+   Ying-Chun Liu (PaulLiu)               2 (0.0%)
+   Ilko Iliev                            1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most signoffs (total 215)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Francesco Dolcini                     21 (9.8%)
+   Marek Vasut                           21 (9.8%)
+   Tom                                   19 (8.8%)
+   Michal Simek                          19 (8.8%)
+   Michael Trimarchi                     8 (3.7%)
+   Dario Binacchi                        8 (3.7%)
+   Neil Armstrong                        8 (3.7%)
+   Hai Pham                              7 (3.3%)
+   Kever Yang                            6 (2.8%)
+   Tom Rini                              5 (2.3%)
+   YouMin Chen                           5 (2.3%)
+   Jianqun Xu                            4 (1.9%)
+   Elaine Zhang                          4 (1.9%)
+   Mike Worsfold                         4 (1.9%)
+   Manoj Sai                             4 (1.9%)
+   Marcel Ziswiler                       4 (1.9%)
+   Ashok Reddy Soma                      4 (1.9%)
+   Peter Robinson                        4 (1.9%)
+   Peng Fan                              3 (1.4%)
+   Andre Przywara                        3 (1.4%)
+   Heinrich Schuchardt                   3 (1.4%)
+   Vignesh Raghavendra                   2 (0.9%)
+   Joseph Chen                           2 (0.9%)
+   Finley Xiao                           2 (0.9%)
+   Suniel Mahesh                         2 (0.9%)
+   FUKAUMI Naoki                         2 (0.9%)
+   Judith Mendez                         2 (0.9%)
+   Robert Hancock                        2 (0.9%)
+   Peter Geis                            2 (0.9%)
+   Andrejs Cainikovs                     2 (0.9%)
+   Samuel Holland                        2 (0.9%)
+   Jonas Karlman                         2 (0.9%)
+   Jagan Teki                            2 (0.9%)
+   Simon Glass                           1 (0.5%)
+   Mattijs Korpershoek                   1 (0.5%)
+   Pali Rohár                            1 (0.5%)
+   Michal Suchanek                       1 (0.5%)
+   Anand Gadiyar                         1 (0.5%)
+   Angelo Durgehello                     1 (0.5%)
+   Nam Nguyen                            1 (0.5%)
+   Steven Liu                            1 (0.5%)
+   Sebastian Reichel                     1 (0.5%)
+   Yifeng Zhao                           1 (0.5%)
+   Ren Jianing                           1 (0.5%)
+   Vladimir Oltean                       1 (0.5%)
+   Jonas Schwöbel                        1 (0.5%)
+   Shawn Guo                             1 (0.5%)
+   Jason Zhu                             1 (0.5%)
+   Jon Lin                               1 (0.5%)
+   Sugar Zhang                           1 (0.5%)
+   Valentine Barshak                     1 (0.5%)
+   Jit Loon Lim                          1 (0.5%)
+   Philippe Schenker                     1 (0.5%)
+   Ilias Apalodimas                      1 (0.5%)
+   Sjoerd Simons                         1 (0.5%)
+   Tam Nguyen                            1 (0.5%)
+   Ramin Khonsari                        1 (0.5%)
+   Sergiu Moga                           1 (0.5%)
+   Svyatoslav Ryhel                      1 (0.5%)
+   Quentin Schulz                        1 (0.5%)
+   ====================================  =====
+
+
+.. table:: Developers with the most reviews (total 767)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           225 (29.3%)
+   Kever Yang                            112 (14.6%)
+   Fabio Estevam                         49 (6.4%)
+   Tom Rini                              33 (4.3%)
+   Patrice Chotard                       33 (4.3%)
+   Marek Vasut                           27 (3.5%)
+   Ramon Fried                           22 (2.9%)
+   Stefan Roese                          17 (2.2%)
+   Ilias Apalodimas                      16 (2.1%)
+   Leo Yu-Chi Liang                      15 (2.0%)
+   Rick Chen                             15 (2.0%)
+   Heinrich Schuchardt                   14 (1.8%)
+   Jagan Teki                            14 (1.8%)
+   Patrick Delaunay                      14 (1.8%)
+   Mattijs Korpershoek                   13 (1.7%)
+   Jaehoon Chung                         13 (1.7%)
+   Samuel Holland                        12 (1.6%)
+   Heiko Schocher                        9 (1.2%)
+   Neil Armstrong                        8 (1.0%)
+   Vladimir Oltean                       7 (0.9%)
+   Sean Anderson                         7 (0.9%)
+   Bin Meng                              6 (0.8%)
+   FRANJOU Stephane                      6 (0.8%)
+   Claudiu Beznea                        6 (0.8%)
+   Michael Trimarchi                     5 (0.7%)
+   Peng Fan                              5 (0.7%)
+   Jens Wiklander                        5 (0.7%)
+   Yu Chien Peter Lin                    4 (0.5%)
+   Andre Przywara                        3 (0.4%)
+   Pali Rohár                            3 (0.4%)
+   Viacheslav Mitrofanov                 3 (0.4%)
+   Ye Li                                 3 (0.4%)
+   Dhruva Gole                           3 (0.4%)
+   Marcel Ziswiler                       2 (0.3%)
+   Oleksandr Suvorov                     2 (0.3%)
+   Wei Liang Lim                         2 (0.3%)
+   Eng Lee Teh                           2 (0.3%)
+   Minkyu Kang                           2 (0.3%)
+   Tudor Ambarus                         2 (0.3%)
+   Philipp Tomsich                       2 (0.3%)
+   Etienne Carriere                      2 (0.3%)
+   Masahisa Kojima                       2 (0.3%)
+   Eugen Hristev                         2 (0.3%)
+   Francesco Dolcini                     1 (0.1%)
+   Michal Simek                          1 (0.1%)
+   Jonas Karlman                         1 (0.1%)
+   Nishanth Menon                        1 (0.1%)
+   Siddharth Vadapalli                   1 (0.1%)
+   Matthias Brugger                      1 (0.1%)
+   Chia-Wei Wang                         1 (0.1%)
+   Huang Jianan                          1 (0.1%)
+   Oliver Graute                         1 (0.1%)
+   Pratyush Yadav                        1 (0.1%)
+   Soeren Moch                           1 (0.1%)
+   Sunil V L                             1 (0.1%)
+   Miquel Raynal                         1 (0.1%)
+   Hector Palacios                       1 (0.1%)
+   Derald Woods                          1 (0.1%)
+   Nick Desaulniers                      1 (0.1%)
+   Frieder Schrempf                      1 (0.1%)
+   Adam Ford                             1 (0.1%)
+   Sumit Garg                            1 (0.1%)
+   Christophe Leroy                      1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most test credits (total 78)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Svyatoslav Ryhel                      12 (15.4%)
+   Andreas Westman Dorcsak               11 (14.1%)
+   Thierry Reding                        9 (11.5%)
+   Robert Eckelmann                      8 (10.3%)
+   Samuel Holland                        6 (7.7%)
+   Vagrant Cascadian                     3 (3.8%)
+   Jagan Teki                            2 (2.6%)
+   Eugen Hristev                         2 (2.6%)
+   Jonas Schwöbel                        2 (2.6%)
+   Quentin Schulz                        2 (2.6%)
+   Agneli                                2 (2.6%)
+   Lothar Waßmann                        2 (2.6%)
+   Simon Glass                           1 (1.3%)
+   Fabio Estevam                         1 (1.3%)
+   Ilias Apalodimas                      1 (1.3%)
+   Rick Chen                             1 (1.3%)
+   Patrick Delaunay                      1 (1.3%)
+   Mattijs Korpershoek                   1 (1.3%)
+   Andre Przywara                        1 (1.3%)
+   Dhruva Gole                           1 (1.3%)
+   Jonas Karlman                         1 (1.3%)
+   Suniel Mahesh                         1 (1.3%)
+   Sjoerd Simons                         1 (1.3%)
+   Matwey V. Kornilov                    1 (1.3%)
+   Anand Moon                            1 (1.3%)
+   Vaishnav Achath                       1 (1.3%)
+   Karsten Merker                        1 (1.3%)
+   Sean Nyekjaer                         1 (1.3%)
+   Mihai Sain                            1 (1.3%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 78)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Svyatoslav Ryhel                      41 (52.6%)
+   Andre Przywara                        6 (7.7%)
+   Tom Rini                              5 (6.4%)
+   Simon Glass                           4 (5.1%)
+   Jonas Karlman                         3 (3.8%)
+   Loic Poulain                          3 (3.8%)
+   Ramin Khonsari                        2 (2.6%)
+   Jagan Teki                            1 (1.3%)
+   Patrick Delaunay                      1 (1.3%)
+   Dhruva Gole                           1 (1.3%)
+   Sjoerd Simons                         1 (1.3%)
+   Michael Trimarchi                     1 (1.3%)
+   Etienne Carriere                      1 (1.3%)
+   Peter Geis                            1 (1.3%)
+   Sergiu Moga                           1 (1.3%)
+   Maxim Schwalm                         1 (1.3%)
+   Kasper Revsbech                       1 (1.3%)
+   Neha Malcom Francis                   1 (1.3%)
+   Fabrice Gasnier                       1 (1.3%)
+   Maxim Cournoyer                       1 (1.3%)
+   Sergei Antonov                        1 (1.3%)
+   ====================================  =====
+
+
+.. table:: Developers with the most report credits (total 22)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Heinrich Schuchardt                   3 (13.6%)
+   Ilias Apalodimas                      2 (9.1%)
+   Patrick Delaunay                      1 (4.5%)
+   Sjoerd Simons                         1 (4.5%)
+   Samuel Holland                        1 (4.5%)
+   Quentin Schulz                        1 (4.5%)
+   Karsten Merker                        1 (4.5%)
+   Marek Vasut                           1 (4.5%)
+   Francesco Dolcini                     1 (4.5%)
+   Nishanth Menon                        1 (4.5%)
+   Oliver Graute                         1 (4.5%)
+   Anand Gadiyar                         1 (4.5%)
+   Philippe Schenker                     1 (4.5%)
+   Andreas Schwab                        1 (4.5%)
+   Stefan Herbrechtsmeier                1 (4.5%)
+   Carlos Rafael Giani                   1 (4.5%)
+   Dave Jones                            1 (4.5%)
+   Serge Bazanski                        1 (4.5%)
+   Sam Winchenbach                       1 (4.5%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 22)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           6 (27.3%)
+   Tom Rini                              5 (22.7%)
+   Heinrich Schuchardt                   3 (13.6%)
+   Qu Wenruo                             2 (9.1%)
+   Ilias Apalodimas                      1 (4.5%)
+   Maxim Cournoyer                       1 (4.5%)
+   Fabio Estevam                         1 (4.5%)
+   Vignesh Raghavendra                   1 (4.5%)
+   Harald Seiler                         1 (4.5%)
+   Sinthu Raja                           1 (4.5%)
+   ====================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             464 (27.4%)
+   Google, Inc.                          381 (22.5%)
+   Konsulko Group                        333 (19.7%)
+   Renesas Electronics                   84 (5.0%)
+   DENX Software Engineering             72 (4.3%)
+   Texas Instruments                     49 (2.9%)
+   Linaro                                47 (2.8%)
+   Edgeble AI Technologies Pvt. Ltd.     46 (2.7%)
+   ST Microelectronics                   40 (2.4%)
+   AMD                                   35 (2.1%)
+   NXP                                   25 (1.5%)
+   Toradex                               24 (1.4%)
+   Amarula Solutions                     20 (1.2%)
+   Collabora Ltd.                        20 (1.2%)
+   ARM                                   17 (1.0%)
+   Semihalf Embedded Systems             6 (0.4%)
+   Red Hat                               4 (0.2%)
+   Siemens                               4 (0.2%)
+   Socionext Inc.                        4 (0.2%)
+   BayLibre SAS                          3 (0.2%)
+   SUSE                                  3 (0.2%)
+   Pengutronix                           2 (0.1%)
+   Ronetix                               2 (0.1%)
+   Extreme Engineering Solutions         2 (0.1%)
+   Bootlin                               1 (0.1%)
+   Intel                                 1 (0.1%)
+   linutronix                            1 (0.1%)
+   Samsung                               1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             51007 (23.8%)
+   Texas Instruments                     42105 (19.6%)
+   Konsulko Group                        36464 (17.0%)
+   Google, Inc.                          30090 (14.0%)
+   Edgeble AI Technologies Pvt. Ltd.     23070 (10.7%)
+   Renesas Electronics                   14449 (6.7%)
+   Linaro                                4601 (2.1%)
+   DENX Software Engineering             4582 (2.1%)
+   AMD                                   1744 (0.8%)
+   Amarula Solutions                     1649 (0.8%)
+   ST Microelectronics                   882 (0.4%)
+   Bootlin                               860 (0.4%)
+   Socionext Inc.                        760 (0.4%)
+   ARM                                   724 (0.3%)
+   Collabora Ltd.                        413 (0.2%)
+   NXP                                   307 (0.1%)
+   Toradex                               290 (0.1%)
+   Red Hat                               214 (0.1%)
+   BayLibre SAS                          154 (0.1%)
+   Extreme Engineering Solutions         106 (0.0%)
+   Semihalf Embedded Systems             47 (0.0%)
+   Siemens                               43 (0.0%)
+   SUSE                                  34 (0.0%)
+   Pengutronix                           13 (0.0%)
+   Samsung                               9 (0.0%)
+   Ronetix                               4 (0.0%)
+   Intel                                 1 (0.0%)
+   linutronix                            1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Employers with the most signoffs (total 215)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Renesas Electronics                   30 (14.0%)
+   Rockchip                              29 (13.5%)
+   Toradex                               28 (13.0%)
+   (Unknown)                             27 (12.6%)
+   Amarula Solutions                     24 (11.2%)
+   AMD                                   23 (10.7%)
+   NVidia                                19 (8.8%)
+   Linaro                                9 (4.2%)
+   Texas Instruments                     5 (2.3%)
+   Konsulko Group                        5 (2.3%)
+   NXP                                   4 (1.9%)
+   ARM                                   3 (1.4%)
+   Canonical                             3 (1.4%)
+   Collabora Ltd.                        2 (0.9%)
+   Google, Inc.                          1 (0.5%)
+   BayLibre SAS                          1 (0.5%)
+   SUSE                                  1 (0.5%)
+   Intel                                 1 (0.5%)
+   ====================================  =====
+
+
+.. table:: Employers with the most hackers (total 160)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             85 (53.1%)
+   Linaro                                9 (5.6%)
+   Texas Instruments                     8 (5.0%)
+   AMD                                   7 (4.4%)
+   Collabora Ltd.                        6 (3.8%)
+   Toradex                               5 (3.1%)
+   DENX Software Engineering             5 (3.1%)
+   Amarula Solutions                     4 (2.5%)
+   NXP                                   4 (2.5%)
+   Renesas Electronics                   3 (1.9%)
+   ARM                                   3 (1.9%)
+   ST Microelectronics                   3 (1.9%)
+   SUSE                                  2 (1.2%)
+   Socionext Inc.                        2 (1.2%)
+   Konsulko Group                        1 (0.6%)
+   Google, Inc.                          1 (0.6%)
+   BayLibre SAS                          1 (0.6%)
+   Intel                                 1 (0.6%)
+   Edgeble AI Technologies Pvt. Ltd.     1 (0.6%)
+   Bootlin                               1 (0.6%)
+   Red Hat                               1 (0.6%)
+   Extreme Engineering Solutions         1 (0.6%)
+   Semihalf Embedded Systems             1 (0.6%)
+   Siemens                               1 (0.6%)
+   Pengutronix                           1 (0.6%)
+   Samsung                               1 (0.6%)
+   Ronetix                               1 (0.6%)
+   linutronix                            1 (0.6%)
+   ====================================  =====
+
diff --git a/doc/develop/statistics/u-boot-stats-v2023.07.rst b/doc/develop/statistics/u-boot-stats-v2023.07.rst
new file mode 100644
index 00000000000..4c8b47161c6
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2023.07.rst
@@ -0,0 +1,844 @@
+:orphan:
+
+Release Statistics for U-Boot v2023.07
+======================================
+
+* Processed 1668 changesets from 187 developers
+
+* 27 employers found
+
+* A total of 120881 lines added, 46887 removed (delta 73994)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           224 (13.4%)
+   Marek Vasut                           173 (10.4%)
+   Pali Rohár                            92 (5.5%)
+   Heinrich Schuchardt                   79 (4.7%)
+   Tom Rini                              60 (3.6%)
+   Jonas Karlman                         51 (3.1%)
+   Christian Hewitt                      47 (2.8%)
+   Peng Fan                              39 (2.3%)
+   Johan Jonker                          39 (2.3%)
+   Andrew Davis                          32 (1.9%)
+   Ye Li                                 32 (1.9%)
+   Christophe Leroy                      31 (1.9%)
+   Hai Pham                              25 (1.5%)
+   Bin Meng                              23 (1.4%)
+   Ioana Ciornei                         23 (1.4%)
+   Nikhil M Jain                         22 (1.3%)
+   Fabio Estevam                         21 (1.3%)
+   Manorit Chawdhry                      21 (1.3%)
+   Samuel Holland                        21 (1.3%)
+   Svyatoslav Ryhel                      21 (1.3%)
+   Eugen Hristev                         20 (1.2%)
+   Mathew McBride                        19 (1.1%)
+   Safae Ouajih                          19 (1.1%)
+   Rasmus Villemoes                      18 (1.1%)
+   Yanhong Wang                          16 (1.0%)
+   Eduard Strehlau                       14 (0.8%)
+   Michal Simek                          13 (0.8%)
+   Jan Kiszka                            13 (0.8%)
+   Dzmitry Sankouski                     13 (0.8%)
+   Kunihiko Hayashi                      12 (0.7%)
+   Ilias Apalodimas                      11 (0.7%)
+   FUKAUMI Naoki                         11 (0.7%)
+   Ralph Siemsen                         10 (0.6%)
+   Jernej Skrabec                        10 (0.6%)
+   Tobias Waldekranz                     9 (0.5%)
+   Tim Harvey                            8 (0.5%)
+   Neha Francis                          8 (0.5%)
+   John Keeping                          8 (0.5%)
+   Ashok Reddy Soma                      8 (0.5%)
+   Andre Przywara                        7 (0.4%)
+   Andrejs Cainikovs                     7 (0.4%)
+   Stefan Herbrechtsmeier                7 (0.4%)
+   Vladimir Zapolskiy                    7 (0.4%)
+   Abdellatif El Khlifi                  7 (0.4%)
+   Angelo Dureghello                     7 (0.4%)
+   Marcel Ziswiler                       7 (0.4%)
+   Sean Edmond                           6 (0.4%)
+   Jacky Bai                             6 (0.4%)
+   Patrick Delaunay                      6 (0.4%)
+   Linus Walleij                         6 (0.4%)
+   Peter Hoyes                           6 (0.4%)
+   Will Deacon                           6 (0.4%)
+   Patrice Chotard                       6 (0.4%)
+   Emanuele Ghidoli                      6 (0.4%)
+   Álvaro Fernández Rojas                6 (0.4%)
+   Algapally Santosh Sagar               5 (0.3%)
+   Baruch Siach                          5 (0.3%)
+   Chris Morgan                          5 (0.3%)
+   Hugo Villeneuve                       5 (0.3%)
+   Marc Zyngier                          5 (0.3%)
+   Tho Vu                                5 (0.3%)
+   Ovidiu Panait                         5 (0.3%)
+   Chunfeng Yun                          5 (0.3%)
+   Josua Mayer                           4 (0.2%)
+   Thomas RIENOESSL                      4 (0.2%)
+   Yang Xiwen                            4 (0.2%)
+   Dario Binacchi                        4 (0.2%)
+   Tony Dinh                             4 (0.2%)
+   Evgeny Bachinin                       4 (0.2%)
+   Sergiu Moga                           4 (0.2%)
+   Xavier Drudis Ferran                  3 (0.2%)
+   Sam Edwards                           3 (0.2%)
+   Dhruva Gole                           3 (0.2%)
+   Stefan Roese                          3 (0.2%)
+   Jon Lin                               3 (0.2%)
+   Christian Gmeiner                     3 (0.2%)
+   Ehsan Mohandesi                       3 (0.2%)
+   Nishanth Menon                        3 (0.2%)
+   Dmitrii Merkurev                      3 (0.2%)
+   Pavel Skripkin                        3 (0.2%)
+   Karl Chan                             3 (0.2%)
+   Frieder Schrempf                      3 (0.2%)
+   Martin Rowe                           3 (0.2%)
+   Loic Poulain                          3 (0.2%)
+   Corentin Guillevic                    3 (0.2%)
+   Markus Niebel                         3 (0.2%)
+   Ivan Mikhaylov                        3 (0.2%)
+   Stephen Carlson                       3 (0.2%)
+   Krzysztof Kozlowski                   3 (0.2%)
+   Kamal Dasu                            3 (0.2%)
+   Francesco Dolcini                     2 (0.1%)
+   Ondrej Jirman                         2 (0.1%)
+   Mark Kettenis                         2 (0.1%)
+   Neil Armstrong                        2 (0.1%)
+   Quentin Schulz                        2 (0.1%)
+   Henrik Grimler                        2 (0.1%)
+   Neal Frager                           2 (0.1%)
+   Judith Mendez                         2 (0.1%)
+   Sergei Antonov                        2 (0.1%)
+   Kishon Vijay Abraham I                2 (0.1%)
+   Daniel Golle                          2 (0.1%)
+   Bhupesh Sharma                        2 (0.1%)
+   Konrad Dybcio                         2 (0.1%)
+   Apurva Nandan                         2 (0.1%)
+   Christophe Kerello                    2 (0.1%)
+   Phong Hoang                           2 (0.1%)
+   Roman Kopytin                         2 (0.1%)
+   Chris Packham                         2 (0.1%)
+   Philippe Schenker                     2 (0.1%)
+   Janne Grunau                          2 (0.1%)
+   Sinthu Raja                           2 (0.1%)
+   chao zeng                             2 (0.1%)
+   Su Baocheng                           2 (0.1%)
+   Dylan Hung                            2 (0.1%)
+   Heiko Schocher                        1 (0.1%)
+   Ken Sloat                             1 (0.1%)
+   Kever Yang                            1 (0.1%)
+   Peter Robinson                        1 (0.1%)
+   Mingli Yu                             1 (0.1%)
+   Frank Wunderlich                      1 (0.1%)
+   Teik Heng Chong                       1 (0.1%)
+   Clément Léger                         1 (0.1%)
+   Thomas Perrot                         1 (0.1%)
+   Ilko Iliev                            1 (0.1%)
+   Mayuresh Chitale                      1 (0.1%)
+   Detlev Casanova                       1 (0.1%)
+   Adam Ford                             1 (0.1%)
+   LUU HOAI                              1 (0.1%)
+   Hiroyuki Yokoyama                     1 (0.1%)
+   Mattijs Korpershoek                   1 (0.1%)
+   Ben Dooks                             1 (0.1%)
+   Andrea Merello                        1 (0.1%)
+   Dave Gerlach                          1 (0.1%)
+   Bryan Brattlof                        1 (0.1%)
+   Fedor Ross                            1 (0.1%)
+   Wadim Egorov                          1 (0.1%)
+   Wolfgang Zarre                        1 (0.1%)
+   Christopher Obbard                    1 (0.1%)
+   Joseph Chen                           1 (0.1%)
+   Raphael Gallais-Pou                   1 (0.1%)
+   Nuno Sá                               1 (0.1%)
+   Tianling Shen                         1 (0.1%)
+   Vignesh Raghavendra                   1 (0.1%)
+   Dominique Martinet                    1 (0.1%)
+   Christian Kohlschütter                1 (0.1%)
+   Michael Trimarchi                     1 (0.1%)
+   Ying-Chun Liu (PaulLiu)               1 (0.1%)
+   Elmar Psilog                          1 (0.1%)
+   Praneeth Bajjuri                      1 (0.1%)
+   Alexander Shirokov                    1 (0.1%)
+   Nitin Yadav                           1 (0.1%)
+   Aradhya Bhatia                        1 (0.1%)
+   Oliver Graute                         1 (0.1%)
+   Patrick Wildt                         1 (0.1%)
+   Jorge Ramirez-Ortiz                   1 (0.1%)
+   Takahiro Kuwano                       1 (0.1%)
+   Sinan Akman                           1 (0.1%)
+   Devarsh Thakkar                       1 (0.1%)
+   Jayesh Choudhary                      1 (0.1%)
+   meitao                                1 (0.1%)
+   Jim Liu                               1 (0.1%)
+   Peter Geis                            1 (0.1%)
+   Jonathan Liu                          1 (0.1%)
+   Jianqun Xu                            1 (0.1%)
+   Vasily Khoruzhick                     1 (0.1%)
+   Kuan Lim Lee                          1 (0.1%)
+   Jianlong Huang                        1 (0.1%)
+   Lionel Debieve                        1 (0.1%)
+   ETIENNE DUBLE                         1 (0.1%)
+   Haibo Chen                            1 (0.1%)
+   Francis Laniel                        1 (0.1%)
+   Tim Lee                               1 (0.1%)
+   Vladimir Oltean                       1 (0.1%)
+   Luca Ceresoli                         1 (0.1%)
+   Quanyang Wang                         1 (0.1%)
+   Tommaso Merciai                       1 (0.1%)
+   Igor Opaniuk                          1 (0.1%)
+   Max Krummenacher                      1 (0.1%)
+   Jean-Marie Lemetayer                  1 (0.1%)
+   Stefan Eichenberger                   1 (0.1%)
+   Claudiu Beznea                        1 (0.1%)
+   Mikhail Lappo                         1 (0.1%)
+   Jiajie Chen                           1 (0.1%)
+   Michael Grzeschik                     1 (0.1%)
+   Pierre-Clément Tosi                   1 (0.1%)
+   Ryan Chen                             1 (0.1%)
+   Claire Lin                            1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           14640 (10.3%)
+   Marek Vasut                           11805 (8.3%)
+   Dzmitry Sankouski                     9062 (6.4%)
+   Tom Rini                              8562 (6.0%)
+   Hai Pham                              7139 (5.0%)
+   Yanhong Wang                          7001 (4.9%)
+   Christophe Leroy                      6098 (4.3%)
+   Peng Fan                              5493 (3.9%)
+   Ralph Siemsen                         5477 (3.8%)
+   Christian Hewitt                      5207 (3.7%)
+   Ioana Ciornei                         4038 (2.8%)
+   Adam Ford                             3578 (2.5%)
+   Svyatoslav Ryhel                      3377 (2.4%)
+   Chris Morgan                          3010 (2.1%)
+   Andrew Davis                          2844 (2.0%)
+   Phong Hoang                           2503 (1.8%)
+   LUU HOAI                              2126 (1.5%)
+   Manorit Chawdhry                      2116 (1.5%)
+   Patrick Wildt                         1766 (1.2%)
+   Ye Li                                 1710 (1.2%)
+   Pali Rohár                            1592 (1.1%)
+   Eugen Hristev                         1463 (1.0%)
+   Heinrich Schuchardt                   1353 (0.9%)
+   Kunihiko Hayashi                      1335 (0.9%)
+   Tobias Waldekranz                     1242 (0.9%)
+   Sean Edmond                           1182 (0.8%)
+   Oliver Graute                         1155 (0.8%)
+   FUKAUMI Naoki                         1140 (0.8%)
+   Mathew McBride                        1129 (0.8%)
+   Linus Walleij                         1117 (0.8%)
+   Safae Ouajih                          1098 (0.8%)
+   Jonas Karlman                         1005 (0.7%)
+   Kuan Lim Lee                          1001 (0.7%)
+   Johan Jonker                          872 (0.6%)
+   Nikhil M Jain                         801 (0.6%)
+   Jan Kiszka                            718 (0.5%)
+   Abdellatif El Khlifi                  677 (0.5%)
+   Tho Vu                                661 (0.5%)
+   Neil Armstrong                        646 (0.5%)
+   Neha Francis                          588 (0.4%)
+   Yang Xiwen                            588 (0.4%)
+   Fabio Estevam                         575 (0.4%)
+   Jianqun Xu                            541 (0.4%)
+   Jernej Skrabec                        525 (0.4%)
+   Chris Packham                         498 (0.3%)
+   Ehsan Mohandesi                       459 (0.3%)
+   Samuel Holland                        441 (0.3%)
+   Jianlong Huang                        427 (0.3%)
+   Jacky Bai                             402 (0.3%)
+   Andre Przywara                        388 (0.3%)
+   Emanuele Ghidoli                      375 (0.3%)
+   Dmitrii Merkurev                      366 (0.3%)
+   Rasmus Villemoes                      341 (0.2%)
+   Ivan Mikhaylov                        336 (0.2%)
+   Angelo Dureghello                     335 (0.2%)
+   Kever Yang                            319 (0.2%)
+   Marc Zyngier                          315 (0.2%)
+   Daniel Golle                          304 (0.2%)
+   Karl Chan                             290 (0.2%)
+   Roman Kopytin                         290 (0.2%)
+   Su Baocheng                           249 (0.2%)
+   Stephen Carlson                       245 (0.2%)
+   Sergiu Moga                           244 (0.2%)
+   Sergei Antonov                        242 (0.2%)
+   Tim Harvey                            227 (0.2%)
+   Chunfeng Yun                          208 (0.1%)
+   Ilias Apalodimas                      192 (0.1%)
+   Aradhya Bhatia                        187 (0.1%)
+   Mark Kettenis                         177 (0.1%)
+   Kamal Dasu                            165 (0.1%)
+   Eduard Strehlau                       162 (0.1%)
+   Tianling Shen                         162 (0.1%)
+   Thomas RIENOESSL                      145 (0.1%)
+   ETIENNE DUBLE                         142 (0.1%)
+   Lionel Debieve                        132 (0.1%)
+   Kishon Vijay Abraham I                131 (0.1%)
+   chao zeng                             129 (0.1%)
+   Will Deacon                           126 (0.1%)
+   Vladimir Zapolskiy                    118 (0.1%)
+   Martin Rowe                           118 (0.1%)
+   Xavier Drudis Ferran                  114 (0.1%)
+   Ashok Reddy Soma                      105 (0.1%)
+   Álvaro Fernández Rojas                102 (0.1%)
+   Jon Lin                               101 (0.1%)
+   Bin Meng                              93 (0.1%)
+   Algapally Santosh Sagar               85 (0.1%)
+   Ovidiu Panait                         85 (0.1%)
+   Takahiro Kuwano                       85 (0.1%)
+   Michal Simek                          83 (0.1%)
+   Evgeny Bachinin                       83 (0.1%)
+   Marcel Ziswiler                       82 (0.1%)
+   Stefan Herbrechtsmeier                80 (0.1%)
+   Joseph Chen                           77 (0.1%)
+   Dario Binacchi                        76 (0.1%)
+   Josua Mayer                           70 (0.0%)
+   Andrejs Cainikovs                     67 (0.0%)
+   Claudiu Beznea                        64 (0.0%)
+   Patrice Chotard                       59 (0.0%)
+   Jim Liu                               59 (0.0%)
+   Jayesh Choudhary                      53 (0.0%)
+   Sinthu Raja                           51 (0.0%)
+   Stefan Roese                          48 (0.0%)
+   Pavel Skripkin                        43 (0.0%)
+   Apurva Nandan                         43 (0.0%)
+   Patrick Delaunay                      42 (0.0%)
+   Hugo Villeneuve                       39 (0.0%)
+   Loic Poulain                          37 (0.0%)
+   Markus Niebel                         36 (0.0%)
+   Christophe Kerello                    36 (0.0%)
+   Nitin Yadav                           36 (0.0%)
+   Sinan Akman                           35 (0.0%)
+   Peter Hoyes                           34 (0.0%)
+   John Keeping                          31 (0.0%)
+   Judith Mendez                         28 (0.0%)
+   Teik Heng Chong                       26 (0.0%)
+   Francesco Dolcini                     25 (0.0%)
+   Tony Dinh                             24 (0.0%)
+   Quanyang Wang                         24 (0.0%)
+   Tommaso Merciai                       24 (0.0%)
+   Nishanth Menon                        22 (0.0%)
+   Christopher Obbard                    22 (0.0%)
+   Christian Gmeiner                     18 (0.0%)
+   Francis Laniel                        17 (0.0%)
+   Frieder Schrempf                      16 (0.0%)
+   Elmar Psilog                          15 (0.0%)
+   meitao                                13 (0.0%)
+   Max Krummenacher                      13 (0.0%)
+   Thomas Perrot                         12 (0.0%)
+   Peter Geis                            12 (0.0%)
+   Neal Frager                           11 (0.0%)
+   Jorge Ramirez-Ortiz                   11 (0.0%)
+   Quentin Schulz                        10 (0.0%)
+   Nuno Sá                               10 (0.0%)
+   Dhruva Gole                           9 (0.0%)
+   Luca Ceresoli                         9 (0.0%)
+   Pierre-Clément Tosi                   9 (0.0%)
+   Baruch Siach                          8 (0.0%)
+   Ondrej Jirman                         8 (0.0%)
+   Detlev Casanova                       8 (0.0%)
+   Wolfgang Zarre                        8 (0.0%)
+   Vladimir Oltean                       8 (0.0%)
+   Konrad Dybcio                         7 (0.0%)
+   Hiroyuki Yokoyama                     7 (0.0%)
+   Krzysztof Kozlowski                   6 (0.0%)
+   Bhupesh Sharma                        6 (0.0%)
+   Frank Wunderlich                      6 (0.0%)
+   Devarsh Thakkar                       6 (0.0%)
+   Dylan Hung                            5 (0.0%)
+   Ben Dooks                             5 (0.0%)
+   Sam Edwards                           4 (0.0%)
+   Philippe Schenker                     4 (0.0%)
+   Mattijs Korpershoek                   4 (0.0%)
+   Christian Kohlschütter                4 (0.0%)
+   Mikhail Lappo                         4 (0.0%)
+   Ryan Chen                             4 (0.0%)
+   Claire Lin                            4 (0.0%)
+   Corentin Guillevic                    3 (0.0%)
+   Janne Grunau                          3 (0.0%)
+   Andrea Merello                        3 (0.0%)
+   Bryan Brattlof                        3 (0.0%)
+   Dominique Martinet                    3 (0.0%)
+   Vasily Khoruzhick                     3 (0.0%)
+   Tim Lee                               3 (0.0%)
+   Jiajie Chen                           3 (0.0%)
+   Henrik Grimler                        2 (0.0%)
+   Mingli Yu                             2 (0.0%)
+   Ilko Iliev                            2 (0.0%)
+   Mayuresh Chitale                      2 (0.0%)
+   Dave Gerlach                          2 (0.0%)
+   Raphael Gallais-Pou                   2 (0.0%)
+   Vignesh Raghavendra                   2 (0.0%)
+   Michael Trimarchi                     2 (0.0%)
+   Ying-Chun Liu (PaulLiu)               2 (0.0%)
+   Praneeth Bajjuri                      2 (0.0%)
+   Alexander Shirokov                    2 (0.0%)
+   Jonathan Liu                          2 (0.0%)
+   Haibo Chen                            2 (0.0%)
+   Michael Grzeschik                     2 (0.0%)
+   Heiko Schocher                        1 (0.0%)
+   Ken Sloat                             1 (0.0%)
+   Peter Robinson                        1 (0.0%)
+   Clément Léger                         1 (0.0%)
+   Fedor Ross                            1 (0.0%)
+   Wadim Egorov                          1 (0.0%)
+   Igor Opaniuk                          1 (0.0%)
+   Jean-Marie Lemetayer                  1 (0.0%)
+   Stefan Eichenberger                   1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              5481 (11.7%)
+   Ioana Ciornei                         3633 (7.7%)
+   Christophe Leroy                      2651 (5.7%)
+   Manorit Chawdhry                      1764 (3.8%)
+   Andrew Davis                          443 (0.9%)
+   Emanuele Ghidoli                      240 (0.5%)
+   Fabio Estevam                         235 (0.5%)
+   Tim Harvey                            197 (0.4%)
+   Stefan Roese                          36 (0.1%)
+   Hugo Villeneuve                       34 (0.1%)
+   Bin Meng                              33 (0.1%)
+   Ovidiu Panait                         24 (0.1%)
+   Francesco Dolcini                     23 (0.0%)
+   Andrejs Cainikovs                     22 (0.0%)
+   Teik Heng Chong                       14 (0.0%)
+   Quentin Schulz                        8 (0.0%)
+   Nishanth Menon                        5 (0.0%)
+   Krzysztof Kozlowski                   2 (0.0%)
+   Sam Edwards                           2 (0.0%)
+   Mikhail Lappo                         2 (0.0%)
+   Quanyang Wang                         1 (0.0%)
+   Dylan Hung                            1 (0.0%)
+   Jiajie Chen                           1 (0.0%)
+   Dave Gerlach                          1 (0.0%)
+   Heiko Schocher                        1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most signoffs (total 389)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Neil Armstrong                        51 (13.1%)
+   Peng Fan                              49 (12.6%)
+   Marek Vasut                           33 (8.5%)
+   Andre Przywara                        30 (7.7%)
+   Michal Simek                          25 (6.4%)
+   Dario Binacchi                        21 (5.4%)
+   Fabio Estevam                         14 (3.6%)
+   Ying-Chun Liu (PaulLiu)               13 (3.3%)
+   Hai Pham                              12 (3.1%)
+   Andrejs Cainikovs                     10 (2.6%)
+   Miquel Raynal                         10 (2.6%)
+   Linus Walleij                         10 (2.6%)
+   Simon Glass                           7 (1.8%)
+   Ashok Reddy Soma                      5 (1.3%)
+   Marcel Ziswiler                       5 (1.3%)
+   Jonas Karlman                         5 (1.3%)
+   Eugen Hristev                         5 (1.3%)
+   Tom Rini                              4 (1.0%)
+   Claudiu Beznea                        4 (1.0%)
+   Ilias Apalodimas                      4 (1.0%)
+   Jan Kiszka                            4 (1.0%)
+   Heinrich Schuchardt                   4 (1.0%)
+   Pierre-Clément Tosi                   3 (0.8%)
+   Christian Hewitt                      3 (0.8%)
+   Manorit Chawdhry                      2 (0.5%)
+   Francesco Dolcini                     2 (0.5%)
+   Vignesh Raghavendra                   2 (0.5%)
+   Stefano Babic                         2 (0.5%)
+   Siddharth Vadapalli                   2 (0.5%)
+   Yifeng Zhao                           2 (0.5%)
+   Emil Renner Berthing                  2 (0.5%)
+   Takeshi Kihara                        2 (0.5%)
+   Anatolij Gustschin                    2 (0.5%)
+   Dhruva Gole                           2 (0.5%)
+   Vladimir Zapolskiy                    2 (0.5%)
+   Ivan Mikhaylov                        2 (0.5%)
+   Ye Li                                 2 (0.5%)
+   LUU HOAI                              2 (0.5%)
+   Yanhong Wang                          2 (0.5%)
+   Bin Meng                              1 (0.3%)
+   Frank Wunderlich                      1 (0.3%)
+   Geert Uytterhoeven                    1 (0.3%)
+   Jagan Teki                            1 (0.3%)
+   Tero Kristo                           1 (0.3%)
+   Kamlesh Gurudasani                    1 (0.3%)
+   Ren Jianing                           1 (0.3%)
+   Frank Wang                            1 (0.3%)
+   William Wu                            1 (0.3%)
+   Stephen Chen                          1 (0.3%)
+   Manoj Sai                             1 (0.3%)
+   Paweł Jarosz                          1 (0.3%)
+   Cong Dang                             1 (0.3%)
+   Lin Jinhan                            1 (0.3%)
+   Nam Nguyen                            1 (0.3%)
+   Bryan Brattlof                        1 (0.3%)
+   Patrick Delaunay                      1 (0.3%)
+   Thomas Perrot                         1 (0.3%)
+   Apurva Nandan                         1 (0.3%)
+   Neha Francis                          1 (0.3%)
+   Will Deacon                           1 (0.3%)
+   Kamal Dasu                            1 (0.3%)
+   Samuel Holland                        1 (0.3%)
+   Kever Yang                            1 (0.3%)
+   Jianlong Huang                        1 (0.3%)
+   Kuan Lim Lee                          1 (0.3%)
+   Phong Hoang                           1 (0.3%)
+   Svyatoslav Ryhel                      1 (0.3%)
+   ====================================  =====
+
+
+.. table:: Developers with the most reviews (total 991)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           291 (29.4%)
+   Kever Yang                            117 (11.8%)
+   Marek Vasut                           69 (7.0%)
+   Peng Fan                              54 (5.4%)
+   Ramon Fried                           49 (4.9%)
+   Bin Meng                              34 (3.4%)
+   Stefan Roese                          29 (2.9%)
+   Tom Rini                              23 (2.3%)
+   Andre Przywara                        21 (2.1%)
+   Ioana Ciornei                         20 (2.0%)
+   Mattijs Korpershoek                   20 (2.0%)
+   Michael Trimarchi                     19 (1.9%)
+   Jagan Teki                            15 (1.5%)
+   Neil Armstrong                        13 (1.3%)
+   Devarsh Thakkar                       13 (1.3%)
+   Fabio Estevam                         12 (1.2%)
+   Ilias Apalodimas                      12 (1.2%)
+   Heiko Schocher                        12 (1.2%)
+   Christian Gmeiner                     12 (1.2%)
+   Heinrich Schuchardt                   11 (1.1%)
+   Ye Li                                 10 (1.0%)
+   Patrick Delaunay                      8 (0.8%)
+   Rick Chen                             8 (0.8%)
+   Patrice Chotard                       8 (0.8%)
+   Michal Simek                          7 (0.7%)
+   Kamlesh Gurudasani                    7 (0.7%)
+   Leo Yu-Chi Liang                      7 (0.7%)
+   Jaehoon Chung                         7 (0.7%)
+   Bryan Brattlof                        6 (0.6%)
+   Konrad Dybcio                         5 (0.5%)
+   Jacky Bai                             5 (0.5%)
+   Jernej Skrabec                        5 (0.5%)
+   Claudiu Beznea                        4 (0.4%)
+   Sean Anderson                         4 (0.4%)
+   Douglas Anderson                      4 (0.4%)
+   Vladimir Oltean                       4 (0.4%)
+   Jonas Karlman                         3 (0.3%)
+   Viacheslav Mitrofanov                 3 (0.3%)
+   Mark Kettenis                         3 (0.3%)
+   Andrejs Cainikovs                     2 (0.2%)
+   Minkyu Kang                           2 (0.2%)
+   Sumit Garg                            2 (0.2%)
+   Joel Stanley                          2 (0.2%)
+   Ying-Chun Liu (PaulLiu)               1 (0.1%)
+   Miquel Raynal                         1 (0.1%)
+   Marcel Ziswiler                       1 (0.1%)
+   Eugen Hristev                         1 (0.1%)
+   Manorit Chawdhry                      1 (0.1%)
+   Francesco Dolcini                     1 (0.1%)
+   Dhruva Gole                           1 (0.1%)
+   Geert Uytterhoeven                    1 (0.1%)
+   Neha Francis                          1 (0.1%)
+   Andrew Davis                          1 (0.1%)
+   Tim Harvey                            1 (0.1%)
+   Quentin Schulz                        1 (0.1%)
+   Krzysztof Kozlowski                   1 (0.1%)
+   Qu Wenruo                             1 (0.1%)
+   Marek Behún                           1 (0.1%)
+   Pratyush Yadav                        1 (0.1%)
+   Shawn Lin                             1 (0.1%)
+   Alexander Kochetkov                   1 (0.1%)
+   Andrew Pinski                         1 (0.1%)
+   Alice Guo                             1 (0.1%)
+   Chia-Wei Wang                         1 (0.1%)
+   Ray Jui                               1 (0.1%)
+   Peter Robinson                        1 (0.1%)
+   Frieder Schrempf                      1 (0.1%)
+   John Keeping                          1 (0.1%)
+   Sergei Antonov                        1 (0.1%)
+   Chris Packham                         1 (0.1%)
+   Pali Rohár                            1 (0.1%)
+   Adam Ford                             1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most test credits (total 210)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Michal Simek                          41 (19.5%)
+   Mattijs Korpershoek                   19 (9.0%)
+   Ioana Ciornei                         18 (8.6%)
+   Svyatoslav Ryhel                      17 (8.1%)
+   Conor Dooley                          17 (8.1%)
+   Andreas Westman Dorcsak               15 (7.1%)
+   Simon Glass                           12 (5.7%)
+   Tony Dinh                             8 (3.8%)
+   Robert Eckelmann                      7 (3.3%)
+   Nicolas Chauvet                       7 (3.3%)
+   Martin Rowe                           7 (3.3%)
+   Bin Meng                              6 (2.9%)
+   Tom Rini                              4 (1.9%)
+   Heiko Schocher                        4 (1.9%)
+   Jonas Karlman                         4 (1.9%)
+   Marek Vasut                           2 (1.0%)
+   Jagan Teki                            2 (1.0%)
+   Viacheslav Mitrofanov                 2 (1.0%)
+   Quentin Schulz                        2 (1.0%)
+   Vagrant Cascadian                     2 (1.0%)
+   Nikhil M Jain                         2 (1.0%)
+   Fabio Estevam                         1 (0.5%)
+   Christian Gmeiner                     1 (0.5%)
+   Patrick Delaunay                      1 (0.5%)
+   Mark Kettenis                         1 (0.5%)
+   Eugen Hristev                         1 (0.5%)
+   Francesco Dolcini                     1 (0.5%)
+   Peter Robinson                        1 (0.5%)
+   Sergei Antonov                        1 (0.5%)
+   Frank Wunderlich                      1 (0.5%)
+   Ion Agorria                           1 (0.5%)
+   Jonas Schwöbel                        1 (0.5%)
+   Alexandre Ghiti                       1 (0.5%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 210)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Svyatoslav Ryhel                      45 (21.4%)
+   Marek Vasut                           41 (19.5%)
+   Safae Ouajih                          19 (9.0%)
+   Pali Rohár                            18 (8.6%)
+   Mathew McBride                        18 (8.6%)
+   Yanhong Wang                          15 (7.1%)
+   Simon Glass                           13 (6.2%)
+   Johan Jonker                          7 (3.3%)
+   Nikhil M Jain                         5 (2.4%)
+   Jonas Karlman                         3 (1.4%)
+   Fabio Estevam                         3 (1.4%)
+   Marcel Ziswiler                       3 (1.4%)
+   Xavier Drudis Ferran                  3 (1.4%)
+   Ehsan Mohandesi                       3 (1.4%)
+   Dhruva Gole                           2 (1.0%)
+   Patrick Wildt                         2 (1.0%)
+   Heinrich Schuchardt                   1 (0.5%)
+   Tim Harvey                            1 (0.5%)
+   Linus Walleij                         1 (0.5%)
+   Jianlong Huang                        1 (0.5%)
+   Kuan Lim Lee                          1 (0.5%)
+   Ondrej Jirman                         1 (0.5%)
+   Francis Laniel                        1 (0.5%)
+   Lionel Debieve                        1 (0.5%)
+   Daniel Golle                          1 (0.5%)
+   Jianqun Xu                            1 (0.5%)
+   ====================================  =====
+
+
+.. table:: Developers with the most report credits (total 20)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              7 (35.0%)
+   Francesco Dolcini                     2 (10.0%)
+   Mark Millard                          2 (10.0%)
+   Pali Rohár                            1 (5.0%)
+   Heinrich Schuchardt                   1 (5.0%)
+   Patrick Delaunay                      1 (5.0%)
+   Mark Kettenis                         1 (5.0%)
+   Frank Wunderlich                      1 (5.0%)
+   Alexandre Ghiti                       1 (5.0%)
+   Andre Przywara                        1 (5.0%)
+   AdityaK                               1 (5.0%)
+   Rob Herring                           1 (5.0%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 20)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Heinrich Schuchardt                   5 (25.0%)
+   Simon Glass                           3 (15.0%)
+   Nishanth Menon                        3 (15.0%)
+   Tom Rini                              2 (10.0%)
+   Patrick Delaunay                      2 (10.0%)
+   Fabio Estevam                         2 (10.0%)
+   Ilias Apalodimas                      1 (5.0%)
+   Ying-Chun Liu (PaulLiu)               1 (5.0%)
+   Krzysztof Kozlowski                   1 (5.0%)
+   ====================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             704 (42.2%)
+   Google, Inc.                          234 (14.0%)
+   Renesas Electronics                   163 (9.8%)
+   Texas Instruments                     105 (6.3%)
+   NXP                                   102 (6.1%)
+   DENX Software Engineering             69 (4.1%)
+   Konsulko Group                        60 (3.6%)
+   Linaro                                47 (2.8%)
+   AMD                                   28 (1.7%)
+   Collabora Ltd.                        22 (1.3%)
+   ARM                                   20 (1.2%)
+   BayLibre SAS                          20 (1.2%)
+   Toradex                               19 (1.1%)
+   Siemens                               17 (1.0%)
+   ST Microelectronics                   16 (1.0%)
+   Socionext Inc.                        12 (0.7%)
+   Weidmüller Interface GmbH & Co. KG    7 (0.4%)
+   Amarula Solutions                     6 (0.4%)
+   Rockchip                              6 (0.4%)
+   Bootlin                               3 (0.2%)
+   Wind River                            2 (0.1%)
+   Analog Devices                        1 (0.1%)
+   Broadcom                              1 (0.1%)
+   Intel                                 1 (0.1%)
+   Pengutronix                           1 (0.1%)
+   Phytec                                1 (0.1%)
+   Ronetix                               1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             59395 (41.6%)
+   Renesas Electronics                   16879 (11.8%)
+   Google, Inc.                          15141 (10.6%)
+   NXP                                   11653 (8.2%)
+   Konsulko Group                        8562 (6.0%)
+   DENX Software Engineering             7986 (5.6%)
+   Linaro                                7608 (5.3%)
+   Texas Instruments                     6924 (4.9%)
+   Collabora Ltd.                        1493 (1.0%)
+   Socionext Inc.                        1335 (0.9%)
+   BayLibre SAS                          1102 (0.8%)
+   ARM                                   1099 (0.8%)
+   Siemens                               1096 (0.8%)
+   Rockchip                              1038 (0.7%)
+   Toradex                               500 (0.4%)
+   AMD                                   284 (0.2%)
+   ST Microelectronics                   271 (0.2%)
+   Amarula Solutions                     95 (0.1%)
+   Weidmüller Interface GmbH & Co. KG    80 (0.1%)
+   Wind River                            26 (0.0%)
+   Intel                                 26 (0.0%)
+   Bootlin                               22 (0.0%)
+   Analog Devices                        10 (0.0%)
+   Broadcom                              4 (0.0%)
+   Pengutronix                           2 (0.0%)
+   Ronetix                               2 (0.0%)
+   Phytec                                1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Employers with the most signoffs (total 389)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Linaro                                80 (20.6%)
+   Renesas Electronics                   52 (13.4%)
+   NXP                                   51 (13.1%)
+   ARM                                   30 (7.7%)
+   AMD                                   30 (7.7%)
+   (Unknown)                             29 (7.5%)
+   Amarula Solutions                     23 (5.9%)
+   DENX Software Engineering             18 (4.6%)
+   Toradex                               17 (4.4%)
+   Texas Instruments                     12 (3.1%)
+   Google, Inc.                          11 (2.8%)
+   Bootlin                               11 (2.8%)
+   Rockchip                              7 (1.8%)
+   Collabora Ltd.                        5 (1.3%)
+   Konsulko Group                        4 (1.0%)
+   Siemens                               4 (1.0%)
+   Canonical                             4 (1.0%)
+   ST Microelectronics                   1 (0.3%)
+   ====================================  =====
+
+
+.. table:: Employers with the most hackers (total 188)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             93 (49.5%)
+   Texas Instruments                     18 (9.6%)
+   Linaro                                10 (5.3%)
+   Renesas Electronics                   6 (3.2%)
+   NXP                                   6 (3.2%)
+   Toradex                               6 (3.2%)
+   ST Microelectronics                   5 (2.7%)
+   AMD                                   4 (2.1%)
+   DENX Software Engineering             4 (2.1%)
+   Google, Inc.                          4 (2.1%)
+   Rockchip                              4 (2.1%)
+   ARM                                   3 (1.6%)
+   Amarula Solutions                     3 (1.6%)
+   Bootlin                               3 (1.6%)
+   Collabora Ltd.                        3 (1.6%)
+   Siemens                               3 (1.6%)
+   BayLibre SAS                          2 (1.1%)
+   Wind River                            2 (1.1%)
+   Konsulko Group                        1 (0.5%)
+   Socionext Inc.                        1 (0.5%)
+   Weidmüller Interface GmbH & Co. KG    1 (0.5%)
+   Intel                                 1 (0.5%)
+   Analog Devices                        1 (0.5%)
+   Broadcom                              1 (0.5%)
+   Pengutronix                           1 (0.5%)
+   Ronetix                               1 (0.5%)
+   Phytec                                1 (0.5%)
+   ====================================  =====
+
diff --git a/doc/develop/statistics/u-boot-stats-v2023.10.rst b/doc/develop/statistics/u-boot-stats-v2023.10.rst
new file mode 100644
index 00000000000..334f2bb76ef
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2023.10.rst
@@ -0,0 +1,898 @@
+:orphan:
+
+Release Statistics for U-Boot v2023.10
+======================================
+
+* Processed 1530 changesets from 208 developers
+
+* 31 employers found
+
+* A total of 128954 lines added, 38436 removed (delta 90518)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           273 (17.8%)
+   Heinrich Schuchardt                   71 (4.6%)
+   Marek Vasut                           62 (4.1%)
+   Tom Rini                              57 (3.7%)
+   Jonas Karlman                         54 (3.5%)
+   Nishanth Menon                        35 (2.3%)
+   Bin Meng                              32 (2.1%)
+   Michal Simek                          31 (2.0%)
+   Camelia Groza                         30 (2.0%)
+   Weijie Gao                            29 (1.9%)
+   Patrick Delaunay                      25 (1.6%)
+   Lukasz Majewski                       23 (1.5%)
+   Neha Malcom Francis                   22 (1.4%)
+   Abdellatif El Khlifi                  21 (1.4%)
+   Fabio Estevam                         19 (1.2%)
+   Jim Liu                               18 (1.2%)
+   Tim Harvey                            17 (1.1%)
+   Peng Fan                              17 (1.1%)
+   Mathew McBride                        17 (1.1%)
+   Manorit Chawdhry                      16 (1.0%)
+   Masahisa Kojima                       16 (1.0%)
+   Andre Przywara                        15 (1.0%)
+   Ioana Ciornei                         14 (0.9%)
+   Ilias Apalodimas                      13 (0.8%)
+   Jagan Teki                            13 (0.8%)
+   Nikhil M Jain                         13 (0.8%)
+   Lukas Funke                           13 (0.8%)
+   Ashok Reddy Soma                      13 (0.8%)
+   Eugen Hristev                         12 (0.8%)
+   Shengyu Qu                            12 (0.8%)
+   Algapally Santosh Sagar               12 (0.8%)
+   Adam Ford                             11 (0.7%)
+   Ondrej Jirman                         11 (0.7%)
+   Stefan Herbrechtsmeier                11 (0.7%)
+   Yanhong Wang                          11 (0.7%)
+   Jassi Brar                            11 (0.7%)
+   Andrew Davis                          10 (0.7%)
+   Joshua Watt                           10 (0.7%)
+   Alper Nebi Yasak                      10 (0.7%)
+   Troy Kisky                            10 (0.7%)
+   Minda Chen                            9 (0.6%)
+   Chris Packham                         9 (0.6%)
+   Oleksandr Suvorov                     8 (0.5%)
+   Marcel Ziswiler                       8 (0.5%)
+   Venkatesh Yadav Abbarapu              8 (0.5%)
+   Jens Wiklander                        8 (0.5%)
+   Ye Li                                 8 (0.5%)
+   Massimo Pegorer                       7 (0.5%)
+   Patrice Chotard                       7 (0.5%)
+   Emanuele Ghidoli                      7 (0.5%)
+   Chris Morgan                          7 (0.5%)
+   Valentine Barshak                     7 (0.5%)
+   Jan Kiszka                            6 (0.4%)
+   Paul Barker                           6 (0.4%)
+   Hai Pham                              6 (0.4%)
+   Andrejs Cainikovs                     6 (0.4%)
+   Angelo Dureghello                     6 (0.4%)
+   William Zhang                         6 (0.4%)
+   Tobias Deiminger                      6 (0.4%)
+   Svyatoslav Ryhel                      6 (0.4%)
+   Rui Miguel Silva                      6 (0.4%)
+   Bhavya Kapoor                         6 (0.4%)
+   Chanho Park                           5 (0.3%)
+   Peter Robinson                        5 (0.3%)
+   Pegorer Massimo                       5 (0.3%)
+   Vignesh Raghavendra                   5 (0.3%)
+   Xingyu Wu                             5 (0.3%)
+   Hugo Villeneuve                       5 (0.3%)
+   Rasmus Villemoes                      5 (0.3%)
+   Igor Prusov                           5 (0.3%)
+   Ravi Gunasekaran                      4 (0.3%)
+   Sam Edwards                           4 (0.3%)
+   AKASHI Takahiro                       4 (0.3%)
+   Mayuresh Chitale                      4 (0.3%)
+   Alex Bee                              4 (0.3%)
+   Tianling Shen                         4 (0.3%)
+   Christian Taedcke                     4 (0.3%)
+   Kamlesh Gurudasani                    4 (0.3%)
+   Yixun Lan                             4 (0.3%)
+   Ben Dooks                             4 (0.3%)
+   Eduard Strehlau                       3 (0.2%)
+   Maxim Cournoyer                       3 (0.2%)
+   Dario Binacchi                        3 (0.2%)
+   Quentin Schulz                        3 (0.2%)
+   Sergei Antonov                        3 (0.2%)
+   Max Krummenacher                      3 (0.2%)
+   Dan Carpenter                         3 (0.2%)
+   Mason Huo                             3 (0.2%)
+   Christopher Obbard                    3 (0.2%)
+   Harini Katakam                        3 (0.2%)
+   Raymond Mao                           3 (0.2%)
+   Christophe Leroy                      3 (0.2%)
+   Ying Sun                              3 (0.2%)
+   Conor Dooley                          3 (0.2%)
+   Alexey Romanov                        3 (0.2%)
+   Ferass El Hafidi                      3 (0.2%)
+   Udit Kumar                            3 (0.2%)
+   Bhupesh Sharma                        2 (0.1%)
+   Francois Berder                       2 (0.1%)
+   Alexander Dahl                        2 (0.1%)
+   Kunihiko Hayashi                      2 (0.1%)
+   Torsten Duwe                          2 (0.1%)
+   Stefan Roese                          2 (0.1%)
+   Yifan Zhao                            2 (0.1%)
+   Bryan Brattlof                        2 (0.1%)
+   Roger Quadros                         2 (0.1%)
+   Sjoerd Simons                         2 (0.1%)
+   Ehsan Mohandesi                       2 (0.1%)
+   Philippe Reynes                       2 (0.1%)
+   Radhey Shyam Pandey                   2 (0.1%)
+   Mikhail Kalashnikov                   2 (0.1%)
+   Andreas Dannenberg                    2 (0.1%)
+   Luca Ellero                           2 (0.1%)
+   Teresa Remmet                         2 (0.1%)
+   Yannic Moog                           2 (0.1%)
+   Bruce Suen                            2 (0.1%)
+   Tony Dinh                             2 (0.1%)
+   Yu Chien Peter Lin                    2 (0.1%)
+   Thierry Reding                        2 (0.1%)
+   Florin Chiculita                      2 (0.1%)
+   Masami Hiramatsu                      2 (0.1%)
+   Leo Yan                               2 (0.1%)
+   Mickaël Tansorier                     1 (0.1%)
+   Fei Shao                              1 (0.1%)
+   Rong Tao                              1 (0.1%)
+   Ryosuke Saito                         1 (0.1%)
+   Richard Weinberger                    1 (0.1%)
+   Jaewon Jung                           1 (0.1%)
+   Joao Marcos Costa                     1 (0.1%)
+   Bo Gan                                1 (0.1%)
+   Seung-Woo Kim                         1 (0.1%)
+   Elena Popa                            1 (0.1%)
+   Ricardo Salveti                       1 (0.1%)
+   Daniel Golle                          1 (0.1%)
+   Frank Wunderlich                      1 (0.1%)
+   Sumit Garg                            1 (0.1%)
+   Thomas Mittelstaedt                   1 (0.1%)
+   Jonathan Humphreys                    1 (0.1%)
+   Siddharth Vadapalli                   1 (0.1%)
+   Puhan Zhou                            1 (0.1%)
+   Kever Yang                            1 (0.1%)
+   Valentin Caron                        1 (0.1%)
+   Dmitry Dunaev                         1 (0.1%)
+   Meng Li                               1 (0.1%)
+   Jason Wessel                          1 (0.1%)
+   FUKAUMI Naoki                         1 (0.1%)
+   Damon Ding                            1 (0.1%)
+   Anton                                 1 (0.1%)
+   Alvaro Fernando García                1 (0.1%)
+   Andy Yan                              1 (0.1%)
+   Mattijs Korpershoek                   1 (0.1%)
+   Shenlin Liang                         1 (0.1%)
+   Miquel Raynal                         1 (0.1%)
+   Jit Loon Lim                          1 (0.1%)
+   Jason Kacines                         1 (0.1%)
+   Jaehoon Chung                         1 (0.1%)
+   Sean Anderson                         1 (0.1%)
+   Maxime Ripard                         1 (0.1%)
+   Paul Kocialkowski                     1 (0.1%)
+   Jon Lin                               1 (0.1%)
+   Johan Jonker                          1 (0.1%)
+   Joseph Chen                           1 (0.1%)
+   Frank Wang                            1 (0.1%)
+   Nate Drude                            1 (0.1%)
+   Karsten Wiese                         1 (0.1%)
+   Richard Habeeb                        1 (0.1%)
+   Zixun LI                              1 (0.1%)
+   Samuel Dionne-Riel                    1 (0.1%)
+   Maksim Kiselev                        1 (0.1%)
+   Piyush Mehta                          1 (0.1%)
+   Parth Gajjar                          1 (0.1%)
+   Manikanta Guntupalli                  1 (0.1%)
+   Varalaxmi Bingi                       1 (0.1%)
+   Raju Kumar Pothuraju                  1 (0.1%)
+   Sharath Kumar Dasari                  1 (0.1%)
+   John Clark                            1 (0.1%)
+   John Keeping                          1 (0.1%)
+   Alexey Brodkin                        1 (0.1%)
+   Julien Delbergue                      1 (0.1%)
+   Emmanuel Di Fede                      1 (0.1%)
+   Matthias Schiffer                     1 (0.1%)
+   Cem Tenruh                            1 (0.1%)
+   Utkarsh Gupta                         1 (0.1%)
+   Maximus Sun                           1 (0.1%)
+   Gaurav Jain                           1 (0.1%)
+   Nitin Garg                            1 (0.1%)
+   Clement Faure                         1 (0.1%)
+   Stefan Eichenberger                   1 (0.1%)
+   Pali Rohár                            1 (0.1%)
+   Sergio Prado                          1 (0.1%)
+   Giulio Benetti                        1 (0.1%)
+   Malte Schmidt                         1 (0.1%)
+   Hoegeun Kwon                          1 (0.1%)
+   Kshitiz Varshney                      1 (0.1%)
+   Peter Korsgaard                       1 (0.1%)
+   Jonas Schwöbel                        1 (0.1%)
+   Tomasz Maciej Nowak                   1 (0.1%)
+   Masahiro Yamada                       1 (0.1%)
+   Julien Panis                          1 (0.1%)
+   Stefano Babic                         1 (0.1%)
+   Mario Kicherer                        1 (0.1%)
+   Marcus Comstedt                       1 (0.1%)
+   Geert Uytterhoeven                    1 (0.1%)
+   Cong Dang                             1 (0.1%)
+   Yegor Yefremov                        1 (0.1%)
+   Baruch Siach                          1 (0.1%)
+   Samuel Holland                        1 (0.1%)
+   Martin Hundebøll                      1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Neha Malcom Francis                   25668 (17.1%)
+   Tom Rini                              15768 (10.5%)
+   Nishanth Menon                        13251 (8.8%)
+   Simon Glass                           12357 (8.2%)
+   Abdellatif El Khlifi                  8383 (5.6%)
+   Marcel Ziswiler                       7482 (5.0%)
+   Jonas Karlman                         5997 (4.0%)
+   Weijie Gao                            5559 (3.7%)
+   Svyatoslav Ryhel                      5053 (3.4%)
+   Ioana Ciornei                         4033 (2.7%)
+   Venkatesh Yadav Abbarapu              2938 (2.0%)
+   Patrick Delaunay                      2366 (1.6%)
+   Tim Harvey                            1825 (1.2%)
+   Tianling Shen                         1806 (1.2%)
+   Yanhong Wang                          1725 (1.2%)
+   Valentine Barshak                     1545 (1.0%)
+   Masahisa Kojima                       1497 (1.0%)
+   Heinrich Schuchardt                   1462 (1.0%)
+   Jassi Brar                            1358 (0.9%)
+   Igor Prusov                           1306 (0.9%)
+   Marek Vasut                           1236 (0.8%)
+   Jason Kacines                         1190 (0.8%)
+   Eugen Hristev                         1140 (0.8%)
+   Peng Fan                              969 (0.6%)
+   Frank Wang                            958 (0.6%)
+   Masami Hiramatsu                      939 (0.6%)
+   Lukas Funke                           906 (0.6%)
+   Andy Yan                              854 (0.6%)
+   William Zhang                         813 (0.5%)
+   Adam Ford                             800 (0.5%)
+   Yixun Lan                             790 (0.5%)
+   Cem Tenruh                            744 (0.5%)
+   Ashok Reddy Soma                      680 (0.5%)
+   Mason Huo                             658 (0.4%)
+   Yifan Zhao                            645 (0.4%)
+   Conor Dooley                          536 (0.4%)
+   Manorit Chawdhry                      523 (0.3%)
+   Joshua Watt                           454 (0.3%)
+   Chris Packham                         439 (0.3%)
+   Raymond Mao                           432 (0.3%)
+   Chris Morgan                          431 (0.3%)
+   Christian Taedcke                     428 (0.3%)
+   Michal Simek                          422 (0.3%)
+   Xingyu Wu                             386 (0.3%)
+   Camelia Groza                         380 (0.3%)
+   Ondrej Jirman                         377 (0.3%)
+   Stefan Roese                          362 (0.2%)
+   Ye Li                                 360 (0.2%)
+   Ferass El Hafidi                      339 (0.2%)
+   Udit Kumar                            338 (0.2%)
+   Angelo Dureghello                     335 (0.2%)
+   Andrew Davis                          308 (0.2%)
+   Andre Przywara                        303 (0.2%)
+   Luca Ellero                           300 (0.2%)
+   Emanuele Ghidoli                      296 (0.2%)
+   Jan Kiszka                            292 (0.2%)
+   Jagan Teki                            290 (0.2%)
+   Jim Liu                               283 (0.2%)
+   Patrice Chotard                       264 (0.2%)
+   Hugo Villeneuve                       256 (0.2%)
+   Mikhail Kalashnikov                   254 (0.2%)
+   Bin Meng                              244 (0.2%)
+   Alexey Romanov                        244 (0.2%)
+   Ilias Apalodimas                      232 (0.2%)
+   Jens Wiklander                        232 (0.2%)
+   Mayuresh Chitale                      214 (0.1%)
+   Joseph Chen                           198 (0.1%)
+   Christopher Obbard                    185 (0.1%)
+   Nikhil M Jain                         175 (0.1%)
+   Lukasz Majewski                       155 (0.1%)
+   Tobias Deiminger                      145 (0.1%)
+   Florin Chiculita                      144 (0.1%)
+   Yannic Moog                           131 (0.1%)
+   Tony Dinh                             128 (0.1%)
+   Massimo Pegorer                       124 (0.1%)
+   Philippe Reynes                       124 (0.1%)
+   Mathew McBride                        123 (0.1%)
+   Algapally Santosh Sagar               121 (0.1%)
+   Stefan Herbrechtsmeier                120 (0.1%)
+   Alex Bee                              118 (0.1%)
+   Peter Robinson                        103 (0.1%)
+   Rui Miguel Silva                      98 (0.1%)
+   Cong Dang                             94 (0.1%)
+   Hai Pham                              92 (0.1%)
+   Clement Faure                         91 (0.1%)
+   Karsten Wiese                         89 (0.1%)
+   Vignesh Raghavendra                   85 (0.1%)
+   Thomas Mittelstaedt                   84 (0.1%)
+   Fabio Estevam                         82 (0.1%)
+   Shengyu Qu                            77 (0.1%)
+   Roger Quadros                         74 (0.0%)
+   Troy Kisky                            71 (0.0%)
+   Kamlesh Gurudasani                    67 (0.0%)
+   Alper Nebi Yasak                      66 (0.0%)
+   Miquel Raynal                         62 (0.0%)
+   Maxime Ripard                         61 (0.0%)
+   Christophe Leroy                      59 (0.0%)
+   Max Krummenacher                      53 (0.0%)
+   Sergei Antonov                        52 (0.0%)
+   Oleksandr Suvorov                     50 (0.0%)
+   Manikanta Guntupalli                  49 (0.0%)
+   Sam Edwards                           48 (0.0%)
+   Ryosuke Saito                         41 (0.0%)
+   Quentin Schulz                        39 (0.0%)
+   Leo Yan                               38 (0.0%)
+   Zixun LI                              37 (0.0%)
+   Bruce Suen                            36 (0.0%)
+   Torsten Duwe                          35 (0.0%)
+   Minda Chen                            34 (0.0%)
+   Ben Dooks                             33 (0.0%)
+   Yu Chien Peter Lin                    31 (0.0%)
+   Chanho Park                           29 (0.0%)
+   Pegorer Massimo                       29 (0.0%)
+   Yegor Yefremov                        29 (0.0%)
+   Andrejs Cainikovs                     28 (0.0%)
+   Ravi Gunasekaran                      28 (0.0%)
+   Paul Barker                           27 (0.0%)
+   Nitin Garg                            27 (0.0%)
+   Bo Gan                                24 (0.0%)
+   Gaurav Jain                           24 (0.0%)
+   Bhavya Kapoor                         21 (0.0%)
+   Johan Jonker                          21 (0.0%)
+   Emmanuel Di Fede                      19 (0.0%)
+   Julien Panis                          17 (0.0%)
+   Jonas Schwöbel                        16 (0.0%)
+   Masahiro Yamada                       15 (0.0%)
+   Stefano Babic                         15 (0.0%)
+   Eduard Strehlau                       14 (0.0%)
+   Radhey Shyam Pandey                   14 (0.0%)
+   Nate Drude                            14 (0.0%)
+   Kever Yang                            13 (0.0%)
+   Sean Anderson                         13 (0.0%)
+   John Keeping                          13 (0.0%)
+   Pali Rohár                            13 (0.0%)
+   AKASHI Takahiro                       12 (0.0%)
+   Harini Katakam                        12 (0.0%)
+   Valentin Caron                        12 (0.0%)
+   Sharath Kumar Dasari                  11 (0.0%)
+   Rasmus Villemoes                      9 (0.0%)
+   Bryan Brattlof                        9 (0.0%)
+   Richard Weinberger                    9 (0.0%)
+   Alexey Brodkin                        9 (0.0%)
+   Dario Binacchi                        8 (0.0%)
+   Alexander Dahl                        8 (0.0%)
+   Ricardo Salveti                       8 (0.0%)
+   Sumit Garg                            8 (0.0%)
+   Jon Lin                               8 (0.0%)
+   Andreas Dannenberg                    7 (0.0%)
+   Elena Popa                            7 (0.0%)
+   Maximus Sun                           7 (0.0%)
+   Tomasz Maciej Nowak                   7 (0.0%)
+   Maxim Cournoyer                       6 (0.0%)
+   Dan Carpenter                         6 (0.0%)
+   Kunihiko Hayashi                      6 (0.0%)
+   Francois Berder                       5 (0.0%)
+   Alvaro Fernando García                5 (0.0%)
+   Shenlin Liang                         5 (0.0%)
+   Thierry Reding                        4 (0.0%)
+   Jaewon Jung                           4 (0.0%)
+   Anton                                 4 (0.0%)
+   Mattijs Korpershoek                   4 (0.0%)
+   Parth Gajjar                          4 (0.0%)
+   Varalaxmi Bingi                       4 (0.0%)
+   John Clark                            4 (0.0%)
+   Stefan Eichenberger                   4 (0.0%)
+   Ying Sun                              3 (0.0%)
+   Ehsan Mohandesi                       3 (0.0%)
+   Jonathan Humphreys                    3 (0.0%)
+   Siddharth Vadapalli                   3 (0.0%)
+   Puhan Zhou                            3 (0.0%)
+   Jason Wessel                          3 (0.0%)
+   Jit Loon Lim                          3 (0.0%)
+   Paul Kocialkowski                     3 (0.0%)
+   Bhupesh Sharma                        2 (0.0%)
+   Sjoerd Simons                         2 (0.0%)
+   Teresa Remmet                         2 (0.0%)
+   Fei Shao                              2 (0.0%)
+   Joao Marcos Costa                     2 (0.0%)
+   Daniel Golle                          2 (0.0%)
+   Frank Wunderlich                      2 (0.0%)
+   Meng Li                               2 (0.0%)
+   Piyush Mehta                          2 (0.0%)
+   Utkarsh Gupta                         2 (0.0%)
+   Geert Uytterhoeven                    2 (0.0%)
+   Mickaël Tansorier                     1 (0.0%)
+   Rong Tao                              1 (0.0%)
+   Seung-Woo Kim                         1 (0.0%)
+   Dmitry Dunaev                         1 (0.0%)
+   FUKAUMI Naoki                         1 (0.0%)
+   Damon Ding                            1 (0.0%)
+   Jaehoon Chung                         1 (0.0%)
+   Richard Habeeb                        1 (0.0%)
+   Samuel Dionne-Riel                    1 (0.0%)
+   Maksim Kiselev                        1 (0.0%)
+   Raju Kumar Pothuraju                  1 (0.0%)
+   Julien Delbergue                      1 (0.0%)
+   Matthias Schiffer                     1 (0.0%)
+   Sergio Prado                          1 (0.0%)
+   Giulio Benetti                        1 (0.0%)
+   Malte Schmidt                         1 (0.0%)
+   Hoegeun Kwon                          1 (0.0%)
+   Kshitiz Varshney                      1 (0.0%)
+   Peter Korsgaard                       1 (0.0%)
+   Mario Kicherer                        1 (0.0%)
+   Marcus Comstedt                       1 (0.0%)
+   Baruch Siach                          1 (0.0%)
+   Samuel Holland                        1 (0.0%)
+   Martin Hundebøll                      1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              14691 (38.2%)
+   Ioana Ciornei                         1157 (3.0%)
+   Jan Kiszka                            111 (0.3%)
+   Jassi Brar                            99 (0.3%)
+   Conor Dooley                          96 (0.2%)
+   Jens Wiklander                        92 (0.2%)
+   Andrew Davis                          86 (0.2%)
+   Peter Robinson                        82 (0.2%)
+   Stefan Herbrechtsmeier                75 (0.2%)
+   Vignesh Raghavendra                   50 (0.1%)
+   Christophe Leroy                      36 (0.1%)
+   Cong Dang                             16 (0.0%)
+   Oleksandr Suvorov                     15 (0.0%)
+   Masahiro Yamada                       15 (0.0%)
+   Sean Anderson                         12 (0.0%)
+   Pali Rohár                            11 (0.0%)
+   Pegorer Massimo                       10 (0.0%)
+   Alex Bee                              8 (0.0%)
+   Alexey Brodkin                        8 (0.0%)
+   John Keeping                          7 (0.0%)
+   Dario Binacchi                        7 (0.0%)
+   Yegor Yefremov                        6 (0.0%)
+   Shenlin Liang                         5 (0.0%)
+   Bryan Brattlof                        3 (0.0%)
+   Cem Tenruh                            2 (0.0%)
+   Stefan Eichenberger                   2 (0.0%)
+   Piyush Mehta                          2 (0.0%)
+   Richard Habeeb                        1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most signoffs (total 305)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Peng Fan                              61 (20.0%)
+   Michal Simek                          48 (15.7%)
+   Neil Armstrong                        11 (3.6%)
+   Marek Vasut                           11 (3.6%)
+   Manorit Chawdhry                      9 (3.0%)
+   Ashok Reddy Soma                      9 (3.0%)
+   Heinrich Schuchardt                   8 (2.6%)
+   Andrew Davis                          7 (2.3%)
+   Sam Shih                              7 (2.3%)
+   Francesco Dolcini                     7 (2.3%)
+   Thierry Reding                        7 (2.3%)
+   Hai Pham                              7 (2.3%)
+   Nishanth Menon                        7 (2.3%)
+   Bo Gan                                6 (2.0%)
+   Bin Meng                              6 (2.0%)
+   Simon Glass                           6 (2.0%)
+   Tam Nguyen                            5 (1.6%)
+   Nicolas Frattaroli                    5 (1.6%)
+   Hal Feng                              5 (1.6%)
+   Patrick Delaunay                      5 (1.6%)
+   Marcel Ziswiler                       5 (1.6%)
+   Tom Rini                              4 (1.3%)
+   Venkatesh Yadav Abbarapu              4 (1.3%)
+   Stefan Herbrechtsmeier                3 (1.0%)
+   Tom                                   3 (1.0%)
+   Minda Chen                            3 (1.0%)
+   Andrejs Cainikovs                     3 (1.0%)
+   Fabio Estevam                         3 (1.0%)
+   Eugen Hristev                         3 (1.0%)
+   Neha Malcom Francis                   3 (1.0%)
+   Ioana Ciornei                         2 (0.7%)
+   Jassi Brar                            2 (0.7%)
+   SkyLake.Huang                         2 (0.7%)
+   Andre Przywara                        2 (0.7%)
+   Kever Yang                            2 (0.7%)
+   Kamlesh Gurudasani                    2 (0.7%)
+   Clement Faure                         2 (0.7%)
+   Jonas Karlman                         2 (0.7%)
+   Vignesh Raghavendra                   1 (0.3%)
+   Cong Dang                             1 (0.3%)
+   Oleksandr Suvorov                     1 (0.3%)
+   Bryan Brattlof                        1 (0.3%)
+   Xueliang Zhong                        1 (0.3%)
+   Tarun Sahu                            1 (0.3%)
+   Vishal Sagar                          1 (0.3%)
+   faqiang.zhu                           1 (0.3%)
+   Evgeny Bachinin                       1 (0.3%)
+   Sughosh Ganu                          1 (0.3%)
+   Meng Li                               1 (0.3%)
+   Massimo Pegorer                       1 (0.3%)
+   Nikhil M Jain                         1 (0.3%)
+   Patrice Chotard                       1 (0.3%)
+   Jagan Teki                            1 (0.3%)
+   Ye Li                                 1 (0.3%)
+   Emanuele Ghidoli                      1 (0.3%)
+   Svyatoslav Ryhel                      1 (0.3%)
+   ====================================  =====
+
+
+.. table:: Developers with the most reviews (total 961)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           220 (22.9%)
+   Kever Yang                            109 (11.3%)
+   Bin Meng                              105 (10.9%)
+   Leo Yu-Chi Liang                      52 (5.4%)
+   Peng Fan                              43 (4.5%)
+   Patrice Chotard                       39 (4.1%)
+   Tom Rini                              38 (4.0%)
+   Ilias Apalodimas                      38 (4.0%)
+   Heinrich Schuchardt                   31 (3.2%)
+   Marek Vasut                           30 (3.1%)
+   Ramon Fried                           28 (2.9%)
+   Andy Shevchenko                       22 (2.3%)
+   Jagan Teki                            19 (2.0%)
+   Stefan Roese                          16 (1.7%)
+   Rick Chen                             12 (1.2%)
+   Patrick Delaunay                      11 (1.1%)
+   Jernej Skrabec                        10 (1.0%)
+   Neil Armstrong                        9 (0.9%)
+   Fabio Estevam                         9 (0.9%)
+   Nikhil M Jain                         8 (0.8%)
+   Devarsh Thakkar                       7 (0.7%)
+   Nishanth Menon                        6 (0.6%)
+   Neha Malcom Francis                   6 (0.6%)
+   Bryan Brattlof                        6 (0.6%)
+   Quentin Schulz                        5 (0.5%)
+   Torsten Duwe                          5 (0.5%)
+   Heiko Schocher                        4 (0.4%)
+   Wei Fu                                4 (0.4%)
+   Mattijs Korpershoek                   4 (0.4%)
+   Eugen Hristev                         3 (0.3%)
+   Ye Li                                 3 (0.3%)
+   Siddharth Vadapalli                   3 (0.3%)
+   Jaehoon Chung                         3 (0.3%)
+   Padmarao Begari                       3 (0.3%)
+   Etienne Carriere                      3 (0.3%)
+   Roger Quadros                         3 (0.3%)
+   Mayuresh Chitale                      3 (0.3%)
+   Andrew Davis                          2 (0.2%)
+   Jens Wiklander                        2 (0.2%)
+   Pali Rohár                            2 (0.2%)
+   Xavier Drudis Ferran                  2 (0.2%)
+   Michael Trimarchi                     2 (0.2%)
+   Viacheslav Mitrofanov                 2 (0.2%)
+   Takeshi Kihara                        2 (0.2%)
+   Oliver Graute                         2 (0.2%)
+   Radhey Shyam Pandey                   2 (0.2%)
+   Andre Przywara                        1 (0.1%)
+   Sean Anderson                         1 (0.1%)
+   Yoann Congal                          1 (0.1%)
+   Biju Das                              1 (0.1%)
+   Gao Xiang                             1 (0.1%)
+   elaine.zhang                          1 (0.1%)
+   Stefan Agner                          1 (0.1%)
+   Mark Kettenis                         1 (0.1%)
+   Huang Jianan                          1 (0.1%)
+   Haibo Chen                            1 (0.1%)
+   Horia Geanta                          1 (0.1%)
+   Frieder Schrempf                      1 (0.1%)
+   Anup Patel                            1 (0.1%)
+   Minkyu Kang                           1 (0.1%)
+   Claudiu Manoil                        1 (0.1%)
+   Qu Wenruo                             1 (0.1%)
+   Andrew Lunn                           1 (0.1%)
+   Paul Barker                           1 (0.1%)
+   Gaurav Jain                           1 (0.1%)
+   Maxime Ripard                         1 (0.1%)
+   Miquel Raynal                         1 (0.1%)
+   Adam Ford                             1 (0.1%)
+   Weijie Gao                            1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most test credits (total 87)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           13 (14.9%)
+   Milan P. Stanić                       8 (9.2%)
+   Sughosh Ganu                          7 (8.0%)
+   Andreas Westman Dorcsak               7 (8.0%)
+   Svyatoslav Ryhel                      6 (6.9%)
+   Bin Meng                              4 (4.6%)
+   Tom Rini                              4 (4.6%)
+   Roland Ruckerbauer                    4 (4.6%)
+   Nikhil M Jain                         3 (3.4%)
+   Maxime Ripard                         3 (3.4%)
+   Miquel Raynal                         3 (3.4%)
+   Heinrich Schuchardt                   2 (2.3%)
+   Mattijs Korpershoek                   2 (2.3%)
+   Padmarao Begari                       2 (2.3%)
+   Oliver Graute                         2 (2.3%)
+   Michal Simek                          2 (2.3%)
+   Gowtham Suresh Kumar                  2 (2.3%)
+   Mihai Sain                            2 (2.3%)
+   Ravi Gunasekaran                      2 (2.3%)
+   Sam Edwards                           2 (2.3%)
+   Xavier Drudis Ferran                  1 (1.1%)
+   Stefan Agner                          1 (1.1%)
+   Marcel Ziswiler                       1 (1.1%)
+   FUKAUMI Naoki                         1 (1.1%)
+   Ion Agorria                           1 (1.1%)
+   Masahisa Kojima                       1 (1.1%)
+   Tim Harvey                            1 (1.1%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 87)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Svyatoslav Ryhel                      12 (13.8%)
+   Bin Meng                              8 (9.2%)
+   Marek Vasut                           7 (8.0%)
+   Jassi Brar                            7 (8.0%)
+   Simon Glass                           6 (6.9%)
+   Chanho Park                           6 (6.9%)
+   Sjoerd Simons                         6 (6.9%)
+   Shengyu Qu                            4 (4.6%)
+   Peng Fan                              2 (2.3%)
+   Stefan Roese                          2 (2.3%)
+   Jonas Karlman                         2 (2.3%)
+   Conor Dooley                          2 (2.3%)
+   John Keeping                          2 (2.3%)
+   Jonas Schwöbel                        2 (2.3%)
+   Alper Nebi Yasak                      2 (2.3%)
+   Abdellatif El Khlifi                  2 (2.3%)
+   Tom Rini                              1 (1.1%)
+   Heinrich Schuchardt                   1 (1.1%)
+   Tim Harvey                            1 (1.1%)
+   Nishanth Menon                        1 (1.1%)
+   Quentin Schulz                        1 (1.1%)
+   Eugen Hristev                         1 (1.1%)
+   Andre Przywara                        1 (1.1%)
+   Adam Ford                             1 (1.1%)
+   Manorit Chawdhry                      1 (1.1%)
+   AKASHI Takahiro                       1 (1.1%)
+   Rasmus Villemoes                      1 (1.1%)
+   Alvaro Fernando García                1 (1.1%)
+   Ryosuke Saito                         1 (1.1%)
+   Yifan Zhao                            1 (1.1%)
+   Udit Kumar                            1 (1.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most report credits (total 25)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Heinrich Schuchardt                   3 (12.0%)
+   Milan P. Stanić                       2 (8.0%)
+   Michal Simek                          2 (8.0%)
+   Da Xue                                2 (8.0%)
+   John Toomey                           2 (8.0%)
+   Simon Glass                           1 (4.0%)
+   Tom Rini                              1 (4.0%)
+   Xavier Drudis Ferran                  1 (4.0%)
+   Peter Robinson                        1 (4.0%)
+   Alexey Brodkin                        1 (4.0%)
+   Dan Carpenter                         1 (4.0%)
+   Aniket Limaye                         1 (4.0%)
+   Lorenzo Bianconi                      1 (4.0%)
+   Thomas Nizan                          1 (4.0%)
+   Vincent Stehlé                        1 (4.0%)
+   Suniel Mahesh                         1 (4.0%)
+   Mickael GARDET                        1 (4.0%)
+   Harry Lockyer                         1 (4.0%)
+   Eduard Strehlau                       1 (4.0%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 25)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Heinrich Schuchardt                   4 (16.0%)
+   Nishanth Menon                        4 (16.0%)
+   Simon Glass                           3 (12.0%)
+   Marek Vasut                           2 (8.0%)
+   AKASHI Takahiro                       2 (8.0%)
+   Radhey Shyam Pandey                   2 (8.0%)
+   Tom Rini                              1 (4.0%)
+   Jonas Karlman                         1 (4.0%)
+   Manorit Chawdhry                      1 (4.0%)
+   Patrick Delaunay                      1 (4.0%)
+   Fabio Estevam                         1 (4.0%)
+   Siddharth Vadapalli                   1 (4.0%)
+   Venkatesh Yadav Abbarapu              1 (4.0%)
+   Daniel Golle                          1 (4.0%)
+   ====================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             524 (34.2%)
+   Google, Inc.                          273 (17.8%)
+   Texas Instruments                     125 (8.2%)
+   NXP                                   78 (5.1%)
+   AMD                                   74 (4.8%)
+   Linaro                                71 (4.6%)
+   DENX Software Engineering             70 (4.6%)
+   Konsulko Group                        57 (3.7%)
+   Renesas Electronics                   50 (3.3%)
+   ARM                                   36 (2.4%)
+   ST Microelectronics                   33 (2.2%)
+   Weidmüller Interface GmbH & Co. KG    29 (1.9%)
+   Toradex                               24 (1.6%)
+   Collabora Ltd.                        17 (1.1%)
+   Amarula Solutions                     10 (0.7%)
+   Samsung                               8 (0.5%)
+   Broadcom                              6 (0.4%)
+   Edgeble AI Technologies Pvt. Ltd.     6 (0.4%)
+   linutronix                            6 (0.4%)
+   Siemens                               6 (0.4%)
+   Phytec                                5 (0.3%)
+   Rockchip                              5 (0.3%)
+   Gentoo                                4 (0.3%)
+   BayLibre SAS                          2 (0.1%)
+   Bootlin                               2 (0.1%)
+   Wind River                            2 (0.1%)
+   NVidia                                2 (0.1%)
+   Socionext Inc.                        2 (0.1%)
+   Bosch                                 1 (0.1%)
+   Intel                                 1 (0.1%)
+   Xilinx                                1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Texas Instruments                     41676 (27.8%)
+   (Unknown)                             36288 (24.2%)
+   Konsulko Group                        15768 (10.5%)
+   Google, Inc.                          12357 (8.2%)
+   ARM                                   8686 (5.8%)
+   Toradex                               7854 (5.2%)
+   NXP                                   6045 (4.0%)
+   Linaro                                4894 (3.3%)
+   AMD                                   4247 (2.8%)
+   ST Microelectronics                   2642 (1.8%)
+   Weidmüller Interface GmbH & Co. KG    1455 (1.0%)
+   Collabora Ltd.                        1327 (0.9%)
+   Rockchip                              1178 (0.8%)
+   DENX Software Engineering             1147 (0.8%)
+   Renesas Electronics                   916 (0.6%)
+   Phytec                                877 (0.6%)
+   Broadcom                              813 (0.5%)
+   Gentoo                                790 (0.5%)
+   Siemens                               292 (0.2%)
+   Edgeble AI Technologies Pvt. Ltd.     179 (0.1%)
+   linutronix                            145 (0.1%)
+   Amarula Solutions                     119 (0.1%)
+   Bosch                                 84 (0.1%)
+   Bootlin                               65 (0.0%)
+   Samsung                               32 (0.0%)
+   BayLibre SAS                          21 (0.0%)
+   Xilinx                                11 (0.0%)
+   Socionext Inc.                        6 (0.0%)
+   Wind River                            5 (0.0%)
+   NVidia                                4 (0.0%)
+   Intel                                 3 (0.0%)
+   ====================================  =====
+
+
+.. table:: Employers with the most signoffs (total 305)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   NXP                                   67 (22.0%)
+   AMD                                   62 (20.3%)
+   (Unknown)                             40 (13.1%)
+   Texas Instruments                     32 (10.5%)
+   Renesas Electronics                   24 (7.9%)
+   Toradex                               16 (5.2%)
+   Linaro                                14 (4.6%)
+   NVidia                                10 (3.3%)
+   Canonical                             8 (2.6%)
+   Google, Inc.                          6 (2.0%)
+   ST Microelectronics                   6 (2.0%)
+   Konsulko Group                        4 (1.3%)
+   ARM                                   3 (1.0%)
+   Weidmüller Interface GmbH & Co. KG    3 (1.0%)
+   Collabora Ltd.                        3 (1.0%)
+   DENX Software Engineering             3 (1.0%)
+   Rockchip                              2 (0.7%)
+   Amarula Solutions                     1 (0.3%)
+   Wind River                            1 (0.3%)
+   ====================================  =====
+
+
+.. table:: Employers with the most hackers (total 212)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             102 (48.1%)
+   Texas Instruments                     15 (7.1%)
+   Linaro                                13 (6.1%)
+   NXP                                   12 (5.7%)
+   AMD                                   11 (5.2%)
+   Toradex                               6 (2.8%)
+   DENX Software Engineering             5 (2.4%)
+   Rockchip                              5 (2.4%)
+   Renesas Electronics                   4 (1.9%)
+   Weidmüller Interface GmbH & Co. KG    4 (1.9%)
+   Samsung                               4 (1.9%)
+   ST Microelectronics                   3 (1.4%)
+   Collabora Ltd.                        3 (1.4%)
+   Phytec                                3 (1.4%)
+   ARM                                   2 (0.9%)
+   Amarula Solutions                     2 (0.9%)
+   Wind River                            2 (0.9%)
+   Bootlin                               2 (0.9%)
+   BayLibre SAS                          2 (0.9%)
+   NVidia                                1 (0.5%)
+   Google, Inc.                          1 (0.5%)
+   Konsulko Group                        1 (0.5%)
+   Broadcom                              1 (0.5%)
+   Gentoo                                1 (0.5%)
+   Siemens                               1 (0.5%)
+   Edgeble AI Technologies Pvt. Ltd.     1 (0.5%)
+   linutronix                            1 (0.5%)
+   Bosch                                 1 (0.5%)
+   Xilinx                                1 (0.5%)
+   Socionext Inc.                        1 (0.5%)
+   Intel                                 1 (0.5%)
+   ====================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2024.01.rst b/doc/develop/statistics/u-boot-stats-v2024.01.rst
new file mode 100644
index 00000000000..4beb21f6683
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2024.01.rst
@@ -0,0 +1,844 @@
+:orphan:
+
+Release Statistics for U-Boot v2024.01
+======================================
+
+* Processed 1564 changesets from 191 developers
+
+* 25 employers found
+
+* A total of 100266 lines added, 38766 removed (delta 61500)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           273 (17.5%)
+   Marek Vasut                           194 (12.4%)
+   Michal Simek                          64 (4.1%)
+   Heinrich Schuchardt                   51 (3.3%)
+   Tom Rini                              50 (3.2%)
+   Jonas Karlman                         46 (2.9%)
+   Sean Anderson                         38 (2.4%)
+   Svyatoslav Ryhel                      36 (2.3%)
+   Nishanth Menon                        35 (2.2%)
+   Andre Przywara                        33 (2.1%)
+   Paul Barker                           32 (2.0%)
+   Venkatesh Yadav Abbarapu              28 (1.8%)
+   Bryan Brattlof                        26 (1.7%)
+   Sughosh Ganu                          21 (1.3%)
+   AKASHI Takahiro                       20 (1.3%)
+   Bin Meng                              19 (1.2%)
+   Alexey Romanov                        19 (1.2%)
+   Chanho Park                           18 (1.2%)
+   Dario Binacchi                        16 (1.0%)
+   Sam Protsenko                         15 (1.0%)
+   Dan Carpenter                         15 (1.0%)
+   Tim Harvey                            14 (0.9%)
+   Fabio Estevam                         14 (0.9%)
+   Roger Quadros                         13 (0.8%)
+   Rasmus Villemoes                      13 (0.8%)
+   Randolph                              11 (0.7%)
+   Tony Dinh                             11 (0.7%)
+   Alexander Dahl                        11 (0.7%)
+   Igor Prusov                           9 (0.6%)
+   Ilias Apalodimas                      9 (0.6%)
+   Hector Martin                         9 (0.6%)
+   Samuel Holland                        9 (0.6%)
+   Johan Jonker                          9 (0.6%)
+   Matthias Schiffer                     9 (0.6%)
+   Neha Malcom Francis                   8 (0.5%)
+   Chris Packham                         8 (0.5%)
+   Joao Marcos Costa                     8 (0.5%)
+   Jan Kiszka                            7 (0.4%)
+   Jim Liu                               7 (0.4%)
+   Yang Xiwen                            7 (0.4%)
+   Marcel Ziswiler                       7 (0.4%)
+   Siddharth Vadapalli                   7 (0.4%)
+   Gatien Chevallier                     7 (0.4%)
+   Neil Armstrong                        6 (0.4%)
+   Masahisa Kojima                       6 (0.4%)
+   Udit Kumar                            6 (0.4%)
+   Eddie James                           6 (0.4%)
+   Sam Edwards                           6 (0.4%)
+   Teresa Remmet                         6 (0.4%)
+   Manorit Chawdhry                      6 (0.4%)
+   Laurentiu Tudor                       6 (0.4%)
+   Joshua Watt                           6 (0.4%)
+   Mattijs Korpershoek                   5 (0.3%)
+   Shantur Rathore                       5 (0.3%)
+   Patrick Delaunay                      5 (0.3%)
+   Artur Rojek                           5 (0.3%)
+   Mikhail Kshevetskiy                   5 (0.3%)
+   FUKAUMI Naoki                         5 (0.3%)
+   Ashok Reddy Soma                      5 (0.3%)
+   Mark Kettenis                         4 (0.3%)
+   John Clark                            4 (0.3%)
+   Philip Oberfichtner                   4 (0.3%)
+   Milan P. Stanić                       4 (0.3%)
+   Tom Fitzhenry                         4 (0.3%)
+   Josua Mayer                           4 (0.3%)
+   Elaine Zhang                          4 (0.3%)
+   Sébastien Szymanski                   4 (0.3%)
+   Andrew Davis                          4 (0.3%)
+   Manoj Sai                             4 (0.3%)
+   Alper Nebi Yasak                      4 (0.3%)
+   Emanuele Ghidoli                      3 (0.2%)
+   Alexander Gendin                      3 (0.2%)
+   Hiago De Franco                       3 (0.2%)
+   Andrejs Cainikovs                     3 (0.2%)
+   Yu Chien Peter Lin                    3 (0.2%)
+   Quentin Schulz                        3 (0.2%)
+   Tim Lunn                              3 (0.2%)
+   Patrice Chotard                       3 (0.2%)
+   Algapally Santosh Sagar               3 (0.2%)
+   Abdellatif El Khlifi                  3 (0.2%)
+   Fedor Ross                            3 (0.2%)
+   Reid Tonking                          3 (0.2%)
+   Massimo Pegorer                       3 (0.2%)
+   Frank Wunderlich                      3 (0.2%)
+   Fabrice Gasnier                       3 (0.2%)
+   Thomas Mittelstaedt                   3 (0.2%)
+   Baruch Siach                          2 (0.1%)
+   Peter Robinson                        2 (0.1%)
+   Hugo Villeneuve                       2 (0.1%)
+   Janne Grunau                          2 (0.1%)
+   Simon Holesch                         2 (0.1%)
+   Dylan Corrales                        2 (0.1%)
+   Oleksandr Suvorov                     2 (0.1%)
+   Tejas Bhumkar                         2 (0.1%)
+   Amit Kumar Mahapatra                  2 (0.1%)
+   Robert Marko                          2 (0.1%)
+   Sean Edmond                           2 (0.1%)
+   Maksim Kiselev                        2 (0.1%)
+   Wei Chen                              2 (0.1%)
+   Francois Berder                       2 (0.1%)
+   Lukas Funke                           2 (0.1%)
+   Lars Feyaerts                         2 (0.1%)
+   Love Kumar                            2 (0.1%)
+   Suman Anna                            2 (0.1%)
+   Laurent Pinchart                      2 (0.1%)
+   Harald Seiler                         2 (0.1%)
+   Neal Frager                           2 (0.1%)
+   Shiji Yang                            2 (0.1%)
+   Anthony Loiseau                       1 (0.1%)
+   Moritz Fischer                        1 (0.1%)
+   Miquel Raynal                         1 (0.1%)
+   Mikhail Kalashnikov                   1 (0.1%)
+   Stephen Graf                          1 (0.1%)
+   Chukun Pan                            1 (0.1%)
+   Weizhao Ouyang                        1 (0.1%)
+   Stefan Roese                          1 (0.1%)
+   Cong Dang                             1 (0.1%)
+   Jonathan Corbet                       1 (0.1%)
+   Nikita Yushchenko                     1 (0.1%)
+   John Keeping                          1 (0.1%)
+   Ludwig Kormann                        1 (0.1%)
+   Igor Opaniuk                          1 (0.1%)
+   Bhupesh Sharma                        1 (0.1%)
+   Ibai Erkiaga                          1 (0.1%)
+   Piyush Mehta                          1 (0.1%)
+   Linus Walleij                         1 (0.1%)
+   Dmitry Rokosov                        1 (0.1%)
+   Frank de Brabander                    1 (0.1%)
+   Dylan Hung                            1 (0.1%)
+   Ley Foon Tan                          1 (0.1%)
+   Caleb Connolly                        1 (0.1%)
+   Maxim Cournoyer                       1 (0.1%)
+   Yong-Xuan Wang                        1 (0.1%)
+   Eugen Hristev                         1 (0.1%)
+   Nathan Barrett-Morrison               1 (0.1%)
+   Emekcan Aras                          1 (0.1%)
+   Vishal Mahaveer                       1 (0.1%)
+   Wojciech Nizinski                     1 (0.1%)
+   Michel Alex                           1 (0.1%)
+   Martin Fäcknitz                       1 (0.1%)
+   Marek Behún                           1 (0.1%)
+   Andrey Skvortsov                      1 (0.1%)
+   Yurii Monakov                         1 (0.1%)
+   Ricardo Pardini                       1 (0.1%)
+   Matwey V. Kornilov                    1 (0.1%)
+   Guochun Huang                         1 (0.1%)
+   Okhunjon Sobirjonov                   1 (0.1%)
+   Mayuresh Chitale                      1 (0.1%)
+   Guillaume La Roque                    1 (0.1%)
+   Ye Li                                 1 (0.1%)
+   Alice Guo                             1 (0.1%)
+   Joao Paulo Goncalves                  1 (0.1%)
+   Eduard Strehlau                       1 (0.1%)
+   Andrej Rosano                         1 (0.1%)
+   Ricardo Salveti                       1 (0.1%)
+   Michael Scott                         1 (0.1%)
+   Dominik Haller                        1 (0.1%)
+   Nikhil M Jain                         1 (0.1%)
+   Roman Azarenko                        1 (0.1%)
+   Nicolò Veronese                       1 (0.1%)
+   Andrii Chepurnyi                      1 (0.1%)
+   Han Xu                                1 (0.1%)
+   Patryk Biel                           1 (0.1%)
+   Polak, Leszek                         1 (0.1%)
+   Tanmay Shah                           1 (0.1%)
+   shengfei Xu                           1 (0.1%)
+   Joseph Chen                           1 (0.1%)
+   Anatolij Gustschin                    1 (0.1%)
+   Kuan Lim Lee                          1 (0.1%)
+   Roger Knecht                          1 (0.1%)
+   Jesse Taube                           1 (0.1%)
+   Rong Tao                              1 (0.1%)
+   Andy Shevchenko                       1 (0.1%)
+   Troy Kisky                            1 (0.1%)
+   Thippeswamy Havalige                  1 (0.1%)
+   Srinivas Neeli                        1 (0.1%)
+   Saeed Nowshadi                        1 (0.1%)
+   Maxim Kochetkov                       1 (0.1%)
+   Christian Taedcke                     1 (0.1%)
+   Trevor Woerner                        1 (0.1%)
+   Nicolas Frattaroli                    1 (0.1%)
+   Li Hua Qian                           1 (0.1%)
+   Robert Nelson                         1 (0.1%)
+   Łukasz Stelmach                       1 (0.1%)
+   Elena Popa                            1 (0.1%)
+   Naveen Kumar Chaudhary                1 (0.1%)
+   Kevin Chen                            1 (0.1%)
+   Sergei Antonov                        1 (0.1%)
+   Jason Kacines                         1 (0.1%)
+   Ilya Lukin                            1 (0.1%)
+   Mihai Sain                            1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           11496 (9.8%)
+   Marek Vasut                           8067 (6.8%)
+   Michal Simek                          7518 (6.4%)
+   Laurentiu Tudor                       6213 (5.3%)
+   Paul Barker                           5361 (4.5%)
+   Andre Przywara                        4529 (3.8%)
+   Tim Harvey                            4234 (3.6%)
+   Nishanth Menon                        3762 (3.2%)
+   Jonas Karlman                         3755 (3.2%)
+   Dario Binacchi                        3615 (3.1%)
+   AKASHI Takahiro                       3492 (3.0%)
+   Robert Nelson                         3243 (2.8%)
+   FUKAUMI Naoki                         2908 (2.5%)
+   Roger Quadros                         2836 (2.4%)
+   Neha Malcom Francis                   2822 (2.4%)
+   Svyatoslav Ryhel                      2768 (2.3%)
+   Manorit Chawdhry                      2699 (2.3%)
+   Tom Rini                              2320 (2.0%)
+   Sean Anderson                         2224 (1.9%)
+   Johan Jonker                          1984 (1.7%)
+   Heinrich Schuchardt                   1886 (1.6%)
+   Sughosh Ganu                          1824 (1.5%)
+   Igor Prusov                           1710 (1.5%)
+   Eddie James                           1481 (1.3%)
+   Bryan Brattlof                        1357 (1.2%)
+   Tom Fitzhenry                         1323 (1.1%)
+   Reid Tonking                          1209 (1.0%)
+   John Clark                            1202 (1.0%)
+   Tony Dinh                             1163 (1.0%)
+   Alexey Romanov                        1159 (1.0%)
+   Sébastien Szymanski                   1129 (1.0%)
+   Frank Wunderlich                      1035 (0.9%)
+   Mikhail Kshevetskiy                   926 (0.8%)
+   Chanho Park                           880 (0.7%)
+   Teresa Remmet                         781 (0.7%)
+   Mihai Sain                            781 (0.7%)
+   Yang Xiwen                            652 (0.6%)
+   Patrice Chotard                       605 (0.5%)
+   Artur Rojek                           595 (0.5%)
+   Alexander Gendin                      516 (0.4%)
+   Yu Chien Peter Lin                    421 (0.4%)
+   Randolph                              379 (0.3%)
+   Andrew Davis                          354 (0.3%)
+   Joshua Watt                           343 (0.3%)
+   Joao Marcos Costa                     334 (0.3%)
+   Alexander Dahl                        305 (0.3%)
+   Mikhail Kalashnikov                   294 (0.2%)
+   Sam Edwards                           288 (0.2%)
+   Neil Armstrong                        282 (0.2%)
+   Venkatesh Yadav Abbarapu              277 (0.2%)
+   Samuel Holland                        266 (0.2%)
+   Philip Oberfichtner                   266 (0.2%)
+   Gatien Chevallier                     264 (0.2%)
+   Janne Grunau                          231 (0.2%)
+   Matthias Schiffer                     230 (0.2%)
+   Bin Meng                              201 (0.2%)
+   Andrii Chepurnyi                      181 (0.2%)
+   Marek Behún                           180 (0.2%)
+   Jan Kiszka                            179 (0.2%)
+   Algapally Santosh Sagar               174 (0.1%)
+   Linus Walleij                         170 (0.1%)
+   Udit Kumar                            165 (0.1%)
+   Patrick Delaunay                      142 (0.1%)
+   Rasmus Villemoes                      128 (0.1%)
+   Fabio Estevam                         126 (0.1%)
+   Shiji Yang                            123 (0.1%)
+   Elaine Zhang                          111 (0.1%)
+   Oleksandr Suvorov                     108 (0.1%)
+   Siddharth Vadapalli                   107 (0.1%)
+   Fabrice Gasnier                       103 (0.1%)
+   Sergei Antonov                        103 (0.1%)
+   Kuan Lim Lee                          102 (0.1%)
+   Alper Nebi Yasak                      99 (0.1%)
+   Marcel Ziswiler                       97 (0.1%)
+   Christian Taedcke                     95 (0.1%)
+   Tim Lunn                              93 (0.1%)
+   Hector Martin                         90 (0.1%)
+   Emanuele Ghidoli                      89 (0.1%)
+   Nicolas Frattaroli                    89 (0.1%)
+   Mark Kettenis                         88 (0.1%)
+   Fedor Ross                            86 (0.1%)
+   Chris Packham                         84 (0.1%)
+   Love Kumar                            84 (0.1%)
+   Robert Marko                          80 (0.1%)
+   Sam Protsenko                         78 (0.1%)
+   Vishal Mahaveer                       75 (0.1%)
+   Ilias Apalodimas                      70 (0.1%)
+   Ashok Reddy Soma                      64 (0.1%)
+   Andrejs Cainikovs                     59 (0.1%)
+   Peter Robinson                        58 (0.0%)
+   Jesse Taube                           57 (0.0%)
+   Quentin Schulz                        55 (0.0%)
+   Tejas Bhumkar                         54 (0.0%)
+   Suman Anna                            51 (0.0%)
+   Ibai Erkiaga                          49 (0.0%)
+   Masahisa Kojima                       45 (0.0%)
+   Sean Edmond                           45 (0.0%)
+   Maxim Cournoyer                       45 (0.0%)
+   Laurent Pinchart                      44 (0.0%)
+   Jim Liu                               43 (0.0%)
+   Lars Feyaerts                         42 (0.0%)
+   Massimo Pegorer                       41 (0.0%)
+   Manoj Sai                             40 (0.0%)
+   Joseph Chen                           40 (0.0%)
+   Simon Holesch                         39 (0.0%)
+   Josua Mayer                           35 (0.0%)
+   Hiago De Franco                       35 (0.0%)
+   Tanmay Shah                           33 (0.0%)
+   Frank de Brabander                    32 (0.0%)
+   Shantur Rathore                       31 (0.0%)
+   Igor Opaniuk                          30 (0.0%)
+   Dan Carpenter                         28 (0.0%)
+   Ludwig Kormann                        27 (0.0%)
+   Maxim Kochetkov                       26 (0.0%)
+   Neal Frager                           23 (0.0%)
+   Mattijs Korpershoek                   22 (0.0%)
+   Baruch Siach                          22 (0.0%)
+   Ley Foon Tan                          20 (0.0%)
+   Andy Shevchenko                       20 (0.0%)
+   shengfei Xu                           19 (0.0%)
+   Eduard Strehlau                       16 (0.0%)
+   Yurii Monakov                         14 (0.0%)
+   Ye Li                                 13 (0.0%)
+   Dylan Hung                            12 (0.0%)
+   Michel Alex                           12 (0.0%)
+   Matwey V. Kornilov                    12 (0.0%)
+   Milan P. Stanić                       11 (0.0%)
+   Li Hua Qian                           11 (0.0%)
+   Wei Chen                              10 (0.0%)
+   Mayuresh Chitale                      10 (0.0%)
+   Polak, Leszek                         9 (0.0%)
+   Dylan Corrales                        8 (0.0%)
+   Andrey Skvortsov                      8 (0.0%)
+   Troy Kisky                            8 (0.0%)
+   Naveen Kumar Chaudhary                8 (0.0%)
+   Okhunjon Sobirjonov                   7 (0.0%)
+   Roman Azarenko                        7 (0.0%)
+   Han Xu                                7 (0.0%)
+   Anatolij Gustschin                    7 (0.0%)
+   Thomas Mittelstaedt                   6 (0.0%)
+   Amit Kumar Mahapatra                  6 (0.0%)
+   Eugen Hristev                         6 (0.0%)
+   Abdellatif El Khlifi                  5 (0.0%)
+   Harald Seiler                         5 (0.0%)
+   Anthony Loiseau                       5 (0.0%)
+   Chukun Pan                            5 (0.0%)
+   Weizhao Ouyang                        5 (0.0%)
+   Roger Knecht                          5 (0.0%)
+   Trevor Woerner                        5 (0.0%)
+   Ilya Lukin                            5 (0.0%)
+   Hugo Villeneuve                       4 (0.0%)
+   Lukas Funke                           4 (0.0%)
+   Jonathan Corbet                       4 (0.0%)
+   Ricardo Salveti                       4 (0.0%)
+   Nicolò Veronese                       4 (0.0%)
+   Saeed Nowshadi                        4 (0.0%)
+   Maksim Kiselev                        3 (0.0%)
+   Caleb Connolly                        3 (0.0%)
+   Guillaume La Roque                    3 (0.0%)
+   Jason Kacines                         3 (0.0%)
+   Francois Berder                       2 (0.0%)
+   Stephen Graf                          2 (0.0%)
+   Nikita Yushchenko                     2 (0.0%)
+   Bhupesh Sharma                        2 (0.0%)
+   Piyush Mehta                          2 (0.0%)
+   Wojciech Nizinski                     2 (0.0%)
+   Alice Guo                             2 (0.0%)
+   Joao Paulo Goncalves                  2 (0.0%)
+   Andrej Rosano                         2 (0.0%)
+   Srinivas Neeli                        2 (0.0%)
+   Łukasz Stelmach                       2 (0.0%)
+   Moritz Fischer                        1 (0.0%)
+   Miquel Raynal                         1 (0.0%)
+   Stefan Roese                          1 (0.0%)
+   Cong Dang                             1 (0.0%)
+   John Keeping                          1 (0.0%)
+   Dmitry Rokosov                        1 (0.0%)
+   Yong-Xuan Wang                        1 (0.0%)
+   Nathan Barrett-Morrison               1 (0.0%)
+   Emekcan Aras                          1 (0.0%)
+   Martin Fäcknitz                       1 (0.0%)
+   Ricardo Pardini                       1 (0.0%)
+   Guochun Huang                         1 (0.0%)
+   Michael Scott                         1 (0.0%)
+   Dominik Haller                        1 (0.0%)
+   Nikhil M Jain                         1 (0.0%)
+   Patryk Biel                           1 (0.0%)
+   Rong Tao                              1 (0.0%)
+   Thippeswamy Havalige                  1 (0.0%)
+   Elena Popa                            1 (0.0%)
+   Kevin Chen                            1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Laurentiu Tudor                       5975 (15.4%)
+   Dario Binacchi                        3012 (7.8%)
+   Tom Rini                              1059 (2.7%)
+   Andrew Davis                          346 (0.9%)
+   Tim Harvey                            83 (0.2%)
+   Chris Packham                         58 (0.1%)
+   Peter Robinson                        58 (0.1%)
+   Ilias Apalodimas                      21 (0.1%)
+   Jesse Taube                           21 (0.1%)
+   Ibai Erkiaga                          16 (0.0%)
+   Eduard Strehlau                       16 (0.0%)
+   Bin Meng                              12 (0.0%)
+   Matwey V. Kornilov                    10 (0.0%)
+   Andy Shevchenko                       9 (0.0%)
+   Ilya Lukin                            5 (0.0%)
+   Trevor Woerner                        4 (0.0%)
+   Maxim Kochetkov                       2 (0.0%)
+   Piyush Mehta                          2 (0.0%)
+   Joao Paulo Goncalves                  2 (0.0%)
+   Abdellatif El Khlifi                  1 (0.0%)
+   Stephen Graf                          1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most signoffs (total 215)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Michal Simek                          55 (25.6%)
+   Neil Armstrong                        29 (13.5%)
+   Minkyu Kang                           13 (6.0%)
+   Heinrich Schuchardt                   9 (4.2%)
+   Peng Fan                              7 (3.3%)
+   Ilias Apalodimas                      6 (2.8%)
+   Dario Binacchi                        5 (2.3%)
+   Bin Meng                              5 (2.3%)
+   Frieder Schrempf                      5 (2.3%)
+   Marc Kleine-Budde                     5 (2.3%)
+   Alexandre Torgue                      5 (2.3%)
+   Mattijs Korpershoek                   4 (1.9%)
+   Ashok Reddy Soma                      4 (1.9%)
+   Patrice Chotard                       4 (1.9%)
+   Marek Vasut                           4 (1.9%)
+   Simon Glass                           4 (1.9%)
+   Tom Rini                              3 (1.4%)
+   Oleksandr Suvorov                     3 (1.4%)
+   Venkatesh Yadav Abbarapu              3 (1.4%)
+   Jonas Karlman                         3 (1.4%)
+   Andre Przywara                        3 (1.4%)
+   Miquel Raynal                         2 (0.9%)
+   Francesco Dolcini                     2 (0.9%)
+   Rui Miguel Silva                      2 (0.9%)
+   Qi Feng                               2 (0.9%)
+   Suniel Mahesh                         2 (0.9%)
+   Siddharth Vadapalli                   2 (0.9%)
+   Neha Malcom Francis                   2 (0.9%)
+   Alexey Romanov                        2 (0.9%)
+   Sébastien Szymanski                   2 (0.9%)
+   Roger Quadros                         2 (0.9%)
+   Nishanth Menon                        2 (0.9%)
+   Andy Shevchenko                       1 (0.5%)
+   Abdellatif El Khlifi                  1 (0.5%)
+   Jon Mason                             1 (0.5%)
+   Martin Kurbanov                       1 (0.5%)
+   Jakub Klama                           1 (0.5%)
+   Marcin Jabrzyk                        1 (0.5%)
+   Valerio 'ftp21' Mancini               1 (0.5%)
+   Lee Jones                             1 (0.5%)
+   Geert Uytterhoeven                    1 (0.5%)
+   Hiago De Franco                       1 (0.5%)
+   Patrick Delaunay                      1 (0.5%)
+   Elaine Zhang                          1 (0.5%)
+   Fabio Estevam                         1 (0.5%)
+   Manorit Chawdhry                      1 (0.5%)
+   ====================================  =====
+
+
+.. table:: Developers with the most reviews (total 990)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           251 (25.4%)
+   Kever Yang                            67 (6.8%)
+   Tom Rini                              66 (6.7%)
+   Nishanth Menon                        55 (5.6%)
+   Marek Vasut                           50 (5.1%)
+   Mattijs Korpershoek                   47 (4.7%)
+   Bin Meng                              38 (3.8%)
+   Patrice Chotard                       33 (3.3%)
+   Fabio Estevam                         33 (3.3%)
+   Leo Yu-Chi Liang                      33 (3.3%)
+   Heinrich Schuchardt                   24 (2.4%)
+   Stefan Roese                          23 (2.3%)
+   Patrick Delaunay                      20 (2.0%)
+   Biju Das                              17 (1.7%)
+   Neil Armstrong                        16 (1.6%)
+   Lad Prabhakar                         16 (1.6%)
+   Sean Anderson                         16 (1.6%)
+   Ilias Apalodimas                      15 (1.5%)
+   Etienne Carriere                      14 (1.4%)
+   Jaehoon Chung                         12 (1.2%)
+   Andre Przywara                        11 (1.1%)
+   Neha Malcom Francis                   9 (0.9%)
+   Ramon Fried                           9 (0.9%)
+   Bhupesh Sharma                        7 (0.7%)
+   Jernej Skrabec                        6 (0.6%)
+   Yannic Moog                           6 (0.6%)
+   Samuel Holland                        6 (0.6%)
+   Heiko Schocher                        5 (0.5%)
+   Sam Edwards                           5 (0.5%)
+   Manorit Chawdhry                      4 (0.4%)
+   Mark Kettenis                         4 (0.4%)
+   Peng Fan                              3 (0.3%)
+   Roger Quadros                         3 (0.3%)
+   Yoshihiro Shimoda                     3 (0.3%)
+   Heiko Stuebner                        3 (0.3%)
+   Michael Trimarchi                     3 (0.3%)
+   Marcel Ziswiler                       3 (0.3%)
+   Paul Barker                           3 (0.3%)
+   Frieder Schrempf                      2 (0.2%)
+   Weizhao Ouyang                        2 (0.2%)
+   Xavier Drudis Ferran                  2 (0.2%)
+   Angelo Dureghello                     2 (0.2%)
+   Christopher Obbard                    2 (0.2%)
+   Mike Frysinger                        2 (0.2%)
+   Dhruva Gole                           2 (0.2%)
+   Qu Wenruo                             2 (0.2%)
+   Linus Walleij                         2 (0.2%)
+   Svyatoslav Ryhel                      2 (0.2%)
+   Jonas Karlman                         1 (0.1%)
+   Andrew Davis                          1 (0.1%)
+   Nikhil M Jain                         1 (0.1%)
+   Eric Curtin                           1 (0.1%)
+   Neal Gompa                            1 (0.1%)
+   Dragan Simic                          1 (0.1%)
+   Daniel Schwierzeck                    1 (0.1%)
+   Ryan Chen                             1 (0.1%)
+   Lukasz Majewski                       1 (0.1%)
+   Rick Chen                             1 (0.1%)
+   Anup Patel                            1 (0.1%)
+   Kristian Amlie                        1 (0.1%)
+   Sebastian Reichel                     1 (0.1%)
+   Martyn Welch                          1 (0.1%)
+   Grzegorz Szymaszek                    1 (0.1%)
+   Raphaël Gallais-Pou                   1 (0.1%)
+   Wei Liang Lim                         1 (0.1%)
+   Adam Ford                             1 (0.1%)
+   Alexander Graf                        1 (0.1%)
+   Devarsh Thakkar                       1 (0.1%)
+   Michal Suchánek                       1 (0.1%)
+   Rafał Miłecki                         1 (0.1%)
+   Weijie Gao                            1 (0.1%)
+   Jan Kiszka                            1 (0.1%)
+   Sam Protsenko                         1 (0.1%)
+   Ye Li                                 1 (0.1%)
+   Marek Behún                           1 (0.1%)
+   Bryan Brattlof                        1 (0.1%)
+   Mikhail Kalashnikov                   1 (0.1%)
+   Randolph                              1 (0.1%)
+   Tony Dinh                             1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most test credits (total 131)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              29 (22.1%)
+   Mattijs Korpershoek                   22 (16.8%)
+   Joao Paulo Goncalves                  8 (6.1%)
+   Bhupesh Sharma                        6 (4.6%)
+   Yannic Moog                           6 (4.6%)
+   Samuel Holland                        5 (3.8%)
+   Svyatoslav Ryhel                      5 (3.8%)
+   Simon Glass                           4 (3.1%)
+   Nishanth Menon                        4 (3.1%)
+   Ivan T.Ivanov                         4 (3.1%)
+   Milan P. Stanić                       4 (3.1%)
+   Thuan Nguyen Hong                     3 (2.3%)
+   Marek Vasut                           2 (1.5%)
+   Ilias Apalodimas                      2 (1.5%)
+   Sam Edwards                           2 (1.5%)
+   Michal Simek                          2 (1.5%)
+   Andreas Westman Dorcsak               2 (1.5%)
+   Sean Anderson                         1 (0.8%)
+   Jaehoon Chung                         1 (0.8%)
+   Neha Malcom Francis                   1 (0.8%)
+   Marcel Ziswiler                       1 (0.8%)
+   Paul Barker                           1 (0.8%)
+   Christopher Obbard                    1 (0.8%)
+   Mikhail Kalashnikov                   1 (0.8%)
+   Andy Shevchenko                       1 (0.8%)
+   Stephen Graf                          1 (0.8%)
+   Bob McChesney                         1 (0.8%)
+   Piotr Oniszczuk                       1 (0.8%)
+   Maksim Kurnosenko                     1 (0.8%)
+   Henrik Grimler                        1 (0.8%)
+   Bao Cheng Su                          1 (0.8%)
+   Kevin Amadiva                         1 (0.8%)
+   Chris Paterson                        1 (0.8%)
+   Masahisa Kojima                       1 (0.8%)
+   Maksim Kiselev                        1 (0.8%)
+   Shantur Rathore                       1 (0.8%)
+   Chanho Park                           1 (0.8%)
+   FUKAUMI Naoki                         1 (0.8%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 131)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Bryan Brattlof                        26 (19.8%)
+   Nishanth Menon                        18 (13.7%)
+   Marek Vasut                           17 (13.0%)
+   Andre Przywara                        10 (7.6%)
+   Joao Marcos Costa                     8 (6.1%)
+   Svyatoslav Ryhel                      7 (5.3%)
+   Simon Glass                           6 (4.6%)
+   Teresa Remmet                         6 (4.6%)
+   Roger Quadros                         5 (3.8%)
+   Jonas Karlman                         5 (3.8%)
+   Heinrich Schuchardt                   4 (3.1%)
+   Paul Barker                           3 (2.3%)
+   Tom Rini                              2 (1.5%)
+   Sam Edwards                           2 (1.5%)
+   Andrew Davis                          2 (1.5%)
+   Ilias Apalodimas                      1 (0.8%)
+   Sean Anderson                         1 (0.8%)
+   Mikhail Kalashnikov                   1 (0.8%)
+   Jan Kiszka                            1 (0.8%)
+   Lukas Funke                           1 (0.8%)
+   Guillaume La Roque                    1 (0.8%)
+   Wojciech Nizinski                     1 (0.8%)
+   Massimo Pegorer                       1 (0.8%)
+   Eddie James                           1 (0.8%)
+   Robert Nelson                         1 (0.8%)
+   ====================================  =====
+
+
+.. table:: Developers with the most report credits (total 25)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Nishanth Menon                        3 (12.0%)
+   Tom Rini                              2 (8.0%)
+   Sean Anderson                         2 (8.0%)
+   Date Huang                            2 (8.0%)
+   Vincent Stehlé                        2 (8.0%)
+   Andre Przywara                        1 (4.0%)
+   Roger Quadros                         1 (4.0%)
+   Jonas Karlman                         1 (4.0%)
+   Heinrich Schuchardt                   1 (4.0%)
+   Mikhail Kalashnikov                   1 (4.0%)
+   Bao Cheng Su                          1 (4.0%)
+   Fabio Estevam                         1 (4.0%)
+   Weizhao Ouyang                        1 (4.0%)
+   Martin Liška                          1 (4.0%)
+   Peter Hoyes                           1 (4.0%)
+   Madushan Nishantha                    1 (4.0%)
+   Ivan Ivanov                           1 (4.0%)
+   Jayantajit Gogoi                      1 (4.0%)
+   Suman Anna                            1 (4.0%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 25)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           6 (24.0%)
+   Nishanth Menon                        3 (12.0%)
+   Marek Vasut                           3 (12.0%)
+   Andre Przywara                        2 (8.0%)
+   Heinrich Schuchardt                   2 (8.0%)
+   Siddharth Vadapalli                   2 (8.0%)
+   Roger Quadros                         1 (4.0%)
+   Jan Kiszka                            1 (4.0%)
+   Massimo Pegorer                       1 (4.0%)
+   Samuel Holland                        1 (4.0%)
+   Jonathan Corbet                       1 (4.0%)
+   Rasmus Villemoes                      1 (4.0%)
+   Udit Kumar                            1 (4.0%)
+   ====================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             515 (32.9%)
+   Google LLC                            274 (17.5%)
+   Renesas Electronics                   177 (11.3%)
+   AMD                                   114 (7.3%)
+   Texas Instruments                     100 (6.4%)
+   Linaro                                95 (6.1%)
+   DENX Software Engineering             72 (4.6%)
+   Konsulko Group                        50 (3.2%)
+   ARM                                   39 (2.5%)
+   Amarula Solutions                     20 (1.3%)
+   Samsung                               19 (1.2%)
+   ST Microelectronics                   18 (1.2%)
+   Toradex                               17 (1.1%)
+   NXP                                   10 (0.6%)
+   Siemens                               8 (0.5%)
+   Phytec                                7 (0.4%)
+   Rockchip                              7 (0.4%)
+   BayLibre SAS                          6 (0.4%)
+   IBM                                   6 (0.4%)
+   Bosch                                 3 (0.2%)
+   Weidmüller Interface GmbH & Co. KG    3 (0.2%)
+   Bootlin                               1 (0.1%)
+   Collabora Ltd.                        1 (0.1%)
+   Intel                                 1 (0.1%)
+   LWN.net                               1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             43854 (37.2%)
+   Texas Instruments                     12605 (10.7%)
+   Renesas Electronics                   11595 (9.8%)
+   Google LLC                            11497 (9.8%)
+   AMD                                   8291 (7.0%)
+   NXP                                   6236 (5.3%)
+   Linaro                                5994 (5.1%)
+   ARM                                   4545 (3.9%)
+   Amarula Solutions                     3655 (3.1%)
+   Konsulko Group                        2320 (2.0%)
+   DENX Software Engineering             2239 (1.9%)
+   IBM                                   1481 (1.3%)
+   ST Microelectronics                   1114 (0.9%)
+   Samsung                               882 (0.7%)
+   Phytec                                782 (0.7%)
+   Toradex                               282 (0.2%)
+   Siemens                               190 (0.2%)
+   Rockchip                              171 (0.1%)
+   Weidmüller Interface GmbH & Co. KG    99 (0.1%)
+   BayLibre SAS                          25 (0.0%)
+   Intel                                 20 (0.0%)
+   Bosch                                 6 (0.0%)
+   Collabora Ltd.                        6 (0.0%)
+   LWN.net                               4 (0.0%)
+   Bootlin                               1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Employers with the most signoffs (total 215)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   AMD                                   62 (28.8%)
+   Linaro                                37 (17.2%)
+   (Unknown)                             28 (13.0%)
+   Samsung                               13 (6.0%)
+   ST Microelectronics                   10 (4.7%)
+   Canonical                             9 (4.2%)
+   Texas Instruments                     7 (3.3%)
+   NXP                                   7 (3.3%)
+   ARM                                   7 (3.3%)
+   Amarula Solutions                     7 (3.3%)
+   Pengutronix                           5 (2.3%)
+   Google LLC                            4 (1.9%)
+   DENX Software Engineering             4 (1.9%)
+   BayLibre SAS                          4 (1.9%)
+   Konsulko Group                        3 (1.4%)
+   Toradex                               3 (1.4%)
+   Bootlin                               2 (0.9%)
+   Renesas Electronics                   1 (0.5%)
+   Rockchip                              1 (0.5%)
+   Intel                                 1 (0.5%)
+   ====================================  =====
+
+
+.. table:: Employers with the most hackers (total 192)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             104 (54.2%)
+   AMD                                   14 (7.3%)
+   Texas Instruments                     12 (6.2%)
+   Linaro                                10 (5.2%)
+   DENX Software Engineering             6 (3.1%)
+   NXP                                   5 (2.6%)
+   Toradex                               5 (2.6%)
+   ST Microelectronics                   4 (2.1%)
+   ARM                                   4 (2.1%)
+   Rockchip                              4 (2.1%)
+   Renesas Electronics                   3 (1.6%)
+   Samsung                               2 (1.0%)
+   Amarula Solutions                     2 (1.0%)
+   Google LLC                            2 (1.0%)
+   BayLibre SAS                          2 (1.0%)
+   Phytec                                2 (1.0%)
+   Siemens                               2 (1.0%)
+   Weidmüller Interface GmbH & Co. KG    2 (1.0%)
+   Konsulko Group                        1 (0.5%)
+   Bootlin                               1 (0.5%)
+   Intel                                 1 (0.5%)
+   IBM                                   1 (0.5%)
+   Bosch                                 1 (0.5%)
+   Collabora Ltd.                        1 (0.5%)
+   LWN.net                               1 (0.5%)
+   ====================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2024.04.rst b/doc/develop/statistics/u-boot-stats-v2024.04.rst
new file mode 100644
index 00000000000..b97b833ade4
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2024.04.rst
@@ -0,0 +1,877 @@
+:orphan:
+
+Release Statistics for U-Boot v2024.04
+======================================
+
+* Processed 1402 changesets from 200 developers
+
+* 28 employers found
+
+* A total of 124614 lines added, 48092 removed (delta 76522)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           143 (10.2%)
+   Heinrich Schuchardt                   103 (7.3%)
+   Tom Rini                              89 (6.3%)
+   Marek Vasut                           69 (4.9%)
+   Sean Anderson                         53 (3.8%)
+   Nishanth Menon                        43 (3.1%)
+   Fabio Estevam                         36 (2.6%)
+   Michal Simek                          35 (2.5%)
+   Caleb Connolly                        31 (2.2%)
+   Svyatoslav Ryhel                      28 (2.0%)
+   Igor Prusov                           25 (1.8%)
+   Francis Laniel                        24 (1.7%)
+   Jonas Karlman                         22 (1.6%)
+   Andrew Davis                          22 (1.6%)
+   Masahisa Kojima                       21 (1.5%)
+   Sam Protsenko                         20 (1.4%)
+   AKASHI Takahiro                       20 (1.4%)
+   Igor Opaniuk                          16 (1.1%)
+   Mathieu Othacehe                      16 (1.1%)
+   Patrice Chotard                       15 (1.1%)
+   Roger Quadros                         14 (1.0%)
+   Manorit Chawdhry                      14 (1.0%)
+   Patrick Delaunay                      14 (1.0%)
+   Enrico Leto                           13 (0.9%)
+   Quentin Schulz                        13 (0.9%)
+   Love Kumar                            13 (0.9%)
+   Rasmus Villemoes                      13 (0.9%)
+   Dario Binacchi                        12 (0.9%)
+   Neha Malcom Francis                   11 (0.8%)
+   Benjamin Hahn                         10 (0.7%)
+   Devarsh Thakkar                       10 (0.7%)
+   Bin Meng                              10 (0.7%)
+   Paul Barker                           9 (0.6%)
+   Venkatesh Yadav Abbarapu              9 (0.6%)
+   Yannic Moog                           9 (0.6%)
+   Takahiro Kuwano                       9 (0.6%)
+   Christian Taedcke                     9 (0.6%)
+   Andre Przywara                        8 (0.6%)
+   Hai Pham                              8 (0.6%)
+   Jim Liu                               8 (0.6%)
+   Julien Masson                         8 (0.6%)
+   Maxim Uvarov                          8 (0.6%)
+   Alexander Dahl                        7 (0.5%)
+   Adam Ford                             7 (0.5%)
+   Sébastien Szymanski                   7 (0.5%)
+   Ion Agorria                           7 (0.5%)
+   Mayuresh Chitale                      7 (0.5%)
+   Ilias Apalodimas                      6 (0.4%)
+   Randolph                              6 (0.4%)
+   Leo Yu-Chi Liang                      6 (0.4%)
+   Emanuele Ghidoli                      6 (0.4%)
+   Tim Lunn                              6 (0.4%)
+   Neil Armstrong                        5 (0.4%)
+   Hiago De Franco                       5 (0.4%)
+   Joao Paulo Goncalves                  5 (0.4%)
+   Josua Mayer                           5 (0.4%)
+   Shantur Rathore                       5 (0.4%)
+   Brandon Maier                         5 (0.4%)
+   Ivan T. Ivanov                        5 (0.4%)
+   Max Krummenacher                      5 (0.4%)
+   Tim Harvey                            5 (0.4%)
+   Maksim Kiselev                        4 (0.3%)
+   Frieder Schrempf                      4 (0.3%)
+   Jesse Taube                           4 (0.3%)
+   Mattijs Korpershoek                   4 (0.3%)
+   Radu Pirea (NXP OSS)                  4 (0.3%)
+   Samuel Holland                        4 (0.3%)
+   Chris Morgan                          4 (0.3%)
+   Csókás Bence                          4 (0.3%)
+   Vishal Mahaveer                       4 (0.3%)
+   Hugo Villeneuve                       4 (0.3%)
+   Tanmay Shah                           4 (0.3%)
+   Francesco Dolcini                     3 (0.2%)
+   Wadim Egorov                          3 (0.2%)
+   Aurelien Jarno                        3 (0.2%)
+   Nam Cao                               3 (0.2%)
+   Janne Grunau                          3 (0.2%)
+   Kongyang Liu                          3 (0.2%)
+   Tejas Bhumkar                         3 (0.2%)
+   Dinesh Maniyam                        3 (0.2%)
+   Moritz Fischer                        3 (0.2%)
+   Lukasz Majewski                       3 (0.2%)
+   Miquel Raynal                         3 (0.2%)
+   Robert Marko                          3 (0.2%)
+   Rafał Miłecki                         3 (0.2%)
+   Andrejs Cainikovs                     3 (0.2%)
+   Jaehoon Chung                         3 (0.2%)
+   Christophe Leroy                      3 (0.2%)
+   Christian Hewitt                      2 (0.1%)
+   Vitor Soares                          2 (0.1%)
+   Dhruva Gole                           2 (0.1%)
+   Minda Chen                            2 (0.1%)
+   Dan Carpenter                         2 (0.1%)
+   Marek Mojík                           2 (0.1%)
+   Andrey Skvortsov                      2 (0.1%)
+   Duy Nguyen                            2 (0.1%)
+   Michael Trimarchi                     2 (0.1%)
+   Primoz Fiser                          2 (0.1%)
+   Kever Yang                            2 (0.1%)
+   Lukasz Tekieli                        2 (0.1%)
+   Zong Li                               2 (0.1%)
+   Dmitry Malkin                         2 (0.1%)
+   Wei Ming Chen                         2 (0.1%)
+   Anthony Loiseau                       2 (0.1%)
+   Ivan Orlov                            2 (0.1%)
+   Chunfeng Yun                          2 (0.1%)
+   Robert Catherall                      2 (0.1%)
+   Reid Tonking                          2 (0.1%)
+   Udit Kumar                            2 (0.1%)
+   Etienne Carriere                      2 (0.1%)
+   Arnaud Ferraris                       2 (0.1%)
+   Dmitrii Merkurev                      2 (0.1%)
+   David Oberhollenzer                   2 (0.1%)
+   Douglas Anderson                      1 (0.1%)
+   Daniel Schwierzeck                    1 (0.1%)
+   Linus Walleij                         1 (0.1%)
+   Benjamin Gray                         1 (0.1%)
+   Mark Kettenis                         1 (0.1%)
+   Thomas Weißschuh                      1 (0.1%)
+   Conor Dooley                          1 (0.1%)
+   Bo Gan                                1 (0.1%)
+   Leon M. Busch-George                  1 (0.1%)
+   Thomas Perrot                         1 (0.1%)
+   Max Resch                             1 (0.1%)
+   Ludwig Kormann                        1 (0.1%)
+   Philippe Coval                        1 (0.1%)
+   Sam Edwards                           1 (0.1%)
+   Florian Schmaus                       1 (0.1%)
+   Aradhya Bhatia                        1 (0.1%)
+   Parth Pancholi                        1 (0.1%)
+   Ian Ray                               1 (0.1%)
+   Niklas Söderlund                      1 (0.1%)
+   Nils Le Roux                          1 (0.1%)
+   Saeed Nowshadi                        1 (0.1%)
+   Mike Looijmans                        1 (0.1%)
+   MD Danish Anwar                       1 (0.1%)
+   Ole P. Orhagen                        1 (0.1%)
+   Andy Yan                              1 (0.1%)
+   YouMin Chen                           1 (0.1%)
+   Matthias Brugger                      1 (0.1%)
+   kleines Filmröllchen                  1 (0.1%)
+   Vincent Chen                          1 (0.1%)
+   Ralph Siemsen                         1 (0.1%)
+   Chuanhong Guo                         1 (0.1%)
+   Nick Alilovic                         1 (0.1%)
+   Ssunk                                 1 (0.1%)
+   Yang Xiwen                            1 (0.1%)
+   Prasanth Babu Mantena                 1 (0.1%)
+   Yann Gautier                          1 (0.1%)
+   Joshua Riek                           1 (0.1%)
+   Slawomir Stepien                      1 (0.1%)
+   John Clark                            1 (0.1%)
+   Tianling Shen                         1 (0.1%)
+   Johan Jonker                          1 (0.1%)
+   Hugh Cole-Baker                       1 (0.1%)
+   Sekhar Nori                           1 (0.1%)
+   Tobias Deiminger                      1 (0.1%)
+   Hugo Cornelis                         1 (0.1%)
+   Oliver Faso                           1 (0.1%)
+   TracyMg_Li                            1 (0.1%)
+   Konrad Dybcio                         1 (0.1%)
+   Anatolij Gustschin                    1 (0.1%)
+   Grzegorz Szymaszek                    1 (0.1%)
+   Alexey Romanov                        1 (0.1%)
+   Paul-Erwan Rio                        1 (0.1%)
+   Peter Robinson                        1 (0.1%)
+   Chris Packham                         1 (0.1%)
+   Shubhrajyoti Datta                    1 (0.1%)
+   Raymond Mao                           1 (0.1%)
+   Tomas Alvarez Vanoli                  1 (0.1%)
+   Matthias Schiffer                     1 (0.1%)
+   Cody Green                            1 (0.1%)
+   Piotr Kubik                           1 (0.1%)
+   Ayoub Zaki                            1 (0.1%)
+   Nikita Shubin                         1 (0.1%)
+   Peter Geis                            1 (0.1%)
+   Bryan Brattlof                        1 (0.1%)
+   Yong-Xuan Wang                        1 (0.1%)
+   Kuan Lim Lee                          1 (0.1%)
+   Jan Kiszka                            1 (0.1%)
+   Bruce Suen                            1 (0.1%)
+   Vaishnav Achath                       1 (0.1%)
+   Benjamin Szőke                        1 (0.1%)
+   Alessandro Rubini                     1 (0.1%)
+   Doug Zobel                            1 (0.1%)
+   Nicolas Heemeryck                     1 (0.1%)
+   Ricardo Salveti                       1 (0.1%)
+   Cem Tenruh                            1 (0.1%)
+   Gilles Talis                          1 (0.1%)
+   Shawn Guo                             1 (0.1%)
+   Godfrey Mwangi                        1 (0.1%)
+   Jit Loon Lim                          1 (0.1%)
+   Teik Heng Chong                       1 (0.1%)
+   William Zhang                         1 (0.1%)
+   Alex Bee                              1 (0.1%)
+   Francois Berder                       1 (0.1%)
+   Thierry Reding                        1 (0.1%)
+   Jai Luthra                            1 (0.1%)
+   Vignesh Raghavendra                   1 (0.1%)
+   Robert Nelson                         1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Neha Malcom Francis                   16332 (11.2%)
+   Francis Laniel                        14974 (10.3%)
+   Svyatoslav Ryhel                      10521 (7.2%)
+   Tom Rini                              9300 (6.4%)
+   Nishanth Menon                        8556 (5.9%)
+   Mathieu Othacehe                      6259 (4.3%)
+   Sam Protsenko                         5717 (3.9%)
+   Wadim Egorov                          5475 (3.8%)
+   Hai Pham                              5242 (3.6%)
+   Marek Vasut                           4753 (3.3%)
+   Robert Nelson                         3746 (2.6%)
+   Julien Masson                         3705 (2.5%)
+   Sean Anderson                         3232 (2.2%)
+   Simon Glass                           2938 (2.0%)
+   Gilles Talis                          2893 (2.0%)
+   Heinrich Schuchardt                   2839 (2.0%)
+   Love Kumar                            2531 (1.7%)
+   Caleb Connolly                        2350 (1.6%)
+   AKASHI Takahiro                       2036 (1.4%)
+   Patrice Chotard                       1685 (1.2%)
+   Manorit Chawdhry                      1633 (1.1%)
+   Tim Lunn                              1492 (1.0%)
+   Frieder Schrempf                      1299 (0.9%)
+   Fabio Estevam                         1241 (0.9%)
+   Masahisa Kojima                       1168 (0.8%)
+   Andre Przywara                        1116 (0.8%)
+   Neil Armstrong                        1027 (0.7%)
+   Igor Prusov                           999 (0.7%)
+   Paul Barker                           911 (0.6%)
+   Cem Tenruh                            905 (0.6%)
+   Joshua Riek                           903 (0.6%)
+   Yannic Moog                           828 (0.6%)
+   Jonas Karlman                         796 (0.5%)
+   Andrew Davis                          794 (0.5%)
+   TracyMg_Li                            684 (0.5%)
+   Doug Zobel                            654 (0.4%)
+   Vishal Mahaveer                       651 (0.4%)
+   Quentin Schulz                        649 (0.4%)
+   Enrico Leto                           605 (0.4%)
+   Michal Simek                          578 (0.4%)
+   Randolph                              448 (0.3%)
+   Jesse Taube                           431 (0.3%)
+   Jim Liu                               424 (0.3%)
+   Konrad Dybcio                         421 (0.3%)
+   Kongyang Liu                          409 (0.3%)
+   Venkatesh Yadav Abbarapu              381 (0.3%)
+   Emanuele Ghidoli                      370 (0.3%)
+   Adam Ford                             337 (0.2%)
+   Igor Opaniuk                          324 (0.2%)
+   Patrick Delaunay                      272 (0.2%)
+   Rasmus Villemoes                      256 (0.2%)
+   Ion Agorria                           253 (0.2%)
+   Dmitrii Merkurev                      242 (0.2%)
+   Benjamin Hahn                         235 (0.2%)
+   Ilias Apalodimas                      226 (0.2%)
+   Roger Quadros                         218 (0.1%)
+   Jai Luthra                            214 (0.1%)
+   Brandon Maier                         209 (0.1%)
+   Robert Marko                          205 (0.1%)
+   Vignesh Raghavendra                   200 (0.1%)
+   Takahiro Kuwano                       177 (0.1%)
+   Shubhrajyoti Datta                    174 (0.1%)
+   Christian Taedcke                     173 (0.1%)
+   Tanmay Shah                           171 (0.1%)
+   Devarsh Thakkar                       166 (0.1%)
+   Johan Jonker                          165 (0.1%)
+   Tianling Shen                         163 (0.1%)
+   Chris Morgan                          159 (0.1%)
+   Benjamin Szőke                        151 (0.1%)
+   Duy Nguyen                            145 (0.1%)
+   Lukasz Majewski                       142 (0.1%)
+   Lukasz Tekieli                        138 (0.1%)
+   Max Resch                             132 (0.1%)
+   Sébastien Szymanski                   114 (0.1%)
+   Anatolij Gustschin                    112 (0.1%)
+   Max Krummenacher                      111 (0.1%)
+   Bin Meng                              105 (0.1%)
+   Dario Binacchi                        100 (0.1%)
+   Ivan T. Ivanov                        97 (0.1%)
+   Leo Yu-Chi Liang                      96 (0.1%)
+   Mayuresh Chitale                      83 (0.1%)
+   Hiago De Franco                       83 (0.1%)
+   David Oberhollenzer                   81 (0.1%)
+   Alexander Dahl                        79 (0.1%)
+   Raymond Mao                           78 (0.1%)
+   Dmitry Malkin                         74 (0.1%)
+   Zong Li                               73 (0.1%)
+   Tim Harvey                            69 (0.0%)
+   Vincent Chen                          67 (0.0%)
+   Chunfeng Yun                          66 (0.0%)
+   Maksim Kiselev                        61 (0.0%)
+   Csókás Bence                          61 (0.0%)
+   Marek Mojík                           61 (0.0%)
+   Peter Robinson                        59 (0.0%)
+   Aradhya Bhatia                        56 (0.0%)
+   Rafał Miłecki                         54 (0.0%)
+   Chris Packham                         51 (0.0%)
+   Primoz Fiser                          50 (0.0%)
+   Francesco Dolcini                     49 (0.0%)
+   Samuel Holland                        48 (0.0%)
+   Josua Mayer                           45 (0.0%)
+   Radu Pirea (NXP OSS)                  41 (0.0%)
+   Yong-Xuan Wang                        38 (0.0%)
+   Mattijs Korpershoek                   36 (0.0%)
+   Shantur Rathore                       34 (0.0%)
+   Parth Pancholi                        34 (0.0%)
+   Andrey Skvortsov                      33 (0.0%)
+   Hugo Cornelis                         32 (0.0%)
+   Vaishnav Achath                       32 (0.0%)
+   Joao Paulo Goncalves                  30 (0.0%)
+   Nicolas Heemeryck                     30 (0.0%)
+   Arnaud Ferraris                       28 (0.0%)
+   Nick Alilovic                         28 (0.0%)
+   Maxim Uvarov                          26 (0.0%)
+   Matthias Schiffer                     26 (0.0%)
+   Nam Cao                               25 (0.0%)
+   Janne Grunau                          21 (0.0%)
+   Dinesh Maniyam                        20 (0.0%)
+   Jaehoon Chung                         20 (0.0%)
+   Christophe Leroy                      20 (0.0%)
+   Miquel Raynal                         18 (0.0%)
+   Andrejs Cainikovs                     18 (0.0%)
+   Udit Kumar                            18 (0.0%)
+   Linus Walleij                         18 (0.0%)
+   Hugo Villeneuve                       17 (0.0%)
+   Moritz Fischer                        17 (0.0%)
+   Conor Dooley                          16 (0.0%)
+   Ricardo Salveti                       16 (0.0%)
+   Christian Hewitt                      15 (0.0%)
+   Vitor Soares                          15 (0.0%)
+   Alexey Romanov                        15 (0.0%)
+   Tejas Bhumkar                         13 (0.0%)
+   Anthony Loiseau                       13 (0.0%)
+   Yang Xiwen                            13 (0.0%)
+   Piotr Kubik                           13 (0.0%)
+   Dhruva Gole                           12 (0.0%)
+   Andy Yan                              12 (0.0%)
+   Chuanhong Guo                         12 (0.0%)
+   Hugh Cole-Baker                       12 (0.0%)
+   Robert Catherall                      11 (0.0%)
+   Reid Tonking                          11 (0.0%)
+   Nikita Shubin                         11 (0.0%)
+   Bryan Brattlof                        11 (0.0%)
+   Michael Trimarchi                     10 (0.0%)
+   Paul-Erwan Rio                        10 (0.0%)
+   Thierry Reding                        10 (0.0%)
+   Etienne Carriere                      9 (0.0%)
+   Sam Edwards                           9 (0.0%)
+   Niklas Söderlund                      9 (0.0%)
+   Nils Le Roux                          9 (0.0%)
+   MD Danish Anwar                       9 (0.0%)
+   Kuan Lim Lee                          9 (0.0%)
+   YouMin Chen                           8 (0.0%)
+   Benjamin Gray                         7 (0.0%)
+   Mark Kettenis                         7 (0.0%)
+   Ayoub Zaki                            7 (0.0%)
+   Shawn Guo                             7 (0.0%)
+   Aurelien Jarno                        6 (0.0%)
+   Ian Ray                               6 (0.0%)
+   Ole P. Orhagen                        6 (0.0%)
+   Alex Bee                              6 (0.0%)
+   Saeed Nowshadi                        5 (0.0%)
+   Mike Looijmans                        5 (0.0%)
+   Tobias Deiminger                      5 (0.0%)
+   Cody Green                            5 (0.0%)
+   Teik Heng Chong                       5 (0.0%)
+   Kever Yang                            4 (0.0%)
+   Douglas Anderson                      4 (0.0%)
+   Bo Gan                                4 (0.0%)
+   Matthias Brugger                      4 (0.0%)
+   Ssunk                                 4 (0.0%)
+   Ralph Siemsen                         3 (0.0%)
+   Yann Gautier                          3 (0.0%)
+   Grzegorz Szymaszek                    3 (0.0%)
+   Minda Chen                            2 (0.0%)
+   Dan Carpenter                         2 (0.0%)
+   Wei Ming Chen                         2 (0.0%)
+   Ivan Orlov                            2 (0.0%)
+   Daniel Schwierzeck                    2 (0.0%)
+   Ludwig Kormann                        2 (0.0%)
+   Philippe Coval                        2 (0.0%)
+   Prasanth Babu Mantena                 2 (0.0%)
+   Oliver Faso                           2 (0.0%)
+   Jan Kiszka                            2 (0.0%)
+   Bruce Suen                            2 (0.0%)
+   Thomas Weißschuh                      1 (0.0%)
+   Leon M. Busch-George                  1 (0.0%)
+   Thomas Perrot                         1 (0.0%)
+   Florian Schmaus                       1 (0.0%)
+   kleines Filmröllchen                  1 (0.0%)
+   Slawomir Stepien                      1 (0.0%)
+   John Clark                            1 (0.0%)
+   Sekhar Nori                           1 (0.0%)
+   Tomas Alvarez Vanoli                  1 (0.0%)
+   Peter Geis                            1 (0.0%)
+   Alessandro Rubini                     1 (0.0%)
+   Godfrey Mwangi                        1 (0.0%)
+   Jit Loon Lim                          1 (0.0%)
+   William Zhang                         1 (0.0%)
+   Francois Berder                       1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              6982 (14.5%)
+   Marek Vasut                           3629 (7.5%)
+   Neha Malcom Francis                   3284 (6.8%)
+   Enrico Leto                           333 (0.7%)
+   Andrew Davis                          315 (0.7%)
+   Vishal Mahaveer                       211 (0.4%)
+   Shubhrajyoti Datta                    174 (0.4%)
+   Quentin Schulz                        103 (0.2%)
+   Roger Quadros                         69 (0.1%)
+   Takahiro Kuwano                       57 (0.1%)
+   Francesco Dolcini                     48 (0.1%)
+   David Oberhollenzer                   35 (0.1%)
+   Yong-Xuan Wang                        18 (0.0%)
+   Hugo Villeneuve                       14 (0.0%)
+   Ricardo Salveti                       4 (0.0%)
+   Sam Edwards                           3 (0.0%)
+   Christophe Leroy                      2 (0.0%)
+   Nam Cao                               1 (0.0%)
+   Thierry Reding                        1 (0.0%)
+   Ian Ray                               1 (0.0%)
+   Jan Kiszka                            1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most signoffs (total 184)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Michal Simek                          26 (14.1%)
+   Mattijs Korpershoek                   21 (11.4%)
+   Minkyu Kang                           20 (10.9%)
+   Raymond Mao                           12 (6.5%)
+   Ilias Apalodimas                      10 (5.4%)
+   Svyatoslav Ryhel                      8 (4.3%)
+   Tom Rini                              7 (3.8%)
+   Francesco Dolcini                     7 (3.8%)
+   Matthias Brugger                      7 (3.8%)
+   Dario Binacchi                        7 (3.8%)
+   Simon Glass                           5 (2.7%)
+   Jagan Teki                            3 (1.6%)
+   Neil Armstrong                        3 (1.6%)
+   Heinrich Schuchardt                   3 (1.6%)
+   Nishanth Menon                        3 (1.6%)
+   Jonathan Corbet                       2 (1.1%)
+   CL Wang                               2 (1.1%)
+   Apurva Nandan                         2 (1.1%)
+   Oleksandr Suvorov                     2 (1.1%)
+   Ivan T. Ivanov                        2 (1.1%)
+   Patrick Delaunay                      2 (1.1%)
+   Jonas Karlman                         2 (1.1%)
+   Sean Anderson                         2 (1.1%)
+   Hai Pham                              2 (1.1%)
+   Lukasz Majewski                       1 (0.5%)
+   Daniel Schwierzeck                    1 (0.5%)
+   Marek Behún                           1 (0.5%)
+   Guillaume La Roque                    1 (0.5%)
+   Nylon Chen                            1 (0.5%)
+   Alexandre Torgue                      1 (0.5%)
+   Harald Seiler                         1 (0.5%)
+   Holger Brunck                         1 (0.5%)
+   Siddharth Vadapalli                   1 (0.5%)
+   Wei Liang Lim                         1 (0.5%)
+   Martin Kurbanov                       1 (0.5%)
+   Dmitry Rokosov                        1 (0.5%)
+   Sreekanth Sunnam                      1 (0.5%)
+   Cody Schuffelen                       1 (0.5%)
+   Kever Yang                            1 (0.5%)
+   Reid Tonking                          1 (0.5%)
+   Bryan Brattlof                        1 (0.5%)
+   Chuanhong Guo                         1 (0.5%)
+   Zong Li                               1 (0.5%)
+   Rasmus Villemoes                      1 (0.5%)
+   Caleb Connolly                        1 (0.5%)
+   Andre Przywara                        1 (0.5%)
+   Masahisa Kojima                       1 (0.5%)
+   Patrice Chotard                       1 (0.5%)
+   ====================================  =====
+
+
+.. table:: Developers with the most reviews (total 899)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           181 (20.1%)
+   Tom Rini                              79 (8.8%)
+   Ilias Apalodimas                      66 (7.3%)
+   Kever Yang                            48 (5.3%)
+   Fabio Estevam                         38 (4.2%)
+   Mattijs Korpershoek                   34 (3.8%)
+   Patrice Chotard                       31 (3.4%)
+   Leo Yu-Chi Liang                      30 (3.3%)
+   Heinrich Schuchardt                   29 (3.2%)
+   Paul Barker                           29 (3.2%)
+   Jagan Teki                            22 (2.4%)
+   Marek Vasut                           22 (2.4%)
+   Sumit Garg                            21 (2.3%)
+   Neha Malcom Francis                   20 (2.2%)
+   Andre Przywara                        16 (1.8%)
+   Neil Armstrong                        15 (1.7%)
+   Patrick Delaunay                      15 (1.7%)
+   Sean Anderson                         12 (1.3%)
+   Roger Quadros                         10 (1.1%)
+   Peng Fan                              10 (1.1%)
+   Jonathan Humphreys                    10 (1.1%)
+   Igor Opaniuk                          10 (1.1%)
+   Nishanth Menon                        9 (1.0%)
+   Francesco Dolcini                     7 (0.8%)
+   Chanho Park                           7 (0.8%)
+   Stefan Roese                          6 (0.7%)
+   Yu Chien Peter Lin                    6 (0.7%)
+   Michael Trimarchi                     6 (0.7%)
+   Dhruva Gole                           6 (0.7%)
+   Dario Binacchi                        5 (0.6%)
+   Andrew Davis                          5 (0.6%)
+   Ian Ray                               5 (0.6%)
+   Peter Robinson                        5 (0.6%)
+   Michal Simek                          4 (0.4%)
+   Ramon Fried                           4 (0.4%)
+   Sam Protsenko                         4 (0.4%)
+   Matthias Brugger                      3 (0.3%)
+   Bryan Brattlof                        3 (0.3%)
+   Christian Gmeiner                     3 (0.3%)
+   Dragan Simic                          3 (0.3%)
+   Alexander Sverdlin                    3 (0.3%)
+   Nikhil M Jain                         3 (0.3%)
+   Tien Fong Chee                        3 (0.3%)
+   Teresa Remmet                         3 (0.3%)
+   Etienne Carriere                      3 (0.3%)
+   Manorit Chawdhry                      3 (0.3%)
+   Lukasz Majewski                       2 (0.2%)
+   Caleb Connolly                        2 (0.2%)
+   Hugo Villeneuve                       2 (0.2%)
+   Eugen Hristev                         2 (0.2%)
+   Jens Wiklander                        2 (0.2%)
+   Joao Marcos Costa                     2 (0.2%)
+   Dan Carpenter                         2 (0.2%)
+   Mark Kettenis                         2 (0.2%)
+   Conor Dooley                          2 (0.2%)
+   Udit Kumar                            2 (0.2%)
+   Bin Meng                              2 (0.2%)
+   Svyatoslav Ryhel                      1 (0.1%)
+   Marek Behún                           1 (0.1%)
+   Harald Seiler                         1 (0.1%)
+   Masahisa Kojima                       1 (0.1%)
+   Jernej Skrabec                        1 (0.1%)
+   Geert Uytterhoeven                    1 (0.1%)
+   Giulio Benetti                        1 (0.1%)
+   Ravi Gunasekaran                      1 (0.1%)
+   Weizhao Ouyang                        1 (0.1%)
+   Philip Oberfichtner                   1 (0.1%)
+   Padmarao Begari                       1 (0.1%)
+   Pratyush Yadav                        1 (0.1%)
+   Radhey Shyam Pandey                   1 (0.1%)
+   Qu Wenruo                             1 (0.1%)
+   Stefan Bosch                          1 (0.1%)
+   Aleksandar Gerasimovski               1 (0.1%)
+   Miquel Raynal                         1 (0.1%)
+   Linus Walleij                         1 (0.1%)
+   Yannic Moog                           1 (0.1%)
+   Frieder Schrempf                      1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most test credits (total 84)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Sumit Garg                            9 (10.7%)
+   Marcel Ziswiler                       7 (8.3%)
+   Jens Maus                             7 (8.3%)
+   Darko Alavanja                        7 (8.3%)
+   Mattijs Korpershoek                   4 (4.8%)
+   Patrice Chotard                       4 (4.8%)
+   Nishanth Menon                        4 (4.8%)
+   Dhruva Gole                           4 (4.8%)
+   Andre Przywara                        3 (3.6%)
+   Love Kumar                            3 (3.6%)
+   Peter Robinson                        2 (2.4%)
+   Christian Gmeiner                     2 (2.4%)
+   Sam Edwards                           2 (2.4%)
+   Hiago De Franco                       2 (2.4%)
+   Simon Glass                           1 (1.2%)
+   Ilias Apalodimas                      1 (1.2%)
+   Fabio Estevam                         1 (1.2%)
+   Leo Yu-Chi Liang                      1 (1.2%)
+   Marek Vasut                           1 (1.2%)
+   Chanho Park                           1 (1.2%)
+   Conor Dooley                          1 (1.2%)
+   Svyatoslav Ryhel                      1 (1.2%)
+   Martin Kurbanov                       1 (1.2%)
+   Enrico Leto                           1 (1.2%)
+   Bartel Eerdekens                      1 (1.2%)
+   Matwey V. Kornilov                    1 (1.2%)
+   Akira Yokosawa                        1 (1.2%)
+   Heiko Schocher                        1 (1.2%)
+   Thomas Richard                        1 (1.2%)
+   Agneli                                1 (1.2%)
+   Lisandro Pérez Meyer                  1 (1.2%)
+   Oliver Graute                         1 (1.2%)
+   Slawomir Stepien                      1 (1.2%)
+   Aurelien Jarno                        1 (1.2%)
+   Primoz Fiser                          1 (1.2%)
+   Alexander Dahl                        1 (1.2%)
+   Adam Ford                             1 (1.2%)
+   Mathieu Othacehe                      1 (1.2%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 84)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Caleb Connolly                        10 (11.9%)
+   Ivan T. Ivanov                        10 (11.9%)
+   Fabio Estevam                         6 (7.1%)
+   Emanuele Ghidoli                      6 (7.1%)
+   Igor Prusov                           5 (6.0%)
+   Nishanth Menon                        4 (4.8%)
+   Dmitry Malkin                         4 (4.8%)
+   Heinrich Schuchardt                   3 (3.6%)
+   Roger Quadros                         3 (3.6%)
+   Andrew Davis                          3 (3.6%)
+   Mayuresh Chitale                      3 (3.6%)
+   Ilias Apalodimas                      2 (2.4%)
+   Dmitrii Merkurev                      2 (2.4%)
+   Simon Glass                           1 (1.2%)
+   Svyatoslav Ryhel                      1 (1.2%)
+   Primoz Fiser                          1 (1.2%)
+   Mathieu Othacehe                      1 (1.2%)
+   Tom Rini                              1 (1.2%)
+   Manorit Chawdhry                      1 (1.2%)
+   Masahisa Kojima                       1 (1.2%)
+   Miquel Raynal                         1 (1.2%)
+   Linus Walleij                         1 (1.2%)
+   Jonas Karlman                         1 (1.2%)
+   Prasanth Babu Mantena                 1 (1.2%)
+   Oliver Faso                           1 (1.2%)
+   Paul-Erwan Rio                        1 (1.2%)
+   Robert Catherall                      1 (1.2%)
+   Niklas Söderlund                      1 (1.2%)
+   Joao Paulo Goncalves                  1 (1.2%)
+   Shantur Rathore                       1 (1.2%)
+   Maksim Kiselev                        1 (1.2%)
+   Benjamin Szőke                        1 (1.2%)
+   Ion Agorria                           1 (1.2%)
+   Jesse Taube                           1 (1.2%)
+   Randolph                              1 (1.2%)
+   Joshua Riek                           1 (1.2%)
+   ====================================  =====
+
+
+.. table:: Developers with the most report credits (total 20)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Simon Glass                           2 (10.0%)
+   Tom Rini                              2 (10.0%)
+   Marcel Ziswiler                       2 (10.0%)
+   Dan Carpenter                         2 (10.0%)
+   Trevor Woerner                        2 (10.0%)
+   Heinrich Schuchardt                   1 (5.0%)
+   Andre Przywara                        1 (5.0%)
+   Christian Gmeiner                     1 (5.0%)
+   Hiago De Franco                       1 (5.0%)
+   Lisandro Pérez Meyer                  1 (5.0%)
+   Neil Armstrong                        1 (5.0%)
+   Sagar Karmarkar                       1 (5.0%)
+   E Shattow                             1 (5.0%)
+   Dave Jones                            1 (5.0%)
+   Hong Guan                             1 (5.0%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 23)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Fabio Estevam                         6 (26.1%)
+   Tom Rini                              4 (17.4%)
+   Heinrich Schuchardt                   2 (8.7%)
+   Jonas Karlman                         2 (8.7%)
+   Simon Glass                           1 (4.3%)
+   Caleb Connolly                        1 (4.3%)
+   Nishanth Menon                        1 (4.3%)
+   Roger Quadros                         1 (4.3%)
+   Aurelien Jarno                        1 (4.3%)
+   Sean Anderson                         1 (4.3%)
+   Michal Simek                          1 (4.3%)
+   Frieder Schrempf                      1 (4.3%)
+   Devarsh Thakkar                       1 (4.3%)
+   ====================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             543 (38.7%)
+   Google LLC                            149 (10.6%)
+   Texas Instruments                     118 (8.4%)
+   Linaro                                97 (6.9%)
+   Konsulko Group                        89 (6.3%)
+   Renesas Electronics                   72 (5.1%)
+   AMD                                   66 (4.7%)
+   DENX Software Engineering             46 (3.3%)
+   Amarula Solutions                     38 (2.7%)
+   ST Microelectronics                   32 (2.3%)
+   Toradex                               28 (2.0%)
+   Phytec                                23 (1.6%)
+   Socionext Inc.                        21 (1.5%)
+   Siemens                               14 (1.0%)
+   BayLibre SAS                          12 (0.9%)
+   ARM                                   10 (0.7%)
+   Weidmüller Interface GmbH & Co. KG    9 (0.6%)
+   SUSE                                  6 (0.4%)
+   Intel                                 5 (0.4%)
+   Bootlin                               4 (0.3%)
+   NXP                                   4 (0.3%)
+   linutronix                            4 (0.3%)
+   Rockchip                              4 (0.3%)
+   Samsung                               3 (0.2%)
+   Collabora Ltd.                        2 (0.1%)
+   Broadcom                              1 (0.1%)
+   IBM                                   1 (0.1%)
+   NVidia                                1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             43650 (30.0%)
+   Texas Instruments                     28698 (19.7%)
+   Amarula Solutions                     15084 (10.4%)
+   Linaro                                11911 (8.2%)
+   Renesas Electronics                   10853 (7.5%)
+   Konsulko Group                        9300 (6.4%)
+   Phytec                                7443 (5.1%)
+   AMD                                   3853 (2.7%)
+   BayLibre SAS                          3741 (2.6%)
+   Google LLC                            3201 (2.2%)
+   ST Microelectronics                   1969 (1.4%)
+   DENX Software Engineering             1602 (1.1%)
+   Socionext Inc.                        1168 (0.8%)
+   ARM                                   1127 (0.8%)
+   Toradex                               660 (0.5%)
+   Siemens                               607 (0.4%)
+   Weidmüller Interface GmbH & Co. KG    173 (0.1%)
+   SUSE                                  101 (0.1%)
+   NXP                                   41 (0.0%)
+   linutronix                            30 (0.0%)
+   Collabora Ltd.                        28 (0.0%)
+   Intel                                 26 (0.0%)
+   Rockchip                              24 (0.0%)
+   Samsung                               20 (0.0%)
+   Bootlin                               19 (0.0%)
+   NVidia                                10 (0.0%)
+   IBM                                   7 (0.0%)
+   Broadcom                              1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Employers with the most signoffs (total 184)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Linaro                                27 (14.7%)
+   AMD                                   27 (14.7%)
+   (Unknown)                             26 (14.1%)
+   BayLibre SAS                          22 (12.0%)
+   Samsung                               20 (10.9%)
+   Amarula Solutions                     9 (4.9%)
+   SUSE                                  9 (4.9%)
+   Texas Instruments                     8 (4.3%)
+   Konsulko Group                        7 (3.8%)
+   Toradex                               7 (3.8%)
+   Google LLC                            6 (3.3%)
+   ST Microelectronics                   4 (2.2%)
+   Canonical                             3 (1.6%)
+   Renesas Electronics                   2 (1.1%)
+   DENX Software Engineering             2 (1.1%)
+   LWN.net                               2 (1.1%)
+   ARM                                   1 (0.5%)
+   Rockchip                              1 (0.5%)
+   Edgeble AI Technologies Pvt. Ltd.     1 (0.5%)
+   ====================================  =====
+
+
+.. table:: Employers with the most hackers (total 203)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             109 (53.7%)
+   Texas Instruments                     17 (8.4%)
+   Linaro                                12 (5.9%)
+   Toradex                               8 (3.9%)
+   AMD                                   7 (3.4%)
+   Google LLC                            4 (2.0%)
+   ST Microelectronics                   4 (2.0%)
+   Renesas Electronics                   4 (2.0%)
+   DENX Software Engineering             4 (2.0%)
+   Phytec                                4 (2.0%)
+   Amarula Solutions                     3 (1.5%)
+   Rockchip                              3 (1.5%)
+   Intel                                 3 (1.5%)
+   BayLibre SAS                          2 (1.0%)
+   SUSE                                  2 (1.0%)
+   ARM                                   2 (1.0%)
+   Siemens                               2 (1.0%)
+   linutronix                            2 (1.0%)
+   Bootlin                               2 (1.0%)
+   Samsung                               1 (0.5%)
+   Konsulko Group                        1 (0.5%)
+   Socionext Inc.                        1 (0.5%)
+   Weidmüller Interface GmbH & Co. KG    1 (0.5%)
+   NXP                                   1 (0.5%)
+   Collabora Ltd.                        1 (0.5%)
+   NVidia                                1 (0.5%)
+   IBM                                   1 (0.5%)
+   Broadcom                              1 (0.5%)
+   ====================================  =====
diff --git a/doc/develop/statistics/u-boot-stats-v2024.07.rst b/doc/develop/statistics/u-boot-stats-v2024.07.rst
new file mode 100644
index 00000000000..b437e926659
--- /dev/null
+++ b/doc/develop/statistics/u-boot-stats-v2024.07.rst
@@ -0,0 +1,890 @@
+:orphan:
+
+Release Statistics for U-Boot v2024.07
+======================================
+
+* Processed 1624 changesets from 191 developers
+
+* 28 employers found
+
+* A total of 2308875 lines added, 242831 removed (delta 2066044)
+
+.. table:: Developers with the most changesets
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              324 (20.0%)
+   Jonas Karlman                         155 (9.5%)
+   Caleb Connolly                        98 (6.0%)
+   Heinrich Schuchardt                   84 (5.2%)
+   Quentin Schulz                        59 (3.6%)
+   Marek Vasut                           52 (3.2%)
+   Simon Glass                           44 (2.7%)
+   Patrice Chotard                       32 (2.0%)
+   Sumit Garg                            31 (1.9%)
+   Svyatoslav Ryhel                      31 (1.9%)
+   Michal Simek                          26 (1.6%)
+   Ilias Apalodimas                      23 (1.4%)
+   Neil Armstrong                        23 (1.4%)
+   Jonathan Humphreys                    22 (1.4%)
+   Andrew Davis                          18 (1.1%)
+   Marek Behún                           18 (1.1%)
+   Jagan Teki                            17 (1.0%)
+   MD Danish Anwar                       15 (0.9%)
+   Kongyang Liu                          15 (0.9%)
+   Bryan Brattlof                        14 (0.9%)
+   Janne Grunau                          14 (0.9%)
+   Christophe Leroy                      13 (0.8%)
+   Tim Harvey                            13 (0.8%)
+   Apurva Nandan                         12 (0.7%)
+   Wadim Egorov                          11 (0.7%)
+   Andre Przywara                        11 (0.7%)
+   Peng Fan                              11 (0.7%)
+   Adam Ford                             10 (0.6%)
+   Sam Protsenko                         10 (0.6%)
+   Roger Quadros                         10 (0.6%)
+   Igor Opaniuk                          9 (0.6%)
+   Robert Marko                          9 (0.6%)
+   Jonas Schwöbel                        9 (0.6%)
+   Yang Xiwen                            9 (0.6%)
+   Eugene Uriev                          9 (0.6%)
+   Chris Morgan                          8 (0.5%)
+   Judith Mendez                         8 (0.5%)
+   Raymond Mao                           8 (0.5%)
+   Alexander Dahl                        7 (0.4%)
+   Fabio Estevam                         7 (0.4%)
+   Jim Liu                               7 (0.4%)
+   Venkatesh Yadav Abbarapu              7 (0.4%)
+   Mattijs Korpershoek                   6 (0.4%)
+   Daniel Schultz                        6 (0.4%)
+   Weizhao Ouyang                        6 (0.4%)
+   Ye Li                                 6 (0.4%)
+   Conor Dooley                          5 (0.3%)
+   Nishanth Menon                        5 (0.3%)
+   Leo Yu-Chi Liang                      5 (0.3%)
+   Bhargav Raviprakash                   5 (0.3%)
+   Masahisa Kojima                       5 (0.3%)
+   mwleeds@mailtundra.com                5 (0.3%)
+   Michał Barnaś                         5 (0.3%)
+   Leonard Anderweit                     5 (0.3%)
+   Chen-Yu Tsai                          5 (0.3%)
+   Javier Martinez Canillas              4 (0.2%)
+   Francesco Dolcini                     4 (0.2%)
+   Felipe Balbi                          4 (0.2%)
+   Aniket Limaye                         4 (0.2%)
+   Christopher Obbard                    4 (0.2%)
+   Mathieu Othacehe                      4 (0.2%)
+   Joao Paulo Goncalves                  4 (0.2%)
+   Sughosh Ganu                          4 (0.2%)
+   Volodymyr Babchuk                     4 (0.2%)
+   Lukasz Majewski                       4 (0.2%)
+   Jacky Chou                            4 (0.2%)
+   Dan Carpenter                         4 (0.2%)
+   Mihai Sain                            4 (0.2%)
+   Arseniy Krasnov                       3 (0.2%)
+   Fiona Klute                           3 (0.2%)
+   Hanyuan Zhao                          3 (0.2%)
+   Greg Malysa                           3 (0.2%)
+   Nathan Barrett-Morrison               3 (0.2%)
+   Peter Robinson                        3 (0.2%)
+   Lukas Funke                           3 (0.2%)
+   Yannic Moog                           3 (0.2%)
+   Udit Kumar                            3 (0.2%)
+   Michael Walle                         3 (0.2%)
+   Devarsh Thakkar                       3 (0.2%)
+   Christophe Kerello                    3 (0.2%)
+   Viacheslav Bocharov                   3 (0.2%)
+   Emanuele Ghidoli                      3 (0.2%)
+   Hari Nagalla                          3 (0.2%)
+   Love Kumar                            3 (0.2%)
+   Thomas Weißschuh                      3 (0.2%)
+   Weijie Gao                            3 (0.2%)
+   Dragan Simic                          2 (0.1%)
+   Michael Trimarchi                     2 (0.1%)
+   Patrick Delaunay                      2 (0.1%)
+   Tony Dinh                             2 (0.1%)
+   Sam Povilus                           2 (0.1%)
+   H Bell                                2 (0.1%)
+   Thinh Nguyen                          2 (0.1%)
+   Benjamin Hahn                         2 (0.1%)
+   Neha Malcom Francis                   2 (0.1%)
+   Ian Roberts                           2 (0.1%)
+   Sean Anderson                         2 (0.1%)
+   Kamlesh Gurudasani                    2 (0.1%)
+   Stefan Eichenberger                   2 (0.1%)
+   Parth Pancholi                        2 (0.1%)
+   Maksim Kiselev                        2 (0.1%)
+   Christophe Roullier                   2 (0.1%)
+   Hugo Dubois                           2 (0.1%)
+   CASAUBON Jean Michel                  2 (0.1%)
+   Ahelenia Ziemiańska                   2 (0.1%)
+   Yasuharu Shibata                      2 (0.1%)
+   Wan Yee Lau                           2 (0.1%)
+   Vincent Stehlé                        2 (0.1%)
+   Marcel Ziswiler                       2 (0.1%)
+   Maxim Moskalets                       2 (0.1%)
+   Sébastien Szymanski                   2 (0.1%)
+   Tejas Bhumkar                         2 (0.1%)
+   Bhupesh Sharma                        2 (0.1%)
+   Colin McAllister                      2 (0.1%)
+   Andy Yan                              2 (0.1%)
+   Dasnavis Sabiya                       2 (0.1%)
+   Stefan Bosch                          2 (0.1%)
+   Frank Wunderlich                      1 (0.1%)
+   Jiaxun Yang                           1 (0.1%)
+   Ravi Minnikanti                       1 (0.1%)
+   John Watts                            1 (0.1%)
+   Heiko Schocher                        1 (0.1%)
+   Thomas Perl                           1 (0.1%)
+   Kristian Amlie                        1 (0.1%)
+   Heiko Stuebner                        1 (0.1%)
+   Anand Moon                            1 (0.1%)
+   Alexander Sverdlin                    1 (0.1%)
+   Aswath Govindraju                     1 (0.1%)
+   Sam Day                               1 (0.1%)
+   Boon Khai Ng                          1 (0.1%)
+   William Zhang                         1 (0.1%)
+   Jaehoon Chung                         1 (0.1%)
+   Sam Edwards                           1 (0.1%)
+   Linus Walleij                         1 (0.1%)
+   Kishan Dudhatra                       1 (0.1%)
+   Yu Chien Peter Lin                    1 (0.1%)
+   Nitin Yadav                           1 (0.1%)
+   Andrea Calabrese                      1 (0.1%)
+   Lukasz Czechowski                     1 (0.1%)
+   Finley Xiao                           1 (0.1%)
+   Jason Zhu                             1 (0.1%)
+   Maximilian Brune                      1 (0.1%)
+   cmachida                              1 (0.1%)
+   Hector Martin                         1 (0.1%)
+   Anton Bambura                         1 (0.1%)
+   Khem Raj                              1 (0.1%)
+   Jianan Huang                          1 (0.1%)
+   Charles Hardin                        1 (0.1%)
+   Gireesh Hiremath                      1 (0.1%)
+   Alexey Romanov                        1 (0.1%)
+   Eugeniu Rosca                         1 (0.1%)
+   Bruce Suen                            1 (0.1%)
+   Kunihiko Hayashi                      1 (0.1%)
+   Hugo Cornelis                         1 (0.1%)
+   Vitor Soares                          1 (0.1%)
+   Martyn Welch                          1 (0.1%)
+   Manorit Chawdhry                      1 (0.1%)
+   Jixiong Hu                            1 (0.1%)
+   Pierre-Clément Tosi                   1 (0.1%)
+   Hiago De Franco                       1 (0.1%)
+   Petr Zejdl                            1 (0.1%)
+   Łukasz Stelmach                       1 (0.1%)
+   Ben Dooks                             1 (0.1%)
+   Javier Viguera                        1 (0.1%)
+   Josua Mayer                           1 (0.1%)
+   James Hilliard                        1 (0.1%)
+   Marjolaine Amate                      1 (0.1%)
+   Vishal Sagar                          1 (0.1%)
+   Manikanta Guntupalli                  1 (0.1%)
+   Shubhangi Shrikrushna Mahalle         1 (0.1%)
+   Piotr Wojtaszczyk                     1 (0.1%)
+   Kelly Hung                            1 (0.1%)
+   Leon M. Busch-George                  1 (0.1%)
+   Lukasz Wiecaszek                      1 (0.1%)
+   Jit Loon Lim                          1 (0.1%)
+   William Wu                            1 (0.1%)
+   Ben Wolsieffer                        1 (0.1%)
+   Elon Zhang                            1 (0.1%)
+   Vignesh Raghavendra                   1 (0.1%)
+   Maks Mishin                           1 (0.1%)
+   Bob Wolff                             1 (0.1%)
+   Romain Naour                          1 (0.1%)
+   Dmitry Baryshkov                      1 (0.1%)
+   Vishal Mahaveer                       1 (0.1%)
+   Siddharth Vadapalli                   1 (0.1%)
+   Ivan Orlov                            1 (0.1%)
+   Nam Cao                               1 (0.1%)
+   Massimiliano Minella                  1 (0.1%)
+   BELOUARGA Mohamed                     1 (0.1%)
+   Alexander Gendin                      1 (0.1%)
+   Ivan Mikhaylov                        1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most changed lines
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Tom Rini                              2187616 (86.6%)
+   Jonas Karlman                         69460 (2.8%)
+   Marek Vasut                           53285 (2.1%)
+   Caleb Connolly                        47393 (1.9%)
+   Apurva Nandan                         26241 (1.0%)
+   Neil Armstrong                        23816 (0.9%)
+   Tim Harvey                            10971 (0.4%)
+   Christophe Leroy                      10210 (0.4%)
+   Wadim Egorov                          8248 (0.3%)
+   Bryan Brattlof                        7039 (0.3%)
+   Tony Dinh                             5540 (0.2%)
+   Marcel Ziswiler                       5068 (0.2%)
+   Nathan Barrett-Morrison               4872 (0.2%)
+   Adam Ford                             4867 (0.2%)
+   Sumit Garg                            4743 (0.2%)
+   Andrew Davis                          4066 (0.2%)
+   Quentin Schulz                        3449 (0.1%)
+   Peng Fan                              3071 (0.1%)
+   Sam Protsenko                         3021 (0.1%)
+   Jit Loon Lim                          2717 (0.1%)
+   MD Danish Anwar                       2686 (0.1%)
+   Anand Moon                            2526 (0.1%)
+   Svyatoslav Ryhel                      2445 (0.1%)
+   Andy Yan                              1978 (0.1%)
+   Peter Robinson                        1907 (0.1%)
+   Boon Khai Ng                          1709 (0.1%)
+   Arseniy Krasnov                       1669 (0.1%)
+   Heinrich Schuchardt                   1350 (0.1%)
+   Jagan Teki                            1347 (0.1%)
+   Fabio Estevam                         1209 (0.0%)
+   Ilias Apalodimas                      1189 (0.0%)
+   Simon Glass                           1137 (0.0%)
+   Roger Quadros                         955 (0.0%)
+   Marek Behún                           939 (0.0%)
+   Elon Zhang                            889 (0.0%)
+   Kongyang Liu                          846 (0.0%)
+   Mihai Sain                            789 (0.0%)
+   Bhupesh Sharma                        662 (0.0%)
+   Jonas Schwöbel                        620 (0.0%)
+   Javier Martinez Canillas              597 (0.0%)
+   Michael Walle                         505 (0.0%)
+   Eugene Uriev                          501 (0.0%)
+   Christophe Kerello                    479 (0.0%)
+   Chris Morgan                          452 (0.0%)
+   Michal Simek                          449 (0.0%)
+   Bhargav Raviprakash                   388 (0.0%)
+   Janne Grunau                          386 (0.0%)
+   Robert Marko                          332 (0.0%)
+   Vignesh Raghavendra                   332 (0.0%)
+   H Bell                                291 (0.0%)
+   Yang Xiwen                            278 (0.0%)
+   Bruce Suen                            269 (0.0%)
+   Daniel Schultz                        265 (0.0%)
+   Love Kumar                            258 (0.0%)
+   Igor Opaniuk                          219 (0.0%)
+   Raymond Mao                           208 (0.0%)
+   Wan Yee Lau                           206 (0.0%)
+   Sughosh Ganu                          201 (0.0%)
+   Greg Malysa                           200 (0.0%)
+   Patrice Chotard                       199 (0.0%)
+   Masahisa Kojima                       193 (0.0%)
+   Dasnavis Sabiya                       189 (0.0%)
+   Neha Malcom Francis                   183 (0.0%)
+   Jonathan Humphreys                    173 (0.0%)
+   Anton Bambura                         167 (0.0%)
+   Kelly Hung                            164 (0.0%)
+   Andre Przywara                        163 (0.0%)
+   Kamlesh Gurudasani                    163 (0.0%)
+   Volodymyr Babchuk                     147 (0.0%)
+   Parth Pancholi                        146 (0.0%)
+   Piotr Wojtaszczyk                     144 (0.0%)
+   Judith Mendez                         131 (0.0%)
+   Joao Paulo Goncalves                  131 (0.0%)
+   Leonard Anderweit                     117 (0.0%)
+   BELOUARGA Mohamed                     114 (0.0%)
+   Finley Xiao                           109 (0.0%)
+   Jianan Huang                          99 (0.0%)
+   Venkatesh Yadav Abbarapu              95 (0.0%)
+   Chen-Yu Tsai                          92 (0.0%)
+   Mathieu Othacehe                      92 (0.0%)
+   Michał Barnaś                         86 (0.0%)
+   Lukasz Majewski                       74 (0.0%)
+   Alexander Dahl                        67 (0.0%)
+   Nishanth Menon                        66 (0.0%)
+   Conor Dooley                          64 (0.0%)
+   Francesco Dolcini                     64 (0.0%)
+   Maksim Kiselev                        64 (0.0%)
+   Linus Walleij                         64 (0.0%)
+   Weizhao Ouyang                        63 (0.0%)
+   Yannic Moog                           61 (0.0%)
+   Weijie Gao                            60 (0.0%)
+   Ben Dooks                             60 (0.0%)
+   Leo Yu-Chi Liang                      59 (0.0%)
+   Fiona Klute                           56 (0.0%)
+   Alexey Romanov                        56 (0.0%)
+   Jim Liu                               55 (0.0%)
+   Devarsh Thakkar                       53 (0.0%)
+   Colin McAllister                      53 (0.0%)
+   Maxim Moskalets                       51 (0.0%)
+   Josua Mayer                           50 (0.0%)
+   Ivan Mikhaylov                        50 (0.0%)
+   Ian Roberts                           47 (0.0%)
+   Christophe Roullier                   44 (0.0%)
+   Vincent Stehlé                        44 (0.0%)
+   Nam Cao                               43 (0.0%)
+   Ben Wolsieffer                        42 (0.0%)
+   Felipe Balbi                          41 (0.0%)
+   Vishal Sagar                          40 (0.0%)
+   Hanyuan Zhao                          38 (0.0%)
+   Hugo Dubois                           37 (0.0%)
+   Christopher Obbard                    34 (0.0%)
+   Aniket Limaye                         33 (0.0%)
+   Romain Naour                          33 (0.0%)
+   Heiko Stuebner                        31 (0.0%)
+   Emanuele Ghidoli                      30 (0.0%)
+   Stefan Bosch                          30 (0.0%)
+   mwleeds@mailtundra.com                28 (0.0%)
+   Michael Trimarchi                     23 (0.0%)
+   Thomas Weißschuh                      22 (0.0%)
+   Thinh Nguyen                          21 (0.0%)
+   Nitin Yadav                           19 (0.0%)
+   Jixiong Hu                            18 (0.0%)
+   Marjolaine Amate                      18 (0.0%)
+   Dan Carpenter                         17 (0.0%)
+   Stefan Eichenberger                   17 (0.0%)
+   Sam Povilus                           15 (0.0%)
+   Sébastien Szymanski                   15 (0.0%)
+   Massimiliano Minella                  15 (0.0%)
+   Mattijs Korpershoek                   14 (0.0%)
+   Sean Anderson                         14 (0.0%)
+   Lukas Funke                           13 (0.0%)
+   Yasuharu Shibata                      13 (0.0%)
+   Sam Edwards                           13 (0.0%)
+   Kunihiko Hayashi                      13 (0.0%)
+   Jacky Chou                            12 (0.0%)
+   Vitor Soares                          12 (0.0%)
+   Ye Li                                 11 (0.0%)
+   Udit Kumar                            11 (0.0%)
+   Hiago De Franco                       11 (0.0%)
+   Hari Nagalla                          10 (0.0%)
+   Maximilian Brune                      10 (0.0%)
+   Leon M. Busch-George                  10 (0.0%)
+   Viacheslav Bocharov                   9 (0.0%)
+   Benjamin Hahn                         9 (0.0%)
+   cmachida                              9 (0.0%)
+   James Hilliard                        9 (0.0%)
+   Lukasz Wiecaszek                      9 (0.0%)
+   Charles Hardin                        8 (0.0%)
+   Petr Zejdl                            8 (0.0%)
+   Vishal Mahaveer                       8 (0.0%)
+   Sam Day                               7 (0.0%)
+   Manorit Chawdhry                      7 (0.0%)
+   Łukasz Stelmach                       7 (0.0%)
+   Andrea Calabrese                      6 (0.0%)
+   Siddharth Vadapalli                   6 (0.0%)
+   CASAUBON Jean Michel                  5 (0.0%)
+   Ahelenia Ziemiańska                   5 (0.0%)
+   Ravi Minnikanti                       5 (0.0%)
+   Hugo Cornelis                         5 (0.0%)
+   Bob Wolff                             5 (0.0%)
+   Alexander Gendin                      5 (0.0%)
+   Dragan Simic                          4 (0.0%)
+   Aswath Govindraju                     4 (0.0%)
+   Kishan Dudhatra                       4 (0.0%)
+   Khem Raj                              4 (0.0%)
+   Tejas Bhumkar                         3 (0.0%)
+   Heiko Schocher                        3 (0.0%)
+   Lukasz Czechowski                     3 (0.0%)
+   Jason Zhu                             3 (0.0%)
+   Maks Mishin                           3 (0.0%)
+   Patrick Delaunay                      2 (0.0%)
+   Jiaxun Yang                           2 (0.0%)
+   William Zhang                         2 (0.0%)
+   Eugeniu Rosca                         2 (0.0%)
+   Pierre-Clément Tosi                   2 (0.0%)
+   Javier Viguera                        2 (0.0%)
+   Manikanta Guntupalli                  2 (0.0%)
+   Dmitry Baryshkov                      2 (0.0%)
+   Frank Wunderlich                      1 (0.0%)
+   John Watts                            1 (0.0%)
+   Thomas Perl                           1 (0.0%)
+   Kristian Amlie                        1 (0.0%)
+   Alexander Sverdlin                    1 (0.0%)
+   Jaehoon Chung                         1 (0.0%)
+   Yu Chien Peter Lin                    1 (0.0%)
+   Hector Martin                         1 (0.0%)
+   Gireesh Hiremath                      1 (0.0%)
+   Martyn Welch                          1 (0.0%)
+   Shubhangi Shrikrushna Mahalle         1 (0.0%)
+   William Wu                            1 (0.0%)
+   Ivan Orlov                            1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most lines removed
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Jonas Karlman                         59892 (24.7%)
+   Marek Vasut                           51731 (21.3%)
+   Neil Armstrong                        19240 (7.9%)
+   Tim Harvey                            10397 (4.3%)
+   Tony Dinh                             5465 (2.3%)
+   Marcel Ziswiler                       5061 (2.1%)
+   Adam Ford                             4818 (2.0%)
+   Andrew Davis                          3493 (1.4%)
+   Peng Fan                              2778 (1.1%)
+   Anand Moon                            2523 (1.0%)
+   Sam Protsenko                         2273 (0.9%)
+   Peter Robinson                        1907 (0.8%)
+   Fabio Estevam                         1185 (0.5%)
+   Sumit Garg                            845 (0.3%)
+   Javier Martinez Canillas              582 (0.2%)
+   Michael Walle                         494 (0.2%)
+   Chen-Yu Tsai                          80 (0.0%)
+   Igor Opaniuk                          72 (0.0%)
+   Linus Walleij                         61 (0.0%)
+   Francesco Dolcini                     36 (0.0%)
+   Sam Edwards                           12 (0.0%)
+   Ben Wolsieffer                        11 (0.0%)
+   Hiago De Franco                       11 (0.0%)
+   Kunihiko Hayashi                      10 (0.0%)
+   Colin McAllister                      7 (0.0%)
+   Heiko Schocher                        3 (0.0%)
+   Dan Carpenter                         2 (0.0%)
+   Dragan Simic                          2 (0.0%)
+   Jiaxun Yang                           1 (0.0%)
+   William Zhang                         1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Developers with the most signoffs (total 231)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Caleb Connolly                        41 (17.7%)
+   Mattijs Korpershoek                   19 (8.2%)
+   Michal Simek                          15 (6.5%)
+   Dario Binacchi                        11 (4.8%)
+   Chris Morgan                          10 (4.3%)
+   Ilias Apalodimas                      10 (4.3%)
+   Svyatoslav Ryhel                      10 (4.3%)
+   Hari Nagalla                          8 (3.5%)
+   Minkyu Kang                           7 (3.0%)
+   Alexander Sverdlin                    6 (2.6%)
+   Ian Roberts                           6 (2.6%)
+   Greg Malysa                           5 (2.2%)
+   Nathan Barrett-Morrison               5 (2.2%)
+   Manorit Chawdhry                      4 (1.7%)
+   Dasnavis Sabiya                       4 (1.7%)
+   Christophe Leroy                      4 (1.7%)
+   Apurva Nandan                         4 (1.7%)
+   Neil Armstrong                        3 (1.3%)
+   Francesco Dolcini                     3 (1.3%)
+   Vasileios Bimpikas                    3 (1.3%)
+   Utsav Agarwal                         3 (1.3%)
+   Arturs Artamonovs                     3 (1.3%)
+   Neha Malcom Francis                   3 (1.3%)
+   Janne Grunau                          3 (1.3%)
+   Heinrich Schuchardt                   3 (1.3%)
+   Jonas Karlman                         2 (0.9%)
+   Marek Vasut                           2 (0.9%)
+   Sumit Garg                            2 (0.9%)
+   Dhruva Gole                           2 (0.9%)
+   Kever Yang                            2 (0.9%)
+   Ravi Gunasekaran                      2 (0.9%)
+   Parvathi Bhogaraju                    2 (0.9%)
+   Jayesh Choudhary                      2 (0.9%)
+   Bo-Cun Chen                           2 (0.9%)
+   Daniel Schultz                        2 (0.9%)
+   Jonas Schwöbel                        2 (0.9%)
+   Bryan Brattlof                        2 (0.9%)
+   Peng Fan                              1 (0.4%)
+   Fabio Estevam                         1 (0.4%)
+   Stefan Roese                          1 (0.4%)
+   Greg Kroah-Hartman                    1 (0.4%)
+   Angelo Dureghello                     1 (0.4%)
+   Anatolij Gustschin                    1 (0.4%)
+   Vaishnav Achath                       1 (0.4%)
+   Ashok Reddy Soma                      1 (0.4%)
+   Dong Huang                            1 (0.4%)
+   Shubhangi Shrikrushna Mahalle         1 (0.4%)
+   Felipe Balbi                          1 (0.4%)
+   Judith Mendez                         1 (0.4%)
+   Patrice Chotard                       1 (0.4%)
+   Quentin Schulz                        1 (0.4%)
+   ====================================  =====
+
+
+.. table:: Developers with the most reviews (total 1025)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Kever Yang                            223 (21.8%)
+   Neil Armstrong                        71 (6.9%)
+   Sumit Garg                            70 (6.8%)
+   Dragan Simic                          45 (4.4%)
+   Ilias Apalodimas                      42 (4.1%)
+   Heinrich Schuchardt                   35 (3.4%)
+   Patrick Delaunay                      33 (3.2%)
+   Quentin Schulz                        32 (3.1%)
+   Mattijs Korpershoek                   31 (3.0%)
+   Leo Yu-Chi Liang                      31 (3.0%)
+   Marek Vasut                           28 (2.7%)
+   Jaehoon Chung                         28 (2.7%)
+   Patrice Chotard                       22 (2.1%)
+   Caleb Connolly                        21 (2.0%)
+   Tom Rini                              21 (2.0%)
+   Stefan Roese                          20 (2.0%)
+   Neha Malcom Francis                   17 (1.7%)
+   Simon Glass                           16 (1.6%)
+   Peter Robinson                        13 (1.3%)
+   Igor Opaniuk                          13 (1.3%)
+   Thierry Reding                        12 (1.2%)
+   Neal Gompa                            11 (1.1%)
+   Heiko Schocher                        9 (0.9%)
+   Michael Trimarchi                     9 (0.9%)
+   Roger Quadros                         9 (0.9%)
+   Tony Dinh                             8 (0.8%)
+   Christopher Obbard                    8 (0.8%)
+   Jonas Karlman                         6 (0.6%)
+   Dhruva Gole                           6 (0.6%)
+   E Shattow                             6 (0.6%)
+   Christophe ROULLIER                   6 (0.6%)
+   Richard Henderson                     6 (0.6%)
+   Nishanth Menon                        6 (0.6%)
+   Ravi Gunasekaran                      5 (0.5%)
+   Teresa Remmet                         5 (0.5%)
+   Mark Kettenis                         5 (0.5%)
+   Paul Barker                           5 (0.5%)
+   Udit Kumar                            5 (0.5%)
+   Sean Anderson                         5 (0.5%)
+   Fabio Estevam                         4 (0.4%)
+   Sam Protsenko                         4 (0.4%)
+   Enric Balletbo i Serra                4 (0.4%)
+   Laurent Pinchart                      4 (0.4%)
+   Bryan Brattlof                        3 (0.3%)
+   Andrew Davis                          3 (0.3%)
+   Sam Edwards                           3 (0.3%)
+   Dan Carpenter                         3 (0.3%)
+   William Zhang                         3 (0.3%)
+   Chris Packham                         3 (0.3%)
+   Nikhil M Jain                         3 (0.3%)
+   Tianling Shen                         3 (0.3%)
+   Anatolij Gustschin                    2 (0.2%)
+   CASAUBON Jean Michel                  2 (0.2%)
+   Ian Ray                               2 (0.2%)
+   Oleksandr Suvorov                     2 (0.2%)
+   Bin Meng                              2 (0.2%)
+   Tien Fong Chee                        2 (0.2%)
+   Minkyu Kang                           1 (0.1%)
+   Tim Harvey                            1 (0.1%)
+   Adam Ford                             1 (0.1%)
+   Linus Walleij                         1 (0.1%)
+   Eddie James                           1 (0.1%)
+   Guillaume La Roque                    1 (0.1%)
+   Julien Masson                         1 (0.1%)
+   Miquel Raynal                         1 (0.1%)
+   Tim Lunn                              1 (0.1%)
+   Cédric Le Goater                      1 (0.1%)
+   Biju Das                              1 (0.1%)
+   Holger Brunck                         1 (0.1%)
+   Otavio Salvador                       1 (0.1%)
+   Chia-Wei Wang                         1 (0.1%)
+   Keerthy                               1 (0.1%)
+   Philipp Tomsich                       1 (0.1%)
+   Gao Xiang                             1 (0.1%)
+   Frieder Schrempf                      1 (0.1%)
+   Dmitrii Merkurev                      1 (0.1%)
+   Marc Zyngier                          1 (0.1%)
+   Ramon Fried                           1 (0.1%)
+   Jai Luthra                            1 (0.1%)
+   Alexander Dahl                        1 (0.1%)
+   Heiko Stuebner                        1 (0.1%)
+   Hugo Dubois                           1 (0.1%)
+   Weizhao Ouyang                        1 (0.1%)
+   Andre Przywara                        1 (0.1%)
+   Mathieu Othacehe                      1 (0.1%)
+   Wadim Egorov                          1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Developers with the most test credits (total 166)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Sumit Garg                            19 (11.4%)
+   Marcel Ziswiler                       15 (9.0%)
+   Svyatoslav Ryhel                      10 (6.0%)
+   Mattijs Korpershoek                   9 (5.4%)
+   Ion Agorria                           9 (5.4%)
+   Tim Harvey                            7 (4.2%)
+   Adam Ford                             7 (4.2%)
+   Andreas Westman Dorcsak               7 (4.2%)
+   Sam Edwards                           6 (3.6%)
+   Agneli                                6 (3.6%)
+   Robert Eckelmann                      6 (3.6%)
+   Simon Glass                           5 (3.0%)
+   Teresa Remmet                         5 (3.0%)
+   Fabio Estevam                         5 (3.0%)
+   Ilias Apalodimas                      4 (2.4%)
+   Jonathan Humphreys                    4 (2.4%)
+   Neil Armstrong                        3 (1.8%)
+   Paul Barker                           3 (1.8%)
+   Heiko Stuebner                        3 (1.8%)
+   Christian Gmeiner                     3 (1.8%)
+   Heinrich Schuchardt                   2 (1.2%)
+   Caleb Connolly                        2 (1.2%)
+   Tony Dinh                             2 (1.2%)
+   Hiago De Franco                       2 (1.2%)
+   Robert Nelson                         2 (1.2%)
+   Leo Yu-Chi Liang                      1 (0.6%)
+   Jaehoon Chung                         1 (0.6%)
+   Patrice Chotard                       1 (0.6%)
+   Dhruva Gole                           1 (0.6%)
+   E Shattow                             1 (0.6%)
+   Ravi Gunasekaran                      1 (0.6%)
+   Bryan Brattlof                        1 (0.6%)
+   Andrew Davis                          1 (0.6%)
+   Tim Lunn                              1 (0.6%)
+   Otavio Salvador                       1 (0.6%)
+   Wadim Egorov                          1 (0.6%)
+   Michal Simek                          1 (0.6%)
+   Alexander Sverdlin                    1 (0.6%)
+   Jonas Schwöbel                        1 (0.6%)
+   Judith Mendez                         1 (0.6%)
+   Michael Walle                         1 (0.6%)
+   Patrick Bruenn                        1 (0.6%)
+   Jethro Bull                           1 (0.6%)
+   Kamlesh Gurudasani                    1 (0.6%)
+   Robert Marko                          1 (0.6%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most tested-by credits (total 166)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Svyatoslav Ryhel                      36 (21.7%)
+   Caleb Connolly                        23 (13.9%)
+   Sumit Garg                            15 (9.0%)
+   Apurva Nandan                         12 (7.2%)
+   Marek Vasut                           10 (6.0%)
+   Ilias Apalodimas                      6 (3.6%)
+   Quentin Schulz                        6 (3.6%)
+   Tom Rini                              6 (3.6%)
+   Neil Armstrong                        5 (3.0%)
+   Andrew Davis                          5 (3.0%)
+   Leonard Anderweit                     5 (3.0%)
+   Jonas Schwöbel                        4 (2.4%)
+   Fabio Estevam                         3 (1.8%)
+   Heinrich Schuchardt                   3 (1.8%)
+   Bryan Brattlof                        3 (1.8%)
+   Alexander Sverdlin                    2 (1.2%)
+   Dasnavis Sabiya                       2 (1.2%)
+   Pierre-Clément Tosi                   2 (1.2%)
+   Yasuharu Shibata                      2 (1.2%)
+   Josua Mayer                           2 (1.2%)
+   Masahisa Kojima                       2 (1.2%)
+   Tim Harvey                            1 (0.6%)
+   Simon Glass                           1 (0.6%)
+   Tony Dinh                             1 (0.6%)
+   Judith Mendez                         1 (0.6%)
+   Igor Opaniuk                          1 (0.6%)
+   Roger Quadros                         1 (0.6%)
+   Nishanth Menon                        1 (0.6%)
+   Anand Moon                            1 (0.6%)
+   Sébastien Szymanski                   1 (0.6%)
+   Maksim Kiselev                        1 (0.6%)
+   Ben Dooks                             1 (0.6%)
+   Yang Xiwen                            1 (0.6%)
+   ====================================  =====
+
+
+.. table:: Developers with the most report credits (total 27)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   E Shattow                             4 (14.8%)
+   Sumit Garg                            2 (7.4%)
+   Jonas Karlman                         2 (7.4%)
+   Laurent Pinchart                      2 (7.4%)
+   Suman Anna                            2 (7.4%)
+   Marek Vasut                           1 (3.7%)
+   Andrew Davis                          1 (3.7%)
+   Heinrich Schuchardt                   1 (3.7%)
+   Tim Harvey                            1 (3.7%)
+   Simon Glass                           1 (3.7%)
+   Jonathan Humphreys                    1 (3.7%)
+   Patrice Chotard                       1 (3.7%)
+   Dhruva Gole                           1 (3.7%)
+   Dan Carpenter                         1 (3.7%)
+   Christophe Leroy                      1 (3.7%)
+   Eugeniu Rosca                         1 (3.7%)
+   Janusz Dziedzic                       1 (3.7%)
+   David Virag                           1 (3.7%)
+   Jan Kiszka                            1 (3.7%)
+   Aniket Limaye                         1 (3.7%)
+   ====================================  =====
+
+
+.. table:: Developers who gave the most report credits (total 27)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Heinrich Schuchardt                   6 (22.2%)
+   Neha Malcom Francis                   3 (11.1%)
+   Marek Vasut                           2 (7.4%)
+   Caleb Connolly                        2 (7.4%)
+   Tom Rini                              2 (7.4%)
+   Fabio Estevam                         2 (7.4%)
+   Bryan Brattlof                        2 (7.4%)
+   Andrew Davis                          1 (3.7%)
+   Ilias Apalodimas                      1 (3.7%)
+   Quentin Schulz                        1 (3.7%)
+   Yasuharu Shibata                      1 (3.7%)
+   Nishanth Menon                        1 (3.7%)
+   Sam Protsenko                         1 (3.7%)
+   Felipe Balbi                          1 (3.7%)
+   Alexander Gendin                      1 (3.7%)
+   ====================================  =====
+
+
+.. table:: Top changeset contributors by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             645 (39.7%)
+   Konsulko Group                        324 (20.0%)
+   Linaro                                201 (12.4%)
+   Texas Instruments                     119 (7.3%)
+   Google LLC                            50 (3.1%)
+   AMD                                   43 (2.6%)
+   ST Microelectronics                   39 (2.4%)
+   DENX Software Engineering             34 (2.1%)
+   Phytec                                27 (1.7%)
+   Renesas Electronics                   25 (1.5%)
+   Toradex                               19 (1.2%)
+   NXP                                   17 (1.0%)
+   Edgeble AI Technologies Pvt. Ltd.     14 (0.9%)
+   ARM                                   13 (0.8%)
+   Intel                                 9 (0.6%)
+   Amarula Solutions                     7 (0.4%)
+   BayLibre SAS                          6 (0.4%)
+   Socionext Inc.                        6 (0.4%)
+   Collabora Ltd.                        5 (0.3%)
+   Red Hat                               4 (0.2%)
+   linutronix                            4 (0.2%)
+   Rockchip                              4 (0.2%)
+   Weidmüller Interface GmbH & Co. KG    3 (0.2%)
+   Samsung                               2 (0.1%)
+   Broadcom                              1 (0.1%)
+   Digi International                    1 (0.1%)
+   Marvell                               1 (0.1%)
+   Siemens                               1 (0.1%)
+   ====================================  =====
+
+
+.. table:: Top lines changed by employer
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   Konsulko Group                        2187616 (86.6%)
+   (Unknown)                             130949 (5.2%)
+   Linaro                                80577 (3.2%)
+   Renesas Electronics                   52143 (2.1%)
+   Texas Instruments                     41420 (1.6%)
+   Phytec                                8700 (0.3%)
+   Toradex                               5479 (0.2%)
+   Intel                                 4682 (0.2%)
+   Edgeble AI Technologies Pvt. Ltd.     3856 (0.2%)
+   NXP                                   3082 (0.1%)
+   DENX Software Engineering             1283 (0.1%)
+   Google LLC                            1225 (0.0%)
+   Rockchip                              1002 (0.0%)
+   AMD                                   863 (0.0%)
+   ST Microelectronics                   724 (0.0%)
+   Red Hat                               597 (0.0%)
+   ARM                                   207 (0.0%)
+   Socionext Inc.                        206 (0.0%)
+   linutronix                            65 (0.0%)
+   Amarula Solutions                     46 (0.0%)
+   Collabora Ltd.                        35 (0.0%)
+   BayLibre SAS                          14 (0.0%)
+   Weidmüller Interface GmbH & Co. KG    13 (0.0%)
+   Samsung                               8 (0.0%)
+   Marvell                               5 (0.0%)
+   Broadcom                              2 (0.0%)
+   Digi International                    2 (0.0%)
+   Siemens                               1 (0.0%)
+   ====================================  =====
+
+
+.. table:: Employers with the most signoffs (total 231)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             56 (24.2%)
+   Linaro                                56 (24.2%)
+   Texas Instruments                     33 (14.3%)
+   BayLibre SAS                          19 (8.2%)
+   AMD                                   17 (7.4%)
+   Amarula Solutions                     11 (4.8%)
+   Analog Devices                        9 (3.9%)
+   Samsung                               7 (3.0%)
+   Siemens                               6 (2.6%)
+   DENX Software Engineering             4 (1.7%)
+   Toradex                               3 (1.3%)
+   Canonical                             3 (1.3%)
+   Phytec                                2 (0.9%)
+   Rockchip                              2 (0.9%)
+   Intel                                 1 (0.4%)
+   NXP                                   1 (0.4%)
+   ST Microelectronics                   1 (0.4%)
+   ====================================  =====
+
+
+.. table:: Employers with the most hackers (total 195)
+   :widths: auto
+
+   ====================================  =====
+   Name                                  Count
+   ====================================  =====
+   (Unknown)                             98 (50.3%)
+   Texas Instruments                     20 (10.3%)
+   Linaro                                10 (5.1%)
+   AMD                                   8 (4.1%)
+   Toradex                               8 (4.1%)
+   Phytec                                5 (2.6%)
+   Intel                                 5 (2.6%)
+   DENX Software Engineering             4 (2.1%)
+   Rockchip                              4 (2.1%)
+   ST Microelectronics                   4 (2.1%)
+   Amarula Solutions                     3 (1.5%)
+   Google LLC                            3 (1.5%)
+   Samsung                               2 (1.0%)
+   NXP                                   2 (1.0%)
+   Edgeble AI Technologies Pvt. Ltd.     2 (1.0%)
+   ARM                                   2 (1.0%)
+   Socionext Inc.                        2 (1.0%)
+   linutronix                            2 (1.0%)
+   Collabora Ltd.                        2 (1.0%)
+   BayLibre SAS                          1 (0.5%)
+   Siemens                               1 (0.5%)
+   Konsulko Group                        1 (0.5%)
+   Renesas Electronics                   1 (0.5%)
+   Red Hat                               1 (0.5%)
+   Weidmüller Interface GmbH & Co. KG    1 (0.5%)
+   Marvell                               1 (0.5%)
+   Broadcom                              1 (0.5%)
+   Digi International                    1 (0.5%)
+   ====================================  =====
+
diff --git a/doc/develop/system_configuration.rst b/doc/develop/system_configuration.rst
new file mode 100644
index 00000000000..40be46b0823
--- /dev/null
+++ b/doc/develop/system_configuration.rst
@@ -0,0 +1,132 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+System configuration
+====================
+
+There are a number of different aspects to configuring U-Boot to build and then
+run on a given platform or set of platforms. Broadly speaking, some aspects of
+the world can be configured at run time and others must be done at build time.
+In general run time configuration is preferred over build time configuration.
+But when making these decisions, we also need to consider if we're talking about
+a feature that could be useful to virtually every platform or something specific
+to a single hardware platform. The resulting image size is also another
+important consideration. Finally, run time configuration has additional overhead
+both in terms of resource requirements and wall clock time. All of this means
+that care must be taken when writing new code to select the most appropriate
+configuration mechanism.
+
+When adding new features to U-Boot, be they a new subsystem or SoC support or
+new platform for an existing supported SoC, the preferred configuration order
+is:
+
+#. Hardware based run time configuration. Examples of this include reading
+   processor specific registers, or a set of board specific GPIOs or an EEPROM
+   with a known format to it. These are the cases where we either cannot or
+   should not be relying on device tree checks. We use this for cases such as
+   optimized boot time or starting with a generic device tree and then enabling
+   or disabling features as we boot.
+
+#. Making use of our Kconfig infrastructure and C preprocessor macros that have
+   the prefix ``CONFIG``. This is the primary method of build time
+   configuration. This is generally the best fit for when we want to enable or
+   disable some sort of feature, such as the SoC or network support. The
+   ``CONFIG`` prefix for C preprocessor macros is strictly reserved for Kconfig
+   usage only.
+
+#. Making use of the :doc:`device tree <devicetree/control>` to determine at
+   run time how to configure a feature that we have enabled via Kconfig. For
+   example, we would use Kconfig to enable an I2C chip driver, but use the device
+   tree to know where the I2C chip resides in memory and other details we need
+   in order to configure the bus.
+
+#. Making use of C header files directly and defining C preprocessor macros that
+   have the ``CFG`` prefix. While the ``CFG`` prefix is reserved for this build
+   time configuration mechanism, the usage is ad hoc. This is to be used when the
+   previously mentioned mechanisms are not possible, or for legacy code that has
+   not been converted.
+
+Dynamic run time configuration methods.
+---------------------------------------
+
+Details of hardware specific run time configuration methods are found within the
+documentation for a given processor family or board.
+
+Details of how to use run time configuration based on :doc:`driver model
+<driver-model/index>` are covered in that documentation section.
+
+Static build time configuration methods
+---------------------------------------
+
+There are two mechanisms used to control the build time configuration of U-Boot.
+One is utilizing Kconfig and ``CONFIG`` prefixed macros and the other is ad hoc
+usage of ``CFG`` prefixed macros. Both of these are used when it is either not
+possible or not practical to make a run time determination about some
+functionality of the hardware or a required software feature or similar. Each of
+these has their own places where they are better suited than the other for use.
+
+The `Kconfig language
+<https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html>`_ is well
+documented and used in a number of projects, including the Linux kernel. We
+implement this with the Kconfig files found throughout our sources. This
+mechanism is the preferred way of exposing new configuration options as there
+are a number of ways for both users and system integrators to manage and change
+these options. Some common examples here are to enable a specific command within
+U-Boot or even a whole subsystem such as NAND flash or network connectivity.
+
+The ``CFG`` mechanism is implemented directly as C preprocessor values or
+macros, depending on what they are in turn describing. While we have some
+functionality that is very reasonable to expose to the end user to enable or
+disable we have other places where we need to describe things such as register
+locations or values, memory map ranges and so on. When practical, we should be
+getting these values from the device tree. However, there are cases where this
+is either not practical due to when we need the information and may not have a
+device tree yet or due to legacy reasons code has not been rewritten.
+
+When to use each mechanism
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+While there are some cases where it should be fairly obvious where to use each
+mechanism, as for example a command would be done via Kconfig, a new I2C driver
+should use Kconfig and be configured via driver model and a header of values
+generated by an external tool should be ``CFG``, there will be cases where it's
+less clear and one needs to take care when implementing it. In general,
+configuration *options* should be done in Kconfig and configuration *settings*
+should be done in driver model or ``CFG``. Let us discuss things to keep in mind
+when picking the appropriate mechanism.
+
+A thing to keep in mind is that we have a strong preference for using Kconfig as
+the primary build time configuration mechanism. Options expressed this way let
+us easily express dependencies and abstractions. In addition, given that many
+projects use this mechanism means it has a broad set of tooling and existing
+knowledge base.
+
+Consider the example of a SHA256 hardware acceleration engine. This would be a
+feature of the SoC and so something to not ask the user if it exists, but we
+would want to have our generic framework for such engines be optionally
+available and depend on knowing we have this engine on a given hardware
+platform. Expressing this should be done as a hidden Kconfig symbol that is
+``select``'ed by the SoC symbol which would in turn be ``select``'ed by the
+board option, which is user visible. Hardware features that are either present
+or not present should be expressed in Kconfig and in a similar manner, features
+which will always have a constant value such as "this SoC always has 4 cores and
+4 threads per core" should be as well.
+
+This brings us to differentiating between a configuration *setting* versus a
+hardware feature. To build on the previous example, while we may know the number
+of cores and threads, it's possible that within a given family of SoCs the base
+addresses of peripherals has changed, but the register offsets within have not.
+The preference in this case is to get our information from the device tree and
+perform run time configuration. However, this is not always practical and in
+those cases we instead rely on the ``CFG`` mechanism. While it would be possible
+to use Kconfig in this case, it would result in using calculated rather than
+constructed values, resulting in less clear code. Consider the example of a set
+of register values for a memory controller. Defining this as a series of logical
+ORs and shifts based on other defines is more clear than the Kconfig entry that
+sets the calculated value alone.
+
+When it has been determined that the practical solution is to utilize the
+``CFG`` mechanism, the next decision is where to place these settings. It is
+strongly encouraged to place these in the architecture header files, if they are
+generic to a given SoC, or under the board directory if board specific. Placing
+them under the board.h file in the *include/configs/* directory should be seen
+as a last resort.
diff --git a/doc/develop/testing.rst b/doc/develop/testing.rst
new file mode 100644
index 00000000000..9114d11ad26
--- /dev/null
+++ b/doc/develop/testing.rst
@@ -0,0 +1,132 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Introduction to testing
+=======================
+
+U-Boot has a large amount of code. This file describes how this code is
+tested and what tests you should write when adding a new feature.
+
+
+Running tests
+-------------
+
+To run most tests on sandbox, type this::
+
+    make check
+
+in the U-Boot directory. Note that only the pytest suite is run using this
+command.
+
+Some tests take ages to run and are marked with @pytest.mark.slow. To run just
+the quick ones, type this::
+
+    make qcheck
+
+It is also possible to run just the tests for tools (patman, binman, etc.).
+Such tests are included with those tools, i.e. no actual U-Boot unit tests are
+run. Type this::
+
+    make tcheck
+
+You can also run a selection tests in parallel with::
+
+    make pcheck
+
+All of the above use the test/run script with a paremeter to select which tests
+are run. See :doc:`py_testing` for more information.
+
+
+Sandbox
+-------
+U-Boot can be built as a user-space application (e.g. for Linux). This
+allows test to be executed without needing target hardware. The 'sandbox'
+target provides this feature and it is widely used in tests.
+
+See :doc:`tests_sandbox` for more information.
+
+Pytest Suite
+------------
+
+Many tests are available using the pytest suite, in test/py. This can run
+either on sandbox or on real hardware. It relies on the U-Boot console to
+inject test commands and check the result. It is slower to run than C code,
+but provides the ability to unify lots of tests and summarise their results.
+
+You can run the tests on sandbox with::
+
+   ./test/py/test.py --bd sandbox --build
+
+This will produce HTML output in build-sandbox/test-log.html
+
+Some tests run with other versions of sandbox. For example sandbox_flattree
+runs the tests with livetree (the hierachical devicetree) disabled. You can
+also select particular tests with -k::
+
+   ./test/py/test.py --bd sandbox_flattree --build -k hello
+
+There are some special tests that run in SPL. For this you need the sandbox_spl
+build::
+
+   ./test/py/test.py --bd sandbox_spl --build -k test_spl
+
+See :doc:`py_testing` for more information about the pytest suite.
+
+See :doc:`tests_sandbox` for how to run tests directly (not through pytest).
+
+
+tbot
+----
+
+Tbot provides a way to execute tests on target hardware. It is intended for
+trying out both U-Boot and Linux (and potentially other software) on a
+number of boards automatically. It can be used to create a continuous test
+environment. See http://www.tbot.tools for more information.
+
+
+Ad-hoc tests
+------------
+
+There are several ad-hoc tests which run outside the pytest environment:
+
+test/fs
+   File system test (shell script)
+test/image
+   FIT and legacy image tests (shell script and Python)
+test/stdint
+   A test that stdint.h can be used in U-Boot (shell script)
+trace
+   Test for the tracing feature (shell script)
+
+TODO: Move these into pytest.
+
+
+When to write tests
+-------------------
+
+If you add code to U-Boot without a test you are taking a risk. Even if you
+perform thorough manual testing at the time of submission, it may break when
+future changes are made to U-Boot. It may even break when applied to mainline,
+if other changes interact with it. A good mindset is that untested code
+probably doesn't work and should be deleted.
+
+You can assume that the Pytest suite will be run before patches are accepted
+to mainline, so this provides protection against future breakage.
+
+On the other hand there is quite a bit of code that is not covered with tests,
+or is covered sparingly. So here are some suggestions:
+
+- If you are adding a new uclass, add a sandbox driver and a test that uses it
+- If you are modifying code covered by an existing test, add a new test case
+  to cover your changes
+- If the code you are modifying has not tests, consider writing one. Even a
+  very basic test is useful, and may be picked up and enhanced by others. It
+  is much easier to add onto a test - writing a new large test can seem
+  daunting to most contributors.
+
+See :doc:`tests_writing` for how to write tests.
+
+
+Future work
+-----------
+
+Converting existing shell scripts into pytest tests.
diff --git a/doc/develop/tests_sandbox.rst b/doc/develop/tests_sandbox.rst
new file mode 100644
index 00000000000..72923070150
--- /dev/null
+++ b/doc/develop/tests_sandbox.rst
@@ -0,0 +1,302 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Sandbox tests
+=============
+
+Test Design
+-----------
+
+Most uclasses and many functions of U-Boot have sandbox tests. This allows much
+of the code to be checked in an developer-friendly environment.
+
+Sandbox provides a way to write and run unit tests. The traditional approach to
+unit tests is to build lots of little executables, one for each test or
+category of tests. With sandbox, so far as possible, all the tests share a
+small number of executables (e.g. 'u-boot' for sandbox, 'u-boot-spl' and
+'u-boot' for sandbox_spl) and can be run very quickly. The vast majority of
+tests can run on the 'sandbox' build,
+
+Available tests
+---------------
+
+Some of the available tests are:
+
+  - command_ut: Unit tests for command parsing and handling
+  - compression: Unit tests for U-Boot's compression algorithms, useful for
+      security checking. It supports gzip, bzip2, lzma and lzo.
+  - image: Unit tests for images:
+
+     - test/image/test-imagetools.sh - multi-file images
+     - test/py/tests/test-fit.py     - FIT images
+  - tracing: test/trace/test-trace.sh tests the tracing system
+    (see :doc:`trace`).
+  - verified boot: test/py/tests/test_vboot.py
+
+If you change or enhance any U-Boot subsystem, you should write or expand a
+test and include it with your patch series submission. Test coverage in some
+older areas of U-Boot is still somewhat limited and we need to work to improve
+it.
+
+Note that many of these tests are implemented as commands which you can
+run natively on your board if desired (and enabled).
+
+To run all tests, use 'make check'.
+
+
+Running sandbox tests directly
+------------------------------
+
+Typically tests are run using the pytest suite. Running pytests on sandbox is
+easy and always gets things right. For example some tests require files to be
+set up before they can work.
+
+But it is also possible to run some sandbox tests directly. For example, this
+runs the dm_test_gpio() test which you can find in test/dm/gpio.c::
+
+   $ ./u-boot -T -c "ut dm gpio"
+
+
+   U-Boot 2021.01
+
+   Model: sandbox
+   DRAM:  128 MiB
+   WDT:   Started with servicing (60s timeout)
+   MMC:   mmc2: 2 (SD), mmc1: 1 (SD), mmc0: 0 (SD)
+   In:    serial
+   Out:   vidconsole
+   Err:   vidconsole
+   Model: sandbox
+   SCSI:
+   Net:   eth0: eth@10002000, eth5: eth@10003000, eth3: sbe5, eth6: eth@10004000
+   Test: dm_test_gpio: gpio.c
+   Test: dm_test_gpio: gpio.c (flat tree)
+   Failures: 0
+
+The -T option tells the U-Boot sandbox to run with the 'test' devicetree
+(test.dts) instead of -D which selects the normal sandbox.dts - this is
+necessary because many tests rely on nodes or properties in the test devicetree.
+If you try running tests without -T then you may see failures, like::
+
+   $ ./u-boot -c "ut dm gpio"
+
+
+   U-Boot 2021.01
+
+   DRAM:  128 MiB
+   WDT:   Not found!
+   MMC:
+   In:    serial
+   Out:   serial
+   Err:   serial
+   SCSI:
+   Net:   No ethernet found.
+   Please run with test device tree:
+       ./u-boot -d arch/sandbox/dts/test.dtb
+   Test: dm_test_gpio: gpio.c
+   test/dm/gpio.c:37, dm_test_gpio(): 0 == gpio_lookup_name("b4", &dev, &offset, &gpio): Expected 0x0 (0), got 0xffffffea (-22)
+   Test: dm_test_gpio: gpio.c (flat tree)
+   test/dm/gpio.c:37, dm_test_gpio(): 0 == gpio_lookup_name("b4", &dev, &offset, &gpio): Expected 0x0 (0), got 0xffffffea (-22)
+   Failures: 2
+
+The message above should provide a hint if you forget to use the -T flag. Even
+running with -D will produce different results.
+
+You can easily use gdb on these tests, without needing --gdbserver::
+
+   $ gdb --args u-boot -T -c "ut dm gpio"
+   ...
+   (gdb) break dm_test_gpio
+   Breakpoint 1 at 0x1415bd: file test/dm/gpio.c, line 37.
+   (gdb) run -T -c "ut dm gpio"
+   Starting program: u-boot -T -c "ut dm gpio"
+   Test: dm_test_gpio: gpio.c
+
+   Breakpoint 1, dm_test_gpio (uts=0x5555558029a0 <global_dm_test_state>)
+       at files/test/dm/gpio.c:37
+   37		ut_assertok(gpio_lookup_name("b4", &dev, &offset, &gpio));
+   (gdb)
+
+You can then single-step and look at variables as needed.
+
+
+Running tests multiple times
+----------------------------
+
+Some tests can have race conditions which are hard to detect on a single
+one. It is possible to run each individual test multiple times, before moving
+to the next test, with the '-r' flag.
+
+This is most useful when running a single test, since running all tests
+multiple times can take a while.
+
+For example::
+
+   => ut dm -r1000 dm_test_rtc_set_get
+   ...
+   Test: dm_test_rtc_set_get: rtc.c (flat tree)
+   Test: dm_test_rtc_set_get: rtc.c
+   test/dm/rtc.c:257, dm_test_rtc_reset(): old_base_time == base_time: Expected 0x62e7453c (1659323708), got 0x62e7453d (1659323709)
+   Test: dm_test_rtc_set_get: rtc.c (flat tree)
+   Test: dm_test_rtc_set_get: rtc.c
+   Test: dm_test_rtc_set_get: rtc.c (flat tree)
+   ...
+   Test dm_test_rtc_reset failed 3 times
+
+
+Isolating a test that breaks another
+------------------------------------
+
+When running unit tests, some may have side effects which cause a subsequent
+test to break. This can sometimes be seen when using 'ut dm' or similar.
+
+You can use the `-I` argument to the `ut` command to isolate this problem.
+First use `ut info` to see how many tests there are, then use a binary search to
+home in on the problem. Note that you might need to restart U-Boot after each
+iteration, so the `-c` argument to U-Boot is useful.
+
+For example, let's stay that dm_test_host() is failing::
+
+   => ut dm
+   ...
+   Test: dm_test_get_stats: core.c
+   Test: dm_test_get_stats: core.c (flat tree)
+   Test: dm_test_host: host.c
+   test/dm/host.c:71, dm_test_host(): 0 == ut_check_delta(mem_start): Expected 0x0 (0), got 0xffffcbb0 (-13392)
+   Test: dm_test_host: host.c (flat tree)
+   Test <NULL> failed 1 times
+   Test: dm_test_host_dup: host.c
+   Test: dm_test_host_dup: host.c (flat tree)
+   ...
+
+You can then tell U-Boot to run the failing test at different points in the
+sequence:
+
+   => ut info
+   Test suites: 21
+   Total tests: 645
+
+::
+
+   $ ./u-boot -T -c "ut dm -I300:dm_test_host"
+   ...
+   Test: dm_test_pinctrl_single: pinmux.c (flat tree)
+   Test: dm_test_host: host.c
+   test/dm/host.c:71, dm_test_host(): 0 == ut_check_delta(mem_start): Expected 0x0 (0), got 0xfffffdb0 (-592)
+   Test: dm_test_host: host.c (flat tree)
+   Test dm_test_host failed 1 times (position 300)
+   Failures: 4
+
+So it happened before position 300. Trying 150 shows it failing, so we try 75::
+
+   $ ./u-boot  -T  -c "ut dm -I75:dm_test_host"
+   ...
+   Test: dm_test_autoprobe: core.c
+   Test: dm_test_autoprobe: core.c (flat tree)
+   Test: dm_test_host: host.c
+   Test: dm_test_host: host.c (flat tree)
+   Failures: 0
+
+That succeeds, so we try 120, etc. until eventually we can figure out that the
+problem first happens at position 82.
+
+   $ ./u-boot  -T  -c "ut dm -I82:dm_test_host"
+   ...
+   Test: dm_test_blk_flags: blk.c
+   Test: dm_test_blk_flags: blk.c (flat tree)
+   Test: dm_test_host: host.c
+   test/dm/host.c:71, dm_test_host(): 0 == ut_check_delta(mem_start): Expected 0x0 (0), got 0xffffc960 (-13984)
+   Test: dm_test_host: host.c (flat tree)
+   Test dm_test_host failed 1 times (position 82)
+   Failures: 1
+
+From this we can deduce that `dm_test_blk_flags()` causes the problem with
+`dm_test_host()`.
+
+Running sandbox_spl tests directly
+----------------------------------
+
+SPL is the phase before U-Boot proper. It is present in the sandbox_spl build,
+so you can run SPL like this::
+
+   ./spl/u-boot-spl
+
+SPL tests are special in that they run (only in the SPL phase, of course) if the
+-u flag is given::
+
+   ./spl/u-boot-spl -u
+
+   U-Boot SPL 2021.01-00723-g43c77b51be5-dirty (Jan 24 2021 - 16:38:24 -0700)
+   Running 5 driver model tests
+   Test: dm_test_of_plat_base: of_platdata.c (flat tree)
+   Test: dm_test_of_plat_dev: of_platdata.c (flat tree)
+   Test: dm_test_of_plat_parent: of_platdata.c (flat tree)
+   Test: dm_test_of_plat_phandle: of_platdata.c (flat tree)
+   Test: dm_test_of_plat_props: of_platdata.c (flat tree)
+   Failures: 0
+
+
+   U-Boot 2021.01-00723-g43c77b51be5-dirty (Jan 24 2021 - 16:38:24 -0700)
+
+   DRAM:  128 MiB
+   ...
+
+It is not possible to run SPL tests in U-Boot proper, firstly because they are
+not built into U-Boot proper and secondly because the environment is very
+different, e.g. some SPL tests rely on of-platdata which is only available in
+SPL.
+
+Note that after running, SPL continues to boot into U-Boot proper. You can add
+'-c exit' to make U-Boot quit without doing anything further. It is not
+currently possible to run SPL tests and then stop, since the pytests require
+that U-Boot produces the expected banner.
+
+You can use the -k flag to select which tests run::
+
+   ./spl/u-boot-spl -u -k dm_test_of_plat_parent
+
+Of course you can use gdb with sandbox_spl, just as with sandbox.
+
+
+Running all tests directly
+--------------------------
+
+A fast way to run all sandbox tests is::
+
+   ./u-boot -T -c "ut all"
+
+It typically runs single-thread in 6 seconds on 2021 hardware, with 2s of that
+to the delays in the time test.
+
+This should not be considered a substitute for 'make check', but can be helpful
+for git bisect, etc.
+
+
+What tests are built in?
+------------------------
+
+Whatever sandbox build is used, which tests are present is determined by which
+source files are built. For sandbox_spl, the of_platdata tests are built
+because of the build rule in test/dm/Makefile::
+
+   ifeq ($(CONFIG_SPL_BUILD),y)
+   obj-$(CONFIG_SPL_OF_PLATDATA) += of_platdata.o
+   else
+   ...other tests for non-spl
+   endif
+
+You can get a list of tests in a U-Boot ELF file by looking for the
+linker_list::
+
+   $ nm /tmp/b/sandbox_spl/spl/u-boot-spl |grep 2_dm_test
+   000000000001f200 D _u_boot_list_2_dm_test_2_dm_test_of_plat_base
+   000000000001f220 D _u_boot_list_2_dm_test_2_dm_test_of_plat_dev
+   000000000001f240 D _u_boot_list_2_dm_test_2_dm_test_of_plat_parent
+   000000000001f260 D _u_boot_list_2_dm_test_2_dm_test_of_plat_phandle
+   000000000001f280 D _u_boot_list_2_dm_test_2_dm_test_of_plat_props
+
+
+Writing tests
+-------------
+
+See :doc:`tests_writing` for how to write new tests.
+
diff --git a/doc/develop/tests_writing.rst b/doc/develop/tests_writing.rst
new file mode 100644
index 00000000000..44b544fa78b
--- /dev/null
+++ b/doc/develop/tests_writing.rst
@@ -0,0 +1,372 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2021 Google LLC
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+
+Writing Tests
+=============
+
+This describes how to write tests in U-Boot and describes the possible options.
+
+Test types
+----------
+
+There are two basic types of test in U-Boot:
+
+  - Python tests, in test/py/tests
+  - C tests, in test/ and its subdirectories
+
+(there are also UEFI tests in lib/efi_selftest/ not considered here.)
+
+Python tests talk to U-Boot via the command line. They support both sandbox and
+real hardware. They typically do not require building test code into U-Boot
+itself. They are fairly slow to run, due to the command-line interface and there
+being two separate processes. Python tests are fairly easy to write. They can
+be a little tricky to debug sometimes due to the voluminous output of pytest.
+
+C tests are written directly in U-Boot. While they can be used on boards, they
+are more commonly used with sandbox, as they obviously add to U-Boot code size.
+C tests are easy to write so long as the required facilities exist. Where they
+do not it can involve refactoring or adding new features to sandbox. They are
+fast to run and easy to debug.
+
+Regardless of which test type is used, all tests are collected and run by the
+pytest framework, so there is typically no need to run them separately. This
+means that C tests can be used when it makes sense, and Python tests when it
+doesn't.
+
+
+This table shows how to decide whether to write a C or Python test:
+
+=====================  ===========================  =============================
+Attribute              C test                       Python test
+=====================  ===========================  =============================
+Fast to run?           Yes                          No (two separate processes)
+Easy to write?         Yes, if required test        Yes
+                       features exist in sandbox
+                       or the target system
+Needs code in U-Boot?  Yes                          No, provided the test can be
+                                                    executed and the result
+                                                    determined using the command
+                                                    line
+Easy to debug?         Yes                          No, since access to the U-Boot
+                                                    state is not available and the
+                                                    amount of output can
+                                                    sometimes require a bit of
+                                                    digging
+Can use gdb?           Yes, directly                Yes, with --gdbserver
+Can run on boards?     Some can, but only if        Some
+                       compiled in and not
+                       dependent on sandboxau
+=====================  ===========================  =============================
+
+
+Python or C
+-----------
+
+Typically in U-Boot we encourage C test using sandbox for all features. This
+allows fast testing, easy development and allows contributors to make changes
+without needing dozens of boards to test with.
+
+When a test requires setup or interaction with the running host (such as to
+generate images and then running U-Boot to check that they can be loaded), or
+cannot be run on sandbox, Python tests should be used. These should typically
+NOT rely on running with sandbox, but instead should function correctly on any
+board supported by U-Boot.
+
+
+Mixing Python and C
+-------------------
+
+The best of both worlds is sometimes to have a Python test set things up and
+perform some operations, with a 'checker' C unit test doing the checks
+afterwards. This can be achieved with these steps:
+
+- Add the `UT_TESTF_MANUAL` flag to the checker test so that the `ut` command
+  does not run it by default
+- Add a `_norun` suffix to the name so that pytest knows to skip it too
+
+In your Python test use the `-f` flag to the `ut` command to force the checker
+test to run it, e.g.::
+
+   # Do the Python part
+   host load ...
+   bootm ...
+
+   # Run the checker to make sure that everything worked
+   ut -f bootstd vbe_test_fixup_norun
+
+Note that apart from the `UT_TESTF_MANUAL` flag, the code in a 'manual' C test
+is just like any other C test. It still uses ut_assert...() and other such
+constructs, in this case to check that the expected things happened in the
+Python test.
+
+
+How slow are Python tests?
+--------------------------
+
+Under the hood, when running on sandbox, Python tests work by starting a sandbox
+test and connecting to it via a pipe. Each interaction with the U-Boot process
+requires at least a context switch to handle the pipe interaction. The test
+sends a command to U-Boot, which then reacts and shows some output, then the
+test sees that and continues. Of course on real hardware, communications delays
+(e.g. with a serial console) make this slower.
+
+For comparison, consider a test that checks the 'md' (memory dump). All times
+below are approximate, as measured on an AMD 2950X system. Here is is the test
+in Python::
+
+   @pytest.mark.buildconfigspec('cmd_memory')
+   def test_md(u_boot_console):
+       """Test that md reads memory as expected, and that memory can be modified
+       using the mw command."""
+
+       ram_base = u_boot_utils.find_ram_base(u_boot_console)
+       addr = '%08x' % ram_base
+       val = 'a5f09876'
+       expected_response = addr + ': ' + val
+       u_boot_console.run_command('mw ' + addr + ' 0 10')
+       response = u_boot_console.run_command('md ' + addr + ' 10')
+       assert(not (expected_response in response))
+       u_boot_console.run_command('mw ' + addr + ' ' + val)
+       response = u_boot_console.run_command('md ' + addr + ' 10')
+       assert(expected_response in response)
+
+This runs a few commands and checks the output. Note that it runs a command,
+waits for the response and then checks it agains what is expected. If run by
+itself it takes around 800ms, including test collection. For 1000 runs it takes
+19 seconds, or 19ms per run. Of course 1000 runs it not that useful since we
+only want to run it once.
+
+There is no exactly equivalent C test, but here is a similar one that tests 'ms'
+(memory search)::
+
+   /* Test 'ms' command with bytes */
+   static int mem_test_ms_b(struct unit_test_state *uts)
+   {
+      u8 *buf;
+
+      buf = map_sysmem(0, BUF_SIZE + 1);
+      memset(buf, '\0', BUF_SIZE);
+      buf[0x0] = 0x12;
+      buf[0x31] = 0x12;
+      buf[0xff] = 0x12;
+      buf[0x100] = 0x12;
+      ut_assertok(console_record_reset_enable());
+      run_command("ms.b 1 ff 12", 0);
+      ut_assert_nextline("00000030: 00 12 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................");
+      ut_assert_nextline("--");
+      ut_assert_nextline("000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 12    ................");
+      ut_assert_nextline("2 matches");
+      ut_assert_console_end();
+
+      ut_asserteq(2, env_get_hex("memmatches", 0));
+      ut_asserteq(0xff, env_get_hex("memaddr", 0));
+      ut_asserteq(0xfe, env_get_hex("mempos", 0));
+
+      unmap_sysmem(buf);
+
+      return 0;
+   }
+   MEM_TEST(mem_test_ms_b, UT_TESTF_CONSOLE_REC);
+
+This runs the command directly in U-Boot, then checks the console output, also
+directly in U-Boot. If run by itself this takes 100ms. For 1000 runs it takes
+660ms, or 0.66ms per run.
+
+So overall running a C test is perhaps 8 times faster individually and the
+interactions are perhaps 25 times faster.
+
+It should also be noted that the C test is fairly easy to debug. You can set a
+breakpoint on do_mem_search(), which is what implements the 'ms' command,
+single step to see what might be wrong, etc. That is also possible with the
+pytest, but requires two terminals and --gdbserver.
+
+
+Why does speed matter?
+----------------------
+
+Many development activities rely on running tests:
+
+  - 'git bisect run make qcheck' can be used to find a failing commit
+  - test-driven development relies on quick iteration of build/test
+  - U-Boot's continuous integration (CI) systems make use of tests. Running
+      all sandbox tests typically takes 90 seconds and running each qemu test
+      takes about 30 seconds. This is currently dwarfed by the time taken to
+      build all boards
+
+As U-Boot continues to grow its feature set, fast and reliable tests are a
+critical factor factor in developer productivity and happiness.
+
+
+Writing C tests
+---------------
+
+C tests are arranged into suites which are typically executed by the 'ut'
+command. Each suite is in its own file. This section describes how to accomplish
+some common test tasks.
+
+(there are also UEFI C tests in lib/efi_selftest/ not considered here.)
+
+Add a new driver model test
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Use this when adding a test for a new or existing uclass, adding new operations
+or features to a uclass, adding new ofnode or dev_read_() functions, or anything
+else related to driver model.
+
+Find a suitable place for your test, perhaps near other test functions in
+existing code, or in a new file. Each uclass should have its own test file.
+
+Declare the test with::
+
+   /* Test that ... */
+   static int dm_test_uclassname_what(struct unit_test_state *uts)
+   {
+      /* test code here */
+
+      return 0;
+   }
+   DM_TEST(dm_test_uclassname_what, UT_TESTF_SCAN_FDT);
+
+Replace 'uclassname' with the name of your uclass, if applicable. Replace 'what'
+with what you are testing.
+
+The flags for DM_TEST() are defined in test/test.h and you typically want
+UT_TESTF_SCAN_FDT so that the devicetree is scanned and all devices are bound
+and ready for use. The DM_TEST macro adds UT_TESTF_DM automatically so that
+the test runner knows it is a driver model test.
+
+Driver model tests are special in that the entire driver model state is
+recreated anew for each test. This ensures that if a previous test deletes a
+device, for example, it does not affect subsequent tests. Driver model tests
+also run both with livetree and flattree, to ensure that both devicetree
+implementations work as expected.
+
+Example commit: c48cb7ebfb4 ("sandbox: add ADC unit tests") [1]
+
+[1] https://gitlab.denx.de/u-boot/u-boot/-/commit/c48cb7ebfb4
+
+
+Add a C test to an existing suite
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Use this when you are adding to or modifying an existing feature outside driver
+model. An example is bloblist.
+
+Add a new function in the same file as the rest of the suite and register it
+with the suite. For example, to add a new mem_search test::
+
+   /* Test 'ms' command with 32-bit values */
+   static int mem_test_ms_new_thing(struct unit_test_state *uts)
+   {
+         /* test code here*/
+
+         return 0;
+   }
+   MEM_TEST(mem_test_ms_new_thing, UT_TESTF_CONSOLE_REC);
+
+Note that the MEM_TEST() macros is defined at the top of the file.
+
+Example commit: 9fe064646d2 ("bloblist: Support relocating to a larger space") [1]
+
+[1] https://gitlab.denx.de/u-boot/u-boot/-/commit/9fe064646d2
+
+
+Add a new test suite
+~~~~~~~~~~~~~~~~~~~~
+
+Each suite should focus on one feature or subsystem, so if you are writing a
+new one of those, you should add a new suite.
+
+Create a new file in test/ or a subdirectory and define a macro to register the
+suite. For example::
+
+   #include <console.h>
+   #include <mapmem.h>
+   #include <dm/test.h>
+   #include <test/ut.h>
+
+   /* Declare a new wibble test */
+   #define WIBBLE_TEST(_name, _flags)   UNIT_TEST(_name, _flags, wibble_test)
+
+   /* Tetss go here */
+
+   /* At the bottom of the file: */
+
+   int do_ut_wibble(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+   {
+     struct unit_test *tests = UNIT_TEST_SUITE_START(wibble_test);
+     const int n_ents = UNIT_TEST_SUITE_COUNT(wibble_test);
+
+     return cmd_ut_category("cmd_wibble", "wibble_test_", tests, n_ents, argc, argv);
+   }
+
+Then add new tests to it as above.
+
+Register this new suite in test/cmd_ut.c by adding to cmd_ut_sub[]::
+
+  /* Within cmd_ut_sub[]... */
+
+  U_BOOT_CMD_MKENT(wibble, CONFIG_SYS_MAXARGS, 1, do_ut_wibble, "", ""),
+
+and adding new help to ut_help_text[]::
+
+  "ut wibble - Test the wibble feature\n"
+
+If your feature is conditional on a particular Kconfig, then you can use #ifdef
+to control that.
+
+Finally, add the test to the build by adding to the Makefile in the same
+directory::
+
+  obj-$(CONFIG_$(SPL_)CMDLINE) += wibble.o
+
+Note that CMDLINE is never enabled in SPL, so this test will only be present in
+U-Boot proper. See below for how to do SPL tests.
+
+As before, you can add an extra Kconfig check if needed::
+
+  ifneq ($(CONFIG_$(SPL_)WIBBLE),)
+  obj-$(CONFIG_$(SPL_)CMDLINE) += wibble.o
+  endif
+
+
+Example commit: 919e7a8fb64 ("test: Add a simple test for bloblist") [1]
+
+[1] https://gitlab.denx.de/u-boot/u-boot/-/commit/919e7a8fb64
+
+
+Making the test run from pytest
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+All C tests must run from pytest. Typically this is automatic, since pytest
+scans the U-Boot executable for available tests to run. So long as you have a
+'ut' subcommand for your test suite, it will run. The same applies for driver
+model tests since they use the 'ut dm' subcommand.
+
+See test/py/tests/test_ut.py for how unit tests are run.
+
+
+Add a C test for SPL
+~~~~~~~~~~~~~~~~~~~~
+
+Note: C tests are only available for sandbox_spl at present. There is currently
+no mechanism in other boards to existing SPL tests even if they are built into
+the image.
+
+SPL tests cannot be run from the 'ut' command since there are no commands
+available in SPL. Instead, sandbox (only) calls ut_run_list() on start-up, when
+the -u flag is given. This runs the available unit tests, no matter what suite
+they are in.
+
+To create a new SPL test, follow the same rules as above, either adding to an
+existing suite or creating a new one.
+
+An example SPL test is spl_test_load().
+
+
+Writing Python tests
+--------------------
+
+See :doc:`py_testing` for brief notes how to write Python tests. You
+should be able to use the existing tests in test/py/tests as examples.
diff --git a/doc/develop/trace.rst b/doc/develop/trace.rst
new file mode 100644
index 00000000000..546862020b1
--- /dev/null
+++ b/doc/develop/trace.rst
@@ -0,0 +1,503 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2013 The Chromium OS Authors.
+
+Tracing in U-Boot
+=================
+
+U-Boot supports a simple tracing feature which allows a record of execution
+to be collected and sent to a host machine for analysis. At present the
+main use for this is to profile boot time.
+
+
+Overview
+--------
+
+The trace feature uses GCC's instrument-functions feature to trace all
+function entry/exit points. These are then recorded in a memory buffer.
+The memory buffer can be saved to the host over a network link using
+tftpput or by writing to an attached storage device such as MMC.
+
+On the host, the file is first converted with a tool called 'proftool',
+which extracts useful information from it. The resulting trace output
+resembles that emitted by Linux's ftrace feature, so can be visually
+displayed by kernelshark (see kernelshark_) and used with
+'trace-cmd report' (see trace_cmd_).
+
+It is also possible to produce a flame graph for use with flamegraph.pl
+(see flamegraph_pl_).
+
+
+Quick-start using Sandbox
+-------------------------
+
+Sandbox is a build of U-Boot that can run under Linux so it is a convenient
+way of trying out tracing before you use it on your actual board. To do
+this, follow these steps:
+
+Add the following to `config/sandbox_defconfig`:
+
+.. code-block:: c
+
+    CONFIG_TRACE=y
+
+Build sandbox U-Boot with tracing enabled:
+
+.. code-block:: console
+
+    $ make FTRACE=1 O=sandbox sandbox_config
+    $ make FTRACE=1 O=sandbox
+
+Run sandbox, wait for a bit of trace information to appear, and then capture
+a trace:
+
+.. code-block:: console
+
+    $ ./sandbox/u-boot
+
+    U-Boot 2013.04-rc2-00100-ga72fcef (Apr 17 2013 - 19:25:24)
+
+    DRAM:  128 MiB
+    trace: enabled
+    Using default environment
+
+    In:    serial
+    Out:   serial
+    Err:   serial
+    =>trace stats
+        671,406 function sites
+         69,712 function calls
+              0 untracked function calls
+         73,373 traced function calls
+             16 maximum observed call depth
+             15 call depth limit
+         66,491 calls not traced due to depth
+    =>trace stats
+        671,406 function sites
+      1,279,450 function calls
+              0 untracked function calls
+        950,490 traced function calls (333217 dropped due to overflow)
+             16 maximum observed call depth
+             15 call depth limit
+          1,275,767 calls not traced due to depth
+    =>trace calls 1000000 e00000
+    Call list dumped to 00000000, size 0xae0a40
+    =>print
+    baudrate=115200
+    profbase=0
+    profoffset=ae0a40
+    profsize=e00000
+    stderr=serial
+    stdin=serial
+    stdout=serial
+
+    Environment size: 117/8188 bytes
+    =>host save hostfs - 1000000 trace ${profoffset}
+    11405888 bytes written in 10 ms (1.1 GiB/s)
+    =>reset
+
+
+Then run proftool to convert the trace information to ftrace format
+
+.. code-block:: console
+
+    $ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-ftrace -o trace.dat
+
+Finally run kernelshark to display it (note it only works with `.dat` files!):
+
+.. code-block:: console
+
+    $ kernelshark trace.dat
+
+Using this tool you can view the trace records and see the timestamp for each
+function.
+
+.. image:: pics/kernelshark.png
+  :width: 800
+  :alt: Kernelshark showing function-trace records
+
+
+To see the records on the console, use trace-cmd:
+
+.. code-block:: console
+
+    $ trace-cmd report trace.dat | less
+    cpus=1
+          u-boot-1     [000]     3.116364: function:             initf_malloc
+          u-boot-1     [000]     3.116375: function:             initf_malloc
+          u-boot-1     [000]     3.116386: function:             initf_bootstage
+          u-boot-1     [000]     3.116396: function:                bootstage_init
+          u-boot-1     [000]     3.116408: function:                   malloc
+          u-boot-1     [000]     3.116418: function:                      malloc_simple
+          u-boot-1     [000]     3.116429: function:                         alloc_simple
+          u-boot-1     [000]     3.116441: function:                         alloc_simple
+          u-boot-1     [000]     3.116449: function:                      malloc_simple
+          u-boot-1     [000]     3.116457: function:                   malloc
+
+Note that `pytimechart` is obsolete so cannot be used anymore.
+
+There is a -f option available to select a function graph:
+
+.. code-block:: console
+
+    $ ./sandbox/tools/proftool -m sandbox/System.map -t trace -f funcgraph dump-ftrace -o trace.dat
+
+Again, you can use kernelshark or trace-cmd to look at the output. In this case
+you will see the time taken by each function shown against its exit record.
+
+.. image:: pics/kernelshark_fg.png
+  :width: 800
+  :alt: Kernelshark showing function-graph records
+
+.. code-block:: console
+
+    $ trace-cmd report trace.dat | less
+    cpus=1
+              u-boot-1     [000]     3.116364: funcgraph_entry:        0.011 us   |    initf_malloc();
+              u-boot-1     [000]     3.116386: funcgraph_entry:                   |    initf_bootstage() {
+              u-boot-1     [000]     3.116396: funcgraph_entry:                   |      bootstage_init() {
+              u-boot-1     [000]     3.116408: funcgraph_entry:                   |        malloc() {
+              u-boot-1     [000]     3.116418: funcgraph_entry:                   |          malloc_simple() {
+              u-boot-1     [000]     3.116429: funcgraph_entry:        0.012 us   |            alloc_simple();
+              u-boot-1     [000]     3.116449: funcgraph_exit:         0.031 us   |            }
+              u-boot-1     [000]     3.116457: funcgraph_exit:         0.049 us   |          }
+              u-boot-1     [000]     3.116466: funcgraph_entry:        0.063 us   |        memset();
+              u-boot-1     [000]     3.116539: funcgraph_exit:         0.143 us   |        }
+
+Flame graph
+-----------
+
+Some simple flame graph options are available as well, using the dump-flamegraph
+command:
+
+.. code-block:: console
+
+    $ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-flamegraph -o trace.fg
+    $ flamegraph.pl trace.fg >trace.svg
+
+You can load the .svg file into a viewer. If you use Chrome (and some other
+programs) you can click around and zoom in and out.
+
+.. image:: pics/flamegraph.png
+  :width: 800
+  :alt: Chrome showing the flamegraph.pl output
+
+.. image:: pics/flamegraph_zoom.png
+  :width: 800
+  :alt: Chrome showing zooming into the flamegraph.pl output
+
+
+A timing variant is also available, which gives an idea of how much time is
+spend in each call stack:
+
+.. code-block:: console
+
+    $ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-flamegraph -f timing -o trace.fg
+    $ flamegraph.pl trace.fg >trace.svg
+
+Note that trace collection does slow down execution so the timings will be
+inflated. They should be used to guide optimisation. For accurate boot timings,
+use bootstage.
+
+.. image:: pics/flamegraph_timing.png
+  :width: 800
+  :alt: Chrome showing flamegraph.pl output with timing
+
+CONFIG Options
+--------------
+
+CONFIG_TRACE
+    Enables the trace feature in U-Boot.
+
+CONFIG_CMD_TRACE
+    Enables the trace command.
+
+CONFIG_TRACE_BUFFER_SIZE
+    Size of trace buffer to allocate for U-Boot. This buffer is
+    used after relocation, as a place to put function tracing
+    information. The address of the buffer is determined by
+    the relocation code.
+
+CONFIG_TRACE_EARLY
+    Define this to start tracing early, before relocation.
+
+CONFIG_TRACE_EARLY_SIZE
+    Size of 'early' trace buffer. Before U-Boot has relocated
+    it doesn't have a proper trace buffer. On many boards
+    you can define an area of memory to use for the trace
+    buffer until the 'real' trace buffer is available after
+    relocation. The contents of this buffer are then copied to
+    the real buffer.
+
+CONFIG_TRACE_EARLY_ADDR
+    Address of early trace buffer
+
+CONFIG_TRACE_CALL_DEPTH_LIMIT
+    Sets the limit on trace call-depth. For a broad view, 10 is typically
+    sufficient. Setting this too large creates enormous traces and distorts
+    the overall timing considerable.
+
+
+Building U-Boot with Tracing Enabled
+------------------------------------
+
+Pass 'FTRACE=1' to the U-Boot Makefile to actually instrument the code.
+This is kept as a separate option so that it is easy to enable/disable
+instrumenting from the command line instead of having to change board
+config files.
+
+
+Board requirements
+------------------
+
+Trace data collection relies on a microsecond timer, accessed through
+`timer_get_us()`. So the first thing you should do is make sure that
+this produces sensible results for your board. Suitable sources for
+this timer include high resolution timers, PWMs or profile timers if
+available. Most modern SOCs have a suitable timer for this.
+
+See `add_ftrace()` for where `timer_get_us()` is called. The `notrace`
+attribute must be used on each function called by `timer_get_us()` since
+recursive calls to `add_ftrace()` will cause a fault::
+
+   trace: recursion detected, disabling
+
+You cannot use driver model to obtain the microsecond timer, since tracing
+may be enabled before driver model is set up. Instead, provide a low-level
+function which accesses the timer, setting it up if needed.
+
+
+Collecting Trace Data
+---------------------
+
+When you run U-Boot on your board it will collect trace data up to the
+limit of the trace buffer size you have specified. Once that is exhausted
+no more data will be collected.
+
+Collecting trace data affects execution time and performance. You
+will notice this particularly with trivial functions - the overhead of
+recording their execution may even exceed their normal execution time.
+In practice this doesn't matter much so long as you are aware of the
+effect. Once you have done your optimizations, turn off tracing before
+doing end-to-end timing using bootstage.
+
+The best time to start tracing is right at the beginning of U-Boot. The
+best time to stop tracing is right at the end. In practice it is hard
+to achieve these ideals.
+
+This implementation enables tracing early in `board_init_r()`, or
+`board_init_f()` when `TRACE_EARLY` is enabled. This means
+that it captures most of the board init process, missing only the
+early architecture-specific init. However, it also misses the entire
+SPL stage if there is one. At present tracing is not supported in SPL.
+
+U-Boot typically ends with a 'bootm' command which loads and runs an
+OS. There is useful trace data in the execution of that bootm
+command. Therefore this implementation provides a way to collect trace
+data after bootm has finished processing, but just before it jumps to
+the OS. In practical terms, U-Boot runs the 'fakegocmd' environment
+variable at this point. This variable should have a short script which
+collects the trace data and writes it somewhere.
+
+Controlling the trace
+---------------------
+
+U-Boot provides a command-line interface to the trace system for controlling
+tracing and accessing the trace data. See :doc:`../usage/cmd/trace`.
+
+
+Environment Variables
+---------------------
+
+The following are used:
+
+profbase
+    Base address of trace output buffer
+
+profoffset
+    Offset of first unwritten byte in trace output buffer
+
+profsize
+    Size of trace output buffer
+
+All of these are set by the 'trace calls' command.
+
+These variables keep track of the amount of data written to the trace
+output buffer by the 'trace' command. The trace commands which write data
+to the output buffer can use these to specify the buffer to write to, and
+update profoffset each time. This allows successive commands to append data
+to the same buffer, for example::
+
+    => trace funclist 10000 e00000
+    => trace calls
+
+(the latter command appends more data to the buffer).
+
+
+fakegocmd
+    Specifies commands to run just before booting the OS. This
+    is a useful time to write the trace data to the host for
+    processing.
+
+
+Writing Out Trace Data
+----------------------
+
+Once the trace data is in an output buffer in memory there are various ways
+to transmit it to the host. Notably you can use tftput to send the data
+over a network link::
+
+    fakegocmd=trace pause; usb start; set autoload n; bootp;
+    trace calls 10000000 1000000;
+    tftpput ${profbase} ${profoffset} 192.168.1.4:/tftpboot/calls
+
+This starts up USB (to talk to an attached USB Ethernet dongle), writes
+a trace log to address 10000000 and sends it to a host machine using
+TFTP. After this, U-Boot will boot the OS normally, albeit a little
+later.
+
+For a filesystem you may do something like::
+
+    trace calls 10000000 1000000;
+    save mmc 1:1 10000000 /trace ${profoffset}
+
+The trace buffer format is internal to the trace system. It consists of a
+header, a call count for each function site, followed by a list of trace
+records, once for each function call.
+
+
+Converting Trace Output Data (proftool)
+---------------------------------------
+
+The trace output data is kept in a binary format which is not documented
+here. See the `trace.h` header file if you are interested. To convert it into
+something useful, you can use proftool.
+
+This tool must be given the U-Boot map file and the trace data received
+from running that U-Boot. It produces a binary output file.
+
+It is also possible to provide a configuration file to indicate which functions
+should be included or dropped during conversion. This file consists of lines
+like::
+
+   include-func <regex>
+   exclude-func <regex>
+
+where <regex> is a regular expression matched against function names. It
+allows some functions to be dropped from the trace when producing ftrace
+records.
+
+Options:
+
+-c <config_file>
+    Specify the optional configuration file, to control which functions are
+    included in the output.
+
+-f <format>
+    Specifies the format to use (see below)
+
+-m <map_file>
+    Specify U-Boot map file (`System.map`)
+
+-o <output file>
+    Specify the output filename
+
+-t <trace_file>
+    Specify trace file, the data saved from U-Boot
+
+-v <0-4>
+    Specify the verbosity, where 0 is the minimum and 4 is for debugging.
+
+Commands:
+
+dump-ftrace:
+    Write a binary dump of the file in Linux ftrace format. Two options are
+    available:
+
+    function
+        write function-call records (caller/callee)
+
+    funcgraph
+        write function entry/exit records (graph)
+
+    This format can be used with kernelshark_ and trace_cmd_.
+
+dump-flamegraph
+    Write a list of stack records useful for producing a flame graph. Two
+    options are available:
+
+    calls
+        create a flamegraph of stack frames
+
+    timing
+        create a flamegraph of microseconds for each stack frame
+
+    This format can be used with flamegraph_pl_.
+
+Viewing the Trace Data
+----------------------
+
+You can use kernelshark_ for a GUI, but note that version 2.0.x was broken. If
+you have that version you could try building it from source.
+
+The file must have a .dat extension or it is ignored. The program has terse
+user interface but is very convenient for viewing U-Boot profile information.
+
+Also available is trace_cmd_ which provides a command-line interface.
+
+Workflow Suggestions
+--------------------
+
+The following suggestions may be helpful if you are trying to reduce boot
+time:
+
+1. Enable CONFIG_BOOTSTAGE and CONFIG_BOOTSTAGE_REPORT. This should get
+   you are helpful overall snapshot of the boot time.
+
+2. Build U-Boot with tracing and run it. Note the difference in boot time
+   (it is common for tracing to add 10% to the time)
+
+3. Collect the trace information as described above. Use this to find where
+   all the time is being spent.
+
+4. Take a look at that code and see if you can optimize it. Perhaps it is
+   possible to speed up the initialization of a device, or remove an unused
+   feature.
+
+5. Rebuild, run and collect again. Compare your results.
+
+6. Keep going until you run out of steam, or your boot is fast enough.
+
+
+Configuring Trace
+-----------------
+
+There are a few parameters in the code that you may want to consider.
+There is a function call depth limit (set to 15 by default). When the
+stack depth goes above this then no tracing information is recorded.
+The maximum depth reached is recorded and displayed by the 'trace stats'
+command. While it might be tempting to set the depth limit quite high, this
+can dramatically increase the size of the trace output as well as the execution
+time.
+
+
+Future Work
+-----------
+
+Tracing could be a little tidier in some areas, for example providing
+run-time configuration options for trace.
+
+Some other features that might be useful:
+
+- Trace filter to select which functions are recorded
+- Sample-based profiling using a timer interrupt
+- Better control over trace depth
+- Compression of trace information
+
+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
+.. April 2013
+.. Updated January 2023
+
+.. _kernelshark: https://kernelshark.org/
+.. _trace_cmd: https://www.trace-cmd.org/
+.. _flamegraph_pl: https://github.com/brendangregg/FlameGraph/blob/master/flamegraph.pl
diff --git a/doc/develop/uefi/fwu_updates.rst b/doc/develop/uefi/fwu_updates.rst
new file mode 100644
index 00000000000..51e8a28efe1
--- /dev/null
+++ b/doc/develop/uefi/fwu_updates.rst
@@ -0,0 +1,195 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2022 Linaro Limited
+
+FWU Multi Bank Updates in U-Boot
+================================
+
+The FWU Multi Bank Update feature implements the firmware update
+mechanism described in the PSA Firmware Update for A-profile Arm
+Architecture specification [1]. Certain aspects of the Dependable
+Boot specification [2] are also implemented. The feature provides a
+mechanism to have multiple banks of updatable firmware images and for
+updating the firmware images on the non-booted bank. On a successful
+update, the platform boots from the updated bank on subsequent
+boot. The UEFI capsule-on-disk update feature is used for performing
+the actual updates of the updatable firmware images.
+
+The bookkeeping of the updatable images is done through a structure
+called metadata. Currently, the FWU metadata supports identification
+of images based on image GUIDs stored on a GPT partitioned storage
+media. There are plans to extend the metadata structure for non GPT
+partitioned devices as well.
+
+Accessing the FWU metadata is done through generic API's which are
+defined in a driver which complies with the U-Boot's driver model. A
+new uclass UCLASS_FWU_MDATA has been added for accessing the FWU
+metadata. Individual drivers can be added based on the type of storage
+media, and its partitioning method. Details of the storage device
+containing the FWU metadata partitions are specified through a U-Boot
+specific device tree property `fwu-mdata-store`. Please refer to
+U-Boot :download:`fwu-mdata-gpt.yaml
+</device-tree-bindings/firmware/fwu-mdata-gpt.yaml>`
+for the device tree bindings.
+
+Enabling the FWU Multi Bank Update feature
+------------------------------------------
+
+The feature can be enabled by specifying the following configs::
+
+    CONFIG_EFI_CAPSULE_ON_DISK=y
+    CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT=y
+    CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
+
+    CONFIG_FWU_MULTI_BANK_UPDATE=y
+    CONFIG_FWU_MDATA=y
+    CONFIG_FWU_MDATA_GPT_BLK=y
+    CONFIG_FWU_NUM_BANKS=<val>
+    CONFIG_FWU_NUM_IMAGES_PER_BANK=<val>
+
+    CONFIG_FWU_MDATA_V1=y or CONFIG_FWU_MDATA_V2=y
+
+in the .config file
+
+By enabling the CONFIG_CMD_FWU_METADATA config option, the
+fwu_mdata_read command can be used to check the current state of the
+FWU metadata structure.
+
+The first group of configuration settings enable the UEFI
+capsule-on-disk update functionality. The second group of configs
+enable the FWU Multi Bank Update functionality. Please refer to the
+section :ref:`uefi_capsule_update_ref` for more details on generation
+of the UEFI capsule.
+
+FWU Metadata
+------------
+
+U-Boot supports both versions(1 and 2) of the FWU metadata defined in
+the two revisions of the specification. Support can be enabled for
+either of the two versions through a config flag. The mkfwumdata tool
+can generate metadata for both the supported versions.
+
+Setting up the device for GPT partitioned storage
+-------------------------------------------------
+
+Before enabling the functionality in U-Boot, a GPT partitioned storage
+device is required. Assuming a GPT partitioned storage device, the
+storage media needs to be partitioned with the correct number of
+partitions, given the number of banks and number of images per bank
+that the platform is going to support. Each updatable firmware image
+will be stored on a separate partition. In addition, the two copies
+of the FWU metadata will be stored on two separate partitions. These
+partitions need to be created at the time of the platform's
+provisioning.
+
+As an example, a platform supporting two banks with each bank
+containing three images would need to have 2 * 3 = 6 partitions plus
+the two metadata partitions, or 8 partitions. In addition the storage
+media can have additional partitions of non-updatable images, like the
+EFI System Partition(ESP), a partition for the root file system
+etc. An example list of images on the storage medium would be
+
+* FWU metadata 1
+* U-Boot 1
+* OP-TEE 1
+* FWU metadata 2
+* OP-TEE 2
+* U-Boot 2
+* ESP
+* rootfs
+
+When generating the partitions, a few aspects need to be taken care
+of. Each GPT partition entry in the GPT header has two GUIDs::
+
+* PartitionTypeGUID
+* UniquePartitionGUID
+
+The PartitionTypeGUID value should correspond to the
+``image_type_guid`` field of the FWU metadata. This field is used to
+identify a given type of updatable firmware image, e.g. U-Boot,
+OP-TEE, FIP etc. This GUID should also be used for specifying the
+`--guid` parameter when generating the capsule.
+
+The UniquePartitionGUID value should correspond to the ``image_guid``
+field in the FWU metadata. This GUID is used to identify images of a
+given image type in different banks.
+
+The FWU specification defines the GUID value to be used for the
+metadata partitions. This would be the PartitionTypeGUID for the
+metadata partitions. Similarly, the UEFI specification defines the ESP
+GUID to be be used.
+
+When generating the metadata, the ``image_type_guid`` and the
+``image_guid`` values should match the *PartitionTypeGUID* and the
+*UniquePartitionGUID* values respectively.
+
+Performing the Update
+---------------------
+
+Once the storage media has been partitioned and populated with the
+metadata partitions, the UEFI capsule-on-disk update functionality can
+be used for performing the update. Refer to the section
+:ref:`uefi_capsule_update_ref` for details on how the update can be
+invoked.
+
+On a successful update, the FWU metadata gets updated to reflect the
+bank from which the platform would be booting on subsequent boot.
+
+Based on the value of bit15 of the Flags member of the capsule header,
+the updated images would either be accepted by the U-Boot's UEFI
+implementation, or by the Operating System. If the Operating System is
+accepting the firmware images, it does so by generating an empty
+*accept* capsule. The Operating System can also reject the updated
+firmware by generating a *revert* capsule. The empty capsule can be
+applied by using the exact same procedure used for performing the
+capsule-on-disk update.
+
+The task of accepting the different firmware images, post an update
+may be done by multiple, separate components in the Operating
+System. To help identify the firmware image that is being accepted,
+the accept capsule passes the image GUID of the firmware image being
+accepted. The relevant code in U-Boot then sets the Accept bit of the
+corresponding firmware image for which the accept capsule was
+found. Only when all the firmware components in a bank have been
+accepted does the platform transition from trial state to regular
+state.
+
+The revert capsule on the other hand does not pass any image GUID,
+since reverting any image of the bank has the same result of the
+platform booting from the other bank on subsequent boot.
+
+In the scenario that bit15 of the Flags member of the capsule header
+has not been set, the images being updated are accepted by the
+U-Boot's UEFI firmware implementation by default, on successful
+update of the image.
+
+Generating an empty capsule
+---------------------------
+
+The empty capsule can be generated using the mkeficapsule utility. To
+build the tool, enable::
+
+    CONFIG_TOOLS_MKEFICAPSULE=y
+
+Run the following commands to generate the accept/revert capsules::
+
+.. code-block:: bash
+
+    $ ./tools/mkeficapsule \
+      [--fw-accept --guid <image guid>] | \
+      [--fw-revert] \
+      <capsule_file_name>
+
+Some examples of using the mkeficapsule tool for generation of the
+empty capsule would be::
+
+.. code-block:: bash
+
+    $ ./tools/mkeficapsule --fw-accept --guid <image guid> \
+    <accept_capsule_name>
+    $ ./tools/mkeficapsule --fw-revert <revert_capsule_name>
+
+Links
+-----
+
+* [1] https://developer.arm.com/documentation/den0118/ - FWU Specification
+* [2] https://git.codelinaro.org/linaro/dependable-boot/mbfw/uploads/6f7ddfe3be24e18d4319e108a758d02e/mbfw.pdf - Dependable Boot Specification
diff --git a/doc/develop/uefi/index.rst b/doc/develop/uefi/index.rst
new file mode 100644
index 00000000000..e26b1fbe05c
--- /dev/null
+++ b/doc/develop/uefi/index.rst
@@ -0,0 +1,16 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Unified Extensible Firmware (UEFI)
+==================================
+
+U-Boot provides an implementation of the UEFI API allowing to run UEFI
+compliant software like Linux, GRUB, and iPXE. Furthermore U-Boot itself
+can be run an UEFI payload.
+
+.. toctree::
+   :maxdepth: 2
+
+   uefi.rst
+   u-boot_on_efi.rst
+   iscsi.rst
+   fwu_updates.rst
diff --git a/doc/develop/uefi/iscsi.rst b/doc/develop/uefi/iscsi.rst
new file mode 100644
index 00000000000..51d38cde243
--- /dev/null
+++ b/doc/develop/uefi/iscsi.rst
@@ -0,0 +1,184 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2018 Heinrich Schuchardt
+
+iSCSI booting with U-Boot and iPXE
+==================================
+
+Motivation
+----------
+
+U-Boot has only a reduced set of supported network protocols. The focus for
+network booting has been on UDP based protocols. A TCP stack and HTTP support
+are expected to be integrated in 2018 together with a wget command.
+
+For booting a diskless computer this leaves us with BOOTP or DHCP to get the
+address of a boot script. TFTP or NFS can be used to load the boot script, the
+operating system kernel and the initial file system (initrd).
+
+These protocols are insecure. The client cannot validate the authenticity
+of the contacted servers. And the server cannot verify the identity of the
+client.
+
+Furthermore the services providing the operating system loader or kernel are
+not the ones that the operating system typically will use. Especially in a SAN
+environment this makes updating the operating system a hassle. After installing
+a new kernel version the boot files have to be copied to the TFTP server
+directory.
+
+The HTTPS protocol provides certificate based validation of servers. Sensitive
+data like passwords can be securely transmitted.
+
+The iSCSI protocol is used for connecting storage attached networks. It
+provides mutual authentication using the CHAP protocol. It typically runs on
+a TCP transport.
+
+Thus a better solution than DHCP/TFTP/NFS boot would be to load a boot script
+via HTTPS and to download any other files needed for booting via iSCSI from the
+same target where the operating system is installed.
+
+An alternative to implementing these protocols in U-Boot is to use an existing
+software that can run on top of U-Boot. iPXE[1] is the "swiss army knife" of
+network booting. It supports both HTTPS and iSCSI. It has a scripting engine for
+fine grained control of the boot process and can provide a command shell.
+
+iPXE can be built as an EFI application (named snp.efi) which can be loaded and
+run by U-Boot.
+
+Boot sequence
+-------------
+
+U-Boot loads the EFI application iPXE snp.efi using the bootefi command. This
+application has network access via the simple network protocol offered by
+U-Boot.
+
+iPXE executes its internal script. This script may optionally chain load a
+secondary boot script via HTTPS or open a shell.
+
+For the further boot process iPXE connects to the iSCSI server. This includes
+the mutual authentication using the CHAP protocol. After the authentication iPXE
+has access to the iSCSI targets.
+
+For a selected iSCSI target iPXE sets up a handle with the block IO protocol. It
+uses the ConnectController boot service of U-Boot to request U-Boot to connect a
+file system driver. U-Boot reads from the iSCSI drive via the block IO protocol
+offered by iPXE. It creates the partition handles and installs the simple file
+protocol. Now iPXE can call the simple file protocol to load GRUB[2]. U-Boot
+uses the block IO protocol offered by iPXE to fulfill the request.
+
+Once GRUB is started it uses the same block IO protocol to load Linux. Via
+the EFI stub Linux is called as an EFI application::
+
+                  +--------+         +--------+
+                  |        | Runs    |        |
+                  | U-Boot |========>| iPXE   |
+                  | EFI    |         | snp.efi|
+    +--------+    |        | DHCP    |        |
+    |        |<===|********|<========|        |
+    | DHCP   |    |        | Get IP  |        |
+    | Server |    |        | Address |        |
+    |        |===>|********|========>|        |
+    +--------+    |        | Response|        |
+                  |        |         |        |
+                  |        |         |        |
+    +--------+    |        | HTTPS   |        |
+    |        |<===|********|<========|        |
+    | HTTPS  |    |        | Load    |        |
+    | Server |    |        | Script  |        |
+    |        |===>|********|========>|        |
+    +--------+    |        |         |        |
+                  |        |         |        |
+                  |        |         |        |
+    +--------+    |        | iSCSI   |        |
+    |        |<===|********|<========|        |
+    | iSCSI  |    |        | Auth    |        |
+    | Server |===>|********|========>|        |
+    |        |    |        |         |        |
+    |        |    |        | Loads   |        |
+    |        |<===|********|<========|        |       +--------+
+    |        |    |        | GRUB    |        | Runs  |        |
+    |        |===>|********|========>|        |======>| GRUB   |
+    |        |    |        |         |        |       |        |
+    |        |    |        |         |        |       |        |
+    |        |    |        |         |        | Loads |        |
+    |        |<===|********|<========|********|<======|        |      +--------+
+    |        |    |        |         |        | Linux |        | Runs |        |
+    |        |===>|********|========>|********|======>|        |=====>| Linux  |
+    |        |    |        |         |        |       |        |      |        |
+    +--------+    +--------+         +--------+       +--------+      |        |
+                                                                      |        |
+                                                                      |        |
+                                                                      | ~ ~ ~ ~|
+
+Security
+--------
+
+The iSCSI protocol is not encrypted. The traffic could be secured using IPsec
+but neither U-Boot nor iPXE does support this. So we should at least separate
+the iSCSI traffic from all other network traffic. This can be achieved using a
+virtual local area network (VLAN).
+
+Configuration
+-------------
+
+iPXE
+~~~~
+
+For running iPXE on arm64 the bin-arm64-efi/snp.efi build target is needed::
+
+    git clone http://git.ipxe.org/ipxe.git
+    cd ipxe/src
+    make bin-arm64-efi/snp.efi -j6 EMBED=myscript.ipxe
+
+The available commands for the boot script are documented at:
+
+http://ipxe.org/cmd
+
+Credentials are managed as environment variables. These are described here:
+
+http://ipxe.org/cfg
+
+iPXE by default will put the CPU to rest when waiting for input. U-Boot does
+not wake it up due to missing interrupt support. To avoid this behavior create
+file src/config/local/nap.h:
+
+.. code-block:: c
+
+    /* nap.h */
+    #undef NAP_EFIX86
+    #undef NAP_EFIARM
+    #define NAP_NULL
+
+The supported commands in iPXE are controlled by an include, too. Putting the
+following into src/config/local/general.h is sufficient for most use cases:
+
+.. code-block:: c
+
+    /* general.h */
+    #define NSLOOKUP_CMD            /* Name resolution command */
+    #define PING_CMD                /* Ping command */
+    #define NTP_CMD                 /* NTP commands */
+    #define VLAN_CMD                /* VLAN commands */
+    #define IMAGE_EFI               /* EFI image support */
+    #define DOWNLOAD_PROTO_HTTPS    /* Secure Hypertext Transfer Protocol */
+    #define DOWNLOAD_PROTO_FTP      /* File Transfer Protocol */
+    #define DOWNLOAD_PROTO_NFS      /* Network File System Protocol */
+    #define DOWNLOAD_PROTO_FILE     /* Local file system access */
+
+Open-iSCSI
+~~~~~~~~~~
+
+When the root file system is on an iSCSI drive you should disable pings and set
+the replacement timer to a high value in the configuration file [3]::
+
+    node.conn[0].timeo.noop_out_interval = 0
+    node.conn[0].timeo.noop_out_timeout = 0
+    node.session.timeo.replacement_timeout = 86400
+
+Links
+-----
+
+* [1] https://ipxe.org - iPXE open source boot firmware
+* [2] https://www.gnu.org/software/grub/ -
+  GNU GRUB (Grand Unified Bootloader)
+* [3] https://github.com/open-iscsi/open-iscsi/blob/master/README -
+  Open-iSCSI README
diff --git a/doc/develop/uefi/u-boot_on_efi.rst b/doc/develop/uefi/u-boot_on_efi.rst
new file mode 100644
index 00000000000..245b4af1fa3
--- /dev/null
+++ b/doc/develop/uefi/u-boot_on_efi.rst
@@ -0,0 +1,377 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2015 Google, Inc
+
+U-Boot on EFI
+=============
+This document provides information about U-Boot running on top of EFI, either
+as an application or just as a means of getting U-Boot onto a new platform.
+
+
+Motivation
+----------
+Running U-Boot on EFI is useful in several situations:
+
+- You have EFI running on a board but U-Boot does not natively support it
+  fully yet. You can boot into U-Boot from EFI and use that until U-Boot is
+  fully ported
+
+- You need to use an EFI implementation (e.g. UEFI) because your vendor
+  requires it in order to provide support
+
+- You plan to use coreboot to boot into U-Boot but coreboot support does
+  not currently exist for your platform. In the meantime you can use U-Boot
+  on EFI and then move to U-Boot on coreboot when ready
+
+- You use EFI but want to experiment with a simpler alternative like U-Boot
+
+
+Status
+------
+Only x86 is supported at present. If you are using EFI on another architecture
+you may want to reconsider. However, much of the code is generic so could be
+ported.
+
+U-Boot supports running as an EFI application for both 32- and 64-bit EFI.
+
+U-Boot supports building itself as a payload for either 32-bit or 64-bit EFI.
+U-Boot is packaged up and loaded in its entirety by EFI. Once started, U-Boot
+changes to 32-bit mode (currently) and takes over the machine. You can use
+devices, boot a kernel, etc.
+
+
+Build Instructions
+------------------
+First choose a board that has EFI support and obtain an EFI implementation
+for that board. It will be either 32-bit or 64-bit. Alternatively, you can
+opt for using QEMU [1] and the OVMF [2], as detailed below.
+
+To build U-Boot as an EFI application, enable CONFIG_EFI and CONFIG_EFI_APP.
+The efi-x86_app32 and efi-x86_app64 configs are set up for this. Just build
+U-Boot as normal, e.g.::
+
+   make efi-x86_app32_defconfig
+   make
+
+To build U-Boot as an EFI payload (32-bit or 64-bit EFI can be used), enable
+CONFIG_EFI, CONFIG_EFI_STUB, and select either CONFIG_EFI_STUB_32BIT or
+CONFIG_EFI_STUB_64BIT. The efi-x86_payload configs (efi-x86_payload32_defconfig
+and efi-x86_payload32_defconfig) are set up for this. Then build U-Boot as
+normal, e.g.::
+
+   make efi-x86_payload32_defconfig (or efi-x86_payload64_defconfig)
+   make
+
+You will end up with one of these files depending on what you build for:
+
+* u-boot-app.efi - U-Boot EFI application
+* u-boot-payload.efi  - U-Boot EFI payload application
+
+
+Trying it out
+-------------
+QEMU is an emulator and it can emulate an x86 machine. Please make sure your
+QEMU version is 6.0.0 or above to test this. You can run the payload with
+something like this::
+
+   mkdir /tmp/efi
+   cp /path/to/u-boot*.efi /tmp/efi
+   qemu-system-x86_64 -pflash edk2-x86_64-code.fd -hda fat:rw:/tmp/efi/
+
+Add -nographic if you want to use the terminal for output. Once it starts
+type 'fs0:u-boot-payload.efi' to run the payload or 'fs0:u-boot-app.efi' to
+run the application. 'edk2-x86_64-code.fd' is the EFI 'BIOS'. QEMU already
+ships both 32-bit and 64-bit EFI BIOS images. For 32-bit EFI 'BIOS' image,
+use 'edk2-i386-code.fd'.
+
+
+To try it on real hardware, put u-boot-app.efi on a suitable boot medium,
+such as a USB stick. Then you can type something like this to start it::
+
+   fs0:u-boot-payload.efi
+
+(or fs0:u-boot-app.efi for the application)
+
+This will start the payload, copy U-Boot into RAM and start U-Boot. Note
+that EFI does not support booting a 64-bit application from a 32-bit
+EFI (or vice versa). Also it will often fail to print an error message if
+you get this wrong.
+
+You may find the script `scripts/build-efi.sh` helpful for building and testing
+U-Boot on UEFI on QEMU. It also includes links to UEFI binaries dating from
+2021.
+
+See `Example run`_ for an example run.
+
+Inner workings
+--------------
+Here follow a few implementation notes for those who want to fiddle with
+this and perhaps contribute patches.
+
+The application and payload approaches sound similar but are in fact
+implemented completely differently.
+
+EFI Application
+~~~~~~~~~~~~~~~
+For the application the whole of U-Boot is built as a shared library. The
+efi_main() function is in lib/efi/efi_app.c. It sets up some basic EFI
+functions with efi_init(), sets up U-Boot global_data, allocates memory for
+U-Boot's malloc(), etc. and enters the normal init sequence (board_init_f()
+and board_init_r()).
+
+Since U-Boot limits its memory access to the allocated regions very little
+special code is needed. The CONFIG_EFI_APP option controls a few things
+that need to change so 'git grep CONFIG_EFI_APP' may be instructive.
+The CONFIG_EFI option controls more general EFI adjustments.
+
+The only available driver is the serial driver. This calls back into EFI
+'boot services' to send and receive characters. Although it is implemented
+as a serial driver the console device is not necessarilly serial. If you
+boot EFI with video output then the 'serial' device will operate on your
+target devices's display instead and the device's USB keyboard will also
+work if connected. If you have both serial and video output, then both
+consoles will be active. Even though U-Boot does the same thing normally,
+These are features of EFI, not U-Boot.
+
+Very little code is involved in implementing the EFI application feature.
+U-Boot is highly portable. Most of the difficulty is in modifying the
+Makefile settings to pass the right build flags. In particular there is very
+little x86-specific code involved - you can find most of it in
+arch/x86/cpu. Porting to ARM (which can also use EFI if you are brave
+enough) should be straightforward.
+
+Use the 'reset' command to get back to EFI.
+
+EFI Payload
+~~~~~~~~~~~
+The payload approach is a different kettle of fish. It works by building
+U-Boot exactly as normal for your target board, then adding the entire
+image (including device tree) into a small EFI stub application responsible
+for booting it. The stub application is built as a normal EFI application
+except that it has a lot of data attached to it.
+
+The stub application is implemented in lib/efi/efi_stub.c. The efi_main()
+function is called by EFI. It is responsible for copying U-Boot from its
+original location into memory, disabling EFI boot services and starting
+U-Boot. U-Boot then starts as normal, relocates, starts all drivers, etc.
+
+The stub application is architecture-dependent. At present it has some
+x86-specific code and a comment at the top of efi_stub.c describes this.
+
+While the stub application does allocate some memory from EFI this is not
+used by U-Boot (the payload). In fact when U-Boot starts it has all of the
+memory available to it and can operate as it pleases (but see the next
+section).
+
+Tables
+~~~~~~
+The payload can pass information to U-Boot in the form of EFI tables. At
+present this feature is used to pass the EFI memory map, an inordinately
+large list of memory regions. You can use the 'efi mem all' command to
+display this list. U-Boot uses the list to work out where to relocate
+itself.
+
+Although U-Boot can use any memory it likes, EFI marks some memory as used
+by 'run-time services', code that hangs around while U-Boot is running and
+is even present when Linux is running. This is common on x86 and provides
+a way for Linux to call back into the firmware to control things like CPU
+fan speed. U-Boot uses only 'conventional' memory, in EFI terminology. It
+will relocate itself to the top of the largest block of memory it can find
+below 4GB.
+
+Interrupts
+~~~~~~~~~~
+U-Boot drivers typically don't use interrupts. Since EFI enables interrupts
+it is possible that an interrupt will fire that U-Boot cannot handle. This
+seems to cause problems. For this reason the U-Boot payload runs with
+interrupts disabled at present.
+
+32/64-bit
+~~~~~~~~~
+While the EFI application can be built as either 32- or 64-bit, you need to be
+careful to build the correct one so that your UEFI firmware can start it. Most
+UEFI images are 64-bit at present.
+
+The payload stub can be build as either 32- or 64-bits. Only a small amount
+of code is built this way (see the extra- line in lib/efi/Makefile).
+Everything else is built as a normal U-Boot, so is always 32-bit on x86 at
+present.
+
+Example run
+-----------
+
+This shows running with serial enabled (see `include/configs/efi-x86_app.h`)::
+
+   $ scripts/build-efi.sh -wsPr
+   Packaging efi-x86_app32
+   Running qemu-system-i386
+
+   BdsDxe: failed to load Boot0001 "UEFI QEMU HARDDISK QM00005 " from PciRoot(0x0)/Pci(0x3,0x0)/Sata(0x0,0xFFFF,0x0): Not Found
+   BdsDxe: loading Boot0002 "EFI Internal Shell" from Fv(7CB8BDC9-F8EB-4F34-AAEA-3EE4AF6516A1)/FvFile(7C04A583-9E3E-4F1C-AD65-E05268D0B4D1)
+   BdsDxe: starting Boot0002 "EFI Internal Shell" from Fv(7CB8BDC9-F8EB-4F34-AAEA-3EE4AF6516A1)/FvFile(7C04A583-9E3E-4F1C-AD65-E05268D0B4D1)
+
+   UEFI Interactive Shell v2.2
+   EDK II
+   UEFI v2.70 (EDK II, 0x00010000)
+   Mapping table
+         FS0: Alias(s):HD0a65535a1:;BLK1:
+             PciRoot(0x0)/Pci(0x3,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,0FFD5E61-3B0C-4326-8049-BDCDC910AF72,0x800,0xB000)
+        BLK0: Alias(s):
+             PciRoot(0x0)/Pci(0x3,0x0)/Sata(0x0,0xFFFF,0x0)
+
+   Press ESC in 5 seconds to skip startup.nsh or any other key to continue.
+   Shell> fs0:u-boot-app.efi
+   U-Boot EFI App (using allocated RAM address 47d4000) key=8d4, image=06a6f610
+   starting
+
+
+   U-Boot 2022.01-rc4 (Sep 19 2021 - 14:03:20 -0600)
+
+   CPU: x86, vendor Intel, device 663h
+   DRAM:  32 MiB
+    0: efi_media_0  PciRoot(0x0)/Pci(0x3,0x0)/Sata(0x0,0xFFFF,0x0)
+    1: <partition>  PciRoot(0x0)/Pci(0x3,0x0)/Sata(0x0,0xFFFF,0x0)/HD(1,GPT,0FFD5E61-3B0C-4326-8049-BDCDC910AF72,0x800,0xB000)
+   Loading Environment from nowhere... OK
+   Model: EFI x86 Application
+   Hit any key to stop autoboot:  0
+
+   Partition Map for EFI device 0  --   Partition Type: EFI
+
+   Part    Start LBA       End LBA            Name
+           Attributes
+           Type GUID
+           Partition GUID
+     1     0x00000800      0x0000b7ff      "boot"
+           attrs:  0x0000000000000000
+           type:   ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+           guid:   0ffd5e61-3b0c-4326-8049-bdcdc910af72
+          19   startup.nsh
+      528384   u-boot-app.efi
+       10181   NvVars
+
+   3 file(s), 0 dir(s)
+
+   => QEMU: Terminated
+
+Run on VirtualBox (x86_64)
+--------------------------
+
+Enable EFI
+~~~~~~~~~~
+At settings for virtual machine the flag at **System->Motherboard->Enable EFI
+(special OSes only)** has to be enabled.
+
+Installation
+~~~~~~~~~~~~
+Provide the preinstalled Linux system as a Virtual Disk Image (VDI) and assign
+it to a SATA controller (type AHCI) using the settings for the virtual machine
+at menu item **System->Storage->Controller:SATA**.
+
+For the following description three GPT partitions are assumed:
+
+- Partition 1: formatted as FAT file-system and marked as EFI system partition
+  (partition type 0xEF00) used for the U-Boot EFI binary. (If VirtualBox is UEFI
+  compliant, it should recognize the ESP as the boot partition.)
+
+- Partition 2: formatted as **ext4**, used for root file system
+
+Create an extlinux.conf or a boot script
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Following files are assumed to be located at system for boot configuration::
+
+ Partition  File                    Comment
+ 1          EFI/BOOT/BOOTX64.efi    # renamed U-Boot EFI image
+ 1          Image                   # Linux image
+ 1          Initrd                  # Initramfs of Linux
+
+**EFI/BOOT/BOOTX64.efi** is a renamed build result **u-boot-payload.efi**, built with
+**efi-x86_payload64_defconfig** configuration.
+
+Boot script
+~~~~~~~~~~~
+
+The boot script **boot.scr** is assumed to be located at::
+
+ Partition  File        Comment
+ 1          boot.scr    # Boot script, generated with mkimage from template
+
+Content of **boot.scr**:
+
+.. code-block:: bash
+
+  ext4load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} ${prefix}Image
+  setenv kernel_size ${filesize}
+  ext4load ${devtype} ${devnum}:${distro_bootpart} ${ramdisk_addr_r} ${prefix}Initrd
+  setenv initrd_size ${filesize}
+  zboot  ${kernel_addr_r} ${kernel_size} ${ramdisk_addr_r} ${initrd_size}
+
+Extlinux configuration
+~~~~~~~~~~~~~~~~~~~~~~
+
+Alternatively a configuration **extlinux.conf** can be used. **extlinux.conf**
+is assumed to be located at::
+
+ Partition  File                        Comment
+ 1          extlinux/extlinux.conf      # Extlinux boot configuration
+
+Content of **extlinux.conf**:
+
+.. code-block:: bash
+
+  default l0
+  menu title U-Boot menu
+  prompt 0
+  timeout 50
+
+  label l0
+    menu label Linux
+    linux /Image
+    initrd /Initrd
+
+
+Additionally something like (sda is assumed as disk device):
+
+.. code-block:: bash
+
+	append  root=/dev/sda2 console=tty0 console=ttyS0,115200n8 rootwait rw
+
+
+
+Future work
+-----------
+This work could be extended in a number of ways:
+
+- Add ARM support
+
+- Figure out how to solve the interrupt problem
+
+- Add more drivers to the application side (e.g.USB, environment access).
+
+- Avoid turning off boot services in the stub. Instead allow U-Boot to make
+  use of boot services in case it wants to. It is unclear what it might want
+  though. It is better to use the app.
+
+Where is the code?
+------------------
+lib/efi
+	payload stub, application, support code. Mostly arch-neutral
+
+arch/x86/cpu/efi
+	x86 support code for running as an EFI application and payload
+
+board/efi/efi-x86_app/efi.c
+	x86 board code for running as an EFI application
+
+board/efi/efi-x86_payload
+	generic x86 EFI payload board support code
+
+common/cmd_efi.c
+	the 'efi' command
+
+--
+Ben Stoltz, Simon Glass
+Google, Inc
+July 2015
+
+* [1] http://www.qemu.org
+* [2] https://github.com/tianocore/tianocore.github.io/wiki/OVMF
diff --git a/doc/develop/uefi/uefi.rst b/doc/develop/uefi/uefi.rst
new file mode 100644
index 00000000000..d450b12bf80
--- /dev/null
+++ b/doc/develop/uefi/uefi.rst
@@ -0,0 +1,974 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2018 Heinrich Schuchardt
+
+UEFI on U-Boot
+==============
+
+The Unified Extensible Firmware Interface Specification (UEFI) [1] has become
+the default for booting on AArch64 and x86 systems. It provides a stable API for
+the interaction of drivers and applications with the firmware. The API comprises
+access to block storage, network, and console to name a few. The Linux kernel
+and boot loaders like GRUB or the FreeBSD loader can be executed.
+
+Development target
+------------------
+
+The implementation of UEFI in U-Boot strives to reach the requirements described
+in the "Embedded Base Boot Requirements (EBBR) Specification - Release v2.1.0"
+[2]. The "Server Base Boot Requirements System Software on ARM Platforms" [3]
+describes a superset of the EBBR specification and may be used as further
+reference.
+
+A full blown UEFI implementation would contradict the U-Boot design principle
+"keep it small".
+
+Building U-Boot for UEFI
+------------------------
+
+The UEFI standard supports only little-endian systems. The UEFI support can be
+activated for ARM and x86 by specifying::
+
+    CONFIG_CMD_BOOTEFI=y
+    CONFIG_EFI_LOADER=y
+
+in the .config file.
+
+Support for attaching virtual block devices, e.g. iSCSI drives connected by the
+loaded UEFI application [4], requires::
+
+    CONFIG_BLK=y
+    CONFIG_PARTITIONS=y
+
+Executing a UEFI binary
+~~~~~~~~~~~~~~~~~~~~~~~
+
+The bootefi command is used to start UEFI applications or to install UEFI
+drivers. It takes two parameters::
+
+    bootefi <image address> [fdt address]
+
+* image address - the memory address of the UEFI binary
+* fdt address - the memory address of the flattened device tree
+
+Below you find the output of an example session starting GRUB::
+
+    => load mmc 0:2 ${fdt_addr_r} boot/dtb
+    29830 bytes read in 14 ms (2 MiB/s)
+    => load mmc 0:1 ${kernel_addr_r} efi/debian/grubaa64.efi
+    reading efi/debian/grubaa64.efi
+    120832 bytes read in 7 ms (16.5 MiB/s)
+    => bootefi ${kernel_addr_r} ${fdt_addr_r}
+
+When booting from a memory location it is unknown from which file it was loaded.
+Therefore the bootefi command uses the device path of the block device partition
+or the network adapter and the file name of the most recently loaded PE-COFF
+file when setting up the loaded image protocol.
+
+Launching a UEFI binary from a FIT image
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+A signed FIT image can be used to securely boot a UEFI image via the
+bootm command. This feature is available if U-Boot is configured with::
+
+    CONFIG_BOOTM_EFI=y
+
+A sample configuration is provided in :doc:`../../usage/fit/uefi`.
+
+Below you find the output of an example session starting GRUB::
+
+    => load mmc 0:1 ${kernel_addr_r} image.fit
+    4620426 bytes read in 83 ms (53.1 MiB/s)
+    => bootm ${kernel_addr_r}#config-grub-nofdt
+    ## Loading kernel from FIT Image at 40400000 ...
+       Using 'config-grub-nofdt' configuration
+       Verifying Hash Integrity ... sha256,rsa2048:dev+ OK
+       Trying 'efi-grub' kernel subimage
+         Description:  GRUB EFI Firmware
+         Created:      2019-11-20   8:18:16 UTC
+         Type:         Kernel Image (no loading done)
+         Compression:  uncompressed
+         Data Start:   0x404000d0
+         Data Size:    450560 Bytes = 440 KiB
+         Hash algo:    sha256
+         Hash value:   4dbee00021112df618f58b3f7cf5e1595533d543094064b9ce991e8b054a9eec
+       Verifying Hash Integrity ... sha256+ OK
+       XIP Kernel Image (no loading done)
+    ## Transferring control to EFI (at address 404000d0) ...
+    Welcome to GRUB!
+
+See :doc:`../../usage/fit/howto` for an introduction to FIT images.
+
+Configuring UEFI secure boot
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The UEFI specification[1] defines a secure way of executing UEFI images
+by verifying a signature (or message digest) of image with certificates.
+This feature on U-Boot is enabled with::
+
+    CONFIG_EFI_SECURE_BOOT=y
+
+To make the boot sequence safe, you need to establish a chain of trust;
+In UEFI secure boot the chain trust is defined by the following UEFI variables
+
+* PK - Platform Key
+* KEK - Key Exchange Keys
+* db - white list database
+* dbx - black list database
+
+An in depth description of UEFI secure boot is beyond the scope of this
+document. Please, refer to the UEFI specification and available online
+documentation. Here is a simple example that you can follow for your initial
+attempt (Please note that the actual steps will depend on your system and
+environment.):
+
+Install the required tools on your host
+
+* openssl
+* efitools
+* sbsigntool
+
+Create signing keys and the key database on your host:
+
+The platform key
+
+.. code-block:: bash
+
+    openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_PK/ \
+            -keyout PK.key -out PK.crt -nodes -days 365
+    cert-to-efi-sig-list -g 11111111-2222-3333-4444-123456789abc \
+            PK.crt PK.esl;
+    sign-efi-sig-list -c PK.crt -k PK.key PK PK.esl PK.auth
+
+The key exchange keys
+
+.. code-block:: bash
+
+    openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_KEK/ \
+            -keyout KEK.key -out KEK.crt -nodes -days 365
+    cert-to-efi-sig-list -g 11111111-2222-3333-4444-123456789abc \
+            KEK.crt KEK.esl
+    sign-efi-sig-list -c PK.crt -k PK.key KEK KEK.esl KEK.auth
+
+The whitelist database
+
+.. code-block:: bash
+
+    openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_db/ \
+            -keyout db.key -out db.crt -nodes -days 365
+    cert-to-efi-sig-list -g 11111111-2222-3333-4444-123456789abc \
+            db.crt db.esl
+    sign-efi-sig-list -c KEK.crt -k KEK.key db db.esl db.auth
+
+Copy the \*.auth files to media, say mmc, that is accessible from U-Boot.
+
+Sign an image with one of the keys in "db" on your host
+
+.. code-block:: bash
+
+    sbsign --key db.key --cert db.crt helloworld.efi
+
+Now in U-Boot install the keys on your board::
+
+    fatload mmc 0:1 <tmpaddr> PK.auth
+    setenv -e -nv -bs -rt -at -i <tmpaddr>:$filesize PK
+    fatload mmc 0:1 <tmpaddr> KEK.auth
+    setenv -e -nv -bs -rt -at -i <tmpaddr>:$filesize KEK
+    fatload mmc 0:1 <tmpaddr> db.auth
+    setenv -e -nv -bs -rt -at -i <tmpaddr>:$filesize db
+
+Set up boot parameters on your board::
+
+    efidebug boot add -b 1 HELLO mmc 0:1 /helloworld.efi.signed ""
+
+Since kernel 5.7 there's an alternative way of loading an initrd using
+LoadFile2 protocol if CONFIG_EFI_LOAD_FILE2_INITRD is enabled.
+The initrd path can be specified with::
+
+    efidebug boot add -b ABE0 'kernel' mmc 0:1 Image -i mmc 0:1 initrd
+
+Now your board can run the signed image via the boot manager (see below).
+You can also try this sequence by running Pytest, test_efi_secboot,
+on the sandbox
+
+.. code-block:: bash
+
+    cd <U-Boot source directory>
+    pytest test/py/tests/test_efi_secboot/test_signed.py --bd sandbox
+
+UEFI binaries may be signed by Microsoft using the following certificates:
+
+* KEK: Microsoft Corporation KEK CA 2011
+  http://go.microsoft.com/fwlink/?LinkId=321185.
+* db: Microsoft Windows Production PCA 2011
+  http://go.microsoft.com/fwlink/p/?linkid=321192.
+* db: Microsoft Corporation UEFI CA 2011
+  http://go.microsoft.com/fwlink/p/?linkid=321194.
+
+Using OP-TEE for EFI variables
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Instead of implementing UEFI variable services inside U-Boot they can
+also be provided in the secure world by a module for OP-TEE[1]. The
+interface between U-Boot and OP-TEE for variable services is enabled by
+CONFIG_EFI_MM_COMM_TEE=y.
+
+Tianocore EDK II's standalone management mode driver for variables can
+be linked to OP-TEE for this purpose. This module uses the Replay
+Protected Memory Block (RPMB) of an eMMC device for persisting
+non-volatile variables. When calling the variable services via the
+OP-TEE API U-Boot's OP-TEE supplicant relays calls to the RPMB driver
+which has to be enabled via CONFIG_SUPPORT_EMMC_RPMB=y.
+
+EDK2 Build instructions
+***********************
+
+.. code-block:: bash
+
+    $ git clone https://github.com/tianocore/edk2.git
+    $ git clone https://github.com/tianocore/edk2-platforms.git
+    $ cd edk2
+    $ git submodule init && git submodule update --init --recursive
+    $ cd ..
+    $ export WORKSPACE=$(pwd)
+    $ export PACKAGES_PATH=$WORKSPACE/edk2:$WORKSPACE/edk2-platforms
+    $ export ACTIVE_PLATFORM="Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc"
+    $ export GCC5_AARCH64_PREFIX=aarch64-linux-gnu-
+    $ source edk2/edksetup.sh
+    $ make -C edk2/BaseTools
+    $ build -p $ACTIVE_PLATFORM -b RELEASE -a AARCH64 -t GCC5 -n `nproc`
+
+OP-TEE Build instructions
+*************************
+
+.. code-block:: bash
+
+    $ git clone https://github.com/OP-TEE/optee_os.git
+    $ cd optee_os
+    $ ln -s ../Build/MmStandaloneRpmb/RELEASE_GCC5/FV/BL32_AP_MM.fd
+    $ export ARCH=arm
+    $ CROSS_COMPILE32=arm-linux-gnueabihf- make -j32 CFG_ARM64_core=y \
+        PLATFORM=<myboard> CFG_STMM_PATH=BL32_AP_MM.fd CFG_RPMB_FS=y \
+        CFG_RPMB_FS_DEV_ID=0 CFG_CORE_HEAP_SIZE=524288 CFG_RPMB_WRITE_KEY=y \
+        CFG_CORE_DYN_SHM=y CFG_RPMB_TESTKEY=y CFG_REE_FS=n \
+        CFG_CORE_ARM64_PA_BITS=48 CFG_TEE_CORE_LOG_LEVEL=1 \
+        CFG_TEE_TA_LOG_LEVEL=1 CFG_SCTLR_ALIGNMENT_CHECK=n
+
+U-Boot Build instructions
+*************************
+
+Although the StandAloneMM binary comes from EDK2, using and storing the
+variables is currently available in U-Boot only.
+
+.. code-block:: bash
+
+    $ git clone https://github.com/u-boot/u-boot.git
+    $ cd u-boot
+    $ export CROSS_COMPILE=aarch64-linux-gnu-
+    $ export ARCH=<arch>
+    $ make <myboard>_defconfig
+    $ make menuconfig
+
+Enable ``CONFIG_OPTEE``, ``CONFIG_CMD_OPTEE_RPMB`` and ``CONFIG_EFI_MM_COMM_TEE``
+
+.. warning::
+
+    - Your OP-TEE platform port must support Dynamic shared memory, since that's
+      the only kind of memory U-Boot supports for now.
+
+[1] https://optee.readthedocs.io/en/latest/building/efi_vars/stmm.html
+
+.. _uefi_capsule_update_ref:
+
+Enabling UEFI Capsule Update feature
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Support has been added for the UEFI capsule update feature which
+enables updating the U-Boot image using the UEFI firmware management
+protocol (FMP). The capsules are not passed to the firmware through
+the UpdateCapsule runtime service. Instead, capsule-on-disk
+functionality is used for fetching capsules from the EFI System
+Partition (ESP) by placing capsule files under the directory::
+
+    \EFI\UpdateCapsule
+
+The directory is checked for capsules only within the
+EFI system partition on the device specified in the active boot option,
+which is determined by BootXXXX variable in BootNext, or if not, the highest
+priority one within BootOrder. Any BootXXXX variables referring to devices
+not present are ignored when determining the active boot option.
+
+Please note that capsules will be applied in the alphabetic order of
+capsule file names.
+
+Creating a capsule file
+***********************
+
+A capsule file can be created by using tools/mkeficapsule.
+To build this tool, enable::
+
+    CONFIG_TOOLS_MKEFICAPSULE=y
+    CONFIG_TOOLS_LIBCRYPTO=y
+
+Run the following command
+
+.. code-block:: console
+
+    $ mkeficapsule \
+      --index <index> --instance 0 \
+      --guid <image GUID> \
+      <capsule_file_name>
+
+Capsule with firmware version
+*****************************
+
+The UEFI specification does not define the firmware versioning mechanism.
+EDK II reference implementation inserts the FMP Payload Header right before
+the payload. It coutains the fw_version and lowest supported version,
+EDK II reference implementation uses these information to implement the
+firmware versioning and anti-rollback protection, the firmware version and
+lowest supported version is stored into EFI non-volatile variable.
+
+In U-Boot, the firmware versioning is implemented utilizing
+the FMP Payload Header same as EDK II reference implementation,
+reads the FMP Payload Header and stores the firmware version into
+"FmpStateXXXX" EFI non-volatile variable. XXXX indicates the image index,
+since FMP protocol handles multiple image indexes.
+
+To add the fw_version into the FMP Payload Header,
+add --fw-version option in mkeficapsule tool.
+
+.. code-block:: console
+
+    $ mkeficapsule \
+      --index <index> --instance 0 \
+      --guid <image GUID> \
+      --fw-version 5 \
+      <capsule_file_name>
+
+If the --fw-version option is not set, FMP Payload Header is not inserted
+and fw_version is set as 0.
+
+Capsule Generation through binman
+*********************************
+
+Support has also been added to generate capsules during U-Boot build
+through binman. This requires the platform's DTB to be populated with
+the capsule entry nodes for binman. The capsules then can be generated
+by specifying the capsule parameters as properties in the capsule
+entry node.
+
+Check the test/py/tests/test_efi_capsule/capsule_gen_binman.dts file
+as reference for how a typical binman node for capsule generation
+looks like. For generating capsules as part of the platform's build, a
+capsule node would then have to be included into the platform's
+devicetree.
+
+A typical binman node for generating a capsule would look like::
+
+	capsule {
+		filename = "u-boot.capsule";
+		efi-capsule {
+			image-index = <0x1>;
+			image-guid = "09d7cf52-0720-4710-91d1-08469b7fe9c8";
+
+			u-boot {
+			};
+		};
+	};
+
+In the above example, a capsule file named u-boot.capsule will be
+generated with u-boot.bin as it's input payload. The capsule
+generation parameters like image-index and image-guid are being
+specified as properties. Similarly, other properties like the private
+and public key certificate can be specified for generating signed
+capsules. Refer :ref:`etype_efi_capsule` for documentation about the
+efi-capsule binman entry type, which describes all the properties that
+can be specified.
+
+Dumping capsule headers
+***********************
+
+The mkeficapsule tool also provides a command-line option to dump the
+contents of the capsule header. This is a useful functionality when
+trying to understand the structure of a capsule and is also used in
+capsule verification. This feature is used in testing the capsule
+contents in binman's test framework.
+
+To check the contents of the capsule headers, the mkeficapsule command
+can be used.
+
+.. code-block:: console
+
+    $ mkeficapsule --dump-capsule \
+      <capsule_file_name>
+
+Performing the update
+*********************
+
+Put capsule files under the directory mentioned above.
+Then, following the UEFI specification, you'll need to set
+the EFI_OS_INDICATIONS_FILE_CAPSULE_DELIVERY_SUPPORTED
+bit in OsIndications variable with
+
+.. code-block:: console
+
+    => setenv -e -nv -bs -rt -v OsIndications =0x0000000000000004
+
+Since U-Boot doesn't currently support SetVariable at runtime, its value
+won't be taken over across the reboot. If this is the case, you can skip
+this feature check with the Kconfig option (CONFIG_EFI_IGNORE_OSINDICATIONS)
+set.
+
+A few values need to be defined in the board file for performing the
+capsule update. These values are defined in the board file by
+initialisation of a structure which provides information needed for
+capsule updates. The following structures have been defined for
+containing the image related information
+
+.. code-block:: c
+
+	struct efi_fw_image {
+		efi_guid_t image_type_id;
+		u16 *fw_name;
+		u8 image_index;
+	};
+
+	struct efi_capsule_update_info {
+		const char *dfu_string;
+		struct efi_fw_image *images;
+	};
+
+
+A string is defined which is to be used for populating the
+dfu_alt_info variable. This string is used by the function
+set_dfu_alt_info. Instead of taking the variable from the environment,
+the capsule update feature requires that the variable be set through
+the function, since that is more robust. Allowing the user to change
+the location of the firmware updates is not a very secure
+practice. Getting this information from the firmware itself is more
+secure, assuming the firmware has been verified by a previous stage
+boot loader.
+
+The firmware images structure defines the GUID values, image index
+values and the name of the images that are to be updated through
+the capsule update feature. These values are to be defined as part of
+an array. These GUID values would be used by the Firmware Management
+Protocol(FMP) to populate the image descriptor array and also
+displayed as part of the ESRT table. The image index values defined in
+the array should be one greater than the dfu alt number that
+corresponds to the firmware image. So, if the dfu alt number for an
+image is 2, the value of image index in the fw_images array for that
+image should be 3. The dfu alt number can be obtained by running the
+following command::
+
+    dfu list
+
+When the FWU Multi Bank Update feature is enabled on the platform, the
+image index is used only to identify the image index with the image
+GUID. The image index would not correspond to the dfu alt number. This
+is because the FWU feature supports multiple partitions(banks) of
+updatable images, and the actual dfu alt number to which the image is
+to be written to is determined at runtime, based on the value of the
+update bank to which the image is to be written. For more information
+on the FWU Multi Bank Update feature, please refer to
+:doc:`/develop/uefi/fwu_updates`.
+
+When using the FMP for FIT images, the image index value needs to be
+set to 1.
+
+Finally, the capsule update can be initiated by rebooting the board.
+
+An example of setting the values in the struct efi_fw_image and
+struct efi_capsule_update_info is shown below
+
+.. code-block:: c
+
+	struct efi_fw_image fw_images[] = {
+		{
+			.image_type_id = DEVELOPERBOX_UBOOT_IMAGE_GUID,
+			.fw_name = u"DEVELOPERBOX-UBOOT",
+			.image_index = 1,
+		},
+		{
+			.image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID,
+			.fw_name = u"DEVELOPERBOX-FIP",
+			.image_index = 2,
+		},
+		{
+			.image_type_id = DEVELOPERBOX_OPTEE_IMAGE_GUID,
+			.fw_name = u"DEVELOPERBOX-OPTEE",
+			.image_index = 3,
+		},
+	};
+
+	struct efi_capsule_update_info update_info = {
+		.dfu_string = "mtd nor1=u-boot.bin raw 200000 100000;"
+				"fip.bin raw 180000 78000;"
+				"optee.bin raw 500000 100000",
+		.images = fw_images,
+	};
+
+Platforms must declare a variable update_info of type struct
+efi_capsule_update_info as shown in the example above. The platform
+will also define a fw_images array which contains information of all
+the firmware images that are to be updated through capsule update
+mechanism. The dfu_string is the string that is to be set as
+dfu_alt_info. In the example above, the image index to be set for
+u-boot.bin binary is 0x1, for fip.bin is 0x2 and for optee.bin is 0x3.
+
+As an example, for generating the capsule for the optee.bin image, the
+following command can be issued
+
+.. code-block:: bash
+
+    $ ./tools/mkeficapsule \
+      --index 0x3 --instance 0 \
+      --guid c1b629f1-ce0e-4894-82bf-f0a38387e630 \
+      optee.bin optee.capsule
+
+
+Enabling Capsule Authentication
+*******************************
+
+The UEFI specification defines a way of authenticating the capsule to
+be updated by verifying the capsule signature. The capsule signature
+is computed and prepended to the capsule payload at the time of
+capsule generation. This signature is then verified by using the
+public key stored as part of the X509 certificate. This certificate is
+in the form of an efi signature list (esl) file, which is embedded in
+a device tree.
+
+The capsule authentication feature can be enabled through the
+following config, in addition to the configs listed above for capsule
+update::
+
+    CONFIG_EFI_CAPSULE_AUTHENTICATE=y
+
+The public and private keys used for the signing process are generated
+and used by the steps highlighted below.
+
+1. Install utility commands on your host
+       * openssl
+       * efitools
+
+2. Create signing keys and certificate files on your host
+
+.. code-block:: console
+
+    $ openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=CRT/ \
+        -keyout CRT.key -out CRT.crt -nodes -days 365
+    $ cert-to-efi-sig-list CRT.crt CRT.esl
+
+3. Run the following command to create and sign the capsule file
+
+.. code-block:: console
+
+    $ mkeficapsule --monotonic-count 1 \
+      --private-key CRT.key \
+      --certificate CRT.crt \
+      --index 1 --instance 0 \
+      [--fit | --raw | --guid <guid-string] \
+      <image_blob> <capsule_file_name>
+
+4. Insert the signature list into a device tree in the following format::
+
+    {
+            signature {
+                    capsule-key = [ <binary of signature list> ];
+            }
+            ...
+    }
+
+You can perform step-4 through the Kconfig symbol
+CONFIG_EFI_CAPSULE_CRT_FILE. This symbol points to the signing key
+generated in step-2. As part of U-Boot build, the ESL certificate file will
+be generated from the signing key and automatically get embedded into the
+platform's dtb.
+
+Anti-rollback Protection
+************************
+
+Anti-rollback prevents unintentional installation of outdated firmware.
+To enable anti-rollback, you must add the lowest-supported-version property
+to dtb and specify --fw-version when creating a capsule file with the
+mkeficapsule tool.
+When executing capsule update, U-Boot checks if fw_version is greater than
+or equal to lowest-supported-version. If fw_version is less than
+lowest-supported-version, the update will fail.
+For example, if lowest-supported-version is set to 7 and you run capsule
+update using a capsule file with --fw-version of 5, the update will fail.
+When the --fw-version in the capsule file is updated, lowest-supported-version
+in the dtb might be updated accordingly.
+
+If user needs to enforce anti-rollback to any older version,
+the lowest-supported-version property in dtb must be always updated manually.
+
+Note that the lowest-supported-version property specified in U-Boot's control
+device tree can be changed by U-Boot fdt command.
+Secure systems should not enable this command.
+
+To insert the lowest supported version into a dtb
+
+.. code-block:: console
+
+    $ dtc -@ -I dts -O dtb -o version.dtbo version.dtso
+    $ fdtoverlay -i orig.dtb -o new.dtb -v version.dtbo
+
+where version.dtso looks like::
+
+    /dts-v1/;
+    /plugin/;
+    &{/} {
+            firmware-version {
+                    image1 {
+                            image-type-id = "09D7CF52-0720-4710-91D1-08469B7FE9C8";
+                            image-index = <1>;
+                            lowest-supported-version = <3>;
+                    };
+            };
+    };
+
+The properties of image-type-id and image-index must match the value
+defined in the efi_fw_image array as image_type_id and image_index.
+
+Porting Capsule Updates to new boards
+*************************************
+
+It is important, when using a reference board as a starting point for a custom
+board, that certain steps are taken to properly support Capsule Updates.
+
+Capsule GUIDs need to be unique for each firmware and board. That is, if two
+firmwares are built from the same source but result in different binaries
+because they are built for different boards, they should have different GUIDs.
+Therefore it is important when creating support for a new board, new GUIDs are
+defined in the board's header file.  *DO NOT* reuse capsule GUIDs.
+
+Executing the boot manager
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The UEFI specification foresees to define boot entries and boot sequence via
+UEFI variables. Booting according to these variables is possible via::
+
+    bootefi bootmgr [fdt address]
+
+As of U-Boot v2020.10 UEFI variables cannot be set at runtime. The U-Boot
+command 'efidebug' can be used to set the variables.
+
+UEFI HTTP Boot
+~~~~~~~~~~~~~~
+
+HTTP Boot provides the capability for system deployment and configuration
+over the network. HTTP Boot can be activated by specifying::
+
+    CONFIG_EFI_HTTP_BOOT
+
+Enabling that will automatically select::
+
+    CONFIG_CMD_DNS
+    CONFIG_CMD_WGET
+    CONFIG_BLKMAP
+
+Set up the load option specifying the target URI::
+
+    efidebug boot add -u 1 netinst http://foo/bar
+
+When this load option is selected as boot selection, resolve the
+host ip address by dns, then download the file with wget.
+If the downloaded file extension is .iso or .img file, efibootmgr tries to
+mount the image and boot with the default file(e.g. EFI/BOOT/BOOTAA64.EFI).
+If the downloaded file is PE-COFF image, load the downloaded file and
+start it.
+
+The current implementation tries to resolve the IP address as a host name.
+If the uri is like "http://192.168.1.1/foobar",
+the dns process tries to resolve the host "192.168.1.1" and it will
+end up with "host not found".
+
+We need to preset the "httpserverip" environment variable to proceed the wget::
+
+    setenv httpserverip 192.168.1.1
+
+Executing the built in hello world application
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+A hello world UEFI application can be built with::
+
+    CONFIG_CMD_BOOTEFI_HELLO_COMPILE=y
+
+It can be embedded into the U-Boot binary with::
+
+    CONFIG_CMD_BOOTEFI_HELLO=y
+
+The bootefi command is used to start the embedded hello world application::
+
+    bootefi hello [fdt address]
+
+Below you find the output of an example session::
+
+    => bootefi hello ${fdtcontroladdr}
+    ## Starting EFI application at 01000000 ...
+    WARNING: using memory device/image path, this may confuse some payloads!
+    Hello, world!
+    Running on UEFI 2.7
+    Have SMBIOS table
+    Have device tree
+    Load options: root=/dev/sdb3 init=/sbin/init rootwait ro
+    ## Application terminated, r = 0
+
+The environment variable fdtcontroladdr points to U-Boot's internal device tree
+(if available).
+
+Executing the built-in self-test
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+An UEFI self-test suite can be embedded in U-Boot by building with::
+
+    CONFIG_CMD_BOOTEFI_SELFTEST=y
+
+For testing the UEFI implementation the bootefi command can be used to start the
+self-test::
+
+    bootefi selftest [fdt address]
+
+The environment variable 'efi_selftest' can be used to select a single test. If
+it is not provided all tests are executed except those marked as 'on request'.
+If the environment variable is set to 'list' a list of all tests is shown.
+
+Below you can find the output of an example session::
+
+    => setenv efi_selftest simple network protocol
+    => bootefi selftest
+    Testing EFI API implementation
+    Selected test: 'simple network protocol'
+    Setting up 'simple network protocol'
+    Setting up 'simple network protocol' succeeded
+    Executing 'simple network protocol'
+    DHCP Discover
+    DHCP reply received from 192.168.76.2 (52:55:c0:a8:4c:02)
+      as broadcast message.
+    Executing 'simple network protocol' succeeded
+    Tearing down 'simple network protocol'
+    Tearing down 'simple network protocol' succeeded
+    Boot services terminated
+    Summary: 0 failures
+    Preparing for reset. Press any key.
+
+The UEFI life cycle
+-------------------
+
+After the U-Boot platform has been initialized the UEFI API provides two kinds
+of services:
+
+* boot services
+* runtime services
+
+The API can be extended by loading UEFI drivers which come in two variants:
+
+* boot drivers
+* runtime drivers
+
+UEFI drivers are installed with U-Boot's bootefi command. With the same command
+UEFI applications can be executed.
+
+Loaded images of UEFI drivers stay in memory after returning to U-Boot while
+loaded images of applications are removed from memory.
+
+An UEFI application (e.g. an operating system) that wants to take full control
+of the system calls ExitBootServices. After a UEFI application calls
+ExitBootServices
+
+* boot services are not available anymore
+* timer events are stopped
+* the memory used by U-Boot except for runtime services is released
+* the memory used by boot time drivers is released
+
+So this is a point of no return. Afterwards the UEFI application can only return
+to U-Boot by rebooting.
+
+The UEFI object model
+---------------------
+
+UEFI offers a flexible and expandable object model. The objects in the UEFI API
+are devices, drivers, and loaded images. These objects are referenced by
+handles.
+
+The interfaces implemented by the objects are referred to as protocols. These
+are identified by GUIDs. They can be installed and uninstalled by calling the
+appropriate boot services.
+
+Handles are created by the InstallProtocolInterface or the
+InstallMultipleProtocolinterfaces service if NULL is passed as handle.
+
+Handles are deleted when the last protocol has been removed with the
+UninstallProtocolInterface or the UninstallMultipleProtocolInterfaces service.
+
+Devices offer the EFI_DEVICE_PATH_PROTOCOL. A device path is the concatenation
+of device nodes. By their device paths all devices of a system are arranged in a
+tree.
+
+Drivers offer the EFI_DRIVER_BINDING_PROTOCOL. This protocol is used to connect
+a driver to devices (which are referenced as controllers in this context).
+
+Loaded images offer the EFI_LOADED_IMAGE_PROTOCOL. This protocol provides meta
+information about the image and a pointer to the unload callback function.
+
+The UEFI events
+---------------
+
+In the UEFI terminology an event is a data object referencing a notification
+function which is queued for calling when the event is signaled. The following
+types of events exist:
+
+* periodic and single shot timer events
+* exit boot services events, triggered by calling the ExitBootServices() service
+* virtual address change events
+* memory map change events
+* read to boot events
+* reset system events
+* system table events
+* events that are only triggered programmatically
+
+Events can be created with the CreateEvent service and deleted with CloseEvent
+service.
+
+Events can be assigned to an event group. If any of the events in a group is
+signaled, all other events in the group are also set to the signaled state.
+
+The UEFI driver model
+---------------------
+
+A driver is specific for a single protocol installed on a device. To install a
+driver on a device the ConnectController service is called. In this context
+controller refers to the device for which the driver is installed.
+
+The relevant drivers are identified using the EFI_DRIVER_BINDING_PROTOCOL. This
+protocol has three functions:
+
+* supported - determines if the driver is compatible with the device
+* start - installs the driver by opening the relevant protocol with
+  attribute EFI_OPEN_PROTOCOL_BY_DRIVER
+* stop - uninstalls the driver
+
+The driver may create child controllers (child devices). E.g. a driver for block
+IO devices will create the device handles for the partitions. The child
+controllers  will open the supported protocol with the attribute
+EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER.
+
+A driver can be detached from a device using the DisconnectController service.
+
+U-Boot devices mapped as UEFI devices
+-------------------------------------
+
+Some of the U-Boot devices are mapped as UEFI devices
+
+* block IO devices
+* console
+* graphical output
+* network adapter
+
+As of U-Boot 2018.03 the logic for doing this is hard coded.
+
+The development target is to integrate the setup of these UEFI devices with the
+U-Boot driver model [5]. So when a U-Boot device is discovered a handle should
+be created and the device path protocol and the relevant IO protocol should be
+installed. The UEFI driver then would be attached by calling ConnectController.
+When a U-Boot device is removed DisconnectController should be called.
+
+UEFI devices mapped as U-Boot devices
+-------------------------------------
+
+UEFI drivers binaries and applications may create new (virtual) devices, install
+a protocol and call the ConnectController service. Now the matching UEFI driver
+is determined by iterating over the implementations of the
+EFI_DRIVER_BINDING_PROTOCOL.
+
+It is the task of the UEFI driver to create a corresponding U-Boot device and to
+proxy calls for this U-Boot device to the controller.
+
+In U-Boot 2018.03 this has only been implemented for block IO devices.
+
+UEFI uclass
+~~~~~~~~~~~
+
+An UEFI uclass driver (lib/efi_driver/efi_uclass.c) has been created that
+takes care of initializing the UEFI drivers and providing the
+EFI_DRIVER_BINDING_PROTOCOL implementation for the UEFI drivers.
+
+A linker created list is used to keep track of the UEFI drivers. To create an
+entry in the list the UEFI driver uses the U_BOOT_DRIVER macro specifying
+UCLASS_EFI_LOADER as the ID of its uclass, e.g::
+
+    /* Identify as UEFI driver */
+    U_BOOT_DRIVER(efi_block) = {
+        .name  = "EFI block driver",
+        .id    = UCLASS_EFI_LOADER,
+        .ops   = &driver_ops,
+    };
+
+The available operations are defined via the structure struct efi_driver_ops::
+
+    struct efi_driver_ops {
+        const efi_guid_t *protocol;
+        const efi_guid_t *child_protocol;
+        int (*bind)(efi_handle_t handle, void *interface);
+    };
+
+When the supported() function of the EFI_DRIVER_BINDING_PROTOCOL is called the
+uclass checks if the protocol GUID matches the protocol GUID of the UEFI driver.
+In the start() function the bind() function of the UEFI driver is called after
+checking the GUID.
+The stop() function of the EFI_DRIVER_BINDING_PROTOCOL disconnects the child
+controllers created by the UEFI driver and the UEFI driver. (In U-Boot v2013.03
+this is not yet completely implemented.)
+
+UEFI block IO driver
+~~~~~~~~~~~~~~~~~~~~
+
+The UEFI block IO driver supports devices exposing the EFI_BLOCK_IO_PROTOCOL.
+
+When connected it creates a new U-Boot block IO device with interface type
+UCLASS_EFI_LOADER, adds child controllers mapping the partitions, and installs
+the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL on these. This can be used together with the
+software iPXE to boot from iSCSI network drives [4].
+
+This driver is only available if U-Boot is configured with::
+
+    CONFIG_BLK=y
+    CONFIG_PARTITIONS=y
+
+Miscellaneous
+-------------
+
+Load file 2 protocol
+~~~~~~~~~~~~~~~~~~~~
+
+The load file 2 protocol can be used by the Linux kernel to load the initial
+RAM disk. U-Boot can be configured to provide an implementation with::
+
+    EFI_LOAD_FILE2_INITRD=y
+
+When the option is enabled the user can add the initrd path with the efidebug
+command.
+
+Load options Boot#### have a FilePathList[] member.  The first element of
+the array (FilePathList[0]) is the EFI binary to execute.  When an initrd
+is specified the Device Path for the initrd is denoted by a VenMedia node
+with the EFI_INITRD_MEDIA_GUID. Each entry of the array is terminated by the
+'end of entire device path' subtype (0xff). If a user wants to define multiple
+initrds, those must by separated by the 'end of this instance' identifier of
+the end node (0x01).
+
+So our final format of the FilePathList[] is::
+
+    Loaded image - end node (0xff) - VenMedia - initrd_1 - [end node (0x01) - initrd_n ...] - end node (0xff)
+
+Links
+-----
+
+* [1] http://uefi.org/specifications - UEFI specifications
+* [2] https://github.com/ARM-software/ebbr/releases/download/v2.1.0/ebbr-v2.1.0.pdf -
+  Embedded Base Boot Requirements (EBBR) Specification - Release v2.1.0
+* [3] https://developer.arm.com/docs/den0044/latest/server-base-boot-requirements-system-software-on-arm-platforms-version-11 -
+  Server Base Boot Requirements System Software on ARM Platforms - Version 1.1
+* [4] :doc:`iscsi`
+* [5] :doc:`../driver-model/index`
diff --git a/doc/develop/vbe.rst b/doc/develop/vbe.rst
new file mode 100644
index 00000000000..cca193c8fd4
--- /dev/null
+++ b/doc/develop/vbe.rst
@@ -0,0 +1,27 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Verified Boot for Embedded (VBE)
+================================
+
+Introduction
+------------
+
+VBE provides a standard boot mechanism for embedded systems. If defines
+how firmware and Operating Systems are located, updated and verified.
+
+Within U-Boot, one or more VBE bootmeths implement the boot logic. For example,
+the vbe-simple bootmeth handles finding the firmware (e.g. in MMC) and starting
+it. Typically the bootmeth is started up in VPL and controls which SPL and
+U-Boot binaries are loaded.
+
+A 'vbe' command provides access to various aspects of VBE's operation, including
+listing methods and getting the status for a method.
+
+For a detailed overview of VBE, see vbe-intro_. A fuller description of
+bootflows is at vbe-bootflows_ and the firmware-update mechanism is described at
+vbe-fwupdate_. VBE OS requests are described at  vbe-osrequests_.
+
+.. _vbe-intro: https://docs.google.com/document/d/e/2PACX-1vQjXLPWMIyVktaTMf8edHZYDrEvMYD_iNzIj1FgPmKF37fpglAC47Tt5cvPBC5fvTdoK-GA5Zv1wifo/pub
+.. _vbe-bootflows: https://docs.google.com/document/d/e/2PACX-1vR0OzhuyRJQ8kdeOibS3xB1rVFy3J4M_QKTM5-3vPIBNcdvR0W8EXu9ymG-yWfqthzWoM4JUNhqwydN/pub
+.. _vbe-fwupdate: https://docs.google.com/document/d/e/2PACX-1vTnlIL17vVbl6TVoTHWYMED0bme7oHHNk-g5VGxblbPiKIdGDALE1HKId8Go5f0g1eziLsv4h9bocbk/pub
+.. _vbe-osrequests: https://docs.google.com/document/d/e/2PACX-1vTHhxX7WSZe68i9rAkW-DHdx6koU-jxYHhamLhZn9GQ9QT2_epSBosMV1_r7yPHOXZccx71rF_t0PXL/pub
diff --git a/doc/develop/version.rst b/doc/develop/version.rst
new file mode 100644
index 00000000000..5c9046aa17a
--- /dev/null
+++ b/doc/develop/version.rst
@@ -0,0 +1,102 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2013 The Chromium OS Authors.
+
+Version information
+===================
+
+U-Boot releases are named by year and patch level, for example 2020.10 means the
+release that came out in October 2020. Release candidates are tagged every few
+weeks as the project heads to the next release. So 2020.10-rc1 was the first
+release candidate (RC), tagged soon after 2020.07 was released.
+
+See https://www.denx.de/wiki/view/U-Boot/ReleaseCycle for full details.
+
+Within the build system, various Makefile variables are created, making use of
+VERSION, PATCHLEVEL and EXTRAVERSION defined at the top of 'Makefile'. There is
+also SUBLEVEL available for downstream use. See also CONFIG_IDENT_STRING.
+
+Some variables end up in a generated header file at
+include/generated/version_autogenerated.h and can be accessed from C source by
+including <version.h>
+
+The following are available:
+
+   UBOOTRELEASE (Makefile)
+      Full release version as a string. If this is not a tagged release, it also
+      includes the number of commits since the last tag as well as the the git
+      hash.  If there are uncommitted changes a '-dirty' suffix is added too.
+
+      This is written by scripts/setlocalversion (maintained by Linux) to
+      include/config/uboot.release and ends up in the UBOOTRELEASE Makefile
+      variable.
+
+      Examples::
+
+         2020.10-rc3
+         2021.01-rc5-00248-g60dd854f3ba-dirty
+
+   PLAIN_VERSION (string #define)
+      This is UBOOTRELEASE but available in C source.
+
+      Examples::
+
+         2020.10
+         2021.01-rc5-00248-g60dd854f3ba-dirty
+
+   UBOOTVERSION (Makefile)
+      This holds just the first three components of UBOOTRELEASE (i.e. not the
+      git hash, etc.)
+
+      Examples::
+
+         2020.10
+         2021.01-rc5
+
+   U_BOOT_VERSION (string #define)
+      "U-Boot " followed by UBOOTRELEASE, for example::
+
+         U-Boot 2020.10
+         U-Boot 2021.01-rc5
+
+      This is used as part of the banner string when U-Boot starts.
+
+   U_BOOT_VERSION_NUM (integer #define)
+      Release year, e.g. 2021 for release 2021.01. Note
+      this is an integer, not a string.
+
+   U_BOOT_VERSION_NUM_PATCH (integer #define)
+      Patch number, e.g. 1 for release 2020.01. Note
+      this is an integer, not a string.
+
+Human readable U-Boot version string is available in header file
+include/version_string.h in following variable:
+
+   version_string (const char[])
+      U_BOOT_VERSION followed by build-time information
+      and CONFIG_IDENT_STRING.
+
+      Examples::
+
+         U-Boot 2020.10 (Jan 06 2021 - 08:50:36 -0700)
+         U-Boot 2021.01-rc5-00248-g60dd854f3ba-dirty (Jan 06 2021 - 08:50:36 -0700) for spring
+
+Build date/time is also included. See the generated file
+include/generated/timestamp_autogenerated.h for the available
+fields. For example::
+
+   #define U_BOOT_DATE "Jan 06 2021"     (US format only)
+   #define U_BOOT_TIME "08:50:36"        (24-hour clock)
+   #define U_BOOT_TZ "-0700"             (Time zone in hours)
+   #define U_BOOT_EPOCH 1609948236
+
+The Epoch is the number of seconds since midnight on 1/1/70. You can convert
+this to a time with::
+
+   $ date -u -d @1609948236
+   Wed 06 Jan 2021 03:50:36 PM UTC
+   $ date -d 'Wed 06 Jan 2021 03:50:36 PM UTC' +%s
+   1609948236
+
+Every time you build U-Boot this will update based on the time
+on your build machine. See 'Reproducible builds' if you want to
+avoid that.
diff --git a/doc/device-tree-bindings/README b/doc/device-tree-bindings/README
new file mode 100644
index 00000000000..2ea3439a170
--- /dev/null
+++ b/doc/device-tree-bindings/README
@@ -0,0 +1,17 @@
+Device Tree Bindings Staging Area
+=================================
+
+This directory contains device tree bindings for U-Boot.
+
+These follow along with Linux kernel bindings, with a few additions. By
+adding the files here, U-Boot patches can clearly show thees additions.
+This makes it easier for device tree people to review these additions in
+patches sent to the U-Boot mailing list.
+
+The intent IS to commit these files to U-Boot. Hopefully at some point
+the files will be stored in another repo (shared with Linux) which is
+brought in as needed. Changes here are intended to mirror changes in the
+Linux Documentation/devicetree/bindings/ directory.
+
+sjg@chromium.org
+17-Jan-12
diff --git a/doc/device-tree-bindings/adc/adc.txt b/doc/device-tree-bindings/adc/adc.txt
new file mode 100644
index 00000000000..463de3c8c23
--- /dev/null
+++ b/doc/device-tree-bindings/adc/adc.txt
@@ -0,0 +1,62 @@
+ADC device binding
+
+There are no mandatory properties for ADC. However, if Voltage info is required,
+then there are two options:
+- use microvolts constraint or
+- use regulator phandle to enable/read supply's Voltage
+
+Properties and constraints:
+*optional and always checked, Voltage polarity info:
+- vdd-polarity-negative:  positive reference Voltage has a negative polarity
+- vss-polarity-negative:  negative reference Voltage has a negative polarity
+
+Chose one option, for each supply (Vdd/Vss):
+
+*optional and always checked, supply Voltage constants:
+- vdd-supply:            phandle to Vdd regulator's node
+- vss-supply:            phandle to Vss regulator's node
+
+*optional and checked only if the above corresponding, doesn't exist:
+- vdd-microvolts:        positive reference Voltage value [uV]
+- vss-microvolts:        negative reference Voltage value [uV]
+
+Example with constant 'Vdd' value:
+adc@1000000 {
+	compatible = "some-adc";
+	reg = <0xaabb000 0x100>;
+	status = "enabled";
+	vdd-microvolts = <1800000>;
+};
+
+Example of supply phandle usage, for the ADC's VDD/VSS references as below:
+   _______         _______
+  |Sandbox|       |Sandbox|
+  : PMIC  :       :  ADC  :
+  .       .       .       .
+  |       | (Vdd) |   AIN0|-->
+  |  BUCK2|-------|VDDref |
+  | (3.3V)|      _|VSSref |
+  |_______|     | |_______|
+               _|_
+
+For the above PMIC, the node can be defined as follows:
+sandbox_pmic {
+	compatible = "sandbox,pmic";
+	...
+	buck2: buck2 {
+		regulator-name = "SUPPLY_3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+	...
+};
+
+For the above ADC, the node can be defined as follows:
+adc@0 {
+	compatible = "sandbox,adc";
+	vdd-supply = <&buck2>;
+	vss-microvolts = <0>;
+};
+
+The ADC uclass code, will enable the supply before start of the conversion,
+but it will not configure the regulator settings.
diff --git a/doc/device-tree-bindings/arm/arm,scmi.txt b/doc/device-tree-bindings/arm/arm,scmi.txt
new file mode 100644
index 00000000000..0a7886da24c
--- /dev/null
+++ b/doc/device-tree-bindings/arm/arm,scmi.txt
@@ -0,0 +1,2 @@
+See Binding in Linux documentation:
+Documentation/devicetree/bindings/firmware/arm,scmi.yaml
diff --git a/doc/device-tree-bindings/arm/l2c2x0.txt b/doc/device-tree-bindings/arm/l2c2x0.txt
new file mode 100644
index 00000000000..fbe6cb21f4c
--- /dev/null
+++ b/doc/device-tree-bindings/arm/l2c2x0.txt
@@ -0,0 +1,114 @@
+* ARM L2 Cache Controller
+
+ARM cores often have a separate L2C210/L2C220/L2C310 (also known as PL210/PL220/
+PL310 and variants) based level 2 cache controller. All these various implementations
+of the L2 cache controller have compatible programming models (Note 1).
+Some of the properties that are just prefixed "cache-*" are taken from section
+3.7.3 of the Devicetree Specification which can be found at:
+https://www.devicetree.org/specifications/
+
+The ARM L2 cache representation in the device tree should be done as follows:
+
+Required properties:
+
+- compatible : should be one of:
+  "arm,pl310-cache"
+  "arm,l220-cache"
+  "arm,l210-cache"
+  "bcm,bcm11351-a2-pl310-cache": DEPRECATED by "brcm,bcm11351-a2-pl310-cache"
+  "brcm,bcm11351-a2-pl310-cache": For Broadcom bcm11351 chipset where an
+     offset needs to be added to the address before passing down to the L2
+     cache controller
+  "marvell,aurora-system-cache": Marvell Controller designed to be
+     compatible with the ARM one, with system cache mode (meaning
+     maintenance operations on L1 are broadcasted to the L2 and L2
+     performs the same operation).
+  "marvell,aurora-outer-cache": Marvell Controller designed to be
+     compatible with the ARM one with outer cache mode.
+  "marvell,tauros3-cache": Marvell Tauros3 cache controller, compatible
+     with arm,pl310-cache controller.
+- cache-unified : Specifies the cache is a unified cache.
+- cache-level : Should be set to 2 for a level 2 cache.
+- reg : Physical base address and size of cache controller's memory mapped
+  registers.
+
+Optional properties:
+
+- arm,data-latency : Cycles of latency for Data RAM accesses. Specifies 3 cells of
+  read, write and setup latencies. Minimum valid values are 1. Controllers
+  without setup latency control should use a value of 0.
+- arm,tag-latency : Cycles of latency for Tag RAM accesses. Specifies 3 cells of
+  read, write and setup latencies. Controllers without setup latency control
+  should use 0. Controllers without separate read and write Tag RAM latency
+  values should only use the first cell.
+- arm,dirty-latency : Cycles of latency for Dirty RAMs. This is a single cell.
+- arm,filter-ranges : <start length> Starting address and length of window to
+  filter. Addresses in the filter window are directed to the M1 port. Other
+  addresses will go to the M0 port.
+- arm,io-coherent : indicates that the system is operating in an hardware
+  I/O coherent mode. Valid only when the arm,pl310-cache compatible
+  string is used.
+- interrupts : 1 combined interrupt.
+- cache-size : specifies the size in bytes of the cache
+- cache-sets : specifies the number of associativity sets of the cache
+- cache-block-size : specifies the size in bytes of a cache block
+- cache-line-size : specifies the size in bytes of a line in the cache,
+  if this is not specified, the line size is assumed to be equal to the
+  cache block size
+- cache-id-part: cache id part number to be used if it is not present
+  on hardware
+- wt-override: If present then L2 is forced to Write through mode
+- arm,double-linefill : Override double linefill enable setting. Enable if
+  non-zero, disable if zero.
+- arm,double-linefill-incr : Override double linefill on INCR read. Enable
+  if non-zero, disable if zero.
+- arm,double-linefill-wrap : Override double linefill on WRAP read. Enable
+  if non-zero, disable if zero.
+- arm,prefetch-drop : Override prefetch drop enable setting. Enable if non-zero,
+  disable if zero.
+- arm,prefetch-offset : Override prefetch offset value. Valid values are
+  0-7, 15, 23, and 31.
+- arm,shared-override : The default behavior of the L220 or PL310 cache
+  controllers with respect to the shareable attribute is to transform "normal
+  memory non-cacheable transactions" into "cacheable no allocate" (for reads)
+  or "write through no write allocate" (for writes).
+  On systems where this may cause DMA buffer corruption, this property must be
+  specified to indicate that such transforms are precluded.
+- arm,parity-enable : enable parity checking on the L2 cache (L220 or PL310).
+- arm,parity-disable : disable parity checking on the L2 cache (L220 or PL310).
+- arm,outer-sync-disable : disable the outer sync operation on the L2 cache.
+  Some core tiles, especially ARM PB11MPCore have a faulty L220 cache that
+  will randomly hang unless outer sync operations are disabled.
+- prefetch-data : Data prefetch. Value: <0> (forcibly disable), <1>
+  (forcibly enable), property absent (retain settings set by firmware)
+- prefetch-instr : Instruction prefetch. Value: <0> (forcibly disable),
+  <1> (forcibly enable), property absent (retain settings set by
+  firmware)
+- arm,dynamic-clock-gating : L2 dynamic clock gating. Value: <0> (forcibly
+  disable), <1> (forcibly enable), property absent (OS specific behavior,
+  preferably retain firmware settings)
+- arm,standby-mode: L2 standby mode enable. Value <0> (forcibly disable),
+  <1> (forcibly enable), property absent (OS specific behavior,
+  preferably retain firmware settings)
+- arm,early-bresp-disable : Disable the CA9 optimization Early BRESP (PL310)
+- arm,full-line-zero-disable : Disable the CA9 optimization Full line of zero
+  write (PL310)
+
+Example:
+
+L2: cache-controller {
+        compatible = "arm,pl310-cache";
+        reg = <0xfff12000 0x1000>;
+        arm,data-latency = <1 1 1>;
+        arm,tag-latency = <2 2 2>;
+        arm,filter-ranges = <0x80000000 0x8000000>;
+        cache-unified;
+        cache-level = <2>;
+	interrupts = <45>;
+};
+
+Note 1: The description in this document doesn't apply to integrated L2
+	cache controllers as found in e.g. Cortex-A15/A7/A57/A53. These
+	integrated L2 controllers are assumed to be all preconfigured by
+	early secure boot code. Thus no need to deal with their configuration
+	in the kernel at all.
diff --git a/doc/device-tree-bindings/ata/intel-sata.txt b/doc/device-tree-bindings/ata/intel-sata.txt
new file mode 100644
index 00000000000..5e4da832a3d
--- /dev/null
+++ b/doc/device-tree-bindings/ata/intel-sata.txt
@@ -0,0 +1,26 @@
+Intel Pantherpoint SATA Device Binding
+======================================
+
+The device tree node which describes the operation of the Intel Pantherpoint
+SATA device is as follows:
+
+Required properties :
+- compatible = "intel,pantherpoint-ahci"
+- intel,sata-mode : string, one of:
+     "ahci" : Use AHCI mode (default)
+     "combined" : Use combined IDE + legacy mode
+     "plain-ide" : Use plain IDE mode
+- intel,sata-port-map : Which SATA ports are enabled, bit 0=enable first port,
+    bit 1=enable second port, etc.
+- intel,sata-port0-gen3-tx : Value for the IOBP_SP0G3IR register
+- intel,sata-port1-gen3-tx : Value for the IOBP_SP1G3IR register
+
+Example
+-------
+
+sata {
+	compatible = "intel,pantherpoint-ahci";
+	intel,sata-mode = "ahci";
+	intel,sata-port-map = <1>;
+	intel,sata-port0-gen3-tx = <0x00880a7f>;
+};
diff --git a/doc/device-tree-bindings/axi/gdsys,ihs_axi.txt b/doc/device-tree-bindings/axi/gdsys,ihs_axi.txt
new file mode 100644
index 00000000000..110788fa918
--- /dev/null
+++ b/doc/device-tree-bindings/axi/gdsys,ihs_axi.txt
@@ -0,0 +1,22 @@
+gdsys AXI busses of IHS FPGA devices
+
+Certain gdsys IHS FPGAs offer a interface to their built-in AXI bus with which
+the connected devices (usually IP cores) can be controlled via software.
+
+Required properties:
+- compatible: must be "gdsys,ihs_axi"
+- reg: describes the address and length of the AXI bus's register map (within
+  the FPGA's register space)
+
+Example:
+
+fpga0_axi_video0 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "gdsys,ihs_axi";
+	reg = <0x170 0x10>;
+
+	axi_dev_1 {
+        ...
+	};
+};
diff --git a/doc/device-tree-bindings/bootcount-syscon.txt b/doc/device-tree-bindings/bootcount-syscon.txt
new file mode 100644
index 00000000000..e124f7b6142
--- /dev/null
+++ b/doc/device-tree-bindings/bootcount-syscon.txt
@@ -0,0 +1,24 @@
+Bootcount Configuration
+This is the implementation of the feature as described in
+https://www.denx.de/wiki/DULG/UBootBootCountLimit.
+
+Required Properties:
+- compatible: must be "u-boot,bootcount-syscon".
+- syscon: reference to the syscon device used.
+- reg: contains address and size of the register and the location and size of the bootcount value.
+	   The driver supports a 4 bytes register length and 2 and 4 bytes bootcount value length.
+- reg-names: must be "syscon_reg", "offset";
+
+Example:
+	...
+	syscon0: syscon@0 {
+		compatible = "sandbox,syscon0";
+		reg = <0x10 16>;
+	};
+	...
+	bootcount@0 {
+		compatible = "u-boot,bootcount-syscon";
+		syscon = <&syscon0>;
+		reg = <0x0 0x04>, <0x0 0x04>;
+		reg-names = "syscon_reg", "offset";
+	};
diff --git a/doc/device-tree-bindings/bootdev.txt b/doc/device-tree-bindings/bootdev.txt
new file mode 100644
index 00000000000..4bb2345a0b9
--- /dev/null
+++ b/doc/device-tree-bindings/bootdev.txt
@@ -0,0 +1,26 @@
+U-Boot boot device (bootdev)
+============================
+
+A bootdev provides a way to obtain a bootflow file from a device. It is a
+child of the media device (UCLASS_MMC, UCLASS_SPI_FLASH, etc.)
+
+The bootdev driver is provided by the media devices. The bindings for each
+are described in this file (to come).
+
+Required properties:
+
+compatible:
+   "u-boot,bootdev-eth" - Ethernet bootdev
+   "u-boot,bootdev-mmc" - MMC bootdev
+   "u-boot,bootdev-usb" - USB bootdev
+
+
+Example:
+
+	mmc1 {
+		compatible = "sandbox,mmc";
+
+		mmc-bootdev {
+			compatible = "u-boot,bootdev-eth";
+		};
+	};
diff --git a/doc/device-tree-bindings/bootmeth.txt b/doc/device-tree-bindings/bootmeth.txt
new file mode 100644
index 00000000000..127b09cd1b2
--- /dev/null
+++ b/doc/device-tree-bindings/bootmeth.txt
@@ -0,0 +1,31 @@
+U-Boot standard boot methods (bootmeth)
+======================================
+
+This provides methods (called bootmeths) for locating bootflows on a boot
+device (bootdev). These are normally created as children of the bootstd device.
+
+Required properties:
+
+compatible:
+   "u-boot,extlinux" - distro boot from a block device
+   "u-boot,extlinux-pxe" - distro boot from a network device
+   "u-boot,distro-efi" - EFI boot from an .efi file
+   "u-boot,efi-bootmgr" - EFI boot using boot manager (bootmgr)
+
+
+Example:
+
+	bootstd {
+		compatible = "u-boot,boot-std";
+
+		filename-prefixes = "/", "/boot/";
+		bootdev-order = "mmc2", "mmc1";
+
+		extlinux {
+			compatible = "u-boot,extlinux";
+		};
+
+		efi {
+			compatible = "u-boot,distro-efi";
+		};
+	};
diff --git a/doc/device-tree-bindings/bootph.yaml b/doc/device-tree-bindings/bootph.yaml
new file mode 100644
index 00000000000..a3ccf06efa7
--- /dev/null
+++ b/doc/device-tree-bindings/bootph.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: BSD-2-Clause
+# Copyright 2022 Google LLC
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bootph.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Boot-phase-specific device nodes
+
+maintainers:
+  - Simon Glass <sjg@chromium.org>
+
+description: |
+  Some programs run in memory-constrained environments yet want to make use
+  of device tree.
+
+  The full device tree is often quite large relative to the available memory
+  of a boot phase, so cannot fit into every phase of the boot process. Even
+  when memory is not a problem, some phases may wish to limit which device
+  nodes are present, so as to reduce execution time.
+
+  This binding supports adding tags to device tree nodes to allow them to be
+  marked according to the phases where they should be included.
+
+  Without any tags, nodes are included only in the final phase, where all
+  memory is available. Any untagged nodes are dropped from previous phases
+  and are ignored before the final phase is reached.
+
+  The build process produces a separate executable for each phase. It can
+  use fdtgrep to drop any nodes which are not needed for a particular build.
+  For example, the pre-sram build will drop any nodes which are not marked
+  with bootph-pre-sram or bootph-all tags.
+
+  Note that phase builds may drop the tags, since they have served their
+  purpose by that point. So when looking at phase-specific device tree files
+  you may not see these tags.
+
+  Multiple tags can be used in the same node.
+
+  Tags in a child node are implied to be present in all parent nodes as well.
+  This is important, since some missing properties (such as "ranges", or
+  "compatible") can cause the child node to be ignored or incorrectly
+  parsed.
+
+  That said, at present, fdtgrep applies tags only to the node they are
+  added to, not to any parents. This means U-Boot device tree files often
+  add the same tag to parent nodes, rather than relying on tooling to do
+  this. This is a limitation of fdtgrep and it will be addressed so that
+  'Linux DTs' do not need to do this.
+
+  The available tags are described as properties below, in order of phase
+  execution.
+
+select: true
+
+properties:
+  bootph-pre-sram:
+    type: boolean
+    description:
+      Enable this node when SRAM is not available. This phase must set up
+      some SRAM or cache-as-RAM so it can obtain data/BSS space to use
+      during execution.
+
+  bootph-verify:
+    type: boolean
+    description:
+      Enable this node in the verification step, which decides which of the
+      available images should be run next.
+
+  bootph-pre-ram:
+    type: boolean
+    description:
+      Enable this node in the phase that sets up SDRAM.
+
+  bootph-some-ram:
+    type: boolean
+    description:
+      Enable this node in the phase that is run after SDRAM is working but
+      before all of it is available. Some RAM is available but it is limited
+      (e.g. it may be split into two pieces by the location of the running
+      program) because the program code is not yet relocated out of the way.
+
+  bootph-all:
+    type: boolean
+    description:
+      Include this node in all phases (for U-Boot see enum u_boot_phase).
+
+additionalProperties: true
diff --git a/doc/device-tree-bindings/bootstd.txt b/doc/device-tree-bindings/bootstd.txt
new file mode 100644
index 00000000000..1f1b9cba601
--- /dev/null
+++ b/doc/device-tree-bindings/bootstd.txt
@@ -0,0 +1,36 @@
+U-Boot standard boot device (bootstd)
+=====================================
+
+This is the controlling device for U-Boot standard boot, providing a way to
+boot operating systems in a way that can be controlled by distros.
+
+Required properties:
+
+compatible: "u-boot,boot-std"
+
+Optional properties:
+
+filename-prefixes:
+   List of strings, each a directory to search for bootflow files
+
+bootdev-order:
+   List of bootdevs to check for bootflows, each a bootdev label (the media
+   uclass followed by the numeric sequence number of the media device)
+
+
+Example:
+
+	bootstd {
+		compatible = "u-boot,boot-std";
+
+		filename-prefixes = "/", "/boot/";
+		bootdev-order = "mmc2", "mmc1";
+
+		extlinux {
+			compatible = "u-boot,extlinux";
+		};
+
+		efi {
+			compatible = "u-boot,distro-efi";
+		};
+	};
diff --git a/doc/device-tree-bindings/bus/simple-pm-bus.txt b/doc/device-tree-bindings/bus/simple-pm-bus.txt
new file mode 100644
index 00000000000..6f15037131e
--- /dev/null
+++ b/doc/device-tree-bindings/bus/simple-pm-bus.txt
@@ -0,0 +1,44 @@
+Simple Power-Managed Bus
+========================
+
+A Simple Power-Managed Bus is a transparent bus that doesn't need a real
+driver, as it's typically initialized by the boot loader.
+
+However, its bus controller is part of a PM domain, or under the control of a
+functional clock.  Hence, the bus controller's PM domain and/or clock must be
+enabled for child devices connected to the bus (either on-SoC or externally)
+to function.
+
+While "simple-pm-bus" follows the "simple-bus" set of properties, as specified
+in the Devicetree Specification, it is not an extension of "simple-bus".
+
+
+Required properties:
+  - compatible: Must contain at least "simple-pm-bus".
+		Must not contain "simple-bus".
+		It's recommended to let this be preceded by one or more
+		vendor-specific compatible values.
+  - #address-cells, #size-cells, ranges: Must describe the mapping between
+		parent address and child address spaces.
+
+Optional platform-specific properties for clock or PM domain control (at least
+one of them is required):
+  - clocks: Must contain a reference to the functional clock(s),
+  - power-domains: Must contain a reference to the PM domain.
+Please refer to the binding documentation for the clock and/or PM domain
+providers for more details.
+
+
+Example:
+
+	bsc: bus@fec10000 {
+		compatible = "renesas,bsc-sh73a0", "renesas,bsc",
+			     "simple-pm-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0x20000000>;
+		reg = <0xfec10000 0x400>;
+		interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&zb_clk>;
+		power-domains = <&pd_a4s>;
+	};
diff --git a/doc/device-tree-bindings/chosen.txt b/doc/device-tree-bindings/chosen.txt
new file mode 100644
index 00000000000..c8312540f57
--- /dev/null
+++ b/doc/device-tree-bindings/chosen.txt
@@ -0,0 +1,163 @@
+The chosen node
+---------------
+The chosen node does not represent a real device, but serves as a place
+for passing data like which serial device to used to print the logs etc
+
+
+stdout-path property
+--------------------
+Device trees may specify the device to be used for boot console output
+with a stdout-path property under /chosen.
+
+Example
+-------
+/ {
+	chosen {
+		stdout-path = "/serial@f00:115200";
+	};
+
+	serial@f00 {
+		compatible = "vendor,some-uart";
+		reg = <0xf00 0x10>;
+	};
+};
+
+tick-timer property
+-------------------
+In a system there are multiple timers, specify which timer to be used
+as the tick-timer. Earlier it was hardcoded in the timer driver now
+since device tree has all the timer nodes. Specify which timer to be
+used as tick timer.
+
+Example
+-------
+/ {
+	chosen {
+		tick-timer = "/timer2@f00";
+	};
+
+	timer2@f00 {
+		compatible = "vendor,some-timer";
+		reg = <0xf00 0x10>;
+	};
+};
+
+u-boot,bootcount-device property
+--------------------------------
+
+In a DM-based system, the bootcount may be stored in a device known to
+the DM framework (e.g. in a battery-backed SRAM area within a RTC
+device) managed by a device conforming to UCLASS_BOOTCOUNT.  If
+multiple such devices are present in a system concurrently, then the
+u-boot,bootcount-device property can select the preferred target.
+
+Example
+-------
+/ {
+	chosen {
+	        u-boot,bootcount-device = &bootcount-rv3029;
+	};
+
+	bootcount-rv3029: bootcount@0 {
+		compatible = "u-boot,bootcount-rtc";
+		rtc = &rv3029;
+		offset = <0x38>;
+	};
+
+	i2c2 {
+	        rv3029: rtc@56 {
+		                compatible = "mc,rv3029";
+		                reg = <0x56>;
+		};
+	};
+};
+
+u-boot,spl-boot-order property
+------------------------------
+
+In a system using an SPL stage and having multiple boot sources
+(e.g. SPI NOR flash, on-board eMMC and a removable SD-card), the boot
+device may be probed by reading the image and verifying an image
+signature.
+
+If the SPL is configured through the device-tree, the boot-order can
+be configured with the spl-boot-order property under the /chosen node.
+Each list element of the property should specify a device to be probed
+in the order they are listed: references (i.e. implicit paths), a full
+path or an alias is expected for each entry.
+
+A special specifier "same-as-spl" can be used at any position in the
+boot-order to direct U-Boot to insert the device the SPL was booted
+from there.  Whether this is indeed inserted or silently ignored (if
+it is not supported on any given SoC/board or if the boot-device is
+not available to continue booting from) is implementation-defined.
+Note that if "same-as-spl" expands to an actual node for a given
+board, the corresponding node may appear multiple times in the
+boot-order (as there currently exists no mechanism to suppress
+duplicates from the list).
+
+Example
+-------
+/ {
+	chosen {
+		u-boot,spl-boot-order = "same-as-spl", &sdmmc, "/sdhci@fe330000";
+	};
+};
+
+u-boot,spl-boot-device property
+-------------------------------
+
+This property is a companion-property to the u-boot,spl-boot-order and
+will be injected automatically by the SPL stage to notify a later stage
+of where said later stage was booted from.
+
+You should not define this property yourself in the device-tree, as it
+may be overwritten without warning.
+
+firmware-loader property
+------------------------
+Multiple file system firmware loader nodes could be defined in device trees for
+multiple storage type and their default partition, then a property
+"firmware-loader" can be used to pass default firmware loader
+node(default storage type) to the firmware loader driver.
+
+Example
+-------
+/ {
+	chosen {
+		firmware-loader = &fs_loader0;
+	};
+
+	fs_loader0: fs-loader@0 {
+		bootph-all;
+		compatible = "u-boot,fs-loader";
+		phandlepart = <&mmc 1>;
+	};
+};
+
+u-boot,acpi-ssdt-order
+----------------------
+
+This provides the ordering to use when writing device data to the ACPI SSDT
+(Secondary System Descriptor Table). Each cell is a phandle pointer to a device
+node to add. The ACPI information is written in this order.
+
+If the ordering does not include all nodes, an error is generated.
+
+e820-entries
+------------
+
+This provides a way to add entries to the e820 table which tells the OS about
+the memory map. The property contains three sets of 64-bit values:
+
+   address   - Start address of region
+   size      - Size of region
+   flags     - Flags (E820_...)
+
+Example:
+
+chosen {
+	e820-entries = /bits/ 64 <
+		IOMAP_P2SB_BAR IOMAP P2SB_SIZE E820_RESERVED
+		MCH_BASE_ADDRESS     MCH_SIZE  E820_RESERVED>;
+};
diff --git a/doc/device-tree-bindings/clock/fixed-factor-clock.txt b/doc/device-tree-bindings/clock/fixed-factor-clock.txt
new file mode 100644
index 00000000000..1bae8527eb9
--- /dev/null
+++ b/doc/device-tree-bindings/clock/fixed-factor-clock.txt
@@ -0,0 +1,24 @@
+Binding for simple fixed factor rate clock sources.
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+Required properties:
+- compatible : shall be "fixed-factor-clock".
+- #clock-cells : from common clock binding; shall be set to 0.
+- clock-div: fixed divider.
+- clock-mult: fixed multiplier.
+- clocks: parent clock.
+
+Optional properties:
+- clock-output-names : From common clock binding.
+
+Example:
+	clock {
+		compatible = "fixed-factor-clock";
+		clocks = <&parentclk>;
+		#clock-cells = <0>;
+		clock-div = <2>;
+		clock-mult = <1>;
+	};
diff --git a/doc/device-tree-bindings/clock/fsl,mpc83xx-clk.txt b/doc/device-tree-bindings/clock/fsl,mpc83xx-clk.txt
new file mode 100644
index 00000000000..8313da85076
--- /dev/null
+++ b/doc/device-tree-bindings/clock/fsl,mpc83xx-clk.txt
@@ -0,0 +1,23 @@
+MPC83xx system clock devices
+
+MPC83xx SoCs supply a variety of clocks to drive various components of a
+system.
+
+Required properties:
+- compatible: must be one of "fsl,mpc8308-clk",
+                             "fsl,mpc8309-clk",
+                             "fsl,mpc8313-clk",
+                             "fsl,mpc8315-clk",
+                             "fsl,mpc832x-clk",
+                             "fsl,mpc8349-clk",
+                             "fsl,mpc8360-clk",
+                             "fsl,mpc8379-clk"
+  depending on which SoC is employed
+- #clock-cells: Must be 1
+
+Example:
+
+socclocks: clocks {
+	compatible = "fsl,mpc832x-clk";
+	#clock-cells = <1>;
+};
diff --git a/doc/device-tree-bindings/clock/microchip,pic32-clock.txt b/doc/device-tree-bindings/clock/microchip,pic32-clock.txt
new file mode 100644
index 00000000000..f185ce0ae19
--- /dev/null
+++ b/doc/device-tree-bindings/clock/microchip,pic32-clock.txt
@@ -0,0 +1,33 @@
+* Microchip PIC32 Clock and Oscillator
+
+Microchip PIC32 clock tree consists of few oscillators, PLLs,
+multiplexers and few divider modules capable of supplying clocks
+to various controllers within SoC and also to off-chip.
+
+PIC32 clock controller output is defined by indices as defined
+in [0]
+
+[0] include/dt-bindings/clock/microchip,clock.h
+
+Required Properties:
+- compatible: should be "microchip,pic32mzda_clk"
+- reg: physical base address of the controller and length of memory mapped
+       region.
+- #clock-cells: should be 1.
+
+Example: Clock controller node:
+
+	clock: clk@1f801200 {
+		compatible = "microchip,pic32mzda-clk";
+		reg = <0x1f801200 0x1000>;
+	};
+
+Example: UART controller node that consumes the clock generated by the clock
+controller:
+
+	uart1: serial@1f822000 {
+		compatible = "microchip,pic32mzda-uart";
+		reg = <0xbf822000 0x50>;
+		interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clock PB2CLK>;
+	};
diff --git a/doc/device-tree-bindings/clock/nvidia,tegra20-car.txt b/doc/device-tree-bindings/clock/nvidia,tegra20-car.txt
new file mode 100644
index 00000000000..5c07fcaed47
--- /dev/null
+++ b/doc/device-tree-bindings/clock/nvidia,tegra20-car.txt
@@ -0,0 +1,207 @@
+NVIDIA Tegra20 Clock And Reset Controller
+
+This binding uses the common clock binding:
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
+for muxing and gating Tegra's clocks, and setting their rates.
+
+Required properties :
+- compatible : Should be "nvidia,tegra20-car"
+- reg : Should contain CAR registers location and length
+- clocks : Should contain phandle and clock specifiers for two clocks:
+  the 32 KHz "32k_in", and the board-specific oscillator "osc".
+- #clock-cells : Should be 1.
+  In clock consumers, this cell represents the clock ID exposed by the CAR.
+
+  The first 96 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB
+  registers. These IDs often match those in the CAR's RST_DEVICES registers,
+  but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In
+  this case, those clocks are assigned IDs above 95 in order to highlight
+  this issue. Implementations that interpret these clock IDs as bit values
+  within the CLK_OUT_ENB or RST_DEVICES registers should be careful to
+  explicitly handle these special cases.
+
+  The balance of the clocks controlled by the CAR are assigned IDs of 96 and
+  above.
+
+  0	cpu
+  1	unassigned
+  2	unassigned
+  3	ac97
+  4	rtc
+  5	tmr
+  6	uart1
+  7	unassigned	(register bit affects uart2 and vfir)
+  8	gpio
+  9	sdmmc2
+  10	unassigned	(register bit affects spdif_in and spdif_out)
+  11	i2s1
+  12	i2c1
+  13	ndflash
+  14	sdmmc1
+  15	sdmmc4
+  16	twc
+  17	pwm
+  18	i2s2
+  19	epp
+  20	unassigned	(register bit affects vi and vi_sensor)
+  21	2d
+  22	usbd
+  23	isp
+  24	3d
+  25	ide
+  26	disp2
+  27	disp1
+  28	host1x
+  29	vcp
+  30	unassigned
+  31	cache2
+
+  32	mem
+  33	ahbdma
+  34	apbdma
+  35	unassigned
+  36	kbc
+  37	stat_mon
+  38	pmc
+  39	fuse
+  40	kfuse
+  41	sbc1
+  42	snor
+  43	spi1
+  44	sbc2
+  45	xio
+  46	sbc3
+  47	dvc
+  48	dsi
+  49	unassigned	(register bit affects tvo and cve)
+  50	mipi
+  51	hdmi
+  52	csi
+  53	tvdac
+  54	i2c2
+  55	uart3
+  56	unassigned
+  57	emc
+  58	usb2
+  59	usb3
+  60	mpe
+  61	vde
+  62	bsea
+  63	bsev
+
+  64	speedo
+  65	uart4
+  66	uart5
+  67	i2c3
+  68	sbc4
+  69	sdmmc3
+  70	pcie
+  71	owr
+  72	afi
+  73	csite
+  74	unassigned
+  75	avpucq
+  76	la
+  77	unassigned
+  78	unassigned
+  79	unassigned
+  80	unassigned
+  81	unassigned
+  82	unassigned
+  83	unassigned
+  84	irama
+  85	iramb
+  86	iramc
+  87	iramd
+  88	cram2
+  89	audio_2x	a/k/a audio_2x_sync_clk
+  90	clk_d
+  91	unassigned
+  92	sus
+  93	cdev1
+  94	cdev2
+  95	unassigned
+
+  96	uart2
+  97	vfir
+  98	spdif_in
+  99	spdif_out
+  100	vi
+  101	vi_sensor
+  102	tvo
+  103	cve
+  104	osc
+  105	clk_32k		a/k/a clk_s
+  106	clk_m
+  107	sclk
+  108	cclk
+  109	hclk
+  110	pclk
+  111	blink
+  112	pll_a
+  113	pll_a_out0
+  114	pll_c
+  115	pll_c_out1
+  116	pll_d
+  117	pll_d_out0
+  118	pll_e
+  119	pll_m
+  120	pll_m_out1
+  121	pll_p
+  122	pll_p_out1
+  123	pll_p_out2
+  124	pll_p_out3
+  125	pll_p_out4
+  126	pll_s
+  127	pll_u
+  128	pll_x
+  129	cop		a/k/a avp
+  130	audio		a/k/a audio_sync_clk
+
+Example SoC include file:
+
+/ {
+	tegra_car: clock@60006000 {
+		compatible = "nvidia,tegra20-car";
+		reg = <0x60006000 0x1000>;
+		#clock-cells = <1>;
+	};
+
+	usb@c5004000 {
+		clocks = <&tegra_car 58>; /* usb2 */
+	};
+};
+
+Example board file:
+
+/ {
+	clocks {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		osc: clock {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <12000000>;
+		};
+	};
+
+	i2c@7000d000 {
+		pmic@34 {
+			compatible = "ti,tps6586x";
+			reg = <0x34>;
+
+			clk_32k: clock {
+				compatible = "fixed-clock";
+				#clock-cells = <0>;
+				clock-frequency = <32768>;
+			};
+		};
+	};
+
+	&tegra_car {
+		clocks = <&clk_32k> <&osc>;
+	};
+};
diff --git a/doc/device-tree-bindings/clock/rockchip,rk3188-cru.txt b/doc/device-tree-bindings/clock/rockchip,rk3188-cru.txt
new file mode 100644
index 00000000000..0c2bf5eba43
--- /dev/null
+++ b/doc/device-tree-bindings/clock/rockchip,rk3188-cru.txt
@@ -0,0 +1,61 @@
+* Rockchip RK3188/RK3066 Clock and Reset Unit
+
+The RK3188/RK3066 clock controller generates and supplies clock to various
+controllers within the SoC and also implements a reset controller for SoC
+peripherals.
+
+Required Properties:
+
+- compatible: should be "rockchip,rk3188-cru", "rockchip,rk3188a-cru" or
+			"rockchip,rk3066a-cru"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- #clock-cells: should be 1.
+- #reset-cells: should be 1.
+
+Optional Properties:
+
+- rockchip,grf: phandle to the syscon managing the "general register files"
+  If missing pll rates are not changable, due to the missing pll lock status.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. All available clocks are defined as
+preprocessor macros in the dt-bindings/clock/rk3188-cru.h and
+dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.
+Similar macros exist for the reset sources in these files.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "xin24m" - crystal input - required,
+ - "xin32k" - rtc clock - optional,
+ - "xin27m" - 27mhz crystal input on rk3066 - optional,
+ - "ext_hsadc" - external HSADC clock - optional,
+ - "ext_cif0" - external camera clock - optional,
+ - "ext_rmii" - external RMII clock - optional,
+ - "ext_jtag" - externalJTAG clock - optional
+
+Example: Clock controller node:
+
+	cru: cru@20000000 {
+		compatible = "rockchip,rk3188-cru";
+		reg = <0x20000000 0x1000>;
+		rockchip,grf = <&grf>;
+
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+Example: UART controller node that consumes the clock generated by the clock
+  controller:
+
+	uart0: serial@10124000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x10124000 0x400>;
+		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <1>;
+		clocks = <&cru SCLK_UART0>;
+	};
diff --git a/doc/device-tree-bindings/clock/rockchip,rk3288-cru.txt b/doc/device-tree-bindings/clock/rockchip,rk3288-cru.txt
new file mode 100644
index 00000000000..c9fbb76573e
--- /dev/null
+++ b/doc/device-tree-bindings/clock/rockchip,rk3288-cru.txt
@@ -0,0 +1,61 @@
+* Rockchip RK3288 Clock and Reset Unit
+
+The RK3288 clock controller generates and supplies clock to various
+controllers within the SoC and also implements a reset controller for SoC
+peripherals.
+
+Required Properties:
+
+- compatible: should be "rockchip,rk3288-cru"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- #clock-cells: should be 1.
+- #reset-cells: should be 1.
+
+Optional Properties:
+
+- rockchip,grf: phandle to the syscon managing the "general register files"
+  If missing pll rates are not changable, due to the missing pll lock status.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. All available clocks are defined as
+preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be
+used in device tree sources. Similar macros exist for the reset sources in
+these files.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "xin24m" - crystal input - required,
+ - "xin32k" - rtc clock - optional,
+ - "ext_i2s" - external I2S clock - optional,
+ - "ext_hsadc" - external HSADC clock - optional,
+ - "ext_edp_24m" - external display port clock - optional,
+ - "ext_vip" - external VIP clock - optional,
+ - "ext_isp" - external ISP clock - optional,
+ - "ext_jtag" - external JTAG clock - optional
+
+Example: Clock controller node:
+
+	cru: cru@20000000 {
+		compatible = "rockchip,rk3188-cru";
+		reg = <0x20000000 0x1000>;
+		rockchip,grf = <&grf>;
+
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+Example: UART controller node that consumes the clock generated by the clock
+  controller:
+
+	uart0: serial@10124000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x10124000 0x400>;
+		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+		reg-shift = <2>;
+		reg-io-width = <1>;
+		clocks = <&cru SCLK_UART0>;
+	};
diff --git a/doc/device-tree-bindings/clock/rockchip,rk3288-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3288-dmc.txt
new file mode 100644
index 00000000000..2ca9db70a98
--- /dev/null
+++ b/doc/device-tree-bindings/clock/rockchip,rk3288-dmc.txt
@@ -0,0 +1,155 @@
+Rockchip Dynamic Memory Controller Driver
+Required properties:
+- compatible: "rockchip,rk3288-dmc", "syscon"
+- rockchip,cru: this driver should access cru regs, so need get cru here
+- rockchip,grf: this driver should access grf regs, so need get grf here
+- rockchip,pmu: this driver should access pmu regs, so need get pmu here
+- rockchip,sgrf: this driver should access sgrf regs, so need get sgrf here
+- rockchip,noc: this driver should access noc regs, so need get noc here
+- reg: dynamic ram protocol controller(PCTL) address and phy controller(PHYCTL) address
+- clock: must include clock specifiers corresponding to entries in the clock-names property.
+- clock-output-names: from common clock binding to override the default output clock name
+    Must contain
+      pclk_ddrupctl0: support clock for access protocol controller registers of channel 0
+      pclk_publ0: support clock for access phy controller registers of channel 0
+      pclk_ddrupctl1: support clock for access protocol controller registers of channel 1
+      pclk_publ1: support clock for access phy controller registers of channel 1
+      arm_clk: for get arm frequency
+-logic-supply: this driver should adjust VDD_LOGIC according to dmc frequency, so need get logic-supply here
+-timings:
+    Must contain
+      rockchip,odt-disable-freq: if ddr clock frequency low than odt-disable-freq,this driver should disable DDR ODT
+      rockchip,dll-disable-freq: if ddr clock frequency low than dll-disable-freq,this driver should disable DDR DLL
+      rockchip,sr-enable-freq: if ddr clock frequency high than sr-enable-freq,this driver should enable the automatic self refresh function
+      rockchip,pd-enable-freq: if ddr clock frequency high than pd-enable-freq,this driver should enable the automatic power down function
+      rockchip,auto-self-refresh-cnt: Self Refresh idle period. Memories are placed into Self-Refresh mode if the NIF is idle in Access state for auto-self-refresh-cnt * 32 * n_clk cycles.The automatic self refresh function is disabled when auto-self-refresh-cnt=0.
+      rockchip,auto-power-down-cnt: Power-down idle period. Memories are placed into power-down mode if the NIF is idle for auto-power-down-cnt n_clk cycles.The automatic power down function is disabled when auto-power-down-cnt=0.
+      rockchip,ddr-speed-bin: DDR3 type,AC timing parameters from the memory data-sheet
+        0.DDR3_800D (5-5-5)
+        1.DDR3_800E (6-6-6)
+        2.DDR3_1066E (6-6-6)
+        3.DDR3_1066F (7-7-7)
+        4.DDR3_1066G (8-8-8)
+        5.DDR3_1333F (7-7-7)
+        6.DDR3_1333G (8-8-8)
+        7.DDR3_1333H (9-9-9)
+        8.DDR3_1333J (10-10-10)
+        9.DDR3_1600G (8-8-8)
+        10.DDR3_1600H (9-9-9)
+        11.DDR3_1600J (10-10-10)
+        12.DDR3_1600K (11-11-11)
+        13.DDR3_1866J (10-10-10)
+        14.DDR3_1866K (11-11-11)
+        15.DDR3_1866L (12-12-12)
+        16.DDR3_1866M (13-13-13)
+        17.DDR3_2133K (11-11-11)
+        18.DDR3_2133L (12-12-12)
+        19.DDR3_2133M (13-13-13)
+        20.DDR3_2133N (14-14-14)
+        21.DDR3_DEFAULT
+      rockchip,trcd: tRCD,AC timing parameters from the memory data-sheet
+      rockchip,trp: tRP,AC timing parameters from the memory data-sheet
+-rockchip,num-channels: number of SDRAM channels (1 or 2)
+-rockchip,pctl-timing: parameters for the SDRAM setup, in this order:
+	togcnt1u
+	tinit
+	trsth
+	togcnt100n
+	trefi
+	tmrd
+	trfc
+	trp
+	trtw
+	tal
+	tcl
+	tcwl
+	tras
+	trc
+	trcd
+	trrd
+	trtp
+	twr
+	twtr
+	texsr
+	txp
+	txpdll
+	tzqcs
+	tzqcsi
+	tdqs
+	tcksre
+	tcksrx
+	tcke
+	tmod
+	trstl
+	tzqcl
+	tmrr
+	tckesr
+	tdpd
+-rockchip,phy-timing: PHY timing information in this order:
+	dtpr0
+	dtpr1
+	dtpr2
+	mr0..mr3
+-rockchip,sdram-channel: SDRAM channel information, each 8 bits. Both channels
+will be set up the same. The parameters are in this order:
+	rank
+	col
+	bk
+	bw
+	dbw
+	row_3_4
+	cs0_row
+	cs1_row
+- rockchip,sdram-params: SDRAM base parameters, in this order:
+	NOC timing	- value for ddrtiming register
+	NOC activate	- value for activate register
+	ddrconf		- value for ddrconf register
+	DDR frequency in MHz
+	DRAM type (3=DDR3, 6=LPDDR3)
+	stride		- stride value for soc_con2 register
+	odt             - 1 to enable DDR ODT, 0 to disable
+
+Example:
+	dmc: dmc@ff610000 {
+		compatible = "rockchip,rk3288-dmc", "syscon";
+		rockchip,cru = <&cru>;
+		rockchip,grf = <&grf>;
+		rockchip,pmu = <&pmu>;
+		rockchip,sgrf = <&sgrf>;
+		rockchip,noc = <&noc>;
+		reg = <0xff610000 0x3fc
+		       0xff620000 0x294
+		       0xff630000 0x3fc
+		       0xff640000 0x294>;
+		clocks = <&cru PCLK_DDRUPCTL0>, <&cru PCLK_PUBL0>,
+			 <&cru PCLK_DDRUPCTL1>, <&cru PCLK_PUBL1>,
+			 <&cru ARMCLK>;
+		clock-names = "pclk_ddrupctl0", "pclk_publ0",
+			      "pclk_ddrupctl1", "pclk_publ1",
+			      "arm_clk";
+	};
+
+	&dmc {
+		logic-supply = <&vdd_logic>;
+		timings {
+			rockchip,odt-disable-freq = <333000000>;
+			rockchip,dll-disable-freq = <333000000>;
+			rockchip,sr-enable-freq = <333000000>;
+			rockchip,pd-enable-freq = <666000000>;
+			rockchip,auto-self-refresh-cnt = <0>;
+			rockchip,auto-power-down-cnt = <64>;
+			rockchip,ddr-speed-bin = <21>;
+			rockchip,trcd = <10>;
+			rockchip,trp = <10>;
+		};
+		rockchip,num-channels = <2>;
+		rockchip,pctl-timing = <0x29a 0x1f4 0xc8 0x42 0x4e 0x4 0xea 0xa
+			0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+			0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+			0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+			0x5 0x0>;
+		rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+			0xa60 0x40 0x10 0x0>;
+		rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf>;
+		rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
+	};
diff --git a/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt b/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt
new file mode 100644
index 00000000000..da474fbabde
--- /dev/null
+++ b/doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt
@@ -0,0 +1,67 @@
+RK3368 dynamic memory controller driver
+=======================================
+
+The RK3368 DMC (dynamic memory controller) driver supports setup/initialisation
+during TPL using configuration data from the DTS (i.e. OF_PLATDATA), based on
+the following key configuration data:
+  (a) a target-frequency (i.e. operating point) for the memory operation
+  (b) a speed-bin (as defined in JESD-79) for the DDR3 used in hardware
+  (c) a memory-schedule (i.e. mapping from physical addresses to the address
+      pins of the memory bus)
+
+Required properties
+-------------------
+
+- compatible: "rockchip,rk3368-dmc"
+- reg
+    protocol controller (PCTL) address and PHY controller (DDRPHY) address
+- rockchip,ddr-speed-bin
+    the DDR3 device's speed-bin (as specified according to JESD-79)
+        DDR3_800D (5-5-5)
+        DDR3_800E (6-6-6)
+        DDR3_1066E (6-6-6)
+        DDR3_1066F (7-7-7)
+        DDR3_1066G (8-8-8)
+        DDR3_1333F (7-7-7)
+        DDR3_1333G (8-8-8)
+        DDR3_1333H (9-9-9)
+        DDR3_1333J (10-10-10)
+        DDR3_1600G (8-8-8)
+        DDR3_1600H (9-9-9)
+        DDR3_1600J (10-10-10)
+        DDR3_1600K (11-11-11)
+        DDR3_1866J (10-10-10)
+        DDR3_1866K (11-11-11)
+        DDR3_1866L (12-12-12)
+        DDR3_1866M (13-13-13)
+        DDR3_2133K (11-11-11)
+        DDR3_2133L (12-12-12)
+        DDR3_2133M (13-13-13)
+        DDR3_2133N (14-14-14)
+- rockchip,ddr-frequency:
+    target DDR clock frequency in Hz (not all frequencies may be supported,
+    as there's some cooperation from the clock-driver required)
+- rockchip,memory-schedule:
+    controls the decoding of physical addresses to DRAM addressing (i.e. how
+    the physical address maps onto the address pins/chip-select of the device)
+	DMC_MSCH_CBDR: column -> bank -> device -> row
+	DMC_MSCH_CBRD: column -> band -> row -> device
+	DMC_MSCH_CRBD: column -> row -> band -> device
+
+Example (for DDR3-1600K and 800MHz)
+-----------------------------------
+
+	#include <dt-bindings/memory/rk3368-dmc.h>
+
+	dmc: dmc@ff610000 {
+	        bootph-all;
+		compatible = "rockchip,rk3368-dmc";
+		reg = <0 0xff610000 0 0x400
+		       0 0xff620000 0 0x400>;
+	};
+
+	&dmc {
+		rockchip,ddr-speed-bin = <DDR3_1600K>;
+		rockchip,ddr-frequency = <800000000>;
+		rockchip,memory-schedule = <DMC_MSCH_CBRD>;
+	};
diff --git a/doc/device-tree-bindings/clock/rockchip.txt b/doc/device-tree-bindings/clock/rockchip.txt
new file mode 100644
index 00000000000..22f6769e5d4
--- /dev/null
+++ b/doc/device-tree-bindings/clock/rockchip.txt
@@ -0,0 +1,77 @@
+Device Tree Clock bindings for arch-rockchip
+
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+
+== Gate clocks ==
+
+These bindings are deprecated!
+Please use the soc specific CRU bindings instead.
+
+The gate registers form a continuos block which makes the dt node
+structure a matter of taste, as either all gates can be put into
+one gate clock spanning all registers or they can be divided into
+the 10 individual gates containing 16 clocks each.
+The code supports both approaches.
+
+Required properties:
+- compatible : "rockchip,rk2928-gate-clk"
+- reg : shall be the control register address(es) for the clock.
+- #clock-cells : from common clock binding; shall be set to 1
+- clock-output-names : the corresponding gate names that the clock controls
+- clocks : should contain the parent clock for each individual gate,
+  therefore the number of clocks elements should match the number of
+  clock-output-names
+
+Example using multiple gate clocks:
+
+		clk_gates0: gate-clk@200000d0 {
+			compatible = "rockchip,rk2928-gate-clk";
+			reg = <0x200000d0 0x4>;
+			clocks = <&dummy>, <&dummy>,
+				 <&dummy>, <&dummy>,
+				 <&dummy>, <&dummy>,
+				 <&dummy>, <&dummy>,
+				 <&dummy>, <&dummy>,
+				 <&dummy>, <&dummy>,
+				 <&dummy>, <&dummy>,
+				 <&dummy>, <&dummy>;
+
+			clock-output-names =
+				"gate_core_periph", "gate_cpu_gpll",
+				"gate_ddrphy", "gate_aclk_cpu",
+				"gate_hclk_cpu", "gate_pclk_cpu",
+				"gate_atclk_cpu", "gate_i2s0",
+				"gate_i2s0_frac", "gate_i2s1",
+				"gate_i2s1_frac", "gate_i2s2",
+				"gate_i2s2_frac", "gate_spdif",
+				"gate_spdif_frac", "gate_testclk";
+
+			#clock-cells = <1>;
+		};
+
+		clk_gates1: gate-clk@200000d4 {
+			compatible = "rockchip,rk2928-gate-clk";
+			reg = <0x200000d4 0x4>;
+			clocks = <&xin24m>, <&xin24m>,
+				 <&xin24m>, <&dummy>,
+				 <&dummy>, <&xin24m>,
+				 <&xin24m>, <&dummy>,
+				 <&xin24m>, <&dummy>,
+				 <&xin24m>, <&dummy>,
+				 <&xin24m>, <&dummy>,
+				 <&xin24m>, <&dummy>;
+
+			clock-output-names =
+				"gate_timer0", "gate_timer1",
+				"gate_timer2", "gate_jtag",
+				"gate_aclk_lcdc1_src", "gate_otgphy0",
+				"gate_otgphy1", "gate_ddr_gpll",
+				"gate_uart0", "gate_frac_uart0",
+				"gate_uart1", "gate_frac_uart1",
+				"gate_uart2", "gate_frac_uart2",
+				"gate_uart3", "gate_frac_uart3";
+
+			#clock-cells = <1>;
+		};
diff --git a/doc/device-tree-bindings/clock/snps,hsdk-cgu.txt b/doc/device-tree-bindings/clock/snps,hsdk-cgu.txt
new file mode 100644
index 00000000000..82fe1dd83ca
--- /dev/null
+++ b/doc/device-tree-bindings/clock/snps,hsdk-cgu.txt
@@ -0,0 +1,35 @@
+* Synopsys HSDK clock generation unit
+
+The Synopsys HSDK clock controller generates and supplies clock to various
+controllers and peripherals within the SoC.
+
+Required Properties:
+
+- compatible: should be "snps,hsdk-cgu-clock"
+- reg: the pair of physical base address and length of clock generation unit
+  memory mapped region and creg arc core divider memory mapped region.
+- #clock-cells: should be 1.
+
+Each clock is assigned an identifier and client nodes can use this identifier
+to specify the clock which they consume. All available clocks are defined as
+preprocessor macros in the dt-bindings/clock/snps,hsdk-cgu.h headers and can be
+used in device tree sources.
+
+Example: Clock controller node:
+
+	cgu_clk: cgu-clk@f0000000 {
+		compatible = "snps,hsdk-cgu-clock";
+		reg = <0xf0000000 0x1000>, <0xf00014B8 0x4>;
+		#clock-cells = <1>;
+	};
+
+Example: UART controller node that consumes the clock generated by the clock
+controller:
+
+	uart0: serial0@f0005000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0xf0005000 0x1000>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		clocks = <&cgu_clk CLK_SYS_UART_REF>;
+	};
diff --git a/doc/device-tree-bindings/clock/st,stm32mp1.txt b/doc/device-tree-bindings/clock/st,stm32mp1.txt
new file mode 100644
index 00000000000..e638bcef7bc
--- /dev/null
+++ b/doc/device-tree-bindings/clock/st,stm32mp1.txt
@@ -0,0 +1,405 @@
+STMicroelectronics STM32MP1 clock tree initialization
+=====================================================
+
+The STM32MP1 clock tree initialization is based on device tree information
+for RCC IP node (st,stm32mp1-rcc) and on fixed-clock nodes.
+
+RCC IP = st,stm32mp1-rcc
+========================
+
+The RCC IP is both a reset and a clock controller but this documentation only
+describes the fields added for clock tree initialization which are not present
+in Linux binding for compatible "st,stm32mp1-rcc" defined in st,stm32mp1-rcc.txt
+file.
+
+This parent node may optionally have additional children nodes which define
+specific init values for RCC elements.
+
+The added properties for clock tree initialization are:
+
+Required properties:
+- st,clksrc : The clock sources configuration array in a platform specific
+              order.
+
+  For the STM32MP15x family there are 9 clock sources selector which are
+  configured in the following order:
+	MPU AXI MCU PLL12 PLL3 PLL4 RTC MCO1 MCO2
+
+  Clock source configuration values are defined by macros CLK_<NAME>_<SOURCE>
+  from dt-bindings/clock/stm32mp1-clksrc.h.
+
+  Example:
+	st,clksrc = <
+		CLK_MPU_PLL1P
+		CLK_AXI_PLL2P
+		CLK_MCU_PLL3P
+		CLK_PLL12_HSE
+		CLK_PLL3_HSE
+		CLK_PLL4_HSE
+		CLK_RTC_LSE
+		CLK_MCO1_DISABLED
+		CLK_MCO2_DISABLED
+	>;
+
+- st,clkdiv : The clock main dividers value specified in an array
+              in a platform specific order.
+
+  When used, it shall describe the whole clock dividers tree.
+
+  For the STM32MP15x family there are 11 dividers values expected.
+  They shall be configured in the following order:
+		MPU AXI MCU APB1 APB2 APB3 APB4 APB5 RTC MCO1 MCO2
+
+  The each divider value uses the DIV coding defined in RCC associated
+  register RCC_xxxDIVR. In most the case, it is:
+		0x0: not divided
+		0x1: division by 2
+		0x2: division by 4
+		0x3: division by 8
+		...
+
+  Note that for RTC MCO1 MCO2, the coding is different:
+		0x0: not divided
+		0x1: division by 2
+		0x2: division by 3
+		0x3: division by 4
+		...
+
+  Example:
+	st,clkdiv = <
+		1 /*MPU*/
+		0 /*AXI*/
+		0 /*MCU*/
+		1 /*APB1*/
+		1 /*APB2*/
+		1 /*APB3*/
+		1 /*APB4*/
+		2 /*APB5*/
+		23 /*RTC*/
+		0 /*MCO1*/
+		0 /*MCO2*/
+	>;
+
+Optional Properties:
+- children for a PLL configuration with "st,stm32mp1-pll" compatible
+
+  each PLL children nodes for PLL1 to PLL4 (see ref manual for details)
+  are listed with associated reg 0 to 3.
+  PLLx is off when the associated node is absent or deactivated.
+
+  For PLL1, when the node is absent, the frequency of the OPP node is used
+  to compute the PLL setting (see compatible "operating-points-v2" in
+  opp/opp.txt for details).
+
+  Here are the available properties for each PLL node:
+    - compatible: should be "st,stm32mp1-pll"
+
+    - reg: index of the pll instance
+
+    - cfg: The parameters for PLL configuration in the following order:
+           DIVM DIVN DIVP DIVQ DIVR Output.
+
+	DIVx values are defined as in RCC spec:
+		0x0: bypass (division by 1)
+		0x1: division by 2
+		0x2: division by 3
+		0x3: division by 4
+		...
+
+	Output contains a bitfield for each output value (1:ON/0:OFF)
+		BIT(0) => output P : DIVPEN
+		BIT(1) => output Q : DIVQEN
+		BIT(2) => output R : DIVREN
+	  NB: macro PQR(p,q,r) can be used to build this value
+	      with p,q,r = 0 or 1.
+
+    - frac : Fractional part of the multiplication factor
+             (optional, PLL is in integer mode when absent).
+
+    - csg : Clock Spreading Generator (optional) with parameters in the
+	    following order: MOD_PER INC_STEP SSCG_MODE.
+
+	MOD_PER: Modulation Period Adjustment
+	INC_STEP: Modulation Depth Adjustment
+	SSCG_MODE: Spread spectrum clock generator mode, with associated
+		   defined from stm32mp1-clksrc.h:
+			- SSCG_MODE_CENTER_SPREAD = 0
+			- SSCG_MODE_DOWN_SPREAD = 1
+
+    Example:
+	st,pll@0 {
+		compatible = "st,stm32mp1-pll";
+		reg = <0>;
+		cfg = < 1 53 0 0 0 1 >;
+		frac = < 0x810 >;
+	};
+	st,pll@1 {
+		compatible = "st,stm32mp1-pll";
+		reg = <1>;
+		cfg = < 1 43 1 0 0 PQR(0,1,1) >;
+		csg = < 10 20 1 >;
+	};
+	st,pll@2 {
+		compatible = "st,stm32mp1-pll";
+		reg = <2>;
+		cfg = < 2 85 3 13 3 0 >;
+		csg = < 10 20 SSCG_MODE_CENTER_SPREAD >;
+		};
+	st,pll@3 {
+		compatible = "st,stm32mp1-pll";
+		reg = <3>;
+		cfg = < 2 78 4 7 9 3 >;
+	};
+
+- st,pkcs : used to configure the peripherals kernel clock selection.
+
+  The property is a list of peripheral kernel clock source identifiers defined
+  by macros CLK_<KERNEL-CLOCK>_<PARENT-CLOCK> as defined by header file
+  dt-bindings/clock/stm32mp1-clksrc.h.
+
+  st,pkcs may not list all the kernel clocks and has no ordering requirements.
+
+  Example:
+	st,pkcs = <
+		CLK_STGEN_HSE
+		CLK_CKPER_HSI
+		CLK_USBPHY_PLL2P
+		CLK_DSI_PLL2Q
+		CLK_I2C46_HSI
+		CLK_UART1_HSI
+		CLK_UART24_HSI
+	>;
+
+other clocks = fixed-clock
+==========================
+
+The clock tree is also based on 5 fixed-clock in clocks node
+used to define the state of associated ST32MP1 oscillators:
+  - clk-lsi
+  - clk-lse
+  - clk-hsi
+  - clk-hse
+  - clk-csi
+
+At boot the clock tree initialization will
+  - enable oscillators present in device tree and not disabled
+    (node with status="disabled"),
+  - disable HSI oscillator if the node is absent (always activated by bootrom)
+    and not disabled (node with status="disabled").
+
+Optional properties :
+
+a) for external oscillator: "clk-lse", "clk-hse"
+
+  4 optional fields are managed
+  - "st,bypass" configures the oscillator bypass mode (HSEBYP, LSEBYP)
+  - "st,digbypass" configures the bypass mode as full-swing digital
+    signal (DIGBYP)
+  - "st,css" activates the clock security system (HSECSSON, LSECSSON)
+  - "st,drive" (only for LSE) contains the value of the drive for the
+     oscillator (see LSEDRV_ defined in the file
+     dt-bindings/clock/stm32mp1-clksrc.h)
+
+  Example board file:
+	/ {
+		clocks {
+			clk_hse: clk-hse {
+				#clock-cells = <0>;
+				compatible = "fixed-clock";
+				clock-frequency = <64000000>;
+				st,bypass;
+			};
+
+			clk_lse: clk-lse {
+				#clock-cells = <0>;
+				compatible = "fixed-clock";
+				clock-frequency = <32768>;
+				st,css;
+				st,drive = <LSEDRV_LOWEST>;
+			};
+	};
+
+b) for internal oscillator: "clk-hsi"
+
+  Internally HSI clock is fixed to 64MHz for STM32MP157 SoC.
+  In device tree, clk-hsi is the clock after HSIDIV (clk_hsi in RCC
+  doc). So this clock frequency is used to compute the expected HSI_DIV
+  for the clock tree initialization.
+
+  Example with HSIDIV = /1:
+	/ {
+		clocks {
+			clk_hsi: clk-hsi {
+				#clock-cells = <0>;
+				compatible = "fixed-clock";
+				clock-frequency = <64000000>;
+			};
+	};
+
+  Example with HSIDIV = /2
+	/ {
+		clocks {
+			clk_hsi: clk-hsi {
+				#clock-cells = <0>;
+				compatible = "fixed-clock";
+				clock-frequency = <32000000>;
+			};
+	};
+
+Example of clock tree initialization
+====================================
+
+/ {
+	clocks {
+		bootph-all;
+		clk_hse: clk-hse {
+			bootph-all;
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <24000000>;
+			st,digbypass;
+		};
+
+		clk_hsi: clk-hsi {
+			bootph-all;
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <64000000>;
+		};
+
+		clk_lse: clk-lse {
+			bootph-all;
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <32768>;
+		};
+
+		clk_lsi: clk-lsi {
+			bootph-all;
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <32000>;
+		};
+
+		clk_csi: clk-csi {
+			bootph-all;
+			#clock-cells = <0>;
+			compatible = "fixed-clock";
+			clock-frequency = <4000000>;
+		};
+	};
+
+	soc {
+
+		rcc: rcc@50000000 {
+			bootph-all;
+			compatible = "st,stm32mp1-rcc", "syscon";
+			reg = <0x50000000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+
+			st,clksrc = <
+				CLK_MPU_PLL1P
+				CLK_AXI_PLL2P
+				CLK_MCU_PLL3P
+				CLK_PLL12_HSE
+				CLK_PLL3_HSE
+				CLK_PLL4_HSE
+				CLK_RTC_LSE
+				CLK_MCO1_DISABLED
+				CLK_MCO2_DISABLED
+			>;
+
+			st,clkdiv = <
+				1 /*MPU*/
+				0 /*AXI*/
+				0 /*MCU*/
+				1 /*APB1*/
+				1 /*APB2*/
+				1 /*APB3*/
+				1 /*APB4*/
+				2 /*APB5*/
+				23 /*RTC*/
+				0 /*MCO1*/
+				0 /*MCO2*/
+			>;
+
+			st,pkcs = <
+				CLK_CKPER_HSE
+				CLK_FMC_ACLK
+				CLK_QSPI_ACLK
+				CLK_ETH_DISABLED
+				CLK_SDMMC12_PLL4P
+				CLK_DSI_DSIPLL
+				CLK_STGEN_HSE
+				CLK_USBPHY_HSE
+				CLK_SPI2S1_PLL3Q
+				CLK_SPI2S23_PLL3Q
+				CLK_SPI45_HSI
+				CLK_SPI6_HSI
+				CLK_I2C46_HSI
+				CLK_SDMMC3_PLL4P
+				CLK_USBO_USBPHY
+				CLK_ADC_CKPER
+				CLK_CEC_LSE
+				CLK_I2C12_HSI
+				CLK_I2C35_HSI
+				CLK_UART1_HSI
+				CLK_UART24_HSI
+				CLK_UART35_HSI
+				CLK_UART6_HSI
+				CLK_UART78_HSI
+				CLK_SPDIF_PLL4P
+				CLK_FDCAN_PLL4Q
+				CLK_SAI1_PLL3Q
+				CLK_SAI2_PLL3Q
+				CLK_SAI3_PLL3Q
+				CLK_SAI4_PLL3Q
+				CLK_RNG1_LSI
+				CLK_RNG2_LSI
+				CLK_LPTIM1_PCLK1
+				CLK_LPTIM23_PCLK3
+				CLK_LPTIM45_LSE
+			>;
+
+			/* VCO = 1300.0 MHz => P = 650 (CPU) */
+			pll1: st,pll@0 {
+				compatible = "st,stm32mp1-pll";
+				reg = <0>;
+				cfg = < 2 80 0 0 0 PQR(1,0,0) >;
+				frac = < 0x800 >;
+				bootph-all;
+			};
+
+			/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU),
+			                       R = 533 (DDR) */
+			pll2: st,pll@1 {
+				compatible = "st,stm32mp1-pll";
+				reg = <1>;
+				cfg = < 2 65 1 0 0 PQR(1,1,1) >;
+				frac = < 0x1400 >;
+				bootph-all;
+			};
+
+			/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
+			pll3: st,pll@2 {
+				compatible = "st,stm32mp1-pll";
+				reg = <2>;
+				cfg = < 1 33 1 16 36 PQR(1,1,1) >;
+				frac = < 0x1a04 >;
+				bootph-all;
+			};
+
+			/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
+			pll4: st,pll@3 {
+				compatible = "st,stm32mp1-pll";
+				reg = <3>;
+				cfg = < 3 98 5 7 7 PQR(1,1,1) >;
+				bootph-all;
+			};
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/clock/ti,cdce9xx.txt b/doc/device-tree-bindings/clock/ti,cdce9xx.txt
new file mode 100644
index 00000000000..62701d2145d
--- /dev/null
+++ b/doc/device-tree-bindings/clock/ti,cdce9xx.txt
@@ -0,0 +1,49 @@
+Binding for TI CDCE913/925/937/949 programmable I2C clock synthesizers.
+
+Reference
+This binding uses the common clock binding[1].
+
+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
+[2] https://www.ti.com/product/cdce913
+[3] https://www.ti.com/product/cdce925
+[4] https://www.ti.com/product/cdce937
+[5] https://www.ti.com/product/cdce949
+
+The driver provides clock sources for each output Y1 through Y5.
+
+Required properties:
+ - compatible: Shall be one of the following:
+	- "ti,cdce913": 1-PLL, 3 Outputs
+	- "ti,cdce925": 2-PLL, 5 Outputs
+	- "ti,cdce937": 3-PLL, 7 Outputs
+	- "ti,cdce949": 4-PLL, 9 Outputs
+ - reg: I2C device address.
+ - clocks: Points to a fixed parent clock that provides the input frequency.
+ - #clock-cells: From common clock bindings: Shall be 1.
+
+Optional properties:
+ - xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a
+                 board, or to compensate for external influences.
+
+For all PLL1, PLL2, ... an optional child node can be used to specify spread
+spectrum clocking parameters for a board.
+  - spread-spectrum: SSC mode as defined in the data sheet.
+  - spread-spectrum-center: Use "centered" mode instead of "max" mode. When
+    present, the clock runs at the requested frequency on average. Otherwise
+    the requested frequency is the maximum value of the SCC range.
+
+
+Example:
+
+	clockgen: cdce925pw@64 {
+		compatible = "cdce925";
+		reg = <0x64>;
+		clocks = <&xtal_27Mhz>;
+		#clock-cells = <1>;
+		xtal-load-pf = <5>;
+		/* PLL options to get SSC 1% centered */
+		PLL2 {
+			spread-spectrum = <4>;
+			spread-spectrum-center;
+		};
+	};
diff --git a/doc/device-tree-bindings/clock/ti,sci-clk.txt b/doc/device-tree-bindings/clock/ti,sci-clk.txt
new file mode 100644
index 00000000000..c6fe48200cb
--- /dev/null
+++ b/doc/device-tree-bindings/clock/ti,sci-clk.txt
@@ -0,0 +1,53 @@
+Texas Instruments TI SCI Clock Controller
+=========================================
+
+All clocks on Texas Instruments' SoCs that contain a System Controller,
+are only controlled by this entity. Communication between a host processor
+running an OS and the System Controller happens through a protocol known
+as TI SCI[1]. This clock implementation plugs into the common clock
+framework and makes use of the TI SCI protocol on clock API requests.
+
+[1] http://processors.wiki.ti.com/index.php/TISCI
+
+Clock Controller Node
+=====================
+The clock controller node represents the clocks managed by the SYSFW. Because
+this relies on the TI SCI protocol to communicate with the SYSFW it must be a
+child of the sysfw node.
+
+Required Properties:
+--------------------
+- compatible: Must be "ti,k2g-sci-clk"
+- #clock-cells: Must be be 2. In clock consumers, this cell represents the
+		device ID and clock ID exposed by the SYSFW firmware.
+
+Example (AM65x):
+----------------
+	dmsc: dmsc {
+		compatible = "ti,k2g-sci";
+		...
+		k3_clks: clocks {
+			compatible = "ti,k2g-sci-clk";
+			#clock-cells = <2>;
+		};
+	};
+
+Clock Consumers
+===============
+Hardware blocks supplied by a clock should contain a "clocks" property that is
+a phandle pointing to the clock controller node along with an index representing
+the device id together with a clock ID to be passed to the SYSFW for device
+control.
+
+Required Properties:
+--------------------
+- clocks: phandle pointing to the corresponding clock node, an ID representing
+	  the device, and an index representing a clock.
+
+Example (AM65x):
+----------------
+	uart2: serial@02800000 {
+		compatible = "ti,omap4-uart";
+		...
+		clocks = <&k3_clks 0x0007 1>;
+	};
diff --git a/doc/device-tree-bindings/config.txt b/doc/device-tree-bindings/config.txt
new file mode 100644
index 00000000000..f50c68bbdc3
--- /dev/null
+++ b/doc/device-tree-bindings/config.txt
@@ -0,0 +1,107 @@
+The /config node (Configuration Options)
+----------------------------------------
+
+A number of run-time configuration options are provided in the /config node
+of the control device tree. You can access these using ofnode_conf_read_int(),
+ofnode_conf_read_bool() and ofnode_conf_read_str().
+
+These options are designed to affect the operation of U-Boot at runtime.
+Runtime-configuration items can help avoid proliferation of different builds
+with only minor changes, e.g. enabling and disabling console output. Items
+here should be those that can usefully be set by the build system after U-Boot
+is built.
+
+Available options are:
+
+bootcmd (string)
+	Allows overwriting of the boot command used by U-Boot on startup. If
+	present, U-Boot uses this command instead. Note that this feature can
+	work even if loading the environment is disabled, e.g. for security
+	reasons. See also bootsecure.
+
+bootdelay (int)
+	This allows selecting of the U-Boot bootdelay, to control whether U-Boot
+	waits on boot or for how long. This allows this option to be configured
+	by the build system or by a previous-stage binary. For example, if the
+	images is being packed for testing or a user holds down a button, it may
+	allow a delay, but disable it for production.
+
+u-boot,boot-led (string)
+u-boot,error-led (string)
+	This is used to specify the label for an LED to indicate an error and
+	a successful boot, on supported hardware.
+
+bootsecure (int)
+	Indicates that U-Boot should use secure_boot_cmd() to run commands,
+	rather than the normal CLI. This can be used in production images, to
+	restrict the amount of parsing done or the options available, to cut
+	back on the available surface for security attacks.
+
+u-boot,efi-partition-entries-offset (int)
+	If present, this provides an offset (in bytes, from the start of a
+	device) that should be skipped over before the partition entries.
+	This is used by the EFI/GPT partition implementation when a device
+	is formatted.
+
+	This setting will override any values configured via Kconfig.
+
+kernel-offset (int)
+	This allows setting the 'kernaddr' environment variable, used to select
+	the address to load the kernel. It is useful for systems that use U-Boot
+	to flash a device, so the scripts that do this know where to put the
+	kernel to be flashed.
+
+load-environment (int)
+	Allows control over whether U-Boot loads its environment after
+	relocation (0=no, 1 or not present=yes).
+
+u-boot,mmc-env-offset (int)
+u-boot,mmc-env-offset-redundant (int)
+	If present, the values of the 'u-boot,mmc-env-offset' and/or
+	of the u-boot,mmc-env-offset-redundant' properties overrides
+	CONFIG_ENV_OFFSET and CONFIG_ENV_OFFSET_REDUND, respectively,
+	for SD/MMC devices.
+
+	Values are interpreted as the offset from the start of the
+	device, specified in bytes.  It is assumed that the setting
+	will point at the beginning of a LBA and values that are not
+	LBA-aligned will be rounded up to the next LBA address.
+
+u-boot,mmc-env-partition (int)
+	if present, the environment shall be placed at the last
+	CONFIG_ENV_SIZE blocks of the partition on the
+	CONFIG_SYS_MMC_ENV_DEV.
+
+	if u-boot,mmc-env-offset* is present, this setting will take
+	precedence. In that case, only if the partition is not found,
+	mmc-env-offset* will be tried.
+
+	Note that CONFIG_ENV_MMC_PARTITION overrides this device-tree setting.
+
+u-boot,no-apm-finalize (bool)
+	For x86 devices running on coreboot, this tells U-Boot not to lock
+	down the Intel Management Engine (ME) registers. This allows U-Boot to
+	access the hardware more fully for platforms that need it.
+
+u-boot,no-keyboard (bool)
+	Tells U-Boot not to expect an attached keyboard with a VGA console.
+
+rootdisk-offset (int)
+	This allows setting the 'rootdisk' environment variable, used to select
+	the address to load the rootdisk. It is useful for systems that use
+	U-Boot to flash a device, so the scripts that do this know where to put
+	the root disk to be flashed.
+
+silent-console (int)
+	If present and non-zero, the console is silenced by default on boot.
+
+u-boot,spl-payload-offset (int)
+	If present (and SPL is controlled by the device-tree), this allows
+	to override the CONFIG_SYS_SPI_U_BOOT_OFFS setting using a value
+	from the device-tree.
+
+sysreset-gpio (string)
+	If present (and supported by the specific board), indicates a
+	GPIO that can be set to trigger a system reset.  It is assumed
+	that such a system reset will effect a complete platform reset,
+	being roughly equivalent to a power-on reset.
diff --git a/doc/device-tree-bindings/cpu/fsl,mpc83xx.txt b/doc/device-tree-bindings/cpu/fsl,mpc83xx.txt
new file mode 100644
index 00000000000..ac563d906ac
--- /dev/null
+++ b/doc/device-tree-bindings/cpu/fsl,mpc83xx.txt
@@ -0,0 +1,34 @@
+MPC83xx CPU devices
+
+MPC83xx SoCs contain a e300 core as their main processor.
+
+Required properties:
+- compatible: must be one of "fsl,mpc83xx",
+                             "fsl,mpc8308",
+                             "fsl,mpc8309",
+                             "fsl,mpc8313",
+                             "fsl,mpc8315",
+                             "fsl,mpc832x",
+                             "fsl,mpc8349",
+                             "fsl,mpc8360",
+                             "fsl,mpc8379"
+- clocks: has to have two entries, which must be the core clock at index 0 and
+  the CSB (Coherent System Bus) clock at index 1. Both are given by a suitable
+  "fsl,mpc83xx-clk" device
+
+Example:
+
+socclocks: clocks {
+	compatible = "fsl,mpc8315-clk";
+	#clock-cells = <1>;
+};
+
+cpus {
+	compatible = "cpu_bus";
+
+	PowerPC,8315@0 {
+		compatible = "fsl,mpc8315";
+		clocks = <&socclocks MPC83XX_CLK_CORE
+		          &socclocks MPC83XX_CLK_CSB>;
+	};
+};
diff --git a/doc/device-tree-bindings/cpu/nios2.txt b/doc/device-tree-bindings/cpu/nios2.txt
new file mode 100644
index 00000000000..0ed2f44bcf2
--- /dev/null
+++ b/doc/device-tree-bindings/cpu/nios2.txt
@@ -0,0 +1,54 @@
+* Nios II Processor Binding
+
+This binding specifies what properties available in the device tree
+representation of a Nios II Processor Core.
+
+Users can use sopc2dts tool for generating device tree sources (dts) from a
+Qsys system. See more detail in: http://www.alterawiki.com/wiki/Sopc2dts
+
+Required properties:
+
+- compatible: Compatible property value should be "altr,nios2-1.0" or
+  "altr,nios2-1.1".
+- reg: Contains CPU index.
+- clock-frequency: Contains the clock frequency for CPU, in Hz.
+- dcache-line-size: Contains data cache line size.
+- icache-line-size: Contains instruction line size.
+- dcache-size: Contains data cache size.
+- icache-size: Contains instruction cache size.
+- altr,reset-addr: Specifies CPU reset address
+- altr,exception-addr: Specifies CPU exception address
+
+Optional properties:
+- altr,has-initda: Specifies CPU support initda instruction, should be 1.
+- altr,has-mmu: Specifies CPU support MMU support.
+- altr,has-mul: Specifies CPU hardware multipy support.
+- altr,has-div: Specifies CPU hardware divide support
+- altr,implementation: Nios II core implementation, this should be "fast";
+
+Example:
+
+cpu@0x0 {
+	device_type = "cpu";
+	compatible = "altr,nios2-1.0";
+	reg = <0>;
+	interrupt-controller;
+	#interrupt-cells = <1>;
+	clock-frequency = <125000000>;
+	dcache-line-size = <32>;
+	icache-line-size = <32>;
+	dcache-size = <32768>;
+	icache-size = <32768>;
+	altr,implementation = "fast";
+	altr,pid-num-bits = <8>;
+	altr,tlb-num-ways = <16>;
+	altr,tlb-num-entries = <128>;
+	altr,tlb-ptr-sz = <7>;
+	altr,has-div = <1>;
+	altr,has-mul = <1>;
+	altr,reset-addr = <0xc2800000>;
+	altr,fast-tlb-miss-addr = <0xc7fff400>;
+	altr,exception-addr = <0xd0000020>;
+	altr,has-initda = <1>;
+	altr,has-mmu = <1>;
+};
diff --git a/doc/device-tree-bindings/device.txt b/doc/device-tree-bindings/device.txt
new file mode 100644
index 00000000000..ef4f219e91d
--- /dev/null
+++ b/doc/device-tree-bindings/device.txt
@@ -0,0 +1,75 @@
+Devices
+=======
+
+Device bindings are described by their own individual binding files.
+
+U-Boot provides for some optional properties which are documented here. See
+also hid-over-i2c.txt which describes HID devices. See also
+Documentation/firmware-guide/acpi/enumeration.rst in the Linux kernel for
+the acpi,compatible property.
+
+ - acpi,has-power-resource : (boolean) true if this device has a power resource.
+    This causes an ACPI PowerResource to be written containing the properties
+    provided by this binding, to describe how to handle powering the device up
+    and down using GPIOs
+ - acpi,compatible : compatible string to report
+ - acpi,ddn : Contains the string to use as the _DDN (DOS (Disk Operating
+    System) Device Name)
+ - acpi,hid : Contains the string to use as the HID (Hardware ID)
+    identifier _HID
+ - acpi,path : Specifies the full ACPI path for a device. This overrides the
+    normal path built from the driver-model hierarchy
+ - acpi,name : Provides the ACPI name for a device, which is a string consisting
+   of four alphanumeric character (upper case)
+ - acpi,uid : _UID value for device
+ - acpi,wake : Provides the GPE used to detect a request from a device to wake
+   from sleep
+ - linux,probed : Tells U-Boot to add 'linux,probed' to the ACPI tables so that
+    Linux will only load the driver if the device can be detected (e.g. on I2C
+    bus). Note that this is an out-of-tree Linux feature.
+
+
+Example
+-------
+
+elan_touchscreen: elan-touchscreen@10 {
+	compatible = "i2c-chip";
+	reg = <0x10>;
+	acpi,hid = "ELAN0001";
+	acpi,ddn = "ELAN Touchscreen";
+	interrupts-extended = <&acpi_gpe GPIO_21_IRQ IRQ_TYPE_EDGE_FALLING>;
+	linux,probed;
+};
+
+pcie-a0@14,0 {
+	reg = <0x0000a000 0 0 0 0>;
+	acpi,name = "RP01";
+	wifi: wifi {
+		compatible = "intel,generic-wifi";
+		acpi,ddn = "Intel WiFi";
+		acpi,name = "WF00";
+		acpi,wake = <GPE0_DW3_00>;
+		interrupts-extended = <&acpi_gpe 0x3c 0>;
+	};
+};
+
+p2sb: p2sb@d,0 {
+	bootph-all;
+	reg = <0x02006810 0 0 0 0>;
+	compatible = "intel,apl-p2sb";
+	early-regs = <IOMAP_P2SB_BAR 0x100000>;
+	pci,no-autoconfig;
+
+	n {
+		compatible = "intel,apl-pinctrl";
+		bootph-all;
+		intel,p2sb-port-id = <PID_GPIO_N>;
+		acpi,path = "\\_SB.GPO0";
+		gpio_n: gpio-n {
+			compatible = "intel,gpio";
+			bootph-all;
+			gpio-controller;
+			#gpio-cells = <2>;
+			linux-name = "INT3452:00";
+		};
+	};
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644
index 00000000000..694d1959162
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/dwmmc.txt
@@ -0,0 +1,54 @@
+* Exynos DWC_mobile_storage
+
+The Exynos provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+	- samsung,exynos-dwmmc: for exynos platforms
+
+- reg: physical base address of the controller and length of memory mapped
+	region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+	supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+	. Typically the bus width is 4 or 8.
+- samsung,timing: The timing values to be written into the
+	Drv/sample clock selection register of corresponding channel.
+	. It is comprised of 3 values corresponding to the 3 fileds
+	  'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register.
+	. SelClk_sample: Select sample clock among 8 shifted clocks.
+	. SelClk_drv: Select drv clock among 8 shifted clocks.
+	. DIVRATIO: Clock Divide ratio select.
+	. The above 3 values are used by the clock phase shifter.
+
+Example:
+
+mmc@12200000 {
+	samsung,bus-width = <8>;
+	samsung,timing = <1 3 3>;
+	samsung,removable = <1>;
+}
+In the above example,
+	. The bus width is 8
+	. Timing is comprised of 3 values as explained below
+		1 - SelClk_sample
+		3 - SelClk_drv
+		3 - DIVRATIO
+	. The 'removable' flag indicates whether the the particilar device
+	  cannot be removed (always present) or it is a removable device.
+		1 - Indicates that the device is removable.
+		0 - Indicates that the device cannot be removed.
diff --git a/doc/device-tree-bindings/exynos/emmc-reset.txt b/doc/device-tree-bindings/exynos/emmc-reset.txt
new file mode 100644
index 00000000000..5e7ba26c275
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/emmc-reset.txt
@@ -0,0 +1,15 @@
+* Samsung eMMC reset
+
+Some exynos boards require special handling of nRESET_OUT line for eMMC memory
+to perform complete reboot.
+
+Required properties:
+- compatible: should be "samsung,emmc-reset"
+- reset-gpio: gpio chip for eMMC reset.
+
+Example:
+
+emmc-reset {
+        compatible = "samsung,emmc-reset";
+        reset-gpio = <&gpk1 2 0>;
+};
diff --git a/doc/device-tree-bindings/exynos/isp-spi.txt b/doc/device-tree-bindings/exynos/isp-spi.txt
new file mode 100644
index 00000000000..b8086e82b15
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/isp-spi.txt
@@ -0,0 +1,22 @@
+Exynos ISP SPI Subsystem
+
+The device node for ISP SPI subsytem.
+Since Peripheral id in EXYNOS is decoded based on Interrupts, currently
+ISP SPI have no individual interrupts hence we add ad dummy interrupt node
+which will have a value beyond the maximum number of interrupts exynos5 can
+support.
+
+Required properties :
+ - compatible : Should be "samsung,exynos-spi" for spi.
+ - reg : Base adrress of the the subsystem.
+ - interrupts : A value which is beyond the maximum number of interrupts
+exynos5 can support.
+
+Example:
+spi@131a0000 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	compatible = "samsung,exynos-spi";
+	reg = <0x131a0000 0x30>;
+	interrupts = <0 129 0>;
+};
diff --git a/doc/device-tree-bindings/exynos/soc.txt b/doc/device-tree-bindings/exynos/soc.txt
new file mode 100644
index 00000000000..9ba6f3b9f80
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/soc.txt
@@ -0,0 +1,21 @@
+Exynos SoC model
+
+The "cpu-model" property is a non-standard extension for the device tree root
+node. Since the cpu id of some Exynos variants does not correspond to product
+name, this property fills the gap.
+
+For almost all Exynos based boards in the kernel, the product name corresponds
+to the device tree file name. The same name is generated in U-Boot, so the new
+property allows doing it automatically.
+
+Required properties:
+ - cpu-model : Exynos product name
+
+Example:
+
+/ {
+	model = "Samsung/Google Peach Pi board based on Exynos5800";
+	cpu-model = "Exynos5800";
+
+	compatible = ...
+};
diff --git a/doc/device-tree-bindings/exynos/sound.txt b/doc/device-tree-bindings/exynos/sound.txt
new file mode 100644
index 00000000000..98d1798d0c3
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/sound.txt
@@ -0,0 +1,27 @@
+Exynos Sound Subsystem
+
+The device node for sound subsytem which contains codec and i2s block
+that is a part of Exynos5250
+
+Required properties :
+ - compatible : Should be "samsung,exynos-sound" for sound
+ - samsung,i2s-epll-clock-frequency : epll clock output frequency in Hz
+ - samsung,i2s-sampling-rate : sampling rate, default is 48000
+ - samsung,i2s-bits-per-sample : sample width, defalut is 16 bit
+ - samsung,i2s-channels : nummber of channels, default is 2
+ - samsung,i2s-lr-clk-framesize : lr clock frame size
+ - samsung,i2s-bit-clk-framesize : bit clock frame size
+ - samsung,codec-type : sound codec type
+
+Example:
+
+sound@12d60000 {
+	compatible = "samsung,exynos-sound"
+	samsung,i2s-epll-clock-frequency = <192000000>;
+	samsung,i2s-sampling-rate = <48000>;
+	samsung,i2s-bits-per-sample = <16>;
+	samsung,i2s-channels = <2>;
+	samsung,i2s-lr-clk-framesize = <256>;
+	samsung,i2s-bit-clk-framesize = <32>;
+	samsung,codec-type = "wm8994";
+};
diff --git a/doc/device-tree-bindings/exynos/tmu.txt b/doc/device-tree-bindings/exynos/tmu.txt
new file mode 100644
index 00000000000..89d3bf05f73
--- /dev/null
+++ b/doc/device-tree-bindings/exynos/tmu.txt
@@ -0,0 +1,44 @@
+Exynos Thermal management Unit
+
+Required properties:
+
+ - compatible : Should be "samsung,exynos-tmu" for TMU
+ - samsung,min-temp : Minimum temperature value (25 degree celsius)
+	- Current temperature of SoC should be more than this value.
+ - samsung,max-temp : Maximum temperature value (125 degree celsius)
+	- Current temperature of SoC should be less than this value.
+ - samsung,start-warning : Temperature at which TMU starts giving warning (degree celsius)
+ - samsung,start-tripping : Temperature at which TMU shuts down the system (degree celsius)
+ - samsung,hw-tripping : Temperature at which hardware tripping should happen
+	in case TMU fails to power off (degree celsius)
+ - samsung,efuse-min-value : SOC efuse min value (Constant 40)
+	- efuse-value should be more than this value.
+ - samsung,efuse-value : SOC actual efuse value (Literal value)
+	- This is the data trimming info.
+	- This value is used to calculate measuring error.
+ - samsung,efuse-max-value : SoC max efuse value (Constant 100)
+	- efuse-value should be less than this value.
+ - samsung,slope : Default value 274761730 (Constant 0x1060_8802).
+	- This is the default value for TMU_CONTROL register.
+	- It sets the gain of amplifier to the positive-tc generator block.
+	- It selects thermal tripping mode and enables thermal tripping.
+ - samsung,dc-value : Measured data calibration value (Constant 25)
+	- Used for tempearture calculation.
+	- This is 25 because temperature measured is always above 25 degrees.
+
+
+Example:
+
+tmu@10060000 {
+	compatible = "samsung,exynos-tmu"
+	samsung,min-temp = <25>;
+	samsung,max-temp = <125>;
+	samsung,start-warning = <95>;
+	samsung,start-tripping = <105>;
+	samsung,hw-tripping = <110>;
+	samsung,efuse-min-value = <40>;
+	samsung,efuse-value = <55>;
+	samsung,efuse-max-value = <100>;
+	samsung,slope = <274761730>;
+	samsung,dc-value = <25>;
+};
diff --git a/doc/device-tree-bindings/firmware/firmware-version.txt b/doc/device-tree-bindings/firmware/firmware-version.txt
new file mode 100644
index 00000000000..ee90ce31170
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/firmware-version.txt
@@ -0,0 +1,22 @@
+firmware-version bindings
+-------------------------------
+
+Required properties:
+- image-type-id			: guid for image blob type
+- image-index			: image index
+- lowest-supported-version	: lowest supported version
+
+Example:
+
+	firmware-version {
+		image1 {
+			image-type-id = "09D7CF52-0720-4710-91D1-08469B7FE9C8";
+			image-index = <1>;
+			lowest-supported-version = <3>;
+		};
+		image2 {
+			image-type-id = "5A7021F5-FEF2-48B4-AABA-832E777418C0";
+			image-index = <2>;
+			lowest-supported-version = <7>;
+		};
+	};
diff --git a/doc/device-tree-bindings/firmware/fwu-mdata-gpt.yaml b/doc/device-tree-bindings/firmware/fwu-mdata-gpt.yaml
new file mode 100644
index 00000000000..0735191ff15
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/fwu-mdata-gpt.yaml
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/fwu-mdata-gpt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: FWU metadata on device with GPT partitioned layout
+
+maintainers:
+ - Sughosh Ganu <sughosh.ganu@linaro.org>
+
+properties:
+  compatible:
+    items:
+      - const: u-boot,fwu-mdata-gpt
+
+  fwu-mdata-store:
+    maxItems: 1
+    description: Phandle of the device which contains the FWU medatata partition.
+
+required:
+  - compatible
+  - fwu-mdata-store
+
+additionalProperties: false
+
+examples:
+  - |
+    fwu-mdata {
+        compatible = "u-boot,fwu-mdata-gpt";
+        fwu-mdata-store = <&sdmmc1>;
+    };
diff --git a/doc/device-tree-bindings/firmware/fwu-mdata-mtd.yaml b/doc/device-tree-bindings/firmware/fwu-mdata-mtd.yaml
new file mode 100644
index 00000000000..6a22aeea301
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/fwu-mdata-mtd.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/firmware/u-boot,fwu-mdata-mtd.yaml#
+$schema: http://devicetree.org/meta-schemas/base.yaml#
+
+title: FWU metadata on MTD device without GPT
+
+maintainers:
+ - Jassi Brar <jaswinder.singh@linaro.org>
+
+properties:
+  compatible:
+    items:
+      - const: u-boot,fwu-mdata-mtd
+
+  fwu-mdata-store:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: Phandle of the MTD device which contains the FWU MetaData and Banks.
+
+  mdata-parts:
+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array
+    minItems: 2
+    maxItems: 2
+    description: labels of the primary and secondary FWU metadata partitions in the 'fixed-partitions' subnode of the 'jedec,spi-nor' flash device node.
+
+  patternProperties:
+    "fwu-bank[0-9]":
+    type: object
+    description: List of FWU mtd-backed banks. Typically two banks.
+
+    properties:
+      id:
+        $ref: /schemas/types.yaml#/definitions/uint32
+        description: Index of the bank.
+
+      label:
+        $ref: /schemas/types.yaml#/definitions/non-unique-string-array
+        minItems: 1
+        maxItems: 1
+        description: label of the partition, in the 'fixed-partitions' subnode of the 'jedec,spi-nor' flash device node, that holds this bank.
+
+      patternProperties:
+        "fwu-image[0-9]":
+        type: object
+        description: List of images in the FWU mtd-backed bank.
+
+        properties:
+          id:
+            $ref: /schemas/types.yaml#/definitions/uint32
+            description: Index of the bank.
+
+          offset:
+            $ref: /schemas/types.yaml#/definitions/uint32
+            description: Offset, from start of the bank, where the image is located.
+
+          size:
+            $ref: /schemas/types.yaml#/definitions/uint32
+            description: Size reserved for the image.
+
+          uuid:
+            $ref: /schemas/types.yaml#/definitions/non-unique-string-array
+            minItems: 1
+            maxItems: 1
+            description: UUID of the image.
+
+        required:
+          - id
+          - offset
+          - size
+          - uuid
+        additionalProperties: false
+
+    required:
+      - id
+      - label
+      - fwu-images
+    additionalProperties: false
+
+required:
+  - compatible
+  - fwu-mdata-store
+  - mdata-parts
+  - fwu-banks
+additionalProperties: false
+
+examples:
+  - |
+	fwu-mdata {
+		compatible = "u-boot,fwu-mdata-mtd";
+		fwu-mdata-store = <&flash0>;
+		mdata-parts = "MDATA-Pri", "MDATA-Sec";
+
+		fwu-bank0 {
+			id = <0>;
+			label = "FIP-Bank0";
+			fwu-image0 {
+				id = <0>;
+				offset = <0x0>;
+				size = <0x400000>;
+				uuid = "5a66a702-99fd-4fef-a392-c26e261a2828";
+			};
+		};
+		fwu-bank1 {
+			id = <1>;
+			label = "FIP-Bank1";
+			fwu-image0 {
+				id = <0>;
+				offset = <0x0>;
+				size = <0x400000>;
+				uuid = "a8f868a1-6e5c-4757-878d-ce63375ef2c0";
+			};
+		};
+	};
+...
diff --git a/doc/device-tree-bindings/firmware/linaro,optee-tz.txt b/doc/device-tree-bindings/firmware/linaro,optee-tz.txt
new file mode 100644
index 00000000000..2d75c2b1b53
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/linaro,optee-tz.txt
@@ -0,0 +1,30 @@
+OP-TEE Device Tree Bindings
+
+OP-TEE is a piece of software using hardware features to provide a Trusted
+Execution Environment. The security can be provided with ARM TrustZone, but
+also by virtualization or a separate chip.
+
+We're using "linaro" as the first part of the compatible property for
+the reference implementation maintained by Linaro.
+
+* OP-TEE based on ARM TrustZone required properties:
+
+- compatible     : should contain "linaro,optee-tz"
+
+- method         : The method of calling the OP-TEE Trusted OS. Permitted
+                   values are:
+
+                   "smc" : SMC #0, with the register assignments specified
+		           in drivers/tee/optee/optee_smc.h
+
+                   "hvc" : HVC #0, with the register assignments specified
+		           in drivers/tee/optee/optee_smc.h
+
+
+Example:
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
diff --git a/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt b/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt
new file mode 100644
index 00000000000..447252e882b
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/nvidia,tegra186-bpmp.txt
@@ -0,0 +1,104 @@
+NVIDIA Tegra Boot and Power Management Processor (BPMP)
+
+The BPMP is a specific processor in Tegra chip, which is designed for
+booting process handling and offloading the power management, clock
+management, and reset control tasks from the CPU. The binding document
+defines the resources that would be used by the BPMP firmware driver,
+which can create the interprocessor communication (IPC) between the CPU
+and BPMP.
+
+Required properties:
+- name : Should be bpmp
+- compatible
+    Array of strings
+    One of:
+    - "nvidia,tegra186-bpmp"
+- mboxes : The phandle of mailbox controller and the mailbox specifier.
+- shmem : List of the phandle of the TX and RX shared memory area that
+	  the IPC between CPU and BPMP is based on.
+- #clock-cells : Should be 1.
+- #power-domain-cells : Should be 1.
+- #reset-cells : Should be 1.
+
+This node is a mailbox consumer. See the following files for details of
+the mailbox subsystem, and the specifiers implemented by the relevant
+provider(s):
+
+- .../mailbox/mailbox.txt
+- .../mailbox/nvidia,tegra186-hsp.txt
+
+This node is a clock, power domain, and reset provider. See the following
+files for general documentation of those features, and the specifiers
+implemented by this node:
+
+- .../clock/clock-bindings.txt
+- <dt-bindings/clock/tegra186-clock.h>
+- ../power/power_domain.txt
+- <dt-bindings/power/tegra186-powergate.h>
+- .../reset/reset.txt
+- <dt-bindings/reset/tegra186-reset.h>
+
+The BPMP implements some services which must be represented by separate nodes.
+For example, it can provide access to certain I2C controllers, and the I2C
+bindings represent each I2C controller as a device tree node. Such nodes should
+be nested directly inside the main BPMP node.
+
+Software can determine whether a child node of the BPMP node represents a device
+by checking for a compatible property. Any node with a compatible property
+represents a device that can be instantiated. Nodes without a compatible
+property may be used to provide configuration information regarding the BPMP
+itself, although no such configuration nodes are currently defined by this
+binding.
+
+The BPMP firmware defines no single global name-/numbering-space for such
+services. Put another way, the numbering scheme for I2C buses is distinct from
+the numbering scheme for any other service the BPMP may provide (e.g. a future
+hypothetical SPI bus service). As such, child device nodes will have no reg
+property, and the BPMP node will have no #address-cells or #size-cells property.
+
+The shared memory bindings for BPMP
+-----------------------------------
+
+The shared memory area for the IPC TX and RX between CPU and BPMP are
+predefined and work on top of sysram, which is an SRAM inside the chip.
+
+See ".../sram/sram.txt" for the bindings.
+
+Example:
+
+hsp_top0: hsp@03c00000 {
+	...
+	#mbox-cells = <2>;
+};
+
+sysram@30000000 {
+	compatible = "nvidia,tegra186-sysram", "mmio-sram";
+	reg = <0x0 0x30000000 0x0 0x50000>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+	ranges = <0 0x0 0x0 0x30000000 0x0 0x50000>;
+
+	cpu_bpmp_tx: bpmp_shmem@4e000 {
+		compatible = "nvidia,tegra186-bpmp-shmem";
+		reg = <0x0 0x4e000 0x0 0x1000>;
+	};
+
+	cpu_bpmp_rx: bpmp_shmem@4f000 {
+		compatible = "nvidia,tegra186-bpmp-shmem";
+		reg = <0x0 0x4f000 0x0 0x1000>;
+	};
+};
+
+bpmp {
+	compatible = "nvidia,tegra186-bpmp";
+	mboxes = <&hsp_top0 HSP_MBOX_TYPE_DB HSP_DB_MASTER_BPMP>;
+	shmem = <&cpu_bpmp_tx &cpu_bpmp_rx>;
+	#clock-cells = <1>;
+	#power-domain-cells = <1>;
+	#reset-cells = <1>;
+
+	i2c {
+		compatible = "...";
+		...
+	};
+};
diff --git a/doc/device-tree-bindings/firmware/ti,j721e-dm-sci.txt b/doc/device-tree-bindings/firmware/ti,j721e-dm-sci.txt
new file mode 100644
index 00000000000..0217341f0c3
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/ti,j721e-dm-sci.txt
@@ -0,0 +1,32 @@
+Bindings for Texas Instruments System Control Interface (TI-SCI) Message
+Protocol for Device Manager(DM) to TI Foundational Security(TIFS)
+Firmware communication
+
+Required properties:
+--------------------
+- compatible: should be "ti,j721e-dm-sci"
+- mbox-names:
+	"rx" - Mailbox corresponding to receive path
+	"tx" - Mailbox corresponding to transmit path
+
+- mboxes: Mailboxes corresponding to the mbox-names. Each value of the mboxes
+	  property should contain a phandle to the mailbox controller device
+	  node and an args specifier that will be the phandle to the intended
+	  sub-mailbox child node to be used for communication.
+
+- ti,host-id: Host ID to use for communication.
+
+Optional Properties:
+--------------------
+- ti,secure-host: If the host is defined as secure.
+
+Example:
+--------
+	dm_tifs: dm-tifs {
+		compatible = "ti,j721e-dm-sci";
+		ti,host-id = <3>;
+		ti,secure-host;
+		mbox-names = "rx", "tx";
+		mboxes= <&mcu_secproxy 21>,
+			<&mcu_secproxy 23>;
+	};
diff --git a/doc/device-tree-bindings/firmware/ti,sci.txt b/doc/device-tree-bindings/firmware/ti,sci.txt
new file mode 100644
index 00000000000..4d40d0dcb6d
--- /dev/null
+++ b/doc/device-tree-bindings/firmware/ti,sci.txt
@@ -0,0 +1,76 @@
+Texas Instruments System Control Interface (TI-SCI) Message Protocol
+--------------------------------------------------------------------
+
+Texas Instrument's processors including those belonging to Keystone generation
+of processors have separate hardware entity which is now responsible for the
+management of the System on Chip (SoC) system. These include various system
+level functions as well.
+
+An example of such an SoC is K2G, which contains the system control hardware
+block called Power Management Micro Controller (PMMC). This hardware block is
+initialized early into boot process and provides services to Operating Systems
+on multiple processors including ones running Linux.
+
+See http://processors.wiki.ti.com/index.php/TISCI for protocol definition.
+
+TI-SCI controller Device Node:
+=============================
+
+The TI-SCI node describes the Texas Instrument's System Controller entity node.
+This parent node may optionally have additional children nodes which describe
+specific functionality such as clocks, power domain, reset or additional
+functionality as may be required for the SoC. This hierarchy also describes the
+relationship between the TI-SCI parent node to the child node.
+
+Required properties:
+-------------------
+- compatible: should be "ti,k2g-sci"
+- mbox-names:
+	"rx" - Mailbox corresponding to receive path
+	"tx" - Mailbox corresponding to transmit path
+
+- mboxes: Mailboxes corresponding to the mbox-names. Each value of the mboxes
+	  property should contain a phandle to the mailbox controller device
+	  node and an args specifier that will be the phandle to the intended
+	  sub-mailbox child node to be used for communication.
+
+Optional Properties:
+-------------------
+- reg-names:
+	debug_messages - Map the Debug message region
+- reg:  register space corresponding to the debug_messages
+- ti,system-reboot-controller: If system reboot can be triggered by SoC reboot
+- ti,secure-host: If the host is defined as secure.
+
+Example:
+-------------
+	dmsc: dmsc {
+		compatible = "ti,k2g-sci";
+		ti,host-id = <12>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+	}
+
+
+TI-SCI Client Device Node:
+=========================
+
+Client nodes are maintained as children of the relevant TI-SCI device node.
+
+Example:
+-------------
+	dmsc: dmsc {
+		compatible = "ti,k2g-sci";
+		...
+
+		my_clk_node: clk_node {
+			...
+			...
+		};
+
+		my_pd_node: pd_node {
+			...
+			...
+		};
+	};
diff --git a/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
new file mode 100644
index 00000000000..1381bdcd164
--- /dev/null
+++ b/doc/device-tree-bindings/fpga/altera-socfpga-a10-fpga-mgr.txt
@@ -0,0 +1,46 @@
+Altera SOCFPGA Arria10 FPGA Manager
+
+Required properties:
+- compatible : should contain "altr,socfpga-a10-fpga-mgr"
+- reg        : base address and size for memory mapped io.
+               - The first index is for FPGA manager register access.
+               - The second index is for writing FPGA configuration data.
+- resets     : Phandle and reset specifier for the device's reset.
+- clocks     : Clocks used by the device.
+- altr,bitstream : Fit image file name for both FPGA peripheral bitstream,
+		   FPGA core bitstream and full bitstream.
+
+		   Full bitstream, consist of peripheral bitstream and core
+		   bitstream.
+
+		   FPGA peripheral bitstream is used to initialize FPGA IOs,
+		   PLL, IO48 and DDR. This bitstream is required to get DDR up
+		   running.
+
+		   FPGA core bitstream contains FPGA design which is used to
+		   program FPGA CRAM and ERAM.
+
+Example: Bundles both peripheral bitstream and core bitstream into FIT image
+	 called fit_spl_fpga.itb. This FIT image can be created through running
+	 this command: tools/mkimage
+		       -E -p 400
+		       -f board/altera/arria10-socdk/fit_spl_fpga.its
+		       fit_spl_fpga.itb
+
+	 For details of describing structure and contents of the FIT image,
+	 please refer board/altera/arria10-socdk/fit_spl_fpga.its
+
+- Examples for booting with full release or booting with early IO release, then
+  follow by entering early user mode:
+
+	fpga_mgr: fpga-mgr@ffd03000 {
+		compatible = "altr,socfpga-a10-fpga-mgr";
+		reg = <0xffd03000 0x100
+		       0xffcfe400 0x20>;
+		clocks = <&l4_mp_clk>;
+		resets = <&rst FPGAMGR_RESET>;
+		altr,bitstream = "fit_spl_fpga.itb";
+	};
+
+- The .its related documentations can be found here
+	- Appendix - Reducing Arria 10 Fabric Configuration Time - https://rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10
diff --git a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt
new file mode 100644
index 00000000000..36936f2eb60
--- /dev/null
+++ b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt
@@ -0,0 +1,327 @@
+* Intel FSP-M configuration
+
+Several Intel platforms require the execution of the Intel FSP (Firmware
+Support Package) for initialization. The FSP consists of multiple parts, one
+of which is the FSP-M (Memory initialization phase).
+
+This binding applies to the FSP-M for the Intel Apollo Lake SoC.
+
+The FSP-M is available on Github [1].
+For detailed information on the FSP-M parameters see the documentation in
+FSP/ApolloLakeFspBinPkg/Docs [2].
+
+The properties of this binding are all optional. If no properties are set the
+values of the FSP-M are used.
+
+[1] https://github.com/IntelFsp/FSP
+[2] https://github.com/IntelFsp/FSP/tree/master/ApolloLakeFspBinPkg/Docs
+
+Optional properties:
+- fspm,training-delay: Time taken to train DDR memory if there is no cached MRC
+    data, in seconds. This is used to show a message if possible. For Chromebook
+    Coral this is typically 21 seconds. For an APL board with 1GB of RAM, it may
+    be only 6 seconds.
+- fspm,serial-debug-port-address: Debug Serial Port Base address
+- fspm,serial-debug-port-type: Debug Serial Port Type
+  0: NONE
+  1: I/O
+  2: MMIO (default)
+- fspm,serial-debug-port-device: Serial Port Debug Device
+  0: SOC UART0
+  1: SOC UART1
+  2: SOC UART2 (default)
+  3: External Device
+- fspm,serial-debug-port-stride-size: Debug Serial Port Stride Size
+  0: 1
+  2: 4 (default)
+- fspm,mrc-fast-boot: Memory Fast Boot
+- fspm,igd: Integrated Graphics Device
+- fspm,igd-dvmt50-pre-alloc: DVMT Pre-Allocated
+  0x02: 64 MB (default)
+  0x03: 96 MB
+  0x04: 128 MB
+  0x05: 160 MB
+  0x06: 192 MB
+  0x07: 224 MB
+  0x08: 256 MB
+  0x09: 288 MB
+  0x0A: 320 MB
+  0x0B: 352 MB
+  0x0C: 384 MB
+  0x0D: 416 MB
+  0x0E: 448 MB
+  0x0F: 480 MB
+  0x10: 512 MB
+- fspm,aperture-size: Aperture Size
+  0x1: 128 MB (default)
+  0x2: 256 MB
+  0x3: 512 MB
+- fspm,gtt-size: GTT Size
+  0x1: 2 MB
+  0x2: 4 MB
+  0x3: 8 MB (default)
+- fspm,primary-video-adaptor: Primary Display
+  0x0: AUTO (default)
+  0x2: IGD
+  0x3: PCI
+- fspm,package: Package
+  0x0: SODIMM (default)
+  0x1: BGA
+  0x2: BGA mirrored (LPDDR3 only)
+  0x3: SODIMM/UDIMM with Rank 1 Mirrored (DDR3L)
+- fspm,profile: Profile
+  0x01: WIO2_800_7_8_8
+  0x02: WIO2_1066_9_10_10
+  0x03: LPDDR3_1066_8_10_10
+  0x04: LPDDR3_1333_10_12_12
+  0x05: LPDDR3_1600_12_15_15
+  0x06: LPDDR3_1866_14_17_17
+  0x07: LPDDR3_2133_16_20_20
+  0x08: LPDDR4_1066_10_10_10
+  0x09: LPDDR4_1600_14_15_15
+  0x0A: LPDDR4_2133_20_20_20
+  0x0B: LPDDR4_2400_24_22_22
+  0x0C: LPDDR4_2666_24_24_24
+  0x0D: LPDDR4_2933_28_27_27
+  0x0E: LPDDR4_3200_28_29_29
+  0x0F: DDR3_1066_6_6_6
+  0x10: DDR3_1066_7_7_7
+  0x11: DDR3_1066_8_8_8
+  0x12: DDR3_1333_7_7_7
+  0x13: DDR3_1333_8_8_8
+  0x14: DDR3_1333_9_9_9
+  0x15: DDR3_1333_10_10_10
+  0x16: DDR3_1600_8_8_8
+  0x17: DDR3_1600_9_9_9
+  0x18: DDR3_1600_10_10_10
+  0x19: DDR3_1600_11_11_11 (default)
+  0x1A: DDR3_1866_10_10_10
+  0x1B: DDR3_1866_11_11_11
+  0x1C: DDR3_1866_12_12_12
+  0x1D: DDR3_1866_13_13_13
+  0x1E: DDR3_2133_11_11_11
+  0x1F: DDR3_2133_12_12_12
+  0x20: DDR3_2133_13_13_13
+  0x21: DDR3_2133_14_14_14
+  0x22: DDR4_1333_10_10_10
+  0x23: DDR4_1600_10_10_10
+  0x24: DDR4_1600_11_11_11
+  0x25: DDR4_1600_12_12_12
+  0x26: DDR4_1866_12_12_12
+  0x27: DDR4_1866_13_13_13
+  0x28: DDR4_1866_14_14_14
+  0x29: DDR4_2133_14_14_14
+  0x2A: DDR4_2133_15_15_15
+  0x2B: DDR4_2133_16_16_16
+  0x2C: DDR4_2400_15_15_15
+  0x2D: DDR4_2400_16_16_16
+  0x2E: DDR4_2400_17_17_17
+  0x2F: DDR4_2400_18_18_18
+- fspm,memory-down: Memory Down
+  0x0: No (default)
+  0x1: Yes
+  0x2: 1MD+SODIMM (for DDR3L only) ACRD
+  0x3: 1x32 LPDDR4
+- fspm,ddr3l-page-size: DDR3LPageSize
+  0x1: 1KB (default)
+  0x2: 2KB
+- fspm,ddr3-lasr: DDR3LASR
+- fspm,scrambler-support: ScramblerSupport
+- fspm,interleaved-mode: InterleavedMode
+- fspm,channel-hash-mask: ChannelHashMask
+- fspm,fspm,slice-hash-mask: SliceHashMask
+- fspm,channels-slices-enable: ChannelsSlices
+- fspm,min-ref-rate2x-enable: MinRefRate2x
+- fspm,dual-rank-support-enable: DualRankSupport
+- fspm,rmt-mode: RmtMode
+- fspm,memory-size-limit: MemorySizeLimit
+- fspm,low-memory-max-value: LowMemoryMaxValue
+- fspm,high-memory-max-value: HighMemoryMaxValue
+- fspm,disable-fast-boot: FastBoot
+- fspm,dimm0-spd-address: DIMM0 SPD Address
+- fspm,dimm1-spd-address: DIMM1 SPD Address
+- fspm,chX-rank-enable: Must be set to enable rank (X = 0-3)
+- fspm,chX-device-width: DRAM device width per DRAM channel (X = 0-3)
+  0: x8
+  1: x16
+  2: x32
+  3: x64
+- fspm,chX-dram-density: Must specify the DRAM device density (X = 0-3)
+  0: 4Gb
+  1: 6Gb
+  2: 8Gb
+  3: 12Gb
+  4: 16Gb
+  5: 2Gb
+- fspm,chX-option: Channel options (X = 0-3)
+- fspm,chX-odt-config: Channel Odt Config (X = 0-3)
+- fspm,chX-mode2-n: Force 2N Mode (X = 0-3)
+  0x0: Auto
+  0x1: Force 2N CMD Timing Mode
+- fspm,chX-odt-levels: Channel Odt Levels (X = 0-3)
+  0: ODT Connected to SoC
+  1: ODT held high
+- fspm,rmt-check-run: RmtCheckRun
+- fspm,rmt-margin-check-scale-high-threshold: RmtMarginCheckScaleHighThreshold
+- fspm,ch-bit-swizzling: Bit_swizzling
+- fspm,msg-level-mask: MsgLevelMask
+- fspm,pre-mem-gpio-table-pin-num: PreMem GPIO Pin Number for each table
+- fspm,pre-mem-gpio-table-ptr: PreMem GPIO Table Pointer
+- fspm,pre-mem-gpio-table-entry-num: PreMem GPIO Table Entry Number
+- fspm,enhance-port8xh-decoding: Enhance the port 8xh decoding
+- fspm,spd-write-enable: SPD Data Write
+- fspm,mrc-data-saving: MRC Training Data Saving
+- fspm,oem-loading-base: OEM File Loading Address
+- fspm,oem-file-name: OEM File Name to Load
+- fspm,mrc-boot-data-ptr:
+- fspm,emmc-trace-len: eMMC Trace Length
+  0x0: Long
+  0x1: Short
+- fspm,skip-cse-rbp: Skip CSE RBP to support zero sized IBB
+- fspm,npk-en: Npk Enable
+   0: Disable
+   1: Enable
+   2: Debugger
+   3: Auto (default)
+- fspm,fw-trace-en: FW Trace Enable
+- fspm,fw-trace-destination: FW Trace Destination
+  1: NPK_TRACE_TO_MEMORY
+  2: NPK_TRACE_TO_DCI
+  3: NPK_TRACE_TO_BSSB
+  4: NPK_TRACE_TO_PTI (default)
+- fspm,recover-dump: NPK Recovery Dump
+- fspm,msc0-wrap: Memory Region 0 Buffer WrapAround
+  0: n0-warp
+  1: n1-warp (default)
+- fspm,msc1-wrap: Memory Region 1 Buffer WrapAround
+  0: n0-warp
+  1: n1-warp (default)
+- fspm,msc0-size: Memory Region 0 Buffer Size
+  0: 0MB (default)
+  1: 1MB
+  2: 8MB
+  3: 64MB
+  4: 128MB
+  5: 256MB
+  6: 512MB
+  7: 1GB
+- fspm,msc1-size: Memory Region 1 Buffer Size
+  0: 0MB (default)
+  1: 1MB
+  2: 8MB
+  3: 64MB
+  4: 128MB
+  5: 256MB
+  6: 512MB
+  7: 1GB
+- fspm,pti-mode: PTI Mode
+  0: 0ff
+  1: x4 (default)
+  2: x8
+  3: x12
+  4: x16
+- fspm,pti-training: PTI Training
+  0: off (default)
+  1-6: 1-6
+- fspm,pti-speed:
+  0: full
+  1: half
+  2: quarter (default)
+- fspm,punit-mlvl: Punit Message Level
+  0:
+  1: (default)
+  2-4: 2-4
+- fspm,pmc-mlvl: PMC Message Level
+  0:
+  1: (default)
+  2-4: 2-4
+- fspm,sw-trace-en: SW Trace Enable
+- fspm,periodic-retraining-disable: Periodic Retraining Disable
+- fspm,enable-reset-system: Enable Reset System
+- fspm,enable-s3-heci2: Enable HECI2 in S3 resume path
+- fspm,variable-nvs-buffer-ptr:
+- fspm,start-timer-ticker-of-pfet-assert: PCIE SLOT Power Enable Assert Time - PFET
+- fspm,rt-en: Real Time Enabling
+- fspm,skip-pcie-power-sequence: Skip Pcie Power Sequence
+
+Example:
+
+&host_bridge {
+	fspm,package = <PACKAGE_BGA>;
+	fspm,profile = <PROFILE_LPDDR4_2400_24_22_22>;
+	fspm,memory-down = <MEMORY_DOWN_YES>;
+	fspm,scrambler-support = <1>;
+	fspm,interleaved-mode = <INTERLEAVED_MODE_ENABLE>;
+	fspm,channel-hash-mask = <0x36>;
+	fspm,slice-hash-mask = <0x9>;
+	fspm,low-memory-max-value = <2048>;
+	fspm,ch0-rank-enable = <1>;
+	fspm,ch0-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch0-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch0-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch0-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,ch1-rank-enable = <1>;
+	fspm,ch1-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch1-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch1-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch1-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,ch2-rank-enable = <1>;
+	fspm,ch2-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch2-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch2-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch2-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,ch3-rank-enable = <1>;
+	fspm,ch3-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch3-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch3-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch3-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,fspm,skip-cse-rbp = <1>;
+
+	fspm,ch-bit-swizzling = /bits/ 8 <
+		/* LP4_PHYS_CH0A */
+
+		/* DQA[0:7] pins of LPDDR4 module */
+		6 7 5 4 3 1 0 2
+		/* DQA[8:15] pins of LPDDR4 module */
+		12 10 11 13 14 8 9 15
+		/* DQB[0:7] pins of LPDDR4 module with offset of 16 */
+		16 22 23 20 18 17 19 21
+		/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
+		30 28 29 25 24 26 27 31
+
+		/* LP4_PHYS_CH0B */
+		/* DQA[0:7] pins of LPDDR4 module */
+		7 3 5 2 6 0 1 4
+		/* DQA[8:15] pins of LPDDR4 module */
+		 9 14 12 13 10 11 8 15
+		/* DQB[0:7] pins of LPDDR4 module with offset of 16 */
+		20 22 23 16 19 17 18 21
+		/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
+		28 24 26 27 29 30 31 25
+
+		/* LP4_PHYS_CH1A */
+
+		/* DQA[0:7] pins of LPDDR4 module */
+		2 1 6 7 5 4 3 0
+		/* DQA[8:15] pins of LPDDR4 module */
+		11 10 8 9 12 15 13 14
+		/* DQB[0:7] pins of LPDDR4 module with offset of 16 */
+		17 23 19 16 21 22 20 18
+		/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
+		31 29 26 25 28 27 24 30
+
+		/* LP4_PHYS_CH1B */
+
+		/* DQA[0:7] pins of LPDDR4 module */
+		4 3 7 5 6 1 0 2
+		/* DQA[8:15] pins of LPDDR4 module */
+		15 9 8 11 14 13 12 10
+		/* DQB[0:7] pins of LPDDR4 module with offset of 16 */
+		20 23 22 21 18 19 16 17
+		/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
+		25 28 30 31 26 27 24 29>;
+};
diff --git a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt
new file mode 100644
index 00000000000..33386ebd385
--- /dev/null
+++ b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt
@@ -0,0 +1,490 @@
+* Intel FSP-S configuration
+
+Several Intel platforms require the execution of the Intel FSP (Firmware
+Support Package) for initialization. The FSP consists of multiple parts, one
+of which is the FSP-S (Silicon initialization phase).
+
+This binding applies to the FSP-S for the Intel Apollo Lake SoC.
+
+The FSP-S is available on Github [1].
+For detailed information on the FSP-S parameters see the documentation in
+FSP/ApolloLakeFspBinPkg/Docs [2].
+
+The properties of this binding are all optional. If no properties are set the
+values of the FSP-S are used.
+
+[1] https://github.com/IntelFsp/FSP
+[2] https://github.com/IntelFsp/FSP/tree/master/ApolloLakeFspBinPkg/Docs
+
+Optional properties:
+- fsps,active-processor-cores: ActiveProcessorCores
+- fsps,disable-core1: Disable Core1
+- fsps,disable-core2: Disable Core2
+- fsps,disable-core2: Disable Core3
+- fsps,vmx-enable: VMX Enable
+- fsps,proc-trace-mem-size: Memory region allocation for Processor Trace
+  0xFF: Disable (default)
+- fsps,proc-trace-enable: Enable Processor Trace
+- fsps,eist: Eist
+- fsps,boot-p-state: Boot PState
+  0: HFM (default)
+  1: LFM
+- fsps,enable-cx: CPU power states (C-states)
+- fsps,c1e: Enhanced C-states
+- fsps,bi-proc-hot: Bi-Directional PROCHOT#
+- fsps,pkg-c-state-limit: Max Pkg Cstate
+  0: PkgC0C1
+  1: PkgC2
+  2: PkgC3 (default)
+  3: PkgC6
+  4: PkgC7
+  5: PkgC7s
+  6: PkgC8
+  7: PkgC9
+  8: PkgC10
+  9: PkgCMax
+  254: PkgCpuDefault
+  255: PkgAuto
+- fsps,c-state-auto-demotion: C-State auto-demotion
+  0: Disable C1 and C3 Auto-demotion (default)
+  1: Enable C3/C6/C7 Auto-demotion to C1
+  2: Enable C6/C7 Auto-demotion to C3
+  3: Enable C6/C7 Auto-demotion to C1 and C3
+- fsps,c-state-un-demotion: C-State un-demotion
+  0: Disable C1 and C3 Un-demotion (default)
+  1: Enable C1 Un-demotion
+  2: Enable C3 Un-demotion
+  3: Enable C1 and C3 Un-demotion
+- fsps,max-core-c-state: Max Core C-State
+  0: Unlimited
+  1: C1
+  2: C3
+  3: C6
+  4: C7
+  5: C8
+  6: C9
+  7: C10
+  8: CCx (default)
+- fsps,pkg-c-state-demotion: Package C-State Demotion
+- fsps,pkg-c-state-un-demotion: Package C-State Un-demotion
+- fsps,turbo-mode: Turbo Mode
+- fsps,hda-verb-table-entry-num: SC HDA Verb Table Entry Number
+  0: (default)
+- fsps,hda-verb-table-ptr: SC HDA Verb Table Pointer
+  0x00000000: (default)
+- fsps,p2sb-unhide: Enable/Disable P2SB device hidden
+- fsps,ipu-en: IPU Enable/Disable
+- fsps,ipu-acpi-mode: IMGU ACPI mode selection
+  0: Auto
+  1: IGFX Child device (default)
+  2: ACPI device
+- fsps,force-wake: Enable ForceWake
+- fsps,gtt-mm-adr: GttMmAdr
+  0xbf000000: (default)
+- fsps,gm-adr: GmAdr
+  0xa0000000: (default)
+- fsps,pavp-lock: Enable PavpLock
+- fsps,graphics-freq-modify: Enable GraphicsFreqModify
+- fsps,graphics-freq-req: Enable GraphicsFreqReq
+- fsps,graphics-video-freq: Enable GraphicsVideoFreq
+- fsps,pm-lock: Enable PmLock
+- fsps,dop-clock-gating: Enable DopClockGating
+- fsps,unsolicited-attack-override: Enable UnsolicitedAttackOverride
+- fsps,wopcm-support: Enable WOPCMSupport
+- fsps,wopcm-size: Enable WOPCMSize
+- fsps,power-gating: Enable PowerGating
+- fsps,unit-level-clock-gating: Enable UnitLevelClockGating
+- fsps,fast-boot: Enable FastBoot
+- fsps,dyn-sr: Enable DynSR
+- fsps,sa-ipu-enable: Enable SaIpuEnable
+- fsps,pm-support: GT PM Support
+- fsps,enable-render-standby: RC6(Render Standby)
+- fsps,logo-size: BMP Logo Data Size
+- fsps,logo-ptr: BMP Logo Data Pointer
+- fsps,graphics-config-ptr: Graphics Configuration Data Pointer
+- fsps,pavp-enable: PAVP Enable
+- fsps,pavp-pr3: PAVP PR3
+- fsps,cd-clock: CdClock Frequency selection
+  0: 144MHz
+  1: 288MHz
+  2: 384MHz
+  3: 576MHz
+  4: 624MHz (default)
+- fsps,pei-graphics-peim-init: Enable/Disable PeiGraphicsPeimInit
+- fsps,write-protection-enable: Write Protection Support
+- fsps,read-protection-enable: Read Protection Support
+- fsps,protected-range-limit: Protected Range Limitation
+  0x0FFF: (default)
+- fsps,protected-range-base: Protected Range Base
+  0x0000: (default)
+- fsps,gmm: Enable SC Gaussian Mixture Models
+- fsps,clk-gating-pgcb-clk-trunk: GMM Clock Gating - PGCB Clock Trunk
+- fsps,clk-gating-sb: GMM Clock Gating - Sideband
+- fsps,clk-gating-sb-clk-trunk: GMM Clock Gating - Sideband
+- fsps,clk-gating-sb-clk-partition: GMM Clock Gating - Sideband Clock
+  Partition
+- fsps,clk-gating-core: GMM Clock Gating - Core
+- fsps,clk-gating-dma: GMM Clock Gating - DMA
+- fsps,clk-gating-reg-access: GMM Clock Gating - Register Access
+- fsps,clk-gating-host: GMM Clock Gating - Host
+- fsps,clk-gating-partition: GMM Clock Gating - Partition
+- fsps,clk-gating-trunk: Clock Gating - Trunk
+- fsps,hda-enable: HD Audio Support
+- fsps,dsp-enable: HD Audio DSP Support
+- fsps,pme: Azalia wake-on-ring
+- fsps,hd-audio-io-buffer-ownership: HD-Audio I/O Buffer Ownership
+  0: HD-Audio link owns all the I/O buffers (default)
+  1: HD-Audio link owns 4 I/O buffers and I2S port owns 4 I/O buffers
+  3: I2S port owns all the I/O buffers
+- fsps,hd-audio-io-buffer-voltage: HD-Audio I/O Buffer Voltage
+  0: 3.3V (default)
+  1: 1.8V
+- fsps,hd-audio-vc-type: HD-Audio Virtual Channel Type
+  0: VC0 (default)
+  1: VC1
+- fsps,hd-audio-link-frequency: HD-Audio Link Frequency
+  0: 6MHz (default)
+  1: 12MHz
+  2: 24MHz
+  3: 48MHz
+  4: 96MHz
+  5: Invalid
+- fsps,hd-audio-i-disp-link-frequency: HD-Audio iDisp-Link Frequency
+  0: 6MHz (default)
+  1: 12MHz
+  2: 24MHz
+  3: 48MHz
+  4: 96MHz
+  5: Invalid
+- fsps,hd-audio-i-disp-link-tmode: HD-Audio iDisp-Link T-Mode
+  0: 2T (default)
+  1: 1T
+- fsps,dsp-endpoint-dmic: HD-Audio Disp DMIC
+  0: disable,
+  1: 2ch array (default)
+  2: 4ch array
+- fsps,dsp-endpoint-bluetooth: HD-Audio Bluetooth
+- fsps,dsp-endpoint-i2s-skp: HD-Audio I2S SHK
+- fsps,dsp-endpoint-i2s-hp: HD-Audio I2S HP
+- fsps,audio-ctl-pwr-gate: HD-Audio Controller Power Gating (deprecated)
+- fsps,audio-dsp-pwr-gate: HD-Audio ADSP Power Gating (deprecated)
+- fsps,mmt: HD-Audio CSME Memory Transfers
+  0: VC0 (default)
+  1: VC2
+- fsps,hmt: HD-Audio Host Memory Transfers
+  0: VC0 (default)
+  1: VC2
+- fsps,hd-audio-pwr-gate: HD-Audio Power Gating
+- fsps,hd-audio-clk-gate: HD-Audio Clock Gating
+- fsps,dsp-feature-mask: Bitmask of DSP Feature
+  0x01: WoV
+  0x02: BT Sideband
+  0x04: Codec VAD
+  0x20: BT Intel HFP
+  0x40: BT Intel A2DP
+  0x80: DSP based speech pre-processing disabled
+- fsps,dsp-pp-module-mask: Bitmask of supported DSP Post-Processing Modules
+  0x01: WoV
+  0x02: BT Sideband
+  0x04: Codec VAD
+  0x20: BT Intel HFP
+  0x40: BT Intel A2DP
+  0x80: DSP based speech pre-processing disabled
+- fsps,bios-cfg-lock-down: HD-Audio BIOS Configuration Lock Down
+- fsps,hpet: Enable High Precision Timer
+- fsps,hpet-bdf-valid: Hpet Valid BDF Value
+- fsps,hpet-bus-number: Bus Number of Hpet
+  0xFA: (default)
+- fsps,hpet-device-number: Device Number of Hpet
+  0x1F: (default)
+- fsps,hpet-function-number: Function Number of Hpet
+  0x00: (default)
+- fsps,io-apic-bdf-valid: IoApic Valid BDF Value
+- fsps,io-apic-bus-number: Bus Number of IoApic
+  0xFA: (default)
+- fsps,io-apic-device-number: Device Number of IoApic
+  0x0F: (default)
+- fsps,io-apic-function-number: Function Number of IoApic
+  0x00: (default)
+- fsps,io-apic-entry24-119: IOAPIC Entry 24-119
+- fsps,io-apic-id: IO APIC ID
+  0x01: (default)
+- fsps,io-apic-range-select: IoApic Range
+  0x00: (default)
+- fsps,ish-enable: ISH Controller
+- fsps,bios-interface: BIOS Interface Lock Down
+- fsps,bios-lock: Bios LockDown Enable
+- fsps,spi-eiss: SPI EISS Status
+- fsps,bios-lock-sw-smi-number: BiosLock SWSMI Number
+  0xA9: (default)
+- fsps,lpss-s0ix-enable: LPSS IOSF PMCTL S0ix Enable
+- fsps,i2c-clk-gate-cfg: LPSS I2C Clock Gating Configuration
+- fsps,hsuart-clk-gate-cfg: LPSS HSUART Clock Gating Configuration
+- fsps,spi-clk-gate-cfg: LPSS SPI Clock Gating Configuration
+- fsps,i2cX-enable: 2C Device X
+  0: Disabled
+  1: PCI Mode (default)
+  2: ACPI Mode
+- fsps,hsuartX-enable: UART Device X
+  0: Disabled
+  1: PCI Mode (default)
+  2: ACPI Mode
+- fsps,spiX-enable: SPI UART Device X
+  0: Disabled
+  1: PCI Mode (default)
+  2: ACPI Mode
+- fsps,os-dbg-enable: OS Debug Feature
+- fsps,dci-en: DCI Feature
+- fsps,uart2-kernel-debug-base-address: UART Debug Base Address
+  0x00000000: (default)
+- fsps,pcie-clock-gating-disabled: Enable PCIE Clock Gating
+- fsps,pcie-root-port8xh-decode: Enable PCIE Root Port 8xh Decode
+- fsps,pcie8xh-decode-port-index: PCIE 8xh Decode Port Index
+  0x00: (default)
+- fsps,pcie-root-port-peer-memory-write-enable: Enable PCIE Root Port Peer
+						Memory Write
+- fsps,pcie-aspm-sw-smi-number: PCIE SWSMI Number
+  0xAA: (default)
+- fsps,pcie-root-port-en: PCI Express Root Port
+- fsps,pcie-rp-hide: Hide PCIE Root Port Configuration Space
+- fsps,pcie-rp-slot-implemented: PCIE Root Port Slot Implement
+- fsps,pcie-rp-hot-plug: Hot Plug
+- fsps,pcie-rp-pm-sci: PCIE PM SCI
+- fsps,pcie-rp-ext-sync: PCIE Root Port Extended Sync
+- fsps,pcie-rp-transmitter-half-swing: Transmitter Half Swing
+- fsps,pcie-rp-acs: ACS
+- fsps,pcie-rp-clk-req-supported: Clock Request Support
+- fsps,pcie-rp-clk-req-number: Configure CLKREQ Number
+- fsps,pcie-rp-clk-req-detect: CLKREQ# Detection
+- fsps,advanced-error-reportingt: Advanced Error Reporting
+- fsps,pme-interrupt: PME Interrupt
+- fsps,unsupported-request-report: URR
+- fsps,fatal-error-report: FER
+- fsps,no-fatal-error-report: NFER
+- fsps,correctable-error-report: CER
+- fsps,system-error-on-fatal-error: SEFE
+- fsps,system-error-on-non-fatal-error: SENFE
+- fsps,system-error-on-correctable-error: SECE
+- fsps,pcie-rp-speed: PCIe Speed
+- fsps,physical-slot-number: Physical Slot Number
+  0: Auto (default)
+  1: Gen1
+  2: Gen2
+  3: Gen3
+- fsps,pcie-rp-completion-timeout: CTO
+  0x00, 0x01, 0x02, 0x03, 0x04, 0x05 (default)
+- fsps,enable-ptm: PTM Support
+- fsps,pcie-rp-aspm: ASPM
+- fsps,pcie-rp-l1-substates: L1 Substates
+- fsps,pcie-rp-ltr-enable: PCH PCIe LTR
+- fsps,pcie-rp-ltr-config-lock: PCIE LTR Lock
+- fsps,pme-b0-s5-di: PME_B0_S5 Disable bit
+- fsps,pci-clock-run: PCI Clock Run
+- fsps,timer8254-clk-setting: Enable/Disable Timer 8254 Clock Setting
+- fsps,enable-sata: Chipset SATA
+- fsps,sata-mode: SATA Mode Selection
+  0: AHCI (default)
+  1: RAID
+- fsps,sata-salp-support: Aggressive LPM Support
+- fsps,sata-pwr-opt-enable: SATA Power Optimization
+- fsps,e-sata-speed-limit: eSATA Speed Limit
+- fsps,speed-limit: SATA Speed Limit
+  0x1: 1.5Gb/s(Gen 1)
+  0x2: 3Gb/s(Gen 2)
+  0x3: 6Gb/s(Gen 3)
+- fsps,sata-ports-enable: SATA Port
+- fsps,sata-ports-dev-slp: SATA Port DevSlp
+- fsps,sata-ports-hot-plug: SATA Port HotPlug
+- fsps,sata-ports-interlock-sw: Mechanical Presence Switch
+- fsps,sata-ports-external: External SATA Ports
+- fsps,sata-ports-spin-up: Spin Up Device
+- fsps,sata-ports-solid-state-drive: SATA Solid State
+  0: Hard Disk Drive (default)
+  1: Solid State Drive
+- fsps,sata-ports-enable-dito-config: DITO Configuration
+- fsps,sata-ports-dm-val: DM Value
+  0x0F: Maximum (default)
+- fsps,sata-ports-dito-val: DITO Value
+  0x0271 (default)
+- fsps,sub-system-vendor-id: Subsystem Vendor ID
+  0x8086: (default)
+- fsps,sub-system-id: Subsystem ID
+  0x7270: (default)
+- fsps,crid-setting: CRIDSettings
+  0: Disable (default)
+  1: CRID_1
+  2: CRID_2
+  3: CRID_3
+- fsps,reset-select: ResetSelect
+  0x6: warm reset (default)
+  0xE: cold reset
+- fsps,sdcard-enabled: SD Card Support (D27:F0)
+- fsps,emmc-enabled: SeMMC Support (D28:F0)
+- fsps,emmc-host-max-speed: eMMC Max Speed
+  0: HS400(default)
+  1: HS200
+  2: DDR50
+- fsps,ufs-enabled: UFS Support (D29:F0)
+- fsps,sdio-enabled: SDIO Support (D30:F0)
+- fsps,gpp-lock: GPP Lock Feature
+- fsps,sirq-enable: Serial IRQ
+- fsps,sirq-mode: Serial IRQ Mode
+  0: Quiet mode (default)
+  1: Continuous mode
+- fsps,start-frame-pulse: Start Frame Pulse Width
+  0: ScSfpw4Clk (default)
+  1: ScSfpw6Clk
+  2: ScSfpw8Clk
+- fsps,smbus-enable: SMBus
+- fsps,arp-enable: SMBus ARP Support
+- fsps,num-rsvd-smbus-addresses: SMBus Table Elements
+  0x0080: (default)
+- fsps,rsvd-smbus-address-table: Reserved SMBus Address Table
+   0x00: (default)
+- fsps,disable-compliance-mode: XHCI Disable Compliance Mode
+- fsps,usb-per-port-ctl: USB Per-Port Control
+- fsps,usb30-mode: xHCI Mode
+  0: Disable
+  1: Enable
+  2: Auto (default)
+- fsps,port-usb20-enable: Enable USB2 ports
+- fsps,port-usb20-over-current-pin: USB20 Over Current Pin
+- fsps,usb-otg: XDCI Support
+  0: Disable
+  1: PCI_Mode (default)
+  2: ACPI_mode
+- fsps,hsic-support-enable: Enable XHCI HSIC Support
+- fsps,port-usb30-enable: Enable USB3 ports
+- fsps,port-usb30-over-current-pin: USB30 Over Current Pin
+- fsps,ssic-port-enable: Enable XHCI SSIC Support
+- fsps,dlane-pwr-gating: SSIC Dlane PowerGating
+- fsps,vtd-enable: VT-d
+- fsps,lock-down-global-smi: SMI Lock bit
+- fsps,reset-wait-timer: HDAudio Delay Timer
+  0x012C: (default)
+- fsps,rtc-lock: RTC Lock Bits
+- fsps,sata-test-mode: SATA Test Mode Selection
+- fsps,ssic-rate: XHCI SSIC RATE
+  1: A Series (default)
+  2: B Series
+- fsps,dynamic-power-gating: SMBus Dynamic Power Gating
+- fsps,pcie-rp-ltr-max-snoop-latency: Max Snoop Latency
+  0x0000: (default)
+- fsps,pcie-rp-snoop-latency-override-mode: Snoop Latency Override
+  0: Disable
+  1: Enable
+  2: Auto (default)
+- fsps,pcie-rp-snoop-latency-override-value: Snoop Latency Value
+  0x003C (default)
+- fsps,pcie-rp-snoop-latency-override-multiplier: Snoop Latency Multiplier
+  0: 1ns
+  1: 32ns
+  2: 1024ns (default)
+  3: 32768ns
+  4: 1048576ns
+  5: 33554432ns
+- fsps,skip-mp-init: Skip Multi-Processor Initialization
+- fsps,dci-auto-detect: DCI Auto Detect
+- fsps,pcie-rp-ltr-max-non-snoop-latency: Max Non-Snoop Latency
+  0x0000: (default)
+- fsps,pcie-rp-non-snoop-latency-override-mode: Non Snoop Latency Override
+- fsps,tco-timer-halt-lock: Halt and Lock TCO Timer
+- fsps,pwr-btn-override-period: Power Button Override Period
+  000: 4s (default)
+  001: 6s
+  010: 8s
+  011: 10s
+  100: 12s
+  101: 14s
+- fsps,pcie-rp-non-snoop-latency-override-value:
+  0x003C: (default)
+- fsps,pcie-rp-non-snoop-latency-override-multiplier: Non Snoop Latency Value
+  0: 1ns
+  1: 32ns
+  2: 1024ns (default)
+  3: 32768ns
+  4: 1048576ns
+  5: 33554432ns
+- fsps,pcie-rp-slot-power-limit-scale: PCIE Root Port Slot Power Limit Scale
+  0x00: (default)
+- fsps,pcie-rp-slot-power-limit-value:
+  0x00: (default)
+- fsps,disable-native-power-button: Power Button Native Mode Disable
+- fsps,power-butter-debounce-mode: Power Button Debounce Mode
+- fsps,sdio-tx-cmd-cntl: SDIO_TX_CMD_DLL_CNTL
+  0x505: (default)
+- fsps,sdio-tx-data-cntl1: SDIO_TX_DATA_DLL_CNTL1
+  0xE: (default)
+- fsps,sdio-tx-data-cntl2: SDIO_TX_DATA_DLL_CNTL2
+  0x22272828: (default)
+- fsps,sdio-rx-cmd-data-cntl1: SDIO_RX_CMD_DATA_DLL_CNTL1
+  0x16161616: (default)
+- fsps,sdio-rx-cmd-data-cntl2: SDIO_RX_CMD_DATA_DLL_CNTL2
+  0x10000: (default)
+- fsps,sdcard-tx-cmd-cntl: SDCARD_TX_CMD_DLL_CNTL
+  0x505 (default)
+- fsps,sdcard-tx-data-cntl1: SDCARD_TX_DATA_DLL_CNTL1
+  0xA13: (default)
+- fsps,sdcard-tx-data-cntl2: SDCARD_TX_DATA_DLL_CNTL2
+  0x24242828: (default)
+- fsps,sdcard-rx-cmd-data-cntl1: SDCARD_RX_CMD_DATA_DLL_CNTL1
+  0x73A3637 (default)
+- fsps,sdcard-rx-strobe-cntl: SDCARD_RX_STROBE_DLL_CNTL
+  0x0: (default)
+- fsps,sdcard-rx-cmd-data-cntl2: SDCARD_RX_CMD_DATA_DLL_CNTL2
+  0x10000: (default)
+- fsps,emmc-tx-cmd-cntl: EMMC_TX_CMD_DLL_CNTL
+  0x505: (default)
+- fsps,emmc-tx-data-cntl1: EMMC_TX_DATA_DLL_CNTL1
+  0xC11: (default)
+- fsps,emmc-tx-data-cntl2: EMMC_TX_DATA_DLL_CNTL2
+  0x1C2A2927: (default)
+- fsps,emmc-rx-cmd-data-cntl1: EMMC_RX_CMD_DATA_DLL_CNTL1
+  0x000D162F: (default)
+- fsps,emmc-rx-strobe-cntl: EMMC_RX_STROBE_DLL_CNTL
+  0x0a0a: (default)
+- fsps,emmc-rx-cmd-data-cntl2: EMMC_RX_CMD_DATA_DLL_CNTL2
+  0x1003b: (default)
+- fsps,emmc-master-sw-cntl: EMMC_MASTER_DLL_CNTL
+  0x001: (default)
+- fsps,pcie-rp-selectable-deemphasis: PCIe Selectable De-emphasis
+  1: -3.5 dB (default)
+  0: -6 dB
+- fsps,monitor-mwait-enable: Monitor Mwait Enable
+- fsps,hd-audio-dsp-uaa-compliance: Universal Audio Architecture
+				    compliance for DSP enabled system
+- fsps,ipc: IRQ Interrupt Polarity Control
+- fsps,sata-ports-disable-dynamic-pg: Disable ModPHY dynamic power gate
+- fsps,init-s3-cpu: Init CPU during S3 resume
+- fsps,skip-punit-init: Skip P-unit Initialization
+- fsps,port-usb20-per-port-tx-pe-half: PerPort Half Bit Pre-emphasis
+- fsps,port-usb20-per-port-pe-txi-set: PerPort HS Pre-emphasis Bias
+- fsps,port-usb20-per-port-txi-set: PerPort HS Transmitter Bias
+- fsps,port-usb20-hs-skew-sel: Select the skew direction for HS transition
+- fsps,port-usb20-i-usb-tx-emphasis-en: PerPort HS Transmitter Emphasis
+- fsps,port-usb20-per-port-rxi-set: PerPort HS Receiver Bias
+- fsps,port-usb20-hs-npre-drv-sel: Delay/skew's strength control for HS driver
+- fsps,os-selection: OS Selection
+  0: Windows
+  1: Android
+  3: Linux
+- fsps,dptf-enabled: DPTF
+- fsps,pwm-enabled: PWM Enabled
+
+Example:
+
+&fsp_s {
+	bootph-some-ram;
+
+	fsps,ish-enable = <0>;
+	fsps,enable-sata = <0>;
+	fsps,pcie-root-port-en = [00 00 00 00 00 01];
+	fsps,pcie-rp-hot-plug = [00 00 00 00 00 01];
+	fsps,i2c6-enable = <I2CX_ENABLE_DISABLED>;
+	fsps,i2c7-enable = <I2CX_ENABLE_DISABLED>;
+	fsps,hsuart3-enable = <HSUARTX_ENABLE_DISABLED>;
+	fsps,spi1-enable = <SPIX_ENABLE_DISABLED>;
+	fsps,spi2-enable = <SPIX_ENABLE_DISABLED>;
+	fsps,sdio-enabled = <0>;
+	...
+};
diff --git a/doc/device-tree-bindings/gpio/altera_pio.txt b/doc/device-tree-bindings/gpio/altera_pio.txt
new file mode 100644
index 00000000000..cf71eb28248
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/altera_pio.txt
@@ -0,0 +1,28 @@
+Altera GPIO controller bindings
+
+Required properties:
+- compatible:
+  - "altr,pio-1.0"
+- reg: Physical base address and length of the controller's registers.
+
+Optional properties:
+- altr,gpio-bank-width: Width of the GPIO bank. This defines how many pins the
+  GPIO device has. Ranges between 1-32. Optional and defaults to 32 if not
+  specified.
+- gpio-bank-name: bank name attached to this device.
+
+Example:
+
+user_led_pio_8out: gpio@0x4cc0 {
+	compatible = "altr,pio-1.0";
+	reg = <0x00004cc0 0x00000010>;
+	resetvalue = <255>;
+	altr,gpio-bank-width = <8>;
+	#gpio-cells = <2>;
+	gpio-controller;
+	gpio-bank-name = "led";
+};
+
+In this example, the gpio can be accessed as led[0..7] using gpio command of
+u-boot.
+==> gpio clear led0
diff --git a/doc/device-tree-bindings/gpio/bcm2835-gpio.txt b/doc/device-tree-bindings/gpio/bcm2835-gpio.txt
new file mode 100644
index 00000000000..21e0610b355
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/bcm2835-gpio.txt
@@ -0,0 +1,5 @@
+* Broadcom BCM283x GPIO controller
+
+Required properties:
+- compatible: must be "brcm,bcm2835-gpio"
+- reg: exactly one register range with length 0xb4
diff --git a/doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt b/doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt
new file mode 100644
index 00000000000..52d8bb0a5cb
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt
@@ -0,0 +1,22 @@
+MPC83xx SPISEL_BOOT gpio controller
+
+Provide access to MPC83xx SPISEL_BOOT signal as a gpio to allow it to be
+easily bound as a SPI controller chip select.
+
+The SPISEL_BOOT signal is always an output.
+
+Required properties:
+
+- compatible: must be "fsl,mpc83xx-spisel-boot" or "fsl,mpc8309-spisel-boot".
+- reg: must point to the SPI_CS register in the SoC register map.
+- ngpios: number of gpios provided by driver, normally 1.
+
+Example:
+
+	spisel_boot: spisel_boot@14c {
+		compatible = "fsl,mpc8309-spisel-boot";
+		reg = <0x14c 0x04>;
+		#gpio-cells = <2>;
+		device_type = "gpio";
+		ngpios = <1>;
+	};
diff --git a/doc/device-tree-bindings/gpio/gpio-max7320.txt b/doc/device-tree-bindings/gpio/gpio-max7320.txt
new file mode 100644
index 00000000000..87b703bb69f
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/gpio-max7320.txt
@@ -0,0 +1,36 @@
+* MAX7320 I/O expanders
+
+The original maxim 7320 i/o expander offers 8 bit push/pull outputs.
+There exists some clones which offers 16 bit.
+
+Required Properties:
+
+  - compatible: should be one of the following.
+    - "maxim,max7320"
+
+  - reg: I2C slave address.
+
+  - gpio-controller: Marks the device node as a gpio controller.
+  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
+    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
+    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
+
+Optional Properties:
+
+   - ngpios: tell the driver how many gpios the device offers.
+     if the property is omitted, 8bit (original maxim) is assumed.
+
+Please refer to gpio.txt in this directory for details of the common GPIO
+bindings used by client devices.
+
+Example: MAX7320 I/O expander node
+
+	ledgpio: max7320@5d {
+		status = "okay";
+		compatible = "maxim,max7320";
+		reg = <0x5d>;
+		#gpio-cells = <2>;
+		gpio-controller;
+		ngpios = <16>;
+	};
+
diff --git a/doc/device-tree-bindings/gpio/gpio-msm.txt b/doc/device-tree-bindings/gpio/gpio-msm.txt
new file mode 100644
index 00000000000..70a2c7f0ddb
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/gpio-msm.txt
@@ -0,0 +1,23 @@
+Qualcomm Snapdragon GPIO controller
+
+Required properties:
+- compatible : "qcom,msm8916-pinctrl", "qcom,apq8016-pinctrl" or
+				"qcom,ipq4019-pinctrl"
+- reg : Physical base address and length of the controller's registers.
+	This controller is called "Top Level Mode Multiplexing" in
+	Qualcomm documentation.
+- #gpio-cells : Should be one (pin number).
+- gpio-controller : Marks the device node as a GPIO controller.
+- gpio-count: Number of GPIO pins.
+- gpio-bank-name: (optional) name of gpio bank. As default "soc" is used.
+
+Example:
+
+soc_gpios: pinctrl@1000000 {
+	compatible = "qcom,msm8916-pinctrl";
+	reg = <0x1000000 0x300000>;
+	gpio-controller;
+	gpio-count = <122>;
+	gpio-bank-name="soc";
+	#gpio-cells = <1>;
+};
diff --git a/doc/device-tree-bindings/gpio/gpio-pcf857x.txt b/doc/device-tree-bindings/gpio/gpio-pcf857x.txt
new file mode 100644
index 00000000000..ada4e297332
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/gpio-pcf857x.txt
@@ -0,0 +1,71 @@
+* PCF857x-compatible I/O expanders
+
+The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
+driven high by a pull-up current source or driven low to ground. This combines
+the direction and output level into a single bit per line, which can't be read
+back. We can't actually know at initialization time whether a line is configured
+(a) as output and driving the signal low/high, or (b) as input and reporting a
+low/high value, without knowing the last value written since the chip came out
+of reset (if any). The only reliable solution for setting up line direction is
+thus to do it explicitly.
+
+Required Properties:
+
+  - compatible: should be one of the following.
+    - "maxim,max7328": For the Maxim MAX7378
+    - "maxim,max7329": For the Maxim MAX7329
+    - "nxp,pca8574": For the NXP PCA8574
+    - "nxp,pca8575": For the NXP PCA8575
+    - "nxp,pca9670": For the NXP PCA9670
+    - "nxp,pca9671": For the NXP PCA9671
+    - "nxp,pca9672": For the NXP PCA9672
+    - "nxp,pca9673": For the NXP PCA9673
+    - "nxp,pca9674": For the NXP PCA9674
+    - "nxp,pca9675": For the NXP PCA9675
+    - "nxp,pcf8574": For the NXP PCF8574
+    - "nxp,pcf8574a": For the NXP PCF8574A
+    - "nxp,pcf8575": For the NXP PCF8575
+    - "ti,tca9554": For the TI TCA9554
+
+  - reg: I2C slave address.
+
+  - gpio-controller: Marks the device node as a gpio controller.
+  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
+    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
+    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
+
+Optional Properties:
+
+  - lines-initial-states: Bitmask that specifies the initial state of each
+  line. When a bit is set to zero, the corresponding line will be initialized to
+  the input (pulled-up) state. When the  bit is set to one, the line will be
+  initialized the low-level output state. If the property is not specified
+  all lines will be initialized to the input state.
+
+  The I/O expander can detect input state changes, and thus optionally act as
+  an interrupt controller. When the expander interrupt line is connected all the
+  following properties must be set. For more information please see the
+  interrupt controller device tree bindings documentation available at
+  Documentation/devicetree/bindings/interrupt-controller/interrupts.txt.
+
+  - interrupt-controller: Identifies the node as an interrupt controller.
+  - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.
+  - interrupt-parent: phandle of the parent interrupt controller.
+  - interrupts: Interrupt specifier for the controllers interrupt.
+
+
+Please refer to gpio.txt in this directory for details of the common GPIO
+bindings used by client devices.
+
+Example: PCF8575 I/O expander node
+
+	pcf8575: gpio@20 {
+		compatible = "nxp,pcf8575";
+		reg = <0x20>;
+		interrupt-parent = <&irqpin2>;
+		interrupts = <3 0>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
diff --git a/doc/device-tree-bindings/gpio/gpio-samsung.txt b/doc/device-tree-bindings/gpio/gpio-samsung.txt
new file mode 100644
index 00000000000..5375625e8cd
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/gpio-samsung.txt
@@ -0,0 +1,41 @@
+Samsung Exynos4 GPIO Controller
+
+Required properties:
+- compatible: Compatible property value should be "samsung,exynos4-gpio>".
+
+- reg: Physical base address of the controller and length of memory mapped
+  region.
+
+- #gpio-cells: Should be 4. The syntax of the gpio specifier used by client nodes
+  should be the following with values derived from the SoC user manual.
+     <[phandle of the gpio controller node]
+      [pin number within the gpio controller]
+      [mux function]
+      [flags and pull up/down]
+      [drive strength]>
+
+  Values for gpio specifier:
+  - Pin number: is a value between 0 to 7.
+  - Flags and Pull Up/Down: 0 - Pull Up/Down Disabled.
+                            1 - Pull Down Enabled.
+                            3 - Pull Up Enabled.
+          Bit 16 (0x00010000) - Input is active low.
+  - Drive Strength: 0 - 1x,
+                    1 - 3x,
+                    2 - 2x,
+                    3 - 4x
+
+- gpio-controller: Specifies that the node is a gpio controller.
+- #address-cells: should be 1.
+- #size-cells: should be 1.
+
+Example:
+
+	gpa0: gpio-controller@11400000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "samsung,exynos4-gpio";
+		reg = <0x11400000 0x20>;
+		#gpio-cells = <4>;
+		gpio-controller;
+	};
diff --git a/doc/device-tree-bindings/gpio/gpio.txt b/doc/device-tree-bindings/gpio/gpio.txt
new file mode 100644
index 00000000000..1481ed607d7
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/gpio.txt
@@ -0,0 +1,324 @@
+Specifying GPIO information for devices
+============================================
+
+1) gpios property
+-----------------
+
+GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
+of this GPIO for the device. While a non-existent <name> is considered valid
+for compatibility reasons (resolving to the "gpios" property), it is not allowed
+for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
+bindings use it, but are only supported for compatibility reasons and should not
+be used for newer bindings since it has been deprecated.
+
+GPIO properties can contain one or more GPIO phandles, but only in exceptional
+cases should they contain more than one. If your device uses several GPIOs with
+distinct functions, reference each of them under its own property, giving it a
+meaningful name. The only case where an array of GPIOs is accepted is when
+several GPIOs serve the same function (e.g. a parallel data line).
+
+The exact purpose of each gpios property must be documented in the device tree
+binding of the device.
+
+The following example could be used to describe GPIO pins used as device enable
+and bit-banged data signals:
+
+	gpio1: gpio1 {
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+	[...]
+
+	data-gpios = <&gpio1 12 0>,
+		     <&gpio1 13 0>,
+		     <&gpio1 14 0>,
+		     <&gpio1 15 0>;
+
+In the above example, &gpio1 uses 2 cells to specify a gpio. The first cell is
+a local offset to the GPIO line and the second cell represent consumer flags,
+such as if the consumer desire the line to be active low (inverted) or open
+drain. This is the recommended practice.
+
+The exact meaning of each specifier cell is controller specific, and must be
+documented in the device tree binding for the device, but it is strongly
+recommended to use the two-cell approach.
+
+Most controllers are specifying a generic flag bitfield in the last cell, so
+for these, use the macros defined in
+include/dt-bindings/gpio/gpio.h whenever possible:
+
+Example of a node using GPIOs:
+
+	node {
+		enable-gpios = <&qe_pio_e 18 GPIO_ACTIVE_HIGH>;
+	};
+
+GPIO_ACTIVE_HIGH is 0, so in this example gpio-specifier is "18 0" and encodes
+GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller.
+
+Optional standard bitfield specifiers for the last cell:
+
+- Bit 0: 0 means active high, 1 means active low
+- Bit 1: 0 mean push-pull wiring, see:
+           https://en.wikipedia.org/wiki/Push-pull_output
+         1 means single-ended wiring, see:
+           https://en.wikipedia.org/wiki/Single-ended_triode
+- Bit 2: 0 means open-source, 1 means open drain, see:
+           https://en.wikipedia.org/wiki/Open_collector
+- Bit 3: 0 means the output should be maintained during sleep/low-power mode
+         1 means the output state can be lost during sleep/low-power mode
+- Bit 4: 0 means no pull-up resistor should be enabled
+         1 means a pull-up resistor should be enabled
+         This setting only applies to hardware with a simple on/off
+         control for pull-up configuration. If the hardware has more
+         elaborate pull-up configuration, it should be represented
+         using a pin control binding.
+- Bit 5: 0 means no pull-down resistor should be enabled
+         1 means a pull-down resistor should be enabled
+         This setting only applies to hardware with a simple on/off
+         control for pull-down configuration. If the hardware has more
+         elaborate pull-down configuration, it should be represented
+         using a pin control binding.
+
+1.1) GPIO specifier best practices
+----------------------------------
+
+A gpio-specifier should contain a flag indicating the GPIO polarity; active-
+high or active-low. If it does, the following best practices should be
+followed:
+
+The gpio-specifier's polarity flag should represent the physical level at the
+GPIO controller that achieves (or represents, for inputs) a logically asserted
+value at the device. The exact definition of logically asserted should be
+defined by the binding for the device. If the board inverts the signal between
+the GPIO controller and the device, then the gpio-specifier will represent the
+opposite physical level than the signal at the device's pin.
+
+When the device's signal polarity is configurable, the binding for the
+device must either:
+
+a) Define a single static polarity for the signal, with the expectation that
+any software using that binding would statically program the device to use
+that signal polarity.
+
+The static choice of polarity may be either:
+
+a1) (Preferred) Dictated by a binding-specific DT property.
+
+or:
+
+a2) Defined statically by the DT binding itself.
+
+In particular, the polarity cannot be derived from the gpio-specifier, since
+that would prevent the DT from separately representing the two orthogonal
+concepts of configurable signal polarity in the device, and possible board-
+level signal inversion.
+
+or:
+
+b) Pick a single option for device signal polarity, and document this choice
+in the binding. The gpio-specifier should represent the polarity of the signal
+(at the GPIO controller) assuming that the device is configured for this
+particular signal polarity choice. If software chooses to program the device
+to generate or receive a signal of the opposite polarity, software will be
+responsible for correctly interpreting (inverting) the GPIO signal at the GPIO
+controller.
+
+2) gpio-controller nodes
+------------------------
+
+Every GPIO controller node must contain both an empty "gpio-controller"
+property, and a #gpio-cells integer property, which indicates the number of
+cells in a gpio-specifier.
+
+Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an
+instance of a hardware IP core on a silicon die, usually exposed to the
+programmer as a coherent range of I/O addresses. Usually each such bank is
+exposed in the device tree as an individual gpio-controller node, reflecting
+the fact that the hardware was synthesized by reusing the same IP block a
+few times over.
+
+Optionally, a GPIO controller may have a "ngpios" property. This property
+indicates the number of in-use slots of available slots for GPIOs. The
+typical example is something like this: the hardware register is 32 bits
+wide, but only 18 of the bits have a physical counterpart. The driver is
+generally written so that all 32 bits can be used, but the IP block is reused
+in a lot of designs, some using all 32 bits, some using 18 and some using
+12. In this case, setting "ngpios = <18>;" informs the driver that only the
+first 18 GPIOs, at local offset 0 .. 17, are in use.
+
+If these GPIOs do not happen to be the first N GPIOs at offset 0...N-1, an
+additional set of tuples is needed to specify which GPIOs are unusable, with
+the gpio-reserved-ranges binding. This property indicates the start and size
+of the GPIOs that can't be used.
+
+Optionally, a GPIO controller may have a "gpio-line-names" property. This is
+an array of strings defining the names of the GPIO lines going out of the
+GPIO controller. This name should be the most meaningful producer name
+for the system, such as a rail name indicating the usage. Package names
+such as pin name are discouraged: such lines have opaque names (since they
+are by definition generic purpose) and such names are usually not very
+helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are
+reasonable line names as they describe what the line is used for. "GPIO0"
+is not a good name to give to a GPIO line. Placeholders are discouraged:
+rather use the "" (blank string) if the use of the GPIO line is undefined
+in your design. The names are assigned starting from line offset 0 from
+left to right from the passed array. An incomplete array (where the number
+of passed named are less than ngpios) will still be used up until the last
+provided valid line index.
+
+Example:
+
+gpio-controller@00000000 {
+	compatible = "foo";
+	reg = <0x00000000 0x1000>;
+	gpio-controller;
+	#gpio-cells = <2>;
+	ngpios = <18>;
+	gpio-reserved-ranges = <0 4>, <12 2>;
+	gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R",
+		"LED G", "LED B", "Col A", "Col B", "Col C", "Col D",
+		"Row A", "Row B", "Row C", "Row D", "NMI button",
+		"poweroff", "reset";
+}
+
+The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism
+providing automatic GPIO request and configuration as part of the
+gpio-controller's driver probe function.
+
+Each GPIO hog definition is represented as a child node of the GPIO controller.
+Required properties:
+- gpio-hog:   A property specifying that this child node represents a GPIO hog.
+- gpios:      Store the GPIO information (id, flags, ...) for each GPIO to
+	      affect. Shall contain an integer multiple of the number of cells
+	      specified in its parent node (GPIO controller node).
+Only one of the following properties scanned in the order shown below.
+This means that when multiple properties are present they will be searched
+in the order presented below and the first match is taken as the intended
+configuration.
+- input:      A property specifying to set the GPIO direction as input.
+- output-low  A property specifying to set the GPIO direction as output with
+	      the value low.
+- output-high A property specifying to set the GPIO direction as output with
+	      the value high.
+
+Optional properties:
+- line-name:  The GPIO label name. If not present the node name is used.
+
+Example of two SOC GPIO banks defined as gpio-controller nodes:
+
+	qe_pio_a: gpio-controller@1400 {
+		compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
+		reg = <0x1400 0x18>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+	qe_pio_e: gpio-controller@1460 {
+		compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
+		reg = <0x1460 0x18>;
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+
+2.1) gpio- and pin-controller interaction
+-----------------------------------------
+
+Some or all of the GPIOs provided by a GPIO controller may be routed to pins
+on the package via a pin controller. This allows muxing those pins between
+GPIO and other functions. It is a fairly common practice among silicon
+engineers.
+
+2.2) Ordinary (numerical) GPIO ranges
+-------------------------------------
+
+It is useful to represent which GPIOs correspond to which pins on which pin
+controllers. The gpio-ranges property described below represents this with
+a discrete set of ranges mapping pins from the pin controller local number space
+to pins in the GPIO controller local number space.
+
+The format is: <[pin controller phandle], [GPIO controller offset],
+                [pin controller offset], [number of pins]>;
+
+The GPIO controller offset pertains to the GPIO controller node containing the
+range definition.
+
+The pin controller node referenced by the phandle must conform to the bindings
+described in pinctrl/pinctrl-bindings.txt.
+
+Each offset runs from 0 to N. It is perfectly fine to pile any number of
+ranges with just one pin-to-GPIO line mapping if the ranges are concocted, but
+in practice these ranges are often lumped in discrete sets.
+
+Example:
+
+    gpio-ranges = <&foo 0 20 10>, <&bar 10 50 20>;
+
+This means:
+- pins 20..29 on pin controller "foo" is mapped to GPIO line 0..9 and
+- pins 50..69 on pin controller "bar" is mapped to GPIO line 10..29
+
+
+Verbose example:
+
+	qe_pio_e: gpio-controller@1460 {
+		#gpio-cells = <2>;
+		compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
+		reg = <0x1460 0x18>;
+		gpio-controller;
+		gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>;
+	};
+
+Here, a single GPIO controller has GPIOs 0..9 routed to pin controller
+pinctrl1's pins 20..29, and GPIOs 10..29 routed to pin controller pinctrl2's
+pins 50..69.
+
+
+2.3) GPIO ranges from named pin groups
+--------------------------------------
+
+It is also possible to use pin groups for gpio ranges when pin groups are the
+easiest and most convenient mapping.
+
+Both both <pinctrl-base> and <count> must set to 0 when using named pin groups
+names.
+
+The property gpio-ranges-group-names must contain exactly one string for each
+range.
+
+Elements of gpio-ranges-group-names must contain the name of a pin group
+defined in the respective pin controller. The number of pins/GPIO lines in the
+range is the number of pins in that pin group. The number of pins of that
+group is defined int the implementation and not in the device tree.
+
+If numerical and named pin groups are mixed, the string corresponding to a
+numerical pin range in gpio-ranges-group-names must be empty.
+
+Example:
+
+	gpio_pio_i: gpio-controller@14b0 {
+		#gpio-cells = <2>;
+		compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
+		reg = <0x1480 0x18>;
+		gpio-controller;
+		gpio-ranges =			<&pinctrl1 0 20 10>,
+						<&pinctrl2 10 0 0>,
+						<&pinctrl1 15 0 10>,
+						<&pinctrl2 25 0 0>;
+		gpio-ranges-group-names =	"",
+						"foo",
+						"",
+						"bar";
+	};
+
+Here, three GPIO ranges are defined referring to two pin controllers.
+
+pinctrl1 GPIO ranges are defined using pin numbers whereas the GPIO ranges
+in pinctrl2 are defined using the pin groups named "foo" and "bar".
+
+Previous versions of this binding required all pin controller nodes that
+were referenced by any gpio-ranges property to contain a property named
+#gpio-range-cells with value <3>. This requirement is now deprecated.
+However, that property may still exist in older device trees for
+compatibility reasons, and would still be required even in new device
+trees that need to be compatible with older software.
diff --git a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
new file mode 100644
index 00000000000..8422ff63abd
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
@@ -0,0 +1,55 @@
+Intel Apollo Lake GPIO controller
+
+The Apollo Lake (APL) GPIO controller is used to control GPIO functions of
+the pins.
+
+Required properties:
+- compatible: "intel,apl-gpio"
+- #gpio-cells: Should be 2. The syntax of the gpio specifier used by client
+  nodes should be the following with values derived from the SoC user manual.
+     <[phandle of the gpio controller node]
+      [pin number within the gpio controller]
+      [flags]>
+
+  Values for gpio specifier:
+  - Pin number: is a GPIO pin number between 0 and 244
+  - Flags: GPIO_ACTIVE_HIGH or GPIO_ACTIVE_LOW
+
+- gpio-controller: Specifies that the node is a gpio controller.
+
+Example:
+
+...
+{
+	p2sb: p2sb@d,0 {
+		reg = <0x02006810 0 0 0 0>;
+		compatible = "intel,p2sb";
+		early-regs = <IOMAP_P2SB_BAR 0x100000>;
+
+		north {
+			compatible = "intel,apl-pinctrl";
+			intel,p2sb-port-id = <PID_GPIO_N>;
+			gpio_n: gpio-n {
+				compatible = "intel,gpio";
+				gpio-controller;
+				#gpio-cells = <2>;
+			};
+		};
+	};
+
+	i2c_2: i2c2@16,2 {
+		compatible = "intel,apl-i2c", "snps,designware-i2c-pci";
+		reg = <0x0200b210 0 0 0 0>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clock-frequency = <400000>;
+		tpm@50 {
+			reg = <0x50>;
+			compatible = "google,cr50";
+			u-boot,i2c-offset-len = <0>;
+			ready-gpios = <&gpio_n GPIO_28 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+};
+...
diff --git a/doc/device-tree-bindings/gpio/intel,x86-broadwell-pinctrl.txt b/doc/device-tree-bindings/gpio/intel,x86-broadwell-pinctrl.txt
new file mode 100644
index 00000000000..a644381e0af
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/intel,x86-broadwell-pinctrl.txt
@@ -0,0 +1,208 @@
+Intel x86 PINCTRL/GPIO controller
+
+Pin-muxing on broadwell devices can be described with a node for the PINCTRL
+master node and a set of child nodes for each required pin state on the SoC.
+These pin states use phandles and are referred to but a configuration section
+which lists all pins in the device.
+
+The PINCTRL master node requires the following properties:
+- compatible : "intel,x86-broadwell-pinctrl"
+
+Pin state nodes must be sub-nodes of the pinctrl master node. The must have
+a phandle. They can contain the following optional properties:
+- mode-gpio	- forces the pin into GPIO mode
+- output-value	- sets the default output value of the GPIO, 0 (low, default)
+			or 1 (high)
+- direction	- sets the direction of the gpio, either PIN_INPUT (default)
+			or PIN_OUTPUT
+- invert	- the input pin is inverted
+- trigger	- sets the trigger type, either TRIGGER_EDGE (default) or
+			TRIGGER_LEVEL
+- sense-disable - the input state sense is disabled
+- owner		0 sets the owner of the pin, either OWNER_ACPI (default) or
+			ONWER_GPIO
+- route		- sets whether the pin is routed, either PIRQ_APIC_MASK or
+			PIRQ_APIC_ROUTE
+- irq-enable	- the interrupt is enabled
+- reset-rsmrst	- the pin will only be reset by RSMRST
+- pirq-apic	- the pin will be routed to the IOxAPIC
+
+The first pin state will be the default, so pins without a configuration will
+use that.
+
+The pin configuration node is also a sub-node of the pinctrl master node, but
+does not have a phandle. It has a single property:
+
+- config	- configuration to use for each pin. Each entry has of 3 cells:
+			- GPIO number (0..94)
+			- phandle of configuration (above)
+			- interrupt number (0..15)
+
+		  There should be one entry for each pin (i.e. 95 entries).
+		  But missing pins will receive the default configuration.
+
+Example:
+
+pch_pinctrl {
+	compatible = "intel,x86-broadwell-pinctrl";
+
+	/* Put this first: it is the default */
+	gpio_unused: gpio-unused {
+		mode-gpio;
+		direction = <PIN_INPUT>;
+		owner = <OWNER_GPIO>;
+		sense-disable;
+	};
+
+	gpio_acpi_sci: acpi-sci {
+		mode-gpio;
+		direction = <PIN_INPUT>;
+		invert;
+		route = <ROUTE_SCI>;
+	};
+
+	gpio_acpi_smi: acpi-smi {
+		mode-gpio;
+		direction = <PIN_INPUT>;
+		invert;
+		route = <ROUTE_SMI>;
+	};
+
+	gpio_input: gpio-input {
+		mode-gpio;
+		direction = <PIN_INPUT>;
+		owner = <OWNER_GPIO>;
+	};
+
+	gpio_input_invert: gpio-input-invert {
+		mode-gpio;
+		direction = <PIN_INPUT>;
+		owner = <OWNER_GPIO>;
+		invert;
+	};
+
+	gpio_native: gpio-native {
+	};
+
+	gpio_out_high: gpio-out-high {
+		mode-gpio;
+		direction = <PIN_OUTPUT>;
+		output-value = <1>;
+		owner = <OWNER_GPIO>;
+		sense-disable;
+	};
+
+	gpio_out_low: gpio-out-low {
+		mode-gpio;
+		direction = <PIN_OUTPUT>;
+		output-value = <0>;
+		owner = <OWNER_GPIO>;
+		sense-disable;
+	};
+
+	gpio_pirq: gpio-pirq {
+		mode-gpio;
+		direction = <PIN_INPUT>;
+		owner = <OWNER_GPIO>;
+		pirq-apic = <PIRQ_APIC_ROUTE>;
+	};
+
+	soc_gpio@0 {
+		config =
+			<0 &gpio_unused 0>,	/* unused */
+			<1 &gpio_unused 0>,	/* unused */
+			<2 &gpio_unused 0>,	/* unused */
+			<3 &gpio_unused 0>,	/* unused */
+			<4 &gpio_native 0>,	/* native: i2c0_sda_gpio4 */
+			<5 &gpio_native 0>,	/* native: i2c0_scl_gpio5 */
+			<6 &gpio_native 0>,	/* native: i2c1_sda_gpio6 */
+			<7 &gpio_native 0>,	/* native: i2c1_scl_gpio7 */
+			<8 &gpio_acpi_sci 0>,	/* pch_lte_wake_l */
+			<9 &gpio_input_invert 0>,/* trackpad_int_l (wake) */
+			<10 &gpio_acpi_sci 0>,	/* pch_wlan_wake_l */
+			<11 &gpio_unused 0>,	/* unused */
+			<12 &gpio_unused 0>,	/* unused */
+			<13 &gpio_pirq 3>,	/* trackpad_int_l (pirql) */
+			<14 &gpio_pirq 4>,	/* touch_int_l (pirqm) */
+			<15 &gpio_unused 0>,	/* unused (strap) */
+			<16 &gpio_input 0>,	/* pch_wp */
+			<17 &gpio_unused 0>,	/* unused */
+			<18 &gpio_unused 0>,	/* unused */
+			<19 &gpio_unused 0>,	/* unused */
+			<20 &gpio_native 0>,	/* pcie_wlan_clkreq_l */
+			<21 &gpio_out_high 0>,	/* pp3300_ssd_en */
+			<22 &gpio_unused 0>,	/* unused */
+			<23 &gpio_out_low 0>,	/* pp3300_autobahn_en */
+			<24 &gpio_unused 0>,	/* unused */
+			<25 &gpio_input 0>,	/* ec_in_rw */
+			<26 &gpio_unused 0>,	/* unused */
+			<27 &gpio_acpi_sci 0>,	/* pch_wake_l */
+			<28 &gpio_unused 0>,	/* unused */
+			<29 &gpio_unused 0>,	/* unused */
+			<30 &gpio_native 0>,	/* native: pch_suswarn_l */
+			<31 &gpio_native 0>,	/* native: acok_buf */
+			<32 &gpio_native 0>,	/* native: lpc_clkrun_l */
+			<33 &gpio_native 0>,	/* native: ssd_devslp */
+			<34 &gpio_acpi_smi 0>,	/* ec_smi_l */
+			<35 &gpio_acpi_smi 0>,	/* pch_nmi_dbg_l (route in nmi_en) */
+			<36 &gpio_acpi_sci 0>,	/* ec_sci_l */
+			<37 &gpio_unused 0>,	/* unused */
+			<38 &gpio_unused 0>,	/* unused */
+			<39 &gpio_unused 0>,	/* unused */
+			<40 &gpio_native 0>,	/* native: pch_usb1_oc_l */
+			<41 &gpio_native 0>,	/* native: pch_usb2_oc_l */
+			<42 &gpio_unused 0>,	/* wlan_disable_l */
+			<43 &gpio_out_high 0>,	/* pp1800_codec_en */
+			<44 &gpio_unused 0>,	/* unused */
+			<45 &gpio_acpi_sci 0>,	/* dsp_int - codec wake */
+			<46 &gpio_pirq 6>,	/* hotword_det_l_3v3 (pirqo) - codec irq */
+			<47 &gpio_out_low 0>,	/* ssd_reset_l */
+			<48 &gpio_unused 0>,	/* unused */
+			<49 &gpio_unused 0>,	/* unused */
+			<50 &gpio_unused 0>,	/* unused */
+			<51 &gpio_unused 0>,	/* unused */
+			<52 &gpio_input 0>,	/* sim_det */
+			<53 &gpio_unused 0>,	/* unused */
+			<54 &gpio_unused 0>,	/* unused */
+			<55 &gpio_unused 0>,	/* unused */
+			<56 &gpio_unused 0>,	/* unused */
+			<57 &gpio_out_high 0>,	/* codec_reset_l */
+			<58 &gpio_unused 0>,	/* unused */
+			<59 &gpio_out_high 0>,	/* lte_disable_l */
+			<60 &gpio_unused 0>,	/* unused */
+			<61 &gpio_native 0>,	/* native: pch_sus_stat */
+			<62 &gpio_native 0>,	/* native: pch_susclk */
+			<63 &gpio_native 0>,	/* native: pch_slp_s5_l */
+			<64 &gpio_unused 0>,	/* unused */
+			<65 &gpio_input 0>,	/* ram_id3 */
+			<66 &gpio_input 0>,	/* ram_id3_old (strap) */
+			<67 &gpio_input 0>,	/* ram_id0 */
+			<68 &gpio_input 0>,	/* ram_id1 */
+			<69 &gpio_input 0>,	/* ram_id2 */
+			<70 &gpio_unused 0>,	/* unused */
+			<71 &gpio_native 0>,	/* native: modphy_en */
+			<72 &gpio_unused 0>,	/* unused */
+			<73 &gpio_unused 0>,	/* unused */
+			<74 &gpio_unused 0>,	/* unused */
+			<75 &gpio_unused 0>,	/* unused */
+			<76 &gpio_unused 0>,	/* unused */
+			<77 &gpio_unused 0>,	/* unused */
+			<78 &gpio_unused 0>,	/* unused */
+			<79 &gpio_unused 0>,	/* unused */
+			<80 &gpio_unused 0>,	/* unused */
+			<81 &gpio_unused 0>,	/* unused */
+			<82 &gpio_native 0>,	/* native: ec_rcin_l */
+			<83 &gpio_native 0>,	/* gspi0_cs */
+			<84 &gpio_native 0>,	/* gspi0_clk */
+			<85 &gpio_native 0>,	/* gspi0_miso */
+			<86 &gpio_native 0>,	/* gspi0_mosi (strap) */
+			<87 &gpio_unused 0>,	/* unused */
+			<88 &gpio_unused 0>,	/* unused */
+			<89 &gpio_out_high 0>,	/* pp3300_sd_en */
+			<90 &gpio_unused 0>,	/* unused */
+			<91 &gpio_unused 0>,	/* unused */
+			<92 &gpio_unused 0>,	/* unused */
+			<93 &gpio_unused 0>,	/* unused */
+			<94 &gpio_unused 0 >;	/* unused */
+	};
+};
diff --git a/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
new file mode 100644
index 00000000000..8c3a84caf8d
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/intel,x86-pinctrl.txt
@@ -0,0 +1,33 @@
+Intel x86 PINCTRL/GPIO controller
+
+Pin-muxing on x86 can be described with a node for the PINCTRL master
+node and a set of child nodes for each pin on the SoC.
+
+The PINCTRL master node requires the following properties:
+- compatible : "intel,x86-pinctrl"
+
+Pin nodes must be children of the pinctrl master node and can
+contain the following properties:
+- pad-offset	- (required) offset in the IOBASE for the pin to configure
+- gpio-offset	- (required only when 'mode-gpio' is set) 2 cells
+			- offset in the GPIOBASE for the pin to configure
+			- the bit shift in this register (4 = bit 4)
+- mode-gpio	- (optional) standalone property to force the pin into GPIO mode
+- mode-func	- (optional) function number to assign to the pin. If
+			'mode-gpio' is set, this property will be ignored.
+in case of 'mode-gpio' property set:
+- output-value	- (optional) this set the default output value of the GPIO
+- direction	- (optional) this set the direction of the gpio
+- pull-strength	- (optional) this set the pull strength of the pin
+- pull-assign	- (optional) this set the pull assignement (up/down) of the pin
+- invert	- (optional) this input pin is inverted
+
+Example:
+
+pin_usb_host_en0@0 {
+	gpio-offset = <0x80 8>;
+	pad-offset = <0x260>;
+	mode-gpio;
+	output-value = <1>;
+	direction = <PIN_OUTPUT>;
+};
diff --git a/doc/device-tree-bindings/gpio/mscc_sgpio.txt b/doc/device-tree-bindings/gpio/mscc_sgpio.txt
new file mode 100644
index 00000000000..3d344d64ac2
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/mscc_sgpio.txt
@@ -0,0 +1,45 @@
+Microsemi Corporation (MSCC) Serial GPIO driver
+
+The MSCC serial GPIO extends the number or GPIO's on the system by
+means of 4 dedicated pins: one input, one output, one clock and one
+strobe pin. By attaching a number of (external) shift registers, the
+effective GPIO count can be extended by up to 128 GPIO's per
+controller.
+
+Required properties:
+- compatible : "mscc,luton-sgpio" or "mscc,ocelot-sgpio"
+- clock: Reference clock used to generate clock divider setting. See
+  mscc,sgpio-frequency property.
+- reg : Physical base address and length of the controller's registers.
+- #gpio-cells : Should be two. The first cell is the pin number and the
+  second cell is used to specify optional parameters:
+  - bit 0 specifies polarity (0 for normal, 1 for inverted)
+- gpio-controller : Marks the device node as a GPIO controller.
+- gpio-ranges: Standard gpio range(s): phandle, gpio base, pinctrl base
+  and count.
+
+Optional properties:
+- ngpios: See gpio.txt
+- mscc,sgpio-frequency: The frequency at which the serial bitstream is
+  generated and sampled. Default: 12500000 (Hz).
+- mscc,sgpio-ports: A bitmask (32 bits) of which ports are enabled in
+  the serialized gpio stream. One 'port' will transport from 1 to 4
+  gpio bits. Default: 0xFFFFFFFF.
+
+Typically the pinctrl-0 and pinctrl-names properties will also be
+present to enable the use of the SIO CLK, LD, DI and DO for some
+regular GPIO pins.
+
+Example:
+
+sgpio: gpio@10700f8 {
+       compatible = "mscc,ocelot-sgpio";
+       pinctrl-0 = <&sgpio_pins>;
+       pinctrl-names = "default";
+       reg = <0x10700f8 0x100>;
+       gpio-controller;
+       #gpio-cells = <2>;
+       gpio-ranges = <&sgpio 0 0 64>;
+       mscc,sgpio-frequency = <12500>;
+       mscc,sgpio-ports = <0x000FFFFF>;
+};
diff --git a/doc/device-tree-bindings/gpio/nvidia,tegra186-gpio.txt b/doc/device-tree-bindings/gpio/nvidia,tegra186-gpio.txt
new file mode 100644
index 00000000000..c82a2e221bc
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/nvidia,tegra186-gpio.txt
@@ -0,0 +1,161 @@
+NVIDIA Tegra186 GPIO controllers
+
+Tegra186 contains two GPIO controllers; a main controller and an "AON"
+controller. This binding document applies to both controllers. The register
+layouts for the controllers share many similarities, but also some significant
+differences. Hence, this document describes closely related but different
+bindings and compatible values.
+
+The Tegra186 GPIO controller allows software to set the IO direction of, and
+read/write the value of, numerous GPIO signals. Routing of GPIO signals to
+package balls is under the control of a separate pin controller HW block. Two
+major sets of registers exist:
+
+a) Security registers, which allow configuration of allowed access to the GPIO
+register set. These registers exist in a single contiguous block of physical
+address space. The size of this block, and the security features available,
+varies between the different GPIO controllers.
+
+Access to this set of registers is not necessary in all circumstances. Code
+that wishes to configure access to the GPIO registers needs access to these
+registers to do so. Code which simply wishes to read or write GPIO data does not
+need access to these registers.
+
+b) GPIO registers, which allow manipulation of the GPIO signals. In some GPIO
+controllers, these registers are exposed via multiple "physical aliases" in
+address space, each of which access the same underlying state. See the hardware
+documentation for rationale. Any particular GPIO client is expected to access
+just one of these physical aliases.
+
+Tegra HW documentation describes a unified naming convention for all GPIOs
+implemented by the SoC. Each GPIO is assigned to a port, and a port may control
+a number of GPIOs. Thus, each GPIO is named according to an alphabetical port
+name and an integer GPIO name within the port. For example, GPIO_PA0, GPIO_PN6,
+or GPIO_PCC3.
+
+The number of ports implemented by each GPIO controller varies. The number of
+implemented GPIOs within each port varies. GPIO registers within a controller
+are grouped and laid out according to the port they affect.
+
+The mapping from port name to the GPIO controller that implements that port, and
+the mapping from port name to register offset within a controller, are both
+extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h>
+describes the port-level mapping. In that file, the naming convention for ports
+matches the HW documentation. The values chosen for the names are alphabetically
+sorted within a particular controller. Drivers need to map between the DT GPIO
+IDs and HW register offsets using a lookup table.
+
+Each GPIO controller can generate a number of interrupt signals. Each signal
+represents the aggregate status for all GPIOs within a set of ports. Thus, the
+number of interrupt signals generated by a controller varies as a rough function
+of the number of ports it implements. Note that the HW documentation refers to
+both the overall controller HW module and the sets-of-ports as "controllers".
+
+Each GPIO controller in fact generates multiple interrupts signals for each set
+of ports. Each GPIO may be configured to feed into a specific one of the
+interrupt signals generated by a set-of-ports. The intent is for each generated
+signal to be routed to a different CPU, thus allowing different CPUs to each
+handle subsets of the interrupts within a port. The status of each of these
+per-port-set signals is reported via a separate register. Thus, a driver needs
+to know which status register to observe. This binding currently defines no
+configuration mechanism for this. By default, drivers should use register
+GPIO_${port}_INTERRUPT_STATUS_G1_0. Future revisions to the binding could
+define a property to configure this.
+
+Required properties:
+- compatible
+    Array of strings.
+    One of:
+    - "nvidia,tegra186-gpio".
+    - "nvidia,tegra186-gpio-aon".
+- reg-names
+    Array of strings.
+    Contains a list of names for the register spaces described by the reg
+    property. May contain the following entries, in any order:
+    - "gpio": Mandatory. GPIO control registers. This may cover either:
+        a) The single physical alias that this OS should use.
+        b) All physical aliases that exist in the controller. This is
+           appropriate when the OS is responsible for managing assignment of
+           the physical aliases.
+    - "security": Optional. Security configuration registers.
+    Users of this binding MUST look up entries in the reg property by name,
+    using this reg-names property to do so.
+- reg
+    Array of (physical base address, length) tuples.
+    Must contain one entry per entry in the reg-names property, in a matching
+    order.
+- interrupts
+    Array of interrupt specifiers.
+    The interrupt outputs from the HW block, one per set of ports, in the
+    order the HW manual describes them. The number of entries required varies
+    depending on compatible value:
+    - "nvidia,tegra186-gpio": 6 entries.
+    - "nvidia,tegra186-gpio-aon": 1 entry.
+- gpio-controller
+    Boolean.
+    Marks the device node as a GPIO controller/provider.
+- #gpio-cells
+    Single-cell integer.
+    Must be <2>.
+    Indicates how many cells are used in a consumer's GPIO specifier.
+    In the specifier:
+    - The first cell is the pin number.
+        See <dt-bindings/gpio/tegra186-gpio.h>.
+    - The second cell contains flags:
+        - Bit 0 specifies polarity
+            - 0: Active-high (normal).
+            - 1: Active-low (inverted).
+- interrupt-controller
+    Boolean.
+    Marks the device node as an interrupt controller/provider.
+- #interrupt-cells
+    Single-cell integer.
+    Must be <2>.
+    Indicates how many cells are used in a consumer's interrupt specifier.
+    In the specifier:
+    - The first cell is the GPIO number.
+        See <dt-bindings/gpio/tegra186-gpio.h>.
+    - The second cell is contains flags:
+        - Bits [3:0] indicate trigger type and level:
+            - 1: Low-to-high edge triggered.
+            - 2: High-to-low edge triggered.
+            - 4: Active high level-sensitive.
+            - 8: Active low level-sensitive.
+            Valid combinations are 1, 2, 3, 4, 8.
+
+Example:
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+gpio@2200000 {
+	compatible = "nvidia,tegra186-gpio";
+	reg-names = "security", "gpio";
+	reg =
+		<0x0 0x2200000 0x0 0x10000>,
+		<0x0 0x2210000 0x0 0x10000>;
+	interrupts =
+		<0 47 IRQ_TYPE_LEVEL_HIGH>,
+		<0 50 IRQ_TYPE_LEVEL_HIGH>,
+		<0 53 IRQ_TYPE_LEVEL_HIGH>,
+		<0 56 IRQ_TYPE_LEVEL_HIGH>,
+		<0 59 IRQ_TYPE_LEVEL_HIGH>,
+		<0 180 IRQ_TYPE_LEVEL_HIGH>;
+	gpio-controller;
+	#gpio-cells = <2>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
+
+gpio@c2f0000 {
+	compatible = "nvidia,tegra186-gpio-aon";
+	reg-names = "security", "gpio";
+	reg =
+		<0x0 0xc2f0000 0x0 0x1000>,
+		<0x0 0xc2f1000 0x0 0x1000>;
+	interrupts =
+		<0 60 IRQ_TYPE_LEVEL_HIGH>;
+	gpio-controller;
+	#gpio-cells = <2>;
+	interrupt-controller;
+	#interrupt-cells = <2>;
+};
diff --git a/doc/device-tree-bindings/gpio/nvidia,tegra20-gpio.txt b/doc/device-tree-bindings/gpio/nvidia,tegra20-gpio.txt
new file mode 100644
index 00000000000..023c9526e5f
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/nvidia,tegra20-gpio.txt
@@ -0,0 +1,40 @@
+NVIDIA Tegra GPIO controller
+
+Required properties:
+- compatible : "nvidia,tegra<chip>-gpio"
+- reg : Physical base address and length of the controller's registers.
+- interrupts : The interrupt outputs from the controller. For Tegra20,
+  there should be 7 interrupts specified, and for Tegra30, there should
+  be 8 interrupts specified.
+- #gpio-cells : Should be two. The first cell is the pin number and the
+  second cell is used to specify optional parameters:
+  - bit 0 specifies polarity (0 for normal, 1 for inverted)
+- gpio-controller : Marks the device node as a GPIO controller.
+- #interrupt-cells : Should be 2.
+  The first cell is the GPIO number.
+  The second cell is used to specify flags:
+    bits[3:0] trigger type and level flags:
+      1 = low-to-high edge triggered.
+      2 = high-to-low edge triggered.
+      4 = active high level-sensitive.
+      8 = active low level-sensitive.
+      Valid combinations are 1, 2, 3, 4, 8.
+- interrupt-controller : Marks the device node as an interrupt controller.
+
+Example:
+
+gpio: gpio@6000d000 {
+	compatible = "nvidia,tegra20-gpio";
+	reg = < 0x6000d000 0x1000 >;
+	interrupts = < 0 32 0x04
+		       0 33 0x04
+		       0 34 0x04
+		       0 35 0x04
+		       0 55 0x04
+		       0 87 0x04
+		       0 89 0x04 >;
+	#gpio-cells = <2>;
+	gpio-controller;
+	#interrupt-cells = <2>;
+	interrupt-controller;
+};
diff --git a/doc/device-tree-bindings/gpio/snps,creg-gpio.txt b/doc/device-tree-bindings/gpio/snps,creg-gpio.txt
new file mode 100644
index 00000000000..46ceb65c531
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/snps,creg-gpio.txt
@@ -0,0 +1,43 @@
+GPIO via CREG (control registers) driver
+
+31                 9        7        5           0   < bit number
+|                  |        |        |           |
+[     not used     | gpio-1 | gpio-0 | <-shift-> ]   < 32 bit register
+                       ^        ^
+                       |        |
+                write 0x2 == set output to "1" (activate)
+                write 0x3 == set output to "0" (deactivate)
+
+Required properties:
+- compatible : "snps,creg-gpio"
+- reg : Exactly one register range with length 0x4.
+- #gpio-cells : Should be one - the pin number.
+- gpio-controller : Marks the device node as a GPIO controller.
+- gpio-count: Number of GPIO pins.
+- gpio-bit-per-line: Number of bits per gpio line (see picture).
+- gpio-first-shift: Shift (in bits) of the first GPIO field in register
+  (see picture).
+- gpio-activate-val: Value should be set in corresponding field to set
+  output to "1" (see picture). Applied to all GPIO ports.
+- gpio-deactivate-val: Value should be set in corresponding field to set
+  output to "0" (see picture). Applied to all GPIO ports.
+
+Optional properties:
+- gpio-bank-name: name of bank (as default driver name is used is used)
+- gpio-default-val: array of default output values (must me 0 or 1)
+
+Example (see picture):
+
+gpio: gpio@f00014b0 {
+	compatible = "snps,creg-gpio";
+	reg = <0xf00014b0 0x4>;
+	gpio-controller;
+	#gpio-cells = <1>;
+	gpio-bank-name = "hsdk-spi-cs";
+	gpio-count = <2>;
+	gpio-first-shift = <5>;
+	gpio-bit-per-line = <2>;
+	gpio-activate-val = <2>;
+	gpio-deactivate-val = <3>;
+	gpio-default-val = <1 1>;
+};
diff --git a/doc/device-tree-bindings/gpu/nvidia,tegra20-host1x.txt b/doc/device-tree-bindings/gpu/nvidia,tegra20-host1x.txt
new file mode 100644
index 00000000000..b48f4ef31d9
--- /dev/null
+++ b/doc/device-tree-bindings/gpu/nvidia,tegra20-host1x.txt
@@ -0,0 +1,372 @@
+NVIDIA Tegra host1x
+
+Required properties:
+- compatible: "nvidia,tegra<chip>-host1x"
+- reg: Physical base address and length of the controller's registers.
+- interrupts: The interrupt outputs from the controller.
+- #address-cells: The number of cells used to represent physical base addresses
+  in the host1x address space. Should be 1.
+- #size-cells: The number of cells used to represent the size of an address
+  range in the host1x address space. Should be 1.
+- ranges: The mapping of the host1x address space to the CPU address space.
+- clocks: Must contain one entry, for the module clock.
+  See ../clocks/clock-bindings.txt for details.
+- resets: Must contain an entry for each entry in reset-names.
+  See ../reset/reset.txt for details.
+- reset-names: Must include the following entries:
+  - host1x
+
+The host1x top-level node defines a number of children, each representing one
+of the following host1x client modules:
+
+- mpe: video encoder
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-mpe"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - mpe
+
+- vi: video input
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-vi"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - vi
+
+- epp: encoder pre-processor
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-epp"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - epp
+
+- isp: image signal processor
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-isp"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - isp
+
+- gr2d: 2D graphics engine
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-gr2d"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - 2d
+
+- gr3d: 3D graphics engine
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-gr3d"
+  - reg: Physical base address and length of the controller's registers.
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    (This property may be omitted if the only clock in the list is "3d")
+    - 3d
+      This MUST be the first entry.
+    - 3d2 (Only required on SoCs with two 3D clocks)
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - 3d
+    - 3d2 (Only required on SoCs with two 3D clocks)
+
+- dc: display controller
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-dc"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    - dc
+      This MUST be the first entry.
+    - parent
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - dc
+  - nvidia,head: The number of the display controller head. This is used to
+    setup the various types of output to receive video data from the given
+    head.
+
+  Each display controller node has a child node, named "rgb", that represents
+  the RGB output associated with the controller. It can take the following
+  optional properties:
+  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
+  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
+  - nvidia,edid: supplies a binary EDID blob
+  - nvidia,panel: phandle of a display panel
+
+- hdmi: High Definition Multimedia Interface
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-hdmi"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - hdmi-supply: supply for the +5V HDMI connector pin
+  - vdd-supply: regulator for supply voltage
+  - pll-supply: regulator for PLL
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    - hdmi
+      This MUST be the first entry.
+    - parent
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - hdmi
+
+  Optional properties:
+  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
+  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
+  - nvidia,edid: supplies a binary EDID blob
+  - nvidia,panel: phandle of a display panel
+
+- tvo: TV encoder output
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-tvo"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain one entry, for the module clock.
+    See ../clocks/clock-bindings.txt for details.
+
+- dsi: display serial interface
+
+  Required properties:
+  - compatible: "nvidia,tegra<chip>-dsi"
+  - reg: Physical base address and length of the controller's registers.
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    - dsi
+      This MUST be the first entry.
+    - lp
+    - parent
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - dsi
+  - avdd-dsi-supply: phandle of a supply that powers the DSI controller
+  - nvidia,mipi-calibrate: Should contain a phandle and a specifier specifying
+    which pads are used by this DSI output and need to be calibrated. See also
+    ../mipi/nvidia,tegra114-mipi.txt.
+
+  Optional properties:
+  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
+  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
+  - nvidia,edid: supplies a binary EDID blob
+  - nvidia,panel: phandle of a display panel
+
+- sor: serial output resource
+
+  Required properties:
+  - compatible: "nvidia,tegra124-sor"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    - sor: clock input for the SOR hardware
+    - parent: input for the pixel clock
+    - dp: reference clock for the SOR clock
+    - safe: safe reference for the SOR clock during power up
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - sor
+
+  Optional properties:
+  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing
+  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection
+  - nvidia,edid: supplies a binary EDID blob
+  - nvidia,panel: phandle of a display panel
+
+  Optional properties when driving an eDP output:
+  - nvidia,dpaux: phandle to a DispayPort AUX interface
+
+- dpaux: DisplayPort AUX interface
+  - compatible: "nvidia,tegra124-dpaux"
+  - reg: Physical base address and length of the controller's registers.
+  - interrupts: The interrupt outputs from the controller.
+  - clocks: Must contain an entry for each entry in clock-names.
+    See ../clocks/clock-bindings.txt for details.
+  - clock-names: Must include the following entries:
+    - dpaux: clock input for the DPAUX hardware
+    - parent: reference clock
+  - resets: Must contain an entry for each entry in reset-names.
+    See ../reset/reset.txt for details.
+  - reset-names: Must include the following entries:
+    - dpaux
+  - vdd-supply: phandle of a supply that powers the DisplayPort link
+
+Example:
+
+/ {
+	...
+
+	host1x {
+		compatible = "nvidia,tegra20-host1x", "simple-bus";
+		reg = <0x50000000 0x00024000>;
+		interrupts = <0 65 0x04   /* mpcore syncpt */
+			      0 67 0x04>; /* mpcore general */
+		clocks = <&tegra_car TEGRA20_CLK_HOST1X>;
+		resets = <&tegra_car 28>;
+		reset-names = "host1x";
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		ranges = <0x54000000 0x54000000 0x04000000>;
+
+		mpe {
+			compatible = "nvidia,tegra20-mpe";
+			reg = <0x54040000 0x00040000>;
+			interrupts = <0 68 0x04>;
+			clocks = <&tegra_car TEGRA20_CLK_MPE>;
+			resets = <&tegra_car 60>;
+			reset-names = "mpe";
+		};
+
+		vi {
+			compatible = "nvidia,tegra20-vi";
+			reg = <0x54080000 0x00040000>;
+			interrupts = <0 69 0x04>;
+			clocks = <&tegra_car TEGRA20_CLK_VI>;
+			resets = <&tegra_car 100>;
+			reset-names = "vi";
+		};
+
+		epp {
+			compatible = "nvidia,tegra20-epp";
+			reg = <0x540c0000 0x00040000>;
+			interrupts = <0 70 0x04>;
+			clocks = <&tegra_car TEGRA20_CLK_EPP>;
+			resets = <&tegra_car 19>;
+			reset-names = "epp";
+		};
+
+		isp {
+			compatible = "nvidia,tegra20-isp";
+			reg = <0x54100000 0x00040000>;
+			interrupts = <0 71 0x04>;
+			clocks = <&tegra_car TEGRA20_CLK_ISP>;
+			resets = <&tegra_car 23>;
+			reset-names = "isp";
+		};
+
+		gr2d {
+			compatible = "nvidia,tegra20-gr2d";
+			reg = <0x54140000 0x00040000>;
+			interrupts = <0 72 0x04>;
+			clocks = <&tegra_car TEGRA20_CLK_GR2D>;
+			resets = <&tegra_car 21>;
+			reset-names = "2d";
+		};
+
+		gr3d {
+			compatible = "nvidia,tegra20-gr3d";
+			reg = <0x54180000 0x00040000>;
+			clocks = <&tegra_car TEGRA20_CLK_GR3D>;
+			resets = <&tegra_car 24>;
+			reset-names = "3d";
+		};
+
+		dc@54200000 {
+			compatible = "nvidia,tegra20-dc";
+			reg = <0x54200000 0x00040000>;
+			interrupts = <0 73 0x04>;
+			clocks = <&tegra_car TEGRA20_CLK_DISP1>,
+				 <&tegra_car TEGRA20_CLK_PLL_P>;
+			clock-names = "dc", "parent";
+			resets = <&tegra_car 27>;
+			reset-names = "dc";
+
+			rgb {
+				status = "disabled";
+			};
+		};
+
+		dc@54240000 {
+			compatible = "nvidia,tegra20-dc";
+			reg = <0x54240000 0x00040000>;
+			interrupts = <0 74 0x04>;
+			clocks = <&tegra_car TEGRA20_CLK_DISP2>,
+				 <&tegra_car TEGRA20_CLK_PLL_P>;
+			clock-names = "dc", "parent";
+			resets = <&tegra_car 26>;
+			reset-names = "dc";
+
+			rgb {
+				status = "disabled";
+			};
+		};
+
+		hdmi {
+			compatible = "nvidia,tegra20-hdmi";
+			reg = <0x54280000 0x00040000>;
+			interrupts = <0 75 0x04>;
+			clocks = <&tegra_car TEGRA20_CLK_HDMI>,
+				 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
+			clock-names = "hdmi", "parent";
+			resets = <&tegra_car 51>;
+			reset-names = "hdmi";
+			status = "disabled";
+		};
+
+		tvo {
+			compatible = "nvidia,tegra20-tvo";
+			reg = <0x542c0000 0x00040000>;
+			interrupts = <0 76 0x04>;
+			clocks = <&tegra_car TEGRA20_CLK_TVO>;
+			status = "disabled";
+		};
+
+		dsi {
+			compatible = "nvidia,tegra20-dsi";
+			reg = <0x54300000 0x00040000>;
+			clocks = <&tegra_car TEGRA20_CLK_DSI>,
+				 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
+			clock-names = "dsi", "parent";
+			resets = <&tegra_car 48>;
+			reset-names = "dsi";
+			status = "disabled";
+		};
+	};
+
+	...
+};
diff --git a/doc/device-tree-bindings/i2c/generic-acpi.txt b/doc/device-tree-bindings/i2c/generic-acpi.txt
new file mode 100644
index 00000000000..3510a71b570
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/generic-acpi.txt
@@ -0,0 +1,42 @@
+I2C generic device
+==================
+
+This is used only to generate ACPI tables for an I2C device.
+
+Required properties :
+
+ - compatible : "i2c-chip";
+ - reg : I2C chip address
+ - acpi,hid : HID name for the device
+
+Optional properies in addition to device.txt:
+
+ - reset-gpios : GPIO used to assert reset to the device
+ - irq-gpios : GPIO used for interrupt (if Interrupt is not used)
+ - stop-gpios : GPIO used to stop the device
+ - interrupts-extended : Interrupt to use for the device
+ - reset-delay-ms : Delay after de-asserting reset, in ms
+ - reset-off-delay-ms : Delay after asserting reset (during power off)
+ - enable-delay-ms : Delay after asserting enable
+ - enable-off-delay-ms : Delay after de-asserting enable (during power off)
+ - stop-delay-ms : Delay after de-aserting stop
+ - stop-off-delay-ms : Delay after asserting stop (during power off)
+ - hid-descr-addr : HID register offset (for Human Interface Devices)
+
+Example
+-------
+
+	elan-touchscreen@10 {
+		compatible = "i2c-chip";
+		reg = <0x10>;
+		acpi,hid = "ELAN0001";
+		acpi,ddn = "ELAN Touchscreen";
+		interrupts-extended = <&acpi_gpe GPIO_21_IRQ
+			IRQ_TYPE_EDGE_FALLING>;
+		linux,probed;
+		reset-gpios = <&gpio_n GPIO_36 GPIO_ACTIVE_HIGH>;
+		reset-delay-ms = <20>;
+		enable-gpios = <&gpio_n GPIO_152 GPIO_ACTIVE_HIGH>;
+		enable-delay-ms = <1>;
+		acpi,has-power-resource;
+	};
diff --git a/doc/device-tree-bindings/i2c/i2c-at91.txt b/doc/device-tree-bindings/i2c/i2c-at91.txt
new file mode 100644
index 00000000000..2065b7341a0
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/i2c-at91.txt
@@ -0,0 +1,26 @@
+I2C for Atmel platforms
+
+Required properties :
+- compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",
+     "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c",
+     "atmel,at91sam9x5-i2c", "atmel,sama5d4-i2c" or "atmel,sama5d2-i2c".
+- reg: physical base address of the controller and length of memory mapped
+     region.
+- #address-cells = <1>;
+- #size-cells = <0>;
+- clocks: phandles to input clocks.
+
+Optional properties:
+- clock-frequency: Desired I2C bus frequency in Hz, default value is 100000.
+- Child nodes conforming to i2c bus binding.
+
+Examples :
+
+i2c0: i2c@f8028000 {
+	compatible = "atmel,sama5d2-i2c";
+	reg = <0xf8028000 0x100>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+	clocks = <&twi0_clk>;
+	clock-frequency = <100000>;
+};
diff --git a/doc/device-tree-bindings/i2c/i2c-cdns.txt b/doc/device-tree-bindings/i2c/i2c-cdns.txt
new file mode 100644
index 00000000000..eaff34a555b
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/i2c-cdns.txt
@@ -0,0 +1,24 @@
+Cadence I2C controller Device Tree Bindings
+-------------------------------------------
+
+Required properties:
+- compatible		: Should be "cdns,i2c-r1p10" or "xlnx,zynq-spi-r1p10".
+- reg			: Physical base address and size of I2C registers map.
+- interrupts		: Property with a value describing the interrupt
+			  number.
+- interrupt-parent	: Must be core interrupt controller
+- clocks		: Clock phandles (see clock bindings for details).
+
+Optional properties:
+- fifo-depth		: To specify the FIFO depth of the controller.
+
+Example:
+	i2c0: i2c@e0004000 {
+		compatible = "cdns,i2c-r1p10";
+		reg = <0xe0004000 0x1000>;
+		clocks = <&clkc 38>;
+		interrupts = <0 25 4>;
+		interrupt-parent = <&intc>;
+		fifo-depth = <32>;
+		status = "disabled";
+	};
diff --git a/doc/device-tree-bindings/i2c/i2c-cortina.txt b/doc/device-tree-bindings/i2c/i2c-cortina.txt
new file mode 100644
index 00000000000..59d523582a4
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/i2c-cortina.txt
@@ -0,0 +1,18 @@
+* I2C for Cortina platforms
+
+Required properties :
+- compatible : Must be "cortina,ca-i2c"
+- reg : Offset and length of the register set for the device
+
+Recommended properties :
+- clock-frequency : desired I2C bus clock frequency in Hz. If not specified,
+		    default value is 100000. Possible values are 100000,
+		    400000 and 1000000.
+
+Examples :
+
+	i2c: i2c@f4329120 {
+		compatible = "cortina,ca-i2c";
+		reg = <0x0 0xf4329120 0x28>;
+		clock-frequency = <400000>;
+	};
diff --git a/doc/device-tree-bindings/i2c/i2c-designware.txt b/doc/device-tree-bindings/i2c/i2c-designware.txt
new file mode 100644
index 00000000000..be766be8121
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/i2c-designware.txt
@@ -0,0 +1,73 @@
+* Synopsys DesignWare I2C
+
+Required properties :
+
+ - compatible : should be "snps,designware-i2c"
+                or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback
+ - reg : Offset and length of the register set for the device
+ - interrupts : <IRQ> where IRQ is the interrupt number.
+ - clocks : phandles for the clocks, see the description of clock-names below.
+   The phandle for the "ic_clk" clock is required. The phandle for the "pclk"
+   clock is optional. If a single clock is specified but no clock-name, it is
+   the "ic_clk" clock. If both clocks are listed, the "ic_clk" must be first.
+
+Recommended properties :
+
+ - clock-frequency : desired I2C bus clock frequency in Hz.
+
+Optional properties :
+
+ - clock-names : Contains the names of the clocks:
+    "ic_clk", for the core clock used to generate the external I2C clock.
+    "pclk", the interface clock, required for register access.
+
+ - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold
+   time, named ICPU_CFG:TWI_DELAY in the datasheet.
+
+ - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
+   This option is only supported in hardware blocks version 1.11a or newer and
+   on Microsemi SoCs ("mscc,ocelot-i2c" compatible).
+
+ - i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds.
+   This value which is by default 300ns is used to compute the tLOW period.
+
+ - i2c-sda-falling-time-ns : should contain the SDA falling time in nanoseconds.
+   This value which is by default 300ns is used to compute the tHIGH period.
+
+Examples :
+
+	i2c@f0000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,designware-i2c";
+		reg = <0xf0000 0x1000>;
+		interrupts = <11>;
+		clock-frequency = <400000>;
+	};
+
+	i2c@1120000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "snps,designware-i2c";
+		reg = <0x1120000 0x1000>;
+		interrupt-parent = <&ictl>;
+		interrupts = <12 1>;
+		clock-frequency = <400000>;
+		i2c-sda-hold-time-ns = <300>;
+		i2c-sda-falling-time-ns = <300>;
+		i2c-scl-falling-time-ns = <300>;
+	};x
+
+	i2c@1120000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x2000 0x100>;
+		clock-frequency = <400000>;
+		clocks = <&i2cclk>;
+		interrupts = <0>;
+
+		eeprom@64 {
+			compatible = "linux,slave-24c02";
+			reg = <0x40000064>;
+		};
+	};
diff --git a/doc/device-tree-bindings/i2c/i2c-gpio.txt b/doc/device-tree-bindings/i2c/i2c-gpio.txt
new file mode 100644
index 00000000000..b06b8299337
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/i2c-gpio.txt
@@ -0,0 +1,41 @@
+I2C gpio device binding
+=======================
+
+Driver:
+- drivers/i2c/i2c-gpio.c
+
+Software i2c device-tree node properties:
+Required:
+* #address-cells = <1>;
+* #size-cells = <0>;
+* compatible = "i2c-gpio";
+* gpios = <sda ...>, <scl ...>;
+
+Optional:
+* i2c-gpio,delay-us = <5>;
+   The resulting transfer speed can be adjusted by setting the delay[us]
+   between gpio-toggle operations. Speed [Hz] = 1000000 / 4 * udelay[us],
+   It not defined, then default is 5us (~50KHz).
+* i2c-gpio,deblock
+   Run deblocking sequence when the driver gets probed.
+* i2c-gpio,scl-output-only;
+   Set if SCL is an output only
+
+Example:
+
+i2c-gpio@1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+
+	compatible = "i2c-gpio";
+	gpios = <&gpd1 0 GPIO_ACTIVE_HIGH>, /* SDA */
+		<&gpd1 1 GPIO_ACTIVE_HIGH>; /* CLK */
+
+	i2c-gpio,delay-us = <5>;
+
+	some_device@5 {
+		compatible = "some_device";
+		reg = <0x5>;
+		...
+	};
+};
diff --git a/doc/device-tree-bindings/i2c/i2c-mux.txt b/doc/device-tree-bindings/i2c/i2c-mux.txt
new file mode 100644
index 00000000000..af84cce5cd7
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/i2c-mux.txt
@@ -0,0 +1,60 @@
+Common i2c bus multiplexer/switch properties.
+
+An i2c bus multiplexer/switch will have several child busses that are
+numbered uniquely in a device dependent manner.  The nodes for an i2c bus
+multiplexer/switch will have one child node for each child
+bus.
+
+Required properties:
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+Required properties for child nodes:
+- #address-cells = <1>;
+- #size-cells = <0>;
+- reg : The sub-bus number.
+
+Optional properties for child nodes:
+- Other properties specific to the multiplexer/switch hardware.
+- Child nodes conforming to i2c bus binding
+
+
+Example :
+
+	/*
+	   An NXP pca9548 8 channel I2C multiplexer at address 0x70
+	   with two NXP pca8574 GPIO expanders attached, one each to
+	   ports 3 and 4.
+	 */
+
+	mux@70 {
+		compatible = "nxp,pca9548";
+		reg = <0x70>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <3>;
+
+			gpio1: gpio@38 {
+				compatible = "nxp,pca8574";
+				reg = <0x38>;
+				#gpio-cells = <2>;
+				gpio-controller;
+			};
+		};
+		i2c@4 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <4>;
+
+			gpio2: gpio@38 {
+				compatible = "nxp,pca8574";
+				reg = <0x38>;
+				#gpio-cells = <2>;
+				gpio-controller;
+			};
+		};
+	};
diff --git a/doc/device-tree-bindings/i2c/i2c.txt b/doc/device-tree-bindings/i2c/i2c.txt
new file mode 100644
index 00000000000..9698e4899b5
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/i2c.txt
@@ -0,0 +1,46 @@
+U-Boot I2C
+----------
+
+U-Boot's I2C model has the concept of an offset within a chip (I2C target
+device). The offset can be up to 4 bytes long, but is normally 1 byte,
+meaning that offsets from 0 to 255 are supported by the chip. This often
+corresponds to register numbers.
+
+Apart from the controller-specific I2C bindings, U-Boot supports a special
+property which allows the chip offset length to be selected.
+
+Optional properties:
+- u-boot,i2c-offset-len - length of chip offset in bytes. If omitted the
+    default value of 1 is used.
+- u-boot,i2c-transaction-bytes - the length of single I2C transaction on
+    the bus. Some devices require more than single byte transmission
+    (e.g. mc34708 mfd). This information is necessary to correctly
+     initialize (put into idle state) I2C bus after soft reset.
+- gpios = <sda ...>, <scl ...>;
+  pinctrl-names = "default", "gpio";
+  pinctrl-0 = <&i2c_xfer>;
+  pinctrl-1 = <&i2c_gpio>;
+    Pin description for I2C bus software deblocking.
+
+
+Example
+-------
+
+i2c4: i2c@12ca0000 {
+	cros-ec@1e {
+		reg = <0x1e>;
+		compatible = "google,cros-ec";
+		i2c-max-frequency = <100000>;
+		u-boot,i2c-offset-len = <0>;
+		u-boot,i2c-transaction-bytes = <3>;
+		ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
+	};
+};
+
+&i2c1 {
+	pinctrl-names = "default", "gpio";
+	pinctrl-0 = <&i2c1_xfer>;
+	pinctrl-1 = <&i2c1_gpio>;
+	gpios = <&gpio1 26 GPIO_ACTIVE_LOW>, /* SDA */
+		<&gpio1 27 GPIO_ACTIVE_LOW>; /* SCL */
+};
diff --git a/doc/device-tree-bindings/i2c/nvidia,tegra186-bpmp-i2c.txt b/doc/device-tree-bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
new file mode 100644
index 00000000000..ab240e10deb
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/nvidia,tegra186-bpmp-i2c.txt
@@ -0,0 +1,42 @@
+NVIDIA Tegra186 BPMP I2C controller
+
+In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW
+devices, such as the I2C controller for the power management I2C bus. Software
+running on other CPUs must perform IPC to the BPMP in order to execute
+transactions on that I2C bus. This binding describes an I2C bus that is
+accessed in such a fashion.
+
+The BPMP I2C node must be located directly inside the main BPMP node. See
+../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding.
+
+This node represents an I2C controller. See ../i2c/i2c.txt for details of the
+core I2C binding.
+
+Required properties:
+- compatible:
+    Array of strings.
+    One of:
+    - "nvidia,tegra186-bpmp-i2c".
+- #address-cells: Address cells for I2C device address.
+    Single-cell integer.
+    Must be <1>.
+- #size-cells:
+    Single-cell integer.
+    Must be <0>.
+- nvidia,bpmp-bus-id:
+    Single-cell integer.
+    Indicates the I2C bus number this DT node represent, as defined by the
+    BPMP firmware.
+
+Example:
+
+bpmp {
+	...
+
+	i2c {
+		compatible = "nvidia,tegra186-bpmp-i2c";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		nvidia,bpmp-bus-id = <5>;
+	};
+};
diff --git a/doc/device-tree-bindings/i2c/nx_i2c.txt b/doc/device-tree-bindings/i2c/nx_i2c.txt
new file mode 100644
index 00000000000..9f3abe78e4e
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/nx_i2c.txt
@@ -0,0 +1,28 @@
+I2C controller embedded in Nexell's/Samsung's SoC S5P4418 and S5P6818
+
+Driver:
+- drivers/i2c/nx_i2c.c
+
+Required properties:
+- #address-cells = <1>;
+- #size-cells = <0>;
+- compatible = "nexell,s5pxx18-i2c";
+- reg = <i2c_base 0x100>;
+        Where i2c_base has to be the base address of the i2c-register set.
+        I2C0: 0xc00a4000
+        I2C1: 0xc00a5000
+        I2C2: 0xc00a6000
+
+Optional properties:
+- clock-frequency: Desired I2C bus frequency in Hz, default value is 100000.
+- i2c-sda-delay-ns (S5P6818 only): SDA delay in ns, default value is 0.
+- Child nodes conforming to i2c bus binding.
+
+Example:
+	i2c0:i2c@c00a4000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "nexell,s5pxx18-i2c";
+		reg = <0xc00a4000 0x100>;
+		clock-frequency = <400000>;
+	};
diff --git a/doc/device-tree-bindings/i2c/octeon-i2c.txt b/doc/device-tree-bindings/i2c/octeon-i2c.txt
new file mode 100644
index 00000000000..9c1908ec2cc
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/octeon-i2c.txt
@@ -0,0 +1,24 @@
+* I2C controller embedded in Marvell Octeon platforms
+
+Required properties :
+- compatible : Must be "cavium,octeon-7890-twsi" or a compatible string
+- reg : Offset and length of the register set for the device
+- clocks: Must contain the input clock of the I2C instance
+- #address-cells = <1>;
+- #size-cells = <0>;
+
+Optional properties :
+- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
+  the default 100 kHz frequency will be used. As only Normal, Fast and Fast+
+  modes are implemented, possible values are 100000, 400000 and 1000000.
+
+Example :
+
+	i2c0: i2c@1180000001000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "cavium,octeon-7890-twsi";
+		reg = <0x11800 0x00001000 0x0 0x200>;
+		clock-frequency = <100000>;
+		clocks = <&sclk>;
+	};
diff --git a/doc/device-tree-bindings/i2c/tegra20-i2c.txt b/doc/device-tree-bindings/i2c/tegra20-i2c.txt
new file mode 100644
index 00000000000..72649dffa38
--- /dev/null
+++ b/doc/device-tree-bindings/i2c/tegra20-i2c.txt
@@ -0,0 +1,23 @@
+(Placeholder note while we locate the kernel Tegra20 bindings)
+
+Added in U-Boot:
+
+Required properties:
+ - clocks : Two clocks must be given, each as a phandle to the Tegra's
+	    CAR node and the clock number as a parameter:
+     - the I2C clock to use for the peripheral
+     - the pll_p_out3 clock, which can be used for fast operation. This
+	  does not change and is the same for all I2C nodes.
+
+Example:
+(TODO: merge with existing example):
+
+	i2c@7000c400 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "nvidia,tegra20-i2c";
+		reg = <0x7000C400 0x100>;
+		interrupts = < 116 >;
+		/* PERIPH_ID_I2C2, PLL_P_OUT3 */
+		clocks = <&tegra_car 54>, <&tegra_car 124>;
+	};
diff --git a/doc/device-tree-bindings/input/adc-keys.txt b/doc/device-tree-bindings/input/adc-keys.txt
new file mode 100644
index 00000000000..6c8be6a9ace
--- /dev/null
+++ b/doc/device-tree-bindings/input/adc-keys.txt
@@ -0,0 +1,67 @@
+ADC attached resistor ladder buttons
+------------------------------------
+
+Required properties:
+ - compatible: "adc-keys"
+ - io-channels: Phandle to an ADC channel
+ - io-channel-names = "buttons";
+ - keyup-threshold-microvolt: Voltage above or equal to which all the keys are
+			      considered up.
+
+Optional properties:
+	- poll-interval: Poll interval time in milliseconds
+	- autorepeat: Boolean, Enable auto repeat feature of Linux input
+	  subsystem.
+
+Each button (key) is represented as a sub-node of "adc-keys":
+
+Required subnode-properties:
+	- label: Descriptive name of the key.
+	- linux,code: Keycode to emit.
+	- press-threshold-microvolt: voltage above or equal to which this key is
+				     considered pressed.
+
+No two values of press-threshold-microvolt may be the same.
+All values of press-threshold-microvolt must be less than
+keyup-threshold-microvolt.
+
+Example:
+
+#include <dt-bindings/input/input.h>
+
+	adc-keys {
+		compatible = "adc-keys";
+		io-channels = <&lradc 0>;
+		io-channel-names = "buttons";
+		keyup-threshold-microvolt = <2000000>;
+
+		button-up {
+			label = "Volume Up";
+			linux,code = <KEY_VOLUMEUP>;
+			press-threshold-microvolt = <1500000>;
+		};
+
+		button-down {
+			label = "Volume Down";
+			linux,code = <KEY_VOLUMEDOWN>;
+			press-threshold-microvolt = <1000000>;
+		};
+
+		button-enter {
+			label = "Enter";
+			linux,code = <KEY_ENTER>;
+			press-threshold-microvolt = <500000>;
+		};
+	};
+
++--------------------------------+------------------------+
+| 2.000.000 <= value             | no key pressed         |
++--------------------------------+------------------------+
+| 1.500.000 <= value < 2.000.000 | KEY_VOLUMEUP pressed   |
++--------------------------------+------------------------+
+| 1.000.000 <= value < 1.500.000 | KEY_VOLUMEDOWN pressed |
++--------------------------------+------------------------+
+|   500.000 <= value < 1.000.000 | KEY_ENTER pressed      |
++--------------------------------+------------------------+
+|              value <   500.000 | no key pressed         |
++--------------------------------+------------------------+
diff --git a/doc/device-tree-bindings/input/cros-ec-keyb.txt b/doc/device-tree-bindings/input/cros-ec-keyb.txt
new file mode 100644
index 00000000000..0f6355ce39b
--- /dev/null
+++ b/doc/device-tree-bindings/input/cros-ec-keyb.txt
@@ -0,0 +1,72 @@
+ChromeOS EC Keyboard
+
+Google's ChromeOS EC Keyboard is a simple matrix keyboard implemented on
+a separate EC (Embedded Controller) device. It provides a message for reading
+key scans from the EC. These are then converted into keycodes for processing
+by the kernel.
+
+This binding is based on matrix-keymap.txt and extends/modifies it as follows:
+
+Required properties:
+- compatible: "google,cros-ec-keyb"
+
+Optional properties:
+- google,needs-ghost-filter: True to enable a ghost filter for the matrix
+keyboard. This is recommended if the EC does not have its own logic or
+hardware for this.
+
+
+Example:
+
+cros-ec-keyb {
+	compatible = "google,cros-ec-keyb";
+	keypad,num-rows = <8>;
+	keypad,num-columns = <13>;
+	google,needs-ghost-filter;
+	/*
+	 * Keymap entries take the form of 0xRRCCKKKK where
+	 * RR=Row CC=Column KKKK=Key Code
+	 * The values below are for a US keyboard layout and
+	 * are taken from the Linux driver. Note that the
+	 * 102ND key is not used for US keyboards.
+	 */
+	linux,keymap = <
+		/* CAPSLCK F1         B          F10     */
+		0x0001003a 0x0002003b 0x00030030 0x00040044
+		/* N       =          R_ALT      ESC     */
+		0x00060031 0x0008000d 0x000a0064 0x01010001
+		/* F4      G          F7         H       */
+		0x0102003e 0x01030022 0x01040041 0x01060023
+		/* '       F9         BKSPACE    L_CTRL  */
+		0x01080028 0x01090043 0x010b000e 0x0200001d
+		/* TAB     F3         T          F6      */
+		0x0201000f 0x0202003d 0x02030014 0x02040040
+		/* ]       Y          102ND      [       */
+		0x0205001b 0x02060015 0x02070056 0x0208001a
+		/* F8      GRAVE      F2         5       */
+		0x02090042 0x03010029 0x0302003c 0x03030006
+		/* F5      6          -          \       */
+		0x0304003f 0x03060007 0x0308000c 0x030b002b
+		/* R_CTRL  A          D          F       */
+		0x04000061 0x0401001e 0x04020020 0x04030021
+		/* S       K          J          ;       */
+		0x0404001f 0x04050025 0x04060024 0x04080027
+		/* L       ENTER      Z          C       */
+		0x04090026 0x040b001c 0x0501002c 0x0502002e
+		/* V       X          ,          M       */
+		0x0503002f 0x0504002d 0x05050033 0x05060032
+		/* L_SHIFT /          .          SPACE   */
+		0x0507002a 0x05080035 0x05090034 0x050B0039
+		/* 1       3          4          2       */
+		0x06010002 0x06020004 0x06030005 0x06040003
+		/* 8       7          0          9       */
+		0x06050009 0x06060008 0x0608000b 0x0609000a
+		/* L_ALT   DOWN       RIGHT      Q       */
+		0x060a0038 0x060b006c 0x060c006a 0x07010010
+		/* E       R          W          I       */
+		0x07020012 0x07030013 0x07040011 0x07050017
+		/* U       R_SHIFT    P          O       */
+		0x07060016 0x07070036 0x07080019 0x07090018
+		/* UP      LEFT    */
+		0x070b0067 0x070c0069>;
+};
diff --git a/doc/device-tree-bindings/input/hid-over-i2c.txt b/doc/device-tree-bindings/input/hid-over-i2c.txt
new file mode 100644
index 00000000000..c76bafaf98d
--- /dev/null
+++ b/doc/device-tree-bindings/input/hid-over-i2c.txt
@@ -0,0 +1,44 @@
+* HID over I2C Device-Tree bindings
+
+HID over I2C provides support for various Human Interface Devices over the
+I2C bus. These devices can be for example touchpads, keyboards, touch screens
+or sensors.
+
+The specification has been written by Microsoft and is currently available here:
+http://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx
+
+If this binding is used, the kernel module i2c-hid will handle the communication
+with the device and the generic hid core layer will handle the protocol.
+
+Required properties:
+- compatible: must be "hid-over-i2c"
+- reg: i2c slave address
+- hid-descr-addr: HID descriptor address
+- interrupts: interrupt line
+
+Additional optional properties:
+
+Some devices may support additional optional properties to help with, e.g.,
+power sequencing. The following properties can be supported by one or more
+device-specific compatible properties, which should be used in addition to the
+"hid-over-i2c" string.
+
+- compatible:
+  * "wacom,w9013" (Wacom W9013 digitizer). Supports:
+    - vdd-supply (3.3V)
+    - vddl-supply (1.8V)
+    - post-power-on-delay-ms
+
+- vdd-supply: phandle of the regulator that provides the supply voltage.
+- post-power-on-delay-ms: time required by the device after enabling its regulators
+  or powering it on, before it is ready for communication.
+
+Example:
+
+	i2c-hid-dev@2c {
+		compatible = "hid-over-i2c";
+		reg = <0x2c>;
+		hid-descr-addr = <0x0020>;
+		interrupt-parent = <&gpx3>;
+		interrupts = <3 2>;
+	};
diff --git a/doc/device-tree-bindings/input/i8042.txt b/doc/device-tree-bindings/input/i8042.txt
new file mode 100644
index 00000000000..cd079c2740a
--- /dev/null
+++ b/doc/device-tree-bindings/input/i8042.txt
@@ -0,0 +1,10 @@
+i8042 Keyboard
+
+The Intel i8042 is a keyboard controller used on many x86 PCs.
+
+Required properties:
+- compatible: "intel,i8042-keyboard"
+
+Optional properties:
+- intel,duplicate-por: Indicates that a keyboard reset may result in a
+  duplicate POR byte, which should be ignored.
diff --git a/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
new file mode 100644
index 00000000000..2fe02d8a227
--- /dev/null
+++ b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
@@ -0,0 +1,30 @@
+* Intel Advanced Configuration and Power Interface General Purpose Events
+
+This describes an interrupt controller which provides access to GPEs supported
+by the SoC.
+
+Required properties:
+
+- compatible : "intel,acpi-gpe"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : The number of cells to define the interrupts.  Must be 2:
+     cell 0: interrupt number (normally >=32 since GPEs below that are reserved)
+     cell 1: 0 (flags, but none are currently defined)
+- reg : The register bank for the controller (set this to the ACPI base).
+
+Example:
+
+	general-purpose-events {
+		reg = <IOMAP_ACPI_BASE IOMAP_ACPI_SIZE>;
+		compatible = "intel,acpi-gpe";
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	...
+	tpm@50 {
+		reg = <0x50>;
+		compatible = "google,cr50";
+		ready-gpios = <&gpio_n 0x1c GPIO_ACTIVE_LOW>;
+		interrupts-extended = <&acpi_gpe 0x3c 0>;
+	};
diff --git a/doc/device-tree-bindings/interrupt-controller/interrupts.txt b/doc/device-tree-bindings/interrupt-controller/interrupts.txt
new file mode 100644
index 00000000000..38a399a6b1b
--- /dev/null
+++ b/doc/device-tree-bindings/interrupt-controller/interrupts.txt
@@ -0,0 +1,131 @@
+Specifying interrupt information for devices
+============================================
+
+1) Interrupt client nodes
+-------------------------
+
+Nodes that describe devices which generate interrupts must contain an
+"interrupts" property, an "interrupts-extended" property, or both. If both are
+present, the latter should take precedence; the former may be provided simply
+for compatibility with software that does not recognize the latter. These
+properties contain a list of interrupt specifiers, one per output interrupt. The
+format of the interrupt specifier is determined by the interrupt controller to
+which the interrupts are routed; see section 2 below for details.
+
+  Example:
+	interrupt-parent = <&intc1>;
+	interrupts = <5 0>, <6 0>;
+
+The "interrupt-parent" property is used to specify the controller to which
+interrupts are routed and contains a single phandle referring to the interrupt
+controller node. This property is inherited, so it may be specified in an
+interrupt client node or in any of its parent nodes. Interrupts listed in the
+"interrupts" property are always in reference to the node's interrupt parent.
+
+The "interrupts-extended" property is a special form; useful when a node needs
+to reference multiple interrupt parents or a different interrupt parent than
+the inherited one. Each entry in this property contains both the parent phandle
+and the interrupt specifier.
+
+  Example:
+	interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
+
+(NOTE: only this 'special form' is supported in U-Boot)
+
+
+2) Interrupt controller nodes
+-----------------------------
+
+A device is marked as an interrupt controller with the "interrupt-controller"
+property. This is a empty, boolean property. An additional "#interrupt-cells"
+property defines the number of cells needed to specify a single interrupt.
+
+It is the responsibility of the interrupt controller's binding to define the
+length and format of the interrupt specifier. The following two variants are
+commonly used:
+
+  a) one cell
+  -----------
+  The #interrupt-cells property is set to 1 and the single cell defines the
+  index of the interrupt within the controller.
+
+  Example:
+
+	vic: intc@10140000 {
+		compatible = "arm,versatile-vic";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		reg = <0x10140000 0x1000>;
+	};
+
+	sic: intc@10003000 {
+		compatible = "arm,versatile-sic";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		reg = <0x10003000 0x1000>;
+		interrupt-parent = <&vic>;
+		interrupts = <31>; /* Cascaded to vic */
+	};
+
+  b) two cells
+  ------------
+  The #interrupt-cells property is set to 2 and the first cell defines the
+  index of the interrupt within the controller, while the second cell is used
+  to specify any of the following flags:
+    - bits[3:0] trigger type and level flags
+        1 = low-to-high edge triggered
+        2 = high-to-low edge triggered
+        4 = active high level-sensitive
+        8 = active low level-sensitive
+
+  Example:
+
+	i2c@7000c000 {
+		gpioext: gpio-adnp@41 {
+			compatible = "ad,gpio-adnp";
+			reg = <0x41>;
+
+			interrupt-parent = <&gpio>;
+			interrupts = <160 1>;
+
+			gpio-controller;
+			#gpio-cells = <1>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+
+			nr-gpios = <64>;
+		};
+
+		sx8634@2b {
+			compatible = "smtc,sx8634";
+			reg = <0x2b>;
+
+			interrupt-parent = <&gpioext>;
+			interrupts = <3 0x8>;
+
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			threshold = <0x40>;
+			sensitivity = <7>;
+		};
+	};
+
+
+Example of special form (supported by U-Boot):
+
+	acpi_gpe: general-purpose-events {
+		reg = <IOMAP_ACPI_BASE IOMAP_ACPI_SIZE>;
+		compatible = "intel,acpi-gpe";
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	tpm@50 {
+		reg = <0x50>;
+		compatible = "google,cr50";
+		u-boot,i2c-offset-len = <0>;
+		ready-gpio = <&gpio_n 28 GPIO_ACTIVE_LOW>;
+		interrupts-extended = <&acpi_gpe 0x3c 0>;
+	};
diff --git a/doc/device-tree-bindings/iommu/iommu.txt b/doc/device-tree-bindings/iommu/iommu.txt
new file mode 100644
index 00000000000..26ba9e530f1
--- /dev/null
+++ b/doc/device-tree-bindings/iommu/iommu.txt
@@ -0,0 +1,206 @@
+This document describes the generic device tree binding for IOMMUs and their
+master(s).
+
+
+IOMMU device node:
+==================
+
+An IOMMU can provide the following services:
+
+* Remap address space to allow devices to access physical memory ranges that
+  they otherwise wouldn't be capable of accessing.
+
+  Example: 32-bit DMA to 64-bit physical addresses
+
+* Implement scatter-gather at page level granularity so that the device does
+  not have to.
+
+* Provide system protection against "rogue" DMA by forcing all accesses to go
+  through the IOMMU and faulting when encountering accesses to unmapped
+  address regions.
+
+* Provide address space isolation between multiple contexts.
+
+  Example: Virtualization
+
+Device nodes compatible with this binding represent hardware with some of the
+above capabilities.
+
+IOMMUs can be single-master or multiple-master. Single-master IOMMU devices
+typically have a fixed association to the master device, whereas multiple-
+master IOMMU devices can translate accesses from more than one master.
+
+The device tree node of the IOMMU device's parent bus must contain a valid
+"dma-ranges" property that describes how the physical address space of the
+IOMMU maps to memory. An empty "dma-ranges" property means that there is a
+1:1 mapping from IOMMU to memory.
+
+Required properties:
+--------------------
+- #iommu-cells: The number of cells in an IOMMU specifier needed to encode an
+  address.
+
+The meaning of the IOMMU specifier is defined by the device tree binding of
+the specific IOMMU. Below are a few examples of typical use-cases:
+
+- #iommu-cells = <0>: Single master IOMMU devices are not configurable and
+  therefore no additional information needs to be encoded in the specifier.
+  This may also apply to multiple master IOMMU devices that do not allow the
+  association of masters to be configured. Note that an IOMMU can by design
+  be multi-master yet only expose a single master in a given configuration.
+  In such cases the number of cells will usually be 1 as in the next case.
+- #iommu-cells = <1>: Multiple master IOMMU devices may need to be configured
+  in order to enable translation for a given master. In such cases the single
+  address cell corresponds to the master device's ID. In some cases more than
+  one cell can be required to represent a single master ID.
+- #iommu-cells = <4>: Some IOMMU devices allow the DMA window for masters to
+  be configured. The first cell of the address in this may contain the master
+  device's ID for example, while the second cell could contain the start of
+  the DMA window for the given device. The length of the DMA window is given
+  by the third and fourth cells.
+
+Note that these are merely examples and real-world use-cases may use different
+definitions to represent their individual needs. Always refer to the specific
+IOMMU binding for the exact meaning of the cells that make up the specifier.
+
+
+IOMMU master node:
+==================
+
+Devices that access memory through an IOMMU are called masters. A device can
+have multiple master interfaces (to one or more IOMMU devices).
+
+Required properties:
+--------------------
+- iommus: A list of phandle and IOMMU specifier pairs that describe the IOMMU
+  master interfaces of the device. One entry in the list describes one master
+  interface of the device.
+
+When an "iommus" property is specified in a device tree node, the IOMMU will
+be used for address translation. If a "dma-ranges" property exists in the
+device's parent node it will be ignored. An exception to this rule is if the
+referenced IOMMU is disabled, in which case the "dma-ranges" property of the
+parent shall take effect. Note that merely disabling a device tree node does
+not guarantee that the IOMMU is really disabled since the hardware may not
+have a means to turn off translation. But it is invalid in such cases to
+disable the IOMMU's device tree node in the first place because it would
+prevent any driver from properly setting up the translations.
+
+Optional properties:
+--------------------
+- pasid-num-bits: Some masters support multiple address spaces for DMA, by
+  tagging DMA transactions with an address space identifier. By default,
+  this is 0, which means that the device only has one address space.
+
+- dma-can-stall: When present, the master can wait for a transaction to
+  complete for an indefinite amount of time. Upon translation fault some
+  IOMMUs, instead of aborting the translation immediately, may first
+  notify the driver and keep the transaction in flight. This allows the OS
+  to inspect the fault and, for example, make physical pages resident
+  before updating the mappings and completing the transaction. Such IOMMU
+  accepts a limited number of simultaneous stalled transactions before
+  having to either put back-pressure on the master, or abort new faulting
+  transactions.
+
+  Firmware has to opt-in stalling, because most buses and masters don't
+  support it. In particular it isn't compatible with PCI, where
+  transactions have to complete before a time limit. More generally it
+  won't work in systems and masters that haven't been designed for
+  stalling. For example the OS, in order to handle a stalled transaction,
+  may attempt to retrieve pages from secondary storage in a stalled
+  domain, leading to a deadlock.
+
+
+Notes:
+======
+
+One possible extension to the above is to use an "iommus" property along with
+a "dma-ranges" property in a bus device node (such as PCI host bridges). This
+can be useful to describe how children on the bus relate to the IOMMU if they
+are not explicitly listed in the device tree (e.g. PCI devices). However, the
+requirements of that use-case haven't been fully determined yet. Implementing
+this is therefore not recommended without further discussion and extension of
+this binding.
+
+
+Examples:
+=========
+
+Single-master IOMMU:
+--------------------
+
+	iommu {
+		#iommu-cells = <0>;
+	};
+
+	master {
+		iommus = <&{/iommu}>;
+	};
+
+Multiple-master IOMMU with fixed associations:
+----------------------------------------------
+
+	/* multiple-master IOMMU */
+	iommu {
+		/*
+		 * Masters are statically associated with this IOMMU and share
+		 * the same address translations because the IOMMU does not
+		 * have sufficient information to distinguish between masters.
+		 *
+		 * Consequently address translation is always on or off for
+		 * all masters at any given point in time.
+		 */
+		#iommu-cells = <0>;
+	};
+
+	/* static association with IOMMU */
+	master@1 {
+		reg = <1>;
+		iommus = <&{/iommu}>;
+	};
+
+	/* static association with IOMMU */
+	master@2 {
+		reg = <2>;
+		iommus = <&{/iommu}>;
+	};
+
+Multiple-master IOMMU:
+----------------------
+
+	iommu {
+		/* the specifier represents the ID of the master */
+		#iommu-cells = <1>;
+	};
+
+	master@1 {
+		/* device has master ID 42 in the IOMMU */
+		iommus = <&{/iommu} 42>;
+	};
+
+	master@2 {
+		/* device has master IDs 23 and 24 in the IOMMU */
+		iommus = <&{/iommu} 23>, <&{/iommu} 24>;
+	};
+
+Multiple-master IOMMU with configurable DMA window:
+---------------------------------------------------
+
+	/ {
+		iommu {
+			/*
+			 * One cell for the master ID and one cell for the
+			 * address of the DMA window. The length of the DMA
+			 * window is encoded in two cells.
+			 *
+			 * The DMA window is the range addressable by the
+			 * master (i.e. the I/O virtual address space).
+			 */
+			#iommu-cells = <4>;
+		};
+
+		master {
+			/* master ID 42, 4 GiB DMA window starting at 0 */
+			iommus = <&{/iommu}  42  0  0x1 0x0>;
+		};
+	};
diff --git a/doc/device-tree-bindings/leds/common.txt b/doc/device-tree-bindings/leds/common.txt
new file mode 100644
index 00000000000..2d88816dd55
--- /dev/null
+++ b/doc/device-tree-bindings/leds/common.txt
@@ -0,0 +1,23 @@
+Common leds properties.
+
+Optional properties for child nodes:
+- label : The label for this LED.  If omitted, the label is
+  taken from the node name (excluding the unit address).
+
+- linux,default-trigger :  This parameter, if present, is a
+    string defining the trigger assigned to the LED.  Current triggers are:
+     "backlight" - LED will act as a back-light, controlled by the framebuffer
+		   system
+     "default-on" - LED will turn on (but for leds-gpio see "default-state"
+		    property in Documentation/devicetree/bindings/gpio/led.txt)
+     "heartbeat" - LED "double" flashes at a load average based rate
+     "ide-disk" - LED indicates disk activity
+     "timer" - LED flashes at a fixed, configurable rate
+
+Examples:
+
+system-status {
+	label = "Status";
+	linux,default-trigger = "heartbeat";
+	...
+};
diff --git a/doc/device-tree-bindings/leds/leds-bcm6328.txt b/doc/device-tree-bindings/leds/leds-bcm6328.txt
new file mode 100644
index 00000000000..7f5597b7373
--- /dev/null
+++ b/doc/device-tree-bindings/leds/leds-bcm6328.txt
@@ -0,0 +1,106 @@
+LEDs connected to Broadcom BCM6328 controller
+
+This controller is present on BCM6318, BCM6328, BCM6362 and BCM63268.
+In these SoCs it's possible to control LEDs both as GPIOs or by hardware.
+However, on some devices there are Serial LEDs (LEDs connected to a 74x164
+controller), which can either be controlled by software (exporting the 74x164
+as spi-gpio. See Documentation/devicetree/bindings/gpio/gpio-74x164.txt), or
+by hardware using this driver.
+Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and
+exporting the 74x164 as spi-gpio prevents those LEDs to be hardware
+controlled, so the only chance to keep them working is by using this driver.
+
+Required properties:
+  - compatible : should be "brcm,bcm6328-leds".
+  - #address-cells : must be 1.
+  - #size-cells : must be 0.
+  - reg : BCM6328 LED controller address and size.
+
+Optional properties:
+  - brcm,serial-leds : Boolean, enables Serial LEDs.
+    Default : false
+  - brcm,serial-mux : Boolean, enables Serial LEDs multiplexing.
+    Default : false
+  - brcm,serial-clk-low : Boolean, makes clock signal active low.
+    Default : false
+  - brcm,serial-dat-low : Boolean, makes data signal active low.
+    Default : false
+  - brcm,serial-shift-inv : Boolean, inverts Serial LEDs shift direction.
+    Default : false
+
+Each LED is represented as a sub-node of the brcm,bcm6328-leds device.
+
+LED sub-node required properties:
+  - reg : LED pin number (only LEDs 0 to 23 are valid).
+
+LED sub-node optional properties:
+  - label : see Documentation/devicetree/bindings/leds/common.txt
+  - active-low : Boolean, makes LED active low.
+    Default : false
+
+Examples:
+Scenario 1 : BCM6328 with 4 GPIO LEDs
+	leds0: led-controller@10000800 {
+		compatible = "brcm,bcm6328-leds";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x10000800 0x24>;
+
+		alarm_red@2 {
+			reg = <2>;
+			active-low;
+			label = "red:alarm";
+		};
+		inet_green@3 {
+			reg = <3>;
+			active-low;
+			label = "green:inet";
+		};
+		power_green@4 {
+			reg = <4>;
+			active-low;
+			label = "green:power";
+		};
+	};
+
+Scenario 2 : BCM63268 with Serial LEDs
+	leds0: led-controller@10001900 {
+		compatible = "brcm,bcm6328-leds";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x10001900 0x24>;
+		brcm,serial-leds;
+		brcm,serial-dat-low;
+		brcm,serial-shift-inv;
+
+		inet_red@2 {
+			reg = <2>;
+			active-low;
+			label = "red:inet";
+		};
+		dsl_green@3 {
+			reg = <3>;
+			active-low;
+			label = "green:dsl";
+		};
+		usb_green@4 {
+			reg = <4>;
+			active-low;
+			label = "green:usb";
+		};
+		wps_green@7 {
+			reg = <7>;
+			active-low;
+			label = "green:wps";
+		};
+		inet_green@8 {
+			reg = <8>;
+			active-low;
+			label = "green:inet";
+		};
+		power_green@20 {
+			reg = <20>;
+			active-low;
+			label = "green:power";
+		};
+	};
diff --git a/doc/device-tree-bindings/leds/leds-bcm6358.txt b/doc/device-tree-bindings/leds/leds-bcm6358.txt
new file mode 100644
index 00000000000..e394d9ebb40
--- /dev/null
+++ b/doc/device-tree-bindings/leds/leds-bcm6358.txt
@@ -0,0 +1,141 @@
+LEDs connected to Broadcom BCM6358 controller
+
+This controller is present on BCM6358 and BCM6368.
+In these SoCs there are Serial LEDs (LEDs connected to a 74x164 controller),
+which can either be controlled by software (exporting the 74x164 as spi-gpio.
+See Documentation/devicetree/bindings/gpio/gpio-74x164.txt), or
+by hardware using this driver.
+
+Required properties:
+  - compatible : should be "brcm,bcm6358-leds".
+  - #address-cells : must be 1.
+  - #size-cells : must be 0.
+  - reg : BCM6358 LED controller address and size.
+
+Optional properties:
+  - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8.
+    Default : 1
+  - brcm,clk-dat-low : Boolean, makes clock and data signals active low.
+    Default : false
+
+Each LED is represented as a sub-node of the brcm,bcm6358-leds device.
+
+LED sub-node required properties:
+  - reg : LED pin number (only LEDs 0 to 31 are valid).
+
+LED sub-node optional properties:
+  - label : see Documentation/devicetree/bindings/leds/common.txt
+  - active-low : Boolean, makes LED active low.
+    Default : false
+
+Examples:
+Scenario 1 : BCM6358
+	leds0: led-controller@fffe00d0 {
+		compatible = "brcm,bcm6358-leds";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0xfffe00d0 0x8>;
+
+		alarm_white {
+			reg = <0>;
+			active-low;
+			label = "white:alarm";
+		};
+		tv_white {
+			reg = <2>;
+			active-low;
+			label = "white:tv";
+		};
+		tel_white {
+			reg = <3>;
+			active-low;
+			label = "white:tel";
+		};
+		adsl_white {
+			reg = <4>;
+			active-low;
+			label = "white:adsl";
+		};
+	};
+
+Scenario 2 : BCM6368
+	leds0: led-controller@100000d0 {
+		compatible = "brcm,bcm6358-leds";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x100000d0 0x8>;
+		brcm,pol-low;
+		brcm,clk-div = <4>;
+
+		power_red {
+			reg = <0>;
+			active-low;
+			label = "red:power";
+		};
+		power_green {
+			reg = <1>;
+			active-low;
+			label = "green:power";
+			default-state = "on";
+		};
+		power_blue {
+			reg = <2>;
+			label = "blue:power";
+		};
+		broadband_red {
+			reg = <3>;
+			active-low;
+			label = "red:broadband";
+		};
+		broadband_green {
+			reg = <4>;
+			label = "green:broadband";
+		};
+		broadband_blue {
+			reg = <5>;
+			active-low;
+			label = "blue:broadband";
+		};
+		wireless_red {
+			reg = <6>;
+			active-low;
+			label = "red:wireless";
+		};
+		wireless_green {
+			reg = <7>;
+			active-low;
+			label = "green:wireless";
+		};
+		wireless_blue {
+			reg = <8>;
+			label = "blue:wireless";
+		};
+		phone_red {
+			reg = <9>;
+			active-low;
+			label = "red:phone";
+		};
+		phone_green {
+			reg = <10>;
+			active-low;
+			label = "green:phone";
+		};
+		phone_blue {
+			reg = <11>;
+			label = "blue:phone";
+		};
+		upgrading_red {
+			reg = <12>;
+			active-low;
+			label = "red:upgrading";
+		};
+		upgrading_green {
+			reg = <13>;
+			active-low;
+			label = "green:upgrading";
+		};
+		upgrading_blue {
+			reg = <14>;
+			label = "blue:upgrading";
+		};
+	};
diff --git a/doc/device-tree-bindings/leds/leds-bcm6858.txt b/doc/device-tree-bindings/leds/leds-bcm6858.txt
new file mode 100644
index 00000000000..ea2fe23709a
--- /dev/null
+++ b/doc/device-tree-bindings/leds/leds-bcm6858.txt
@@ -0,0 +1,51 @@
+LEDs connected to Broadcom BCM6858 controller
+
+This controller is present on BCM6858, BCM6328, BCM6362 and BCM63268.
+In these SoCs it's possible to control LEDs both as GPIOs or by hardware.
+
+Required properties:
+  - compatible : should be "brcm,bcm6858-leds".
+  - #address-cells : must be 1.
+  - #size-cells : must be 0.
+  - reg : BCM6858 LED controller address and size.
+
+Optional properties:
+  - brcm,serial-led-msb-first : Boolean, msb data come out first on serial data pin
+    Default : false
+  - brcm,serial-led-en-pol : Boolean, serial led polarity (true => active high)
+    Default : false
+  - brcm,serial-led-clk-pol : Boolean, serial clock polarity (true => active high)
+    Default : false
+  - brcm,serial-led-data-ppol : Boolean, serial data polarity (true => active high)
+    Default : false
+  - brcm,serial-shift-inv : Boolean, led test mode
+    Default : false
+
+Each LED is represented as a sub-node of the brcm,bcm6858-leds device.
+
+LED sub-node required properties:
+  - reg : LED pin number (only LEDs 0 to 32 are valid).
+
+LED sub-node optional properties:
+  - label : see Documentation/devicetree/bindings/leds/common.txt
+  - active-low : Boolean, makes LED active low.
+    Default : false
+
+Examples:
+BCM6328 with 2 GPIO LEDs
+	leds0: led-controller@ff800800 {
+		compatible = "brcm,bcm6858-leds";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x0 0xff800800 0x0 0xe4>;
+
+		led@2 {
+			reg = <2>;
+			label = "green:inet";
+		};
+
+		led@5 {
+			reg = <5>;
+			label = "red:alarm";
+		};
+	};
diff --git a/doc/device-tree-bindings/leds/leds-gpio.txt b/doc/device-tree-bindings/leds/leds-gpio.txt
new file mode 100644
index 00000000000..df1b3080f6b
--- /dev/null
+++ b/doc/device-tree-bindings/leds/leds-gpio.txt
@@ -0,0 +1,52 @@
+LEDs connected to GPIO lines
+
+Required properties:
+- compatible : should be "gpio-leds".
+
+Each LED is represented as a sub-node of the gpio-leds device.  Each
+node's name represents the name of the corresponding LED.
+
+LED sub-node properties:
+- gpios :  Should specify the LED's GPIO, see "gpios property" in
+  Documentation/devicetree/bindings/gpio/gpio.txt.  Active low LEDs should be
+  indicated using flags in the GPIO specifier.
+- label :  (optional)
+  see Documentation/devicetree/bindings/leds/common.txt
+- linux,default-trigger :  (optional)
+  see Documentation/devicetree/bindings/leds/common.txt
+- default-state:  (optional) The initial state of the LED.  Valid
+  values are "on", "off", and "keep".  If the LED is already on or off
+  and the default-state property is set the to same value, then no
+  glitch should be produced where the LED momentarily turns off (or
+  on).  The "keep" setting will keep the LED at whatever its current
+  state is, without producing a glitch.  The default is off if this
+  property is not present.
+
+Examples:
+
+leds {
+	compatible = "gpio-leds";
+	hdd {
+		label = "IDE Activity";
+		gpios = <&mcu_pio 0 1>; /* Active low */
+		linux,default-trigger = "ide-disk";
+	};
+
+	fault {
+		gpios = <&mcu_pio 1 0>;
+		/* Keep LED on if BIOS detected hardware fault */
+		default-state = "keep";
+	};
+};
+
+run-control {
+	compatible = "gpio-leds";
+	red {
+		gpios = <&mpc8572 6 0>;
+		default-state = "off";
+	};
+	green {
+		gpios = <&mpc8572 7 0>;
+		default-state = "on";
+	};
+};
diff --git a/doc/device-tree-bindings/leds/leds-lp5562.txt b/doc/device-tree-bindings/leds/leds-lp5562.txt
new file mode 100644
index 00000000000..4e0c742959a
--- /dev/null
+++ b/doc/device-tree-bindings/leds/leds-lp5562.txt
@@ -0,0 +1,63 @@
+LEDs connected to TI LP5562 controller
+
+This driver works with a TI LP5562 4-channel LED controller.
+CONFIG_LED_BLINK is supported using the controller engines.  However
+there are only 3 engines available for the 4 channels.  This means
+that the blue and white channels share the same engine.  When both
+blue and white LEDs are set to blink, they will share the same blink
+rate.  Changing the blink rate of the blue LED will affect the white
+LED and vice-versa.  Manual on/off is handled independently for all 4
+channels.
+
+Required properties:
+  - compatible : should be "ti,lp5562".
+  - #address-cells : must be 1.
+  - #size-cells : must be 0.
+  - reg : LP5562 LED controller I2C address.
+
+Optional properties:
+  - enable-gpios : Enable GPIO
+  - clock-mode : u8, configures the clock mode:
+      - 0 # automode
+      - 1 # internal
+      - 2 # external
+
+Each LED is represented as a sub-node of the ti,lp5562 device.
+
+LED sub-node required properties:
+  - reg : Zero-based channel identifier:
+    - 0 red
+    - 1 green
+    - 2 blue
+    - 3 white
+
+LED sub-node optional properties:
+  - chan-name : name of LED
+  - max-cur : LED current at max brightness in 100uA steps (0x00 - 0xFF)
+    Default : 100 (10 mA)
+
+Example:
+        leds0: lp5562@30 {
+                compatible = "ti,lp5562";
+                #address-cells = <1>;
+                #size-cells = <0>;
+                enable-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH>;
+                reg = <0x30>;
+		clock-mode = /bits/8 <1>;
+
+                led@0 {
+                        reg = <0>;
+                        chan-name = "red";
+                        max-cur = /bits/ 8 <200>; /* 20mA */
+                };
+                led@1 {
+                        reg = <1>;
+                        chan-name = "green";
+                        max-cur = /bits/ 8 <200>; /* 20mA */
+                };
+                led@2 {
+                        reg = <2>;
+                        chan-name = "blue";
+                        max-cur = /bits/ 8 <200>; /* 20mA */
+                };
+        };
diff --git a/doc/device-tree-bindings/leds/leds-pwm.txt b/doc/device-tree-bindings/leds/leds-pwm.txt
new file mode 100644
index 00000000000..186e8a848f7
--- /dev/null
+++ b/doc/device-tree-bindings/leds/leds-pwm.txt
@@ -0,0 +1,47 @@
+LEDs connected to PWM (Linux compatible)
+
+Required properties:
+- compatible : should be "pwm-leds".
+
+Each LED is represented as a sub-node of the pwm-leds device.  Each
+node's name represents the name of the corresponding LED.
+
+LED sub-node properties:
+- pwms :  (required) LED pwm channel, see "pwms property" in
+  doc/device-tree-bindings/pwm/pwm.txt
+- label :  (optional) LED label, see "label property" in
+  doc/device-tree-bindings/led/common.txt
+- max-brightness :  (optional, unsigned, default 255) Maximum brightness possible
+  for the LED
+- active-low :  (optional, boolean, default false) For PWMs where the LED is
+  wired to supply rather than ground
+- u-boot,default-brightness :  (optional, unsigned, default 0) Initial state
+  of pwm-leds
+
+Example:
+
+leds {
+    compatible = "pwm-leds";
+    status = "okay";
+
+    blue {
+        label = "led-blue";
+        pwms = <&pwm1 0 100000 0>;
+        max-brightness = <255>;
+        u-boot,default-brightness = <127>;
+    };
+
+    green {
+        label = "led-green";
+        pwms = <&pwm2 0 100000 0>;
+        max-brightness = <255>;
+        u-boot,default-brightness = <127>;
+    };
+
+    red {
+        label = "led-red";
+        pwms = <&pwm3 0 100000 0>;
+        max-brightness = <255>;
+        u-boot,default-brightness = <127>;
+    };
+}
diff --git a/doc/device-tree-bindings/mailbox/k3-secure-proxy.txt b/doc/device-tree-bindings/mailbox/k3-secure-proxy.txt
new file mode 100644
index 00000000000..c25d7091bfe
--- /dev/null
+++ b/doc/device-tree-bindings/mailbox/k3-secure-proxy.txt
@@ -0,0 +1,40 @@
+Texas Instruments' K3 Secure Proxy
+===================================
+
+The Texas Instruments' K3 Secure Proxy is a mailbox controller that has
+configurable threads maintained by System power processor. Each thread
+has different address space that can be used to send or receive messages.
+
+Secure Proxy Device Node:
+===========================
+Required properties:
+--------------------
+- compatible:		Shall be: "ti,am654-secure-proxy"
+- reg-names		data - Map the data region
+			scfg - Map the secure configuration region
+			rt - Map the Realtime region.
+- reg:			Contains the register map per reg-names.
+- #mbox-cells		Shall be 1. Contains the thread ID.
+
+Example:
+--------
+
+secproxy: secproxy@285b0000 {
+	compatible = "ti,am654-secure-proxy";
+	reg = <0x2a380000 0x80000>,
+		<0x2a400000 0x80000>,
+		<0x2a480000 0x80000>;
+	reg-names = "rt", "scfg", "data";
+	#mbox-cells = <1>;
+};
+
+client:
+
+systemcontroller: systemcontroller {
+	[...]
+	# RX thread ID is 4.
+	# TX thread ID is 5.
+	mboxes= <&secproxy 4>,
+		<&secproxy 5>;
+	[...]
+};
diff --git a/doc/device-tree-bindings/mailbox/mailbox.txt b/doc/device-tree-bindings/mailbox/mailbox.txt
new file mode 100644
index 00000000000..be05b9746c6
--- /dev/null
+++ b/doc/device-tree-bindings/mailbox/mailbox.txt
@@ -0,0 +1,32 @@
+* Generic Mailbox Controller and client driver bindings
+
+Generic binding to provide a way for Mailbox controller drivers to
+assign appropriate mailbox channel to client drivers.
+
+* Mailbox Controller
+
+Required property:
+- #mbox-cells: Must be at least 1. Number of cells in a mailbox
+		specifier.
+
+Example:
+	mailbox: mailbox {
+		...
+		#mbox-cells = <1>;
+	};
+
+
+* Mailbox Client
+
+Required property:
+- mboxes: List of phandle and mailbox channel specifiers.
+
+Optional property:
+- mbox-names: List of identifier strings for each mailbox channel.
+
+Example:
+	pwr_cntrl: power {
+		...
+		mbox-names = "pwr-ctrl", "rpc";
+		mboxes = <&mailbox 0 &mailbox 1>;
+	};
diff --git a/doc/device-tree-bindings/mailbox/nvidia,tegra186-hsp.txt b/doc/device-tree-bindings/mailbox/nvidia,tegra186-hsp.txt
new file mode 100644
index 00000000000..a9152380642
--- /dev/null
+++ b/doc/device-tree-bindings/mailbox/nvidia,tegra186-hsp.txt
@@ -0,0 +1,52 @@
+NVIDIA Tegra Hardware Synchronization Primitives (HSP)
+
+The HSP modules are used for the processors to share resources and communicate
+together. It provides a set of hardware synchronization primitives for
+interprocessor communication. So the interprocessor communication (IPC)
+protocols can use hardware synchronization primitives, when operating between
+two processors not in an SMP relationship.
+
+The features that HSP supported are shared mailboxes, shared semaphores,
+arbitrated semaphores and doorbells.
+
+Required properties:
+- name : Should be hsp
+- compatible
+    Array of strings.
+    one of:
+    - "nvidia,tegra186-hsp"
+- reg : Offset and length of the register set for the device.
+- interrupt-names
+    Array of strings.
+    Contains a list of names for the interrupts described by the interrupt
+    property. May contain the following entries, in any order:
+    - "doorbell"
+    Users of this binding MUST look up entries in the interrupt property
+    by name, using this interrupt-names property to do so.
+- interrupts
+    Array of interrupt specifiers.
+    Must contain one entry per entry in the interrupt-names property,
+    in a matching order.
+- #mbox-cells : Should be 2.
+
+The mbox specifier of the "mboxes" property in the client node should
+contain two data. The first one should be the HSP type and the second
+one should be the ID that the client is going to use. Those information
+can be found in the following file.
+
+- <dt-bindings/mailbox/tegra186-hsp.h>.
+
+Example:
+
+hsp_top0: hsp@3c00000 {
+	compatible = "nvidia,tegra186-hsp";
+	reg = <0x0 0x03c00000 0x0 0xa0000>;
+	interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+	interrupt-names = "doorbell";
+	#mbox-cells = <2>;
+};
+
+client {
+	...
+	mboxes = <&hsp_top0 HSP_MBOX_TYPE_DB HSP_DB_MASTER_XXX>;
+};
diff --git a/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt
new file mode 100644
index 00000000000..2e41096aa62
--- /dev/null
+++ b/doc/device-tree-bindings/memory-controller/k3-j721e-ddrss.txt
@@ -0,0 +1,2252 @@
+Texas Instruments' K3 J721E DDRSS
+==================================
+The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper
+logic to integrate these blocks in the device. The DDR subsystem is
+used to provide an interface to external SDRAM devices which can be
+utilized for storing program or data.
+
+DDRSS device node:
+==================
+Required properties:
+--------------------
+- compatible:		Shall be: "ti,j721e-ddrss" for j721e, j7200
+				  "ti,am64-ddrss" for am642
+- reg-names		cfg - Map the controller configuration region
+			ctrl_mmr_lp4 - Map LP4 register region in ctrl mmr
+			ss - Map the DDRSS configuration region
+- reg:			Contains the register map per reg-names.
+- power-domains:	Should contain two entries:
+			- an entry to TISCI DDR CFG device
+			- an entry to TISCI DDR DATA.
+			This property is as per the binding,
+			doc/device-tree-bindings/power/ti,sci-pm-domain.txt
+- clocks:		Should contain two entries.
+			- An entry to DDRSS clock
+			- An rntry to SoC bypass clock
+			Should be defined as per the appropriate clock bindings
+			consumer usage in
+			doc/device-tree-bindings/clock/ti,sci-clk.txt
+- ti,ddr-freq1:		First frequency set point
+- ti,ddr-freq2:		Second frequency set point
+- ti,ddr-fhs-cnt:	Number of times to communicate to DDR for frequency handshake.
+- ti,ctl-data:		An array containing the controller settings.
+- ti,pi-data:		An array containing the phy independent block settings
+- ti,phy-data:		An array containing the ddr phy settings.
+
+Optional properties:
+--------------------
+- reg-names 		ss - Map the DDRSS configuration region
+- reg:			Must add "ss" to list if the above ss region is included.
+- ti,ecc-enable:	Boolean flag to enable ECC. This will reduce available DDR
+			by 1/9.
+- ti,ddr-freq0:		Initial frequency set point, if not provided PLL bypass
+			frequency will be used.
+
+Example (J721E):
+================
+
+memorycontroller: memorycontroller@0298e000 {
+	compatible = "ti,j721e-ddrss";
+	reg = <0x0 0x02990000 0x0 0x4000>,
+	      <0x0 0x0114000 0x0 0x100>;
+	reg-names = "cfg", "ctrl_mmr_lp4";
+	power-domains = <&k3_pds 47 TI_SCI_PD_SHARED>,
+		<&k3_pds 90 TI_SCI_PD_SHARED>;
+	clocks = <&k3_clks 47 2>, <&k3_clks 30 9>;
+	ti,ddr-freq1 = <DDRSS_PLL_FREQUENCY_1>;
+	ti,ddr-freq2 = <DDRSS_PLL_FREQUENCY_2>;
+	ti,ddr-fhs-cnt = <DDRSS_PLL_FHS_CNT>;
+
+	bootph-pre-ram;
+
+	ti,ctl-data = <
+		DDRSS_CTL_00_DATA
+		DDRSS_CTL_01_DATA
+		DDRSS_CTL_02_DATA
+		DDRSS_CTL_03_DATA
+		DDRSS_CTL_04_DATA
+		DDRSS_CTL_05_DATA
+		DDRSS_CTL_06_DATA
+		DDRSS_CTL_07_DATA
+		DDRSS_CTL_08_DATA
+		DDRSS_CTL_09_DATA
+		DDRSS_CTL_10_DATA
+		DDRSS_CTL_11_DATA
+		DDRSS_CTL_12_DATA
+		DDRSS_CTL_13_DATA
+		DDRSS_CTL_14_DATA
+		DDRSS_CTL_15_DATA
+		DDRSS_CTL_16_DATA
+		DDRSS_CTL_17_DATA
+		DDRSS_CTL_18_DATA
+		DDRSS_CTL_19_DATA
+		DDRSS_CTL_20_DATA
+		DDRSS_CTL_21_DATA
+		DDRSS_CTL_22_DATA
+		DDRSS_CTL_23_DATA
+		DDRSS_CTL_24_DATA
+		DDRSS_CTL_25_DATA
+		DDRSS_CTL_26_DATA
+		DDRSS_CTL_27_DATA
+		DDRSS_CTL_28_DATA
+		DDRSS_CTL_29_DATA
+		DDRSS_CTL_30_DATA
+		DDRSS_CTL_31_DATA
+		DDRSS_CTL_32_DATA
+		DDRSS_CTL_33_DATA
+		DDRSS_CTL_34_DATA
+		DDRSS_CTL_35_DATA
+		DDRSS_CTL_36_DATA
+		DDRSS_CTL_37_DATA
+		DDRSS_CTL_38_DATA
+		DDRSS_CTL_39_DATA
+		DDRSS_CTL_40_DATA
+		DDRSS_CTL_41_DATA
+		DDRSS_CTL_42_DATA
+		DDRSS_CTL_43_DATA
+		DDRSS_CTL_44_DATA
+		DDRSS_CTL_45_DATA
+		DDRSS_CTL_46_DATA
+		DDRSS_CTL_47_DATA
+		DDRSS_CTL_48_DATA
+		DDRSS_CTL_49_DATA
+		DDRSS_CTL_50_DATA
+		DDRSS_CTL_51_DATA
+		DDRSS_CTL_52_DATA
+		DDRSS_CTL_53_DATA
+		DDRSS_CTL_54_DATA
+		DDRSS_CTL_55_DATA
+		DDRSS_CTL_56_DATA
+		DDRSS_CTL_57_DATA
+		DDRSS_CTL_58_DATA
+		DDRSS_CTL_59_DATA
+		DDRSS_CTL_60_DATA
+		DDRSS_CTL_61_DATA
+		DDRSS_CTL_62_DATA
+		DDRSS_CTL_63_DATA
+		DDRSS_CTL_64_DATA
+		DDRSS_CTL_65_DATA
+		DDRSS_CTL_66_DATA
+		DDRSS_CTL_67_DATA
+		DDRSS_CTL_68_DATA
+		DDRSS_CTL_69_DATA
+		DDRSS_CTL_70_DATA
+		DDRSS_CTL_71_DATA
+		DDRSS_CTL_72_DATA
+		DDRSS_CTL_73_DATA
+		DDRSS_CTL_74_DATA
+		DDRSS_CTL_75_DATA
+		DDRSS_CTL_76_DATA
+		DDRSS_CTL_77_DATA
+		DDRSS_CTL_78_DATA
+		DDRSS_CTL_79_DATA
+		DDRSS_CTL_80_DATA
+		DDRSS_CTL_81_DATA
+		DDRSS_CTL_82_DATA
+		DDRSS_CTL_83_DATA
+		DDRSS_CTL_84_DATA
+		DDRSS_CTL_85_DATA
+		DDRSS_CTL_86_DATA
+		DDRSS_CTL_87_DATA
+		DDRSS_CTL_88_DATA
+		DDRSS_CTL_89_DATA
+		DDRSS_CTL_90_DATA
+		DDRSS_CTL_91_DATA
+		DDRSS_CTL_92_DATA
+		DDRSS_CTL_93_DATA
+		DDRSS_CTL_94_DATA
+		DDRSS_CTL_95_DATA
+		DDRSS_CTL_96_DATA
+		DDRSS_CTL_97_DATA
+		DDRSS_CTL_98_DATA
+		DDRSS_CTL_99_DATA
+		DDRSS_CTL_100_DATA
+		DDRSS_CTL_101_DATA
+		DDRSS_CTL_102_DATA
+		DDRSS_CTL_103_DATA
+		DDRSS_CTL_104_DATA
+		DDRSS_CTL_105_DATA
+		DDRSS_CTL_106_DATA
+		DDRSS_CTL_107_DATA
+		DDRSS_CTL_108_DATA
+		DDRSS_CTL_109_DATA
+		DDRSS_CTL_110_DATA
+		DDRSS_CTL_111_DATA
+		DDRSS_CTL_112_DATA
+		DDRSS_CTL_113_DATA
+		DDRSS_CTL_114_DATA
+		DDRSS_CTL_115_DATA
+		DDRSS_CTL_116_DATA
+		DDRSS_CTL_117_DATA
+		DDRSS_CTL_118_DATA
+		DDRSS_CTL_119_DATA
+		DDRSS_CTL_120_DATA
+		DDRSS_CTL_121_DATA
+		DDRSS_CTL_122_DATA
+		DDRSS_CTL_123_DATA
+		DDRSS_CTL_124_DATA
+		DDRSS_CTL_125_DATA
+		DDRSS_CTL_126_DATA
+		DDRSS_CTL_127_DATA
+		DDRSS_CTL_128_DATA
+		DDRSS_CTL_129_DATA
+		DDRSS_CTL_130_DATA
+		DDRSS_CTL_131_DATA
+		DDRSS_CTL_132_DATA
+		DDRSS_CTL_133_DATA
+		DDRSS_CTL_134_DATA
+		DDRSS_CTL_135_DATA
+		DDRSS_CTL_136_DATA
+		DDRSS_CTL_137_DATA
+		DDRSS_CTL_138_DATA
+		DDRSS_CTL_139_DATA
+		DDRSS_CTL_140_DATA
+		DDRSS_CTL_141_DATA
+		DDRSS_CTL_142_DATA
+		DDRSS_CTL_143_DATA
+		DDRSS_CTL_144_DATA
+		DDRSS_CTL_145_DATA
+		DDRSS_CTL_146_DATA
+		DDRSS_CTL_147_DATA
+		DDRSS_CTL_148_DATA
+		DDRSS_CTL_149_DATA
+		DDRSS_CTL_150_DATA
+		DDRSS_CTL_151_DATA
+		DDRSS_CTL_152_DATA
+		DDRSS_CTL_153_DATA
+		DDRSS_CTL_154_DATA
+		DDRSS_CTL_155_DATA
+		DDRSS_CTL_156_DATA
+		DDRSS_CTL_157_DATA
+		DDRSS_CTL_158_DATA
+		DDRSS_CTL_159_DATA
+		DDRSS_CTL_160_DATA
+		DDRSS_CTL_161_DATA
+		DDRSS_CTL_162_DATA
+		DDRSS_CTL_163_DATA
+		DDRSS_CTL_164_DATA
+		DDRSS_CTL_165_DATA
+		DDRSS_CTL_166_DATA
+		DDRSS_CTL_167_DATA
+		DDRSS_CTL_168_DATA
+		DDRSS_CTL_169_DATA
+		DDRSS_CTL_170_DATA
+		DDRSS_CTL_171_DATA
+		DDRSS_CTL_172_DATA
+		DDRSS_CTL_173_DATA
+		DDRSS_CTL_174_DATA
+		DDRSS_CTL_175_DATA
+		DDRSS_CTL_176_DATA
+		DDRSS_CTL_177_DATA
+		DDRSS_CTL_178_DATA
+		DDRSS_CTL_179_DATA
+		DDRSS_CTL_180_DATA
+		DDRSS_CTL_181_DATA
+		DDRSS_CTL_182_DATA
+		DDRSS_CTL_183_DATA
+		DDRSS_CTL_184_DATA
+		DDRSS_CTL_185_DATA
+		DDRSS_CTL_186_DATA
+		DDRSS_CTL_187_DATA
+		DDRSS_CTL_188_DATA
+		DDRSS_CTL_189_DATA
+		DDRSS_CTL_190_DATA
+		DDRSS_CTL_191_DATA
+		DDRSS_CTL_192_DATA
+		DDRSS_CTL_193_DATA
+		DDRSS_CTL_194_DATA
+		DDRSS_CTL_195_DATA
+		DDRSS_CTL_196_DATA
+		DDRSS_CTL_197_DATA
+		DDRSS_CTL_198_DATA
+		DDRSS_CTL_199_DATA
+		DDRSS_CTL_200_DATA
+		DDRSS_CTL_201_DATA
+		DDRSS_CTL_202_DATA
+		DDRSS_CTL_203_DATA
+		DDRSS_CTL_204_DATA
+		DDRSS_CTL_205_DATA
+		DDRSS_CTL_206_DATA
+		DDRSS_CTL_207_DATA
+		DDRSS_CTL_208_DATA
+		DDRSS_CTL_209_DATA
+		DDRSS_CTL_210_DATA
+		DDRSS_CTL_211_DATA
+		DDRSS_CTL_212_DATA
+		DDRSS_CTL_213_DATA
+		DDRSS_CTL_214_DATA
+		DDRSS_CTL_215_DATA
+		DDRSS_CTL_216_DATA
+		DDRSS_CTL_217_DATA
+		DDRSS_CTL_218_DATA
+		DDRSS_CTL_219_DATA
+		DDRSS_CTL_220_DATA
+		DDRSS_CTL_221_DATA
+		DDRSS_CTL_222_DATA
+		DDRSS_CTL_223_DATA
+		DDRSS_CTL_224_DATA
+		DDRSS_CTL_225_DATA
+		DDRSS_CTL_226_DATA
+		DDRSS_CTL_227_DATA
+		DDRSS_CTL_228_DATA
+		DDRSS_CTL_229_DATA
+		DDRSS_CTL_230_DATA
+		DDRSS_CTL_231_DATA
+		DDRSS_CTL_232_DATA
+		DDRSS_CTL_233_DATA
+		DDRSS_CTL_234_DATA
+		DDRSS_CTL_235_DATA
+		DDRSS_CTL_236_DATA
+		DDRSS_CTL_237_DATA
+		DDRSS_CTL_238_DATA
+		DDRSS_CTL_239_DATA
+		DDRSS_CTL_240_DATA
+		DDRSS_CTL_241_DATA
+		DDRSS_CTL_242_DATA
+		DDRSS_CTL_243_DATA
+		DDRSS_CTL_244_DATA
+		DDRSS_CTL_245_DATA
+		DDRSS_CTL_246_DATA
+		DDRSS_CTL_247_DATA
+		DDRSS_CTL_248_DATA
+		DDRSS_CTL_249_DATA
+		DDRSS_CTL_250_DATA
+		DDRSS_CTL_251_DATA
+		DDRSS_CTL_252_DATA
+		DDRSS_CTL_253_DATA
+		DDRSS_CTL_254_DATA
+		DDRSS_CTL_255_DATA
+		DDRSS_CTL_256_DATA
+		DDRSS_CTL_257_DATA
+		DDRSS_CTL_258_DATA
+		DDRSS_CTL_259_DATA
+		DDRSS_CTL_260_DATA
+		DDRSS_CTL_261_DATA
+		DDRSS_CTL_262_DATA
+		DDRSS_CTL_263_DATA
+		DDRSS_CTL_264_DATA
+		DDRSS_CTL_265_DATA
+		DDRSS_CTL_266_DATA
+		DDRSS_CTL_267_DATA
+		DDRSS_CTL_268_DATA
+		DDRSS_CTL_269_DATA
+		DDRSS_CTL_270_DATA
+		DDRSS_CTL_271_DATA
+		DDRSS_CTL_272_DATA
+		DDRSS_CTL_273_DATA
+		DDRSS_CTL_274_DATA
+		DDRSS_CTL_275_DATA
+		DDRSS_CTL_276_DATA
+		DDRSS_CTL_277_DATA
+		DDRSS_CTL_278_DATA
+		DDRSS_CTL_279_DATA
+		DDRSS_CTL_280_DATA
+		DDRSS_CTL_281_DATA
+		DDRSS_CTL_282_DATA
+		DDRSS_CTL_283_DATA
+		DDRSS_CTL_284_DATA
+		DDRSS_CTL_285_DATA
+		DDRSS_CTL_286_DATA
+		DDRSS_CTL_287_DATA
+		DDRSS_CTL_288_DATA
+		DDRSS_CTL_289_DATA
+		DDRSS_CTL_290_DATA
+		DDRSS_CTL_291_DATA
+		DDRSS_CTL_292_DATA
+		DDRSS_CTL_293_DATA
+		DDRSS_CTL_294_DATA
+		DDRSS_CTL_295_DATA
+		DDRSS_CTL_296_DATA
+		DDRSS_CTL_297_DATA
+		DDRSS_CTL_298_DATA
+		DDRSS_CTL_299_DATA
+		DDRSS_CTL_300_DATA
+		DDRSS_CTL_301_DATA
+		DDRSS_CTL_302_DATA
+		DDRSS_CTL_303_DATA
+		DDRSS_CTL_304_DATA
+		DDRSS_CTL_305_DATA
+		DDRSS_CTL_306_DATA
+		DDRSS_CTL_307_DATA
+		DDRSS_CTL_308_DATA
+		DDRSS_CTL_309_DATA
+		DDRSS_CTL_310_DATA
+		DDRSS_CTL_311_DATA
+		DDRSS_CTL_312_DATA
+		DDRSS_CTL_313_DATA
+		DDRSS_CTL_314_DATA
+		DDRSS_CTL_315_DATA
+		DDRSS_CTL_316_DATA
+		DDRSS_CTL_317_DATA
+		DDRSS_CTL_318_DATA
+		DDRSS_CTL_319_DATA
+		DDRSS_CTL_320_DATA
+		DDRSS_CTL_321_DATA
+		DDRSS_CTL_322_DATA
+		DDRSS_CTL_323_DATA
+		DDRSS_CTL_324_DATA
+		DDRSS_CTL_325_DATA
+		DDRSS_CTL_326_DATA
+		DDRSS_CTL_327_DATA
+		DDRSS_CTL_328_DATA
+		DDRSS_CTL_329_DATA
+		DDRSS_CTL_330_DATA
+		DDRSS_CTL_331_DATA
+		DDRSS_CTL_332_DATA
+		DDRSS_CTL_333_DATA
+		DDRSS_CTL_334_DATA
+		DDRSS_CTL_335_DATA
+		DDRSS_CTL_336_DATA
+		DDRSS_CTL_337_DATA
+		DDRSS_CTL_338_DATA
+		DDRSS_CTL_339_DATA
+		DDRSS_CTL_340_DATA
+		DDRSS_CTL_341_DATA
+		DDRSS_CTL_342_DATA
+		DDRSS_CTL_343_DATA
+		DDRSS_CTL_344_DATA
+		DDRSS_CTL_345_DATA
+		DDRSS_CTL_346_DATA
+		DDRSS_CTL_347_DATA
+		DDRSS_CTL_348_DATA
+		DDRSS_CTL_349_DATA
+		DDRSS_CTL_350_DATA
+		DDRSS_CTL_351_DATA
+		DDRSS_CTL_352_DATA
+		DDRSS_CTL_353_DATA
+		DDRSS_CTL_354_DATA
+		DDRSS_CTL_355_DATA
+		DDRSS_CTL_356_DATA
+		DDRSS_CTL_357_DATA
+		DDRSS_CTL_358_DATA
+		DDRSS_CTL_359_DATA
+		DDRSS_CTL_360_DATA
+		DDRSS_CTL_361_DATA
+		DDRSS_CTL_362_DATA
+		DDRSS_CTL_363_DATA
+		DDRSS_CTL_364_DATA
+		DDRSS_CTL_365_DATA
+		DDRSS_CTL_366_DATA
+		DDRSS_CTL_367_DATA
+		DDRSS_CTL_368_DATA
+		DDRSS_CTL_369_DATA
+		DDRSS_CTL_370_DATA
+		DDRSS_CTL_371_DATA
+		DDRSS_CTL_372_DATA
+		DDRSS_CTL_373_DATA
+		DDRSS_CTL_374_DATA
+		DDRSS_CTL_375_DATA
+		DDRSS_CTL_376_DATA
+		DDRSS_CTL_377_DATA
+		DDRSS_CTL_378_DATA
+		DDRSS_CTL_379_DATA
+		DDRSS_CTL_380_DATA
+		DDRSS_CTL_381_DATA
+		DDRSS_CTL_382_DATA
+		DDRSS_CTL_383_DATA
+		DDRSS_CTL_384_DATA
+		DDRSS_CTL_385_DATA
+		DDRSS_CTL_386_DATA
+		DDRSS_CTL_387_DATA
+		DDRSS_CTL_388_DATA
+		DDRSS_CTL_389_DATA
+		DDRSS_CTL_390_DATA
+		DDRSS_CTL_391_DATA
+		DDRSS_CTL_392_DATA
+		DDRSS_CTL_393_DATA
+		DDRSS_CTL_394_DATA
+		DDRSS_CTL_395_DATA
+		DDRSS_CTL_396_DATA
+		DDRSS_CTL_397_DATA
+		DDRSS_CTL_398_DATA
+		DDRSS_CTL_399_DATA
+		DDRSS_CTL_400_DATA
+		DDRSS_CTL_401_DATA
+		DDRSS_CTL_402_DATA
+		DDRSS_CTL_403_DATA
+		DDRSS_CTL_404_DATA
+		DDRSS_CTL_405_DATA
+		DDRSS_CTL_406_DATA
+		DDRSS_CTL_407_DATA
+		DDRSS_CTL_408_DATA
+		DDRSS_CTL_409_DATA
+		DDRSS_CTL_410_DATA
+		DDRSS_CTL_411_DATA
+		DDRSS_CTL_412_DATA
+		DDRSS_CTL_413_DATA
+		DDRSS_CTL_414_DATA
+		DDRSS_CTL_415_DATA
+		DDRSS_CTL_416_DATA
+		DDRSS_CTL_417_DATA
+		DDRSS_CTL_418_DATA
+		DDRSS_CTL_419_DATA
+		DDRSS_CTL_420_DATA
+		DDRSS_CTL_421_DATA
+		DDRSS_CTL_422_DATA
+		DDRSS_CTL_423_DATA
+		DDRSS_CTL_424_DATA
+		DDRSS_CTL_425_DATA
+		DDRSS_CTL_426_DATA
+		DDRSS_CTL_427_DATA
+		DDRSS_CTL_428_DATA
+		DDRSS_CTL_429_DATA
+		DDRSS_CTL_430_DATA
+		DDRSS_CTL_431_DATA
+		DDRSS_CTL_432_DATA
+		DDRSS_CTL_433_DATA
+		DDRSS_CTL_434_DATA
+		DDRSS_CTL_435_DATA
+		DDRSS_CTL_436_DATA
+		DDRSS_CTL_437_DATA
+		DDRSS_CTL_438_DATA
+		DDRSS_CTL_439_DATA
+		DDRSS_CTL_440_DATA
+		DDRSS_CTL_441_DATA
+		DDRSS_CTL_442_DATA
+		DDRSS_CTL_443_DATA
+		DDRSS_CTL_444_DATA
+		DDRSS_CTL_445_DATA
+		DDRSS_CTL_446_DATA
+		DDRSS_CTL_447_DATA
+		DDRSS_CTL_448_DATA
+		DDRSS_CTL_449_DATA
+		DDRSS_CTL_450_DATA
+		DDRSS_CTL_451_DATA
+		DDRSS_CTL_452_DATA
+		DDRSS_CTL_453_DATA
+		DDRSS_CTL_454_DATA
+		DDRSS_CTL_455_DATA
+		DDRSS_CTL_456_DATA
+		DDRSS_CTL_457_DATA
+		DDRSS_CTL_458_DATA
+	>;
+
+	ti,pi-data = <
+		DDRSS_PI_00_DATA
+		DDRSS_PI_01_DATA
+		DDRSS_PI_02_DATA
+		DDRSS_PI_03_DATA
+		DDRSS_PI_04_DATA
+		DDRSS_PI_05_DATA
+		DDRSS_PI_06_DATA
+		DDRSS_PI_07_DATA
+		DDRSS_PI_08_DATA
+		DDRSS_PI_09_DATA
+		DDRSS_PI_10_DATA
+		DDRSS_PI_11_DATA
+		DDRSS_PI_12_DATA
+		DDRSS_PI_13_DATA
+		DDRSS_PI_14_DATA
+		DDRSS_PI_15_DATA
+		DDRSS_PI_16_DATA
+		DDRSS_PI_17_DATA
+		DDRSS_PI_18_DATA
+		DDRSS_PI_19_DATA
+		DDRSS_PI_20_DATA
+		DDRSS_PI_21_DATA
+		DDRSS_PI_22_DATA
+		DDRSS_PI_23_DATA
+		DDRSS_PI_24_DATA
+		DDRSS_PI_25_DATA
+		DDRSS_PI_26_DATA
+		DDRSS_PI_27_DATA
+		DDRSS_PI_28_DATA
+		DDRSS_PI_29_DATA
+		DDRSS_PI_30_DATA
+		DDRSS_PI_31_DATA
+		DDRSS_PI_32_DATA
+		DDRSS_PI_33_DATA
+		DDRSS_PI_34_DATA
+		DDRSS_PI_35_DATA
+		DDRSS_PI_36_DATA
+		DDRSS_PI_37_DATA
+		DDRSS_PI_38_DATA
+		DDRSS_PI_39_DATA
+		DDRSS_PI_40_DATA
+		DDRSS_PI_41_DATA
+		DDRSS_PI_42_DATA
+		DDRSS_PI_43_DATA
+		DDRSS_PI_44_DATA
+		DDRSS_PI_45_DATA
+		DDRSS_PI_46_DATA
+		DDRSS_PI_47_DATA
+		DDRSS_PI_48_DATA
+		DDRSS_PI_49_DATA
+		DDRSS_PI_50_DATA
+		DDRSS_PI_51_DATA
+		DDRSS_PI_52_DATA
+		DDRSS_PI_53_DATA
+		DDRSS_PI_54_DATA
+		DDRSS_PI_55_DATA
+		DDRSS_PI_56_DATA
+		DDRSS_PI_57_DATA
+		DDRSS_PI_58_DATA
+		DDRSS_PI_59_DATA
+		DDRSS_PI_60_DATA
+		DDRSS_PI_61_DATA
+		DDRSS_PI_62_DATA
+		DDRSS_PI_63_DATA
+		DDRSS_PI_64_DATA
+		DDRSS_PI_65_DATA
+		DDRSS_PI_66_DATA
+		DDRSS_PI_67_DATA
+		DDRSS_PI_68_DATA
+		DDRSS_PI_69_DATA
+		DDRSS_PI_70_DATA
+		DDRSS_PI_71_DATA
+		DDRSS_PI_72_DATA
+		DDRSS_PI_73_DATA
+		DDRSS_PI_74_DATA
+		DDRSS_PI_75_DATA
+		DDRSS_PI_76_DATA
+		DDRSS_PI_77_DATA
+		DDRSS_PI_78_DATA
+		DDRSS_PI_79_DATA
+		DDRSS_PI_80_DATA
+		DDRSS_PI_81_DATA
+		DDRSS_PI_82_DATA
+		DDRSS_PI_83_DATA
+		DDRSS_PI_84_DATA
+		DDRSS_PI_85_DATA
+		DDRSS_PI_86_DATA
+		DDRSS_PI_87_DATA
+		DDRSS_PI_88_DATA
+		DDRSS_PI_89_DATA
+		DDRSS_PI_90_DATA
+		DDRSS_PI_91_DATA
+		DDRSS_PI_92_DATA
+		DDRSS_PI_93_DATA
+		DDRSS_PI_94_DATA
+		DDRSS_PI_95_DATA
+		DDRSS_PI_96_DATA
+		DDRSS_PI_97_DATA
+		DDRSS_PI_98_DATA
+		DDRSS_PI_99_DATA
+		DDRSS_PI_100_DATA
+		DDRSS_PI_101_DATA
+		DDRSS_PI_102_DATA
+		DDRSS_PI_103_DATA
+		DDRSS_PI_104_DATA
+		DDRSS_PI_105_DATA
+		DDRSS_PI_106_DATA
+		DDRSS_PI_107_DATA
+		DDRSS_PI_108_DATA
+		DDRSS_PI_109_DATA
+		DDRSS_PI_110_DATA
+		DDRSS_PI_111_DATA
+		DDRSS_PI_112_DATA
+		DDRSS_PI_113_DATA
+		DDRSS_PI_114_DATA
+		DDRSS_PI_115_DATA
+		DDRSS_PI_116_DATA
+		DDRSS_PI_117_DATA
+		DDRSS_PI_118_DATA
+		DDRSS_PI_119_DATA
+		DDRSS_PI_120_DATA
+		DDRSS_PI_121_DATA
+		DDRSS_PI_122_DATA
+		DDRSS_PI_123_DATA
+		DDRSS_PI_124_DATA
+		DDRSS_PI_125_DATA
+		DDRSS_PI_126_DATA
+		DDRSS_PI_127_DATA
+		DDRSS_PI_128_DATA
+		DDRSS_PI_129_DATA
+		DDRSS_PI_130_DATA
+		DDRSS_PI_131_DATA
+		DDRSS_PI_132_DATA
+		DDRSS_PI_133_DATA
+		DDRSS_PI_134_DATA
+		DDRSS_PI_135_DATA
+		DDRSS_PI_136_DATA
+		DDRSS_PI_137_DATA
+		DDRSS_PI_138_DATA
+		DDRSS_PI_139_DATA
+		DDRSS_PI_140_DATA
+		DDRSS_PI_141_DATA
+		DDRSS_PI_142_DATA
+		DDRSS_PI_143_DATA
+		DDRSS_PI_144_DATA
+		DDRSS_PI_145_DATA
+		DDRSS_PI_146_DATA
+		DDRSS_PI_147_DATA
+		DDRSS_PI_148_DATA
+		DDRSS_PI_149_DATA
+		DDRSS_PI_150_DATA
+		DDRSS_PI_151_DATA
+		DDRSS_PI_152_DATA
+		DDRSS_PI_153_DATA
+		DDRSS_PI_154_DATA
+		DDRSS_PI_155_DATA
+		DDRSS_PI_156_DATA
+		DDRSS_PI_157_DATA
+		DDRSS_PI_158_DATA
+		DDRSS_PI_159_DATA
+		DDRSS_PI_160_DATA
+		DDRSS_PI_161_DATA
+		DDRSS_PI_162_DATA
+		DDRSS_PI_163_DATA
+		DDRSS_PI_164_DATA
+		DDRSS_PI_165_DATA
+		DDRSS_PI_166_DATA
+		DDRSS_PI_167_DATA
+		DDRSS_PI_168_DATA
+		DDRSS_PI_169_DATA
+		DDRSS_PI_170_DATA
+		DDRSS_PI_171_DATA
+		DDRSS_PI_172_DATA
+		DDRSS_PI_173_DATA
+		DDRSS_PI_174_DATA
+		DDRSS_PI_175_DATA
+		DDRSS_PI_176_DATA
+		DDRSS_PI_177_DATA
+		DDRSS_PI_178_DATA
+		DDRSS_PI_179_DATA
+		DDRSS_PI_180_DATA
+		DDRSS_PI_181_DATA
+		DDRSS_PI_182_DATA
+		DDRSS_PI_183_DATA
+		DDRSS_PI_184_DATA
+		DDRSS_PI_185_DATA
+		DDRSS_PI_186_DATA
+		DDRSS_PI_187_DATA
+		DDRSS_PI_188_DATA
+		DDRSS_PI_189_DATA
+		DDRSS_PI_190_DATA
+		DDRSS_PI_191_DATA
+		DDRSS_PI_192_DATA
+		DDRSS_PI_193_DATA
+		DDRSS_PI_194_DATA
+		DDRSS_PI_195_DATA
+		DDRSS_PI_196_DATA
+		DDRSS_PI_197_DATA
+		DDRSS_PI_198_DATA
+		DDRSS_PI_199_DATA
+		DDRSS_PI_200_DATA
+		DDRSS_PI_201_DATA
+		DDRSS_PI_202_DATA
+		DDRSS_PI_203_DATA
+		DDRSS_PI_204_DATA
+		DDRSS_PI_205_DATA
+		DDRSS_PI_206_DATA
+		DDRSS_PI_207_DATA
+		DDRSS_PI_208_DATA
+		DDRSS_PI_209_DATA
+		DDRSS_PI_210_DATA
+		DDRSS_PI_211_DATA
+		DDRSS_PI_212_DATA
+		DDRSS_PI_213_DATA
+		DDRSS_PI_214_DATA
+		DDRSS_PI_215_DATA
+		DDRSS_PI_216_DATA
+		DDRSS_PI_217_DATA
+		DDRSS_PI_218_DATA
+		DDRSS_PI_219_DATA
+		DDRSS_PI_220_DATA
+		DDRSS_PI_221_DATA
+		DDRSS_PI_222_DATA
+		DDRSS_PI_223_DATA
+		DDRSS_PI_224_DATA
+		DDRSS_PI_225_DATA
+		DDRSS_PI_226_DATA
+		DDRSS_PI_227_DATA
+		DDRSS_PI_228_DATA
+		DDRSS_PI_229_DATA
+		DDRSS_PI_230_DATA
+		DDRSS_PI_231_DATA
+		DDRSS_PI_232_DATA
+		DDRSS_PI_233_DATA
+		DDRSS_PI_234_DATA
+		DDRSS_PI_235_DATA
+		DDRSS_PI_236_DATA
+		DDRSS_PI_237_DATA
+		DDRSS_PI_238_DATA
+		DDRSS_PI_239_DATA
+		DDRSS_PI_240_DATA
+		DDRSS_PI_241_DATA
+		DDRSS_PI_242_DATA
+		DDRSS_PI_243_DATA
+		DDRSS_PI_244_DATA
+		DDRSS_PI_245_DATA
+		DDRSS_PI_246_DATA
+		DDRSS_PI_247_DATA
+		DDRSS_PI_248_DATA
+		DDRSS_PI_249_DATA
+		DDRSS_PI_250_DATA
+		DDRSS_PI_251_DATA
+		DDRSS_PI_252_DATA
+		DDRSS_PI_253_DATA
+		DDRSS_PI_254_DATA
+		DDRSS_PI_255_DATA
+		DDRSS_PI_256_DATA
+		DDRSS_PI_257_DATA
+		DDRSS_PI_258_DATA
+		DDRSS_PI_259_DATA
+		DDRSS_PI_260_DATA
+		DDRSS_PI_261_DATA
+		DDRSS_PI_262_DATA
+		DDRSS_PI_263_DATA
+		DDRSS_PI_264_DATA
+		DDRSS_PI_265_DATA
+		DDRSS_PI_266_DATA
+		DDRSS_PI_267_DATA
+		DDRSS_PI_268_DATA
+		DDRSS_PI_269_DATA
+		DDRSS_PI_270_DATA
+		DDRSS_PI_271_DATA
+		DDRSS_PI_272_DATA
+		DDRSS_PI_273_DATA
+		DDRSS_PI_274_DATA
+		DDRSS_PI_275_DATA
+		DDRSS_PI_276_DATA
+		DDRSS_PI_277_DATA
+		DDRSS_PI_278_DATA
+		DDRSS_PI_279_DATA
+		DDRSS_PI_280_DATA
+		DDRSS_PI_281_DATA
+		DDRSS_PI_282_DATA
+		DDRSS_PI_283_DATA
+		DDRSS_PI_284_DATA
+		DDRSS_PI_285_DATA
+		DDRSS_PI_286_DATA
+		DDRSS_PI_287_DATA
+		DDRSS_PI_288_DATA
+		DDRSS_PI_289_DATA
+		DDRSS_PI_290_DATA
+		DDRSS_PI_291_DATA
+		DDRSS_PI_292_DATA
+		DDRSS_PI_293_DATA
+		DDRSS_PI_294_DATA
+		DDRSS_PI_295_DATA
+		DDRSS_PI_296_DATA
+		DDRSS_PI_297_DATA
+		DDRSS_PI_298_DATA
+		DDRSS_PI_299_DATA
+	>;
+
+	ti,phy-data = <
+		DDRSS_PHY_00_DATA
+		DDRSS_PHY_01_DATA
+		DDRSS_PHY_02_DATA
+		DDRSS_PHY_03_DATA
+		DDRSS_PHY_04_DATA
+		DDRSS_PHY_05_DATA
+		DDRSS_PHY_06_DATA
+		DDRSS_PHY_07_DATA
+		DDRSS_PHY_08_DATA
+		DDRSS_PHY_09_DATA
+		DDRSS_PHY_10_DATA
+		DDRSS_PHY_11_DATA
+		DDRSS_PHY_12_DATA
+		DDRSS_PHY_13_DATA
+		DDRSS_PHY_14_DATA
+		DDRSS_PHY_15_DATA
+		DDRSS_PHY_16_DATA
+		DDRSS_PHY_17_DATA
+		DDRSS_PHY_18_DATA
+		DDRSS_PHY_19_DATA
+		DDRSS_PHY_20_DATA
+		DDRSS_PHY_21_DATA
+		DDRSS_PHY_22_DATA
+		DDRSS_PHY_23_DATA
+		DDRSS_PHY_24_DATA
+		DDRSS_PHY_25_DATA
+		DDRSS_PHY_26_DATA
+		DDRSS_PHY_27_DATA
+		DDRSS_PHY_28_DATA
+		DDRSS_PHY_29_DATA
+		DDRSS_PHY_30_DATA
+		DDRSS_PHY_31_DATA
+		DDRSS_PHY_32_DATA
+		DDRSS_PHY_33_DATA
+		DDRSS_PHY_34_DATA
+		DDRSS_PHY_35_DATA
+		DDRSS_PHY_36_DATA
+		DDRSS_PHY_37_DATA
+		DDRSS_PHY_38_DATA
+		DDRSS_PHY_39_DATA
+		DDRSS_PHY_40_DATA
+		DDRSS_PHY_41_DATA
+		DDRSS_PHY_42_DATA
+		DDRSS_PHY_43_DATA
+		DDRSS_PHY_44_DATA
+		DDRSS_PHY_45_DATA
+		DDRSS_PHY_46_DATA
+		DDRSS_PHY_47_DATA
+		DDRSS_PHY_48_DATA
+		DDRSS_PHY_49_DATA
+		DDRSS_PHY_50_DATA
+		DDRSS_PHY_51_DATA
+		DDRSS_PHY_52_DATA
+		DDRSS_PHY_53_DATA
+		DDRSS_PHY_54_DATA
+		DDRSS_PHY_55_DATA
+		DDRSS_PHY_56_DATA
+		DDRSS_PHY_57_DATA
+		DDRSS_PHY_58_DATA
+		DDRSS_PHY_59_DATA
+		DDRSS_PHY_60_DATA
+		DDRSS_PHY_61_DATA
+		DDRSS_PHY_62_DATA
+		DDRSS_PHY_63_DATA
+		DDRSS_PHY_64_DATA
+		DDRSS_PHY_65_DATA
+		DDRSS_PHY_66_DATA
+		DDRSS_PHY_67_DATA
+		DDRSS_PHY_68_DATA
+		DDRSS_PHY_69_DATA
+		DDRSS_PHY_70_DATA
+		DDRSS_PHY_71_DATA
+		DDRSS_PHY_72_DATA
+		DDRSS_PHY_73_DATA
+		DDRSS_PHY_74_DATA
+		DDRSS_PHY_75_DATA
+		DDRSS_PHY_76_DATA
+		DDRSS_PHY_77_DATA
+		DDRSS_PHY_78_DATA
+		DDRSS_PHY_79_DATA
+		DDRSS_PHY_80_DATA
+		DDRSS_PHY_81_DATA
+		DDRSS_PHY_82_DATA
+		DDRSS_PHY_83_DATA
+		DDRSS_PHY_84_DATA
+		DDRSS_PHY_85_DATA
+		DDRSS_PHY_86_DATA
+		DDRSS_PHY_87_DATA
+		DDRSS_PHY_88_DATA
+		DDRSS_PHY_89_DATA
+		DDRSS_PHY_90_DATA
+		DDRSS_PHY_91_DATA
+		DDRSS_PHY_92_DATA
+		DDRSS_PHY_93_DATA
+		DDRSS_PHY_94_DATA
+		DDRSS_PHY_95_DATA
+		DDRSS_PHY_96_DATA
+		DDRSS_PHY_97_DATA
+		DDRSS_PHY_98_DATA
+		DDRSS_PHY_99_DATA
+		DDRSS_PHY_100_DATA
+		DDRSS_PHY_101_DATA
+		DDRSS_PHY_102_DATA
+		DDRSS_PHY_103_DATA
+		DDRSS_PHY_104_DATA
+		DDRSS_PHY_105_DATA
+		DDRSS_PHY_106_DATA
+		DDRSS_PHY_107_DATA
+		DDRSS_PHY_108_DATA
+		DDRSS_PHY_109_DATA
+		DDRSS_PHY_110_DATA
+		DDRSS_PHY_111_DATA
+		DDRSS_PHY_112_DATA
+		DDRSS_PHY_113_DATA
+		DDRSS_PHY_114_DATA
+		DDRSS_PHY_115_DATA
+		DDRSS_PHY_116_DATA
+		DDRSS_PHY_117_DATA
+		DDRSS_PHY_118_DATA
+		DDRSS_PHY_119_DATA
+		DDRSS_PHY_120_DATA
+		DDRSS_PHY_121_DATA
+		DDRSS_PHY_122_DATA
+		DDRSS_PHY_123_DATA
+		DDRSS_PHY_124_DATA
+		DDRSS_PHY_125_DATA
+		DDRSS_PHY_126_DATA
+		DDRSS_PHY_127_DATA
+		DDRSS_PHY_128_DATA
+		DDRSS_PHY_129_DATA
+		DDRSS_PHY_130_DATA
+		DDRSS_PHY_131_DATA
+		DDRSS_PHY_132_DATA
+		DDRSS_PHY_133_DATA
+		DDRSS_PHY_134_DATA
+		DDRSS_PHY_135_DATA
+		DDRSS_PHY_136_DATA
+		DDRSS_PHY_137_DATA
+		DDRSS_PHY_138_DATA
+		DDRSS_PHY_139_DATA
+		DDRSS_PHY_140_DATA
+		DDRSS_PHY_141_DATA
+		DDRSS_PHY_142_DATA
+		DDRSS_PHY_143_DATA
+		DDRSS_PHY_144_DATA
+		DDRSS_PHY_145_DATA
+		DDRSS_PHY_146_DATA
+		DDRSS_PHY_147_DATA
+		DDRSS_PHY_148_DATA
+		DDRSS_PHY_149_DATA
+		DDRSS_PHY_150_DATA
+		DDRSS_PHY_151_DATA
+		DDRSS_PHY_152_DATA
+		DDRSS_PHY_153_DATA
+		DDRSS_PHY_154_DATA
+		DDRSS_PHY_155_DATA
+		DDRSS_PHY_156_DATA
+		DDRSS_PHY_157_DATA
+		DDRSS_PHY_158_DATA
+		DDRSS_PHY_159_DATA
+		DDRSS_PHY_160_DATA
+		DDRSS_PHY_161_DATA
+		DDRSS_PHY_162_DATA
+		DDRSS_PHY_163_DATA
+		DDRSS_PHY_164_DATA
+		DDRSS_PHY_165_DATA
+		DDRSS_PHY_166_DATA
+		DDRSS_PHY_167_DATA
+		DDRSS_PHY_168_DATA
+		DDRSS_PHY_169_DATA
+		DDRSS_PHY_170_DATA
+		DDRSS_PHY_171_DATA
+		DDRSS_PHY_172_DATA
+		DDRSS_PHY_173_DATA
+		DDRSS_PHY_174_DATA
+		DDRSS_PHY_175_DATA
+		DDRSS_PHY_176_DATA
+		DDRSS_PHY_177_DATA
+		DDRSS_PHY_178_DATA
+		DDRSS_PHY_179_DATA
+		DDRSS_PHY_180_DATA
+		DDRSS_PHY_181_DATA
+		DDRSS_PHY_182_DATA
+		DDRSS_PHY_183_DATA
+		DDRSS_PHY_184_DATA
+		DDRSS_PHY_185_DATA
+		DDRSS_PHY_186_DATA
+		DDRSS_PHY_187_DATA
+		DDRSS_PHY_188_DATA
+		DDRSS_PHY_189_DATA
+		DDRSS_PHY_190_DATA
+		DDRSS_PHY_191_DATA
+		DDRSS_PHY_192_DATA
+		DDRSS_PHY_193_DATA
+		DDRSS_PHY_194_DATA
+		DDRSS_PHY_195_DATA
+		DDRSS_PHY_196_DATA
+		DDRSS_PHY_197_DATA
+		DDRSS_PHY_198_DATA
+		DDRSS_PHY_199_DATA
+		DDRSS_PHY_200_DATA
+		DDRSS_PHY_201_DATA
+		DDRSS_PHY_202_DATA
+		DDRSS_PHY_203_DATA
+		DDRSS_PHY_204_DATA
+		DDRSS_PHY_205_DATA
+		DDRSS_PHY_206_DATA
+		DDRSS_PHY_207_DATA
+		DDRSS_PHY_208_DATA
+		DDRSS_PHY_209_DATA
+		DDRSS_PHY_210_DATA
+		DDRSS_PHY_211_DATA
+		DDRSS_PHY_212_DATA
+		DDRSS_PHY_213_DATA
+		DDRSS_PHY_214_DATA
+		DDRSS_PHY_215_DATA
+		DDRSS_PHY_216_DATA
+		DDRSS_PHY_217_DATA
+		DDRSS_PHY_218_DATA
+		DDRSS_PHY_219_DATA
+		DDRSS_PHY_220_DATA
+		DDRSS_PHY_221_DATA
+		DDRSS_PHY_222_DATA
+		DDRSS_PHY_223_DATA
+		DDRSS_PHY_224_DATA
+		DDRSS_PHY_225_DATA
+		DDRSS_PHY_226_DATA
+		DDRSS_PHY_227_DATA
+		DDRSS_PHY_228_DATA
+		DDRSS_PHY_229_DATA
+		DDRSS_PHY_230_DATA
+		DDRSS_PHY_231_DATA
+		DDRSS_PHY_232_DATA
+		DDRSS_PHY_233_DATA
+		DDRSS_PHY_234_DATA
+		DDRSS_PHY_235_DATA
+		DDRSS_PHY_236_DATA
+		DDRSS_PHY_237_DATA
+		DDRSS_PHY_238_DATA
+		DDRSS_PHY_239_DATA
+		DDRSS_PHY_240_DATA
+		DDRSS_PHY_241_DATA
+		DDRSS_PHY_242_DATA
+		DDRSS_PHY_243_DATA
+		DDRSS_PHY_244_DATA
+		DDRSS_PHY_245_DATA
+		DDRSS_PHY_246_DATA
+		DDRSS_PHY_247_DATA
+		DDRSS_PHY_248_DATA
+		DDRSS_PHY_249_DATA
+		DDRSS_PHY_250_DATA
+		DDRSS_PHY_251_DATA
+		DDRSS_PHY_252_DATA
+		DDRSS_PHY_253_DATA
+		DDRSS_PHY_254_DATA
+		DDRSS_PHY_255_DATA
+		DDRSS_PHY_256_DATA
+		DDRSS_PHY_257_DATA
+		DDRSS_PHY_258_DATA
+		DDRSS_PHY_259_DATA
+		DDRSS_PHY_260_DATA
+		DDRSS_PHY_261_DATA
+		DDRSS_PHY_262_DATA
+		DDRSS_PHY_263_DATA
+		DDRSS_PHY_264_DATA
+		DDRSS_PHY_265_DATA
+		DDRSS_PHY_266_DATA
+		DDRSS_PHY_267_DATA
+		DDRSS_PHY_268_DATA
+		DDRSS_PHY_269_DATA
+		DDRSS_PHY_270_DATA
+		DDRSS_PHY_271_DATA
+		DDRSS_PHY_272_DATA
+		DDRSS_PHY_273_DATA
+		DDRSS_PHY_274_DATA
+		DDRSS_PHY_275_DATA
+		DDRSS_PHY_276_DATA
+		DDRSS_PHY_277_DATA
+		DDRSS_PHY_278_DATA
+		DDRSS_PHY_279_DATA
+		DDRSS_PHY_280_DATA
+		DDRSS_PHY_281_DATA
+		DDRSS_PHY_282_DATA
+		DDRSS_PHY_283_DATA
+		DDRSS_PHY_284_DATA
+		DDRSS_PHY_285_DATA
+		DDRSS_PHY_286_DATA
+		DDRSS_PHY_287_DATA
+		DDRSS_PHY_288_DATA
+		DDRSS_PHY_289_DATA
+		DDRSS_PHY_290_DATA
+		DDRSS_PHY_291_DATA
+		DDRSS_PHY_292_DATA
+		DDRSS_PHY_293_DATA
+		DDRSS_PHY_294_DATA
+		DDRSS_PHY_295_DATA
+		DDRSS_PHY_296_DATA
+		DDRSS_PHY_297_DATA
+		DDRSS_PHY_298_DATA
+		DDRSS_PHY_299_DATA
+		DDRSS_PHY_300_DATA
+		DDRSS_PHY_301_DATA
+		DDRSS_PHY_302_DATA
+		DDRSS_PHY_303_DATA
+		DDRSS_PHY_304_DATA
+		DDRSS_PHY_305_DATA
+		DDRSS_PHY_306_DATA
+		DDRSS_PHY_307_DATA
+		DDRSS_PHY_308_DATA
+		DDRSS_PHY_309_DATA
+		DDRSS_PHY_310_DATA
+		DDRSS_PHY_311_DATA
+		DDRSS_PHY_312_DATA
+		DDRSS_PHY_313_DATA
+		DDRSS_PHY_314_DATA
+		DDRSS_PHY_315_DATA
+		DDRSS_PHY_316_DATA
+		DDRSS_PHY_317_DATA
+		DDRSS_PHY_318_DATA
+		DDRSS_PHY_319_DATA
+		DDRSS_PHY_320_DATA
+		DDRSS_PHY_321_DATA
+		DDRSS_PHY_322_DATA
+		DDRSS_PHY_323_DATA
+		DDRSS_PHY_324_DATA
+		DDRSS_PHY_325_DATA
+		DDRSS_PHY_326_DATA
+		DDRSS_PHY_327_DATA
+		DDRSS_PHY_328_DATA
+		DDRSS_PHY_329_DATA
+		DDRSS_PHY_330_DATA
+		DDRSS_PHY_331_DATA
+		DDRSS_PHY_332_DATA
+		DDRSS_PHY_333_DATA
+		DDRSS_PHY_334_DATA
+		DDRSS_PHY_335_DATA
+		DDRSS_PHY_336_DATA
+		DDRSS_PHY_337_DATA
+		DDRSS_PHY_338_DATA
+		DDRSS_PHY_339_DATA
+		DDRSS_PHY_340_DATA
+		DDRSS_PHY_341_DATA
+		DDRSS_PHY_342_DATA
+		DDRSS_PHY_343_DATA
+		DDRSS_PHY_344_DATA
+		DDRSS_PHY_345_DATA
+		DDRSS_PHY_346_DATA
+		DDRSS_PHY_347_DATA
+		DDRSS_PHY_348_DATA
+		DDRSS_PHY_349_DATA
+		DDRSS_PHY_350_DATA
+		DDRSS_PHY_351_DATA
+		DDRSS_PHY_352_DATA
+		DDRSS_PHY_353_DATA
+		DDRSS_PHY_354_DATA
+		DDRSS_PHY_355_DATA
+		DDRSS_PHY_356_DATA
+		DDRSS_PHY_357_DATA
+		DDRSS_PHY_358_DATA
+		DDRSS_PHY_359_DATA
+		DDRSS_PHY_360_DATA
+		DDRSS_PHY_361_DATA
+		DDRSS_PHY_362_DATA
+		DDRSS_PHY_363_DATA
+		DDRSS_PHY_364_DATA
+		DDRSS_PHY_365_DATA
+		DDRSS_PHY_366_DATA
+		DDRSS_PHY_367_DATA
+		DDRSS_PHY_368_DATA
+		DDRSS_PHY_369_DATA
+		DDRSS_PHY_370_DATA
+		DDRSS_PHY_371_DATA
+		DDRSS_PHY_372_DATA
+		DDRSS_PHY_373_DATA
+		DDRSS_PHY_374_DATA
+		DDRSS_PHY_375_DATA
+		DDRSS_PHY_376_DATA
+		DDRSS_PHY_377_DATA
+		DDRSS_PHY_378_DATA
+		DDRSS_PHY_379_DATA
+		DDRSS_PHY_380_DATA
+		DDRSS_PHY_381_DATA
+		DDRSS_PHY_382_DATA
+		DDRSS_PHY_383_DATA
+		DDRSS_PHY_384_DATA
+		DDRSS_PHY_385_DATA
+		DDRSS_PHY_386_DATA
+		DDRSS_PHY_387_DATA
+		DDRSS_PHY_388_DATA
+		DDRSS_PHY_389_DATA
+		DDRSS_PHY_390_DATA
+		DDRSS_PHY_391_DATA
+		DDRSS_PHY_392_DATA
+		DDRSS_PHY_393_DATA
+		DDRSS_PHY_394_DATA
+		DDRSS_PHY_395_DATA
+		DDRSS_PHY_396_DATA
+		DDRSS_PHY_397_DATA
+		DDRSS_PHY_398_DATA
+		DDRSS_PHY_399_DATA
+		DDRSS_PHY_400_DATA
+		DDRSS_PHY_401_DATA
+		DDRSS_PHY_402_DATA
+		DDRSS_PHY_403_DATA
+		DDRSS_PHY_404_DATA
+		DDRSS_PHY_405_DATA
+		DDRSS_PHY_406_DATA
+		DDRSS_PHY_407_DATA
+		DDRSS_PHY_408_DATA
+		DDRSS_PHY_409_DATA
+		DDRSS_PHY_410_DATA
+		DDRSS_PHY_411_DATA
+		DDRSS_PHY_412_DATA
+		DDRSS_PHY_413_DATA
+		DDRSS_PHY_414_DATA
+		DDRSS_PHY_415_DATA
+		DDRSS_PHY_416_DATA
+		DDRSS_PHY_417_DATA
+		DDRSS_PHY_418_DATA
+		DDRSS_PHY_419_DATA
+		DDRSS_PHY_420_DATA
+		DDRSS_PHY_421_DATA
+		DDRSS_PHY_422_DATA
+		DDRSS_PHY_423_DATA
+		DDRSS_PHY_424_DATA
+		DDRSS_PHY_425_DATA
+		DDRSS_PHY_426_DATA
+		DDRSS_PHY_427_DATA
+		DDRSS_PHY_428_DATA
+		DDRSS_PHY_429_DATA
+		DDRSS_PHY_430_DATA
+		DDRSS_PHY_431_DATA
+		DDRSS_PHY_432_DATA
+		DDRSS_PHY_433_DATA
+		DDRSS_PHY_434_DATA
+		DDRSS_PHY_435_DATA
+		DDRSS_PHY_436_DATA
+		DDRSS_PHY_437_DATA
+		DDRSS_PHY_438_DATA
+		DDRSS_PHY_439_DATA
+		DDRSS_PHY_440_DATA
+		DDRSS_PHY_441_DATA
+		DDRSS_PHY_442_DATA
+		DDRSS_PHY_443_DATA
+		DDRSS_PHY_444_DATA
+		DDRSS_PHY_445_DATA
+		DDRSS_PHY_446_DATA
+		DDRSS_PHY_447_DATA
+		DDRSS_PHY_448_DATA
+		DDRSS_PHY_449_DATA
+		DDRSS_PHY_450_DATA
+		DDRSS_PHY_451_DATA
+		DDRSS_PHY_452_DATA
+		DDRSS_PHY_453_DATA
+		DDRSS_PHY_454_DATA
+		DDRSS_PHY_455_DATA
+		DDRSS_PHY_456_DATA
+		DDRSS_PHY_457_DATA
+		DDRSS_PHY_458_DATA
+		DDRSS_PHY_459_DATA
+		DDRSS_PHY_460_DATA
+		DDRSS_PHY_461_DATA
+		DDRSS_PHY_462_DATA
+		DDRSS_PHY_463_DATA
+		DDRSS_PHY_464_DATA
+		DDRSS_PHY_465_DATA
+		DDRSS_PHY_466_DATA
+		DDRSS_PHY_467_DATA
+		DDRSS_PHY_468_DATA
+		DDRSS_PHY_469_DATA
+		DDRSS_PHY_470_DATA
+		DDRSS_PHY_471_DATA
+		DDRSS_PHY_472_DATA
+		DDRSS_PHY_473_DATA
+		DDRSS_PHY_474_DATA
+		DDRSS_PHY_475_DATA
+		DDRSS_PHY_476_DATA
+		DDRSS_PHY_477_DATA
+		DDRSS_PHY_478_DATA
+		DDRSS_PHY_479_DATA
+		DDRSS_PHY_480_DATA
+		DDRSS_PHY_481_DATA
+		DDRSS_PHY_482_DATA
+		DDRSS_PHY_483_DATA
+		DDRSS_PHY_484_DATA
+		DDRSS_PHY_485_DATA
+		DDRSS_PHY_486_DATA
+		DDRSS_PHY_487_DATA
+		DDRSS_PHY_488_DATA
+		DDRSS_PHY_489_DATA
+		DDRSS_PHY_490_DATA
+		DDRSS_PHY_491_DATA
+		DDRSS_PHY_492_DATA
+		DDRSS_PHY_493_DATA
+		DDRSS_PHY_494_DATA
+		DDRSS_PHY_495_DATA
+		DDRSS_PHY_496_DATA
+		DDRSS_PHY_497_DATA
+		DDRSS_PHY_498_DATA
+		DDRSS_PHY_499_DATA
+		DDRSS_PHY_500_DATA
+		DDRSS_PHY_501_DATA
+		DDRSS_PHY_502_DATA
+		DDRSS_PHY_503_DATA
+		DDRSS_PHY_504_DATA
+		DDRSS_PHY_505_DATA
+		DDRSS_PHY_506_DATA
+		DDRSS_PHY_507_DATA
+		DDRSS_PHY_508_DATA
+		DDRSS_PHY_509_DATA
+		DDRSS_PHY_510_DATA
+		DDRSS_PHY_511_DATA
+		DDRSS_PHY_512_DATA
+		DDRSS_PHY_513_DATA
+		DDRSS_PHY_514_DATA
+		DDRSS_PHY_515_DATA
+		DDRSS_PHY_516_DATA
+		DDRSS_PHY_517_DATA
+		DDRSS_PHY_518_DATA
+		DDRSS_PHY_519_DATA
+		DDRSS_PHY_520_DATA
+		DDRSS_PHY_521_DATA
+		DDRSS_PHY_522_DATA
+		DDRSS_PHY_523_DATA
+		DDRSS_PHY_524_DATA
+		DDRSS_PHY_525_DATA
+		DDRSS_PHY_526_DATA
+		DDRSS_PHY_527_DATA
+		DDRSS_PHY_528_DATA
+		DDRSS_PHY_529_DATA
+		DDRSS_PHY_530_DATA
+		DDRSS_PHY_531_DATA
+		DDRSS_PHY_532_DATA
+		DDRSS_PHY_533_DATA
+		DDRSS_PHY_534_DATA
+		DDRSS_PHY_535_DATA
+		DDRSS_PHY_536_DATA
+		DDRSS_PHY_537_DATA
+		DDRSS_PHY_538_DATA
+		DDRSS_PHY_539_DATA
+		DDRSS_PHY_540_DATA
+		DDRSS_PHY_541_DATA
+		DDRSS_PHY_542_DATA
+		DDRSS_PHY_543_DATA
+		DDRSS_PHY_544_DATA
+		DDRSS_PHY_545_DATA
+		DDRSS_PHY_546_DATA
+		DDRSS_PHY_547_DATA
+		DDRSS_PHY_548_DATA
+		DDRSS_PHY_549_DATA
+		DDRSS_PHY_550_DATA
+		DDRSS_PHY_551_DATA
+		DDRSS_PHY_552_DATA
+		DDRSS_PHY_553_DATA
+		DDRSS_PHY_554_DATA
+		DDRSS_PHY_555_DATA
+		DDRSS_PHY_556_DATA
+		DDRSS_PHY_557_DATA
+		DDRSS_PHY_558_DATA
+		DDRSS_PHY_559_DATA
+		DDRSS_PHY_560_DATA
+		DDRSS_PHY_561_DATA
+		DDRSS_PHY_562_DATA
+		DDRSS_PHY_563_DATA
+		DDRSS_PHY_564_DATA
+		DDRSS_PHY_565_DATA
+		DDRSS_PHY_566_DATA
+		DDRSS_PHY_567_DATA
+		DDRSS_PHY_568_DATA
+		DDRSS_PHY_569_DATA
+		DDRSS_PHY_570_DATA
+		DDRSS_PHY_571_DATA
+		DDRSS_PHY_572_DATA
+		DDRSS_PHY_573_DATA
+		DDRSS_PHY_574_DATA
+		DDRSS_PHY_575_DATA
+		DDRSS_PHY_576_DATA
+		DDRSS_PHY_577_DATA
+		DDRSS_PHY_578_DATA
+		DDRSS_PHY_579_DATA
+		DDRSS_PHY_580_DATA
+		DDRSS_PHY_581_DATA
+		DDRSS_PHY_582_DATA
+		DDRSS_PHY_583_DATA
+		DDRSS_PHY_584_DATA
+		DDRSS_PHY_585_DATA
+		DDRSS_PHY_586_DATA
+		DDRSS_PHY_587_DATA
+		DDRSS_PHY_588_DATA
+		DDRSS_PHY_589_DATA
+		DDRSS_PHY_590_DATA
+		DDRSS_PHY_591_DATA
+		DDRSS_PHY_592_DATA
+		DDRSS_PHY_593_DATA
+		DDRSS_PHY_594_DATA
+		DDRSS_PHY_595_DATA
+		DDRSS_PHY_596_DATA
+		DDRSS_PHY_597_DATA
+		DDRSS_PHY_598_DATA
+		DDRSS_PHY_599_DATA
+		DDRSS_PHY_600_DATA
+		DDRSS_PHY_601_DATA
+		DDRSS_PHY_602_DATA
+		DDRSS_PHY_603_DATA
+		DDRSS_PHY_604_DATA
+		DDRSS_PHY_605_DATA
+		DDRSS_PHY_606_DATA
+		DDRSS_PHY_607_DATA
+		DDRSS_PHY_608_DATA
+		DDRSS_PHY_609_DATA
+		DDRSS_PHY_610_DATA
+		DDRSS_PHY_611_DATA
+		DDRSS_PHY_612_DATA
+		DDRSS_PHY_613_DATA
+		DDRSS_PHY_614_DATA
+		DDRSS_PHY_615_DATA
+		DDRSS_PHY_616_DATA
+		DDRSS_PHY_617_DATA
+		DDRSS_PHY_618_DATA
+		DDRSS_PHY_619_DATA
+		DDRSS_PHY_620_DATA
+		DDRSS_PHY_621_DATA
+		DDRSS_PHY_622_DATA
+		DDRSS_PHY_623_DATA
+		DDRSS_PHY_624_DATA
+		DDRSS_PHY_625_DATA
+		DDRSS_PHY_626_DATA
+		DDRSS_PHY_627_DATA
+		DDRSS_PHY_628_DATA
+		DDRSS_PHY_629_DATA
+		DDRSS_PHY_630_DATA
+		DDRSS_PHY_631_DATA
+		DDRSS_PHY_632_DATA
+		DDRSS_PHY_633_DATA
+		DDRSS_PHY_634_DATA
+		DDRSS_PHY_635_DATA
+		DDRSS_PHY_636_DATA
+		DDRSS_PHY_637_DATA
+		DDRSS_PHY_638_DATA
+		DDRSS_PHY_639_DATA
+		DDRSS_PHY_640_DATA
+		DDRSS_PHY_641_DATA
+		DDRSS_PHY_642_DATA
+		DDRSS_PHY_643_DATA
+		DDRSS_PHY_644_DATA
+		DDRSS_PHY_645_DATA
+		DDRSS_PHY_646_DATA
+		DDRSS_PHY_647_DATA
+		DDRSS_PHY_648_DATA
+		DDRSS_PHY_649_DATA
+		DDRSS_PHY_650_DATA
+		DDRSS_PHY_651_DATA
+		DDRSS_PHY_652_DATA
+		DDRSS_PHY_653_DATA
+		DDRSS_PHY_654_DATA
+		DDRSS_PHY_655_DATA
+		DDRSS_PHY_656_DATA
+		DDRSS_PHY_657_DATA
+		DDRSS_PHY_658_DATA
+		DDRSS_PHY_659_DATA
+		DDRSS_PHY_660_DATA
+		DDRSS_PHY_661_DATA
+		DDRSS_PHY_662_DATA
+		DDRSS_PHY_663_DATA
+		DDRSS_PHY_664_DATA
+		DDRSS_PHY_665_DATA
+		DDRSS_PHY_666_DATA
+		DDRSS_PHY_667_DATA
+		DDRSS_PHY_668_DATA
+		DDRSS_PHY_669_DATA
+		DDRSS_PHY_670_DATA
+		DDRSS_PHY_671_DATA
+		DDRSS_PHY_672_DATA
+		DDRSS_PHY_673_DATA
+		DDRSS_PHY_674_DATA
+		DDRSS_PHY_675_DATA
+		DDRSS_PHY_676_DATA
+		DDRSS_PHY_677_DATA
+		DDRSS_PHY_678_DATA
+		DDRSS_PHY_679_DATA
+		DDRSS_PHY_680_DATA
+		DDRSS_PHY_681_DATA
+		DDRSS_PHY_682_DATA
+		DDRSS_PHY_683_DATA
+		DDRSS_PHY_684_DATA
+		DDRSS_PHY_685_DATA
+		DDRSS_PHY_686_DATA
+		DDRSS_PHY_687_DATA
+		DDRSS_PHY_688_DATA
+		DDRSS_PHY_689_DATA
+		DDRSS_PHY_690_DATA
+		DDRSS_PHY_691_DATA
+		DDRSS_PHY_692_DATA
+		DDRSS_PHY_693_DATA
+		DDRSS_PHY_694_DATA
+		DDRSS_PHY_695_DATA
+		DDRSS_PHY_696_DATA
+		DDRSS_PHY_697_DATA
+		DDRSS_PHY_698_DATA
+		DDRSS_PHY_699_DATA
+		DDRSS_PHY_700_DATA
+		DDRSS_PHY_701_DATA
+		DDRSS_PHY_702_DATA
+		DDRSS_PHY_703_DATA
+		DDRSS_PHY_704_DATA
+		DDRSS_PHY_705_DATA
+		DDRSS_PHY_706_DATA
+		DDRSS_PHY_707_DATA
+		DDRSS_PHY_708_DATA
+		DDRSS_PHY_709_DATA
+		DDRSS_PHY_710_DATA
+		DDRSS_PHY_711_DATA
+		DDRSS_PHY_712_DATA
+		DDRSS_PHY_713_DATA
+		DDRSS_PHY_714_DATA
+		DDRSS_PHY_715_DATA
+		DDRSS_PHY_716_DATA
+		DDRSS_PHY_717_DATA
+		DDRSS_PHY_718_DATA
+		DDRSS_PHY_719_DATA
+		DDRSS_PHY_720_DATA
+		DDRSS_PHY_721_DATA
+		DDRSS_PHY_722_DATA
+		DDRSS_PHY_723_DATA
+		DDRSS_PHY_724_DATA
+		DDRSS_PHY_725_DATA
+		DDRSS_PHY_726_DATA
+		DDRSS_PHY_727_DATA
+		DDRSS_PHY_728_DATA
+		DDRSS_PHY_729_DATA
+		DDRSS_PHY_730_DATA
+		DDRSS_PHY_731_DATA
+		DDRSS_PHY_732_DATA
+		DDRSS_PHY_733_DATA
+		DDRSS_PHY_734_DATA
+		DDRSS_PHY_735_DATA
+		DDRSS_PHY_736_DATA
+		DDRSS_PHY_737_DATA
+		DDRSS_PHY_738_DATA
+		DDRSS_PHY_739_DATA
+		DDRSS_PHY_740_DATA
+		DDRSS_PHY_741_DATA
+		DDRSS_PHY_742_DATA
+		DDRSS_PHY_743_DATA
+		DDRSS_PHY_744_DATA
+		DDRSS_PHY_745_DATA
+		DDRSS_PHY_746_DATA
+		DDRSS_PHY_747_DATA
+		DDRSS_PHY_748_DATA
+		DDRSS_PHY_749_DATA
+		DDRSS_PHY_750_DATA
+		DDRSS_PHY_751_DATA
+		DDRSS_PHY_752_DATA
+		DDRSS_PHY_753_DATA
+		DDRSS_PHY_754_DATA
+		DDRSS_PHY_755_DATA
+		DDRSS_PHY_756_DATA
+		DDRSS_PHY_757_DATA
+		DDRSS_PHY_758_DATA
+		DDRSS_PHY_759_DATA
+		DDRSS_PHY_760_DATA
+		DDRSS_PHY_761_DATA
+		DDRSS_PHY_762_DATA
+		DDRSS_PHY_763_DATA
+		DDRSS_PHY_764_DATA
+		DDRSS_PHY_765_DATA
+		DDRSS_PHY_766_DATA
+		DDRSS_PHY_767_DATA
+		DDRSS_PHY_768_DATA
+		DDRSS_PHY_769_DATA
+		DDRSS_PHY_770_DATA
+		DDRSS_PHY_771_DATA
+		DDRSS_PHY_772_DATA
+		DDRSS_PHY_773_DATA
+		DDRSS_PHY_774_DATA
+		DDRSS_PHY_775_DATA
+		DDRSS_PHY_776_DATA
+		DDRSS_PHY_777_DATA
+		DDRSS_PHY_778_DATA
+		DDRSS_PHY_779_DATA
+		DDRSS_PHY_780_DATA
+		DDRSS_PHY_781_DATA
+		DDRSS_PHY_782_DATA
+		DDRSS_PHY_783_DATA
+		DDRSS_PHY_784_DATA
+		DDRSS_PHY_785_DATA
+		DDRSS_PHY_786_DATA
+		DDRSS_PHY_787_DATA
+		DDRSS_PHY_788_DATA
+		DDRSS_PHY_789_DATA
+		DDRSS_PHY_790_DATA
+		DDRSS_PHY_791_DATA
+		DDRSS_PHY_792_DATA
+		DDRSS_PHY_793_DATA
+		DDRSS_PHY_794_DATA
+		DDRSS_PHY_795_DATA
+		DDRSS_PHY_796_DATA
+		DDRSS_PHY_797_DATA
+		DDRSS_PHY_798_DATA
+		DDRSS_PHY_799_DATA
+		DDRSS_PHY_800_DATA
+		DDRSS_PHY_801_DATA
+		DDRSS_PHY_802_DATA
+		DDRSS_PHY_803_DATA
+		DDRSS_PHY_804_DATA
+		DDRSS_PHY_805_DATA
+		DDRSS_PHY_806_DATA
+		DDRSS_PHY_807_DATA
+		DDRSS_PHY_808_DATA
+		DDRSS_PHY_809_DATA
+		DDRSS_PHY_810_DATA
+		DDRSS_PHY_811_DATA
+		DDRSS_PHY_812_DATA
+		DDRSS_PHY_813_DATA
+		DDRSS_PHY_814_DATA
+		DDRSS_PHY_815_DATA
+		DDRSS_PHY_816_DATA
+		DDRSS_PHY_817_DATA
+		DDRSS_PHY_818_DATA
+		DDRSS_PHY_819_DATA
+		DDRSS_PHY_820_DATA
+		DDRSS_PHY_821_DATA
+		DDRSS_PHY_822_DATA
+		DDRSS_PHY_823_DATA
+		DDRSS_PHY_824_DATA
+		DDRSS_PHY_825_DATA
+		DDRSS_PHY_826_DATA
+		DDRSS_PHY_827_DATA
+		DDRSS_PHY_828_DATA
+		DDRSS_PHY_829_DATA
+		DDRSS_PHY_830_DATA
+		DDRSS_PHY_831_DATA
+		DDRSS_PHY_832_DATA
+		DDRSS_PHY_833_DATA
+		DDRSS_PHY_834_DATA
+		DDRSS_PHY_835_DATA
+		DDRSS_PHY_836_DATA
+		DDRSS_PHY_837_DATA
+		DDRSS_PHY_838_DATA
+		DDRSS_PHY_839_DATA
+		DDRSS_PHY_840_DATA
+		DDRSS_PHY_841_DATA
+		DDRSS_PHY_842_DATA
+		DDRSS_PHY_843_DATA
+		DDRSS_PHY_844_DATA
+		DDRSS_PHY_845_DATA
+		DDRSS_PHY_846_DATA
+		DDRSS_PHY_847_DATA
+		DDRSS_PHY_848_DATA
+		DDRSS_PHY_849_DATA
+		DDRSS_PHY_850_DATA
+		DDRSS_PHY_851_DATA
+		DDRSS_PHY_852_DATA
+		DDRSS_PHY_853_DATA
+		DDRSS_PHY_854_DATA
+		DDRSS_PHY_855_DATA
+		DDRSS_PHY_856_DATA
+		DDRSS_PHY_857_DATA
+		DDRSS_PHY_858_DATA
+		DDRSS_PHY_859_DATA
+		DDRSS_PHY_860_DATA
+		DDRSS_PHY_861_DATA
+		DDRSS_PHY_862_DATA
+		DDRSS_PHY_863_DATA
+		DDRSS_PHY_864_DATA
+		DDRSS_PHY_865_DATA
+		DDRSS_PHY_866_DATA
+		DDRSS_PHY_867_DATA
+		DDRSS_PHY_868_DATA
+		DDRSS_PHY_869_DATA
+		DDRSS_PHY_870_DATA
+		DDRSS_PHY_871_DATA
+		DDRSS_PHY_872_DATA
+		DDRSS_PHY_873_DATA
+		DDRSS_PHY_874_DATA
+		DDRSS_PHY_875_DATA
+		DDRSS_PHY_876_DATA
+		DDRSS_PHY_877_DATA
+		DDRSS_PHY_878_DATA
+		DDRSS_PHY_879_DATA
+		DDRSS_PHY_880_DATA
+		DDRSS_PHY_881_DATA
+		DDRSS_PHY_882_DATA
+		DDRSS_PHY_883_DATA
+		DDRSS_PHY_884_DATA
+		DDRSS_PHY_885_DATA
+		DDRSS_PHY_886_DATA
+		DDRSS_PHY_887_DATA
+		DDRSS_PHY_888_DATA
+		DDRSS_PHY_889_DATA
+		DDRSS_PHY_890_DATA
+		DDRSS_PHY_891_DATA
+		DDRSS_PHY_892_DATA
+		DDRSS_PHY_893_DATA
+		DDRSS_PHY_894_DATA
+		DDRSS_PHY_895_DATA
+		DDRSS_PHY_896_DATA
+		DDRSS_PHY_897_DATA
+		DDRSS_PHY_898_DATA
+		DDRSS_PHY_899_DATA
+		DDRSS_PHY_900_DATA
+		DDRSS_PHY_901_DATA
+		DDRSS_PHY_902_DATA
+		DDRSS_PHY_903_DATA
+		DDRSS_PHY_904_DATA
+		DDRSS_PHY_905_DATA
+		DDRSS_PHY_906_DATA
+		DDRSS_PHY_907_DATA
+		DDRSS_PHY_908_DATA
+		DDRSS_PHY_909_DATA
+		DDRSS_PHY_910_DATA
+		DDRSS_PHY_911_DATA
+		DDRSS_PHY_912_DATA
+		DDRSS_PHY_913_DATA
+		DDRSS_PHY_914_DATA
+		DDRSS_PHY_915_DATA
+		DDRSS_PHY_916_DATA
+		DDRSS_PHY_917_DATA
+		DDRSS_PHY_918_DATA
+		DDRSS_PHY_919_DATA
+		DDRSS_PHY_920_DATA
+		DDRSS_PHY_921_DATA
+		DDRSS_PHY_922_DATA
+		DDRSS_PHY_923_DATA
+		DDRSS_PHY_924_DATA
+		DDRSS_PHY_925_DATA
+		DDRSS_PHY_926_DATA
+		DDRSS_PHY_927_DATA
+		DDRSS_PHY_928_DATA
+		DDRSS_PHY_929_DATA
+		DDRSS_PHY_930_DATA
+		DDRSS_PHY_931_DATA
+		DDRSS_PHY_932_DATA
+		DDRSS_PHY_933_DATA
+		DDRSS_PHY_934_DATA
+		DDRSS_PHY_935_DATA
+		DDRSS_PHY_936_DATA
+		DDRSS_PHY_937_DATA
+		DDRSS_PHY_938_DATA
+		DDRSS_PHY_939_DATA
+		DDRSS_PHY_940_DATA
+		DDRSS_PHY_941_DATA
+		DDRSS_PHY_942_DATA
+		DDRSS_PHY_943_DATA
+		DDRSS_PHY_944_DATA
+		DDRSS_PHY_945_DATA
+		DDRSS_PHY_946_DATA
+		DDRSS_PHY_947_DATA
+		DDRSS_PHY_948_DATA
+		DDRSS_PHY_949_DATA
+		DDRSS_PHY_950_DATA
+		DDRSS_PHY_951_DATA
+		DDRSS_PHY_952_DATA
+		DDRSS_PHY_953_DATA
+		DDRSS_PHY_954_DATA
+		DDRSS_PHY_955_DATA
+		DDRSS_PHY_956_DATA
+		DDRSS_PHY_957_DATA
+		DDRSS_PHY_958_DATA
+		DDRSS_PHY_959_DATA
+		DDRSS_PHY_960_DATA
+		DDRSS_PHY_961_DATA
+		DDRSS_PHY_962_DATA
+		DDRSS_PHY_963_DATA
+		DDRSS_PHY_964_DATA
+		DDRSS_PHY_965_DATA
+		DDRSS_PHY_966_DATA
+		DDRSS_PHY_967_DATA
+		DDRSS_PHY_968_DATA
+		DDRSS_PHY_969_DATA
+		DDRSS_PHY_970_DATA
+		DDRSS_PHY_971_DATA
+		DDRSS_PHY_972_DATA
+		DDRSS_PHY_973_DATA
+		DDRSS_PHY_974_DATA
+		DDRSS_PHY_975_DATA
+		DDRSS_PHY_976_DATA
+		DDRSS_PHY_977_DATA
+		DDRSS_PHY_978_DATA
+		DDRSS_PHY_979_DATA
+		DDRSS_PHY_980_DATA
+		DDRSS_PHY_981_DATA
+		DDRSS_PHY_982_DATA
+		DDRSS_PHY_983_DATA
+		DDRSS_PHY_984_DATA
+		DDRSS_PHY_985_DATA
+		DDRSS_PHY_986_DATA
+		DDRSS_PHY_987_DATA
+		DDRSS_PHY_988_DATA
+		DDRSS_PHY_989_DATA
+		DDRSS_PHY_990_DATA
+		DDRSS_PHY_991_DATA
+		DDRSS_PHY_992_DATA
+		DDRSS_PHY_993_DATA
+		DDRSS_PHY_994_DATA
+		DDRSS_PHY_995_DATA
+		DDRSS_PHY_996_DATA
+		DDRSS_PHY_997_DATA
+		DDRSS_PHY_998_DATA
+		DDRSS_PHY_999_DATA
+		DDRSS_PHY_1000_DATA
+		DDRSS_PHY_1001_DATA
+		DDRSS_PHY_1002_DATA
+		DDRSS_PHY_1003_DATA
+		DDRSS_PHY_1004_DATA
+		DDRSS_PHY_1005_DATA
+		DDRSS_PHY_1006_DATA
+		DDRSS_PHY_1007_DATA
+		DDRSS_PHY_1008_DATA
+		DDRSS_PHY_1009_DATA
+		DDRSS_PHY_1010_DATA
+		DDRSS_PHY_1011_DATA
+		DDRSS_PHY_1012_DATA
+		DDRSS_PHY_1013_DATA
+		DDRSS_PHY_1014_DATA
+		DDRSS_PHY_1015_DATA
+		DDRSS_PHY_1016_DATA
+		DDRSS_PHY_1017_DATA
+		DDRSS_PHY_1018_DATA
+		DDRSS_PHY_1019_DATA
+		DDRSS_PHY_1020_DATA
+		DDRSS_PHY_1021_DATA
+		DDRSS_PHY_1022_DATA
+		DDRSS_PHY_1023_DATA
+		DDRSS_PHY_1024_DATA
+		DDRSS_PHY_1025_DATA
+		DDRSS_PHY_1026_DATA
+		DDRSS_PHY_1027_DATA
+		DDRSS_PHY_1028_DATA
+		DDRSS_PHY_1029_DATA
+		DDRSS_PHY_1030_DATA
+		DDRSS_PHY_1031_DATA
+		DDRSS_PHY_1032_DATA
+		DDRSS_PHY_1033_DATA
+		DDRSS_PHY_1034_DATA
+		DDRSS_PHY_1035_DATA
+		DDRSS_PHY_1036_DATA
+		DDRSS_PHY_1037_DATA
+		DDRSS_PHY_1038_DATA
+		DDRSS_PHY_1039_DATA
+		DDRSS_PHY_1040_DATA
+		DDRSS_PHY_1041_DATA
+		DDRSS_PHY_1042_DATA
+		DDRSS_PHY_1043_DATA
+		DDRSS_PHY_1044_DATA
+		DDRSS_PHY_1045_DATA
+		DDRSS_PHY_1046_DATA
+		DDRSS_PHY_1047_DATA
+		DDRSS_PHY_1048_DATA
+		DDRSS_PHY_1049_DATA
+		DDRSS_PHY_1050_DATA
+		DDRSS_PHY_1051_DATA
+		DDRSS_PHY_1052_DATA
+		DDRSS_PHY_1053_DATA
+		DDRSS_PHY_1054_DATA
+		DDRSS_PHY_1055_DATA
+		DDRSS_PHY_1056_DATA
+		DDRSS_PHY_1057_DATA
+		DDRSS_PHY_1058_DATA
+		DDRSS_PHY_1059_DATA
+		DDRSS_PHY_1060_DATA
+		DDRSS_PHY_1061_DATA
+		DDRSS_PHY_1062_DATA
+		DDRSS_PHY_1063_DATA
+		DDRSS_PHY_1064_DATA
+		DDRSS_PHY_1065_DATA
+		DDRSS_PHY_1066_DATA
+		DDRSS_PHY_1067_DATA
+		DDRSS_PHY_1068_DATA
+		DDRSS_PHY_1069_DATA
+		DDRSS_PHY_1070_DATA
+		DDRSS_PHY_1071_DATA
+		DDRSS_PHY_1072_DATA
+		DDRSS_PHY_1073_DATA
+		DDRSS_PHY_1074_DATA
+		DDRSS_PHY_1075_DATA
+		DDRSS_PHY_1076_DATA
+		DDRSS_PHY_1077_DATA
+		DDRSS_PHY_1078_DATA
+		DDRSS_PHY_1079_DATA
+		DDRSS_PHY_1080_DATA
+		DDRSS_PHY_1081_DATA
+		DDRSS_PHY_1082_DATA
+		DDRSS_PHY_1083_DATA
+		DDRSS_PHY_1084_DATA
+		DDRSS_PHY_1085_DATA
+		DDRSS_PHY_1086_DATA
+		DDRSS_PHY_1087_DATA
+		DDRSS_PHY_1088_DATA
+		DDRSS_PHY_1089_DATA
+		DDRSS_PHY_1090_DATA
+		DDRSS_PHY_1091_DATA
+		DDRSS_PHY_1092_DATA
+		DDRSS_PHY_1093_DATA
+		DDRSS_PHY_1094_DATA
+		DDRSS_PHY_1095_DATA
+		DDRSS_PHY_1096_DATA
+		DDRSS_PHY_1097_DATA
+		DDRSS_PHY_1098_DATA
+		DDRSS_PHY_1099_DATA
+		DDRSS_PHY_1100_DATA
+		DDRSS_PHY_1101_DATA
+		DDRSS_PHY_1102_DATA
+		DDRSS_PHY_1103_DATA
+		DDRSS_PHY_1104_DATA
+		DDRSS_PHY_1105_DATA
+		DDRSS_PHY_1106_DATA
+		DDRSS_PHY_1107_DATA
+		DDRSS_PHY_1108_DATA
+		DDRSS_PHY_1109_DATA
+		DDRSS_PHY_1110_DATA
+		DDRSS_PHY_1111_DATA
+		DDRSS_PHY_1112_DATA
+		DDRSS_PHY_1113_DATA
+		DDRSS_PHY_1114_DATA
+		DDRSS_PHY_1115_DATA
+		DDRSS_PHY_1116_DATA
+		DDRSS_PHY_1117_DATA
+		DDRSS_PHY_1118_DATA
+		DDRSS_PHY_1119_DATA
+		DDRSS_PHY_1120_DATA
+		DDRSS_PHY_1121_DATA
+		DDRSS_PHY_1122_DATA
+		DDRSS_PHY_1123_DATA
+		DDRSS_PHY_1124_DATA
+		DDRSS_PHY_1125_DATA
+		DDRSS_PHY_1126_DATA
+		DDRSS_PHY_1127_DATA
+		DDRSS_PHY_1128_DATA
+		DDRSS_PHY_1129_DATA
+		DDRSS_PHY_1130_DATA
+		DDRSS_PHY_1131_DATA
+		DDRSS_PHY_1132_DATA
+		DDRSS_PHY_1133_DATA
+		DDRSS_PHY_1134_DATA
+		DDRSS_PHY_1135_DATA
+		DDRSS_PHY_1136_DATA
+		DDRSS_PHY_1137_DATA
+		DDRSS_PHY_1138_DATA
+		DDRSS_PHY_1139_DATA
+		DDRSS_PHY_1140_DATA
+		DDRSS_PHY_1141_DATA
+		DDRSS_PHY_1142_DATA
+		DDRSS_PHY_1143_DATA
+		DDRSS_PHY_1144_DATA
+		DDRSS_PHY_1145_DATA
+		DDRSS_PHY_1146_DATA
+		DDRSS_PHY_1147_DATA
+		DDRSS_PHY_1148_DATA
+		DDRSS_PHY_1149_DATA
+		DDRSS_PHY_1150_DATA
+		DDRSS_PHY_1151_DATA
+		DDRSS_PHY_1152_DATA
+		DDRSS_PHY_1153_DATA
+		DDRSS_PHY_1154_DATA
+		DDRSS_PHY_1155_DATA
+		DDRSS_PHY_1156_DATA
+		DDRSS_PHY_1157_DATA
+		DDRSS_PHY_1158_DATA
+		DDRSS_PHY_1159_DATA
+		DDRSS_PHY_1160_DATA
+		DDRSS_PHY_1161_DATA
+		DDRSS_PHY_1162_DATA
+		DDRSS_PHY_1163_DATA
+		DDRSS_PHY_1164_DATA
+		DDRSS_PHY_1165_DATA
+		DDRSS_PHY_1166_DATA
+		DDRSS_PHY_1167_DATA
+		DDRSS_PHY_1168_DATA
+		DDRSS_PHY_1169_DATA
+		DDRSS_PHY_1170_DATA
+		DDRSS_PHY_1171_DATA
+		DDRSS_PHY_1172_DATA
+		DDRSS_PHY_1173_DATA
+		DDRSS_PHY_1174_DATA
+		DDRSS_PHY_1175_DATA
+		DDRSS_PHY_1176_DATA
+		DDRSS_PHY_1177_DATA
+		DDRSS_PHY_1178_DATA
+		DDRSS_PHY_1179_DATA
+		DDRSS_PHY_1180_DATA
+		DDRSS_PHY_1181_DATA
+		DDRSS_PHY_1182_DATA
+		DDRSS_PHY_1183_DATA
+		DDRSS_PHY_1184_DATA
+		DDRSS_PHY_1185_DATA
+		DDRSS_PHY_1186_DATA
+		DDRSS_PHY_1187_DATA
+		DDRSS_PHY_1188_DATA
+		DDRSS_PHY_1189_DATA
+		DDRSS_PHY_1190_DATA
+		DDRSS_PHY_1191_DATA
+		DDRSS_PHY_1192_DATA
+		DDRSS_PHY_1193_DATA
+		DDRSS_PHY_1194_DATA
+		DDRSS_PHY_1195_DATA
+		DDRSS_PHY_1196_DATA
+		DDRSS_PHY_1197_DATA
+		DDRSS_PHY_1198_DATA
+		DDRSS_PHY_1199_DATA
+		DDRSS_PHY_1200_DATA
+		DDRSS_PHY_1201_DATA
+		DDRSS_PHY_1202_DATA
+		DDRSS_PHY_1203_DATA
+		DDRSS_PHY_1204_DATA
+		DDRSS_PHY_1205_DATA
+		DDRSS_PHY_1206_DATA
+		DDRSS_PHY_1207_DATA
+		DDRSS_PHY_1208_DATA
+		DDRSS_PHY_1209_DATA
+		DDRSS_PHY_1210_DATA
+		DDRSS_PHY_1211_DATA
+		DDRSS_PHY_1212_DATA
+		DDRSS_PHY_1213_DATA
+		DDRSS_PHY_1214_DATA
+		DDRSS_PHY_1215_DATA
+		DDRSS_PHY_1216_DATA
+		DDRSS_PHY_1217_DATA
+		DDRSS_PHY_1218_DATA
+		DDRSS_PHY_1219_DATA
+		DDRSS_PHY_1220_DATA
+		DDRSS_PHY_1221_DATA
+		DDRSS_PHY_1222_DATA
+		DDRSS_PHY_1223_DATA
+		DDRSS_PHY_1224_DATA
+		DDRSS_PHY_1225_DATA
+		DDRSS_PHY_1226_DATA
+		DDRSS_PHY_1227_DATA
+		DDRSS_PHY_1228_DATA
+		DDRSS_PHY_1229_DATA
+		DDRSS_PHY_1230_DATA
+		DDRSS_PHY_1231_DATA
+		DDRSS_PHY_1232_DATA
+		DDRSS_PHY_1233_DATA
+		DDRSS_PHY_1234_DATA
+		DDRSS_PHY_1235_DATA
+		DDRSS_PHY_1236_DATA
+		DDRSS_PHY_1237_DATA
+		DDRSS_PHY_1238_DATA
+		DDRSS_PHY_1239_DATA
+		DDRSS_PHY_1240_DATA
+		DDRSS_PHY_1241_DATA
+		DDRSS_PHY_1242_DATA
+		DDRSS_PHY_1243_DATA
+		DDRSS_PHY_1244_DATA
+		DDRSS_PHY_1245_DATA
+		DDRSS_PHY_1246_DATA
+		DDRSS_PHY_1247_DATA
+		DDRSS_PHY_1248_DATA
+		DDRSS_PHY_1249_DATA
+		DDRSS_PHY_1250_DATA
+		DDRSS_PHY_1251_DATA
+		DDRSS_PHY_1252_DATA
+		DDRSS_PHY_1253_DATA
+		DDRSS_PHY_1254_DATA
+		DDRSS_PHY_1255_DATA
+		DDRSS_PHY_1256_DATA
+		DDRSS_PHY_1257_DATA
+		DDRSS_PHY_1258_DATA
+		DDRSS_PHY_1259_DATA
+		DDRSS_PHY_1260_DATA
+		DDRSS_PHY_1261_DATA
+		DDRSS_PHY_1262_DATA
+		DDRSS_PHY_1263_DATA
+		DDRSS_PHY_1264_DATA
+		DDRSS_PHY_1265_DATA
+		DDRSS_PHY_1266_DATA
+		DDRSS_PHY_1267_DATA
+		DDRSS_PHY_1268_DATA
+		DDRSS_PHY_1269_DATA
+		DDRSS_PHY_1270_DATA
+		DDRSS_PHY_1271_DATA
+		DDRSS_PHY_1272_DATA
+		DDRSS_PHY_1273_DATA
+		DDRSS_PHY_1274_DATA
+		DDRSS_PHY_1275_DATA
+		DDRSS_PHY_1276_DATA
+		DDRSS_PHY_1277_DATA
+		DDRSS_PHY_1278_DATA
+		DDRSS_PHY_1279_DATA
+		DDRSS_PHY_1280_DATA
+		DDRSS_PHY_1281_DATA
+		DDRSS_PHY_1282_DATA
+		DDRSS_PHY_1283_DATA
+		DDRSS_PHY_1284_DATA
+		DDRSS_PHY_1285_DATA
+		DDRSS_PHY_1286_DATA
+		DDRSS_PHY_1287_DATA
+		DDRSS_PHY_1288_DATA
+		DDRSS_PHY_1289_DATA
+		DDRSS_PHY_1290_DATA
+		DDRSS_PHY_1291_DATA
+		DDRSS_PHY_1292_DATA
+		DDRSS_PHY_1293_DATA
+		DDRSS_PHY_1294_DATA
+		DDRSS_PHY_1295_DATA
+		DDRSS_PHY_1296_DATA
+		DDRSS_PHY_1297_DATA
+		DDRSS_PHY_1298_DATA
+		DDRSS_PHY_1299_DATA
+		DDRSS_PHY_1300_DATA
+		DDRSS_PHY_1301_DATA
+		DDRSS_PHY_1302_DATA
+		DDRSS_PHY_1303_DATA
+		DDRSS_PHY_1304_DATA
+		DDRSS_PHY_1305_DATA
+		DDRSS_PHY_1306_DATA
+		DDRSS_PHY_1307_DATA
+		DDRSS_PHY_1308_DATA
+		DDRSS_PHY_1309_DATA
+		DDRSS_PHY_1310_DATA
+		DDRSS_PHY_1311_DATA
+		DDRSS_PHY_1312_DATA
+		DDRSS_PHY_1313_DATA
+		DDRSS_PHY_1314_DATA
+		DDRSS_PHY_1315_DATA
+		DDRSS_PHY_1316_DATA
+		DDRSS_PHY_1317_DATA
+		DDRSS_PHY_1318_DATA
+		DDRSS_PHY_1319_DATA
+		DDRSS_PHY_1320_DATA
+		DDRSS_PHY_1321_DATA
+		DDRSS_PHY_1322_DATA
+		DDRSS_PHY_1323_DATA
+		DDRSS_PHY_1324_DATA
+		DDRSS_PHY_1325_DATA
+		DDRSS_PHY_1326_DATA
+		DDRSS_PHY_1327_DATA
+		DDRSS_PHY_1328_DATA
+		DDRSS_PHY_1329_DATA
+		DDRSS_PHY_1330_DATA
+		DDRSS_PHY_1331_DATA
+		DDRSS_PHY_1332_DATA
+		DDRSS_PHY_1333_DATA
+		DDRSS_PHY_1334_DATA
+		DDRSS_PHY_1335_DATA
+		DDRSS_PHY_1336_DATA
+		DDRSS_PHY_1337_DATA
+		DDRSS_PHY_1338_DATA
+		DDRSS_PHY_1339_DATA
+		DDRSS_PHY_1340_DATA
+		DDRSS_PHY_1341_DATA
+		DDRSS_PHY_1342_DATA
+		DDRSS_PHY_1343_DATA
+		DDRSS_PHY_1344_DATA
+		DDRSS_PHY_1345_DATA
+		DDRSS_PHY_1346_DATA
+		DDRSS_PHY_1347_DATA
+		DDRSS_PHY_1348_DATA
+		DDRSS_PHY_1349_DATA
+		DDRSS_PHY_1350_DATA
+		DDRSS_PHY_1351_DATA
+		DDRSS_PHY_1352_DATA
+		DDRSS_PHY_1353_DATA
+		DDRSS_PHY_1354_DATA
+		DDRSS_PHY_1355_DATA
+		DDRSS_PHY_1356_DATA
+		DDRSS_PHY_1357_DATA
+		DDRSS_PHY_1358_DATA
+		DDRSS_PHY_1359_DATA
+		DDRSS_PHY_1360_DATA
+		DDRSS_PHY_1361_DATA
+		DDRSS_PHY_1362_DATA
+		DDRSS_PHY_1363_DATA
+		DDRSS_PHY_1364_DATA
+		DDRSS_PHY_1365_DATA
+		DDRSS_PHY_1366_DATA
+		DDRSS_PHY_1367_DATA
+		DDRSS_PHY_1368_DATA
+		DDRSS_PHY_1369_DATA
+		DDRSS_PHY_1370_DATA
+		DDRSS_PHY_1371_DATA
+		DDRSS_PHY_1372_DATA
+		DDRSS_PHY_1373_DATA
+		DDRSS_PHY_1374_DATA
+		DDRSS_PHY_1375_DATA
+		DDRSS_PHY_1376_DATA
+		DDRSS_PHY_1377_DATA
+		DDRSS_PHY_1378_DATA
+		DDRSS_PHY_1379_DATA
+		DDRSS_PHY_1380_DATA
+		DDRSS_PHY_1381_DATA
+		DDRSS_PHY_1382_DATA
+		DDRSS_PHY_1383_DATA
+		DDRSS_PHY_1384_DATA
+		DDRSS_PHY_1385_DATA
+		DDRSS_PHY_1386_DATA
+		DDRSS_PHY_1387_DATA
+		DDRSS_PHY_1388_DATA
+		DDRSS_PHY_1389_DATA
+		DDRSS_PHY_1390_DATA
+		DDRSS_PHY_1391_DATA
+		DDRSS_PHY_1392_DATA
+		DDRSS_PHY_1393_DATA
+		DDRSS_PHY_1394_DATA
+		DDRSS_PHY_1395_DATA
+		DDRSS_PHY_1396_DATA
+		DDRSS_PHY_1397_DATA
+		DDRSS_PHY_1398_DATA
+		DDRSS_PHY_1399_DATA
+		DDRSS_PHY_1400_DATA
+		DDRSS_PHY_1401_DATA
+		DDRSS_PHY_1402_DATA
+		DDRSS_PHY_1403_DATA
+		DDRSS_PHY_1404_DATA
+		DDRSS_PHY_1405_DATA
+		DDRSS_PHY_1406_DATA
+		DDRSS_PHY_1407_DATA
+		DDRSS_PHY_1408_DATA
+		DDRSS_PHY_1409_DATA
+		DDRSS_PHY_1410_DATA
+		DDRSS_PHY_1411_DATA
+		DDRSS_PHY_1412_DATA
+		DDRSS_PHY_1413_DATA
+		DDRSS_PHY_1414_DATA
+		DDRSS_PHY_1415_DATA
+		DDRSS_PHY_1416_DATA
+		DDRSS_PHY_1417_DATA
+		DDRSS_PHY_1418_DATA
+		DDRSS_PHY_1419_DATA
+		DDRSS_PHY_1420_DATA
+		DDRSS_PHY_1421_DATA
+		DDRSS_PHY_1422_DATA
+	>;
+};
diff --git a/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt b/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt
new file mode 100644
index 00000000000..792560a323a
--- /dev/null
+++ b/doc/device-tree-bindings/memory-controllers/k3-am654-ddrss.txt
@@ -0,0 +1,46 @@
+Texas Instruments' K3 AM654 DDRSS
+=================================
+
+K3 based AM654 devices has DDR memory subsystem that comprises
+Synopys DDR controller, Synopsis DDR phy and wrapper logic to
+integrate these blocks into the device. This DDR subsystem
+provides an interface to external SDRAM devices. This DDRSS driver
+adds support for the initialization of the external SDRAM devices by
+configuring the DDRSS registers and using the buitin PHY
+initialization routines.
+
+DDRSS device node:
+==================
+Required properties:
+--------------------
+- compatible:		Shall be: "ti,am654-ddrss"
+- reg-names		ss - Map the sub system wrapper logic region
+			ctl - Map the controller region
+			phy - Map the PHY region
+- reg:			Contains the register map per reg-names.
+- power-domains:	Should contain a phandle to a PM domain provider node
+			and an args specifier containing the DDRSS device id
+			value. This property is as per the binding,
+			doc/device-tree-bindings/power/ti,sci-pm-domain.txt
+- clocks:		Must contain an entry for enabling DDR clock. Should
+			be defined as per the appropriate clock bindings consumer
+			usage in doc/device-tree-bindings/clock/ti,sci-clk.txt
+
+
+Optional Properties:
+--------------------
+- clock-frequency:	Frequency at which DDR pll should be locked.
+			If not provided, default frequency will be used.
+
+Example (AM65x):
+================
+		memory-controller: memory-controller@298e000 {
+			compatible = "ti,am654-ddrss";
+			reg = <0x0298e000 0x200>,
+				<0x02980000 0x4000>,
+				<0x02988000 0x2000>;
+			reg-names = "ss", "ctl", "phy";
+			clocks = <&k3_clks 20 0>;
+			power-domains = <&k3_pds 20>;
+			bootph-pre-ram;
+		};
diff --git a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
new file mode 100644
index 00000000000..e6ea8d0ef54
--- /dev/null
+++ b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
@@ -0,0 +1,298 @@
+ST,stm32mp1 DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL and DDRPHYC)
+
+--------------------
+Required properties:
+--------------------
+- compatible	: Should be "st,stm32mp1-ddr" for STM32MP15x
+		  Should be "st,stm32mp13-ddr" for STM32MP13x
+- reg		: controleur (DDRCTRL) and phy (DDRPHYC) base address
+- clocks	: controller clocks handle
+- clock-names	: associated controller clock names
+		  the "ddrphyc" clock is used to check the DDR frequency
+		  at phy level according the expected value in "mem-speed" field
+
+the next attributes are DDR parameters, they are generated by DDR tools
+included in STM32 Cube tool
+
+They are required only in SPL, when TFABOOT is not activated.
+
+info attributes:
+----------------
+- st,mem-name	: name for DDR configuration, simple string for information
+- st,mem-speed	: DDR expected speed for the setting in kHz
+- st,mem-size	: DDR mem size in byte
+
+
+controlleur attributes:
+-----------------------
+- st,ctl-reg	: controleur values depending of the DDR type
+		  (DDR3/LPDDR2/LPDDR3)
+	for STM32MP15x and STM32MP13x: 25 values are requested in this order
+		MSTR
+		MRCTRL0
+		MRCTRL1
+		DERATEEN
+		DERATEINT
+		PWRCTL
+		PWRTMG
+		HWLPCTL
+		RFSHCTL0
+		RFSHCTL3
+		CRCPARCTL0
+		ZQCTL0
+		DFITMG0
+		DFITMG1
+		DFILPCFG0
+		DFIUPD0
+		DFIUPD1
+		DFIUPD2
+		DFIPHYMSTR
+		ODTMAP
+		DBG0
+		DBG1
+		DBGCMD
+		POISONCFG
+		PCCFG
+
+- st,ctl-timing	: controleur values depending of frequency and timing parameter
+		  of DDR
+	for STM32MP15x and STM32MP13x: 12 values are requested in this order
+		RFSHTMG
+		DRAMTMG0
+		DRAMTMG1
+		DRAMTMG2
+		DRAMTMG3
+		DRAMTMG4
+		DRAMTMG5
+		DRAMTMG6
+		DRAMTMG7
+		DRAMTMG8
+		DRAMTMG14
+		ODTCFG
+
+- st,ctl-map	: controleur values depending of address mapping
+	for STM32MP15x and STM32MP13x: 9 values are requested in this order
+		ADDRMAP1
+		ADDRMAP2
+		ADDRMAP3
+		ADDRMAP4
+		ADDRMAP5
+		ADDRMAP6
+		ADDRMAP9
+		ADDRMAP10
+		ADDRMAP11
+
+- st,ctl-perf	: controleur values depending of performance and scheduling
+	for STM32MP15x: 17 values are requested in this order
+		SCHED
+		SCHED1
+		PERFHPR1
+		PERFLPR1
+		PERFWR1
+		PCFGR_0
+		PCFGW_0
+		PCFGQOS0_0
+		PCFGQOS1_0
+		PCFGWQOS0_0
+		PCFGWQOS1_0
+		PCFGR_1
+		PCFGW_1
+		PCFGQOS0_1
+		PCFGQOS1_1
+		PCFGWQOS0_1
+		PCFGWQOS1_1
+
+	for STM32MP13x: 11 values are requested in this order
+		SCHED
+		SCHED1
+		PERFHPR1
+		PERFLPR1
+		PERFWR1
+		PCFGR_0
+		PCFGW_0
+		PCFGQOS0_0
+		PCFGQOS1_0
+		PCFGWQOS0_0
+		PCFGWQOS1_0
+
+phyc attributes:
+----------------
+- st,phy-reg	: phy values depending of the DDR type (DDR3/LPDDR2/LPDDR3)
+	for STM32MP15x: 11 values are requested in this order
+		PGCR
+		ACIOCR
+		DXCCR
+		DSGCR
+		DCR
+		ODTCR
+		ZQ0CR1
+		DX0GCR
+		DX1GCR
+		DX2GCR
+		DX3GCR
+
+	for STM32MP13x: 9 values are requested in this order
+		PGCR
+		ACIOCR
+		DXCCR
+		DSGCR
+		DCR
+		ODTCR
+		ZQ0CR1
+		DX0GCR
+		DX1GCR
+
+- st,phy-timing	: phy values depending of frequency and timing parameter of DDR
+	for STM32MP15x and STM32MP13x: 10 values are requested in this order
+		PTR0
+		PTR1
+		PTR2
+		DTPR0
+		DTPR1
+		DTPR2
+		MR0
+		MR1
+		MR2
+		MR3
+
+	for STM32MP13x: 6 values are requested in this order
+		DX0DLLCR
+		DX0DQTR
+		DX0DQSTR
+		DX1DLLCR
+		DX1DQTR
+		DX1DQSTR
+Example:
+
+/ {
+	soc {
+		ddr: ddr@0x5A003000{
+			compatible = "st,stm32mp1-ddr";
+
+			reg = <0x5A003000 0x550
+			       0x5A004000 0x234>;
+
+			clocks = <&rcc_clk AXIDCG>,
+				 <&rcc_clk DDRC1>,
+				 <&rcc_clk DDRC2>,
+				 <&rcc_clk DDRPHYC>,
+				 <&rcc_clk DDRCAPB>,
+				 <&rcc_clk DDRPHYCAPB>;
+
+			clock-names = "axidcg",
+				      "ddrc1",
+				      "ddrc2",
+				      "ddrphyc",
+				      "ddrcapb",
+				      "ddrphycapb";
+
+			st,mem-name = "DDR3 2x4Gb 533MHz";
+			st,mem-speed = <533000>;
+			st,mem-size = <0x40000000>;
+
+			st,ctl-reg = <
+				0x00040401 /*MSTR*/
+				0x00000010 /*MRCTRL0*/
+				0x00000000 /*MRCTRL1*/
+				0x00000000 /*DERATEEN*/
+				0x00800000 /*DERATEINT*/
+				0x00000000 /*PWRCTL*/
+				0x00400010 /*PWRTMG*/
+				0x00000000 /*HWLPCTL*/
+				0x00210000 /*RFSHCTL0*/
+				0x00000000 /*RFSHCTL3*/
+				0x00000000 /*CRCPARCTL0*/
+				0xC2000040 /*ZQCTL0*/
+				0x02050105 /*DFITMG0*/
+				0x00000202 /*DFITMG1*/
+				0x07000000 /*DFILPCFG0*/
+				0xC0400003 /*DFIUPD0*/
+				0x00000000 /*DFIUPD1*/
+				0x00000000 /*DFIUPD2*/
+				0x00000000 /*DFIPHYMSTR*/
+				0x00000001 /*ODTMAP*/
+				0x00000000 /*DBG0*/
+				0x00000000 /*DBG1*/
+				0x00000000 /*DBGCMD*/
+				0x00000000 /*POISONCFG*/
+				0x00000010 /*PCCFG*/
+			>;
+
+			st,ctl-timing = <
+				0x0080008A /*RFSHTMG*/
+				0x121B2414 /*DRAMTMG0*/
+				0x000D041B /*DRAMTMG1*/
+				0x0607080E /*DRAMTMG2*/
+				0x0050400C /*DRAMTMG3*/
+				0x07040407 /*DRAMTMG4*/
+				0x06060303 /*DRAMTMG5*/
+				0x02020002 /*DRAMTMG6*/
+				0x00000202 /*DRAMTMG7*/
+				0x00001005 /*DRAMTMG8*/
+				0x000D041B /*DRAMTMG1*/4
+				0x06000600 /*ODTCFG*/
+			>;
+
+			st,ctl-map = <
+				0x00080808 /*ADDRMAP1*/
+				0x00000000 /*ADDRMAP2*/
+				0x00000000 /*ADDRMAP3*/
+				0x00001F1F /*ADDRMAP4*/
+				0x07070707 /*ADDRMAP5*/
+				0x0F070707 /*ADDRMAP6*/
+				0x00000000 /*ADDRMAP9*/
+				0x00000000 /*ADDRMAP10*/
+				0x00000000 /*ADDRMAP11*/
+			>;
+
+			st,ctl-perf = <
+				0x00001201 /*SCHED*/
+				0x00001201 /*SCHED*/1
+				0x01000001 /*PERFHPR1*/
+				0x08000200 /*PERFLPR1*/
+				0x08000400 /*PERFWR1*/
+				0x00010000 /*PCFGR_0*/
+				0x00000000 /*PCFGW_0*/
+				0x02100B03 /*PCFGQOS0_0*/
+				0x00800100 /*PCFGQOS1_0*/
+				0x01100B03 /*PCFGWQOS0_0*/
+				0x01000200 /*PCFGWQOS1_0*/
+				0x00010000 /*PCFGR_1*/
+				0x00000000 /*PCFGW_1*/
+				0x02100B03 /*PCFGQOS0_1*/
+				0x00800000 /*PCFGQOS1_1*/
+				0x01100B03 /*PCFGWQOS0_1*/
+				0x01000200 /*PCFGWQOS1_1*/
+			>;
+
+			st,phy-reg = <
+				0x01442E02 /*PGCR*/
+				0x10400812 /*ACIOCR*/
+				0x00000C40 /*DXCCR*/
+				0xF200001F /*DSGCR*/
+				0x0000000B /*DCR*/
+				0x00010000 /*ODTCR*/
+				0x0000007B /*ZQ0CR1*/
+				0x0000CE81 /*DX0GCR*/
+				0x0000CE81 /*DX1GCR*/
+				0x0000CE81 /*DX2GCR*/
+				0x0000CE81 /*DX3GCR*/
+			>;
+
+			st,phy-timing = <
+				0x0022A41B /*PTR0*/
+				0x047C0740 /*PTR1*/
+				0x042D9C80 /*PTR2*/
+				0x369477D0 /*DTPR0*/
+				0x098A00D8 /*DTPR1*/
+				0x10023600 /*DTPR2*/
+				0x00000830 /*MR0*/
+				0x00000000 /*MR1*/
+				0x00000208 /*MR2*/
+				0x00000000 /*MR3*/
+			>;
+
+			status = "okay";
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/memory/memory.txt b/doc/device-tree-bindings/memory/memory.txt
new file mode 100644
index 00000000000..321894e01d9
--- /dev/null
+++ b/doc/device-tree-bindings/memory/memory.txt
@@ -0,0 +1,67 @@
+* Memory binding
+
+The memory binding for U-Boot is as in the ePAPR with the following additions:
+
+Optional subnodes can be used defining the memory layout for different board
+ID masks. To match a set of board ids, a board-id node may define match-mask
+and match-value ints to define a mask to apply to the board id, and the value
+that the result should have for the match to be considered valid. The mask
+defaults to -1, meaning that the value must fully match the board id.
+
+If subnodes are present, then the /memory node must define these properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+
+Each subnode must define
+
+ reg - board ID or mask for this subnode
+ memory-banks - list of memory banks in the same format as normal
+
+Each subnode may optionally define:
+
+ match-mask - A mask to apply to the board id.  This must be accompanied by
+              match-value.
+ match-value - The required resulting value of the board id mask for the given
+	       node to be considered a match.
+ auto-size - Indicates that the value given for a bank is the maximum size,
+	     each bank is probed to determine its actual size, which may be
+	     smaller
+
+
+The board id determination is up to the vendor and is not defined by this
+binding.
+
+Example:
+
+memory {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	reg = <0x20000000 0x20000000
+		0x40000000 0x20000000
+		0x60000000 0x20000000
+		0x80000000 0x20000000>;
+	auto-size;
+	board-id@0 {
+		match-value = <17>;
+		reg = <0x20000000 0x20000000
+			0x40000000 0x20000000>;
+	};
+	board-id@1 {
+		match-mask = <2>;
+		match-value = <2>;
+		reg = <0x20000000 0x20000000
+			0x40000000 0x20000000
+			0x60000000 0x20000000
+			0x80000000 0x20000000
+			0xa0000000 0x20000000
+			0xc0000000 0x20000000
+			0xe0000000 0x20000000>;
+	};
+};
+
+
+This shows a system with the following properties:
+* Default of 2GB of memory, auto-sized, so could be smaller
+* 3.5GB of memory (with no auto-size) if (board id & 2) is 2
+* 1GB of memory (with no auto-size) if board id is 17.
diff --git a/doc/device-tree-bindings/memory/ti,gpmc-child.yaml b/doc/device-tree-bindings/memory/ti,gpmc-child.yaml
new file mode 100644
index 00000000000..8e541acdb1f
--- /dev/null
+++ b/doc/device-tree-bindings/memory/ti,gpmc-child.yaml
@@ -0,0 +1,252 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: device tree bindings for children of the Texas Instruments GPMC
+
+maintainers:
+  - Tony Lindgren <tony@atomide.com>
+  - Roger Quadros <rogerq@kernel.org>
+
+description:
+  This binding is meant for the child nodes of the GPMC node. The node
+  represents any device connected to the GPMC bus. It may be a Flash chip,
+  RAM chip or Ethernet controller, etc. These properties are meant for
+  configuring the GPMC settings/timings and will accompany the bindings
+  supported by the respective device.
+
+properties:
+  reg: true
+
+# GPMC Timing properties for child nodes. All are optional and default to 0.
+  gpmc,sync-clk-ps:
+    description: Minimum clock period for synchronous mode
+    default: 0
+
+# Chip-select signal timings corresponding to GPMC_CONFIG2:
+  gpmc,cs-on-ns:
+    description: Assertion time
+    default: 0
+
+  gpmc,cs-rd-off-ns:
+    description: Read deassertion time
+    default: 0
+
+  gpmc,cs-wr-off-ns:
+    description: Write deassertion time
+    default: 0
+
+# ADV signal timings corresponding to GPMC_CONFIG3:
+  gpmc,adv-on-ns:
+    description: Assertion time
+    default: 0
+
+  gpmc,adv-rd-off-ns:
+    description: Read deassertion time
+    default: 0
+
+  gpmc,adv-wr-off-ns:
+    description: Write deassertion time
+    default: 0
+
+  gpmc,adv-aad-mux-on-ns:
+    description: Assertion time for AAD
+    default: 0
+
+  gpmc,adv-aad-mux-rd-off-ns:
+    description: Read deassertion time for AAD
+    default: 0
+
+  gpmc,adv-aad-mux-wr-off-ns:
+    description: Write deassertion time for AAD
+    default: 0
+
+# WE signals timings corresponding to GPMC_CONFIG4:
+  gpmc,we-on-ns:
+    description: Assertion time
+    default: 0
+
+  gpmc,we-off-ns:
+    description: Deassertion time
+    default: 0
+
+# OE signals timings corresponding to GPMC_CONFIG4:
+  gpmc,oe-on-ns:
+    description: Assertion time
+    default: 0
+
+  gpmc,oe-off-ns:
+    description: Deassertion time
+    default: 0
+
+  gpmc,oe-aad-mux-on-ns:
+    description: Assertion time for AAD
+    default: 0
+
+  gpmc,oe-aad-mux-off-ns:
+    description: Deassertion time for AAD
+    default: 0
+
+# Access time and cycle time timings (in nanoseconds) corresponding to
+# GPMC_CONFIG5:
+  gpmc,page-burst-access-ns:
+    description: Multiple access word delay
+    default: 0
+
+  gpmc,access-ns:
+    description: Start-cycle to first data valid delay
+    default: 0
+
+  gpmc,rd-cycle-ns:
+    description: Total read cycle time
+    default: 0
+
+  gpmc,wr-cycle-ns:
+    description: Total write cycle time
+    default: 0
+
+  gpmc,bus-turnaround-ns:
+    description: Turn-around time between successive accesses
+    default: 0
+
+  gpmc,cycle2cycle-delay-ns:
+    description: Delay between chip-select pulses
+    default: 0
+
+  gpmc,clk-activation-ns:
+    description: GPMC clock activation time
+    default: 0
+
+  gpmc,wait-monitoring-ns:
+    description: Start of wait monitoring with regard to valid data
+    default: 0
+
+# Boolean timing parameters. If property is present, parameter is enabled
+# otherwise disabled.
+  gpmc,adv-extra-delay:
+    description: ADV signal is delayed by half GPMC clock
+    type: boolean
+
+  gpmc,cs-extra-delay:
+    description: CS signal is delayed by half GPMC clock
+    type: boolean
+
+  gpmc,cycle2cycle-diffcsen:
+    description: |
+      Add "cycle2cycle-delay" between successive accesses
+      to a different CS
+    type: boolean
+
+  gpmc,cycle2cycle-samecsen:
+    description: |
+      Add "cycle2cycle-delay" between successive accesses
+      to the same CS
+    type: boolean
+
+  gpmc,oe-extra-delay:
+    description: OE signal is delayed by half GPMC clock
+    type: boolean
+
+  gpmc,we-extra-delay:
+    description: WE signal is delayed by half GPMC clock
+    type: boolean
+
+  gpmc,time-para-granularity:
+    description: Multiply all access times by 2
+    type: boolean
+
+# The following two properties are applicable only to OMAP3+ and AM335x:
+  gpmc,wr-access-ns:
+    description: |
+      In synchronous write mode, for single or
+      burst accesses, defines the number of
+      GPMC_FCLK cycles from start access time
+      to the GPMC_CLK rising edge used by the
+      memory device for the first data capture.
+    default: 0
+
+  gpmc,wr-data-mux-bus-ns:
+    description: |
+      In address-data multiplex mode, specifies
+      the time when the first data is driven on
+      the address-data bus.
+    default: 0
+
+# GPMC chip-select settings properties for child nodes. All are optional.
+  gpmc,burst-length:
+    description: Page/burst length.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [0, 4, 8, 16]
+    default: 0
+
+  gpmc,burst-wrap:
+    description: Enables wrap bursting
+    type: boolean
+
+  gpmc,burst-read:
+    description: Enables read page/burst mode
+    type: boolean
+
+  gpmc,burst-write:
+    description: Enables write page/burst mode
+    type: boolean
+
+  gpmc,device-width:
+    description: |
+      Total width of device(s) connected to a GPMC
+      chip-select in bytes. The GPMC supports 8-bit
+      and 16-bit devices and so this property must be
+      1 or 2.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [1, 2]
+    default: 1
+
+  gpmc,mux-add-data:
+    description: |
+      Address and data multiplexing configuration.
+      Valid values are
+      0 for Non multiplexed mode
+      1 for address-address-data multiplexing mode and
+      2 for address-data multiplexing mode.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [0, 1, 2]
+
+  gpmc,sync-read:
+    description: |
+      Enables synchronous read. Defaults to asynchronous
+      is this is not set.
+    type: boolean
+
+  gpmc,sync-write:
+    description: |
+      Enables synchronous writes. Defaults to asynchronous
+      is this is not set.
+    type: boolean
+
+  gpmc,wait-pin:
+    description: |
+      Wait-pin used by client. Must be less than "gpmc,num-waitpins".
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  gpmc,wait-pin-polarity:
+    description: |
+      Set the desired polarity for the selected wait pin.
+      0 for active low, 1 for active high.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [0, 1]
+
+  gpmc,wait-on-read:
+    description: Enables wait monitoring on reads.
+    type: boolean
+
+  gpmc,wait-on-write:
+    description: Enables wait monitoring on writes.
+    type: boolean
+
+required:
+  - reg
+
+# the GPMC child will have its own native properties
+additionalProperties: true
diff --git a/doc/device-tree-bindings/memory/ti,gpmc.yaml b/doc/device-tree-bindings/memory/ti,gpmc.yaml
new file mode 100644
index 00000000000..e188a4bf755
--- /dev/null
+++ b/doc/device-tree-bindings/memory/ti,gpmc.yaml
@@ -0,0 +1,190 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments GPMC Memory Controller device-tree bindings
+
+maintainers:
+  - Tony Lindgren <tony@atomide.com>
+  - Roger Quadros <rogerq@kernel.org>
+
+description:
+  The GPMC is a unified memory controller dedicated for interfacing
+  with external memory devices like
+  - Asynchronous SRAM-like memories and ASICs
+  - Asynchronous, synchronous, and page mode burst NOR flash
+  - NAND flash
+  - Pseudo-SRAM devices
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - ti,am3352-gpmc
+          - ti,am64-gpmc
+          - ti,omap2420-gpmc
+          - ti,omap2430-gpmc
+          - ti,omap3430-gpmc
+          - ti,omap4430-gpmc
+
+  reg:
+    minItems: 1
+    maxItems: 2
+
+  reg-names:
+    items:
+      - const: cfg
+      - const: data
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+    description: |
+      Functional clock. Used for bus timing calculations and
+      GPMC configuration.
+
+  clock-names:
+    items:
+      - const: fck
+
+  power-domains:
+    maxItems: 1
+
+  dmas:
+    items:
+      - description: DMA channel for GPMC NAND prefetch
+
+  dma-names:
+    items:
+      - const: rxtx
+
+  "#address-cells": true
+
+  "#size-cells": true
+
+  gpmc,num-cs:
+    description: maximum number of supported chip-select lines.
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  gpmc,num-waitpins:
+    description: maximum number of supported wait pins.
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  ranges:
+    minItems: 1
+    description: |
+      Must be set up to reflect the memory layout with four
+      integer values for each chip-select line in use,
+      <cs-number> 0 <physical address of mapping> <size>
+    items:
+      - description: NAND bank 0
+      - description: NOR/SRAM bank 0
+      - description: NOR/SRAM bank 1
+
+  '#interrupt-cells':
+    const: 2
+
+  interrupt-controller:
+    description: |
+      The GPMC driver implements and interrupt controller for
+      the NAND events "fifoevent" and "termcount" plus the
+      rising/falling edges on the GPMC_WAIT pins.
+      The interrupt number mapping is as follows
+      0 - NAND_fifoevent
+      1 - NAND_termcount
+      2 - GPMC_WAIT0 pin edge
+      3 - GPMC_WAIT1 pin edge, and so on.
+
+  '#gpio-cells':
+    const: 2
+
+  gpio-controller:
+    description: |
+      The GPMC driver implements a GPIO controller for the
+      GPMC WAIT pins that can be used as general purpose inputs.
+      0 maps to GPMC_WAIT0 pin.
+
+  ti,hwmods:
+    description:
+      Name of the HWMOD associated with GPMC. This is for legacy
+      omap2/3 platforms only.
+    $ref: /schemas/types.yaml#/definitions/string
+    deprecated: true
+
+  ti,no-idle-on-init:
+    description:
+      Prevent idling the module at init. This is for legacy omap2/3
+      platforms only.
+    type: boolean
+    deprecated: true
+
+patternProperties:
+  "@[0-7],[a-f0-9]+$":
+    type: object
+    description: |
+      The child device node represents the device connected to the GPMC
+      bus. The device can be a NAND chip, SRAM device, NOR device
+      or an ASIC.
+    $ref: "ti,gpmc-child.yaml"
+
+
+required:
+  - compatible
+  - reg
+  - gpmc,num-cs
+  - gpmc,num-waitpins
+  - "#address-cells"
+  - "#size-cells"
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: ti,am64-gpmc
+    then:
+      required:
+        - reg-names
+        - power-domains
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/gpio/gpio.h>
+
+    gpmc: memory-controller@50000000 {
+      compatible = "ti,am3352-gpmc";
+      reg = <0x50000000 0x2000>;
+      interrupts = <100>;
+      clocks = <&l3s_clkctrl>;
+      clock-names = "fck";
+      dmas = <&edma 52 0>;
+      dma-names = "rxtx";
+      gpmc,num-cs = <8>;
+      gpmc,num-waitpins = <2>;
+      #address-cells = <2>;
+      #size-cells = <1>;
+      ranges = <0 0 0x08000000 0x10000000>; /* CS0 @addr 0x8000000, size 0x10000000 */
+      interrupt-controller;
+      #interrupt-cells = <2>;
+      gpio-controller;
+      #gpio-cells = <2>;
+
+      nand@0,0 {
+        compatible = "ti,omap2-nand";
+        reg = <0 0 4>;
+        interrupt-parent = <&gpmc>;
+        interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+                     <1 IRQ_TYPE_NONE>; /* termcount */
+        ti,nand-xfer-type = "prefetch-dma";
+        ti,nand-ecc-opt = "bch16";
+        ti,elm-id = <&elm>;
+        rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
+      };
+    };
diff --git a/doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt b/doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
new file mode 100644
index 00000000000..e48b164fc09
--- /dev/null
+++ b/doc/device-tree-bindings/mfd/canaan,k210-sysctl.txt
@@ -0,0 +1,33 @@
+Kendryte K210 Sysctl
+
+This binding describes the K210 sysctl device, which contains many miscellaneous
+registers controlling system functionality. This node is a register map and can
+be reference by other bindings which need a phandle to the K210 sysctl regmap.
+
+Required properties:
+- compatible: should be
+	"canaan,k210-sysctl", "syscon", "simple-mfd"
+- reg: address and length of the sysctl registers
+- reg-io-width: must be <4>
+
+Clock sub-node
+
+This node is a binding for the clock tree driver
+
+Required properties:
+- compatible: should be "canaan,k210-clk"
+- clocks: phandle to the "in0" external oscillator
+- #clock-cells: must be <1>
+
+Example:
+sysctl: syscon@50440000 {
+	compatible = "canaan,k210-sysctl", "syscon", "simple-mfd";
+	reg = <0x50440000 0x100>;
+	reg-io-width = <4>;
+
+	sysclk: clock-controller {
+		compatible = "canaan,k210-clk";
+		clocks = <&in0>;
+		#clock-cells = <1>;
+	};
+};
diff --git a/doc/device-tree-bindings/misc/altera_sysid.txt b/doc/device-tree-bindings/misc/altera_sysid.txt
new file mode 100644
index 00000000000..54462eb5ef8
--- /dev/null
+++ b/doc/device-tree-bindings/misc/altera_sysid.txt
@@ -0,0 +1,4 @@
+Altera sysid
+
+Required properties:
+- compatible : should be "altr,sysid-1.0"
diff --git a/doc/device-tree-bindings/misc/atsha204.txt b/doc/device-tree-bindings/misc/atsha204.txt
new file mode 100644
index 00000000000..3adc12112f5
--- /dev/null
+++ b/doc/device-tree-bindings/misc/atsha204.txt
@@ -0,0 +1,4 @@
+Atmel ATSHA204 and ATSHA204A i2c h/w symmetric crypto module
+
+Required properties:
+- compatible : should be "atmel,atsha204" or "atmel,atsha204a"
diff --git a/doc/device-tree-bindings/misc/bootcounter.txt b/doc/device-tree-bindings/misc/bootcounter.txt
new file mode 100644
index 00000000000..d32fbc37b2e
--- /dev/null
+++ b/doc/device-tree-bindings/misc/bootcounter.txt
@@ -0,0 +1,21 @@
+U-Boot bootcounter Devicetree Binding
+=====================================
+
+The device tree node describes the U-Boot bootcounter
+memory based device binding.
+
+Required properties :
+
+- compatible : "u-boot,bootcount";
+- single-word : set this, if you have only one word space
+    for storing the bootcounter.
+
+Example
+-------
+
+MPC83xx based board:
+
+bootcount@0x13ff8 {
+	compatible = "u-boot,bootcount";
+	reg = <0x13ff8 0x08>;
+};
diff --git a/doc/device-tree-bindings/misc/cros-ec.txt b/doc/device-tree-bindings/misc/cros-ec.txt
new file mode 100644
index 00000000000..07ea7cdeac1
--- /dev/null
+++ b/doc/device-tree-bindings/misc/cros-ec.txt
@@ -0,0 +1,38 @@
+Chrome OS CROS_EC Binding
+======================
+
+The device tree node which describes the operation of the CROS_EC interface
+is as follows:
+
+Required properties :
+- compatible = "google,cros-ec"
+
+Optional properties :
+- spi-max-frequency : Sets the maximum frequency (in Hz) for SPI bus
+   operation
+- i2c-max-frequency : Sets the maximum frequency (in Hz) for I2C bus
+   operation
+- ec-interrupt : Selects the EC interrupt, defined as a GPIO according
+   to the platform
+- optimise-flash-write : Boolean property - if present then flash blocks
+   containing all 0xff will not be written, since we assume that the EC
+   uses that pattern for erased blocks
+
+The CROS_EC node should appear as a subnode of the interrupt that connects it
+to the EC (e.g. i2c, spi, lpc). The reg property (as usual) will indicate
+the unit address on that bus.
+
+
+Example
+=======
+
+	spi@131b0000 {
+		cros-ec@0 {
+			reg = <0>;
+			compatible = "google,cros-ec";
+			spi-max-frequency = <5000000>;
+			ec-interrupt = <&gpio 174 1>;
+			optimise-flash-write;
+			status = "disabled";
+		};
+	};
diff --git a/doc/device-tree-bindings/misc/esm-pmic.txt b/doc/device-tree-bindings/misc/esm-pmic.txt
new file mode 100644
index 00000000000..a60ad74679d
--- /dev/null
+++ b/doc/device-tree-bindings/misc/esm-pmic.txt
@@ -0,0 +1,19 @@
+PMIC ESM Binding
+======================
+
+Certain Power Management ICs contain safety handling logic within them,
+allowing automatic reset of the board in case a safety error is signaled.
+For this purpose, ESM (Error Signal Monitor) is implemented within
+the PMIC running its own state machine.
+
+Required properties :
+- compatible	: "ti,tps659413-esm"
+
+Example
+=======
+
+&tps659413a {
+	esm: esm {
+		compatible = "ti,tps659413-esm";
+	};
+};
diff --git a/doc/device-tree-bindings/misc/fs_loader.txt b/doc/device-tree-bindings/misc/fs_loader.txt
new file mode 100644
index 00000000000..542be4b25a0
--- /dev/null
+++ b/doc/device-tree-bindings/misc/fs_loader.txt
@@ -0,0 +1,48 @@
+* File system firmware loader
+
+Required properties:
+--------------------
+
+- compatible: should contain "u-boot,fs-loader"
+- phandlepart: which block storage device and partition the image loading from,
+	       this property is required for mmc, usb and sata. This is unsigned
+	       32-bit array. For example phandlepart=<&mmc_0 1>, meaning use
+	       that MMC0 node pointer, partition 1.
+- mdtpart: which partition of ubi the image loading from, this property is
+	   required for ubi and mounting.
+- ubivol: which volume of ubi the image loading from, this property is required
+	  for ubi and mounting.
+
+Example of storage device and partition search set for mmc, usb, sata and
+ubi in device tree source as shown in below:
+
+	Example of storage type and device partition search set for mmc, usb,
+	sata and ubi as shown in below:
+	Example for mmc:
+	fs_loader0: fs-loader@0 {
+		bootph-all;
+		compatible = "u-boot,fs-loader";
+		phandlepart = <&mmc_0 1>;
+	};
+
+	Example for usb:
+	fs_loader1: fs-loader@1 {
+		bootph-all;
+		compatible = "u-boot,fs-loader";
+		phandlepart = <&usb0 1>;
+	};
+
+	Example for sata:
+	fs_loader2: fs-loader@2 {
+		bootph-all;
+		compatible = "u-boot,fs-loader";
+		phandlepart = <&sata0 1>;
+	};
+
+	Example for ubi:
+	fs_loader3: fs-loader@3 {
+		bootph-all;
+		compatible = "u-boot,fs-loader";
+		mtdpart = "UBI",
+		ubivol = "ubi0";
+	};
diff --git a/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt
new file mode 100644
index 00000000000..929ae88c583
--- /dev/null
+++ b/doc/device-tree-bindings/misc/intel,baytrail-fsp.txt
@@ -0,0 +1,155 @@
+Intel Bay Trail FSP UPD Binding
+===============================
+
+The device tree node which describes the overriding of the Intel Bay Trail FSP
+UPD data for configuring the SoC.
+
+All properties can be found within the `upd-region` struct in
+arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in
+Intel's FSP Binary Configuration Tool for Bay Trail.  This list of properties
+is matched up to Intel's E3800 FSPv4 release.
+
+# Boolean properties:
+
+- fsp,enable-sdio
+- fsp,enable-sdcard
+- fsp,enable-hsuart0
+- fsp,enable-hsuart1
+- fsp,enable-spi
+- fsp,enable-sata
+- fsp,enable-azalia
+- fsp,enable-xhci
+- fsp,enable-dma0
+- fsp,enable-dma1
+- fsp,enable-i2-c0
+- fsp,enable-i2-c1
+- fsp,enable-i2-c2
+- fsp,enable-i2-c3
+- fsp,enable-i2-c4
+- fsp,enable-i2-c5
+- fsp,enable-i2-c6
+- fsp,enable-pwm0
+- fsp,enable-pwm1
+- fsp,enable-hsi
+- fsp,mrc-debug-msg
+- fsp,isp-enable
+- fsp,igd-render-standby
+- fsp,txe-uma-enable
+- fsp,emmc45-ddr50-enabled
+- fsp,emmc45-hs200-enabled
+- fsp,enable-igd
+- fsp,enable-memory-down
+
+If you set "fsp,enable-memory-down" you are strongly encouraged to provide an
+"fsp,memory-down-params{};" to specify how your memory is configured.  If you
+do not set "fsp,enable-memory-down", then the DIMM SPD information will be
+discovered by the FSP and used to setup main memory.
+
+
+# Integer properties:
+
+- fsp,mrc-init-tseg-size
+- fsp,mrc-init-mmio-size
+- fsp,mrc-init-spd-addr1
+- fsp,mrc-init-spd-addr2
+- fsp,emmc-boot-mode
+- fsp,sata-mode
+- fsp,lpe-mode
+- fsp,lpss-sio-mode
+- fsp,igd-dvmt50-pre-alloc
+- fsp,aperture-size
+- fsp,gtt-size
+- fsp,scc-mode
+- fsp,os-selection
+- fsp,emmc45-retune-timer-value
+
+- fsp,memory-down-params {
+
+	# Boolean properties:
+
+	- fsp,dimm-0-enable
+	- fsp,dimm-1-enable
+
+	# Integer properties:
+
+	- fsp,dram-speed
+	- fsp,dram-type
+	- fsp,dimm-width
+	- fsp,dimm-density
+	- fsp,dimm-bus-width
+	- fsp,dimm-sides
+	- fsp,dimm-tcl
+	- fsp,dimm-trpt-rcd
+	- fsp,dimm-twr
+	- fsp,dimm-twtr
+	- fsp,dimm-trrd
+	- fsp,dimm-trtp
+	- fsp,dimm-tfaw
+};
+
+For all integer properties, available options are listed in fsp_configs.h in
+arch/x86/include/asm/arch-baytrail/fsp directory (eg: MRC_INIT_TSEG_SIZE_1MB).
+
+
+Example (from MinnowMax Dual Core):
+-----------------------------------
+
+/ {
+	...
+
+	fsp {
+		compatible = "intel,baytrail-fsp";
+		fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
+		fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
+		fsp,mrc-init-spd-addr1 = <0xa0>;
+		fsp,mrc-init-spd-addr2 = <0xa2>;
+		fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
+		fsp,enable-sdio;
+		fsp,enable-sdcard;
+		fsp,enable-hsuart1;
+		fsp,enable-spi;
+		fsp,enable-sata;
+		fsp,sata-mode = <SATA_MODE_AHCI>;
+		fsp,lpe-mode = <LPE_MODE_PCI>;
+		fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
+		fsp,enable-dma0;
+		fsp,enable-dma1;
+		fsp,enable-i2c0;
+		fsp,enable-i2c1;
+		fsp,enable-i2c2;
+		fsp,enable-i2c3;
+		fsp,enable-i2c4;
+		fsp,enable-i2c5;
+		fsp,enable-i2c6;
+		fsp,enable-pwm0;
+		fsp,enable-pwm1;
+		fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
+		fsp,aperture-size = <APERTURE_SIZE_256MB>;
+		fsp,gtt-size = <GTT_SIZE_2MB>;
+		fsp,scc-mode = <SCC_MODE_PCI>;
+		fsp,os-selection = <OS_SELECTION_LINUX>;
+		fsp,emmc45-ddr50-enabled;
+		fsp,emmc45-retune-timer-value = <8>;
+		fsp,enable-igd;
+		fsp,enable-memory-down;
+		fsp,memory-down-params {
+			compatible = "intel,baytrail-fsp-mdp";
+			fsp,dram-speed = <DRAM_SPEED_1066MTS>;
+			fsp,dram-type = <DRAM_TYPE_DDR3L>;
+			fsp,dimm-0-enable;
+			fsp,dimm-width = <DIMM_WIDTH_X16>;
+			fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
+			fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
+			fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
+			fsp,dimm-tcl = <0xb>;
+			fsp,dimm-trpt-rcd = <0xb>;
+			fsp,dimm-twr = <0xc>;
+			fsp,dimm-twtr = <6>;
+			fsp,dimm-trrd = <6>;
+			fsp,dimm-trtp = <6>;
+			fsp,dimm-tfaw = <0x14>;
+		};
+	};
+
+	...
+};
diff --git a/doc/device-tree-bindings/misc/intel,irq-router.txt b/doc/device-tree-bindings/misc/intel,irq-router.txt
new file mode 100644
index 00000000000..09e97b4300a
--- /dev/null
+++ b/doc/device-tree-bindings/misc/intel,irq-router.txt
@@ -0,0 +1,61 @@
+Intel Interrupt Router Device Binding
+=====================================
+
+The device tree node which describes the operation of the Intel Interrupt Router
+device is as follows:
+
+Required properties :
+- reg : Specifies the interrupt router's PCI configuration space address as
+    defined by the Open Firmware spec.
+- compatible = "intel,irq-router"
+- intel,pirq-config : Specifies the IRQ routing register programming mechanism.
+    Valid values are:
+      "pci": IRQ routing is controlled by PCI configuration registers
+      "ibase": IRQ routing is in the memory-mapped IBASE register block
+- intel,ibase-offset : IBASE register offset in the interrupt router's PCI
+    configuration space, required only if intel,pirq-config = "ibase".
+- intel,actl-8bit : If ACTL (ACPI control) register width is 8-bit, this must
+    be specified. The 8-bit ACTL register is seen on ICH series chipset, like
+    ICH9/Panther Point/etc. On Atom chipset it is a 32-bit register.
+- intel,actl-addr : ACTL (ACPI control) register offset. ACTL can be either
+    in the interrupt router's PCI configuration space, or IBASE.
+- intel,pirq-link : Specifies the PIRQ link information with two cells. The
+    first cell is the register offset that controls the first PIRQ link routing.
+    The second cell is the total number of PIRQ links the router supports.
+- intel,pirq-regmap : Specifies PIRQ routing register offset of all PIRQ links,
+    encoded as 2 cells a group for each link. The first cell is the PIRQ link
+    number (0 for PIRQA, 1 for PIRQB, etc). The second cell is the PIRQ routing
+    register offset from the interrupt router's base address. If this property
+    is omitted, it indicates a consecutive register offset from the first PIRQ
+    link, as specified by the first cell of intel,pirq-link.
+- intel,pirq-mask : Specifies the IRQ mask representing the 16 IRQs in the
+    8259 PIC. Bit N is 1 means IRQ N is available to be routed.
+- intel,pirq-routing : Specifies all PCI devices' IRQ routing information,
+   encoded as 3 cells a group for a device. The first cell is the device's PCI
+   bus number, device number and function number encoding with PCI_BDF() macro.
+   The second cell is the PCI interrupt pin used by this device. The last cell
+   is which PIRQ line the PCI interrupt pin is routed to.
+
+
+Example
+-------
+
+#include <dt-bindings/interrupt-router/intel-irq.h>
+
+	irq-router@1f,0 {
+		reg = <0x0000f800 0 0 0 0>;
+		compatible = "intel,irq-router";
+		intel,pirq-config = "pci";
+		intel,pirq-link = <0x60 8>;
+		intel,pirq-mask = <0xdef8>;
+		intel,pirq-routing = <
+			PCI_BDF(0, 2, 0) INTA PIRQA
+			PCI_BDF(0, 3, 0) INTA PIRQB
+			PCI_BDF(0, 8, 0) INTA PIRQC
+			PCI_BDF(0, 8, 1) INTB PIRQD
+			PCI_BDF(1, 6, 0) INTA PIRQE
+			PCI_BDF(1, 6, 1) INTB PIRQF
+			PCI_BDF(1, 6, 2) INTC PIRQG
+			PCI_BDF(1, 6, 3) INTD PIRQH
+		>;
+	};
diff --git a/doc/device-tree-bindings/misc/intel-lpc.txt b/doc/device-tree-bindings/misc/intel-lpc.txt
new file mode 100644
index 00000000000..ba6ca9dbc7b
--- /dev/null
+++ b/doc/device-tree-bindings/misc/intel-lpc.txt
@@ -0,0 +1,64 @@
+Intel LPC Device Binding
+========================
+
+The device tree node which describes the operation of the Intel Low Pin
+Count device is as follows:
+
+Required properties :
+- compatible = "intel,lpc"
+- intel,alt-gp-smi-enable : Enable SMI sources. This cell is written to the
+    ALT_GP_SMI_EN register
+- intel,gen-dec : Specifies the values for the gen-dec registers. Up to four
+   cell pairs can be provided - the first of each pair is the base address and
+   the second is the size. These are written into the GENx_DEC registers of
+   the LPC device
+- intel,gpi-routing : Specifies the GPI routing. There are 16 cells, valid
+   values are:
+     0 No effect (default)
+     1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
+     2 SCI (if corresponding GPIO_EN bit is also set)
+- intel,pirq-routing : Speciffies the routing IRQ number for each of PIRQA-H,
+   one cell for each.
+     0x00 - 0000 = Reserved
+     0x01 - 0001 = Reserved
+     0x02 - 0010 = Reserved
+     0x03 - 0011 = IRQ3
+     0x04 - 0100 = IRQ4
+     0x05 - 0101 = IRQ5
+     0x06 - 0110 = IRQ6
+     0x07 - 0111 = IRQ7
+     0x08 - 1000 = Reserved
+     0x09 - 1001 = IRQ9
+     0x0A - 1010 = IRQ10
+     0x0B - 1011 = IRQ11
+     0x0C - 1100 = IRQ12
+     0x0D - 1101 = Reserved
+     0x0E - 1110 = IRQ14
+     0x0F - 1111 = IRQ15
+     PIRQ[n]_ROUT[7] - PIRQ Routing Control
+     0x80 - The PIRQ is not routed.
+
+
+Example
+-------
+
+lpc {
+	compatible = "intel,lpc";
+	#address-cells = <1>;
+	#size-cells = <1>;
+	intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
+
+	intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
+				0x80 0x80 0x80 0x80>;
+	/*
+		* GPI routing
+		* 0 No effect (default)
+		* 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is
+		*	also set)
+		* 2 SCI (if corresponding GPIO_EN bit is also set)
+		*/
+	intel,gpi-routing = <0 0 0 0 0 0 0 2
+				1 0 0 0 0 0 0 0>;
+	/* Enable EC SMI source */
+	intel,alt-gp-smi-enable = <0x0100>;
+};
diff --git a/doc/device-tree-bindings/misc/misc/fsl,mpc83xx-serdes.txt b/doc/device-tree-bindings/misc/misc/fsl,mpc83xx-serdes.txt
new file mode 100644
index 00000000000..64a9b5b154b
--- /dev/null
+++ b/doc/device-tree-bindings/misc/misc/fsl,mpc83xx-serdes.txt
@@ -0,0 +1,24 @@
+MPC83xx SerDes controller devices
+
+MPC83xx SoCs contain a built-in SerDes controller that determines which
+protocols (SATA, PCI Express, SGMII, ...) are used on the system's serdes lines
+and how the lines are configured.
+
+Required properties:
+- compatible: must be "fsl,mpc83xx-serdes"
+- reg: must point to the serdes controller's register map
+- proto: selects for which protocol the serdes lines are configured. One of
+  "sata", "pex", "pex-x2", "sgmii"
+- serdes-clk: determines the frequency the serdes lines are configured for. One
+  of 100, 125, 150.
+- vdd: determines whether 1.0V core VDD is used or not
+
+Example:
+
+SERDES: serdes@e3000 {
+	reg = <0xe3000 0x200>;
+	compatible = "fsl,mpc83xx-serdes";
+	proto = "pex";
+	serdes-clk = <100>;
+	vdd;
+};
diff --git a/doc/device-tree-bindings/misc/misc/gdsys,io-endpoint.txt b/doc/device-tree-bindings/misc/misc/gdsys,io-endpoint.txt
new file mode 100644
index 00000000000..db2ff8ca128
--- /dev/null
+++ b/doc/device-tree-bindings/misc/misc/gdsys,io-endpoint.txt
@@ -0,0 +1,20 @@
+gdsys IO endpoint of IHS FPGA devices
+
+The IO endpoint of IHS FPGA devices is a packet-based transmission interface
+that allows interconnected gdsys devices to send and receive data over the
+FPGA's main ethernet connection.
+
+Required properties:
+- compatible: must be "gdsys,io-endpoint"
+- reg: describes the address and length of the endpoint's register map (within
+  the FPGA's register space)
+
+Example:
+
+fpga0_ep0 {
+	compatible = "gdsys,io-endpoint";
+	reg = <0x020 0x10
+           0x320 0x10
+           0x340 0x10
+           0x360 0x10>;
+};
diff --git a/doc/device-tree-bindings/misc/misc/gdsys,iocon_fpga.txt b/doc/device-tree-bindings/misc/misc/gdsys,iocon_fpga.txt
new file mode 100644
index 00000000000..acd466fdc6d
--- /dev/null
+++ b/doc/device-tree-bindings/misc/misc/gdsys,iocon_fpga.txt
@@ -0,0 +1,19 @@
+gdsys IHS FPGA for CON devices
+
+The gdsys IHS FPGA is the main FPGA on gdsys CON devices. This driver provides
+support for enabling and starting the FPGA, as well as verifying working bus
+communication.
+
+Required properties:
+- compatible: must be "gdsys,iocon_fpga"
+- reset-gpios: List of GPIOs controlling the FPGA's reset
+- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
+              done
+
+Example:
+
+FPGA0 {
+	compatible = "gdsys,iocon_fpga";
+	reset-gpios = <&PPCPCA 26 0>;
+	done-gpios = <&GPIO_VB0 19 0>;
+};
diff --git a/doc/device-tree-bindings/misc/misc/gdsys,iocpu_fpga.txt b/doc/device-tree-bindings/misc/misc/gdsys,iocpu_fpga.txt
new file mode 100644
index 00000000000..819db22bf7d
--- /dev/null
+++ b/doc/device-tree-bindings/misc/misc/gdsys,iocpu_fpga.txt
@@ -0,0 +1,19 @@
+gdsys IHS FPGA for CPU devices
+
+The gdsys IHS FPGA is the main FPGA on gdsys CPU devices. This driver provides
+support for enabling and starting the FPGA, as well as verifying working bus
+communication.
+
+Required properties:
+- compatible: must be "gdsys,iocpu_fpga"
+- reset-gpios: List of GPIOs controlling the FPGA's reset
+- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
+              done
+
+Example:
+
+FPGA0 {
+	compatible = "gdsys,iocpu_fpga";
+	reset-gpios = <&PPCPCA 26 0>;
+	done-gpios = <&GPIO_VB0 19 0>;
+};
diff --git a/doc/device-tree-bindings/misc/misc/gdsys,soc.txt b/doc/device-tree-bindings/misc/misc/gdsys,soc.txt
new file mode 100644
index 00000000000..278e935b166
--- /dev/null
+++ b/doc/device-tree-bindings/misc/misc/gdsys,soc.txt
@@ -0,0 +1,16 @@
+gdsys soc bus driver
+
+This driver provides a simple interface for the busses associated with gdsys
+IHS FPGAs. The bus itself contains devices whose register maps are contained
+within the FPGA's register space.
+
+Required properties:
+- fpga: A phandle to the controlling IHS FPGA
+
+Example:
+
+FPGA0BUS: fpga0bus {
+	compatible = "gdsys,soc";
+	ranges = <0x0 0xe0600000 0x00004000>;
+	fpga = <&FPGA0>;
+};
diff --git a/doc/device-tree-bindings/misc/socfpga_dtreg.txt b/doc/device-tree-bindings/misc/socfpga_dtreg.txt
new file mode 100644
index 00000000000..cf40fdd2da8
--- /dev/null
+++ b/doc/device-tree-bindings/misc/socfpga_dtreg.txt
@@ -0,0 +1,80 @@
+* Firewall and privilege register settings in device tree
+
+Required properties:
+--------------------
+
+- compatible: should contain "intel,socfpga-dtreg"
+- reg: Physical base address and size of block register.
+- intel,offset-settings: 32-bit offset address of block register,
+			 followed by 32-bit value settings and
+			 the masking bits, only masking bit
+			 set to 1 allows modification.
+
+The device tree node which describes secure and privilege register access
+configuration in compile time.
+
+Most of these registers are expected to work except for the case which some
+registers configuration are required for granting access to some other
+registers, for example CCU registers have to be properly configured before
+allowing register configuration access to fpga2sdram firewall as shown in
+below example.
+
+Some registers depend on runtime data for proper configuration are expected
+to be part of driver that generating these data for example configuration for
+soc_noc_fw_ddr_mpu_inst_0_ddr_scr block register depend on DDR size parsed from
+memory device tree node.
+
+Please refer details of tested examples below for both fpga2sdram and QoS
+configuration with default reset value and the comments.
+
+Example:
+--------
+
+Configuration for multiple dtreg node support in device tree:
+
+	socfpga_dtreg0: socfpga-dtreg0 {
+		compatible = "intel,socfpga-dtreg";
+						#address-cells = <1>;
+                        #size-cells = <1>;
+		        bootph-all;
+
+                        coh_cpu0_bypass_OC_Firewall_main_Firewall@f7100200 {
+							reg = <0xf7100200 0x00000014>;
+                                intel,offset-settings =
+										/*
+										 * Disable ocram security at CCU for
+										 * non secure access
+										 */
+                                        <0x0000004 0x8000ffff 0xe007ffff>,
+                                        <0x0000008 0x8000ffff 0xe007ffff>,
+                                        <0x000000c 0x8000ffff 0xe007ffff>,
+                                        <0x0000010 0x8000ffff 0xe007ffff>;
+                                bootph-all;
+                        };
+					};
+
+	socfpga_dtreg1: socfpga-dtreg1 {
+		compatible = "intel,socfpga-dtreg";
+						#address-cells = <1>;
+                        #size-cells = <1>;
+						bootph-all;
+
+                        soc_noc_fw_mpfe_csr_inst_0_mpfe_scr@f8020000 {
+                                reg = <0xf8020000 0x0000001c>;
+                                intel,offset-settings =
+                                        /* Disable MPFE firewall for SMMU */
+                                        <0x00000000 0x00010101 0x00010101>,
+                                        /*
+										 * Disable MPFE firewall for HMC
+										 * adapter
+										 */
+                                        <0x00000004 0x00000001 0x00010101>;
+								bootph-all;
+                        };
+					};
+
+To call the nodes use:
+
+	ret = uclass_get_device_by_name(UCLASS_NOP, "socfpga-dtreg0", &dev);
+	ret = uclass_get_device_by_name(UCLASS_NOP, "socfpga-dtreg1", &dev);
+
diff --git a/doc/device-tree-bindings/misc/ti,j721e-esm.yaml b/doc/device-tree-bindings/misc/ti,j721e-esm.yaml
new file mode 100644
index 00000000000..0c9a8444844
--- /dev/null
+++ b/doc/device-tree-bindings/misc/ti,j721e-esm.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Texas Instruments Incorporated
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/ti,j721e-esm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments K3 ESM
+
+maintainers:
+  - Neha Malcom Francis <n-francis@ti.com>
+
+description:
+  The ESM (Error Signaling Module) is an IP block on TI K3 devices
+  that allows handling of safety events somewhat similar to what interrupt
+  controller would do. The safety signals have their separate paths within
+  the SoC, and they are handled by the ESM, which routes them to the proper
+  destination, which can be system reset, interrupt controller, etc. In the
+  simplest configuration the signals are just routed to reset the SoC.
+
+properties:
+  compatible:
+    const: ti,j721e-esm
+
+  reg:
+    maxItems: 1
+
+  ti,esm-pins:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description:
+      integer array of ESM interrupt pins to route to external event pin
+      which can be used to reset the SoC.
+    minItems: 1
+    maxItems: 255
+
+required:
+  - compatible
+  - reg
+  - ti,esm-pins
+
+additionalProperties: false
+
+examples:
+  - |
+    bus {
+        #address-cells = <2>;
+        #size-cells = <2>;
+        esm@700000 {
+            compatible = "ti,j721e-esm";
+            reg = <0x0 0x700000 0x0 0x1000>;
+            ti,esm-pins = <344>, <345>;
+        };
+    };
diff --git a/doc/device-tree-bindings/mmc/sandbox,mmc.txt b/doc/device-tree-bindings/mmc/sandbox,mmc.txt
new file mode 100644
index 00000000000..1170bcd6a00
--- /dev/null
+++ b/doc/device-tree-bindings/mmc/sandbox,mmc.txt
@@ -0,0 +1,18 @@
+Sandbox MMC
+===========
+
+Required properties:
+- compatible : "sandbox,mmc"
+
+Optional properties:
+- filename : Name of backing file, if any. This is mapped into the MMC device
+    so can be used to provide a filesystem or other test data
+
+
+Example
+-------
+
+mmc2 {
+	compatible = "sandbox,mmc";
+	non-removable;
+};
diff --git a/doc/device-tree-bindings/mmc/snps,dw-mmc.txt b/doc/device-tree-bindings/mmc/snps,dw-mmc.txt
new file mode 100644
index 00000000000..0c9e3ada5a3
--- /dev/null
+++ b/doc/device-tree-bindings/mmc/snps,dw-mmc.txt
@@ -0,0 +1,32 @@
+Synopsys Designware Mobile Storage Host Controller extensions
+used in Synopsys ARC devboards
+
+Required Properties:
+
+* compatible: should be - "snps,dw-mshc".
+* bus-width: number of data lines connected to the controller.
+* clocks: from common clock binding: handle to biu and ciu clocks for the
+  bus interface unit clock and the card interface unit clock.
+* clock-names: from common clock binding: Shall be "biu" and "ciu".
+
+Optional properties:
+
+* fifo-depth: The maximum size of the tx/rx fifo's. If this property is not
+  specified, the default value of the fifo size is determined from the
+  controller registers.
+* fifo-mode: Don't use DMA.
+* max-frequency: Maximum operating clock frequency, driver uses 'ciu' clock
+  frequency if it is not set.
+
+Example:
+
+mmc0@f000a000 {
+	compatible = "snps,dw-mshc";
+	reg = <0xf000a000 0x400>;
+
+	bus-width = <4>;
+	fifo-depth = <256>;
+	clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
+	clock-names = "biu", "ciu";
+	max-frequency = <25000000>;
+};
diff --git a/doc/device-tree-bindings/mtd/altera_qspi.txt b/doc/device-tree-bindings/mtd/altera_qspi.txt
new file mode 100644
index 00000000000..3361ac92a31
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/altera_qspi.txt
@@ -0,0 +1,35 @@
+Altera QUADSPI driver
+
+Required properties:
+- compatible: Should be "altr,quadspi-1.0"
+- reg: Address and length of the register set  for the device. It contains
+  the information of registers in the same order as described by reg-names
+- reg-names: Should contain the reg names
+  "avl_csr": Should contain the register configuration base address
+  "avl_mem": Should contain the data base address
+- #address-cells: Must be <1>.
+- #size-cells: Must be <0>.
+- flash device tree subnode, there must be a node with the following fields:
+	- compatible: Should contain the flash name:
+	  1. EPCS:   epcs16, epcs64, epcs128
+	  2. EPCQ:   epcq16, epcq32, epcq64, epcq128, epcq256, epcq512, epcq1024
+	  3. EPCQ-L: epcql256, epcql512, epcql1024
+	- #address-cells: please refer to /mtd/partition.txt
+	- #size-cells: please refer to /mtd/partition.txt
+	For partitions inside each flash, please refer to /mtd/partition.txt
+
+Example:
+
+	quadspi_controller_0: quadspi@0x180014a0 {
+		compatible = "altr,quadspi-1.0";
+		reg = <0x180014a0 0x00000020>,
+		      <0x14000000 0x04000000>;
+		reg-names = "avl_csr", "avl_mem";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		flash0: epcq512@0 {
+			compatible = "altr,epcq512";
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+	};
diff --git a/doc/device-tree-bindings/mtd/mtd-physmap.txt b/doc/device-tree-bindings/mtd/mtd-physmap.txt
new file mode 100644
index 00000000000..4b8c4894382
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/mtd-physmap.txt
@@ -0,0 +1,88 @@
+CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
+
+Flash chips (Memory Technology Devices) are often used for solid state
+file systems on embedded devices.
+
+ - compatible : should contain the specific model of mtd chip(s)
+   used, if known, followed by either "cfi-flash", "jedec-flash",
+   "mtd-ram" or "mtd-rom".
+ - reg : Address range(s) of the mtd chip(s)
+   It's possible to (optionally) define multiple "reg" tuples so that
+   non-identical chips can be described in one node.
+ - bank-width : Width (in bytes) of the bank.  Equal to the
+   device width times the number of interleaved chips.
+ - device-width : (optional) Width of a single mtd chip.  If
+   omitted, assumed to be equal to 'bank-width'.
+ - #address-cells, #size-cells : Must be present if the device has
+   sub-nodes representing partitions (see below).  In this case
+   both #address-cells and #size-cells must be equal to 1.
+ - no-unaligned-direct-access: boolean to disable the default direct
+   mapping of the flash.
+   On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause
+   problems with JFFS2 usage, as the local bus (LPB) doesn't support
+   unaligned accesses as implemented in the JFFS2 code via memcpy().
+   By defining "no-unaligned-direct-access", the flash will not be
+   exposed directly to the MTD users (e.g. JFFS2) any more.
+ - linux,mtd-name: allow to specify the mtd name for retro capability with
+   physmap-flash drivers as boot loader pass the mtd partition via the old
+   device name physmap-flash.
+ - use-advanced-sector-protection: boolean to enable support for the
+   advanced sector protection (Spansion: PPB - Persistent Protection
+   Bits) locking.
+
+For JEDEC compatible devices, the following additional properties
+are defined:
+
+ - vendor-id : Contains the flash chip's vendor id (1 byte).
+ - device-id : Contains the flash chip's device id (1 byte).
+
+For ROM compatible devices (and ROM fallback from cfi-flash), the following
+additional (optional) property is defined:
+
+ - erase-size : The chip's physical erase block size in bytes.
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. See partition.txt for more detail.
+
+Example:
+
+	flash@ff000000 {
+		compatible = "amd,am29lv128ml", "cfi-flash";
+		reg = <ff000000 01000000>;
+		bank-width = <4>;
+		device-width = <1>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		fs@0 {
+			label = "fs";
+			reg = <0 f80000>;
+		};
+		firmware@f80000 {
+			label ="firmware";
+			reg = <f80000 80000>;
+			read-only;
+		};
+	};
+
+Here an example with multiple "reg" tuples:
+
+	flash@f0000000,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "intel,pc48f4400p0vb", "cfi-flash";
+		reg = <0 0x00000000 0x02000000
+		       0 0x02000000 0x02000000>;
+		bank-width = <2>;
+		partition@0 {
+			label = "test-part1";
+			reg = <0 0x04000000>;
+		};
+	};
+
+An example using SRAM:
+
+	sram@2,0 {
+		compatible = "samsung,k6f1616u6a", "mtd-ram";
+		reg = <2 0 0x00200000>;
+		bank-width = <2>;
+	};
diff --git a/doc/device-tree-bindings/mtd/spi-nand.txt b/doc/device-tree-bindings/mtd/spi-nand.txt
new file mode 100644
index 00000000000..8b51f3b6d55
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/spi-nand.txt
@@ -0,0 +1,5 @@
+SPI NAND flash
+
+Required properties:
+- compatible: should be "spi-nand"
+- reg: should encode the chip-select line used to access the NAND chip
diff --git a/doc/device-tree-bindings/mtd/spi/spi-flash.txt b/doc/device-tree-bindings/mtd/spi/spi-flash.txt
new file mode 100644
index 00000000000..332789026a7
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/spi/spi-flash.txt
@@ -0,0 +1,25 @@
+* MTD SPI driver for serial flash chips
+
+Required properties:
+- #address-cells, #size-cells : Must be present if the device has sub-nodes
+  representing partitions.
+- compatible : Should be the manufacturer and the name of the chip. Bear in
+               mind that the DT binding is not U-Boot-only, but in case of
+               U-Boot, see spi_flash_params_table table in
+               drivers/mtd/spi/spi_flash_ids.c for the list of supported chips.
+- reg : Chip-Select number
+- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
+
+Optional properties:
+ - memory-map : Address and size of the flash, if memory mapped. This may
+                apply to Intel chipsets, which tend to memory-map flash.
+
+Example:
+
+	flash: m25p80@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spansion,m25p80";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+	};
diff --git a/doc/device-tree-bindings/mtd/ti,elm.yaml b/doc/device-tree-bindings/mtd/ti,elm.yaml
new file mode 100644
index 00000000000..87128c00459
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/ti,elm.yaml
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/ti,elm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments Error Location Module (ELM).
+
+maintainers:
+  - Roger Quadros <rogerq@kernel.org>
+
+description:
+  ELM module is used together with GPMC and NAND Flash to detect
+  errors and the location of the error based on BCH algorithms
+  so they can be corrected if possible.
+
+properties:
+  compatible:
+    enum:
+      - ti,am3352-elm
+      - ti,am64-elm
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+    description: Functional clock.
+
+  clock-names:
+    items:
+      - const: fck
+
+  power-domains:
+    maxItems: 1
+
+  ti,hwmods:
+    description:
+      Name of the HWMOD associated with ELM. This is for legacy
+      platforms only.
+    $ref: /schemas/types.yaml#/definitions/string
+    deprecated: true
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: ti,am64-elm
+    then:
+      required:
+        - clocks
+        - clock-names
+        - power-domains
+
+additionalProperties: false
+
+examples:
+  - |
+    elm: ecc@0 {
+        compatible = "ti,am3352-elm";
+        reg = <0x0 0x2000>;
+        interrupts = <4>;
+    };
diff --git a/doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml b/doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
new file mode 100644
index 00000000000..4ac198814b7
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
@@ -0,0 +1,129 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments GPMC NAND Flash controller.
+
+maintainers:
+  - Tony Lindgren <tony@atomide.com>
+  - Roger Quadros <rogerq@kernel.org>
+
+description:
+  GPMC NAND controller/Flash is represented as a child of the
+  GPMC controller node.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - ti,am64-nand
+          - ti,omap2-nand
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: Interrupt for fifoevent
+      - description: Interrupt for termcount
+
+  "#address-cells": true
+
+  "#size-cells": true
+
+  ti,nand-ecc-opt:
+    description: Desired ECC algorithm
+    $ref: /schemas/types.yaml#/definitions/string
+    enum: [sw, ham1, bch4, bch8, bch16]
+
+  ti,nand-xfer-type:
+    description: Data transfer method between controller and chip.
+    $ref: /schemas/types.yaml#/definitions/string
+    enum: [prefetch-polled, polled, prefetch-dma, prefetch-irq]
+    default: prefetch-polled
+
+  ti,elm-id:
+    description:
+      phandle to the ELM (Error Location Module).
+    $ref: /schemas/types.yaml#/definitions/phandle
+
+  nand-bus-width:
+    description:
+      Bus width to the NAND chip
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [8, 16]
+    default: 8
+
+  rb-gpios:
+    description:
+      GPIO connection to R/B signal from NAND chip
+    maxItems: 1
+
+patternProperties:
+  "@[0-9a-f]+$":
+    $ref: "/schemas/mtd/partitions/partition.yaml"
+
+allOf:
+  - $ref: "/schemas/memory-controllers/ti,gpmc-child.yaml"
+
+required:
+  - compatible
+  - reg
+  - ti,nand-ecc-opt
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/gpio/gpio.h>
+
+    gpmc: memory-controller@50000000 {
+      compatible = "ti,am3352-gpmc";
+      dmas = <&edma 52 0>;
+      dma-names = "rxtx";
+      clocks = <&l3s_gclk>;
+      clock-names = "fck";
+      reg = <0x50000000 0x2000>;
+      interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+      gpmc,num-cs = <7>;
+      gpmc,num-waitpins = <2>;
+      #address-cells = <2>;
+      #size-cells = <1>;
+      interrupt-controller;
+      #interrupt-cells = <2>;
+      gpio-controller;
+      #gpio-cells = <2>;
+
+      ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
+      nand@0,0 {
+        compatible = "ti,omap2-nand";
+        reg = <0 0 4>;          /* device IO registers */
+        interrupt-parent = <&gpmc>;
+        interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+                     <1 IRQ_TYPE_NONE>; /* termcount */
+        ti,nand-xfer-type = "prefetch-dma";
+        ti,nand-ecc-opt = "bch16";
+        ti,elm-id = <&elm>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        /* NAND generic properties */
+        nand-bus-width = <8>;
+        rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;  /* gpmc_wait0 */
+
+        /* GPMC properties*/
+        gpmc,device-width = <1>;
+
+        partition@0 {
+          label = "NAND.SPL";
+          reg = <0x00000000 0x00040000>;
+        };
+        partition@1 {
+          label = "NAND.SPL.backup1";
+          reg = <0x00040000 0x00040000>;
+        };
+      };
+    };
diff --git a/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt b/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt
new file mode 100644
index 00000000000..86ae4082de9
--- /dev/null
+++ b/doc/device-tree-bindings/nand/nvidia,tegra20-nand.txt
@@ -0,0 +1,53 @@
+NAND Flash
+----------
+
+(there isn't yet a generic binding in Linux, so this describes what is in
+U-Boot. There should not be Linux-specific or U-Boot specific binding, just
+a binding that describes this hardware. But agreeing a binding in Linux in
+the absence of a driver may be beyond my powers.)
+
+The device node for a NAND flash device is as follows:
+
+Required properties :
+ - compatible : Should be "manufacturer,device", "nand-flash"
+
+This node should sit inside its controller.
+
+
+Nvidia NAND Controller
+----------------------
+
+The device node for a NAND flash controller is as follows:
+
+Optional properties:
+
+nvidia,wp-gpios : GPIO of write-protect line, three cells in the format:
+		phandle, parameter, flags
+nvidia,nand-width : bus width of the NAND device in bits
+
+ - nvidia,nand-timing : Timing parameters for the NAND. Each is in ns.
+	Order is: MAX_TRP_TREA, TWB, Max(tCS, tCH, tALS, tALH),
+	TWHR, Max(tCS, tCH, tALS, tALH), TWH, TWP, TRH, TADL
+
+	MAX_TRP_TREA is:
+		non-EDO mode: Max(tRP, tREA) + 6ns
+		EDO mode: tRP timing
+
+The 'reg' property should provide the chip select used by the flash chip.
+
+
+Example
+-------
+
+nand-controller@0x70008000 {
+	compatible = "nvidia,tegra20-nand";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	nvidia,wp-gpios = <&gpio 59 0>;		/* PH3 */
+	nvidia,nand-width = <8>;
+	nvidia,timing = <26 100 20 80 20 10 12 10 70>;
+	nand@0 {
+		reg = <0>;
+		compatible = "hynix,hy27uf4g2b", "nand-flash";
+	};
+};
diff --git a/doc/device-tree-bindings/nand/sandbox,nand.txt b/doc/device-tree-bindings/nand/sandbox,nand.txt
new file mode 100644
index 00000000000..0a723d7c058
--- /dev/null
+++ b/doc/device-tree-bindings/nand/sandbox,nand.txt
@@ -0,0 +1,57 @@
+Sandbox NAND
+============
+
+The sandbox NAND controller emulates a NAND controller and attached devices.
+
+Required properties:
+- compatible: "sandbox,nand"
+- #address-cells: Must be 1
+- #size-cells: Must be 0
+
+Any number of child nodes may be present, each representing a NAND device:
+
+Required Properties:
+- reg: The chip-select(s) to use. Only single-die devices are supported for now.
+- sandbox,id: An array of bytes to be reported by the READID (0x90) command
+- sandbox,erasesize: The block size (erase size) of the device, in bytes. Must
+                     be a power-of-two multiple of the page size.
+- sandbox,oobsize: The size of the OOB area per page, in bytes.
+- sandbox,pagesize: The page size (write size) of the device, in bytes. Must be
+                    a power of two.
+- sandbox,pages: The total number of pages in the device.
+- sandbox,err-count: Number of bit errors to inject per step.
+- sandbox,err-step-size: Size of the step to use when injecting errors, in
+                         bytes. Must evenly divide the page size.
+
+Optional properties:
+- sandbox,onfi: The complete ONFI parameter page, including the CRC. Should be
+                exactly 256 bytes.
+- Any common NAND chip properties as documented by Linux's
+  Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml
+
+To match U-Boot's error correction capabilities, errors are only injected into
+the data area and the ECC codes. Other data in the OOB area is never corrupted.
+Generally, sandbox,err-step-size should be the same as the ECC step size, and
+sandbox,err-count should be less than the number of correctable bit errors (the
+ECC strength).
+
+Example
+-------
+
+nand-controller {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	compatible = "sandbox,nand";
+
+	nand@0 {
+		reg = <0>;
+		nand-ecc-mode = "soft";
+		sandbox,id = [00 e3];
+		sandbox,erasesize = <(8 * 1024)>;
+		sandbox,oobsize = <16>;
+		sandbox,pagesize = <512>;
+		sandbox,pages = <0x2000>;
+		sandbox,err-count = <1>;
+		sandbox,err-step-size = <512>;
+	};
+};
diff --git a/doc/device-tree-bindings/net/allwinner,sun4i-emac.txt b/doc/device-tree-bindings/net/allwinner,sun4i-emac.txt
new file mode 100644
index 00000000000..10640b17c86
--- /dev/null
+++ b/doc/device-tree-bindings/net/allwinner,sun4i-emac.txt
@@ -0,0 +1,19 @@
+* Allwinner EMAC ethernet controller
+
+Required properties:
+- compatible: should be "allwinner,sun4i-a10-emac" (Deprecated:
+              "allwinner,sun4i-emac")
+- reg: address and length of the register set for the device.
+- interrupts: interrupt for the device
+- phy: see ethernet.txt file in the same directory.
+- clocks: A phandle to the reference clock for this device
+
+Example:
+
+emac: ethernet@01c0b000 {
+       compatible = "allwinner,sun4i-a10-emac";
+       reg = <0x01c0b000 0x1000>;
+       interrupts = <55>;
+       clocks = <&ahb_gates 17>;
+       phy = <&phy0>;
+};
diff --git a/doc/device-tree-bindings/net/allwinner,sun4i-mdio.txt b/doc/device-tree-bindings/net/allwinner,sun4i-mdio.txt
new file mode 100644
index 00000000000..4ec56413779
--- /dev/null
+++ b/doc/device-tree-bindings/net/allwinner,sun4i-mdio.txt
@@ -0,0 +1,27 @@
+* Allwinner A10 MDIO Ethernet Controller interface
+
+Required properties:
+- compatible: should be "allwinner,sun4i-a10-mdio"
+              (Deprecated: "allwinner,sun4i-mdio").
+- reg: address and length of the register set for the device.
+
+Optional properties:
+- phy-supply: phandle to a regulator if the PHY needs one
+
+Example at the SoC level:
+mdio@01c0b080 {
+	compatible = "allwinner,sun4i-a10-mdio";
+	reg = <0x01c0b080 0x14>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+};
+
+And at the board level:
+
+mdio@01c0b080 {
+	phy-supply = <&reg_emac_3v3>;
+
+	phy0: ethernet-phy@0 {
+		reg = <0>;
+	};
+};
diff --git a/doc/device-tree-bindings/net/allwinner,sun7i-a20-gmac.txt b/doc/device-tree-bindings/net/allwinner,sun7i-a20-gmac.txt
new file mode 100644
index 00000000000..ea4d752389a
--- /dev/null
+++ b/doc/device-tree-bindings/net/allwinner,sun7i-a20-gmac.txt
@@ -0,0 +1,27 @@
+* Allwinner GMAC ethernet controller
+
+This device is a platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+Required properties:
+ - compatible:  Should be "allwinner,sun7i-a20-gmac"
+ - clocks: Should contain the GMAC main clock, and tx clock
+   The tx clock type should be "allwinner,sun7i-a20-gmac-clk"
+ - clock-names: Should contain the clock names "stmmaceth",
+   and "allwinner_gmac_tx"
+
+Optional properties:
+- phy-supply: phandle to a regulator if the PHY needs one
+
+Examples:
+
+	gmac: ethernet@01c50000 {
+		compatible = "allwinner,sun7i-a20-gmac";
+		reg = <0x01c50000 0x10000>,
+		      <0x01c20164 0x4>;
+		interrupts = <0 85 1>;
+		interrupt-names = "macirq";
+		clocks = <&ahb_gates 49>, <&gmac_tx>;
+		clock-names = "stmmaceth", "allwinner_gmac_tx";
+		phy-mode = "mii";
+	};
diff --git a/doc/device-tree-bindings/net/altera_tse.txt b/doc/device-tree-bindings/net/altera_tse.txt
new file mode 100644
index 00000000000..96ab1d6ebca
--- /dev/null
+++ b/doc/device-tree-bindings/net/altera_tse.txt
@@ -0,0 +1,112 @@
+* Altera Triple-Speed Ethernet MAC driver (TSE)
+
+Required properties:
+- compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
+		be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
+- reg: Address and length of the register set for the device. It contains
+  the information of registers in the same order as described by reg-names
+- reg-names: Should contain the reg names
+  "control_port": MAC configuration space region
+  "tx_csr":       xDMA Tx dispatcher control and status space region
+  "tx_desc":      MSGDMA Tx dispatcher descriptor space region
+  "rx_csr" :      xDMA Rx dispatcher control and status space region
+  "rx_desc":      MSGDMA Rx dispatcher descriptor space region
+  "rx_resp":      MSGDMA Rx dispatcher response space region
+  "s1":		  SGDMA descriptor memory
+- interrupts: Should contain the TSE interrupts and it's mode.
+- interrupt-names: Should contain the interrupt names
+  "rx_irq":       xDMA Rx dispatcher interrupt
+  "tx_irq":       xDMA Tx dispatcher interrupt
+- rx-fifo-depth: MAC receive FIFO buffer depth in bytes
+- tx-fifo-depth: MAC transmit FIFO buffer depth in bytes
+- phy-mode: See ethernet.txt in the same directory.
+- phy-handle: See ethernet.txt in the same directory.
+- phy-addr: See ethernet.txt in the same directory. A configuration should
+		include phy-handle or phy-addr.
+- altr,has-supplementary-unicast:
+		If present, TSE supports additional unicast addresses.
+		Otherwise additional unicast addresses are not supported.
+- altr,has-hash-multicast-filter:
+		If present, TSE supports a hash based multicast filter.
+		Otherwise, hash-based multicast filtering is not supported.
+
+- mdio device tree subnode: When the TSE has a phy connected to its local
+		mdio, there must be device tree subnode with the following
+		required properties:
+
+	- compatible: Must be "altr,tse-mdio".
+	- #address-cells: Must be <1>.
+	- #size-cells: Must be <0>.
+
+	For each phy on the mdio bus, there must be a node with the following
+	fields:
+
+	- reg: phy id used to communicate to phy.
+	- device_type: Must be "ethernet-phy".
+
+Optional properties:
+- local-mac-address: See ethernet.txt in the same directory.
+- max-frame-size: See ethernet.txt in the same directory.
+
+Example:
+
+	tse_sub_0_eth_tse_0: ethernet@0x1,00000000 {
+		compatible = "altr,tse-msgdma-1.0";
+		reg =	<0x00000001 0x00000000 0x00000400>,
+			<0x00000001 0x00000460 0x00000020>,
+			<0x00000001 0x00000480 0x00000020>,
+			<0x00000001 0x000004A0 0x00000008>,
+			<0x00000001 0x00000400 0x00000020>,
+			<0x00000001 0x00000420 0x00000020>;
+		reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
+		interrupt-parent = <&hps_0_arm_gic_0>;
+		interrupts = <0 41 4>, <0 40 4>;
+		interrupt-names = "rx_irq", "tx_irq";
+		rx-fifo-depth = <2048>;
+		tx-fifo-depth = <2048>;
+		address-bits = <48>;
+		max-frame-size = <1500>;
+		local-mac-address = [ 00 00 00 00 00 00 ];
+		phy-mode = "gmii";
+		altr,has-supplementary-unicast;
+		altr,has-hash-multicast-filter;
+		phy-handle = <&phy0>;
+		mdio {
+			compatible = "altr,tse-mdio";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			phy0: ethernet-phy@0 {
+				reg = <0x0>;
+				device_type = "ethernet-phy";
+			};
+
+			phy1: ethernet-phy@1 {
+				reg = <0x1>;
+				device_type = "ethernet-phy";
+			};
+
+		};
+	};
+
+	tse_sub_1_eth_tse_0: ethernet@0x1,00001000 {
+		compatible = "altr,tse-msgdma-1.0";
+		reg =	<0x00000001 0x00001000 0x00000400>,
+			<0x00000001 0x00001460 0x00000020>,
+			<0x00000001 0x00001480 0x00000020>,
+			<0x00000001 0x000014A0 0x00000008>,
+			<0x00000001 0x00001400 0x00000020>,
+			<0x00000001 0x00001420 0x00000020>;
+		reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
+		interrupt-parent = <&hps_0_arm_gic_0>;
+		interrupts = <0 43 4>, <0 42 4>;
+		interrupt-names = "rx_irq", "tx_irq";
+		rx-fifo-depth = <2048>;
+		tx-fifo-depth = <2048>;
+		address-bits = <48>;
+		max-frame-size = <1500>;
+		local-mac-address = [ 00 00 00 00 00 00 ];
+		phy-mode = "gmii";
+		altr,has-supplementary-unicast;
+		altr,has-hash-multicast-filter;
+		phy-handle = <&phy1>;
+	};
diff --git a/doc/device-tree-bindings/net/aquantia-phy.txt b/doc/device-tree-bindings/net/aquantia-phy.txt
new file mode 100644
index 00000000000..89ce61e05bb
--- /dev/null
+++ b/doc/device-tree-bindings/net/aquantia-phy.txt
@@ -0,0 +1,25 @@
+PHY nodes for Aquantia devices.
+
+This text describes properties that are applicable to Aquantia PHY nodes in
+addition to the bindings in phy.txt.
+
+Aquantia PHYs allow some flexibility in the way they are wired in a system,
+they allow MDI pins to be reversed, LEDs linked up in different weays, have an
+I2C slave interface that can be used for debug.  Normally the configuration
+corresponding to these is driven by the PHY firmware with the downside that
+a custom firmware is needed for each integration of a PHY.
+Several optional bindings are defined that allow these configuration points to
+be driven by the PHY driver and reduce dependency on specific FW versions.
+
+Optional properties:
+mdi-reversal: 0 or 1 indicating that reversal must be disabled/enabled.
+              Firmware default is used if the property is missing.
+smb-addr:     I2C/SMBus address to use, firmware default is used if the property
+              is missing.
+
+Example node:
+phy@00 {
+	reg = <0x00>;
+	mdi-reversal = <1>;
+	smb-addr = <0x25>;
+};
diff --git a/doc/device-tree-bindings/net/ethernet.txt b/doc/device-tree-bindings/net/ethernet.txt
new file mode 100644
index 00000000000..648a1aee694
--- /dev/null
+++ b/doc/device-tree-bindings/net/ethernet.txt
@@ -0,0 +1,76 @@
+The following properties are common to the Ethernet controllers:
+
+NOTE: All 'phy*' properties documented below are Ethernet specific. For the
+generic PHY 'phys' property, see
+Documentation/devicetree/bindings/phy/phy-bindings.txt.
+
+- local-mac-address: array of 6 bytes, specifies the MAC address that was
+  assigned to the network device;
+- mac-address: array of 6 bytes, specifies the MAC address that was last used by
+  the boot program; should be used in cases where the MAC address assigned to
+  the device by the boot program is different from the "local-mac-address"
+  property;
+- nvmem-cells: phandle, reference to an nvmem node for the MAC address;
+- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used;
+- max-speed: number, specifies maximum speed in Mbit/s supported by the device;
+- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
+  the maximum frame size (there's contradiction in the Devicetree
+  Specification).
+- phy-mode: string, operation mode of the PHY interface. This is now a de-facto
+  standard property; supported values are:
+  * "internal"
+  * "mii"
+  * "gmii"
+  * "sgmii"
+  * "qsgmii"
+  * "tbi"
+  * "rev-mii"
+  * "rmii"
+  * "rgmii" (RX and TX delays are added by the MAC when required)
+  * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
+     MAC should not add the RX or TX delays in this case)
+  * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
+     should not add an RX delay in this case)
+  * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
+     should not add an TX delay in this case)
+  * "rtbi"
+  * "smii"
+  * "xgmii"
+  * "trgmii"
+  * "2000base-x",
+  * "2500base-x",
+  * "rxaui"
+  * "xaui"
+  * "10gbase-r" (This is the IEEE 802.3 Clause 49 defined 10GBASE-R protocol
+    used with various different mediums. Please refer to the IEEE standard for
+    a definition of this. Note: 10GBASE-R is just one protocol that can be used
+    with XFI and SFI. XFI and SFI permit multiple protocols over a single
+    SERDES lane, and also defines the electrical characteristics of the signals
+    with a host compliance board plugged into the host XFP/SFP connector.
+    Therefore, XFI and SFI are not PHY interface types in their own right.)
+  * "10gbase-kr" (This is the IEEE 802.3 Clause 49 defined 10GBASE-R with
+    Clause 73 autonegotiation. Please refer to the IEEE standard for further
+    information. Note: due to legacy usage, some 10GBASE-R usage incorrectly
+    makes use of this definition).
+- phy-connection-type: the same as "phy-mode" property but described in the
+  Devicetree Specification;
+- phy-handle: phandle, specifies a reference to a node representing a PHY
+  device; this property is described in the Devicetree Specification and so
+  preferred;
+- phy: the same as "phy-handle" property, not recommended for new bindings.
+- phy-device: the same as "phy-handle" property, not recommended for new
+  bindings.
+- rx-fifo-depth: the size of the controller's receive fifo in bytes. This
+  is used for components that can have configurable receive fifo sizes,
+  and is useful for determining certain configuration settings such as
+  flow control thresholds.
+- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This
+  is used for components that can have configurable fifo sizes.
+- managed: string, specifies the PHY management type. Supported values are:
+  "auto", "in-band-status". "auto" is the default, it usess MDIO for
+  management if fixed-link is not specified.
+
+Child nodes of the Ethernet controller are typically the individual PHY devices
+connected via the MDIO bus (sometimes the MDIO bus controller is separate).
+They are described in the phy.txt file in this same directory.
+For non-MDIO PHY management see fixed-link.txt.
diff --git a/doc/device-tree-bindings/net/fixed-link.txt b/doc/device-tree-bindings/net/fixed-link.txt
new file mode 100644
index 00000000000..5efeeb6fc5e
--- /dev/null
+++ b/doc/device-tree-bindings/net/fixed-link.txt
@@ -0,0 +1,54 @@
+Fixed link Device Tree binding
+------------------------------
+
+Some Ethernet MACs have a "fixed link", and are not connected to a
+normal MDIO-managed PHY device. For those situations, a Device Tree
+binding allows to describe a "fixed link".
+
+Note there are two ways to describe a fixed PHY attached to an
+Ethernet device:
+
+- The new DT binding, where 'fixed-link' is a sub-node of the Ethernet
+  MAC device node, with the following properties:
+
+  * 'speed' (integer, mandatory), to indicate the link speed. Accepted
+    values are 10, 100 and 1000
+  * 'full-duplex' (boolean, optional), to indicate that full duplex is
+    used. When absent, half duplex is assumed.
+  * 'pause' (boolean, optional), to indicate that pause should be
+    enabled.
+  * 'asym-pause' (boolean, optional), to indicate that asym_pause should
+    be enabled.
+
+- The old DT binding, where 'fixed-link' is a property with 5 cells
+  encoding various information about the fixed PHY, in the form of
+  <phy_id, full-duplex, speed, pause, asym-pause>.
+
+  * 'phy_id', emulated PHY ID, choose any but unique to the all specified
+    fixed-links. Note U-Boot deliberately ignores the 'phy_id' and
+    unconditionally uses PHY_FIXED_ID.
+  * 'full-duplex', 0 for half duplex or 1 for full duplex
+  * 'speed', link speed in Mbits/sec, accepts only 10, 100 and 1000
+  * 'pause', 0 for no pause, 1 for pause
+  * 'asym-pause', 0 for no asymmetric pause, 1 for asymmetric pause
+
+Examples:
+
+The new binding:
+
+ethernet@0 {
+	...
+	fixed-link {
+	      speed = <1000>;
+	      full-duplex;
+	};
+	...
+};
+
+The old binding:
+
+ethernet@0 {
+	...
+	fixed-link = <0 1 1000 0 0>;
+	...
+};
diff --git a/doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt b/doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt
new file mode 100644
index 00000000000..5c6d548caec
--- /dev/null
+++ b/doc/device-tree-bindings/net/fsl,mcf-dma-fec.txt
@@ -0,0 +1,35 @@
+* Freescale ColdFire DMA-FEC ethernet controller
+
+Required properties:
+- compatible: should be "fsl,mcf-dma-fec"
+- reg: address and length of the register set for the device.
+- rx-task: dma channel
+- tx-task: dma channel
+- rx-priority: dma channel
+- tx-priority: dma channel
+- rx-init: dma channel
+- tx-init: dma channel
+
+Optional properties:
+- mii-base: index of FEC reg area, 0 for FEC0, 1 for FEC1
+- max-speed: max speedm Mbits/sec
+- phy-addr: phy address
+- timeout-loop: integer value for driver loops time out
+
+
+Example:
+
+fec0: ethernet@9000 {
+	compatible = "fsl,mcf-dma-fec";
+	reg = <0x9000 0x800>;
+	mii-base = <0>;
+	phy-addr = <0>;
+	timeout-loop = <5000>;
+	rx-task = <0>;
+	tx-task = <1>;
+	rx-piority = <6>;
+	tx-piority = <7>;
+	rx-init = <16>;
+	tx-init = <17>;
+	status = "disabled";
+};
diff --git a/doc/device-tree-bindings/net/fsl,mcf-fec.txt b/doc/device-tree-bindings/net/fsl,mcf-fec.txt
new file mode 100644
index 00000000000..2699b5ac070
--- /dev/null
+++ b/doc/device-tree-bindings/net/fsl,mcf-fec.txt
@@ -0,0 +1,22 @@
+* Freescale ColdFire FEC ethernet controller
+
+Required properties:
+- compatible: should be "fsl,mcf-fec"
+- reg: address and length of the register set for the device.
+
+Optional properties:
+- mii-base: index of FEC reg area, 0 for FEC0, 1 for FEC1
+- max-speed: max speedm Mbits/sec
+- phy-addr: phy address
+- timeout-loop: integer value for driver loops time out
+
+
+Example:
+
+fec0: ethernet@fc030000 {
+	compatible = "fsl,mcf-fec";
+	reg = <0xfc030000 0x400>;
+	mii-base = <0>;
+	phy-addr = <0>;
+	timeout-loop = <5000>;
+};
diff --git a/doc/device-tree-bindings/net/fsl-tsec-phy.txt b/doc/device-tree-bindings/net/fsl-tsec-phy.txt
new file mode 100644
index 00000000000..f68980352bc
--- /dev/null
+++ b/doc/device-tree-bindings/net/fsl-tsec-phy.txt
@@ -0,0 +1,81 @@
+* TSEC-compatible ethernet nodes
+
+Properties:
+
+  - compatible : Should be "fsl,etsec2" or "gianfar"
+  - reg : Offset and length of the register set for the device. If this is
+    missing, a subnode with a name prefix "queue-group" must be provided to
+    provide the <reg> property.
+  - phy-handle : See ethernet.txt file in the same directory.
+  - phy-connection-type : See ethernet.txt file in the same directory. This
+    property is only really needed if the connection is of type "rgmii-id",
+    "rgmii-rxid" and "rgmii-txid" as all other connection types are detected
+    by hardware.
+  - ranges : an <empty> value if subnode "queue-group" is present, specifying
+    that no address translation is required between them TSEC parent node and
+    the child "queue-group" node.
+
+Example:
+	ethernet@24000 {
+		compatible = "fsl,etsec2";
+		reg = <0x24000 0x1000>;
+		phy-handle = <&phy0>;
+		phy-connection-type = "sgmii";
+	};
+
+An alternate description with "queue-group" subnode example:
+	ethernet@24000 {
+		compatible = "fsl,etsec2";
+		phy-handle = <&phy0>;
+		phy-connection-type = "sgmii";
+		ranges;
+
+		queue-group {
+			reg = <0x24000 0x1000>;
+		};
+	};
+
+Child nodes of the TSEC controller are typically the individual PHY devices
+connected via the MDIO bus (sometimes the MDIO bus controller is separate).
+
+* MDIO IO device
+
+The MDIO is a bus to which the PHY devices are connected.  For each
+device that exists on this bus, a PHY node should be created.
+
+Required properties:
+  - compatible : Should define the compatible device type for the
+    mdio. Currently supported string/device is "fsl,etsec2-mdio".
+  - reg : Offset and length of the register set for the device
+
+Example:
+
+	mdio@24520 {
+		compatible = "fsl,etsec2-mdio";
+		reg = <0x24520 0x20>;
+
+		ethernet-phy@0 {
+			reg = <0>;
+		};
+	};
+
+* TBI Internal MDIO bus
+
+As of this writing, every tsec is associated with an internal TBI PHY.
+This PHY is accessed through the local MDIO bus.  These buses are defined
+similarly to the mdio buses.  The TBI PHYs underneath them are similar to
+normal PHYs, but the reg property is considered instructive, rather than
+descriptive.  The reg property should be chosen so it doesn't interfere
+with other PHYs on the bus.  The TBI PHYs are referred to by a "tbi-handle"
+property under the tsec node, which has a similar meaning of "phy-handle".
+
+Example:
+	ethernet@24000 {
+		phy-handle = <&tbi1>;
+	};
+
+	mdio@24520 {
+		tbi1: tbi-phy@1f {
+			reg = <0x1f>;
+		};
+	};
diff --git a/doc/device-tree-bindings/net/marvell-mdio.txt b/doc/device-tree-bindings/net/marvell-mdio.txt
new file mode 100644
index 00000000000..e2038e21453
--- /dev/null
+++ b/doc/device-tree-bindings/net/marvell-mdio.txt
@@ -0,0 +1,15 @@
+* Marvell MDIO Ethernet Controller interface
+
+The Ethernet controllers of the Marvel Armada 3700 and Armada 7k/8k
+have an identical unit that provides an interface with the MDIO bus.
+This driver handles this MDIO interface.
+
+Mandatory properties:
+SoC specific:
+	- #address-cells: Must be <1>.
+	- #size-cells: Must be <0>.
+	- compatible: Should be "marvell,orion-mdio" (for SMI)
+				"marvell,xmdio"	     (for XSMI)
+	- reg: Base address and size SMI/XMSI bus.
+
+Please refer to "mdio.txt" for generic MDIO bus bindings.
diff --git a/doc/device-tree-bindings/net/mdio-mux-reg.txt b/doc/device-tree-bindings/net/mdio-mux-reg.txt
new file mode 100644
index 00000000000..0f7c2956877
--- /dev/null
+++ b/doc/device-tree-bindings/net/mdio-mux-reg.txt
@@ -0,0 +1,82 @@
+Device tree structures used by register based MDIO muxes is described here.
+This binding is based on reg-mux.txt binding in Linux and is currently used by
+mdio-mux-i2creg driver in U-Boot.
+
+Required properties:
+#mux-control-cells = <1> indicates how many registers are used for mux
+			selection.  mux-reg-mask property described below must
+			include this number of pairs.
+mux-reg-masks = <reg mask> describes pairs of register offset and register mask.
+			Register bits enabled in mask are set to the selection
+			value defined in reg property of child MDIOs to control
+			selection.
+Properties described in mdio-mux.txt also apply.
+
+Example structure, used on Freescale LS1028A QDS board:
+
+&i2c0 {
+	status = "okay";
+	bootph-all;
+
+	fpga@66 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "simple-mfd";
+		reg = <0x66>;
+
+		mux-mdio@54 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "mdio-mux-i2creg";
+			reg = <0x54>;
+			#mux-control-cells = <1>;
+			mux-reg-masks = <0x54 0xf0>;
+			mdio-parent-bus = <&mdio0>;
+
+			/* on-board MDIO with a single RGMII PHY */
+			mdio@00 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x00>;
+
+				/* on-board 1G RGMII PHY */
+				qds_phy0: phy@5 {
+					reg = <5>;
+				};
+			};
+			/* card slot 1 */
+			mdio@40 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x40>;
+				/* VSC8234 1G SGMII card */
+				sgmii_port0: phy@1c {
+					reg = <0x1c>;
+				};
+			};
+			/* card slot 2 */
+			mdio@50 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x50>;
+			};
+			/* card slot 3 */
+			mdio@60 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x60>;
+			};
+			/* card slot 4 */
+			mdio@70 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x70>;
+			};
+		};
+	};
+};
+
+/* Parent MDIO, defined in SoC .dtsi file, just enabled here */
+&mdio0 {
+	status = "okay";
+};
diff --git a/doc/device-tree-bindings/net/mdio-mux.txt b/doc/device-tree-bindings/net/mdio-mux.txt
new file mode 100644
index 00000000000..eaa31efda23
--- /dev/null
+++ b/doc/device-tree-bindings/net/mdio-mux.txt
@@ -0,0 +1,138 @@
+The expected structure of an MDIO MUX device tree node is described here.  This
+is heavily based on current Linux specification.
+One notable difference to Linux is that mdio-parent-bus is currently required
+by U-Boot, not optional as is in Linux.  Current U-Boot MDIO MUX udevice class
+implementation does not have specific support for MDIOs with an integrated MUX,
+the property should be made optional if such support is added.
+
+The MDIO buses downstream of the MUX should be described in the device tree as
+child nodes as indicated below.
+
+Required properties:
+mdio-parent-bus = a phandle to the MDIO bus used to perform actual I/O.  This is
+                  typically a real MDIO device, unless there are cascaded MUXes.
+#address-cells = <1>, each MDIO group is identified by one 32b value.
+#size-cells = <0>
+
+Other properties:
+The properties described here are sufficient for MDIO MUX DM class code, but
+MUX drivers may define additional properties, either required or optional.
+
+Required properties in child nodes:
+reg = value to be configured on the MUX to select the respective downstream
+      MDIO.
+
+Child nodes should normally contain PHY nodes, referenced by phandle from
+ethernet nodes of the eth interfaces using these PHYs.
+
+Example structure, extracted from Linux bindings document:
+
+	/* The parent MDIO bus. */
+	smi1: mdio@1180000001900 {
+		compatible = "cavium,octeon-3860-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x11800 0x00001900 0x0 0x40>;
+	};
+	/*
+	 * An NXP sn74cbtlv3253 dual 1-of-4 switch controlled by a
+	 * pair of GPIO lines.  Child busses 2 and 3 populated with 4
+	 * PHYs each.
+	 */
+	mdio-mux {
+		compatible = "mdio-mux-gpio";
+		gpios = <&gpio1 3 0>, <&gpio1 4 0>;
+		mdio-parent-bus = <&smi1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		mdio@2 {
+			reg = <2>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			phy11: ethernet-phy@1 {
+				reg = <1>;
+				compatible = "marvell,88e1149r";
+				marvell,reg-init = <3 0x10 0 0x5777>,
+					<3 0x11 0 0x00aa>,
+					<3 0x12 0 0x4105>,
+					<3 0x13 0 0x0a60>;
+				interrupt-parent = <&gpio>;
+				interrupts = <10 8>; /* Pin 10, active low */
+			};
+			phy12: ethernet-phy@2 {
+				reg = <2>;
+				compatible = "marvell,88e1149r";
+				marvell,reg-init = <3 0x10 0 0x5777>,
+					<3 0x11 0 0x00aa>,
+					<3 0x12 0 0x4105>,
+					<3 0x13 0 0x0a60>;
+				interrupt-parent = <&gpio>;
+				interrupts = <10 8>; /* Pin 10, active low */
+			};
+			phy13: ethernet-phy@3 {
+				reg = <3>;
+				compatible = "marvell,88e1149r";
+				marvell,reg-init = <3 0x10 0 0x5777>,
+					<3 0x11 0 0x00aa>,
+					<3 0x12 0 0x4105>,
+					<3 0x13 0 0x0a60>;
+				interrupt-parent = <&gpio>;
+				interrupts = <10 8>; /* Pin 10, active low */
+			};
+			phy14: ethernet-phy@4 {
+				reg = <4>;
+				compatible = "marvell,88e1149r";
+				marvell,reg-init = <3 0x10 0 0x5777>,
+					<3 0x11 0 0x00aa>,
+					<3 0x12 0 0x4105>,
+					<3 0x13 0 0x0a60>;
+				interrupt-parent = <&gpio>;
+				interrupts = <10 8>; /* Pin 10, active low */
+			};
+		};
+		mdio@3 {
+			reg = <3>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			phy21: ethernet-phy@1 {
+				reg = <1>;
+				compatible = "marvell,88e1149r";
+				marvell,reg-init = <3 0x10 0 0x5777>,
+					<3 0x11 0 0x00aa>,
+					<3 0x12 0 0x4105>,
+					<3 0x13 0 0x0a60>;
+				interrupt-parent = <&gpio>;
+				interrupts = <12 8>; /* Pin 12, active low */
+			};
+			phy22: ethernet-phy@2 {
+				reg = <2>;
+				compatible = "marvell,88e1149r";
+				marvell,reg-init = <3 0x10 0 0x5777>,
+					<3 0x11 0 0x00aa>,
+					<3 0x12 0 0x4105>,
+					<3 0x13 0 0x0a60>;
+				interrupt-parent = <&gpio>;
+				interrupts = <12 8>; /* Pin 12, active low */
+			};
+			phy23: ethernet-phy@3 {
+				reg = <3>;
+				compatible = "marvell,88e1149r";
+				marvell,reg-init = <3 0x10 0 0x5777>,
+					<3 0x11 0 0x00aa>,
+					<3 0x12 0 0x4105>,
+					<3 0x13 0 0x0a60>;
+				interrupt-parent = <&gpio>;
+				interrupts = <12 8>; /* Pin 12, active low */
+			};
+			phy24: ethernet-phy@4 {
+				reg = <4>;
+				compatible = "marvell,88e1149r";
+				marvell,reg-init = <3 0x10 0 0x5777>,
+					<3 0x11 0 0x00aa>,
+					<3 0x12 0 0x4105>,
+					<3 0x13 0 0x0a60>;
+				interrupt-parent = <&gpio>;
+				interrupts = <12 8>; /* Pin 12, active low */
+			};
+		};
+	};
diff --git a/doc/device-tree-bindings/net/mdio.txt b/doc/device-tree-bindings/net/mdio.txt
new file mode 100644
index 00000000000..a7d8ac5b15a
--- /dev/null
+++ b/doc/device-tree-bindings/net/mdio.txt
@@ -0,0 +1,35 @@
+Common MDIO bus properties.
+
+These are generic properties that can apply to any MDIO bus.
+
+Optional properties:
+	- device-name - If present it is used to name the device and MDIO bus.
+			The name must be unique and must not contain spaces.
+
+A list of child nodes, one per device on the bus is expected.  These could be
+PHYs, switches or similar devices and child nodes should follow the specific
+binding for the device type.
+
+Example :
+This example shows the structure used for the external MDIO bus on NXP LS1028A
+RDB board.  Note that this MDIO device is an integrated PCI function and
+requires no compatible property for probing.
+
+/* definition in SoC dtsi file */
+	pcie@1f0000000 {
+
+		mdio0: pci@0,3 {
+			#address-cells=<0>;
+			#size-cells=<1>;
+			reg = <0x000300 0 0 0 0>;
+			status = "disabled";
+			device-name = "emdio";
+		};
+	};
+/* definition of PHYs in RDB dts file */
+&mdio0 {
+	status = "okay";
+	rdb_phy0: phy@2 {
+		reg = <2>;
+	};
+};
diff --git a/doc/device-tree-bindings/net/mediatek,mt7628-eth.txt b/doc/device-tree-bindings/net/mediatek,mt7628-eth.txt
new file mode 100644
index 00000000000..ec97504a3fe
--- /dev/null
+++ b/doc/device-tree-bindings/net/mediatek,mt7628-eth.txt
@@ -0,0 +1,17 @@
+* MediaTek Frame Engine Ethernet controller
+
+Required properties:
+- compatible: should be "mediatek,mt7628-eth"
+- reg: address and length of the register set for the frame
+       engine ethernet controller and the internal switch.
+- syscon: phandle to the system controller
+
+Example:
+
+eth@10100000 {
+	compatible = "mediatek,mt7628-eth";
+	reg = <0x10100000 0x10000
+	       0x10110000 0x8000>;
+
+	syscon = <&sysc>;
+};
diff --git a/doc/device-tree-bindings/net/micrel-ksz90x1.txt b/doc/device-tree-bindings/net/micrel-ksz90x1.txt
new file mode 100644
index 00000000000..a214d35fc90
--- /dev/null
+++ b/doc/device-tree-bindings/net/micrel-ksz90x1.txt
@@ -0,0 +1,192 @@
+Micrel KSZ9021/KSZ9031 Gigabit Ethernet PHY
+
+Some boards require special tuning values, particularly when it comes to
+clock delays. You can specify clock delay values by adding
+micrel-specific properties to an Ethernet OF device node.
+
+Note that these settings are applied after any phy-specific fixup from
+phy_fixup_list (see phy_init_hw() from drivers/net/phy/phy_device.c),
+and therefore may overwrite them.
+
+KSZ9021:
+
+  All skew control options are specified in picoseconds. The minimum
+  value is 0, the maximum value is 1800, and it is incremented by 120ps
+  steps.
+
+  The KSZ9021 hardware supports a range of skew values from negative to
+  positive, where the specific range is property dependent. All values
+  specified in the devicetree are offset by the minimum value so they
+  can be represented as positive integers in the devicetree since it's
+  difficult to represent a negative number in the devictree.
+
+  The following 4-bit values table applies to all the skew properties:
+
+  Pad Skew Value	Delay (ps)	Devicetree Value
+  ------------------------------------------------------
+  0000			-840ps		0
+  0001			-720ps		120
+  0010			-600ps		240
+  0011			-480ps		360
+  0100			-360ps		480
+  0101			-240ps		600
+  0110			-120ps		720
+  0111			0ps		840
+  1000			120ps		960
+  1001			240ps		1080
+  1010			360ps		1200
+  1011			480ps		1320
+  1100			600ps		1440
+  1101			720ps		1560
+  1110			840ps		1680
+  1111			960ps		1800
+
+  Optional properties:
+
+    - rxc-skew-ps : Skew control of RXC pad
+    - rxdv-skew-ps : Skew control of RX CTL pad
+    - txc-skew-ps : Skew control of TXC pad
+    - txen-skew-ps : Skew control of TX CTL pad
+    - rxd0-skew-ps : Skew control of RX data 0 pad
+    - rxd1-skew-ps : Skew control of RX data 1 pad
+    - rxd2-skew-ps : Skew control of RX data 2 pad
+    - rxd3-skew-ps : Skew control of RX data 3 pad
+    - txd0-skew-ps : Skew control of TX data 0 pad
+    - txd1-skew-ps : Skew control of TX data 1 pad
+    - txd2-skew-ps : Skew control of TX data 2 pad
+    - txd3-skew-ps : Skew control of TX data 3 pad
+
+KSZ9031:
+
+  All skew control options are specified in picoseconds. The minimum
+  value is 0, and the maximum is property-dependent. The increment
+  step is 60ps.
+
+  The KSZ9031 hardware supports a range of skew values from negative to
+  positive, where the specific range is property dependent. All values
+  specified in the devicetree are offset by the minimum value so they
+  can be represented as positive integers in the devicetree since it's
+  difficult to represent a negative number in the devictree.
+
+  The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps.
+
+  Pad Skew Value	Delay (ps)	Devicetree Value
+  ------------------------------------------------------
+  0_0000		-900ps		0
+  0_0001		-840ps		60
+  0_0010		-780ps		120
+  0_0011		-720ps		180
+  0_0100		-660ps		240
+  0_0101		-600ps		300
+  0_0110		-540ps		360
+  0_0111		-480ps		420
+  0_1000		-420ps		480
+  0_1001		-360ps		540
+  0_1010		-300ps		600
+  0_1011		-240ps		660
+  0_1100		-180ps		720
+  0_1101		-120ps		780
+  0_1110		-60ps		840
+  0_1111		0ps		900
+  1_0000		60ps		960
+  1_0001		120ps		1020
+  1_0010		180ps		1080
+  1_0011		240ps		1140
+  1_0100		300ps		1200
+  1_0101		360ps		1260
+  1_0110		420ps		1320
+  1_0111		480ps		1380
+  1_1000		540ps		1440
+  1_1001		600ps		1500
+  1_1010		660ps		1560
+  1_1011		720ps		1620
+  1_1100		780ps		1680
+  1_1101		840ps		1740
+  1_1110		900ps		1800
+  1_1111		960ps		1860
+
+  The following 4-bit values table apply to the txdX-skew-ps, rxdX-skew-ps
+  data pads, and the rxdv-skew-ps, txen-skew-ps control pads.
+
+  Pad Skew Value	Delay (ps)	Devicetree Value
+  ------------------------------------------------------
+  0000			-420ps		0
+  0001			-360ps		60
+  0010			-300ps		120
+  0011			-240ps		180
+  0100			-180ps		240
+  0101			-120ps		300
+  0110			-60ps		360
+  0111			0ps		420
+  1000			60ps		480
+  1001			120ps		540
+  1010			180ps		600
+  1011			240ps		660
+  1100			300ps		720
+  1101			360ps		780
+  1110			420ps		840
+  1111			480ps		900
+
+  Optional properties:
+
+    Maximum value of 1860:
+
+      - rxc-skew-ps : Skew control of RX clock pad
+      - txc-skew-ps : Skew control of TX clock pad
+
+    Maximum value of 900:
+
+      - rxdv-skew-ps : Skew control of RX CTL pad
+      - txen-skew-ps : Skew control of TX CTL pad
+      - rxd0-skew-ps : Skew control of RX data 0 pad
+      - rxd1-skew-ps : Skew control of RX data 1 pad
+      - rxd2-skew-ps : Skew control of RX data 2 pad
+      - rxd3-skew-ps : Skew control of RX data 3 pad
+      - txd0-skew-ps : Skew control of TX data 0 pad
+      - txd1-skew-ps : Skew control of TX data 1 pad
+      - txd2-skew-ps : Skew control of TX data 2 pad
+      - txd3-skew-ps : Skew control of TX data 3 pad
+
+Examples:
+
+	/* Attach to an Ethernet device with autodetected PHY */
+	&enet {
+		rxc-skew-ps = <1800>;
+		rxdv-skew-ps = <0>;
+		txc-skew-ps = <1800>;
+		txen-skew-ps = <0>;
+		status = "okay";
+	};
+
+	/* Attach to an explicitly-specified PHY */
+	mdio {
+		phy0: ethernet-phy@0 {
+			rxc-skew-ps = <1800>;
+			rxdv-skew-ps = <0>;
+			txc-skew-ps = <1800>;
+			txen-skew-ps = <0>;
+			reg = <0>;
+		};
+	};
+	ethernet@70000 {
+		status = "okay";
+		phy = <&phy0>;
+		phy-mode = "rgmii-id";
+	};
+
+References
+
+  Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014.
+  http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf
+
+  Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014.
+  http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf
+
+Notes:
+
+  Note that a previous version of the Micrel ksz9021rl/rn Data Sheet
+  was missing extended register 106 (transmit data pad skews), and
+  incorrectly specified the ps per step as 200ps/step instead of
+  120ps/step. The latest update to this document reflects the latest
+  revision of the Micrel specification even though usage in the kernel
+  still reflects that incorrect document.
diff --git a/doc/device-tree-bindings/net/phy.txt b/doc/device-tree-bindings/net/phy.txt
new file mode 100644
index 00000000000..6599c667b50
--- /dev/null
+++ b/doc/device-tree-bindings/net/phy.txt
@@ -0,0 +1,24 @@
+PHY nodes
+
+If the device tree is used to describe networking interfaces, U-Boot expects a
+node for each PHY.  Parent node for such a PHY node is expected to correspond to
+a MDIO bus and the bus is used to access the PHY.
+
+Required properties:
+
+ - reg : The ID number for the phy, usually a small integer
+
+Example:
+
+ethernet-phy@0 {
+	compatible = "ethernet-phy-id0141.0e90", "ethernet-phy-ieee802.3-c22";
+	interrupt-parent = <&PIC>;
+	interrupts = <35 IRQ_TYPE_EDGE_RISING>;
+	reg = <0>;
+
+	resets = <&rst 8>;
+	reset-names = "phy";
+	reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+	reset-assert-us = <1000>;
+	reset-deassert-us = <2000>;
+};
diff --git a/doc/device-tree-bindings/net/phy/adin.txt b/doc/device-tree-bindings/net/phy/adin.txt
new file mode 100644
index 00000000000..d4bab57e2d5
--- /dev/null
+++ b/doc/device-tree-bindings/net/phy/adin.txt
@@ -0,0 +1,26 @@
+* Analog Devices ADIN PHY Device Tree binding
+
+Required properties:
+- reg: PHY address
+
+Optional properties:
+- adi,rx-internal-delay-ps: RGMII RX Clock Delay used only when PHY operates
+	in RGMII mode with internal delay (phy-mode is 'rgmii-id' or
+	'rgmii-rxid') in pico-seconds.
+- adi,tx-internal-delay-ps: RGMII TX Clock Delay used only when PHY operates
+	in RGMII mode with internal delay (phy-mode is 'rgmii-id' or
+	'rgmii-txid') in pico-seconds.
+- adi,phy-mode-override: Override phy-mode property for adin. This is useful
+	when a single device tree supports an adin PHY (e.g. ADIN1300)
+	or another PHY (e.g. AR8033) at the same address, but they require
+	different phy-modes.
+
+Example:
+
+	ethernet-phy@0 {
+		reg = <0>;
+
+		adi,rx-internal-delay-ps = <1800>;
+		adi,tx-internal-delay-ps = <2200>;
+		adi,phy-mode-override = "rgmii-id";
+	};
diff --git a/doc/device-tree-bindings/net/phy/atheros.txt b/doc/device-tree-bindings/net/phy/atheros.txt
new file mode 100644
index 00000000000..a72c6b050d3
--- /dev/null
+++ b/doc/device-tree-bindings/net/phy/atheros.txt
@@ -0,0 +1,35 @@
+* Qualcomm Atheros PHY Device Tree binding
+
+Required properties:
+- reg: PHY address
+
+Optional properties:
+- qca,clk-out-frequency: Clock frequency of the CLK_25M pin in Hz.
+	Either 25000000, 50000000, 62500000 or 125000000.
+- qca,clk-out-strength: Clock output buffer driver strength.
+    Supported values are defined in dt-bindings/net/qca-ar803x.h
+- qca,keep-pll-enabled: Keep the PLL running if no link is present.
+	Don't go into hibernation mode.
+	Only supported on the AR8031/AR8033.
+- vddio-supply: RGMII I/O voltage regulator
+	Only supported on the AR8031/AR8033.
+
+Optional subnodes:
+- vddio-regulator: Initial data for the VDDIO regulator, as covered
+    doc/device-tree-bindings/regulator/regulator.txt
+
+Example:
+	#include <dt-bindings/net/qca-ar803x.h>
+
+	ethernet-phy@0 {
+		reg = <0>;
+		qca,clk-out-frequency = <125000000>;
+		qca,keep-pll-enabled;
+
+		vddio-supply = <&vddio>;
+
+		vddio: vddio-regulator {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+		};
+	};
diff --git a/doc/device-tree-bindings/net/snps,dwc-qos-ethernet.txt b/doc/device-tree-bindings/net/snps,dwc-qos-ethernet.txt
new file mode 100644
index 00000000000..d93f71ce834
--- /dev/null
+++ b/doc/device-tree-bindings/net/snps,dwc-qos-ethernet.txt
@@ -0,0 +1,166 @@
+* Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)
+
+This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
+IP block. The IP supports multiple options for bus type, clocking and reset
+structure, and feature list. Consequently, a number of properties and list
+entries in properties are marked as optional, or only required in specific HW
+configurations.
+
+Required properties:
+- compatible: One of:
+  - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
+    Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
+  - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
+    Represents the IP core when integrated into the NVIDIA Tegra186 SoC.
+  - "snps,dwc-qos-ethernet-4.10"
+    This combination is deprecated. It should be treated as equivalent to
+    "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
+    compatible with earlier revisions of this binding.
+- reg: Address and length of the register set for the device
+- clocks: Phandle and clock specifiers for each entry in clock-names, in the
+  same order. See ../clock/clock-bindings.txt.
+- clock-names: May contain any/all of the following depending on the IP
+  configuration, in any order:
+  - "tx"
+    The EQOS transmit path clock. The HW signal name is clk_tx_i.
+    In some configurations (e.g. GMII/RGMII), this clock also drives the PHY TX
+    path. In other configurations, other clocks (such as tx_125, rmii) may
+    drive the PHY TX path.
+  - "rx"
+    The EQOS receive path clock. The HW signal name is clk_rx_i.
+    In some configurations (e.g. GMII/RGMII), this clock is derived from the
+    PHY's RX clock output. In other configurations, other clocks (such as
+    rx_125, rmii) may drive the EQOS RX path.
+    In cases where the PHY clock is directly fed into the EQOS receive path
+    without intervening logic, the DT need not represent this clock, since it
+    is assumed to be fully under the control of the PHY device/driver. In
+    cases where SoC integration adds additional logic to this path, such as a
+    SW-controlled clock gate, this clock should be represented in DT.
+  - "slave_bus"
+    The CPU/slave-bus (CSR) interface clock. This applies to any bus type;
+    APB, AHB, AXI, etc. The HW signal name is hclk_i (AHB) or clk_csr_i (other
+    buses).
+  - "master_bus"
+    The master bus interface clock. Only required in configurations that use a
+    separate clock for the master and slave bus interfaces. The HW signal name
+    is hclk_i (AHB) or aclk_i (AXI).
+  - "ptp_ref"
+    The PTP reference clock. The HW signal name is clk_ptp_ref_i.
+  - "phy_ref_clk"
+    This clock is deprecated and should not be used by new compatible values.
+    It is equivalent to "tx".
+  - "apb_pclk"
+    This clock is deprecated and should not be used by new compatible values.
+    It is equivalent to "slave_bus".
+
+  Note: Support for additional IP configurations may require adding the
+  following clocks to this list in the future: clk_rx_125_i, clk_tx_125_i,
+  clk_pmarx_0_i, clk_pmarx1_i, clk_rmii_i, clk_revmii_rx_i, clk_revmii_tx_i.
+  Configurations exist where multiple similar clocks are used at once, e.g. all
+  of clk_rx_125_i, clk_pmarx_0_i, clk_pmarx1_i. For this reason it is best to
+  extend the binding with a separate clock-names entry for each of those RX
+  clocks, rather than repurposing the existing "rx" clock-names entry as a
+  generic/logical clock in a similar fashion to "master_bus" and "slave_bus".
+  This will allow easy support for configurations that support multiple PHY
+  interfaces using a mux, and hence need to have explicit control over
+  specific RX clocks.
+
+  The following compatible values require the following set of clocks:
+  - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10":
+    - "slave_bus"
+    - "master_bus"
+    - "rx"
+    - "tx"
+    - "ptp_ref"
+  - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10":
+    - "slave_bus"
+    - "master_bus"
+    - "tx"
+    - "ptp_ref"
+  - "snps,dwc-qos-ethernet-4.10" (deprecated):
+    - "phy_ref_clk"
+    - "apb_clk"
+- interrupt-parent: Should be the phandle for the interrupt controller
+  that services interrupts for this device
+- interrupts: Should contain the core's combined interrupt signal
+- phy-mode: See ethernet.txt file in the same directory
+- resets: Phandle and reset specifiers for each entry in reset-names, in the
+  same order. See ../reset/reset.txt.
+- reset-names: May contain any/all of the following depending on the IP
+  configuration, in any order:
+  - "eqos". The reset to the entire module. The HW signal name is hreset_n
+    (AHB) or aresetn_i (AXI).
+
+  The following compatible values require the following set of resets:
+  (the reset properties may be omitted if empty)
+  - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10":
+    - "eqos".
+  - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10":
+    - None.
+  - "snps,dwc-qos-ethernet-4.10" (deprecated):
+    - None.
+
+Optional properties:
+- dma-coherent: Present if dma operations are coherent
+- mac-address: See ethernet.txt in the same directory
+- local-mac-address: See ethernet.txt in the same directory
+- phy-reset-gpios: Phandle and specifier for any GPIO used to reset the PHY.
+  See ../gpio/gpio.txt.
+- snps,en-lpi: If present it enables use of the AXI low-power interface
+- snps,write-requests: Number of write requests that the AXI port can issue.
+  It depends on the SoC configuration.
+- snps,read-requests: Number of read requests that the AXI port can issue.
+  It depends on the SoC configuration.
+- snps,burst-map: Bitmap of allowed AXI burst lengts, with the LSB
+  representing 4, then 8 etc.
+- snps,txpbl: DMA Programmable burst length for the TX DMA
+- snps,rxpbl: DMA Programmable burst length for the RX DMA
+- snps,en-tx-lpi-clockgating: Enable gating of the MAC TX clock during
+  TX low-power mode.
+- phy-handle: See ethernet.txt file in the same directory
+- mdio device tree subnode: When the GMAC has a phy connected to its local
+    mdio, there must be device tree subnode with the following
+    required properties:
+    - compatible: Must be "snps,dwc-qos-ethernet-mdio".
+    - #address-cells: Must be <1>.
+    - #size-cells: Must be <0>.
+
+    For each phy on the mdio bus, there must be a node with the following
+    fields:
+
+    - reg: phy id used to communicate to phy.
+    - device_type: Must be "ethernet-phy".
+    - fixed-mode device tree subnode: see fixed-link.txt in the same directory
+
+Examples:
+ethernet2@40010000 {
+	clock-names = "phy_ref_clk", "apb_pclk";
+	clocks = <&clkc 17>, <&clkc 15>;
+	compatible = "snps,dwc-qos-ethernet-4.10";
+	interrupt-parent = <&intc>;
+	interrupts = <0x0 0x1e 0x4>;
+	reg = <0x40010000 0x4000>;
+	phy-handle = <&phy2>;
+	phy-mode = "gmii";
+	phy-reset-gpios = <&gpioctlr 43 GPIO_ACTIVE_LOW>;
+
+	snps,en-tx-lpi-clockgating;
+	snps,en-lpi;
+	snps,write-requests = <2>;
+	snps,read-requests = <16>;
+	snps,burst-map = <0x7>;
+	snps,txpbl = <8>;
+	snps,rxpbl = <2>;
+
+	dma-coherent;
+
+	mdio {
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+		phy2: phy@1 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			device_type = "ethernet-phy";
+			reg = <0x1>;
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/net/stmmac.txt b/doc/device-tree-bindings/net/stmmac.txt
new file mode 100644
index 00000000000..5f025174cf4
--- /dev/null
+++ b/doc/device-tree-bindings/net/stmmac.txt
@@ -0,0 +1,63 @@
+* STMicroelectronics 10/100/1000 Ethernet driver (GMAC)
+
+Required properties:
+- compatible: Should be "snps,dwmac-<ip_version>" "snps,dwmac"
+	For backwards compatibility: "st,spear600-gmac" is also supported.
+- reg: Address and length of the register set for the device
+- interrupt-parent: Should be the phandle for the interrupt controller
+  that services interrupts for this device
+- interrupts: Should contain the STMMAC interrupts
+- interrupt-names: Should contain the interrupt names "macirq"
+  "eth_wake_irq" if this interrupt is supported in the "interrupts"
+  property
+- phy-mode: See ethernet.txt file in the same directory.
+- snps,reset-gpio	gpio number for phy reset.
+- snps,reset-active-low boolean flag to indicate if phy reset is active low.
+- snps,reset-delays-us  is triplet of delays
+	The 1st cell is reset pre-delay in micro seconds.
+	The 2nd cell is reset pulse in micro seconds.
+	The 3rd cell is reset post-delay in micro seconds.
+- snps,pbl		Programmable Burst Length
+- snps,fixed-burst	Program the DMA to use the fixed burst mode
+- snps,mixed-burst	Program the DMA to use the mixed burst mode
+- snps,force_thresh_dma_mode	Force DMA to use the threshold mode for
+				both tx and rx
+- snps,force_sf_dma_mode	Force DMA to use the Store and Forward
+				mode for both tx and rx. This flag is
+				ignored if force_thresh_dma_mode is set.
+- snps,multicast-filter-bins:	Number of multicast filter hash bins
+				supported by this device instance
+- snps,perfect-filter-entries:	Number of perfect filter entries supported
+				by this device instance
+
+Optional properties:
+- resets: Should contain a phandle to the STMMAC reset signal, if any
+- reset-names: Should contain the reset signal name "stmmaceth", if a
+	reset phandle is given
+- max-frame-size: See ethernet.txt file in the same directory
+- clocks: If present, the first clock should be the GMAC main clock,
+  further clocks may be specified in derived bindings.
+- clock-names: One name for each entry in the clocks property, the
+  first one should be "stmmaceth".
+- clk_ptp_ref: this is the PTP reference clock; in case of the PTP is
+  available this clock is used for programming the Timestamp Addend Register.
+  If not passed then the system clock will be used and this is fine on some
+  platforms.
+- snps,burst_len: The AXI burst lenth value of the AXI BUS MODE register.
+
+Examples:
+
+	gmac0: ethernet@e0800000 {
+		compatible = "st,spear600-gmac";
+		reg = <0xe0800000 0x8000>;
+		interrupt-parent = <&vic1>;
+		interrupts = <24 23>;
+		interrupt-names = "macirq", "eth_wake_irq";
+		mac-address = [000000000000]; /* Filled in by U-Boot */
+		max-frame-size = <3800>;
+		phy-mode = "gmii";
+		snps,multicast-filter-bins = <256>;
+		snps,perfect-filter-entries = <128>;
+		clocks = <&clock>;
+		clock-names = "stmmaceth";
+	};
diff --git a/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
new file mode 100644
index 00000000000..882728d5413
--- /dev/null
+++ b/doc/device-tree-bindings/nvmxip/nvmxip_qspi.txt
@@ -0,0 +1,56 @@
+Specifying NVMXIP information for devices
+======================================
+
+QSPI XIP flash device nodes
+---------------------------
+
+Each flash device should have its own node.
+
+Each node must specify the following fields:
+
+1)
+		compatible = "nvmxip,qspi";
+
+This allows to bind the flash device with the nvmxip_qspi driver
+If a platform has its own driver, please provide your own compatible
+string.
+
+2)
+		reg = /bits/ 64 <0x08000000 0x00200000>;
+
+The start address and size of the flash device. The values give here are an
+example (when the cell size is 2).
+
+When cell size is 1, the reg field looks like this:
+
+		reg = <0x08000000 0x00200000>;
+
+3)
+
+		lba_shift = <9>;
+
+The number of bit shifts used to calculate the size in bytes of one block.
+In this example the block size is 1 << 9 = 2 ^ 9 = 512 bytes
+
+4)
+
+		lba = <4096>;
+
+The number of blocks.
+
+Example of multiple flash devices
+----------------------------------------------------
+
+	nvmxip-qspi1@08000000 {
+		compatible = "nvmxip,qspi";
+		reg = /bits/ 64 <0x08000000 0x00200000>;
+		lba_shift = <9>;
+		lba = <4096>;
+	};
+
+	nvmxip-qspi2@08200000 {
+		compatible = "nvmxip,qspi";
+		reg = /bits/ 64 <0x08200000 0x00100000>;
+		lba_shift = <9>;
+		lba = <2048>;
+	};
diff --git a/doc/device-tree-bindings/pci/armada8k-pcie.txt b/doc/device-tree-bindings/pci/armada8k-pcie.txt
new file mode 100644
index 00000000000..7230f104433
--- /dev/null
+++ b/doc/device-tree-bindings/pci/armada8k-pcie.txt
@@ -0,0 +1,49 @@
+Armada-8K PCIe DT details:
+==========================
+
+Armada-8k uses synopsis designware PCIe controller.
+
+Required properties:
+- compatible : should be "marvell,armada8k-pcie", "snps,dw-pcie".
+- reg: base addresses and lengths of the pcie control and global control registers.
+ "ctrl" registers points to the global control registers, while the "config" space
+ points to the pcie configuration registers as mentioned in dw-pcie dt bindings in the link below.
+- interrupt-map-mask and interrupt-map, standard PCI properties to
+  define the mapping of the PCIe interface to interrupt numbers.
+- All other definitions as per generic PCI bindings
+See Linux kernel documentation:
+"Documentation/devicetree/bindings/pci/designware-pcie.txt"
+
+Optional properties:
+PHY support is still not supported for armada-8k, once it will, the following parameters can be used:
+- phys		    : phandle to phy node associated with pcie controller.
+- phy-names	    : must be "pcie-phy"
+- marvell,reset-gpio :  specifies a gpio that needs to be activated for plug-in
+			card reset signal release.
+Example:
+
+cpm_pcie0: pcie@f2600000 {
+	compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
+	reg = <0 0xf2600000 0 0x10000>,
+	      <0 0xf6f00000 0 0x80000>;
+	reg-names = "ctrl", "config";
+	#address-cells = <3>;
+	#size-cells = <2>;
+	#interrupt-cells = <1>;
+	device_type = "pci";
+	dma-coherent;
+
+	bus-range = <0 0xff>;
+	ranges =
+		/* downstream I/O */
+		<0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000
+		/* non-prefetchable memory */
+		0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;
+	interrupt-map-mask = <0 0 0 0>;
+	interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+	interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+	num-lanes = <1>;
+	clocks = <&cpm_syscon0 1 13>;
+	marvell,reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_HIGH>;
+	status = "disabled";
+};
diff --git a/doc/device-tree-bindings/pci/mediatek-pcie.txt b/doc/device-tree-bindings/pci/mediatek-pcie.txt
new file mode 100644
index 00000000000..2f9f549b7a3
--- /dev/null
+++ b/doc/device-tree-bindings/pci/mediatek-pcie.txt
@@ -0,0 +1,122 @@
+MediaTek Gen2 PCIe controller
+
+Required properties:
+- compatible: Should contain one of the following strings:
+	"mediatek,mt7623-pcie"
+- device_type: Must be "pci"
+- reg: Base addresses and lengths of the PCIe subsys and root ports.
+- reg-names: Names of the above areas to use during resource lookup.
+- #address-cells: Address representation for root ports (must be 3)
+- #size-cells: Size representation for root ports (must be 2)
+- clocks: Must contain an entry for each entry in clock-names.
+- clock-names:
+  Mandatory entries:
+   - sys_ckN :transaction layer and data link layer clock
+  Required entries for MT7623:
+   - free_ck :for reference clock of PCIe subsys
+  where N starting from 0 to one less than the number of root ports.
+- phys: List of PHY specifiers (used by generic PHY framework).
+- phy-names : Must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
+  number of PHYs as specified in *phys* property.
+- power-domains: A phandle and power domain specifier pair to the power domain
+  which is responsible for collapsing and restoring power to the peripheral.
+- bus-range: Range of bus numbers associated with this controller.
+- ranges: Ranges for the PCI memory and I/O regions.
+
+Required properties for MT7623:
+- #interrupt-cells: Size representation for interrupts (must be 1)
+- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
+  Please refer to the standard PCI bus binding document for a more detailed
+  explanation.
+- resets: Must contain an entry for each entry in reset-names.
+- reset-names: Must be "pcie-rst0", "pcie-rst1", "pcie-rstN".. based on the
+  number of root ports.
+
+In addition, the device tree node must have sub-nodes describing each
+PCIe port interface, having the following mandatory properties:
+
+Required properties:
+- device_type: Must be "pci"
+- reg: Only the first four bytes are used to refer to the correct bus number
+  and device number.
+- #address-cells: Must be 3
+- #size-cells: Must be 2
+- #interrupt-cells: Must be 1
+- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties
+  Please refer to the standard PCI bus binding document for a more detailed
+  explanation.
+- ranges: Sub-ranges distributed from the PCIe controller node. An empty
+  property is sufficient.
+
+Examples for MT7623:
+
+	hifsys: syscon@1a000000 {
+		compatible = "mediatek,mt7623-hifsys",
+			     "syscon";
+		reg = <0x1a000000 0x1000>;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	pcie: pcie@1a140000 {
+		compatible = "mediatek,mt7623-pcie";
+		device_type = "pci";
+		reg = <0x1a140000 0x1000>, /* PCIe shared registers */
+		      <0x1a142000 0x1000>, /* Port0 registers */
+		      <0x1a143000 0x1000>, /* Port1 registers */
+		      <0x1a144000 0x1000>; /* Port2 registers */
+		reg-names = "subsys", "port0", "port1", "port2";
+		#address-cells = <3>;
+		#size-cells = <2>;
+		#interrupt-cells = <1>;
+		interrupt-map-mask = <0xf800 0 0 0>;
+		interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
+				<0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
+				<0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&topckgen CLK_TOP_ETHIF_SEL>,
+			 <&hifsys CLK_HIFSYS_PCIE0>,
+			 <&hifsys CLK_HIFSYS_PCIE1>,
+			 <&hifsys CLK_HIFSYS_PCIE2>;
+		clock-names = "free_ck", "sys_ck0", "sys_ck1", "sys_ck2";
+		resets = <&hifsys HIFSYS_PCIE0_RST>,
+			 <&hifsys HIFSYS_PCIE1_RST>,
+			 <&hifsys HIFSYS_PCIE2_RST>;
+		reset-names = "pcie-rst0", "pcie-rst1", "pcie-rst2";
+		phys = <&pcie0_phy PHY_TYPE_PCIE>, <&pcie1_phy PHY_TYPE_PCIE>,
+		       <&pcie2_phy PHY_TYPE_PCIE>;
+		phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2";
+		power-domains = <&scpsys MT7623_POWER_DOMAIN_HIF>;
+		bus-range = <0x00 0xff>;
+		ranges = <0x81000000 0 0x1a160000 0x1a160000 0 0x00010000	/* I/O space */
+			  0x83000000 0 0x60000000 0x60000000 0 0x10000000>;	/* memory space */
+
+		pcie@0,0 {
+			reg = <0x0000 0 0 0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0>;
+			interrupt-map = <0 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>;
+			ranges;
+		};
+
+		pcie@1,0 {
+			reg = <0x0800 0 0 0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0>;
+			interrupt-map = <0 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
+			ranges;
+		};
+
+		pcie@2,0 {
+			reg = <0x1000 0 0 0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			interrupt-map-mask = <0 0 0 0>;
+			interrupt-map = <0 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
+			ranges;
+		};
+	};
diff --git a/doc/device-tree-bindings/pci/x86-pci.txt b/doc/device-tree-bindings/pci/x86-pci.txt
new file mode 100644
index 00000000000..e6d4b375353
--- /dev/null
+++ b/doc/device-tree-bindings/pci/x86-pci.txt
@@ -0,0 +1,52 @@
+x86 PCI DT details:
+===================
+
+Some options are available to affect how PCI operates on x86.
+
+Optional properties:
+- u-boot,skip-auto-config-until-reloc : Don't set up PCI configuration until
+	after U-Boot has relocated. Normally if PCI is used before relocation,
+	this happens before relocation also. Some platforms set up static
+	configuration in TPL/SPL to reduce code size and boot time, since these
+	phases only know about a small subset of PCI devices.
+
+For PCI devices the following optional property is available:
+
+- pci,no-autoconfig : Don't automatically configure this PCI device at all.
+	This is used when the device is statically configured and must maintain
+	this same config throughout the boot process. An example is a serial
+	UART being used to debug PCI configuration, since reconfiguring it stops
+	the UART from working until the driver is re-probed, and this can cause
+	output to be lost. This should not generally be used in production code,
+	although it is often harmless.
+
+- u-boot,pci-pre-reloc : List of vendor/device IDs to bind before relocation, even
+	if they are not bridges. This is useful if the device is needed (e.g. a
+	UART). The format is 0xvvvvdddd where d is the device ID and v is the
+	vendor ID.
+
+Example:
+
+pci {
+	compatible = "pci-x86";
+	#address-cells = <3>;
+	#size-cells = <2>;
+	bootph-all;
+	ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000
+		0x42000000 0x0 0xb0000000 0xb0000000 0 0x10000000
+		0x01000000 0x0 0x1000 0x1000 0 0xefff>;
+	u-boot,skip-auto-config-until-reloc;
+	u-boot,pci-pre-reloc = <
+		PCI_VENDEV(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL_UART2)>;
+
+	serial: serial@18,2 {
+		reg = <0x0200c210 0 0 0 0>;
+		bootph-all;
+		compatible = "intel,apl-ns16550";
+		early-regs = <0xde000000 0x20>;
+		reg-shift = <2>;
+		clock-frequency = <1843200>;
+		current-speed = <115200>;
+		pci,no-autoconfig;
+	};
+};
diff --git a/doc/device-tree-bindings/pci_endpoint/cdns,cdns-pcie-ep.txt b/doc/device-tree-bindings/pci_endpoint/cdns,cdns-pcie-ep.txt
new file mode 100644
index 00000000000..77054305593
--- /dev/null
+++ b/doc/device-tree-bindings/pci_endpoint/cdns,cdns-pcie-ep.txt
@@ -0,0 +1,18 @@
+* Cadence PCIe endpoint controller
+
+Required properties:
+- compatible: Should contain "cdns,cdns-pcie-ep" to identify the IP used.
+- reg: Should contain the controller register base address.
+
+Optional properties:
+- max-functions: Maximum number of functions that can be configured (default 1).
+- cdns,max-outbound-regions: Set to maximum number of outbound regions (default 8)
+
+Example:
+
+pcie_ep@fc000000 {
+	compatible = "cdns,cdns-pcie-ep";
+	reg = <0x0 0xfc000000 0x0 0x01000000>;
+	cdns,max-outbound-regions = <16>;
+	max-functions = /bits/ 8 <8>;
+};
diff --git a/doc/device-tree-bindings/phy/mvebu_comphy.txt b/doc/device-tree-bindings/phy/mvebu_comphy.txt
new file mode 100644
index 00000000000..65b83848596
--- /dev/null
+++ b/doc/device-tree-bindings/phy/mvebu_comphy.txt
@@ -0,0 +1,68 @@
+Marvell COMPHY SerDes lane bindings
+=====================================
+
+The COMPHY node includes a description of the COMPHY SerDes lane configuration.
+The COMPHY driver initializes the MUX of the SerDes lanes, and powers up the SerDes
+by dependencies on the FDT blob configurations
+
+Mandatory properties:
+SoC specific:
+	- compatible:
+		The compatible should include "marvell,mvebu-comphy"
+		and the COMPHY per chip compatible:
+		"marvell,comphy-cp110" for CP110 available in Aramda70x0/80x0.
+		The COMPHY per chip used to set which MUX configuration to use, and COMPHY power-up revision.
+	- reg: Base address and size of the COMPHY and hpipe units.
+	- max-lanes: Maximum number of comphy lanes.
+	- mux-bitcount: Number of bits that are allocated for every MUX in the COMPHY-selector register.
+Board specific:
+	- PHY: Entry that include the configuration of the PHY.
+	  Every PHY should have the below parameters:
+	  - phy-type: the mode of the PHY
+	    Possible modes located in include/dt-bindings/comphy/comphy_data.h
+	Optional properties:
+	  - phy-speed: the speed of the PHY
+	    Possible speeds values located in include/dt-bindings/comphy/comphy_data.h
+	  - phy-invert: Polarity invert (COMPHY_POLARITY_TXD_INVERT/COMPHY_POLARITY_RXD_INVERT)
+	    the possible bits under include/dt-bindings/comphy/comphy_data.h
+	  - clk-src: Set the clock source of PCIe, if configured to PCIe clock output
+	    This relevant for SerDes lane 5 only (by default, lane 4 is the clock source)
+	    for Armada-7040 boards.
+	  - endpoint: Optional boolean specifying this SerDes should be configured as PCIe endpoint.
+
+Example:
+	cpm_comphy: comphy@441000 {
+		compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
+		reg = <0x441000 0x8>, <0x120000 0x8>;
+		mux-bitcount = <4>;
+		max-lanes = <6>;
+
+		/*
+		 * CP110 Serdes Configuration:
+		 * Lane 0: SGMII1
+		 * Lane 1: SATA 0
+		 * Lane 2: USB HOST 0
+		 * Lane 3: SATA1
+		 * Lane 4: SFI (10G)
+		 * Lane 5: SGMII2
+		 */
+		phy0 {
+			phy-type = <COMPHY_TYPE_SGMII1>;
+			phy-speed = <COMPHY_SPEED_1_25G>;
+		};
+		phy1 {
+			phy-type = <COMPHY_TYPE_SATA0>;
+		};
+		phy2 {
+			phy-type = <COMPHY_TYPE_USB3_HOST0>;
+		};
+		phy3 {
+			phy-type = <COMPHY_TYPE_SATA1>;
+		};
+		phy4 {
+			phy-type = <COMPHY_TYPE_SFI>;
+		};
+		phy5 {
+			phy-type = <COMPHY_TYPE_SGMII2>;
+		};
+	};
diff --git a/doc/device-tree-bindings/phy/no-op.txt b/doc/device-tree-bindings/phy/no-op.txt
new file mode 100644
index 00000000000..a3381122e68
--- /dev/null
+++ b/doc/device-tree-bindings/phy/no-op.txt
@@ -0,0 +1,16 @@
+NOP PHY driver
+
+This driver is used to stub PHY operations in a driver (USB, SATA).
+This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework
+and there is no actual PHY harwdare to drive.
+
+Required properties:
+- compatible     : must contain "nop-phy"
+- #phy-cells     : must contain <0>
+
+Example:
+
+nop_phy {
+	compatible = "nop-phy";
+	#phy-cells = <0>;
+};
diff --git a/doc/device-tree-bindings/phy/phy-mtk-tphy.txt b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
new file mode 100644
index 00000000000..300e236b5b0
--- /dev/null
+++ b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
@@ -0,0 +1,154 @@
+MediaTek T-PHY binding
+--------------------------
+
+T-phy controller supports physical layer functionality for a number of
+controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
+
+Required properties (controller (parent) node):
+ - compatible	: should be one of
+		  "mediatek,generic-tphy-v1"
+		  "mediatek,generic-tphy-v2"
+		  "mediatek,mt8195-tphy"
+
+- #address-cells:	the number of cells used to represent physical
+		base addresses.
+- #size-cells:	the number of cells used to represent the size of an address.
+- ranges:	the address mapping relationship to the parent, defined with
+		- empty value: if optional 'reg' is used.
+		- non-empty value: if optional 'reg' is not used. should set
+			the child's base address to 0, the physical address
+			within parent's address space, and the length of
+			the address map.
+
+Required nodes	: a sub-node is required for each port the controller
+		  provides. Address range information including the usual
+		  'reg' property is used inside these nodes to describe
+		  the controller's topology.
+
+Optional properties (controller (parent) node):
+ - reg		: offset and length of register shared by multiple ports,
+		  exclude port's private register.
+ - mediatek,src-ref-clk-mhz	: frequency of reference clock for slew rate
+		  calibrate
+ - mediatek,src-coef	: coefficient for slew rate calibrate, depends on
+		  SoC process
+
+Required properties (port (child) node):
+- reg		: address and length of the register set for the port.
+- #phy-cells	: should be 1 (See second example)
+		  cell after port phandle is phy type from:
+			- PHY_TYPE_USB2
+			- PHY_TYPE_USB3
+			- PHY_TYPE_PCIE
+			- PHY_TYPE_SATA
+
+Optional properties (port (child) node):
+- clocks	: a list of phandle + clock-specifier pairs, one for each
+		  entry in clock-names
+- clock-names	: may contain
+		  "ref": 48M reference clock for HighSpeed (digital) phy; and 26M
+			reference clock for SuperSpeed (digital) phy, sometimes is
+			24M, 25M or 27M, depended on platform.
+		  "da_ref": the reference clock of analog phy, used if the clocks
+			of analog and digital phys are separated, otherwise uses
+			"ref" clock only if needed.
+- mediatek,eye-vrt	: The selection of VRT reference voltage (U2 phy),
+		  the value is [1, 7]
+- mediatek,eye-term	: The selection of HS_TX TERM reference voltage (U2 phy),
+		  the value is [1, 7]
+- mediatek,discth	: The selection of disconnect threshold (U2 phy),
+		  the value is [1, 15]
+- mediatek,pre-emphasis	: The level of pre-emphasis which used to widen
+		  the eye opening and boost eye swing,
+		  the value is [1, 3]
+
+Example:
+
+	u3phy2: usb-phy@1a244000 {
+		compatible = "mediatek,generic-tphy-v1";
+		reg = <0x1a244000 0x0700>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		status = "disabled";
+
+		u2port1: usb-phy@1a244800 {
+			reg = <0x1a244800 0x0100>;
+			clocks = <&topckgen CLK_TOP_USB_PHY48M>;
+			clock-names = "ref";
+			#phy-cells = <1>;
+			status = "okay";
+		};
+
+		u3port1: usb-phy@1a244900 {
+			reg = <0x1a244900 0x0700>;
+			clocks = <&clk26m>;
+			clock-names = "ref";
+			#phy-cells = <1>;
+			status = "okay";
+		};
+	};
+
+Specifying phy control of devices
+---------------------------------
+
+Device nodes should specify the configuration required in their "phys"
+property, containing a phandle to the phy port node and a device type;
+phy-names for each port are optional.
+
+Example:
+
+#include <dt-bindings/phy/phy.h>
+
+usb30: usb@11270000 {
+	...
+	phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
+	phy-names = "usb2-0", "usb3-0";
+	...
+};
+
+Layout differences of banks between TPHY V1 and V2
+-------------------------------------------------------------
+IP V1:
+port        offset    bank
+shared      0x0000    SPLLC
+            0x0100    FMREG
+u2 port0    0x0800    U2PHY_COM
+u3 port0    0x0900    U3PHYD
+            0x0a00    U3PHYD_BANK2
+            0x0b00    U3PHYA
+            0x0c00    U3PHYA_DA
+u2 port1    0x1000    U2PHY_COM
+u3 port1    0x1100    U3PHYD
+            0x1200    U3PHYD_BANK2
+            0x1300    U3PHYA
+            0x1400    U3PHYA_DA
+u2 port2    0x1800    U2PHY_COM
+            ...
+
+IP V2:
+port        offset    bank
+u2 port0    0x0000    MISC
+            0x0100    FMREG
+            0x0300    U2PHY_COM
+u3 port0    0x0700    SPLLC
+            0x0800    CHIP
+            0x0900    U3PHYD
+            0x0a00    U3PHYD_BANK2
+            0x0b00    U3PHYA
+            0x0c00    U3PHYA_DA
+u2 port1    0x1000    MISC
+            0x1100    FMREG
+            0x1300    U2PHY_COM
+u3 port1    0x1700    SPLLC
+            0x1800    CHIP
+            0x1900    U3PHYD
+            0x1a00    U3PHYD_BANK2
+            0x1b00    U3PHYA
+            0x1c00    U3PHYA_DA
+u2 port2    0x2000    MISC
+            ...
+
+    SPLLC shared by u3 ports and FMREG shared by u2 ports on
+TPHY V1 are put back into each port; a new bank MISC for
+u2 ports and CHIP for u3 ports are added on TPHY V2.
diff --git a/doc/device-tree-bindings/phy/phy-stih407-usb.txt b/doc/device-tree-bindings/phy/phy-stih407-usb.txt
new file mode 100644
index 00000000000..371a7fec0aa
--- /dev/null
+++ b/doc/device-tree-bindings/phy/phy-stih407-usb.txt
@@ -0,0 +1,24 @@
+ST STiH407 USB PHY controller
+
+This file documents the dt bindings for the usb picoPHY driver which is the PHY for both USB2 and USB3
+host controllers (when controlling usb2/1.1 devices) available on STiH407 SoC family from STMicroelectronics.
+
+Required properties:
+- compatible		: should be "st,stih407-usb2-phy"
+- st,syscfg		: phandle of sysconfig bank plus integer array containing phyparam and phyctrl register offsets
+- resets		: list of phandle and reset specifier pairs. There should be two entries, one
+			  for the whole phy and one for the port
+- reset-names		: list of reset signal names. Should be "global" and "port"
+See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
+See: Documentation/devicetree/bindings/reset/reset.txt
+
+Example:
+
+usb2_picophy0: usbpicophy {
+	compatible	= "st,stih407-usb2-phy";
+	#phy-cells	= <0>;
+	st,syscfg	= <&syscfg_core 0x100 0xf4>;
+	resets		= <&softreset STIH407_PICOPHY_SOFTRESET>,
+			  <&picophyreset STIH407_PICOPHY0_RESET>;
+	reset-names	= "global", "port";
+};
diff --git a/doc/device-tree-bindings/phy/sun4i-usb-phy.txt b/doc/device-tree-bindings/phy/sun4i-usb-phy.txt
new file mode 100644
index 00000000000..c1ce5a0a652
--- /dev/null
+++ b/doc/device-tree-bindings/phy/sun4i-usb-phy.txt
@@ -0,0 +1,65 @@
+Allwinner sun4i USB PHY
+-----------------------
+
+Required properties:
+- compatible : should be one of
+  * allwinner,sun4i-a10-usb-phy
+  * allwinner,sun5i-a13-usb-phy
+  * allwinner,sun6i-a31-usb-phy
+  * allwinner,sun7i-a20-usb-phy
+  * allwinner,sun8i-a23-usb-phy
+  * allwinner,sun8i-a33-usb-phy
+  * allwinner,sun8i-a83t-usb-phy
+  * allwinner,sun8i-h3-usb-phy
+  * allwinner,sun8i-v3s-usb-phy
+  * allwinner,sun50i-a64-usb-phy
+- reg : a list of offset + length pairs
+- reg-names :
+  * "phy_ctrl"
+  * "pmu0" for H3, V3s and A64
+  * "pmu1"
+  * "pmu2" for sun4i, sun6i, sun7i, sun8i-a83t or sun8i-h3
+  * "pmu3" for sun8i-h3
+- #phy-cells : from the generic phy bindings, must be 1
+- clocks : phandle + clock specifier for the phy clocks
+- clock-names :
+  * "usb_phy" for sun4i, sun5i or sun7i
+  * "usb0_phy", "usb1_phy" and "usb2_phy" for sun6i
+  * "usb0_phy", "usb1_phy" for sun8i
+  * "usb0_phy", "usb1_phy", "usb2_phy" and "usb2_hsic_12M" for sun8i-a83t
+  * "usb0_phy", "usb1_phy", "usb2_phy" and "usb3_phy" for sun8i-h3
+- resets : a list of phandle + reset specifier pairs
+- reset-names :
+  * "usb0_reset"
+  * "usb1_reset"
+  * "usb2_reset" for sun4i, sun6i, sun7i, sun8i-a83t or sun8i-h3
+  * "usb3_reset" for sun8i-h3
+
+Optional properties:
+- usb0_id_det-gpios : gpio phandle for reading the otg id pin value
+- usb0_vbus_det-gpios : gpio phandle for detecting the presence of usb0 vbus
+- usb0_vbus_power-supply: power-supply phandle for usb0 vbus presence detect
+- usb0_vbus-supply : regulator phandle for controller usb0 vbus
+- usb1_vbus-supply : regulator phandle for controller usb1 vbus
+- usb2_vbus-supply : regulator phandle for controller usb2 vbus
+- usb3_vbus-supply : regulator phandle for controller usb3 vbus
+
+Example:
+	usbphy: phy@01c13400 {
+		#phy-cells = <1>;
+		compatible = "allwinner,sun4i-a10-usb-phy";
+		/* phy base regs, phy1 pmu reg, phy2 pmu reg */
+		reg = <0x01c13400 0x10 0x01c14800 0x4 0x01c1c800 0x4>;
+		reg-names = "phy_ctrl", "pmu1", "pmu2";
+		clocks = <&usb_clk 8>;
+		clock-names = "usb_phy";
+		resets = <&usb_clk 0>, <&usb_clk 1>, <&usb_clk 2>;
+		reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
+		usb0_id_det-gpios = <&pio 7 19 GPIO_ACTIVE_HIGH>; /* PH19 */
+		usb0_vbus_det-gpios = <&pio 7 22 GPIO_ACTIVE_HIGH>; /* PH22 */
+		usb0_vbus-supply = <&reg_usb0_vbus>;
+		usb1_vbus-supply = <&reg_usb1_vbus>;
+		usb2_vbus-supply = <&reg_usb2_vbus>;
+	};
diff --git a/doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml b/doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml
new file mode 100644
index 00000000000..d50571affd1
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/apple,pinctrl.yaml
@@ -0,0 +1,106 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/apple,pinctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple GPIO controller
+
+maintainers:
+  - Mark Kettenis <kettenis@openbsd.org>
+
+description: |
+  The Apple GPIO controller is a simple combined pin and GPIO
+  controller present on Apple ARM SoC platforms, including various
+  iPhone and iPad devices and the "Apple Silicon" Macs.
+
+properties:
+  compatible:
+    items:
+      - const: apple,t8103-pinctrl
+      - const: apple,pinctrl
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  gpio-controller: true
+
+  '#gpio-cells':
+    const: 2
+
+  gpio-ranges:
+    maxItems: 1
+
+  interrupts:
+    description: One interrupt for each of the (up to 7) interrupt
+      groups supported by the controller sorted by interrupt group
+      number in ascending order.
+    minItems: 1
+    maxItems: 7
+
+  interrupt-controller: true
+
+patternProperties:
+  '-pins$':
+    type: object
+    $ref: pinmux-node.yaml#
+
+    properties:
+      pinmux:
+        description:
+          Values are constructed from pin number and alternate function
+          configuration number using the APPLE_PINMUX() helper macro
+          defined in include/dt-bindings/pinctrl/apple.h.
+
+    required:
+      - pinmux
+
+    additionalProperties: false
+
+required:
+  - compatible
+  - reg
+  - gpio-controller
+  - '#gpio-cells'
+  - gpio-ranges
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/apple-aic.h>
+    #include <dt-bindings/pinctrl/apple.h>
+
+    soc {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      pinctrl: pinctrl@23c100000 {
+        compatible = "apple,t8103-pinctrl", "apple,pinctrl";
+        reg = <0x2 0x3c100000 0x0 0x100000>;
+        clocks = <&gpio_clk>;
+
+        gpio-controller;
+        #gpio-cells = <2>;
+        gpio-ranges = <&pinctrl 0 0 212>;
+
+        interrupt-controller;
+        interrupt-parent = <&aic>;
+        interrupts = <AIC_IRQ 16 IRQ_TYPE_LEVEL_HIGH>,
+                     <AIC_IRQ 17 IRQ_TYPE_LEVEL_HIGH>,
+                     <AIC_IRQ 18 IRQ_TYPE_LEVEL_HIGH>,
+                     <AIC_IRQ 19 IRQ_TYPE_LEVEL_HIGH>,
+                     <AIC_IRQ 20 IRQ_TYPE_LEVEL_HIGH>,
+                     <AIC_IRQ 21 IRQ_TYPE_LEVEL_HIGH>,
+                     <AIC_IRQ 22 IRQ_TYPE_LEVEL_HIGH>;
+
+        pcie_pins: pcie-pins {
+          pinmux = <APPLE_PINMUX(150, 1)>,
+                   <APPLE_PINMUX(151, 1)>,
+                   <APPLE_PINMUX(32, 1)>;
+        };
+      };
+    };
diff --git a/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt b/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
new file mode 100644
index 00000000000..6e936a08b6c
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/atmel,at91-pio4-pinctrl.txt
@@ -0,0 +1,69 @@
+* Atmel PIO4 Controller
+
+The Atmel PIO4 controller is used to select the function of a pin and to
+configure it.
+
+Required properties:
+- compatible: "atmel,sama5d2-pinctrl".
+- reg: base address and length of the PIO controller.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices.
+
+Subnode format
+Each node (or subnode) will list the pins it needs and how to configured these
+pins.
+
+	node {
+		pinmux = <PIN_NUMBER_PINMUX>;
+		GENERIC_PINCONFIG;
+	};
+
+Required properties:
+- pinmux: integer array. Each integer represents a pin number plus mux and
+ioset settings. Use the macros from boot/dts/<soc>-pinfunc.h file to get the
+right representation of the pin.
+
+Optional properties:
+- GENERIC_PINCONFIG: generic pinconfig options to use:
+	- bias-disable, bias-pull-down, bias-pull-up, drive-open-drain,
+	  input-schmitt-enable, input-debounce
+	- slew-rate: 0 - disabled, 1 - enabled (default)
+- atmel,drive-strength: 0 or 1 for low drive, 2 for medium drive and 3 for
+high drive. The default value is low drive.
+
+Example:
+
+#include <sama5d2-pinfunc.h>
+
+...
+{
+	spi0: spi@f8000000 {
+		cs-gpios = <&pioA 17 0>, <0>, <0>, <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_spi0_default>;
+		status = "okay";
+
+		spi_flash@0 {
+			compatible = "jedec,spi-nor";
+			reg = <0>;
+			spi-max-frequency = <50000000>;
+		};
+	};
+
+	...
+
+	pioA: pinctrl@fc038000 {
+		compatible = "atmel,sama5d2-pinctrl";
+		reg = <0xfc038000 0x600>;
+
+		pinctrl_spi0_default: spi0_default {
+			pinmux = <PIN_PA14__SPI0_SPCK>,
+				 <PIN_PA15__SPI0_MOSI>,
+				 <PIN_PA16__SPI0_MISO>;
+			bias-disable;
+		};
+		...
+	};
+};
+...
diff --git a/doc/device-tree-bindings/pinctrl/bcm6838-pinctrl.txt b/doc/device-tree-bindings/pinctrl/bcm6838-pinctrl.txt
new file mode 100644
index 00000000000..ace66ead5cd
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/bcm6838-pinctrl.txt
@@ -0,0 +1,35 @@
+* broadcom bcm6838 pinctrl
+
+Required properties for the pinctrl driver:
+- compatible:	   "brcm,bcm6838-pinctrl"
+- regmap:		   specify the gpio test port syscon
+- brcm,pins-count:      the number of pin
+- brcm,functions-count: the number of function
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices.
+
+Example:
+
+		gpio_test_port: syscon@14e00294 {
+			compatible = "syscon";
+			reg = <0x14e00294 0x1c>;
+		};
+
+		pinctrl: pinctrl {
+			compatible = "brcm,bcm6838-pinctrl";
+			regmap = <&gpio_test_port>;
+			brcm,pins-count = <74>;
+			brcm,functions-count = <8>;
+
+			usb0: usb0 {
+				usb0_pwrflt {
+					pins = "69";
+					function = "1";
+				};
+				usb0_pwron {
+					pins = "70";
+					function = "1";
+				};
+			};
+		};
diff --git a/doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt b/doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
new file mode 100644
index 00000000000..deca0cfab76
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/canaan,k210-fpioa.txt
@@ -0,0 +1,102 @@
+Kendryte K210 FPIOA
+
+This binding describes the Fully-Programmable Input/Output Array (FPIOA) found
+in Kendryte K210 SoCs. Any of the 256 functions can be mapped to any of the 48
+pins.
+
+Required properties:
+- compatible: should be "canaan,k210-fpioa"
+- reg: address and length of the FPIOA registers
+- canaan,sysctl: phandle to the "sysctl" register map node
+- canaan,k210-power-offset: offset in the register map of the power bank control
+  register (in bytes)
+
+Configuration nodes
+
+Pin configuration nodes are documented in pinctrl-bindings.txt
+
+Required properties for pin-configuration nodes or sub-nodes are:
+- groups: list of power groups to which the configuration applies. Valid groups
+  are:
+	A0, A1, A2, B3, B4, B5, C6, C7
+  (either this or "pinmux" must be specified)
+- pinmux: integer array representing pin multiplexing configuration. In addition
+  to the 256 standard functions, each pin can also output the direction
+  indicator (DO) of any function. This signal is high whenever the function
+  would normally drive the output. Helper macros to ease assembling the "pinmux"
+  arguments from the pin and function are provided by the FPIOA header file at:
+  <dt-bindings/pinctrl/k210-pinctrl.h>
+  Integer values in the "pinmux" argument list are assembled as:
+  ((PIN << 16) | (DO << 8) | (FUNC))
+  Valid values for PIN are numbers 0 through 47.
+  Valid values for DO are 0 or 1.
+  Valid values for FUNC are numbers 0 through 255. For a complete list of
+  acceptable functions, consult the FPIOA header file.
+  (either this or "groups" must be specified)
+
+Optional properties for "pinmux" nodes are:
+	bias-disable, bias-pull-down, bias-pull-up, drive-strength,
+	drive-strength-ua, input-enable, input-disable, input-schmitt-enable,
+	input-schmitt-disable, output-low, output-high, output-enable,
+	output-disable, slew-rate, output-polarity-invert, input-polarity-invert
+
+Optional properties for "groups" nodes are:
+	power-source
+
+Notes on specific properties include:
+- bias-pull-up, -down, and -pin-default: The pull strength cannot be configured.
+- drive-strength: There are 8 drive strength settings between 11 and 50 mA.
+- input- and output-polarity-invert: Invert the polarity of either the input or
+  the output, respectively.
+- power-source: Controls the output voltage of a bank of pins. Either
+  K210_PC_POWER_1V8 or K210_PC_POWER_3V3 may be specified.
+- slew-rate: Specifying this property reduces the slew rate.
+
+Example:
+fpioa: pinmux@502B0000 {
+	compatible = "canaan,k210-fpioa";
+	reg = <0x502B0000 0x100>;
+	canaan,k210-sysctl = <&sysctl>;
+	canaan,k210-power-offset = <K210_SYSCTL_POWER_SEL>;
+
+	/* JTAG running at 3.3V and driven at 11 mA */
+	fpioa_jtag: jtag {
+		voltage {
+			group = "A0";
+			power-source = <K210_PC_POWER_3V3>;
+		};
+
+		jtag {
+			pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCK)>,
+				 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
+				 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
+				 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
+			drive-strength = <11>;
+		}
+	};
+
+	/* I2C configured for use with a TCA9800 level shifter */
+	fpioa_i2c: i2c {
+		i2c {
+			pinmux = <K210_FPIOA(6, K210_PCF_I2C0_SCLK)>,
+				 <K210_FPIOA(7, K210_PCF_I2C0_SDA)>;
+		};
+
+		direction {
+			pinmux = <K210_FPIOA_DO(8, K210_PCF_I2C0_SDA)>;
+			output-polarity-invert;
+		};
+	};
+
+	/* UART with an active-high TX status LED */
+	fpioa_uart1: uart1 {
+		uart {
+			pinmux = <K210_FPIOA(9, K210_PCF_UART1_TX)>,
+				 <K210_FPIOA(10, K210_PCF_UART1_RX)>;
+		};
+
+		status {
+			pinmux = <K210_FPIOA_DO(11, K210_PCF_UART1_TX)>;
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt b/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt
new file mode 100644
index 00000000000..12ec8461073
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/intel,apl-pinctrl.txt
@@ -0,0 +1,39 @@
+* Intel Apollo Lake pin controller
+
+The Apollo Lake (APL) pin controller is used to select the function of a pin
+and to configure it.
+
+Required properties:
+- compatible: "intel,apl-pinctrl"
+- intel,p2sb-port-id: Port ID number within the parent P2SB
+- reg: PCI address of the controller
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices.
+
+Optional subnodes:
+
+GPIO nodes may be added as children of the pinctrl nodes. See intel,apl-gpio
+for the binding.
+
+
+Example:
+
+...
+{
+	p2sb: p2sb@d,0 {
+		reg = <0x02006810 0 0 0 0>;
+		compatible = "intel,p2sb";
+		early-regs = <IOMAP_P2SB_BAR 0x100000>;
+
+		n {
+			compatible = "intel,apl-pinctrl";
+			intel,p2sb-port-id = <PID_GPIO_N>;
+			gpio_n: gpio-n {
+				compatible = "intel,apl-gpio";
+				#gpio-cells = <2>;
+			};
+		};
+	};
+};
+...
diff --git a/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
new file mode 100644
index 00000000000..3139a99fa97
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/marvell,armada-37xx-pinctrl.txt
@@ -0,0 +1,186 @@
+* Marvell Armada 37xx SoC pin and GPIO controller
+
+Each Armada 37xx SoC comes with two pin and GPIO controllers, one for the
+South Bridge and the other for the North Bridge.
+
+GPIO and pin controller:
+------------------------
+
+Main node:
+
+Refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning
+of the phrase "pin configuration node".
+
+Required properties for pinctrl driver:
+
+- compatible:	"marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
+		for the South Bridge
+		"marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
+		for the North Bridge
+- reg: The first set of registers is for pinctrl/GPIO and the second
+  set is for the interrupt controller
+- interrupts: list of interrupts used by the GPIO
+
+Available groups and functions for the North Bridge:
+
+group: jtag
+ - pins 20-24
+ - functions jtag, gpio
+
+group sdio0
+ - pins 8-10
+ - functions sdio, gpio
+
+group emmc_nb
+ - pins 27-35
+ - functions emmc, gpio
+
+group pwm0
+ - pin 11 (GPIO1-11)
+ - functions pwm, led, gpio
+
+group pwm1
+ - pin 12
+ - functions pwm, led, gpio
+
+group pwm2
+ - pin 13
+ - functions pwm, led, gpio
+
+group pwm3
+ - pin 14
+ - functions pwm, led, gpio
+
+group pmic1
+ - pin 7
+ - functions pmic, gpio
+
+group pmic0
+ - pin 6
+ - functions pmic, gpio
+
+group i2c2
+ - pins 2-3
+ - functions i2c, gpio
+
+group i2c1
+ - pins 0-1
+ - functions i2c, gpio
+
+group spi_cs1
+ - pin 17
+ - functions spi, gpio
+
+group spi_cs2
+ - pin 18
+ - functions spi, gpio
+
+group spi_cs3
+ - pin 19
+ - functions spi, gpio
+
+group onewire
+ - pin 4
+ - functions onewire, gpio
+
+group uart1
+ - pins 25-26
+ - functions uart, gpio
+
+group spi_quad
+ - pins 15-16
+ - functions spi, gpio
+
+group uart_2
+ - pins 9-10
+ - functions uart, gpio
+
+Available groups and functions for the South Bridge:
+
+group usb32_drvvbus0
+ - pin 36
+ - functions drvbus, gpio
+
+group usb2_drvvbus1
+ - pin 37
+ - functions drvbus, gpio
+
+group sdio_sb
+ - pins 60-65
+ - functions sdio, gpio
+
+group rgmii
+ - pins 42-53
+ - functions mii, gpio
+
+group pcie1
+ - pins 39-41
+ - functions pcie, gpio
+
+group smi
+ - pins 54-55
+ - functions smi, gpio
+
+group ptp
+ - pins 56-58
+ - functions ptp, gpio
+
+group ptp_clk
+ - pin 57
+ - functions ptp, mii
+
+group ptp_trig
+ - pin 58
+ - functions ptp, mii
+
+group mii_col
+ - pin 59
+ - functions mii, mii_err
+
+GPIO subnode:
+
+Please refer to gpio.txt in "gpio" directory for details of gpio-ranges property
+and the common GPIO bindings used by client devices.
+
+Required properties for the GPIO driver under the gpio subnode:
+- interrupts: List of interrupt specifiers for the controllers interrupt.
+- gpio-controller: Marks the device node as a GPIO controller.
+- #gpio-cells: Should be 2. The first cell is the GPIO number and the
+   second cell specifies GPIO flags, as defined in
+   <dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH and
+   GPIO_ACTIVE_LOW flags are supported.
+- gpio-ranges: Range of pins managed by the GPIO controller.
+
+Example:
+pinctrl_sb: pinctrl-sb@18800 {
+	compatible = "marvell,armada3710-sb-pinctrl",
+	"syscon", "simple-mfd";
+	reg = <0x18800 0x100>, <0x18C00 0x20>;
+	gpiosb: gpiosb {
+		#gpio-cells = <2>;
+		gpio-ranges = <&pinctrl_sb 0 0 30>;
+		gpio-controller;
+		interrupts =
+		<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+		<GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
+		<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
+		<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+		<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
+	rgmii_pins: mii-pins {
+		groups = "rgmii";
+		function = "mii";
+	};
+
+	sdio_pins: sdio-pins {
+		groups = "sdio_sb";
+		function = "sdio";
+	};
+
+	pcie_pins: pcie-pins {
+		groups = "pcie1";
+		function = "pcie";
+	};
+};
\ No newline at end of file
diff --git a/doc/device-tree-bindings/pinctrl/marvell,armada-apn806-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,armada-apn806-pinctrl.txt
new file mode 100644
index 00000000000..0d6f8614455
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/marvell,armada-apn806-pinctrl.txt
@@ -0,0 +1,25 @@
+	Functions of Armada APN806 pin controller
+	Function 0x0 for any MPP ID activates GPIO pin mode
+----------------------------------------------------------------------
+MPP#	0x1			0x2		0x3		0x4
+----------------------------------------------------------------------
+0	SDIO_CLK		-		SPI0_CLK	-
+1	SDIO_CMD		-		SPI0_MISO	-
+2	SDIO_D[0]		-		SPI0_MOSI	-
+3	SDIO_D[1]		-		SPI0_CS0n	-
+4	SDIO_D[2]		-		I2C0_SDA	SPI0_CS1n
+5	SDIO_D[3]		-		I2C0_SCK	-
+6	SDIO_DS			-		-		-
+7	SDIO_D[4]		-		UART1_RXD	-
+8	SDIO_D[5]		-		UART1_TXD	-
+9	SDIO_D[6]		-		SPI0_CS1n	-
+10	SDIO_D[7]		-		-		-
+11	-			-		UART0_TXD	-
+12	SDIO_CARD_PW_OFF	SDIO_HW_RST	-		-
+13	-			-		-		-
+14	-			-		-		-
+15	-			-		-		-
+16	-			-		-		-
+17	-			-		-		-
+18	-			-		-		-
+19	-			-		UART0_RXD	-
diff --git a/doc/device-tree-bindings/pinctrl/marvell,armada-cp110-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,armada-cp110-pinctrl.txt
new file mode 100644
index 00000000000..3adcf3aae49
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/marvell,armada-cp110-pinctrl.txt
@@ -0,0 +1,270 @@
+	Functions of Armada CP110 pin controller
+	Function 0x0 for any MPP ID activates GPIO pin mode
+	Function 0xc for any MPP ID activates DEBUG_BUS pin mode
+-------------------------------------------------------------------------------
+MPP#	0x1			0x2		0x3		0x4
+-------------------------------------------------------------------------------
+0	DEV_ALE[1]		AU_I2SMCLK	GE0_RXD[3]	TDM_PCLK
+1	DEV_ALE[0]		AU_I2SDO_SPDIFO	GE0_RXD[2]	TDM_DRX
+2	DEV_AD[15]		AU_I2SEXTCLK	GE0_RXD[1]	TDM_DTX
+3	DEV_AD[14]		AU_I2SLRCLK	GE0_RXD[0]	TDM_FSYNC
+4	DEV_AD[13]		AU_I2SBCLK	GE0_RXCTL	TDM_RSTn
+5	DEV_AD[12]		AU_I2SDI	GE0_RXCLK	TDM_INTn
+6	DEV_AD[11]		-		GE0_TXD[3]	SPI0_CSn[2]
+7	DEV_AD[10]		-		GE0_TXD[2]	SPI0_CSn[1]
+8	DEV_AD[9]		-		GE0_TXD[1]	SPI0_CSn[0]
+9	DEV_AD[8]		-		GE0_TXD[0]	SPI0_MOSI
+10	DEV_READYn		-		GE0_TXCTL	SPI0_MISO
+11	DEV_WEn[1]		-		GE0_TXCLKOUT	SPI0_CLK
+12	DEV_CLK_OUT		NF_RBn[1]	SPI1_CSn[1]	GE0_RXCLK
+13	DEV_BURSTn		NF_RBn[0]	SPI1_MISO	GE0_RXCTL
+14	DEV_BOOTCSn		DEV_CSn[0]	SPI1_CSn[0]	SPI0_CSn[3]
+15	DEV_AD[7]		-		SPI1_MOSI	-
+16	DEV_AD[6]		-		SPI1_CLK	-
+17	DEV_AD[5]		-		-		GE0_TXD[3]
+18	DEV_AD[4]		-		-		GE0_TXD[2]
+19	DEV_AD[3]		-		-		GE0_TXD[1]
+20	DEV_AD[2]		-		-		GE0_TXD[0]
+21	DEV_AD[1]		-		-		GE0_TXCTL
+22	DEV_AD[0]		-		-		GE0_TXCLKOUT
+23	DEV_A[1]		-		-		-
+24	DEV_A[0]		-		-		-
+25	DEV_OEn	-		-		-		-
+26	DEV_WEn[0]		-		-		-
+27	DEV_CSn[0]		SPI1_MISO	MSS_GPIO[4]	GE0_RXD[3]
+28	DEV_CSn[1]		SPI1_CSn[0]	MSS_GPIO[5]	GE0_RXD[2]
+29	DEV_CSn[2]		SPI1_MOSI	MSS_GPIO[6]	GE0_RXD[1]
+30	DEV_CSn[3]		SPI1_CLK	MSS_GPIO[7]	GE0_RXD[0]
+31	DEV_A[2]		-		MSS_GPIO[4]	-
+32	MII_COL			MII_TXERR	MSS_SPI_MISO	TDM_DRX
+33	MII_TXCLK		SDIO_PWR1[0]	MSS_SPI_CSn	TDM_FSYNC
+34	MII_RXERR		SDIO_PWR1[1]	MSS_SPI_MOSI	TDM_DTX
+35	SATA1_PRESENT_ACTIVEn	TWSI1_SDA	MSS_SPI_CLK	TDM_PCLK
+36	SYNCE2_CLK		TWSI1_SCK	PTP_CLK		SYNCE1_CLK
+37	UART2_RXD		TWSI0_SCK	PTP_PCLK_OUT	TDM_INTn
+38	UART2_TXD		TWSI0_SDA	PTP_PULSE	TDM_RSTn
+39	SDIO_WR_PROTECT		-	-	AU_I2SBCLK	PTP_CLK
+40	SDIO_PWR1[1]		SYNCE1_CLK	MSS_TWSI_SDA	AU_I2SDO_SPDIFO
+41	SDIO_PWR1[0]		SDIO_BUS_PWR	MSS_TWSI_SCK	AU_I2SLRCLK
+42	SDIO_V18_EN		SDIO_WR_PROTECT	SYNCE2_CLK	AU_I2SMCLK
+43	SDIO_CARD_DETECT	-		SYNCE1_CLK	AU_I2SEXTCLK
+44	GE1_TXD[2]		-		-		-
+45	GE1_TXD[3]		-		-		-
+46	GE1_TXD[1]		-		-		-
+47	GE1_TXD[0]		-		-		-
+48	GE1_TXCTL_MII_TXEN	-		-		-
+49	GE1_TXCLKOUT		MII_CRS		-		-
+50	GE1_RXCLK		MSS_TWSI_SDA	-		-
+51	GE1_RXD[0]		MSS_TWSI_SCK	-		-
+52	GE1_RXD[1]		SYNCE1_CLK	-		SYNCE2_CLK
+53	GE1_RXD[2]		-		PTP_CLK		-
+54	GE1_RXD[3]		SYNCE2_CLK	PTP_PCLK_OUT	SYNCE1_CLK
+55	GE1_RXCTL_MII_RXDV	-		PTP_PULSE	-
+56	-			-		-		TDM_DRX
+57	-			MSS_TWSI_SDA	PTP_PCLK_OUT	TDM_INTn
+58	-			MSS_TWSI_SCK	PTP_CLK		TDM_RSTn
+59	MSS_GPIO[7]		SYNCE2_CLK	-		TDM_FSYNC
+60	MSS_GPIO[6]		-		PTP_PULSE	TDM_DTX
+61	MSS_GPIO[5]		-		PTP_CLK		TDM_PCLK
+62	MSS_GPIO[4]		SYNCE1_CLK	PTP_PCLK_OUT	-
+
+-------------------------------------------------------------------------------
+MPP#	0x5			0x6			0x7
+-------------------------------------------------------------------------------
+0	-			PTP_PULSE		MSS_TWSI_SDA
+1	-			PTP_CLK			MSS_TWSI_SCK
+2	MSS_UART_RXD		PTP_PCLK_OUT		TWSI1_SCK
+3	MSS_UART_TXD		PCIe_RSTOUTn		TWSI1_SDA
+4	MSS_UART_RXD		UART1_CTS		PCIe0_CLKREQ
+5	MSS_UART_TXD		UART1_RTS		PCIe1_CLKREQ
+6	AU_I2SEXTCLK		SATA1_PRESENT_ACTIVEn	PCIe2_CLKREQ
+7	SPI1_CSn[1]		SATA0_PRESENT_ACTIVEn	LED_DATA
+8	SPI1_CSn[0]		UART0_CTS		LED_STB
+9	SPI1_MOSI		-			PCIe_RSTOUTn
+10	SPI1_MISO		UART0_CTS		SATA1_PRESENT_ACTIVEn
+11	SPI1_CLK		UART0_RTS		LED_CLK
+12	-			-			-
+13	-			-			-
+14	AU_I2SEXTCLK		SPI0_MISO		SATA0_PRESENT_ACTIVEn
+15	-			SPI0_MOSI		-
+16	-			-			-
+17	-			-			-
+18	-			-			-
+19	-			-			-
+20	-			-			-
+21	-			-			-
+22	-			-			-
+23	AU_I2SMCLK		-			-
+24	AU_I2SLRCLK		-			-
+25	AU_I2SDO_SPDIFO		-			-
+26	AU_I2SBCLK		-			-
+27	SPI0_CSn[4]		-			-
+28	SPI0_CSn[5]		PCIe2_CLKREQ		PTP_PULSE
+29	SPI0_CSn[6]		PCIe1_CLKREQ		PTP_CLK
+30	SPI0_CSn[7]		PCIe0_CLKREQ		PTP_PCLK_OUT
+31	-			PCIe_RSTOUTn		-
+32	AU_I2SEXTCLK		AU_I2SDI		GE_MDIO
+33	AU_I2SMCLK		SDIO_BUS_PWR		-
+34	AU_I2SLRCLK		SDIO_WR_PROTECT		GE_MDC
+35	AU_I2SDO_SPDIFO		SDIO_CARD_DETECT	XG_MDIO
+36	AU_I2SBCLK		SATA0_PRESENT_ACTIVEn	XG_MDC
+37	MSS_TWSI_SCK		SATA1_PRESENT_ACTIVEn	GE_MDC
+38	MSS_TWSI_SDA		SATA0_PRESENT_ACTIVEn	GE_MDIO
+39	SPI0_CSn[1]		-			-
+40	PTP_PCLK_OUT		SPI0_CLK		UART1_TXD
+41	PTP_PULSE		SPI0_MOSI		UART1_RXD
+42	MSS_UART_TXD		SPI0_MISO		UART1_CTS
+43	MSS_UART_RXD		SPI0_CSn[0]		UART1_RTS
+44	-			-			UART0_RTS
+45	-			-			UART0_TXD
+46	-			-			UART1_RTS
+47	SPI1_CLK		-			UART1_TXD
+48	SPI1_MOSI		-			-
+49	SPI1_MISO		-			UART1_RXD
+50	SPI1_CSn[0]		UART2_TXD		UART0_RXD
+51	SPI1_CSn[1]		UART2_RXD		UART0_CTS
+52	SPI1_CSn[2]		-			UART1_CTS
+53	SPI1_CSn[3]		-			UART1_RXD
+54	-			-			-
+55	-			-			-
+56	AU_I2SDO_SPDIFO		SPI0_CLK		UART1_RXD
+57	AU_I2SBCLK		SPI0_MOSI		UART1_TXD
+58	AU_I2SDI		SPI0_MISO		UART1_CTS
+59	AU_I2SLRCLK		SPI0_CSn[0]		UART0_CTS
+60	AU_I2SMCLK		SPI0_CSn[1]		UART0_RTS
+61	AU_I2SEXTCLK		SPI0_CSn[2]		UART0_TXD
+62	SATA1_PRESENT_ACTIVEn	SPI0_CSn[3]		UART0_RXD
+
+-------------------------------------------------------------------------------
+MPP#	0x8			0x9			0xA
+-------------------------------------------------------------------------------
+0	UART0_RXD		SATA0_PRESENT_ACTIVEn	GE_MDIO
+1	UART0_TXD		SATA1_PRESENT_ACTIVEn	GE_MDC
+2	UART1_RXD		SATA0_PRESENT_ACTIVEn	XG_MDC
+3	UART1_TXD		SATA1_PRESENT_ACTIVEn	XG_MDIO
+4	UART3_RXD		-			GE_MDC
+5	UART3_TXD		-			GE_MDIO
+6	UART0_RXD		PTP_PULSE		-
+7	UART0_TXD		PTP_CLK			-
+8	UART2_RXD		PTP_PCLK_OUT		SYNCE1_CLK
+9	-			-			SYNCE2_CLK
+10	-			-			-
+11	UART2_TXD		SATA0_PRESENT_ACTIVEn	-
+12	-			-			-
+13	MSS_SPI_MISO		-			-
+14	MSS_SPI_CSn		-			-
+15	MSS_SPI_MOSI		-			-
+16	MSS_SPI_CLK		-			-
+17	-			-			-
+18	-			-			-
+19	-			-			-
+20	-			-			-
+21	-			-			-
+22	-			-			-
+23	-			-			-
+24	-			-			-
+25	-			-			-
+26	-			-			-
+27	GE_MDIO			SATA0_PRESENT_ACTIVEn	UART0_RTS
+28	GE_MDC			SATA1_PRESENT_ACTIVEn	UART0_CTS
+29	MSS_TWSI_SDA		SATA0_PRESENT_ACTIVEn	UART0_RXD
+30	MSS_TWSI_SCK		SATA1_PRESENT_ACTIVEn	UART0_TXD
+31	GE_MDC			-			-
+32	SDIO_V18_EN		PCIe1_CLKREQ		MSS_GPIO[0]
+33	XG_MDIO			PCIe2_CLKREQ		MSS_GPIO[1]
+34	-			PCIe0_CLKREQ		MSS_GPIO[2]
+35	GE_MDIO			PCIe_RSTOUTn		MSS_GPIO[3]
+36	GE_MDC			PCIe2_CLKREQ		MSS_GPIO[5]
+37	XG_MDC			PCIe1_CLKREQ		MSS_GPIO[6]
+38	XG_MDIO			AU_I2SEXTCLK		MSS_GPIO[7]
+39	SATA1_PRESENT_ACTIVEn				MSS_GPIO[0]
+40	GE_MDIO			SATA0_PRESENT_ACTIVEn	MSS_GPIO[1]
+41	GE_MDC			SATA1_PRESENT_ACTIVEn	MSS_GPIO[2]
+42	XG_MDC			SATA0_PRESENT_ACTIVEn	MSS_GPIO[4]
+43	XG_MDIO			SATA1_PRESENT_ACTIVEn	MSS_GPIO[5]
+44	-			-			-
+45	-			PCIe_RSTOUTn		-
+46	-			-			-
+47	GE_MDC			CLKOUT			-
+48	XG_MDC			-			-
+49	GE_MDIO			PCIe0_CLKREQ		SDIO_V18_EN
+50	XG_MDIO			-			SDIO_PWR1[1]
+51	-			-			SDIO_PWR1[0]
+52	LED_CLK			PCIe_RSTOUTn		PCIe0_CLKREQ
+53	LED_STB			-			-
+54	LED_DATA		-			SDIO_HW_RST
+55	-			-			SDIO_LED
+56	-			SATA1_PRESENT_ACTIVEn	-
+57	-			SATA0_PRESENT_ACTIVEn	-
+58	LED_CLK			-			-
+59	LED_STB			UART1_TXD		-
+60	LED_DATA		UART1_RXD		-
+61	UART2_TXD		SATA1_PRESENT_ACTIVEn	GE_MDIO
+62	UART2_RXD		SATA0_PRESENT_ACTIVEn	GE_MDC
+
+-------------------------------------------------------------------------------
+MPP#	0xB			0xD			0xE
+-------------------------------------------------------------------------------
+0	-			-			-
+1	-			-			-
+2	-			-			-
+3	-			-			-
+4	-			-			-
+5	-			-			-
+6	-			-			-
+7	-			-			-
+8	-			-			-
+9	-			-			-
+10	-			-			-
+11	-			CLKOUT_MPP_11		-
+12	-			-			-
+13	-			-			-
+14	-			-			-
+15	PTP_PULSE_CP2CP		SAR_IN[5]		-
+16	-			SAR_IN[3]		-
+17	-			SAR_IN[6]		-
+18	PTP_CLK_CP2CP		SAR_IN[11]		-
+19	WAKEUP_OUT_CP2CP	SAR_IN[7]		-
+20	-			SAR_IN[9]		-
+21	SEI_IN_CP2CP		SAR_IN[8]		-
+22	WAKEUP_IN_CP2CP		SAR_IN[10]		-
+23	LINK_RD_IN_CP2CP	SAR_IN[4]		-
+24	-			-			-
+25	-			CLKOUT_MPP_25		-
+26	-			SAR_IN[0]		-
+27	REI_IN_CP2CP		SAR_IN[1]		-
+28	LED_DATA		SAR_IN[2]		-
+29	LED_STB			AVS_FB_IN_CP2CP		-
+30	LED_CLK			SAR_IN[13]		-
+31	-			-			-
+32	-			SAR_CP2CP_OUT[0]	-
+33	-			SAR_CP2CP_OUT[1]	-
+34	-			SAR_CP2CP_OUT[2]	-
+35	-			SAR_CP2CP_OUT[3]	-
+36	-			CLKIN			-
+37	LINK_RD_OUT_CP2CP	SAR_CP2CP_OUT[4]	-
+38	PTP_PULSE_CP2CP		SAR_CP2CP_OUT[5]	-
+39	-			AVS_FB_OUT_CP2CP	-
+40	-			-			-
+41	REI_OUT_CP2CP		-			-
+42	-			SAR_CP2CP_OUT[9]	-
+43	WAKEUP_OUT_CP2CP	SAR_CP2CP_OUT[10]	-
+44	PTP_CLK_CP2CP		SAR_CP2CP_OUT[11]	-
+45	-			SAR_CP2CP_OUT[6]	-
+46	-			SAR_CP2CP_OUT[13]	-
+47	-			-			-
+48	WAKEUP_IN_CP2CP		SAR_CP2CP_OUT[7]	-
+49	SEI_OUT_CP2CP		SAR_CP2CP_OUT[8]	-
+50	-			-			-
+51	-			-			-
+52	-			-			-
+53	SDIO_LED		-			-
+54	SDIO_WR_PROTECT		-			-
+55	SDIO_CARD_DETECT	-			-
+56	-			-			SDIO0_CLK
+57	-			-			SDIO0_CMD
+58	-			-			SDIO0_D[0]
+59	-			-			SDIO0_D[1]
+60	-			-			SDIO0_D[2]
+61	-			-			SDIO0_D[3]
+62	-			-			-
diff --git a/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt b/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt
new file mode 100644
index 00000000000..c6984ddd60b
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/marvell,mvebu-pinctrl.txt
@@ -0,0 +1,113 @@
+The pinctrl driver enables Marvell Armada 8K SoCs to configure the multi-purpose
+pins (mpp) to a specific function.
+A Marvell SoC pin configuration node is a node of a group of pins which can
+be used for a specific device or function. Each node requires one or more
+mpp pins or group of pins and a mpp function common to all pins.
+
+Required properties for the pinctrl driver:
+- compatible:	"marvell,mvebu-pinctrl",
+		"marvell,ap806-pinctrl",
+		"marvell,armada-7k-pinctrl",
+		"marvell,armada-8k-cpm-pinctrl",
+		"marvell,armada-8k-cps-pinctrl"
+- bank-name:	A string defining the pinc controller bank name
+- reg:		A pair of values defining the pin controller base address
+		and the address space
+- pin-count:	Numeric value defining the amount of multi purpose pins
+		included in this bank
+- max-func:	Numeric value defining the maximum function value for
+		pins in this bank
+- pin-func:	Array of pin function values for every pin in the bank.
+		When the function value for a specific pin equal 0xFF,
+		the pin configuration is skipped and a default function
+		value is used for this pin.
+
+The A8K is a hybrid SoC that contains several silicon dies interconnected in
+a single package. Each such die may have a separate pin controller.
+
+Example:
+/ {
+	ap806 {
+		config-space {
+			pinctl: pinctl@6F4000 {
+				compatible = "marvell,mvebu-pinctrl",
+					     "marvell,ap806-pinctrl";
+				bank-name ="apn-806";
+				reg = <0x6F4000 0x10>;
+				pin-count = <20>;
+				max-func = <3>;
+				/* MPP Bus:
+				 * SPI0 [0-3]
+				 * I2C0 [4-5]
+				 * UART0 [11,19]
+				 */
+					  /* 0 1 2 3 4 5 6 7 8 9 */
+				pin-func = < 3 3 3 3 3 3 0 0 0 0
+					     0 3 0 0 0 0 0 0 0 3>;
+			};
+		};
+	};
+
+	cp110-master {
+		config-space {
+			cpm_pinctl: pinctl@44000 {
+				compatible = "marvell,mvebu-pinctrl",
+					     "marvell,armada-7k-pinctrl",
+					     "marvell,armada-8k-cpm-pinctrl";
+				bank-name ="cp0-110";
+				reg = <0x440000 0x20>;
+				pin-count = <63>;
+				max-func = <0xf>;
+				/* MPP Bus:
+				 * [0-31] = 0xff: Keep default CP0_shared_pins:
+				 * [11] CLKOUT_MPP_11 (out)
+				 * [23] LINK_RD_IN_CP2CP (in)
+				 * [25] CLKOUT_MPP_25 (out)
+				 * [29] AVS_FB_IN_CP2CP (in)
+				 * [32,34] SMI
+				 * [31]    GPIO: push button/Wake
+				 * [35-36] GPIO
+				 * [37-38] I2C
+				 * [40-41] SATA[0/1]_PRESENT_ACTIVEn
+				 * [42-43] XSMI
+				 * [44-55] RGMII1
+				 * [56-62] SD
+				 */
+					/*   0    1    2    3    4    5    6    7    8    9 */
+				pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+					     0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+					     0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+					     0xff 0    7    0    7    0    0    2    2    0
+					     0    0    8    8    1    1    1    1    1    1
+					     1    1    1    1    1    1    0xE  0xE  0xE  0xE
+					     0xE  0xE  0xE>;
+			};
+		};
+	};
+
+	cp110-slave {
+		config-space {
+			cps_pinctl: pinctl@44000 {
+				compatible = "marvell,mvebu-pinctrl",
+					     "marvell,armada-8k-cps-pinctrl";
+				bank-name ="cp1-110";
+				reg = <0x440000 0x20>;
+				pin-count = <63>;
+				max-func = <0xf>;
+				/* MPP Bus:
+				 * [0-11]  RGMII0
+				 * [27,31] GE_MDIO/MDC
+				 * [32-62] = 0xff: Keep default CP1_shared_pins:
+				 */
+					/*   0    1    2    3    4    5    6    7    8    9 */
+				pin-func = < 0x3  0x3  0x3  0x3  0x3  0x3  0x3  0x3  0x3  0x3
+					     0x3  0x3  0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+					     0xff 0xff 0xff 0xff 0xff 0xff 0xff 0x8  0xff 0xff
+					     0xff 0x8  0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+					     0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+					     0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
+					     0xff 0xff 0xff>;
+			};
+		};
+	};
+}
diff --git a/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt
new file mode 100644
index 00000000000..38e322db81c
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt
@@ -0,0 +1,78 @@
+Binding for Nexell s5pxx18 pin cotroller
+========================================
+
+Nexell's ARM bases SoC's integrates a GPIO and Pin mux/config hardware
+controller. It controls the input/output settings on the available pads/pins
+and also provides ability to multiplex and configure the output of various
+on-chip controllers onto these pads.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+
+Required properties:
+  - compatible: "nexell,s5pxx18-pinctrl"
+  - reg: should be register base and length as documented in the datasheet
+  - interrupts: interrupt specifier for the controller over gpio and alive pins
+
+Example:
+pinctrl_0: pinctrl@c0010000 {
+	compatible = "nexell,s5pxx18-pinctrl";
+		reg = <0xc0010000 0xf000>;
+		bootph-all;
+};
+
+Nexell's pin configuration nodes act as a container for an arbitrary number of
+subnodes. Each of these subnodes represents some desired configuration for a
+pin, a group, or a list of pins or groups. This configuration can include the
+mux function to select on those pin(s)/group(s), and various pin configuration
+parameters.
+
+  Child nodes must be set at least one of the following settings:
+  - pins = Select pins for using this function.
+  - pin-function = Select the function for use in a selected pin.
+  - pin-pull = Pull up/down configuration.
+  - pin-strength = Drive strength configuration.
+
+  Valid values for nexell,pins are:
+     "gpioX-N" : X in {A,B,C,D,E}, N in {0-31}
+  Valid values for nexell,pin-function are:
+     "N"       : N in {0-3}.
+                 This setting means that the value is different for each pin.
+                 Please refer to datasheet.
+  Valid values for nexell,pin-pull are:
+     "N"       : 0 - Down, 1 - Up, 2 - Off
+  Valid values for nexell,pin-strength are:
+     "N"       : 0,1,2,3
+
+
+Example:
+  - pin settings
+	mmc0_clk: mmc0-clk {
+		pins = "gpioa-29";
+		pin-function = <1>;
+		pin-pull = <2>;
+		pin-strength = <2>;
+	};
+
+	mmc0_cmd: mmc0-cmd {
+		pins = "gpioa-31";
+		pin-function = <1>;
+		pin-pull = <2>;
+		pin-strength = <1>;
+	};
+
+	mmc0_bus4: mmc0-bus-width4 {
+		pins = "gpiob-1, gpiob-3, gpiob-5, gpiob-7";
+		pin-function = <1>;
+		pin-pull = <2>;
+		pin-strength = <1>;
+	};
+
+  - used by client devices
+	mmc0:mmc@... {
+		pinctrl-names = "default";
+		pinctrl-0 = <&mmc0_clk>, <&mmc0_cmd>, <&mmc0_bus4>;
+		...
+	};
diff --git a/doc/device-tree-bindings/pinctrl/pinctrl-bindings.txt b/doc/device-tree-bindings/pinctrl/pinctrl-bindings.txt
new file mode 100644
index 00000000000..603796f169e
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/pinctrl-bindings.txt
@@ -0,0 +1,289 @@
+== Introduction ==
+
+Hardware modules that control pin multiplexing or configuration parameters
+such as pull-up/down, tri-state, drive-strength etc are designated as pin
+controllers. Each pin controller must be represented as a node in device tree,
+just like any other hardware module.
+
+Hardware modules whose signals are affected by pin configuration are
+designated client devices. Again, each client device must be represented as a
+node in device tree, just like any other hardware module.
+
+For a client device to operate correctly, certain pin controllers must
+set up certain specific pin configurations. Some client devices need a
+single static pin configuration, e.g. set up during initialization. Others
+need to reconfigure pins at run-time, for example to tri-state pins when the
+device is inactive. Hence, each client device can define a set of named
+states. The number and names of those states is defined by the client device's
+own binding.
+
+The common pinctrl bindings defined in this file provide an infrastructure
+for client device device tree nodes to map those state names to the pin
+configuration used by those states.
+
+Note that pin controllers themselves may also be client devices of themselves.
+For example, a pin controller may set up its own "active" state when the
+driver loads. This would allow representing a board's static pin configuration
+in a single place, rather than splitting it across multiple client device
+nodes. The decision to do this or not somewhat rests with the author of
+individual board device tree files, and any requirements imposed by the
+bindings for the individual client devices in use by that board, i.e. whether
+they require certain specific named states for dynamic pin configuration.
+
+== Pinctrl client devices ==
+
+For each client device individually, every pin state is assigned an integer
+ID. These numbers start at 0, and are contiguous. For each state ID, a unique
+property exists to define the pin configuration. Each state may also be
+assigned a name. When names are used, another property exists to map from
+those names to the integer IDs.
+
+Each client device's own binding determines the set of states that must be
+defined in its device tree node, and whether to define the set of state
+IDs that must be provided, or whether to define the set of state names that
+must be provided.
+
+Required properties:
+pinctrl-0:	List of phandles, each pointing at a pin configuration
+		node. These referenced pin configuration nodes must be child
+		nodes of the pin controller that they configure. Multiple
+		entries may exist in this list so that multiple pin
+		controllers may be configured, or so that a state may be built
+		from multiple nodes for a single pin controller, each
+		contributing part of the overall configuration. See the next
+		section of this document for details of the format of these
+		pin configuration nodes.
+
+		In some cases, it may be useful to define a state, but for it
+		to be empty. This may be required when a common IP block is
+		used in an SoC either without a pin controller, or where the
+		pin controller does not affect the HW module in question. If
+		the binding for that IP block requires certain pin states to
+		exist, they must still be defined, but may be left empty.
+
+Optional properties:
+pinctrl-1:	List of phandles, each pointing at a pin configuration
+		node within a pin controller.
+...
+pinctrl-n:	List of phandles, each pointing at a pin configuration
+		node within a pin controller.
+pinctrl-names:	The list of names to assign states. List entry 0 defines the
+		name for integer state ID 0, list entry 1 for state ID 1, and
+		so on.
+
+For example:
+
+	/* For a client device requiring named states */
+	device {
+		pinctrl-names = "active", "idle";
+		pinctrl-0 = <&state_0_node_a>;
+		pinctrl-1 = <&state_1_node_a &state_1_node_b>;
+	};
+
+	/* For the same device if using state IDs */
+	device {
+		pinctrl-0 = <&state_0_node_a>;
+		pinctrl-1 = <&state_1_node_a &state_1_node_b>;
+	};
+
+	/*
+	 * For an IP block whose binding supports pin configuration,
+	 * but in use on an SoC that doesn't have any pin control hardware
+	 */
+	device {
+		pinctrl-names = "active", "idle";
+		pinctrl-0 = <>;
+		pinctrl-1 = <>;
+	};
+
+== Pin controller devices ==
+
+Pin controller devices should contain the pin configuration nodes that client
+devices reference.
+
+For example:
+
+	pincontroller {
+		... /* Standard DT properties for the device itself elided */
+
+		state_0_node_a {
+			...
+		};
+		state_1_node_a {
+			...
+		};
+		state_1_node_b {
+			...
+		};
+	}
+
+The contents of each of those pin configuration child nodes is defined
+entirely by the binding for the individual pin controller device. There
+exists no common standard for this content. The pinctrl framework only
+provides generic helper bindings that the pin controller driver can use.
+
+The pin configuration nodes need not be direct children of the pin controller
+device; they may be grandchildren, for example. Whether this is legal, and
+whether there is any interaction between the child and intermediate parent
+nodes, is again defined entirely by the binding for the individual pin
+controller device.
+
+== Generic pin multiplexing node content ==
+
+pin multiplexing nodes:
+
+function		- the mux function to select
+groups			- the list of groups to select with this function
+			  (either this or "pins" must be specified)
+pins			- the list of pins to select with this function (either
+			  this or "groups" must be specified)
+
+Example:
+
+state_0_node_a {
+	uart0 {
+		function = "uart0";
+		groups = "u0rxtx", "u0rtscts";
+	};
+};
+state_1_node_a {
+	spi0 {
+		function = "spi0";
+		groups = "spi0pins";
+	};
+};
+state_2_node_a {
+	function = "i2c0";
+	pins = "mfio29", "mfio30";
+};
+
+For hardware where pin multiplexing configurations have to be specified for
+each single pin the number of required sub-nodes containing "pin" and
+"function" properties can quickly escalate and become hard to write and
+maintain.
+
+For cases like this, the pin controller driver may use the pinmux helper
+property, where the pin identifier is provided with mux configuration settings
+in a pinmux group. A pinmux group consists of the pin identifier and mux
+settings represented as a single integer or an array of integers.
+
+The pinmux property accepts an array of pinmux groups, each of them describing
+a single pin multiplexing configuration.
+
+pincontroller {
+	state_0_node_a {
+		pinmux = <PINMUX_GROUP>, <PINMUX_GROUP>, ...;
+	};
+};
+
+Each individual pin controller driver bindings documentation shall specify
+how pin IDs and pin multiplexing configuration are defined and assembled
+together in a pinmux group.
+
+== Generic pin configuration node content ==
+
+Many data items that are represented in a pin configuration node are common
+and generic. Pin control bindings should use the properties defined below
+where they are applicable; not all of these properties are relevant or useful
+for all hardware or binding structures. Each individual binding document
+should state which of these generic properties, if any, are used, and the
+structure of the DT nodes that contain these properties.
+
+Supported generic properties are:
+
+pins			- the list of pins that properties in the node
+			  apply to (either this, "group" or "pinmux" has to be
+			  specified)
+group			- the group to apply the properties to, if the driver
+			  supports configuration of whole groups rather than
+			  individual pins (either this, "pins" or "pinmux" has
+			  to be specified)
+pinmux			- the list of numeric pin ids and their mux settings
+			  that properties in the node apply to (either this,
+			  "pins" or "groups" have to be specified)
+bias-disable		- disable any pin bias
+bias-high-impedance	- high impedance mode ("third-state", "floating")
+bias-bus-hold		- latch weakly
+bias-pull-up		- pull up the pin
+bias-pull-down		- pull down the pin
+bias-pull-pin-default	- use pin-default pull state
+drive-push-pull		- drive actively high and low
+drive-open-drain	- drive with open drain
+drive-open-source	- drive with open source
+drive-strength		- sink or source at most X mA
+drive-strength-microamp	- sink or source at most X uA
+input-enable		- enable input on pin (no effect on output, such as
+			  enabling an input buffer)
+input-disable		- disable input on pin (no effect on output, such as
+			  disabling an input buffer)
+input-schmitt-enable	- enable schmitt-trigger mode
+input-schmitt-disable	- disable schmitt-trigger mode
+input-debounce		- debounce mode with debound time X
+power-source		- select between different power supplies
+low-power-enable	- enable low power mode
+low-power-disable	- disable low power mode
+output-disable		- disable output on a pin (such as disable an output
+			  buffer)
+output-enable		- enable output on a pin without actively driving it
+			  (such as enabling an output buffer)
+output-low		- set the pin to output mode with low level
+output-high		- set the pin to output mode with high level
+sleep-hardware-state	- indicate this is sleep related state which will be programmed
+			  into the registers for the sleep state.
+slew-rate		- set the slew rate
+skew-delay		- this affects the expected clock skew on input pins
+			  and the delay before latching a value to an output
+			  pin. Typically indicates how many double-inverters are
+			  used to delay the signal.
+
+For example:
+
+state_0_node_a {
+	cts_rxd {
+		pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
+		bias-pull-up;
+	};
+};
+state_1_node_a {
+	rts_txd {
+		pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
+		output-high;
+	};
+};
+state_2_node_a {
+	foo {
+		group = "foo-group";
+		bias-pull-up;
+	};
+};
+state_3_node_a {
+	mux {
+		pinmux = <GPIOx_PINm_MUXn>, <GPIOx_PINj_MUXk)>;
+		input-enable;
+	};
+};
+
+Some of the generic properties take arguments. For those that do, the
+arguments are described below.
+
+- pins takes a list of pin names or IDs as a required argument. The specific
+  binding for the hardware defines:
+  - Whether the entries are integers or strings, and their meaning.
+
+- pinmux takes a list of pin IDs and mux settings as required argument. The
+  specific bindings for the hardware defines:
+  - How pin IDs and mux settings are defined and assembled together in a single
+    integer or an array of integers.
+
+- bias-pull-up, -down and -pin-default take as optional argument on hardware
+  supporting it the pull strength in Ohm. bias-disable will disable the pull.
+
+- drive-strength takes as argument the target strength in mA.
+
+- drive-strength-microamp takes as argument the target strength in uA.
+
+- input-debounce takes the debounce time in usec as argument
+  or 0 to disable debouncing
+
+More in-depth documentation on these parameters can be found in
+<include/linux/pinctrl/pinconf-generic.h>
diff --git a/doc/device-tree-bindings/pinctrl/rockchip,pinctrl.txt b/doc/device-tree-bindings/pinctrl/rockchip,pinctrl.txt
new file mode 100644
index 00000000000..388b213249f
--- /dev/null
+++ b/doc/device-tree-bindings/pinctrl/rockchip,pinctrl.txt
@@ -0,0 +1,157 @@
+* Rockchip Pinmux Controller
+
+The Rockchip Pinmux Controller, enables the IC
+to share one PAD to several functional blocks. The sharing is done by
+multiplexing the PAD input/output signals. For each PAD there are several
+muxing options with option 0 being the use as a GPIO.
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+The Rockchip pin configuration node is a node of a group of pins which can be
+used for a specific device or function. This node represents both mux and
+config of the pins in that group. The 'pins' selects the function mode(also
+named pin mode) this pin can work on and the 'config' configures various pad
+settings such as pull-up, etc.
+
+The pins are grouped into up to 5 individual pin banks which need to be
+defined as gpio sub-nodes of the pinmux controller.
+
+Required properties for iomux controller:
+  - compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl"
+		       "rockchip,rk3066b-pinctrl", "rockchip,rk3188-pinctrl"
+		       "rockchip,rk3288-pinctrl"
+  - rockchip,grf: phandle referencing a syscon providing the
+	 "general register files"
+
+Optional properties for iomux controller:
+  - rockchip,pmu: phandle referencing a syscon providing the pmu registers
+	 as some SoCs carry parts of the iomux controller registers there.
+	 Required for at least rk3188 and rk3288.
+
+Deprecated properties for iomux controller:
+  - reg: first element is the general register space of the iomux controller
+	 It should be large enough to contain also separate pull registers.
+	 second element is the separate pull register space of the rk3188.
+	 Use rockchip,grf and rockchip,pmu described above instead.
+
+Required properties for gpio sub nodes:
+  - compatible: "rockchip,gpio-bank"
+  - reg: register of the gpio bank (different than the iomux registerset)
+  - interrupts: base interrupt of the gpio bank in the interrupt controller
+  - clocks: clock that drives this bank
+  - gpio-controller: identifies the node as a gpio controller and pin bank.
+  - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
+    binding is used, the amount of cells must be specified as 2. See generic
+    GPIO binding documentation for description of particular cells.
+  - interrupt-controller: identifies the controller node as interrupt-parent.
+  - #interrupt-cells: the value of this property should be 2 and the interrupt
+    cells should use the standard two-cell scheme described in
+    bindings/interrupt-controller/interrupts.txt
+
+Deprecated properties for gpio sub nodes:
+  - compatible: "rockchip,rk3188-gpio-bank0"
+  - reg: second element: separate pull register for rk3188 bank0, use
+	 rockchip,pmu described above instead
+
+Required properties for pin configuration node:
+  - rockchip,pins: 3 integers array, represents a group of pins mux and config
+    setting. The format is rockchip,pins = <PIN_BANK PIN_BANK_IDX MUX &phandle>.
+    The MUX 0 means gpio and MUX 1 to N mean the specific device function.
+    The phandle of a node containing the generic pinconfig options
+    to use, as described in pinctrl-bindings.txt in this directory.
+
+Examples:
+
+#include <dt-bindings/pinctrl/rockchip.h>
+
+...
+
+pinctrl@20008000 {
+	compatible = "rockchip,rk3066a-pinctrl";
+	rockchip,grf = <&grf>;
+
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+
+	gpio0: gpio0@20034000 {
+		compatible = "rockchip,gpio-bank";
+		reg = <0x20034000 0x100>;
+		interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clk_gates8 9>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	};
+
+	...
+
+	pcfg_pull_default: pcfg_pull_default {
+		bias-pull-pin-default
+	};
+
+	uart2 {
+		uart2_xfer: uart2-xfer {
+			rockchip,pins = <RK_GPIO1 8 1 &pcfg_pull_default>,
+					<RK_GPIO1 9 1 &pcfg_pull_default>;
+		};
+	};
+};
+
+uart2: serial@20064000 {
+	compatible = "snps,dw-apb-uart";
+	reg = <0x20064000 0x400>;
+	interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+	reg-shift = <2>;
+	reg-io-width = <1>;
+	clocks = <&mux_uart2>;
+	status = "okay";
+
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart2_xfer>;
+};
+
+Example for rk3188:
+
+	pinctrl@20008000 {
+		compatible = "rockchip,rk3188-pinctrl";
+		rockchip,grf = <&grf>;
+		rockchip,pmu = <&pmu>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		gpio0: gpio0@0x2000a000 {
+			compatible = "rockchip,rk3188-gpio-bank0";
+			reg = <0x2000a000 0x100>;
+			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk_gates8 9>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		gpio1: gpio1@0x2003c000 {
+			compatible = "rockchip,gpio-bank";
+			reg = <0x2003c000 0x100>;
+			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clk_gates8 10>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+
+			interrupt-controller;
+			#interrupt-cells = <2>;
+		};
+
+		...
+
+	};
diff --git a/doc/device-tree-bindings/pmic/max77663.txt b/doc/device-tree-bindings/pmic/max77663.txt
new file mode 100644
index 00000000000..ddb7d3eb143
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/max77663.txt
@@ -0,0 +1,84 @@
+MAXIM, MAX77663 PMIC
+
+This device uses two drivers:
+- drivers/power/pmic/max77663.c (for parent device)
+- drivers/power/regulator/max77663_regulator.c (for child regulators)
+
+This chapter describes the binding info for the PMIC driver and regulators.
+
+Required properties for PMIC:
+- compatible: "maxim,max77663"
+- reg: usually 0x1c or 0x3c
+
+With those two properties, the pmic device can be used for read/write only.
+To bind each regulator, the optional regulators subnode should exists.
+
+Optional subnode:
+- name: regulators (subnode list of each device's regulator)
+
+Regulators subnode contains set on supported regulators.
+
+Required properties:
+- regulator-name: used for regulator uclass platform data '.name',
+
+List of supported regulator nodes names for max77663:
+- sd0, sd1, sd2, sd3, ldo0, ldo1, ldo2, ldo3, ldo4, ldo5, ldo6, ldo7, ldo8
+
+Optional:
+- regulator-min-microvolt: minimum allowed Voltage to set
+- regulator-max-microvolt: minimum allowed Voltage to set
+- regulator-always-on: regulator should be never disabled
+- regulator-boot-on: regulator should be enabled by the bootloader
+
+Linux driver binding for this driver is compatible.
+
+Example:
+
+max77663@1c {
+	compatible = "maxim,max77663";
+	reg = <0x1c>;
+
+	regulators {
+		sd0 {
+			regulator-name = "vdd_cpu";
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <1250000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		...
+
+		ldo0 {
+			regulator-name = "avdd_pll";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+		};
+
+		...
+
+		ldo2 {
+			regulator-name = "avdd_usb";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		ldo3 {
+			regulator-name = "vdd_sdmmc3";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3000000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		...
+
+		ldo8 {
+			regulator-name = "avdd_dsi_csi";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/pmic/max77686.txt b/doc/device-tree-bindings/pmic/max77686.txt
new file mode 100644
index 00000000000..09aee647aac
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/max77686.txt
@@ -0,0 +1,35 @@
+MAXIM, MAX77686 pmic
+
+This device uses two drivers:
+- drivers/power/pmic/max77686.c (for parent device)
+- drivers/power/regulator/max77686.c (for child regulators)
+
+This file describes the binding info for the PMIC driver.
+
+To bind the regulators, please read the additional binding info:
+- doc/device-tree-bindings/regulator/max77686.txt
+
+Required properties:
+- compatible: "maxim,max77686"
+- reg = 0x9
+
+With those two properties, the pmic device can be used for read/write only.
+To bind each regulator, the optional regulators subnode should exists.
+
+Optional subnode:
+- voltage-regulators: subnode list of each device's regulator
+  (see max77686.txt - regulator binding info)
+
+Example:
+
+max77686@09 {
+	compatible = "maxim,max77686";
+	reg = <0x09>;
+
+	voltage-regulators {
+		ldo1 {
+			...
+		};
+		...
+	};
+};
diff --git a/doc/device-tree-bindings/pmic/rn5t567.txt b/doc/device-tree-bindings/pmic/rn5t567.txt
new file mode 100644
index 00000000000..e9e688537c9
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/rn5t567.txt
@@ -0,0 +1,17 @@
+Ricoh RN5T567 PMIC
+
+This file describes the binding info for the PMIC driver.
+
+Required properties:
+- compatible: "ricoh,rn5t567"
+- reg: depending on strapping, e.g. 0x33
+
+With those two properties, the PMIC device can be used to read/write
+registers.
+
+Example:
+
+rn5t567@33 {
+	compatible = "ricoh,rn5t567";
+	reg = <0x33>;
+};
diff --git a/doc/device-tree-bindings/pmic/s2mps11.txt b/doc/device-tree-bindings/pmic/s2mps11.txt
new file mode 100644
index 00000000000..422f14f13e9
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/s2mps11.txt
@@ -0,0 +1,17 @@
+SAMSUNG, S2MPS11 PMIC
+
+This file describes the binding info for the PMIC driver:
+- drivers/power/pmic/s2mps11.c
+
+Required properties:
+- compatible: "samsung,s2mps11-pmic"
+- reg = 0x66
+
+With those two properties, the pmic device can be used for read/write only.
+
+Example:
+
+s2mps11@66 {
+	compatible = "samsung,s2mps11-pmic";
+	reg = <0x66>;
+};
diff --git a/doc/device-tree-bindings/pmic/sandbox.txt b/doc/device-tree-bindings/pmic/sandbox.txt
new file mode 100644
index 00000000000..d84c97717b3
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/sandbox.txt
@@ -0,0 +1,35 @@
+Sandbox pmic
+
+This device uses two drivers:
+- drivers/power/pmic/sandbox.c (for parent device)
+- drivers/power/regulator/sandbox.c (for child regulators)
+
+This file describes the binding info for the PMIC driver.
+
+To bind the regulators, please read the regulator binding info:
+- doc/device-tree-bindings/regulator/sandbox.txt
+
+Required PMIC node properties:
+- compatible: "sandbox,pmic"
+- reg = 0x40
+
+Required PMIC's "emul" subnode,  with property:
+- compatible: "sandbox,i2c-pmic"
+
+With the above properties, the pmic device can be used for read/write only.
+To bind each regulator, the optional regulator subnodes should exists.
+
+Optional subnodes:
+- ldo/buck subnodes of each device's regulator (see regulator binding info)
+
+Example:
+
+sandbox_pmic {
+	compatible = "sandbox,pmic";
+	reg = <0x40>;
+
+	/* Mandatory for I/O */
+	emul {
+		compatible = "sandbox,i2c-pmic";
+	};
+};
diff --git a/doc/device-tree-bindings/pmic/tps65911.txt b/doc/device-tree-bindings/pmic/tps65911.txt
new file mode 100644
index 00000000000..29270efbfe0
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/tps65911.txt
@@ -0,0 +1,78 @@
+Texas Instruments, TPS65911 PMIC
+
+This device uses two drivers:
+- drivers/power/pmic/tps65910.c (for parent device)
+- drivers/power/regulator/tps65911_regulator.c (for child regulators)
+
+This chapter describes the binding info for the PMIC driver and regulators.
+
+Required properties for PMIC:
+- compatible: "ti,tps65911"
+- reg: 0x2d
+
+With those two properties, the pmic device can be used for read/write only.
+To bind each regulator, the optional regulators subnode should exists.
+
+Optional subnode:
+- name: regulators (subnode list of each device's regulator)
+
+Regulators subnode contains set on supported regulators.
+
+Required properties:
+- regulator-name: used for regulator uclass platform data '.name',
+
+List of supported regulator nodes names for tps65911:
+- vdd1, vdd2, vddctrl, vddio
+- ldo1, ldo2, ldo3, ldo4, ldo5, ldo6, ldo7, ldo8
+
+vddio in datasheet is referred as vio, but for reduction of code and
+unification of smps regulators it is named vddio.
+
+Optional:
+- regulator-min-microvolt: minimum allowed Voltage to set
+- regulator-max-microvolt: minimum allowed Voltage to set
+- regulator-always-on: regulator should be never disabled
+- regulator-boot-on: regulator should be enabled by the bootloader
+
+Example:
+
+tps65911@2d {
+	compatible = "ti,tps65911";
+	reg = <0x2d>;
+
+	regulators {
+		vdd1 {
+			regulator-name = "vdd_1v2_backlight";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		...
+
+		vddio {
+			regulator-name = "vdd_1v8_gen";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		ldo1 {
+			regulator-name = "vdd_emmc_core";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		...
+
+		ldo8 {
+			regulator-name = "vdd_ddr_hs";
+			regulator-min-microvolt = <1000000>;
+			regulator-max-microvolt = <1000000>;
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/pmic/tps80031.txt b/doc/device-tree-bindings/pmic/tps80031.txt
new file mode 100644
index 00000000000..577e6de1c1f
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/tps80031.txt
@@ -0,0 +1,76 @@
+Texas Instruments, TPS80031/TPS80032 PMIC
+
+This device uses two drivers:
+- drivers/power/pmic/tps80031.c (for parent device)
+- drivers/power/regulator/tps80031_regulator.c (for child regulators)
+
+This chapter describes the binding info for the PMIC driver and regulators.
+
+Required properties for PMIC:
+- compatible: "ti,tps80031" or "ti,tps80032"
+- reg: 0x48
+
+With those two properties, the pmic device can be used for read/write only.
+To bind each regulator, the optional regulators subnode should exists.
+
+Optional subnode:
+- name: regulators (subnode list of each device's regulator)
+
+Regulators subnode contains set on supported regulators.
+
+Required properties:
+- regulator-name: used for regulator uclass platform data '.name',
+
+List of supported regulator nodes names for tps80031/tps80032:
+- smps1, smps2, smps3, smps4, smps5
+- ldo1, ldo2, ldo3, ldo4, ldo5, ldo6, ldo7, ldoln, ldousb
+
+SMPS5 in Linux 3.1.10 is referred as vio, but datasheet clearly names it SMPS5.
+
+Optional:
+- regulator-min-microvolt: minimum allowed Voltage to set
+- regulator-max-microvolt: minimum allowed Voltage to set
+- regulator-always-on: regulator should be never disabled
+- regulator-boot-on: regulator should be enabled by the bootloader
+
+Example:
+
+tps80032@48 {
+	compatible = "ti,tps80032";
+	reg = <0x48>;
+
+	regulators {
+		smps1 {
+			regulator-name = "vdd_cpu";
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <1250000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		...
+
+		smps5 {
+			regulator-name = "vdd_1v8_gen";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		ldo1 {
+			regulator-name = "avdd_dsi_csi";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-boot-on;
+		};
+
+		...
+
+		ldousb {
+			regulator-name = "avdd_usb";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/power/ti,sci-pm-domain.txt b/doc/device-tree-bindings/power/ti,sci-pm-domain.txt
new file mode 100644
index 00000000000..72d9fbc833c
--- /dev/null
+++ b/doc/device-tree-bindings/power/ti,sci-pm-domain.txt
@@ -0,0 +1,59 @@
+Texas Instruments TI SCI Generic Power Domain
+=============================================
+
+Some TI SoCs contain a system controller (like the SYSFW, etc...) that is
+responsible for controlling the state of the IPs that are present.
+Communication between the host processor running an OS and the system
+controller happens through a protocol known as TI SCI [1].
+
+[1] http://processors.wiki.ti.com/index.php/TISCI
+
+PM Domain Node
+==============
+The PM domain node represents the global PM domain managed by the SYSFW. Because
+this relies on the TI SCI protocol to communicate with the SYSFW it must be a
+child of the sysfw node.
+
+Required Properties:
+--------------------
+- compatible: Must be "ti,sci-pm-domain"
+- #power-domain-cells: Can be one of the following:
+			1: Containing the device id of each node
+			2: First entry should be device id
+			   Second entry should be one of the floowing:
+			   TI_SCI_PD_EXCLUSIVE: To allow device to be
+						exclusively controlled by
+						the requesting hosts.
+			   TI_SCI_PD_SHARED: To allow device to be shared
+					     by multiple hosts.
+
+Example (AM65x):
+----------------
+	sysfw: sysfw {
+		compatible = "ti,am654-system-controller";
+		...
+		k3_pds: power-controller {
+			compatible = "ti,sci-pm-domain";
+			#power-domain-cells = <1>;
+		};
+	};
+
+PM Domain Consumers
+===================
+Hardware blocks belonging to a PM domain should contain a "power-domains"
+property that is a phandle pointing to the corresponding PM domain node
+along with an index representing the device id to be passed to the PMMC
+for device control.
+
+Required Properties:
+--------------------
+- power-domains: phandle pointing to the corresponding PM domain node
+		 and an ID representing the device.
+
+Example (AM65x):
+----------------
+	uart2: serial@02800000 {
+		compatible = "ti,omap4-uart";
+		...
+		power-domains = <&k3_pds 0x3f>;
+	};
diff --git a/doc/device-tree-bindings/power/tps65090.txt b/doc/device-tree-bindings/power/tps65090.txt
new file mode 100644
index 00000000000..8e5e0d3910d
--- /dev/null
+++ b/doc/device-tree-bindings/power/tps65090.txt
@@ -0,0 +1,17 @@
+TPS65090 Frontend PMU with Switchmode Charger
+
+Required Properties:
+-compatible: "ti,tps65090-charger"
+
+Optional Properties:
+-ti,enable-low-current-chrg: Enables charging when a low current is detected
+ while the default logic is to stop charging.
+
+This node is a subnode of the tps65090 PMIC.
+
+Example:
+
+	tps65090-charger {
+		compatible = "ti,tps65090-charger";
+		ti,enable-low-current-chrg;
+	};
diff --git a/doc/device-tree-bindings/pwm/cros-ec-pwm.txt b/doc/device-tree-bindings/pwm/cros-ec-pwm.txt
new file mode 100644
index 00000000000..f198d088917
--- /dev/null
+++ b/doc/device-tree-bindings/pwm/cros-ec-pwm.txt
@@ -0,0 +1,23 @@
+PWM controlled by ChromeOS EC
+
+Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller
+(EC) and controlled via a host-command interface.
+
+An EC PWM node should be only found as a sub-node of the EC node (see
+doc/device-tree-bindings/misc/cros-ec.txt).
+
+Required properties:
+- compatible: Must contain "google,cros-ec-pwm"
+- #pwm-cells: Should be 1. The cell specifies the PWM index.
+
+Example:
+	cros-ec@0 {
+		compatible = "google,cros-ec-spi";
+
+		...
+
+		cros_ec_pwm: ec-pwm {
+			compatible = "google,cros-ec-pwm";
+			#pwm-cells = <1>;
+		};
+	};
diff --git a/doc/device-tree-bindings/pwm/pwm-at91.txt b/doc/device-tree-bindings/pwm/pwm-at91.txt
new file mode 100644
index 00000000000..a03da404f5e
--- /dev/null
+++ b/doc/device-tree-bindings/pwm/pwm-at91.txt
@@ -0,0 +1,16 @@
+Microchip AT91 PWM controller for SAMA5D2
+
+Required properties:
+  - compatible: Should be "atmel,sama5d2-pwm"
+  - reg: Physical base address and length of the controller's registers.
+  - clocks: Should contain a clock identifier for the PWM's parent clock.
+  - #pwm-cells: Should be 3.
+
+Example:
+
+pwm0: pwm@f802c000 {
+	compatible = "atmel,sama5d2-pwm";
+	reg = <0xf802c000 0x4000>;
+	clocks = <&pwm_clk>;
+	#pwm-cells = <3>;
+};
diff --git a/doc/device-tree-bindings/pwm/pwm-sifive.txt b/doc/device-tree-bindings/pwm/pwm-sifive.txt
new file mode 100644
index 00000000000..9a988372c44
--- /dev/null
+++ b/doc/device-tree-bindings/pwm/pwm-sifive.txt
@@ -0,0 +1,31 @@
+SiFive PWM controller
+
+Unlike most other PWM controllers, the SiFive PWM controller currently only
+supports one period for all channels in the PWM. All PWMs need to run at
+the same period. The period also has significant restrictions on the values
+it can achieve, which the driver rounds to the nearest achievable period.
+PWM RTL that corresponds to the IP block version numbers can be found
+here:
+
+https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
+
+Required properties:
+- compatible: Should be "sifive,<chip>-pwm" and "sifive,pwm<version>".
+  Supported compatible strings are: "sifive,fu540-c000-pwm" for the SiFive
+  PWM v0 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the
+  SiFive PWM v0 IP block with no chip integration tweaks.
+- reg: physical base address and length of the controller's registers
+- clocks: Should contain a clock identifier for the PWM's parent clock.
+- #pwm-cells: Should be 3.
+- interrupts: one interrupt per PWM channel
+
+Examples:
+
+pwm:  pwm@10020000 {
+	compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+	reg = <0x0 0x10020000 0x0 0x1000>;
+	clocks = <&tlclk>;
+	interrupt-parent = <&plic>;
+	interrupts = <42 43 44 45>;
+	#pwm-cells = <3>;
+};
diff --git a/doc/device-tree-bindings/pwm/pwm.txt b/doc/device-tree-bindings/pwm/pwm.txt
new file mode 100644
index 00000000000..8556263b850
--- /dev/null
+++ b/doc/device-tree-bindings/pwm/pwm.txt
@@ -0,0 +1,69 @@
+Specifying PWM information for devices
+======================================
+
+1) PWM user nodes
+-----------------
+
+PWM users should specify a list of PWM devices that they want to use
+with a property containing a 'pwm-list':
+
+	pwm-list ::= <single-pwm> [pwm-list]
+	single-pwm ::= <pwm-phandle> <pwm-specifier>
+	pwm-phandle : phandle to PWM controller node
+	pwm-specifier : array of #pwm-cells specifying the given PWM
+			(controller specific)
+
+PWM properties should be named "pwms". The exact meaning of each pwms
+property must be documented in the device tree binding for each device.
+An optional property "pwm-names" may contain a list of strings to label
+each of the PWM devices listed in the "pwms" property. If no "pwm-names"
+property is given, the name of the user node will be used as fallback.
+
+Drivers for devices that use more than a single PWM device can use the
+"pwm-names" property to map the name of the PWM device requested by the
+pwm_get() call to an index into the list given by the "pwms" property.
+
+The following example could be used to describe a PWM-based backlight
+device:
+
+	pwm: pwm {
+		#pwm-cells = <2>;
+	};
+
+	[...]
+
+	bl: backlight {
+		pwms = <&pwm 0 5000000>;
+		pwm-names = "backlight";
+	};
+
+Note that in the example above, specifying the "pwm-names" is redundant
+because the name "backlight" would be used as fallback anyway.
+
+pwm-specifier typically encodes the chip-relative PWM number and the PWM
+period in nanoseconds.
+
+Optionally, the pwm-specifier can encode a number of flags (defined in
+<dt-bindings/pwm/pwm.h>) in a third cell:
+- PWM_POLARITY_INVERTED: invert the PWM signal polarity
+
+Example with optional PWM specifier for inverse polarity
+
+	bl: backlight {
+		pwms = <&pwm 0 5000000 PWM_POLARITY_INVERTED>;
+		pwm-names = "backlight";
+	};
+
+2) PWM controller nodes
+-----------------------
+
+PWM controller nodes must specify the number of cells used for the
+specifier using the '#pwm-cells' property.
+
+An example PWM controller might look like this:
+
+	pwm: pwm@7000a000 {
+		compatible = "nvidia,tegra20-pwm";
+		reg = <0x7000a000 0x100>;
+		#pwm-cells = <2>;
+	};
diff --git a/doc/device-tree-bindings/pwm/tegra20-pwm.txt b/doc/device-tree-bindings/pwm/tegra20-pwm.txt
new file mode 100644
index 00000000000..01438ecd662
--- /dev/null
+++ b/doc/device-tree-bindings/pwm/tegra20-pwm.txt
@@ -0,0 +1,18 @@
+Tegra SoC PWFM controller
+
+Required properties:
+- compatible: should be one of:
+  - "nvidia,tegra20-pwm"
+  - "nvidia,tegra30-pwm"
+- reg: physical base address and length of the controller's registers
+- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
+  first cell specifies the per-chip index of the PWM to use and the second
+  cell is the period in nanoseconds.
+
+Example:
+
+	pwm: pwm@7000a000 {
+		compatible = "nvidia,tegra20-pwm";
+		reg = <0x7000a000 0x100>;
+		#pwm-cells = <2>;
+	};
diff --git a/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt b/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt
new file mode 100644
index 00000000000..de498aca784
--- /dev/null
+++ b/doc/device-tree-bindings/ram/fsl,mpc83xx-mem-controller.txt
@@ -0,0 +1,314 @@
+MPC83xx RAM controller
+
+This driver supplies support for the embedded RAM controller on MCP83xx-series
+SoCs.
+
+For static configuration mode, each controller node should have child nodes
+describing the actual RAM modules installed.
+
+Controller node
+===============
+
+Required properties:
+- compatible:                Must be "fsl,mpc83xx-mem-controller"
+- reg:                       The address of the RAM controller's register space
+- #address-cells:            Must be 2
+- #size-cells:               Must be 1
+- driver_software_override:  DDR driver software override is enabled (1) or
+                             disabled (0)
+- p_impedance_override:      DDR driver software p-impedance override; possible
+                             values:
+                              * DSO_P_IMPEDANCE_HIGHEST_Z
+                              * DSO_P_IMPEDANCE_MUCH_HIGHER_Z
+                              * DSO_P_IMPEDANCE_HIGHER_Z
+                              * DSO_P_IMPEDANCE_NOMINAL
+                              * DSO_P_IMPEDANCE_LOWER_Z
+- n_impedance_override:      DDR driver software n-impedance override; possible
+                             values:
+                              * DSO_N_IMPEDANCE_HIGHEST_Z
+                              * DSO_N_IMPEDANCE_MUCH_HIGHER_Z
+                              * DSO_N_IMPEDANCE_HIGHER_Z
+                              * DSO_N_IMPEDANCE_NOMINAL
+                              * DSO_N_IMPEDANCE_LOWER_Z
+- odt_termination_value:     ODT termination value for I/Os; possible values:
+                              * ODT_TERMINATION_75_OHM
+                              * ODT_TERMINATION_150_OHM
+- ddr_type:                  Selects voltage level for DDR pads; possible
+                             values:
+                              * DDR_TYPE_DDR2_1_8_VOLT
+                              * DDR_TYPE_DDR1_2_5_VOLT
+- mvref_sel:                 Determine where MVREF_SEL signal is generated;
+                             possible values:
+                              * MVREF_SEL_EXTERNAL
+                              * MVREF_SEL_INTERNAL_GVDD
+- m_odr:                     Disable memory transaction reordering; possible
+                             values:
+                              * M_ODR_ENABLE
+                              * M_ODR_DISABLE
+- clock_adjust:              Clock adjust; possible values:
+                              * CLOCK_ADJUST_025
+                              * CLOCK_ADJUST_05
+                              * CLOCK_ADJUST_075
+                              * CLOCK_ADJUST_1
+- ext_refresh_rec:           Extended refresh recovery time; possible values:
+                              0, 16, 32, 48, 64, 80, 96, 112
+- read_to_write:             Read-to-write turnaround; possible values:
+                              0, 1, 2, 3
+- write_to_read:             Write-to-read turnaround; possible values:
+                              0, 1, 2, 3
+- read_to_read:              Read-to-read turnaround; possible values:
+                              0, 1, 2, 3
+- write_to_write:            Write-to-write turnaround; possible values:
+                              0, 1, 2, 3
+- active_powerdown_exit:     Active powerdown exit timing; possible values:
+                              1, 2, 3, 4, 5, 6, 7
+- precharge_powerdown_exit:  Precharge powerdown exit timing; possible values:
+                              1, 2, 3, 4, 5, 6, 7
+- odt_powerdown_exit:        ODT powerdown exit timing; possible values:
+                              0, 1, 2, 3, 4, 5, 6, 7, 8,
+                              9, 10, 11, 12, 13, 14, 15
+- mode_reg_set_cycle:        Mode register set cycle time; possible values:
+                              1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
+- precharge_to_activate:     Precharge-to-acitvate interval; possible values:
+                              1, 2, 3, 4, 5, 6, 7
+- activate_to_precharge:     Activate to precharge interval; possible values:
+                              4, 5, 6, 7, 8, 9, 10, 11, 12,
+                              13, 14, 15, 16, 17, 18, 19
+- activate_to_readwrite:     Activate to read/write interval for SDRAM;
+                             possible values:
+                              1, 2, 3, 4, 5, 6, 7
+- mcas_latency:              MCAS latency from READ command; possible values:
+                              * CASLAT_20
+                              * CASLAT_25
+                              * CASLAT_30
+                              * CASLAT_35
+                              * CASLAT_40
+                              * CASLAT_45
+                              * CASLAT_50
+                              * CASLAT_55
+                              * CASLAT_60
+                              * CASLAT_65
+                              * CASLAT_70
+                              * CASLAT_75
+                              * CASLAT_80
+- refresh_recovery:          Refresh recovery time; possible values:
+                              8, 9, 10, 11, 12, 13, 14, 15,
+                              16, 17, 18, 19, 20, 21, 22, 23
+- last_data_to_precharge:    Last data to precharge minimum interval; possible
+                             values:
+                              1, 2, 3, 4, 5, 6, 7
+- activate_to_activate:      Activate-to-activate interval; possible values:
+                              1, 2, 3, 4, 5, 6, 7
+- last_write_data_to_read:   Last write data pair to read command issue
+                             interval; possible values:
+                              1, 2, 3, 4, 5, 6, 7
+- additive_latency:          Additive latency; possible values:
+                              0, 1, 2, 3, 4, 5
+- mcas_to_preamble_override: MCAS-to-preamble-override; possible values:
+                              * READ_LAT
+                              * READ_LAT_PLUS_1_4
+                              * READ_LAT_PLUS_1_2
+                              * READ_LAT_PLUS_3_4
+                              * READ_LAT_PLUS_1
+                              * READ_LAT_PLUS_5_4
+                              * READ_LAT_PLUS_3_2
+                              * READ_LAT_PLUS_7_4
+                              * READ_LAT_PLUS_2
+                              * READ_LAT_PLUS_9_4
+                              * READ_LAT_PLUS_5_2
+                              * READ_LAT_PLUS_11_4
+                              * READ_LAT_PLUS_3
+                              * READ_LAT_PLUS_13_4
+                              * READ_LAT_PLUS_7_2
+                              * READ_LAT_PLUS_15_4
+                              * READ_LAT_PLUS_4
+                              * READ_LAT_PLUS_17_4
+                              * READ_LAT_PLUS_9_2
+                              * READ_LAT_PLUS_19_4
+- write_latency:             Write latency; possible values:
+                              1, 2, 3, 4, 5, 6, 7
+- read_to_precharge:         Read to precharge; possible values:
+                              1, 2, 3, 4
+- write_cmd_to_write_data:   Write command to write data strobe timing
+                             adjustment; possible values:
+                              * CLOCK_DELAY_0
+                              * CLOCK_DELAY_1_4
+                              * CLOCK_DELAY_1_2
+                              * CLOCK_DELAY_3_4
+                              * CLOCK_DELAY_1
+                              * CLOCK_DELAY_5_4
+                              * CLOCK_DELAY_3_2
+- minimum_cke_pulse_width:   Minimum CKE pulse width; possible values:
+                              1, 2, 3, 4
+- four_activates_window:     Window for four activates; possible values:
+                              1, 2, 3, 4 8, 9, 10, 11, 12,
+                              13, 14, 15, 16, 17, 18, 19
+- self_refresh:              Self refresh (during sleep); possible values:
+                              * SREN_DISABLE
+                              * SREN_ENABLE
+- ecc:                       Support for ECC; possible values:
+                              * ECC_DISABLE
+                              * ECC_ENABLE
+- registered_dram:           Support for registered DRAM; possible values:
+                              * RD_DISABLE
+                              * RD_ENABLE
+- sdram_type:                Type of SDRAM device to be used; possible values:
+                              * TYPE_DDR1
+                              * TYPE_DDR2
+- dynamic_power_management:  Dynamic power management mode; possible values:
+                              * DYN_PWR_DISABLE
+                              * DYN_PWR_ENABLE
+- databus_width:             DRAM data bus width; possible values
+                              * DATA_BUS_WIDTH_16
+                              * DATA_BUS_WIDTH_32
+- nc_auto_precharge:         Non-concurrent auto-precharge; possible values:
+                              * NCAP_DISABLE
+                              * NCAP_ENABLE
+- timing_2t:                 2T timing; possible values:
+                              * TIMING_1T
+                              * TIMING_2T
+- bank_interleaving_ctrl:    Bank (chip select) interleaving control; possible
+                             values:
+                              * INTERLEAVE_NONE
+                              * INTERLEAVE_1_AND_2
+- precharge_bit_8:           Precharge bin 8; possible values
+                              * PRECHARGE_MA_10
+                              * PRECHARGE_MA_8
+- half_strength:             Global half-strength override; possible values:
+                              * STRENGTH_FULL
+                              * STRENGTH_HALF
+- bypass_initialization:     Bypass initialization; possible values:
+                              * INITIALIZATION_DONT_BYPASS
+                              * INITIALIZATION_BYPASS
+- force_self_refresh:         Force self refresh; possible values:
+                               * MODE_NORMAL
+                               * MODE_REFRESH
+- dll_reset:                  DLL reset; possible values:
+                               * DLL_RESET_ENABLE
+                               * DLL_RESET_DISABLE
+- dqs_config:                 DQS configuration; possible values:
+                               * DQS_TRUE
+- odt_config:                 ODT configuration; possible values:
+                               * ODT_ASSERT_NEVER
+                               * ODT_ASSERT_WRITES
+                               * ODT_ASSERT_READS
+                               * ODT_ASSERT_ALWAYS
+- posted_refreshes:           Number of posted refreshes
+                               1, 2, 3, 4, 5, 6, 7, 8
+- sdmode:                     Initial value loaded into the DDR SDRAM mode
+                              register
+- esdmode:                    Initial value loaded into the DDR SDRAM extended
+                              mode register
+- esdmode2:                   Initial value loaded into the DDR SDRAM extended
+                              mode 2 register
+- esdmode3:                   Initial value loaded into the DDR SDRAM extended
+                              mode 3 register
+- refresh_interval:           Refresh interval; possible values:
+                               0 - 65535
+- precharge_interval:         Precharge interval; possible values:
+                               0 - 16383
+
+RAM module node:
+================
+
+Required properties:
+- reg:            A triple <cs addr size>, which consists of:
+                   * cs - the chipselect used to drive this RAM module
+                   * addr - the address where this RAM module's memory is map
+                     to in the global memory space
+                   * size - the size of the RAM module's memory in bytes
+- auto_precharge: Chip select auto-precharge; possible values:
+                   * AUTO_PRECHARGE_ENABLE
+                   * AUTO_PRECHARGE_DISABLE
+- odt_rd_cfg:     ODT for reads configuration; possible values:
+                   * ODT_RD_NEVER
+                   * ODT_RD_ONLY_CURRENT
+                   * ODT_RD_ONLY_OTHER_CS
+                   * ODT_RD_ONLY_OTHER_DIMM
+                   * ODT_RD_ALL
+- odt_wr_cfg:     ODT for writes configuration; possible values:
+                   * ODT_WR_NEVER
+                   * ODT_WR_ONLY_CURRENT
+                   * ODT_WR_ONLY_OTHER_CS
+                   * ODT_WR_ONLY_OTHER_DIMM
+                   * ODT_WR_ALL
+- bank_bits:      Number of bank bits for SDRAM on chip select; possible
+                  values:
+                   2, 3
+- row_bits:       Number of row bits for SDRAM on chip select; possible values:
+                   12, 13, 14
+- col_bits:       Number of column bits for SDRAM on chip select; possible
+                  values:
+                   8, 9, 10, 11
+
+Example:
+
+memory@2000 {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	compatible = "fsl,mpc83xx-mem-controller";
+	reg = <0x2000 0x1000>;
+	device_type = "memory";
+	bootph-all;
+
+	driver_software_override = <DSO_ENABLE>;
+	p_impedance_override = <DSO_P_IMPEDANCE_NOMINAL>;
+	n_impedance_override = <DSO_N_IMPEDANCE_NOMINAL>;
+	odt_termination_value = <ODT_TERMINATION_150_OHM>;
+	ddr_type = <DDR_TYPE_DDR2_1_8_VOLT>;
+
+	clock_adjust = <CLOCK_ADJUST_05>;
+
+	read_to_write = <0>;
+	write_to_read = <0>;
+	read_to_read = <0>;
+	write_to_write = <0>;
+	active_powerdown_exit = <2>;
+	precharge_powerdown_exit = <6>;
+	odt_powerdown_exit = <8>;
+	mode_reg_set_cycle = <2>;
+
+	precharge_to_activate = <2>;
+	activate_to_precharge = <6>;
+	activate_to_readwrite = <2>;
+	mcas_latency = <CASLAT_40>;
+	refresh_recovery = <17>;
+	last_data_to_precharge = <2>;
+	activate_to_activate = <2>;
+	last_write_data_to_read = <2>;
+
+	additive_latency = <0>;
+	mcas_to_preamble_override = <READ_LAT_PLUS_1_2>;
+	write_latency = <3>;
+	read_to_precharge = <2>;
+	write_cmd_to_write_data = <CLOCK_DELAY_1_2>;
+	minimum_cke_pulse_width = <3>;
+	four_activates_window = <5>;
+
+	self_refresh = <SREN_ENABLE>;
+	sdram_type = <TYPE_DDR2>;
+	databus_width = <DATA_BUS_WIDTH_32>;
+
+	force_self_refresh = <MODE_NORMAL>;
+	dll_reset = <DLL_RESET_ENABLE>;
+	dqs_config = <DQS_TRUE>;
+	odt_config = <ODT_ASSERT_READS>;
+	posted_refreshes = <1>;
+
+	refresh_interval = <2084>;
+	precharge_interval = <256>;
+
+	sdmode = <0x0242>;
+	esdmode = <0x0440>;
+
+	ram@0 {
+		reg = <0x0 0x0 0x8000000>;
+		compatible = "nanya,nt5tu64m16hg";
+
+		odt_rd_cfg = <ODT_RD_NEVER>;
+		odt_wr_cfg = <ODT_WR_ONLY_CURRENT>;
+		bank_bits = <3>;
+		row_bits = <13>;
+		col_bits = <10>;
+	};
+};
diff --git a/doc/device-tree-bindings/reboot-mode/reboot-mode-gpio.txt b/doc/device-tree-bindings/reboot-mode/reboot-mode-gpio.txt
new file mode 100644
index 00000000000..bb209d2742d
--- /dev/null
+++ b/doc/device-tree-bindings/reboot-mode/reboot-mode-gpio.txt
@@ -0,0 +1,20 @@
+GPIO Reboot Mode Configuration
+
+Required Properties:
+- compatible: must be "reboot-mode-gpio".
+- gpios: list of gpios that are used to calculate the reboot-mode magic value.
+	 Every gpio represents a bit in the magic value in the same order
+	 as defined in device tree.
+- modes: list of properties that define the modes and associated unique ids.
+
+Optional Properties:
+- u-boot,env-variable: used to save the reboot mode (default: reboot-mode).
+
+Example:
+	reboot-mode {
+		compatible = "reboot-mode-gpio";
+		gpios = <&gpio1 2 GPIO_ACTIVE_LOW>, <&gpio2 6 GPIO_ACTIVE_HIGH>;
+		u-boot,env-variable = "bootstatus";
+		mode-test = <0x00000001>;
+		mode-download = <0x00000002>;
+	};
diff --git a/doc/device-tree-bindings/reboot-mode/reboot-mode-rtc.txt b/doc/device-tree-bindings/reboot-mode/reboot-mode-rtc.txt
new file mode 100644
index 00000000000..23aa12c88c2
--- /dev/null
+++ b/doc/device-tree-bindings/reboot-mode/reboot-mode-rtc.txt
@@ -0,0 +1,22 @@
+RTC Reboot Mode Configuration
+
+Required Properties:
+- compatible: must be "reboot-mode-rtc".
+- rtc: reference to the rtc device used.
+- reg: start register and the number of bytes used. Maximum 4 bytes supported.
+- modes: list of properties that define the modes and associated unique ids.
+
+Optional Properties:
+- u-boot,env-variable: used to save the reboot mode (default: reboot-mode).
+- big-endian: if the magic value is stored in big-endian. (default: false).
+
+Example:
+	reboot-mode-rtc {
+		compatible = "reboot-mode-rtc";
+		rtc = <&rtc_0>;
+		reg = <0x14 4>;
+		u-boot,env-variable = "bootstatus";
+		big-endian;
+		modes-test = <0x21969147>;
+		modes-download = <0x51939147>;
+	};
diff --git a/doc/device-tree-bindings/regulator/fan53555.txt b/doc/device-tree-bindings/regulator/fan53555.txt
new file mode 100644
index 00000000000..b183738d6ca
--- /dev/null
+++ b/doc/device-tree-bindings/regulator/fan53555.txt
@@ -0,0 +1,23 @@
+Binding for Fairchild FAN53555 regulators
+
+Required properties:
+  - compatible: "fcs,fan53555"
+  - reg: I2C address
+
+Optional properties:
+  - fcs,suspend-voltage-selector: declare which of the two available
+		voltage selector registers should be used for the suspend
+		voltage. The other one is used for the runtime voltage setting
+		Possible values are either <0> or <1>
+  - vin-supply: regulator supplying the vin pin
+
+Example:
+
+	regulator@40 {
+		compatible = "fcs,fan53555";
+		regulator-name = "fan53555";
+		regulator-min-microvolt = <1000000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&parent_reg>;
+		fcs,suspend-voltage-selector = <1>;
+	};
diff --git a/doc/device-tree-bindings/regulator/fixed.txt b/doc/device-tree-bindings/regulator/fixed.txt
new file mode 100644
index 00000000000..453d2bef445
--- /dev/null
+++ b/doc/device-tree-bindings/regulator/fixed.txt
@@ -0,0 +1,44 @@
+Fixed Voltage regulator
+
+Binding:
+The binding is done by the property "compatible" - this is different, than for
+binding by the node prefix (doc/device-tree-bindings/regulator/regulator.txt).
+
+Required properties:
+- compatible: "regulator-fixed"
+- regulator-name: this is required by the regulator uclass
+
+Optional properties:
+- gpio: GPIO to use for enable control
+- startup-delay-us: startup time in microseconds
+- u-boot,off-on-delay-us: off delay time in microseconds
+- regulator constraints (binding info: regulator.txt)
+- enable-active-high: Polarity of GPIO is Active high. If this property
+  is missing, the default assumed is Active low.
+
+
+Other kernel-style properties, are currently not used.
+
+Note:
+For the regulator constraints, driver expects that:
+- regulator-min-microvolt is equal to regulator-max-microvolt
+- regulator-min-microamp is equal to regulator-max-microamp
+
+Example:
+fixed_regulator@0 {
+	/* Mandatory */
+	compatible = "regulator-fixed";
+	regulator-name = "LED_3.3V";
+
+	/* Optional: */
+	gpio = <&gpc1 0 GPIO_ACTIVE_LOW>;
+
+	/* Optional for regulator uclass */
+	regulator-min-microvolt = <3300000>;
+	regulator-max-microvolt = <3300000>;
+	regulator-min-microamp = <15000>;
+	regulator-max-microamp = <15000>;
+	regulator-always-on;
+	regulator-boot-on;
+	enable-active-high;
+};
diff --git a/doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt b/doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt
new file mode 100644
index 00000000000..bd272384afa
--- /dev/null
+++ b/doc/device-tree-bindings/regulator/fsl,anatop-regulator.txt
@@ -0,0 +1,45 @@
+ANATOP REGULATOR
+
+Anatop is an integrated regulator inside i.MX6 SoC.
+
+Required properties:
+- compatible:		Must be "fsl,anatop-regulator".
+- regulator-name:	Name of the regulator
+- anatop-reg-offset:	u32 value representing the anatop MFD register offset.
+- anatop-vol-bit-shift:	u32 value representing the bit shift for the register.
+- anatop-vol-bit-width:	u32 value representing the number of bits used in the
+			register.
+- anatop-min-bit-val:	u32 value representing the minimum value of this
+			register.
+- anatop-min-voltage:	u32 value representing the minimum voltage of this
+			regulator.
+- anatop-max-voltage:	u32 value representing the maximum voltage of this
+			regulator.
+
+Optional properties:
+- anatop-delay-reg-offset: u32 value representing the anatop MFD step time
+			   register offset.
+- anatop-delay-bit-shift: u32 value representing the bit shift for the step
+			  time register.
+- anatop-delay-bit-width: u32 value representing the number of bits used in
+			  the step time register.
+- anatop-enable-bit:	  u32 value representing regulator enable bit offset.
+- vin-supply:		  input supply phandle.
+
+Example:
+	regulator-vddpu {
+		compatible = "fsl,anatop-regulator";
+		regulator-name = "vddpu";
+		regulator-min-microvolt = <725000>;
+		regulator-max-microvolt = <1300000>;
+		regulator-always-on;
+		anatop-reg-offset = <0x140>;
+		anatop-vol-bit-shift = <9>;
+		anatop-vol-bit-width = <5>;
+		anatop-delay-reg-offset = <0x170>;
+		anatop-delay-bit-shift = <24>;
+		anatop-delay-bit-width = <2>;
+		anatop-min-bit-val = <1>;
+		anatop-min-voltage = <725000>;
+		anatop-max-voltage = <1300000>;
+	};
diff --git a/doc/device-tree-bindings/regulator/max77686.txt b/doc/device-tree-bindings/regulator/max77686.txt
new file mode 100644
index 00000000000..ae9b1b6e6b3
--- /dev/null
+++ b/doc/device-tree-bindings/regulator/max77686.txt
@@ -0,0 +1,70 @@
+MAXIM, MAX77686 regulators
+
+This device uses two drivers:
+- drivers/power/pmic/max77686.c (as parent I/O device)
+- drivers/power/regulator/max77686.c (for child regulators)
+
+This file describes the binding info for the REGULATOR driver.
+
+First, please read the binding info for the pmic:
+- doc/device-tree-bindings/pmic/max77686.txt
+
+Required subnode:
+- voltage-regulators: required for the PMIC driver
+
+Required properties:
+- regulator-name: used for regulator uclass platform data '.name'
+
+Optional:
+- regulator-min-microvolt: minimum allowed Voltage to set
+- regulator-max-microvolt: minimum allowed Voltage to set
+- regulator-always-on: regulator should be never disabled
+- regulator-boot-on: regulator should be enabled by the bootloader
+
+Example:
+(subnode of max77686 pmic node)
+voltage-regulators {
+	ldo1 {
+		regulator-name = "VDD_ALIVE_1.0V";
+		regulator-min-microvolt = <1000000>;
+		regulator-max-microvolt = <1000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	ldo2 {
+		regulator-name = "VDDQ_VM1M2_1.2V";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+	.
+	.
+	.
+	ldo26 {
+		regulator-name = "nc";
+		regulator-min-microvolt = <3000000>;
+		regulator-max-microvolt = <3000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	buck1 {
+		regulator-compatible = "BUCK1";
+		regulator-name = "VDD_MIF_1.0V";
+		regulator-min-microvolt = <8500000>;
+		regulator-max-microvolt = <1100000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+	.
+	.
+	.
+	buck9 {
+		regulator-compatible = "BUCK9";
+		regulator-name = "nc";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+	};
+};
diff --git a/doc/device-tree-bindings/regulator/regulator.txt b/doc/device-tree-bindings/regulator/regulator.txt
new file mode 100644
index 00000000000..ddb02b7a3c4
--- /dev/null
+++ b/doc/device-tree-bindings/regulator/regulator.txt
@@ -0,0 +1,93 @@
+Voltage/Current regulator
+
+Binding:
+The regulator devices don't use the "compatible" property. The binding is done
+by the prefix of regulator node's name, or, if this fails, by the prefix of the
+regulator's "regulator-name" property. Usually the pmic I/O driver will provide
+the array of 'struct pmic_child_info' with the prefixes and compatible drivers.
+The bind is done by calling function: pmic_bind_childs().
+Example drivers:
+pmic: drivers/power/pmic/max77686.c
+regulator: drivers/power/regulator/max77686.c
+
+For the node name e.g.: "prefix[:alpha:]num { ... }":
+- the driver prefix should be: "prefix" - case sensitive
+- the node name's "num" is set as "dev->driver_data" on bind
+
+Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "ldoreg@1, ...
+
+Binding by means of the node's name is preferred. However if the node names
+would produce ambiguous prefixes (like "regulator@1" and "regualtor@11") and you
+can't or do not want to change them then binding against the "regulator-name"
+property is possible. The syntax for the prefix of the "regulator-name" property
+is the same as the one for the regulator's node name.
+Use case: a regulator named "regulator@1" to be bound to a driver named
+"LDO_DRV" and a regulator named "regualator@11" to be bound to an other driver
+named "BOOST_DRV". Using prefix "regualtor@1" for driver matching would load
+the same driver for both regulators, hence the prefix is ambiguous.
+
+Optional properties:
+- regulator-name: a string, required by the regulator uclass, used for driver
+                  binding if binding by node's name prefix fails
+- regulator-min-microvolt: a minimum allowed Voltage value
+- regulator-max-microvolt: a maximum allowed Voltage value
+- regulator-min-microamp: a minimum allowed Current value
+- regulator-max-microamp: a maximum allowed Current value
+- regulator-always-on: regulator should never be disabled
+- regulator-boot-on: enabled by bootloader/firmware
+- regulator-ramp-delay: ramp delay for regulator (in uV/us)
+- regulator-force-boot-off: disabled during the boot stage
+- regulator-init-microvolt: a init allowed Voltage value
+- regulator-state-(standby|mem|disk)
+  type: object
+  description:
+    sub-nodes for regulator state in Standby, Suspend-to-RAM, and
+    Suspend-to-DISK modes. Equivalent with standby, mem, and disk Linux
+    sleep states.
+
+    properties:
+      regulator-on-in-suspend:
+        description: regulator should be on in suspend state.
+        type: boolean
+
+      regulator-off-in-suspend:
+        description: regulator should be off in suspend state.
+        type: boolean
+
+      regulator-suspend-microvolt:
+        description: the default voltage which regulator would be set in
+          suspend. This property is now deprecated, instead setting voltage
+          for suspend mode via the API which regulator driver provides is
+          recommended.
+
+Note
+The "regulator-name" constraint is used for setting the device's uclass
+platform data '.name' field. And the regulator device name is set from
+it's node name. If "regulator-name" is not provided in dts, node name
+is chosen for setting the device's uclass platform data '.name' field.
+
+Other kernel-style properties, are currently not used.
+
+Note:
+For the regulator autoset from constraints, the framework expects that:
+- regulator-min-microvolt is equal to regulator-max-microvolt
+- regulator-min-microamp is equal to regulator-max-microamp
+- regulator-always-on or regulator-boot-on is set
+
+Example:
+ldo0 {
+	/* Optional */
+	regulator-name = "VDDQ_EMMC_1.8V";
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-min-microamp = <100000>;
+	regulator-max-microamp = <100000>;
+	regulator-init-microvolt = <1800000>;
+	regulator-always-on;
+	regulator-boot-on;
+	regulator-ramp-delay = <12000>;
+	regulator-state-mem {
+		regulator-on-in-suspend;
+		regulator-suspend-microvolt = <1800000>;
+	};
+};
diff --git a/doc/device-tree-bindings/regulator/sandbox.txt b/doc/device-tree-bindings/regulator/sandbox.txt
new file mode 100644
index 00000000000..d70494c4506
--- /dev/null
+++ b/doc/device-tree-bindings/regulator/sandbox.txt
@@ -0,0 +1,45 @@
+Sandbox, PMIC regulators
+
+This device uses two drivers:
+- drivers/power/pmic/sandbox.c (as parent I/O device)
+- drivers/power/regulator/sandbox.c (for child regulators)
+
+This file describes the binding info for the REGULATOR driver.
+
+First, please read the binding info for the PMIC:
+- doc/device-tree-bindings/pmic/sandbox.txt
+
+Required subnodes:
+- ldoN { };
+- buckN { };
+
+The sandbox PMIC can support: ldo1, ldo2, buck1, buck2.
+
+For each PMIC's regulator subnode, there is one required property:
+- regulator-name: used for regulator uclass platform data '.name'
+
+Optional:
+- regulator-min-microvolt: minimum allowed Voltage to set
+- regulator-max-microvolt: minimum allowed Voltage to set
+- regulator-min-microamps: minimum allowed Current limit to set (LDO1/BUCK1)
+- regulator-max-microamps: minimum allowed Current limit to set (LDO1/BUCK1)
+- regulator-always-on: regulator should be never disabled
+- regulator-boot-on: regulator should be enabled by the bootloader
+
+Example PMIC's regulator subnodes:
+
+ldo1 {
+	regulator-name = "VDD_1.0V";
+	regulator-min-microvolt = <1000000>;
+	regulator-max-microvolt = <1200000>;
+	regulator-min-microamps = <100000>;
+	regulator-max-microamps = <400000>;
+	regulator-always-on;
+};
+
+buck2 {
+	regulator-name = "VDD_1.8V";
+	regulator-min-microvolt = <1800000>;
+	regulator-max-microvolt = <1800000>;
+	regulator-boot-on;
+};
diff --git a/doc/device-tree-bindings/regulator/tps65090.txt b/doc/device-tree-bindings/regulator/tps65090.txt
new file mode 100644
index 00000000000..313a60ba61d
--- /dev/null
+++ b/doc/device-tree-bindings/regulator/tps65090.txt
@@ -0,0 +1,122 @@
+TPS65090 regulators
+
+Required properties:
+- compatible: "ti,tps65090"
+- reg: I2C slave address
+- interrupts: the interrupt outputs of the controller
+- regulators: A node that houses a sub-node for each regulator within the
+  device. Each sub-node is identified using the node's name, with valid
+  values listed below. The content of each sub-node is defined by the
+  standard binding for regulators; see regulator.txt.
+  dcdc[1-3], fet[1-7] and ldo[1-2] respectively.
+- vsys[1-3]-supply: The input supply for DCDC[1-3] respectively.
+- infet[1-7]-supply: The input supply for FET[1-7] respectively.
+- vsys-l[1-2]-supply: The input supply for LDO[1-2] respectively.
+
+Optional properties:
+- ti,enable-ext-control: This is applicable for DCDC1, DCDC2 and DCDC3.
+  If DCDCs are externally controlled then this property should be there.
+- "dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3.
+  If DCDCs are externally controlled and if it is from GPIO then GPIO
+  number should be provided. If it is externally controlled and no GPIO
+  entry then driver will just configure this rails as external control
+  and will not provide any enable/disable APIs.
+
+Each regulator is defined using the standard binding for regulators.
+
+Example:
+
+	tps65090@48 {
+		compatible = "ti,tps65090";
+		reg = <0x48>;
+		interrupts = <0 88 0x4>;
+
+		vsys1-supply = <&some_reg>;
+		vsys2-supply = <&some_reg>;
+		vsys3-supply = <&some_reg>;
+		infet1-supply = <&some_reg>;
+		infet2-supply = <&some_reg>;
+		infet3-supply = <&some_reg>;
+		infet4-supply = <&some_reg>;
+		infet5-supply = <&some_reg>;
+		infet6-supply = <&some_reg>;
+		infet7-supply = <&some_reg>;
+		vsys_l1-supply = <&some_reg>;
+		vsys_l2-supply = <&some_reg>;
+
+		regulators {
+			dcdc1 {
+				regulator-name = "dcdc1";
+				regulator-boot-on;
+				regulator-always-on;
+				ti,enable-ext-control;
+				dcdc-ext-control-gpios = <&gpio 10 0>;
+			};
+
+			dcdc2 {
+				regulator-name = "dcdc2";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			dcdc3 {
+				regulator-name = "dcdc3";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			fet1 {
+				regulator-name = "fet1";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			fet2 {
+				regulator-name = "fet2";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			fet3 {
+				regulator-name = "fet3";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			fet4 {
+				regulator-name = "fet4";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			fet5 {
+				regulator-name = "fet5";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			fet6 {
+				regulator-name = "fet6";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			fet7 {
+				regulator-name = "fet7";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo1 {
+				regulator-name = "ldo1";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo2 {
+				regulator-name = "ldo2";
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
diff --git a/doc/device-tree-bindings/remoteproc/k3-rproc.txt b/doc/device-tree-bindings/remoteproc/k3-rproc.txt
new file mode 100644
index 00000000000..0a1e858225f
--- /dev/null
+++ b/doc/device-tree-bindings/remoteproc/k3-rproc.txt
@@ -0,0 +1,50 @@
+Texas Instruments' K3 Remote processor driver
+=============================================
+
+In K3 generation Socs, loading an image on any processing entity
+cannot be done directly from U-Boot. In order to load an image,
+remoteproc driver should communicate to SYSFW with a specific sequence.
+Also enable the timer required for this remotecore.
+
+Required properties:
+--------------------
+- compatible:		Shall be: "ti,am654-rproc"
+- reg:			base address of the remoteproc timer.
+- power-domains:	Should contain two sets of entries:
+			First set corresponds to pm domain of the
+			remotecore timer. Seconf entry corresponds to the
+			remoteproc to start.
+			This property is as per the binding,
+			doc/device-tree-bindings/power/ti,sci-pm-domain.txt
+- resets:		Should contain a phandle to a reset controller node
+			and an args specifier containing the remote code
+			device id and reset mask value. This is as per the
+			doc/device-tree-bindings/reset/ti,sci-reset.txt
+- ti,sci:		Phandle to TI-SCI compatible System controller node.
+- ti,sci-proc-id:	Processor id as identified by TISCI
+
+Optional properties:
+--------------------
+- assigned-clocks:	Should contain a phandle to clock node and an args
+			specifier containing the remote core device id and
+			the clock id within the remote core. This is as per
+			doc/device-tree-bindings/clock/ti,sci-clk.txt
+- assigned-clock-rates: One entry for each entry of assigned-clocks. This is
+			the frequency at which the corresponding clock needs
+			to be assigned.
+- ti,sci-host-id:	Host ID to which the processor control is transferred to
+
+Example:
+---------
+
+a53_0: a53@0 {
+	compatible = "ti,am654-rproc";
+	power-domains = <&k3_pds 61>,
+			<&k3_pds 202>;
+	resets = <&k3_reset 202 0>;
+	assigned-clocks = <&k3_clks 202 0>;
+	assigned-clock-rates = <800000000>;
+	ti,sci = <&dmsc>;
+	ti,sci-proc-id = <32>;
+	ti,sci-host-id = <10>;
+};
diff --git a/doc/device-tree-bindings/remoteproc/k3-system-controller.txt b/doc/device-tree-bindings/remoteproc/k3-system-controller.txt
new file mode 100644
index 00000000000..33dc46812ed
--- /dev/null
+++ b/doc/device-tree-bindings/remoteproc/k3-system-controller.txt
@@ -0,0 +1,27 @@
+Texas Instruments' K3 System Controller
+=========================================
+
+K3 specific SoCs have a dedicated microcontroller for doing
+resource management. Any HLOS/firmware on compute clusters should
+load a firmware to this microcontroller before accessing any resource.
+This driver communicates with ROM for loading this firmware.
+
+Required properties:
+--------------------
+- compatible:		Shall be: "ti,am654-system-controller"
+- mbox-names:		"tx" for Transfer channel
+			"rx" for Receive channel
+- mboxes:		Corresponding phandles to mailbox channels.
+
+Optional properties:
+--------------------
+- mbox-names:		"boot_notify" for Optional alternate boot notification channel.
+
+Example:
+--------
+
+system-controller: system-controller {
+	compatible = "ti,am654-system-controller";
+	mboxes= <&secproxy 4>, <&secproxy 5>;
+	mbox-names = "tx", "rx";
+};
diff --git a/doc/device-tree-bindings/remoteproc/remoteproc.txt b/doc/device-tree-bindings/remoteproc/remoteproc.txt
new file mode 100644
index 00000000000..031764f515a
--- /dev/null
+++ b/doc/device-tree-bindings/remoteproc/remoteproc.txt
@@ -0,0 +1,14 @@
+Remote Processor uclass
+
+Binding:
+
+Remoteproc devices shall have compatible corresponding to thier
+drivers. However the following generic properties will be supported
+
+Optional Properties:
+- remoteproc-name: a string, used if provided to describe the processor.
+  This must be unique in an operational system.
+- remoteproc-internal-memory-mapped: a bool, indicates that the remote
+  processor has internal memory that it uses to execute code and store
+  data. Such a device is not expected to have a MMU. If no type property
+  is provided, the device is assumed to map to such a model.
diff --git a/doc/device-tree-bindings/remoteproc/ti,k3-dsp-rproc.txt b/doc/device-tree-bindings/remoteproc/ti,k3-dsp-rproc.txt
new file mode 100644
index 00000000000..80ab7a4090a
--- /dev/null
+++ b/doc/device-tree-bindings/remoteproc/ti,k3-dsp-rproc.txt
@@ -0,0 +1,101 @@
+TI K3 DSP devices
+=================
+
+The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems that
+are used to offload some of the processor-intensive tasks or algorithms, for
+achieving various system level goals.
+
+These processor sub-systems usually contain additional sub-modules like L1
+and/or L2 caches/SRAMs, an Interrupt Controller, an external memory controller,
+a dedicated local power/sleep controller etc. The DSP processor cores in the
+K3 SoCs is usually either a TMS320C66x CorePac processor or a TMS320C71x CorePac
+processor.
+
+DSP Device Node:
+================
+Each DSP Core sub-system is represented as a single DT node. Each node has a
+number of required or optional properties that enable the OS running on the
+host processor (Arm CorePac) to perform the device management of the remote
+processor and to communicate with the remote processor.
+
+Required properties:
+--------------------
+The following are the mandatory properties:
+
+- compatible:		Should be one of the following,
+			    "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs
+			    "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs
+
+- reg:			Should contain an entry for each value in 'reg-names'.
+			Each entry should have the memory region's start address
+			and the size of the region, the representation matching
+			the parent node's '#address-cells' and '#size-cells' values.
+
+- reg-names:		Should contain strings with the following names, each
+			representing a specific internal memory region (if
+			present), and should be defined in this order,
+			     "l2sram", "l1pram", "l1dram"
+			NOTE: C71x DSPs do not have a "l1pram" memory.
+
+- ti,sci:		Should be a phandle to the TI-SCI System Controller node
+
+- ti,sci-dev-id:	Should contain the TI-SCI device id corresponding to the
+			DSP Core. Please refer to the corresponding System
+			Controller documentation for valid values for the DSP
+			cores.
+
+- ti,sci-proc-ids:	Should contain 2 integer values. The first cell should
+			contain the TI-SCI processor id for the DSP core device
+			and the second cell should contain the TI-SCI host id to
+			which the processor control ownership should be
+			transferred to.
+
+- resets:		Should contain the phandle to the reset controller node
+			managing the resets for this device, and a reset
+			specifier. Please refer to the following reset bindings
+			for the reset argument specifier,
+			Documentation/devicetree/bindings/reset/ti,sci-reset.txt
+
+Example:
+---------
+
+1. J721E SoC
+	/* J721E remoteproc alias */
+	aliases {
+		rproc6 = &c66_0;
+		rproc8 = &c71_0;
+	};
+
+	cbass_main: interconnect@100000 {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */
+			 <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */
+			 <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */
+
+		/* J721E C66_0 DSP node */
+		c66_0: dsp@4d80800000 {
+			compatible = "ti,j721e-c66-dsp";
+			reg = <0x4d 0x80800000 0x00 0x00048000>,
+			      <0x4d 0x80e00000 0x00 0x00008000>,
+			      <0x4d 0x80f00000 0x00 0x00008000>;
+			reg-names = "l2sram", "l1pram", "l1dram";
+			ti,sci = <&dmsc>;
+			ti,sci-dev-id = <142>;
+			ti,sci-proc-ids = <0x03 0xFF>;
+			resets = <&k3_reset 142 1>;
+		};
+
+		/* J721E C71_0 DSP node */
+		c71_0: dsp@64800000 {
+			compatible = "ti,j721e-c71-dsp";
+			reg = <0x00 0x64800000 0x00 0x00080000>,
+			      <0x00 0x64e00000 0x00 0x0000c000>;
+			reg-names = "l2sram", "l1dram";
+			ti,sci = <&dmsc>;
+			ti,sci-dev-id = <15>;
+			ti,sci-proc-ids = <0x30 0xFF>;
+			resets = <&k3_reset 15 1>;
+		};
+	};
diff --git a/doc/device-tree-bindings/remoteproc/ti,k3-r5f-rproc.txt b/doc/device-tree-bindings/remoteproc/ti,k3-r5f-rproc.txt
new file mode 100644
index 00000000000..25ee495fe63
--- /dev/null
+++ b/doc/device-tree-bindings/remoteproc/ti,k3-r5f-rproc.txt
@@ -0,0 +1,167 @@
+TI K3 R5F processor subsystems
+==============================
+
+The TI K3 family of SoCs usually have one or more dual-core Arm Cortex
+R5F processor subsystems/clusters (R5FSS). The dual core cluster can be
+used either in a LockStep mode providing safety/fault tolerance features
+or in a Split mode providing two individual compute cores for doubling
+the compute capacity. These are used together with other processors
+present on the SoC to achieve various system level goals.
+
+R5F Sub-System Device Node:
+===========================
+Each Dual-Core R5F sub-system is represented as a single DTS node representing
+the cluster, with a pair of child DT nodes representing the individual R5F
+cores. Each node has a number of required or optional properties that enable
+the OS running on the host processor to perform the device management of the
+remote processor and to communicate with the remote processor.
+
+Required properties:
+--------------------
+The following are the mandatory properties:
+
+- compatible:		Should be one of the following,
+			    "ti,am654-r5fss" for R5F clusters/subsystems on
+			                       K3 AM65x SoCs
+			    "ti,j721e-r5fss" for R5F clusters/subsystems on
+			                       K3 J721E SoCs
+			    "ti,j7200-r5fss" for R5F clusters/subsystems on
+			                       K3 J7200 SoCs
+- power-domains:	Should contain a phandle to a PM domain provider node
+			and an args specifier containing the R5FSS device id
+			value. This property is as per the binding,
+			Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
+- #address-cells:	Should be 1
+- #size-cells:		Should be 1
+- ranges:		Standard ranges definition providing translations for
+			R5F TCM address spaces
+
+Optional properties:
+--------------------
+- ti,cluster-mode:	Configuration Mode for the Dual R5F cores within the R5F
+			cluster. Should be either a value of 1 (LockStep mode) or
+			0 (Split mode), default is LockStep mode if omitted.
+
+
+R5F Processor Child Nodes:
+==========================
+The R5F Sub-System device node should define two R5F child nodes, each node
+representing a TI instantiation of the Arm Cortex R5F core. There are some
+specific integration differences for the IP like the usage of a Region Address
+Translator (RAT) for translating the larger SoC bus addresses into a 32-bit
+address space for the processor.
+
+Required properties:
+--------------------
+The following are the mandatory properties:
+
+- compatible:		Should be one of the following,
+			    "ti,am654-r5f" for the R5F cores in K3 AM65x SoCs
+			    "ti,j721e-r5f" for the R5F cores in K3 J721E SOCs
+			    "ti,j7200-r5f" for the R5F cores in K3 J7200 SOCs
+- reg:			Should contain an entry for each value in 'reg-names'.
+			Each entry should have the memory region's start address
+			and the size of the region, the representation matching
+			the parent node's '#address-cells' and '#size-cells' values.
+- reg-names:		Should contain strings with the following names, each
+			representing a specific internal memory region, and
+			should be defined in this order,
+			     "atcm", "btcm"
+- ti,sci:		Should be a phandle to the TI-SCI System Controller node
+- ti,sci-dev-id:	Should contain the TI-SCI device id corresponding to the
+			R5F Core. Please refer to the corresponding System
+			Controller documentation for valid values for the R5F
+			cores.
+- ti,sci-proc-ids:	Should contain 2 integer values. The first cell should
+			contain the TI-SCI processor id for the R5F core device
+			and the second cell should contain the TI-SCI host id to
+			which the processor control ownership should be
+			transferred to.
+- resets:		Should contain the phandle to the reset controller node
+			managing the resets for this device, and a reset
+			specifier. Please refer to the following reset bindings
+			for the reset argument specifier,
+			Documentation/devicetree/bindings/reset/ti,sci-reset.txt
+			    for AM65x, J721E and J7200 SoCs
+
+Optional properties:
+--------------------
+The following properties are optional properties for each of the R5F cores:
+
+- ti,atcm-enable:	R5F core configuration mode dictating if ATCM should be
+			enabled. Should be either a value of 1 (enabled) or
+			0 (disabled), default is disabled if omitted. R5F view
+			of ATCM dictated by ti,loczrama property.
+- ti,btcm-enable:	R5F core configuration mode dictating if BTCM should be
+			enabled. Should be either a value of 1 (enabled) or
+			0 (disabled), default is enabled if omitted. R5F view
+			of BTCM dictated by ti,loczrama property.
+- ti,loczrama:		R5F core configuration mode dictating which TCM should
+			appear at address 0 (from core's view). Should be either
+			a value of 1 (ATCM at 0x0) or 0 (BTCM at 0x0), default
+			value is 1 if omitted.
+
+Example:
+--------
+1. AM654 SoC
+	/* AM65x remoteproc alias */
+	aliases {
+		remoteproc0 = &mcu_r5fss0_core0;
+	};
+
+	cbass_main: interconnect@100000 {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>,
+			 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>,
+			 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>;
+
+		cbass_mcu: interconnect@28380000 {
+			compatible = "simple-bus";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
+				 <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */
+				 <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>; /* MCU SRAM */
+
+			/* AM65x MCU R5FSS node */
+			mcu_r5fss0: r5fss@41000000 {
+				compatible = "ti,am654-r5fss";
+				power-domains = <&k3_pds 129>;
+				ti,cluster-mode = <1>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges = <0x41000000 0x00 0x41000000 0x20000>,
+					 <0x41400000 0x00 0x41400000 0x20000>;
+
+				mcu_r5f0: r5f@41000000 {
+					compatible = "ti,am654-r5f";
+					reg = <0x41000000 0x00008000>,
+					      <0x41010000 0x00008000>;
+					reg-names = "atcm", "btcm";
+					ti,sci = <&dmsc>;
+					ti,sci-dev-id = <159>;
+					ti,sci-proc-ids = <0x01 0xFF>;
+					resets = <&k3_reset 159 1>;
+					ti,atcm-enable = <1>;
+					ti,btcm-enable = <1>;
+					ti,loczrama = <1>;
+				};
+
+				mcu_r5f1: r5f@41400000 {
+					compatible = "ti,am654-r5f";
+					reg = <0x41400000 0x00008000>,
+					      <0x41410000 0x00008000>;
+					reg-names = "atcm", "btcm";
+					ti,sci = <&dmsc>;
+					ti,sci-dev-id = <245>;
+					ti,sci-proc-ids = <0x02 0xFF>;
+					resets = <&k3_reset 245 1>;
+					ti,atcm-enable = <1>;
+					ti,btcm-enable = <1>;
+					ti,loczrama = <1>;
+				};
+			};
+		};
+	};
diff --git a/doc/device-tree-bindings/reserved-memory/reserved-memory.txt b/doc/device-tree-bindings/reserved-memory/reserved-memory.txt
new file mode 100644
index 00000000000..bac4afa3b19
--- /dev/null
+++ b/doc/device-tree-bindings/reserved-memory/reserved-memory.txt
@@ -0,0 +1,136 @@
+*** Reserved memory regions ***
+
+Reserved memory is specified as a node under the /reserved-memory node.
+The operating system shall exclude reserved memory from normal usage
+one can create child nodes describing particular reserved (excluded from
+normal use) memory regions. Such memory regions are usually designed for
+the special usage by various device drivers.
+
+Parameters for each memory region can be encoded into the device tree
+with the following nodes:
+
+/reserved-memory node
+---------------------
+#address-cells, #size-cells (required) - standard definition
+    - Should use the same values as the root node
+ranges (required) - standard definition
+    - Should be empty
+
+/reserved-memory/ child nodes
+-----------------------------
+Each child of the reserved-memory node specifies one or more regions of
+reserved memory. Each child node may either use a 'reg' property to
+specify a specific range of reserved memory, or a 'size' property with
+optional constraints to request a dynamically allocated block of memory.
+
+Following the generic-names recommended practice, node names should
+reflect the purpose of the node (ie. "framebuffer" or "dma-pool"). Unit
+address (@<address>) should be appended to the name if the node is a
+static allocation.
+
+Properties:
+Requires either a) or b) below.
+a) static allocation
+   reg (required) - standard definition
+b) dynamic allocation
+   size (required) - length based on parent's #size-cells
+                   - Size in bytes of memory to reserve.
+   alignment (optional) - length based on parent's #size-cells
+                        - Address boundary for alignment of allocation.
+   alloc-ranges (optional) - prop-encoded-array (address, length pairs).
+                           - Specifies regions of memory that are
+                             acceptable to allocate from.
+
+If both reg and size are present, then the reg property takes precedence
+and size is ignored.
+
+Additional properties:
+compatible (optional) - standard definition
+    - may contain the following strings:
+        - shared-dma-pool: This indicates a region of memory meant to be
+          used as a shared pool of DMA buffers for a set of devices. It can
+          be used by an operating system to instantiate the necessary pool
+          management subsystem if necessary.
+        - vendor specific string in the form <vendor>,[<device>-]<usage>
+no-map (optional) - empty property
+    - Indicates the operating system must not create a virtual mapping
+      of the region as part of its standard mapping of system memory,
+      nor permit speculative access to it under any circumstances other
+      than under the control of the device driver using the region.
+reusable (optional) - empty property
+    - The operating system can use the memory in this region with the
+      limitation that the device driver(s) owning the region need to be
+      able to reclaim it back. Typically that means that the operating
+      system can use that region to store volatile or cached data that
+      can be otherwise regenerated or migrated elsewhere.
+
+Linux implementation note:
+- If a "linux,cma-default" property is present, then Linux will use the
+  region for the default pool of the contiguous memory allocator.
+
+- If a "linux,dma-default" property is present, then Linux will use the
+  region for the default pool of the consistent DMA allocator.
+
+Device node references to reserved memory
+-----------------------------------------
+Regions in the /reserved-memory node may be referenced by other device
+nodes by adding a memory-region property to the device node.
+
+memory-region (optional) - phandle, specifier pairs to children of /reserved-memory
+
+Example
+-------
+This example defines 3 contiguous regions are defined for Linux kernel:
+one default of all device drivers (named linux,cma@72000000 and 64MiB in size),
+one dedicated to the framebuffer device (named framebuffer@78000000, 8MiB), and
+one for multimedia processing (named multimedia-memory@77000000, 64MiB).
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	memory {
+		reg = <0x40000000 0x40000000>;
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		/* global autoconfigured region for contiguous allocations */
+		linux,cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0x4000000>;
+			alignment = <0x2000>;
+			linux,cma-default;
+		};
+
+		display_reserved: framebuffer@78000000 {
+			reg = <0x78000000 0x800000>;
+		};
+
+		multimedia_reserved: multimedia@77000000 {
+			compatible = "acme,multimedia-memory";
+			reg = <0x77000000 0x4000000>;
+		};
+	};
+
+	/* ... */
+
+	fb0: video@12300000 {
+		memory-region = <&display_reserved>;
+		/* ... */
+	};
+
+	scaler: scaler@12500000 {
+		memory-region = <&multimedia_reserved>;
+		/* ... */
+	};
+
+	codec: codec@12600000 {
+		memory-region = <&multimedia_reserved>;
+		/* ... */
+	};
+};
diff --git a/doc/device-tree-bindings/reset/reset.txt b/doc/device-tree-bindings/reset/reset.txt
new file mode 100644
index 00000000000..31db6ff8490
--- /dev/null
+++ b/doc/device-tree-bindings/reset/reset.txt
@@ -0,0 +1,75 @@
+= Reset Signal Device Tree Bindings =
+
+This binding is intended to represent the hardware reset signals present
+internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
+standalone chips are most likely better represented as GPIOs, although there
+are likely to be exceptions to this rule.
+
+Hardware blocks typically receive a reset signal. This signal is generated by
+a reset provider (e.g. power management or clock module) and received by a
+reset consumer (the module being reset, or a module managing when a sub-
+ordinate module is reset). This binding exists to represent the provider and
+consumer, and provide a way to couple the two together.
+
+A reset signal is represented by the phandle of the provider, plus a reset
+specifier - a list of DT cells that represents the reset signal within the
+provider. The length (number of cells) and semantics of the reset specifier
+are dictated by the binding of the reset provider, although common schemes
+are described below.
+
+A word on where to place reset signal consumers in device tree: It is possible
+in hardware for a reset signal to affect multiple logically separate HW blocks
+at once. In this case, it would be unwise to represent this reset signal in
+the DT node of each affected HW block, since if activated, an unrelated block
+may be reset. Instead, reset signals should be represented in the DT node
+where it makes most sense to control it; this may be a bus node if all
+children of the bus are affected by the reset signal, or an individual HW
+block node for dedicated reset signals. The intent of this binding is to give
+appropriate software access to the reset signals in order to manage the HW,
+rather than to slavishly enumerate the reset signal that affects each HW
+block.
+
+= Reset providers =
+
+Required properties:
+#reset-cells:	Number of cells in a reset specifier; Typically 0 for nodes
+		with a single reset output and 1 for nodes with multiple
+		reset outputs.
+
+For example:
+
+	rst: reset-controller {
+		#reset-cells = <1>;
+	};
+
+= Reset consumers =
+
+Required properties:
+resets:		List of phandle and reset specifier pairs, one pair
+		for each reset signal that affects the device, or that the
+		device manages. Note: if the reset provider specifies '0' for
+		#reset-cells, then only the phandle portion of the pair will
+		appear.
+
+Optional properties:
+reset-names:	List of reset signal name strings sorted in the same order as
+		the resets property. Consumers drivers will use reset-names to
+		match reset signal names with reset specifiers.
+
+For example:
+
+	device {
+		resets = <&rst 20>;
+		reset-names = "reset";
+	};
+
+This represents a device with a single reset signal named "reset".
+
+	bus {
+		resets = <&rst 10> <&rst 11> <&rst 12> <&rst 11>;
+		reset-names = "i2s1", "i2s2", "dma", "mixer";
+	};
+
+This represents a bus that controls the reset signal of each of four sub-
+ordinate devices. Consider for example a bus that fails to operate unless no
+child device has reset asserted.
diff --git a/doc/device-tree-bindings/reset/syscon-reset.txt b/doc/device-tree-bindings/reset/syscon-reset.txt
new file mode 100644
index 00000000000..f136b3d2250
--- /dev/null
+++ b/doc/device-tree-bindings/reset/syscon-reset.txt
@@ -0,0 +1,36 @@
+Generic SYSCON mapped register reset driver
+
+This is a generic reset driver using syscon to map the reset register.
+The reset is generally performed with a write to the reset register
+defined by the register map pointed by syscon reference plus the offset and
+shifted by the reset specifier/
+
+To assert a reset on some device, the equivalent of the following operation is
+performed, where reset_id is the reset specifier from the device's resets
+property.
+
+	if (BIT(reset_id) & mask)
+		regmap[offset][reset_id] = assert-high;
+
+Required properties:
+- compatible: should contain "syscon-reset"
+- #reset-cells: must be 1
+- regmap: this is phandle to the register map node
+- offset: offset in the register map for the reboot register (in bytes)
+
+Optional properties:
+- mask: accept only the reset specifiers defined by the mask (32 bit)
+- assert-high: Bit to write when asserting a reset. Defaults to 1.
+
+Default will be little endian mode, 32 bit access only.
+
+Example:
+
+	reset-controller {
+		compatible = "syscon-reset";
+		#reset-cells = <1>;
+		regmap = <&sysctl>;
+		offset = <0x20>;
+		mask = <0x27FFFFFF>;
+		assert-high = <0>;
+	};
diff --git a/doc/device-tree-bindings/reset/ti,sci-reset.txt b/doc/device-tree-bindings/reset/ti,sci-reset.txt
new file mode 100644
index 00000000000..e7e2d13f9fb
--- /dev/null
+++ b/doc/device-tree-bindings/reset/ti,sci-reset.txt
@@ -0,0 +1,54 @@
+Texas Instruments TI SCI Reset Controller
+=========================================
+
+Some TI SoCs contain a system controller (like the SYSFW, etc...) that is
+responsible for controlling the state of the IPs that are present.
+Communication between the host processor running an OS and the system
+controller happens through a protocol known as TI SCI [1].
+
+[1] http://processors.wiki.ti.com/index.php/TISCI
+
+Reset Controller Node
+=====================
+The reset controller node represents the resets of various hardware modules
+present on the SoC managed by the SYSFW. Because this relies on the TI SCI
+protocol to communicate with the SYSFW it must be a child of the sysfw node.
+
+Required Properties:
+--------------------
+ - compatible: Must be "ti,sci-reset"
+ - #reset-cells: Must be 2. Please see the reset consumer node below for
+		 usage details.
+
+Example (AM65x):
+----------------
+	sysfw: sysfw {
+		compatible = "ti,am654-system-controller";
+		...
+		k3_reset: reset-controller {
+			compatible = "ti,sci-reset";
+			#reset-cells = <2>;
+		};
+	};
+
+Reset Consumers
+===============
+Each of the reset consumer nodes should have the following properties,
+in addition to their own properties.
+
+Required Properties:
+--------------------
+ - resets: A phandle and reset specifier pair, one pair for each reset signal
+	   that affects the device, or that the device manages. The phandle
+	   should point to the TI SCI reset controller node, and the reset
+	   specifier should have 2 cell-values. The first cell should contain
+	   the device ID. The second cell should contain the reset mask value
+	   used by system controller.
+
+Example (AM65x):
+----------------
+	uart2: serial@02800000 {
+		compatible = "ti,omap4-uart";
+		...
+		resets = <&k3_reset 5 1>;
+	};
diff --git a/doc/device-tree-bindings/root.txt b/doc/device-tree-bindings/root.txt
new file mode 100644
index 00000000000..001ccf36ccc
--- /dev/null
+++ b/doc/device-tree-bindings/root.txt
@@ -0,0 +1,4 @@
+The root node
+
+Optional properties:
+  - serial-number : a string representing the device's serial number
diff --git a/doc/device-tree-bindings/rtc/abracon,abx80x.txt b/doc/device-tree-bindings/rtc/abracon,abx80x.txt
new file mode 100644
index 00000000000..2405e35a1bc
--- /dev/null
+++ b/doc/device-tree-bindings/rtc/abracon,abx80x.txt
@@ -0,0 +1,31 @@
+Abracon ABX80X I2C ultra low power RTC/Alarm chip
+
+The Abracon ABX80X family consist of the ab0801, ab0803, ab0804, ab0805, ab1801,
+ab1803, ab1804 and ab1805. The ab0805 is the superset of ab080x and the ab1805
+is the superset of ab180x.
+
+Required properties:
+
+ - "compatible": should one of:
+        "abracon,abx80x"
+        "abracon,ab0801"
+        "abracon,ab0803"
+        "abracon,ab0804"
+        "abracon,ab0805"
+        "abracon,ab1801"
+        "abracon,ab1803"
+        "abracon,ab1804"
+        "abracon,ab1805"
+        "microcrystal,rv1805"
+	Using "abracon,abx80x" will enable chip autodetection.
+ - "reg": I2C bus address of the device
+
+Optional properties:
+
+The abx804 and abx805 have a trickle charger that is able to charge the
+connected battery or supercap. Both the following properties have to be defined
+and valid to enable charging:
+
+ - "abracon,tc-diode": should be "standard" (0.6V) or "schottky" (0.3V)
+ - "abracon,tc-resistor": should be <0>, <3>, <6> or <11>. 0 disables the output
+                          resistor, the other values are in kOhm.
diff --git a/doc/device-tree-bindings/rtc/brcm,brcmstb-waketimer.txt b/doc/device-tree-bindings/rtc/brcm,brcmstb-waketimer.txt
new file mode 100644
index 00000000000..1d990bcc0ba
--- /dev/null
+++ b/doc/device-tree-bindings/rtc/brcm,brcmstb-waketimer.txt
@@ -0,0 +1,22 @@
+Broadcom STB wake-up Timer
+
+The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
+ability to wake up the system from low-power suspend/standby modes.
+
+Required properties:
+- compatible     : should contain "brcm,brcmstb-waketimer"
+- reg            : the register start and length for the WKTMR block
+- interrupts     : The TIMER interrupt
+- interrupt-parent: The phandle to the Always-On (AON) Power Management (PM) L2
+                    interrupt controller node
+- clocks	 : The phandle to the UPG fixed clock (27Mhz domain)
+
+Example:
+
+waketimer@f0411580 {
+	compatible = "brcm,brcmstb-waketimer";
+	reg = <0xf0411580 0x14>;
+	interrupts = <0x3>;
+	interrupt-parent = <&aon_pm_l2_intc>;
+	clocks = <&upg_fixed>;
+};
diff --git a/doc/device-tree-bindings/rtc/ds3232.txt b/doc/device-tree-bindings/rtc/ds3232.txt
new file mode 100644
index 00000000000..254b7bc3c3e
--- /dev/null
+++ b/doc/device-tree-bindings/rtc/ds3232.txt
@@ -0,0 +1,15 @@
+DS3232 Real-Time Clock with SRAM
+
+The RTC driver provides time and date functionality. Also read and write
+functions are provided that can be used to access the SRAM memory.
+
+Required properties:
+- compatible     : should contain "dallas,ds3232"
+- reg            : the I2C RTC address
+
+Example:
+
+rtc@68 {
+	compatible = "dallas,ds3232";
+	reg = <0x68>;
+};
diff --git a/doc/device-tree-bindings/serial/8250.txt b/doc/device-tree-bindings/serial/8250.txt
new file mode 100644
index 00000000000..ba8edae0ee3
--- /dev/null
+++ b/doc/device-tree-bindings/serial/8250.txt
@@ -0,0 +1,66 @@
+* UART (Universal Asynchronous Receiver/Transmitter)
+
+Required properties:
+- compatible : one of:
+	- "ns8250"
+	- "ns16450"
+	- "ns16550a"
+	- "ns16550"
+	- "ns16750"
+	- "ns16850"
+	- For Tegra20, must contain "nvidia,tegra20-uart"
+	- For other Tegra, must contain '"nvidia,<chip>-uart",
+	  "nvidia,tegra20-uart"' where <chip> is tegra30, tegra114, tegra124,
+	  tegra132, or tegra210.
+	- "nxp,lpc3220-uart"
+	- "ralink,rt2880-uart"
+	- "ibm,qpace-nwp-serial"
+	- "altr,16550-FIFO32"
+	- "altr,16550-FIFO64"
+	- "altr,16550-FIFO128"
+	- "fsl,16550-FIFO64"
+	- "fsl,ns16550"
+	- "serial" if the port type is unknown.
+- reg : offset and length of the register set for the device.
+- interrupts : should contain uart interrupt.
+- clock-frequency : the input clock frequency for the UART
+	 or
+  clocks phandle to refer to the clk used as per Documentation/devicetree
+  /bindings/clock/clock-bindings.txt
+
+Optional properties:
+- current-speed : the current active speed of the UART.
+- reg-offset : offset to apply to the mapbase from the start of the registers.
+- reg-shift : quantity to shift the register offsets by.
+- reg-io-width : the size (in bytes) of the IO accesses that should be
+  performed on the device.  There are some systems that require 32-bit
+  accesses to the UART (e.g. TI davinci).
+- used-by-rtas : set to indicate that the port is in use by the OpenFirmware
+  RTAS and should not be registered.
+- no-loopback-test: set to indicate that the port does not implements loopback
+  test mode
+- fifo-size: the fifo size of the UART.
+- auto-flow-control: one way to enable automatic flow control support. The
+  driver is allowed to detect support for the capability even without this
+  property.
+
+Note:
+* fsl,ns16550:
+  ------------
+  Freescale DUART is very similar to the PC16552D (and to a
+  pair of NS16550A), albeit with some nonstandard behavior such as
+  erratum A-004737 (relating to incorrect BRK handling).
+
+  Represents a single port that is compatible with the DUART found
+  on many Freescale chips (examples include mpc8349, mpc8548,
+  mpc8641d, p4080 and ls2080a).
+
+Example:
+
+	uart@80230000 {
+		compatible = "ns8250";
+		reg = <0x80230000 0x100>;
+		clock-frequency = <3686400>;
+		interrupts = <10>;
+		reg-shift = <2>;
+	};
diff --git a/doc/device-tree-bindings/serial/altera_jtaguart.txt b/doc/device-tree-bindings/serial/altera_jtaguart.txt
new file mode 100644
index 00000000000..97c7062c5f5
--- /dev/null
+++ b/doc/device-tree-bindings/serial/altera_jtaguart.txt
@@ -0,0 +1,4 @@
+Altera JTAG UART
+
+Required properties:
+- compatible : should be "altr,juart-1.0"
diff --git a/doc/device-tree-bindings/serial/altera_uart.txt b/doc/device-tree-bindings/serial/altera_uart.txt
new file mode 100644
index 00000000000..ebac3f5c186
--- /dev/null
+++ b/doc/device-tree-bindings/serial/altera_uart.txt
@@ -0,0 +1,7 @@
+Altera UART
+
+Required properties:
+- compatible : should be "altr,uart-1.0"
+
+Optional properties:
+- clock-frequency : frequency of the clock input to the UART
diff --git a/doc/device-tree-bindings/serial/bcm2835-aux-uart.txt b/doc/device-tree-bindings/serial/bcm2835-aux-uart.txt
new file mode 100644
index 00000000000..75886e5fdac
--- /dev/null
+++ b/doc/device-tree-bindings/serial/bcm2835-aux-uart.txt
@@ -0,0 +1,10 @@
+* BCM283x mini UART
+
+Required properties:
+- compatible: must be "brcm,bcm2835-aux-uart"
+- reg: exactly one register range with length 0x1000
+- clock: input clock frequency for the UART (used to calculate the baud
+  rate divisor)
+
+Optional properties:
+- skip-init: if present, the baud rate divisor is not changed
diff --git a/doc/device-tree-bindings/serial/mcf-uart.txt b/doc/device-tree-bindings/serial/mcf-uart.txt
new file mode 100644
index 00000000000..d73f764c019
--- /dev/null
+++ b/doc/device-tree-bindings/serial/mcf-uart.txt
@@ -0,0 +1,19 @@
+Freescale ColdFire UART
+
+Required properties:
+- compatible : should be "fsl,mcf-uart"
+- reg: start address and size of the registers
+
+Example:
+
+soc {
+	compatible = "simple-bus";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	uart0: uart@fc060000 {
+		compatible = "fsl,mcf-uart";
+		reg = <0xfc060000 0x40>;
+		status = "disabled";
+	};
+};
diff --git a/doc/device-tree-bindings/serial/microchip,pic32-uart.txt b/doc/device-tree-bindings/serial/microchip,pic32-uart.txt
new file mode 100644
index 00000000000..f00e215cf60
--- /dev/null
+++ b/doc/device-tree-bindings/serial/microchip,pic32-uart.txt
@@ -0,0 +1,5 @@
+* Microchip PIC32 serial UART
+
+Required properties:
+- compatible: must be "microchip,pic32mzda-uart".
+- reg: exactly one register range.
diff --git a/doc/device-tree-bindings/serial/msm-geni-serial.txt b/doc/device-tree-bindings/serial/msm-geni-serial.txt
new file mode 100644
index 00000000000..eaa39c949b1
--- /dev/null
+++ b/doc/device-tree-bindings/serial/msm-geni-serial.txt
@@ -0,0 +1,6 @@
+Qualcomm GENI UART
+
+Required properties:
+- compatible: must be "qcom,geni-debug-uart"
+- reg: start address and size of the registers
+- clock: interface clock (must accept baudrate as a frequency)
diff --git a/doc/device-tree-bindings/serial/mxc-serial.txt b/doc/device-tree-bindings/serial/mxc-serial.txt
new file mode 100644
index 00000000000..ede92a4854d
--- /dev/null
+++ b/doc/device-tree-bindings/serial/mxc-serial.txt
@@ -0,0 +1,8 @@
+NXP i.MX (MXC) UART
+
+Required properties:
+- compatible: must be "fsl,imx7d-uart"
+- reg: start address and size of the registers
+
+Optional properties:
+- fsl,dte-mode: use DTE mode
diff --git a/doc/device-tree-bindings/serial/omap_serial.txt b/doc/device-tree-bindings/serial/omap_serial.txt
new file mode 100644
index 00000000000..7a71b5de77d
--- /dev/null
+++ b/doc/device-tree-bindings/serial/omap_serial.txt
@@ -0,0 +1,33 @@
+OMAP UART controller
+
+Required properties:
+- compatible : should be "ti,omap2-uart" for OMAP2 controllers
+- compatible : should be "ti,omap3-uart" for OMAP3 controllers
+- compatible : should be "ti,omap4-uart" for OMAP4 controllers
+- compatible : should be "ti,am4372-uart" for AM437x controllers
+- compatible : should be "ti,am3352-uart" for AM335x controllers
+- compatible : should be "ti,dra742-uart" for DRA7x controllers
+- reg : address and length of the register space
+- interrupts or interrupts-extended : Should contain the uart interrupt
+                                      specifier or both the interrupt
+                                      controller phandle and interrupt
+                                      specifier.
+- ti,hwmods : Must be "uart<n>", n being the instance number (1-based)
+
+Optional properties:
+- clock-frequency : frequency of the clock input to the UART
+- dmas : DMA specifier, consisting of a phandle to the DMA controller
+         node and a DMA channel number.
+- dma-names : "rx" for receive channel, "tx" for transmit channel.
+
+Example:
+
+                uart4: serial@49042000 {
+                        compatible = "ti,omap3-uart";
+                        reg = <0x49042000 0x400>;
+                        interrupts = <80>;
+                        dmas = <&sdma 81 &sdma 82>;
+                        dma-names = "tx", "rx";
+                        ti,hwmods = "uart4";
+                        clock-frequency = <48000000>;
+                };
diff --git a/doc/device-tree-bindings/serial/pl01x.txt b/doc/device-tree-bindings/serial/pl01x.txt
new file mode 100644
index 00000000000..017b1e23557
--- /dev/null
+++ b/doc/device-tree-bindings/serial/pl01x.txt
@@ -0,0 +1,10 @@
+* ARM AMBA Primecell PL011 & PL010 serial UART
+
+Required properties:
+- compatible: must be "arm,primecell", "arm,pl011" or "arm,pl010"
+- reg: exactly one register range with length 0x1000
+- clock: input clock frequency for the UART (used to calculate the baud
+  rate divisor)
+
+Optional properties:
+- skip-init: if present, the baud rate divisor is not changed
diff --git a/doc/device-tree-bindings/serial/qca,ar9330-uart.txt b/doc/device-tree-bindings/serial/qca,ar9330-uart.txt
new file mode 100644
index 00000000000..ec576a1ce97
--- /dev/null
+++ b/doc/device-tree-bindings/serial/qca,ar9330-uart.txt
@@ -0,0 +1,24 @@
+* Qualcomm Atheros AR9330 High-Speed UART
+
+Required properties:
+
+- compatible: Must be "qca,ar9330-uart"
+
+- reg: Specifies the physical base address of the controller and
+  the length of the memory mapped region.
+
+Additional requirements:
+
+  Each UART port must have an alias correctly numbered in "aliases"
+  node.
+
+Example:
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	uart0: uart@18020000 {
+		compatible = "qca,ar9330-uart";
+		reg = <0x18020000 0x14>;
+	};
diff --git a/doc/device-tree-bindings/serial/sandbox-serial.txt b/doc/device-tree-bindings/serial/sandbox-serial.txt
new file mode 100644
index 00000000000..f429c90421f
--- /dev/null
+++ b/doc/device-tree-bindings/serial/sandbox-serial.txt
@@ -0,0 +1,13 @@
+Sandbox serial
+
+The sandbox serial device is an emulated device which displays its output
+on the host machine's console, and accepts input from its keyboard.
+
+Required properties:
+  compatible: "sandbox,serial"
+
+Optional properties:
+  sandbox,text-colour: If present, this is the colour of the console text.
+        Supported values are:
+        "black", "red", "green", "yellow", "blue", "megenta", "cyan",
+        "white"
diff --git a/doc/device-tree-bindings/serial/sh.txt b/doc/device-tree-bindings/serial/sh.txt
new file mode 100644
index 00000000000..7707a9cbe38
--- /dev/null
+++ b/doc/device-tree-bindings/serial/sh.txt
@@ -0,0 +1,6 @@
+* Renesas SCI serial interface
+
+Required properties:
+- compatible: must be "renesas,scif", "renesas,hscif", "renesas,scifa" or "renesas,sci"
+- reg: exactly one register range with length
+- clock: input clock frequency for the SCI unit
diff --git a/doc/device-tree-bindings/serial/snps-dw-apb-uart.txt b/doc/device-tree-bindings/serial/snps-dw-apb-uart.txt
new file mode 100644
index 00000000000..12bbe9f2256
--- /dev/null
+++ b/doc/device-tree-bindings/serial/snps-dw-apb-uart.txt
@@ -0,0 +1,76 @@
+* Synopsys DesignWare ABP UART
+
+Required properties:
+- compatible : "snps,dw-apb-uart"
+- reg : offset and length of the register set for the device.
+- interrupts : should contain uart interrupt.
+
+Clock handling:
+The clock rate of the input clock needs to be supplied by one of
+- clock-frequency : the input clock frequency for the UART.
+- clocks : phandle to the input clock
+
+The supplying peripheral clock can also be handled, needing a second property
+- clock-names: tuple listing input clock names.
+	Required elements: "baudclk", "apb_pclk"
+
+Optional properties:
+- snps,uart-16550-compatible : reflects the value of UART_16550_COMPATIBLE
+  configuration parameter. Define this if your UART does not implement the busy
+  functionality.
+- resets : phandle to the parent reset controller.
+- reg-shift : quantity to shift the register offsets by.  If this property is
+  not present then the register offsets are not shifted.
+- reg-io-width : the size (in bytes) of the IO accesses that should be
+  performed on the device.  If this property is not present then single byte
+  accesses are used.
+- dcd-override : Override the DCD modem status signal. This signal will always
+  be reported as active instead of being obtained from the modem status
+  register. Define this if your serial port does not use this pin.
+- dsr-override : Override the DTS modem status signal. This signal will always
+  be reported as active instead of being obtained from the modem status
+  register. Define this if your serial port does not use this pin.
+- cts-override : Override the CTS modem status signal. This signal will always
+  be reported as active instead of being obtained from the modem status
+  register. Define this if your serial port does not use this pin.
+- ri-override : Override the RI modem status signal. This signal will always be
+  reported as inactive instead of being obtained from the modem status register.
+  Define this if your serial port does not use this pin.
+
+Example:
+
+	uart@80230000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x80230000 0x100>;
+		clock-frequency = <3686400>;
+		interrupts = <10>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+		dcd-override;
+		dsr-override;
+		cts-override;
+		ri-override;
+	};
+
+Example with one clock:
+
+	uart@80230000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x80230000 0x100>;
+		clocks = <&baudclk>;
+		interrupts = <10>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+	};
+
+Example with two clocks:
+
+	uart@80230000 {
+		compatible = "snps,dw-apb-uart";
+		reg = <0x80230000 0x100>;
+		clocks = <&baudclk>, <&apb_pclk>;
+		clock-names = "baudclk", "apb_pclk";
+		interrupts = <10>;
+		reg-shift = <2>;
+		reg-io-width = <4>;
+	};
diff --git a/doc/device-tree-bindings/serial/xilinx_uartlite.txt b/doc/device-tree-bindings/serial/xilinx_uartlite.txt
new file mode 100644
index 00000000000..d15753c8c38
--- /dev/null
+++ b/doc/device-tree-bindings/serial/xilinx_uartlite.txt
@@ -0,0 +1,13 @@
+Binding for Xilinx Uartlite Controller
+
+Required properties:
+- compatible : should be "xlnx,xps-uartlite-1.00.a", or "xlnx,opb-uartlite-1.00.b"
+- reg: Should contain UART controller registers location and length.
+- interrupts: Should contain UART controller interrupts.
+
+Example:
+	serial@40600000 {
+		compatible = "xlnx,xps-uartlite-1.00.a";
+		interrupts = <1 0>;
+		reg = <0x40600000 0x10000>;
+	};
diff --git a/doc/device-tree-bindings/soc/fsl/cpm_qe/qe/ucc.txt b/doc/device-tree-bindings/soc/fsl/cpm_qe/qe/ucc.txt
new file mode 100644
index 00000000000..2758f864370
--- /dev/null
+++ b/doc/device-tree-bindings/soc/fsl/cpm_qe/qe/ucc.txt
@@ -0,0 +1,53 @@
+* UCC (Unified Communications Controllers)
+
+Required properties:
+- compatible : ucc_geth
+- cell-index : the ucc number(1-8), corresponding to UCCx in UM.
+- reg : Offset and length of the register set for the device
+- rx-clock-name: the UCC receive clock source
+  "none": clock source is disabled
+  "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+  "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+- tx-clock-name: the UCC transmit clock source
+  "none": clock source is disabled
+  "brg1" through "brg16": clock source is BRG1-BRG16, respectively
+  "clk1" through "clk24": clock source is CLK1-CLK24, respectively
+The following two properties are deprecated.  rx-clock has been replaced
+with rx-clock-name, and tx-clock has been replaced with tx-clock-name.
+Drivers that currently use the deprecated properties should continue to
+do so, in order to support older device trees, but they should be updated
+to check for the new properties first.
+- rx-clock : represents the UCC receive clock source.
+  0x00 : clock source is disabled;
+  0x1~0x10 : clock source is BRG1~BRG16 respectively;
+  0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
+- tx-clock: represents the UCC transmit clock source;
+  0x00 : clock source is disabled;
+  0x1~0x10 : clock source is BRG1~BRG16 respectively;
+  0x11~0x28: clock source is QE_CLK1~QE_CLK24 respectively.
+- phy-handle : The phandle for the PHY connected to this controller.
+- phy-connection-type : a string naming the controller/PHY interface type,
+  i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
+  Delay), "rgmii-txid" (delay on TX only), "rgmii-rxid" (delay on RX only),
+  "tbi", or "rtbi".
+- pio-handle : The phandle for the Parallel I/O port configuration.
+
+Deprecated properties:
+- device-id : the ucc number(1-8), corresponding to UCCx in UM.
+    you should use cell-index
+
+Example:
+        ucc@2000 {
+                device_type = "network";
+                compatible = "ucc_geth";
+                cell-index = <1>;
+                reg = <2000 200>;
+                interrupts = <a0 0>;
+                interrupt-parent = <700>;
+                mac-address = [ 00 04 9f 00 23 23 ];
+                rx-clock = "none";
+                tx-clock = "clk9";
+                phy-handle = <212000>;
+                phy-connection-type = "gmii";
+                pio-handle = <140001>;
+        };
diff --git a/doc/device-tree-bindings/soc/samsung/exynos-pmu.yaml b/doc/device-tree-bindings/soc/samsung/exynos-pmu.yaml
new file mode 100644
index 00000000000..c3e95c33b01
--- /dev/null
+++ b/doc/device-tree-bindings/soc/samsung/exynos-pmu.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos SoC series Power Management Unit (PMU)
+
+maintainers:
+  - Sam Protsenko <semen.protsenko@linaro.org>
+
+description: |+
+  PMU block controls the power and operation states of Exynos SoC. It contains
+  registers for changing the state of next features::
+
+  - Local power control. Exynos SoCs have various power domains, and it's
+    possible to turn them on and off independently, using corresponding
+    registers in PMU block
+  - System-level power control. That allows putting the system into power-down
+    modes (sleep) by turning off the power for most of the domains
+  - Miscellaneous PMU related features
+
+# Custom select to avoid matching all nodes with 'syscon'
+select:
+  properties:
+    compatible:
+      contains:
+        enum:
+          - samsung,exynos850-pmu
+  required:
+    - compatible
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - samsung,exynos850-pmu
+          - const: syscon
+
+  reg:
+    maxItems: 1
+
+  samsung,uart-debug-1:
+    type: boolean
+    description:
+      Enable this property if AP UART lines (Application Processor UART) must be
+      connected to UART_DEBUG_1 path in PMU block. That's usually needed when
+      the serial console is provided by uart1_pins. If this property is not
+      specified, the default behavior will be used (AP UART lines connected to
+      UART_DEBUG_0 path, which usually means uart0_pins are used for the serial
+      console).
+
+  syscon-poweroff:
+    $ref: /schemas/power/reset/syscon-poweroff.yaml#
+    type: object
+    description:
+      Node for power off method
+
+  syscon-reboot:
+    $ref: /schemas/power/reset/syscon-reboot.yaml#
+    type: object
+    description:
+      Node for reboot method
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    pmu_system_controller: system-controller@11860000 {
+        compatible = "samsung,exynos850-pmu", "syscon";
+        reg = <0x11860000 0x10000>;
+
+        reboot: syscon-reboot {
+            compatible = "syscon-reboot";
+            regmap = <&pmu_system_controller>;
+            offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
+            mask = <0x2>; /* SWRESET_SYSTEM */
+            value = <0x2>; /* reset value */
+        };
+    };
diff --git a/doc/device-tree-bindings/sound/da7219.txt b/doc/device-tree-bindings/sound/da7219.txt
new file mode 100644
index 00000000000..5fd8a9f1e7b
--- /dev/null
+++ b/doc/device-tree-bindings/sound/da7219.txt
@@ -0,0 +1,113 @@
+Dialog Semiconductor DA7219 Audio Codec bindings
+
+DA7219 is an audio codec with advanced accessory detect features.
+
+======
+
+Required properties:
+- compatible : Should be "dlg,da7219"
+- reg: Specifies the I2C slave address
+
+- interrupts : IRQ line info for DA7219.
+  (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for
+   further information relating to interrupt properties)
+
+- VDD-supply: VDD power supply for the device
+- VDDMIC-supply: VDDMIC power supply for the device
+- VDDIO-supply: VDDIO power supply for the device
+  (See Documentation/devicetree/bindings/regulator/regulator.txt for further
+   information relating to regulators)
+
+Optional properties:
+- interrupt-names : Name associated with interrupt line. Should be "wakeup" if
+  interrupt is to be used to wake system, otherwise "irq" should be used.
+- wakeup-source: Flag to indicate this device can wake system (suspend/resume).
+
+- #clock-cells :  Should be set to '<0>', only one clock source provided;
+- clock-output-names : Name given for DAI clocks output;
+
+- clocks : phandle and clock specifier for codec MCLK.
+- clock-names : Clock name string for 'clocks' attribute, should be "mclk".
+
+- dlg,micbias-lvl : Voltage (mV) for Mic Bias
+	[<1600>, <1800>, <2000>, <2200>, <2400>, <2600>]
+- dlg,mic-amp-in-sel : Mic input source type
+	["diff", "se_p", "se_n"]
+- dlg,mclk-name : String name of MCLK for ACPI
+
+Deprecated properties:
+- dlg,ldo-lvl : Required internal LDO voltage (mV) level for digital engine
+  (LDO unavailable in production HW so property no longer required).
+
+======
+
+Child node - 'da7219_aad':
+
+Optional properties:
+- dlg,micbias-pulse-lvl : Mic bias higher voltage pulse level (mV).
+	[<2800>, <2900>]
+- dlg,micbias-pulse-time : Mic bias higher voltage pulse duration (ms)
+- dlg,btn-cfg : Periodic button press measurements for 4-pole jack (ms)
+	[<2>, <5>, <10>, <50>, <100>, <200>, <500>]
+- dlg,mic-det-thr : Impedance threshold for mic detection measurement (Ohms)
+	[<200>, <500>, <750>, <1000>]
+- dlg,jack-ins-deb : Debounce time for jack insertion (ms)
+	[<5>, <10>, <20>, <50>, <100>, <200>, <500>, <1000>]
+- dlg,jack-det-rate: Jack type detection latency (3/4 pole)
+	["32ms_64ms", "64ms_128ms", "128ms_256ms", "256ms_512ms"]
+- dlg,jack-rem-deb : Debounce time for jack removal (ms)
+	[<1>, <5>, <10>, <20>]
+- dlg,a-d-btn-thr : Impedance threshold between buttons A and D
+	[0x0 - 0xFF]
+- dlg,d-b-btn-thr : Impedance threshold between buttons D and B
+	[0x0 - 0xFF]
+- dlg,b-c-btn-thr : Impedance threshold between buttons B and C
+	[0x0 - 0xFF]
+- dlg,c-mic-btn-thr : Impedance threshold between button C and Mic
+	[0x0 - 0xFF]
+- dlg,btn-avg : Number of 8-bit readings for averaged button measurement
+	[<1>, <2>, <4>, <8>]
+- dlg,adc-1bit-rpt : Repeat count for 1-bit button measurement
+	[<1>, <2>, <4>, <8>]
+
+======
+
+Example:
+
+	codec: da7219@1a {
+		compatible = "dlg,da7219";
+		reg = <0x1a>;
+
+		interrupt-parent = <&gpio6>;
+		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
+
+		VDD-supply = <&reg_audio>;
+		VDDMIC-supply = <&reg_audio>;
+		VDDIO-supply = <&reg_audio>;
+
+		#clock-cells = <0>;
+		clock-output-names = "dai-clks";
+
+		clocks = <&clks 201>;
+		clock-names = "mclk";
+
+		dlg,ldo-lvl = <1200>;
+		dlg,micbias-lvl = <2600>;
+		dlg,mic-amp-in-sel = "diff";
+
+		da7219_aad {
+			dlg,btn-cfg = <50>;
+			dlg,mic-det-thr = <500>;
+			dlg,jack-ins-deb = <20>;
+			dlg,jack-det-rate = "32ms_64ms";
+			dlg,jack-rem-deb = <1>;
+
+			dlg,a-d-btn-thr = <0xa>;
+			dlg,d-b-btn-thr = <0x16>;
+			dlg,b-c-btn-thr = <0x21>;
+			dlg,c-mic-btn-thr = <0x3E>;
+
+			dlg,btn-avg = <4>;
+			dlg,adc-1bit-rpt = <1>;
+		};
+	};
diff --git a/doc/device-tree-bindings/sound/intel-hda.txt b/doc/device-tree-bindings/sound/intel-hda.txt
new file mode 100644
index 00000000000..aa96be06e9b
--- /dev/null
+++ b/doc/device-tree-bindings/sound/intel-hda.txt
@@ -0,0 +1,26 @@
+* Intel High-definition Audio
+
+Configuration is set using 'verbs' which are blocks of 16 bytes of data each
+with a different purpose, a little like a simple instruction set.
+
+Top-level node
+--------------
+
+Required properties:
+- compatible: "intel,hd-audio"
+- beep-verbs: list of verbs to send for a beep
+
+Optional properties
+- intel,beep-nid: Node ID to use for beep (will be detected if not provided)
+- codec-enable-gpio : The GPIO used to enable the audio codec
+
+Required subnodes:
+- codecs: Contains a list of codec nodes
+
+
+* Codec nodes
+
+Required properties:
+- vendor-id: 16-bit vendor ID for audio codec
+- device-id: 16-bit device ID for audio codec
+- verbs: List of verbs, each 4 cells in length
diff --git a/doc/device-tree-bindings/sound/max98357a.txt b/doc/device-tree-bindings/sound/max98357a.txt
new file mode 100644
index 00000000000..4bce14ce806
--- /dev/null
+++ b/doc/device-tree-bindings/sound/max98357a.txt
@@ -0,0 +1,22 @@
+Maxim MAX98357A audio DAC
+
+This node models the Maxim MAX98357A DAC.
+
+Required properties:
+- compatible   : "maxim,max98357a"
+
+Optional properties:
+- sdmode-gpios : GPIO specifier for the chip's SD_MODE pin.
+        If this option is not specified then driver does not manage
+        the pin state (e.g. chip is always on).
+- sdmode-delay : specify delay time for SD_MODE pin.
+        If this option is specified, which means it's required i2s clocks
+        ready before SD_MODE is unmuted in order to avoid the speaker pop noise.
+        It's observed that 5ms is sufficient.
+
+Example:
+
+max98357a {
+	compatible = "maxim,max98357a";
+	sdmode-gpios = <&qcom_pinmux 25 0>;
+};
diff --git a/doc/device-tree-bindings/sound/nvidia,tegra-audio-max98090.txt b/doc/device-tree-bindings/sound/nvidia,tegra-audio-max98090.txt
new file mode 100644
index 00000000000..25c63eac628
--- /dev/null
+++ b/doc/device-tree-bindings/sound/nvidia,tegra-audio-max98090.txt
@@ -0,0 +1,54 @@
+NVIDIA Tegra audio complex, with MAX98090 CODEC
+
+Required properties:
+- compatible : "nvidia,tegra-audio-max98090"
+- clocks : Must contain an entry for each entry in clock-names.
+  See ../clocks/clock-bindings.txt for details.
+- clock-names : Must include the following entries:
+  - pll_a
+  - pll_a_out0
+  - mclk (The Tegra cdev1/extern1 clock, which feeds the CODEC's mclk)
+- nvidia,model : The user-visible name of this sound complex.
+- nvidia,audio-routing : A list of the connections between audio components.
+  Each entry is a pair of strings, the first being the connection's sink,
+  the second being the connection's source. Valid names for sources and
+  sinks are the MAX98090's pins (as documented in its binding), and the jacks
+  on the board:
+
+  * Headphones
+  * Speakers
+  * Mic Jack
+  * Int Mic
+
+- nvidia,i2s-controller : The phandle of the Tegra I2S controller that's
+  connected to the CODEC.
+- nvidia,audio-codec : The phandle of the MAX98090 audio codec.
+
+Optional properties:
+- nvidia,hp-det-gpios : The GPIO that detect headphones are plugged in
+- nvidia,mic-det-gpios : The GPIO that detect microphones are plugged in
+- codec-enable-gpio : The GPIO used to enable the audio codec
+
+Example:
+
+sound {
+	compatible = "nvidia,tegra-audio-max98090-venice2",
+		     "nvidia,tegra-audio-max98090";
+	nvidia,model = "NVIDIA Tegra Venice2";
+
+	nvidia,audio-routing =
+		"Headphones", "HPR",
+		"Headphones", "HPL",
+		"Speakers", "SPKR",
+		"Speakers", "SPKL",
+		"Mic Jack", "MICBIAS",
+		"IN34", "Mic Jack";
+
+	nvidia,i2s-controller = <&tegra_i2s1>;
+	nvidia,audio-codec = <&acodec>;
+
+	clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
+		 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
+		 <&tegra_car TEGRA124_CLK_EXTERN1>;
+	clock-names = "pll_a", "pll_a_out0", "mclk";
+};
diff --git a/doc/device-tree-bindings/sound/snow.txt b/doc/device-tree-bindings/sound/snow.txt
new file mode 100644
index 00000000000..fa06956e772
--- /dev/null
+++ b/doc/device-tree-bindings/sound/snow.txt
@@ -0,0 +1,32 @@
+Audio Binding for Snow boards
+
+Required properties:
+- compatible : Can be one of the following,
+			"google,snow-audio-max98090" or
+			"google,snow-audio-max98091" or
+			"google,snow-audio-max98095"
+- samsung,i2s-controller (deprecated): The phandle of the Samsung I2S controller
+- samsung,audio-codec (deprecated): The phandle of the audio codec
+
+Required sub-nodes:
+
+ - 'cpu' subnode with a 'sound-dai' property containing the phandle of the I2S
+    controller
+ - 'codec' subnode with a 'sound-dai' property containing list of phandles
+    to the CODEC nodes, first entry must be the phandle of the MAX98090,
+    MAX98091 or MAX98095 CODEC (exact device type is indicated by the compatible
+    string) and the second entry must be the phandle of the HDMI IP block node
+
+Optional:
+- samsung,model: The name of the sound-card
+- codec-enable-gpio : The GPIO used to enable the audio codec
+
+Example:
+
+sound {
+		compatible = "google,snow-audio-max98095";
+
+		samsung,model = "Snow-I2S-MAX98095";
+		samsung,i2s-controller = <&i2s0>;
+		samsung,audio-codec = <&max98095>;
+};
diff --git a/doc/device-tree-bindings/spi/brcm,bcm63xx-hsspi.yaml b/doc/device-tree-bindings/spi/brcm,bcm63xx-hsspi.yaml
new file mode 100644
index 00000000000..6554978583f
--- /dev/null
+++ b/doc/device-tree-bindings/spi/brcm,bcm63xx-hsspi.yaml
@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom Broadband SoC High Speed SPI controller
+
+maintainers:
+  - William Zhang <william.zhang@broadcom.com>
+  - Kursad Oney <kursad.oney@broadcom.com>
+  - Jonas Gorski <jonas.gorski@gmail.com>
+
+description: |
+  Broadcom Broadband SoC supports High Speed SPI master controller since the
+  early MIPS based chips such as BCM6328 and BCM63268.  This initial rev 1.0
+  controller was carried over to recent ARM based chips, such as BCM63138,
+  BCM4908 and BCM6858. The old MIPS based chip should continue to use the
+  brcm,bcm6328-hsspi compatible string. The recent ARM based chip is required to
+  use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as
+  defined below to match the specific chip along with ip revision info.
+
+  This rev 1.0 controller has a limitation that can not keep the chip select line
+  active between the SPI transfers within the same SPI message. This can
+  terminate the transaction to some SPI devices prematurely. The issue can be
+  worked around by either the controller's prepend mode or using the dummy chip
+  select workaround. Driver automatically picks the suitable mode based on
+  transfer type so it is transparent to the user.
+
+  The newer SoCs such as BCM6756, BCM4912 and BCM6855 include an updated SPI
+  controller rev 1.1 that add the capability to allow the driver to control chip
+  select explicitly. This solves the issue in the old controller.
+
+properties:
+  compatible:
+    oneOf:
+      - const: brcm,bcm6328-hsspi
+      - items:
+          - enum:
+              - brcm,bcm47622-hsspi
+              - brcm,bcm4908-hsspi
+              - brcm,bcm63138-hsspi
+              - brcm,bcm63146-hsspi
+              - brcm,bcm63148-hsspi
+              - brcm,bcm63158-hsspi
+              - brcm,bcm63178-hsspi
+              - brcm,bcm6846-hsspi
+              - brcm,bcm6856-hsspi
+              - brcm,bcm6858-hsspi
+              - brcm,bcm6878-hsspi
+          - const: brcm,bcmbca-hsspi-v1.0
+      - items:
+          - enum:
+              - brcm,bcm4912-hsspi
+              - brcm,bcm6756-hsspi
+              - brcm,bcm6813-hsspi
+              - brcm,bcm6855-hsspi
+          - const: brcm,bcmbca-hsspi-v1.1
+
+  reg:
+    items:
+      - description: main registers
+      - description: miscellaneous control registers
+    minItems: 1
+
+  reg-names:
+    items:
+      - const: hsspi
+      - const: spim-ctrl
+    minItems: 1
+
+  clocks:
+    items:
+      - description: SPI master reference clock
+      - description: SPI master pll clock
+
+  clock-names:
+    items:
+      - const: hsspi
+      - const: pll
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - interrupts
+
+allOf:
+  - $ref: spi-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - brcm,bcm6328-hsspi
+              - brcm,bcmbca-hsspi-v1.0
+    then:
+      properties:
+        reg:
+          maxItems: 1
+        reg-names:
+          maxItems: 1
+    else:
+      properties:
+        reg:
+          minItems: 2
+          maxItems: 2
+        reg-names:
+          minItems: 2
+          maxItems: 2
+      required:
+        - reg-names
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    spi@ff801000 {
+        compatible = "brcm,bcm6756-hsspi", "brcm,bcmbca-hsspi-v1.1";
+        reg = <0xff801000 0x1000>,
+              <0xff802610 0x4>;
+        reg-names = "hsspi", "spim-ctrl";
+        interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&hsspi>, <&hsspi_pll>;
+        clock-names = "hsspi", "pll";
+        num-cs = <8>;
+        #address-cells = <1>;
+        #size-cells = <0>;
+    };
diff --git a/doc/device-tree-bindings/spi/hpe,gxp-spi.yaml b/doc/device-tree-bindings/spi/hpe,gxp-spi.yaml
new file mode 100644
index 00000000000..5e23de1847c
--- /dev/null
+++ b/doc/device-tree-bindings/spi/hpe,gxp-spi.yaml
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/spi/hpe,gxp-spi.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: HPE GXP SPI Controller
+
+maintainers:
+  - Nick Hawkins <nick.hawkins@hpe.com>
+  - Jean-Marie Verdun <verdun@hpe.com>
+
+allOf:
+  - $ref: "spi-controller.yaml#"
+
+properties:
+  compatible:
+    const: mikrotik,rb4xx-spi
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    spi@c00000200{
+          compatible = "hpe,gxp-spi";
+          reg = <0xc0000200 0x80>;
+          #address-cells = <1>;
+          #size-cells = <0>;
+    };
+
diff --git a/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
new file mode 100644
index 00000000000..7a0f11c53bf
--- /dev/null
+++ b/doc/device-tree-bindings/spi/snps,dw-apb-ssi.txt
@@ -0,0 +1,56 @@
+Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
+and Synopsys DesignWare High Performance Synchronous Serial Interface
+
+Required properties:
+- compatible : One of
+  "altr,socfpga-spi",
+  "altr,socfpga-arria10-spi",
+  "canaan,k210-spi",
+  "canaan,k210-ssi",
+  "intel,stratix10-spi",
+  "intel,agilex-spi",
+  "mscc,ocelot-spi",
+  or "mscc,jaguar2-spi";
+  and one of
+  "snps,dw-apb-ssi-3.20a",
+  "snps,dw-apb-ssi-3.22a",
+  "snps,dw-apb-ssi-3.23",
+  "snps,dw-apb-ssi-4.00a",
+  "snps,dw-apb-ssi-4.01",
+  or "snps,dwc-ssi-1.01a".
+  "snps,dw-apb-ssi" may also be used, but is deprecated in favor of specific
+  version strings.
+- reg : The register base for the controller. For "mscc,<soc>-spi", a second
+  register set is required (named ICPU_CFG:SPI_MST)
+- #address-cells : <1>, as required by generic SPI binding.
+- #size-cells : <0>, also as required by generic SPI binding.
+- clocks : phandles for the clocks, see the description of clock-names below.
+   The phandle for the "ssi_clk" is required. The phandle for the "pclk" clock
+   is optional. If a single clock is specified but no clock-name, it is the
+   "ssi_clk" clock. If both clocks are listed, the "ssi_clk" must be first.
+
+Optional properties:
+- clock-names : Contains the names of the clocks:
+    "ssi_clk", for the core clock used to generate the external SPI clock.
+    "pclk", the interface clock, required for register access.
+- cs-gpios : Specifies the gpio pins to be used for chipselects.
+- num-cs : The number of chipselects. If omitted, this will default to 4.
+- reg-io-width : The I/O register width (in bytes) implemented by this
+  device.  Supported values are 2 or 4 (the default).
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+	spi@fff00000 {
+		compatible = "altr,socfpga-arria10-spi",
+			     "snps,dw-apb-ssi-4.00a", "snps,dw-apb-ssi";
+		reg = <0xfff00000 0x1000>;
+		interrupts = <0 154 4>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		clocks = <&spi_m_clk>;
+		num-cs = <2>;
+		cs-gpios = <&gpio0 13 0>,
+			   <&gpio0 14 0>;
+	};
diff --git a/doc/device-tree-bindings/spi/soft-spi.txt b/doc/device-tree-bindings/spi/soft-spi.txt
new file mode 100644
index 00000000000..bdf7e86befb
--- /dev/null
+++ b/doc/device-tree-bindings/spi/soft-spi.txt
@@ -0,0 +1,38 @@
+Soft SPI
+
+The soft SPI bus implementation allows the use of GPIO pins to simulate a
+SPI bus. No SPI host is required for this to work. The down-side is that the
+performance will typically be much lower than a real SPI bus.
+
+The soft SPI node requires the following properties:
+
+Mandatory properties:
+compatible: "spi-gpio"
+cs-gpios: GPIOs to use for SPI chip select (output)
+sck-gpios: GPIO to use for SPI clock (output)
+And at least one of:
+mosi-gpios: GPIO to use for SPI MOSI line (output)
+miso-gpios: GPIO to use for SPI MISO line (input)
+
+Optional propertie:
+spi-delay-us: Number of microseconds of delay between each CS transition
+
+The GPIOs should be specified as required by the GPIO controller referenced.
+The first cell holds the phandle of the controller and the second cell
+typically holds the GPIO number.
+
+
+Example:
+
+	soft-spi {
+		compatible = "spi-gpio";
+		cs-gpios = <&gpio 235 0>;	/* Y43 */
+		sck-gpios = <&gpio 225 0>;	/* Y31 */
+		mosi-gpios = <&gpio 227 0>;	/* Y33 */
+		miso-gpios = <&gpio 224 0>;	/* Y30 */
+		spi-delay-us = <1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		cs@0 {
+		};
+	};
diff --git a/doc/device-tree-bindings/spi/spi-atcspi200.txt b/doc/device-tree-bindings/spi/spi-atcspi200.txt
new file mode 100644
index 00000000000..e67b3425f0d
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-atcspi200.txt
@@ -0,0 +1,37 @@
+Andestech ATCSPI200 SPI controller Device Tree Bindings
+-------------------------------------------------------
+ATCSPI200 is a Serial Peripheral Interface (SPI) controller
+which serves as a SPI master or a SPI slave.
+
+It is often be embedded in AE3XX and AE250 platforms.
+
+Required properties:
+- compatible: has to be "andestech,atcspi200".
+- reg: Base address and size of the controllers memory area.
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+- interrupts: Property with a value describing the interrupt number.
+- clocks: Clock phandles (see clock bindings for details).
+- spi-max-frequency: Maximum SPI clocking speed of device in Hz.
+
+Optional properties:
+- num-cs: Number of chip selects used.
+
+Example:
+
+	spi: spi@f0b00000 {
+		compatible = "andestech,atcspi200";
+		reg = <0xf0b00000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		num-cs = <1>;
+		clocks = <&spiclk>;
+		interrupts = <3 4>;
+		flash@0 {
+			compatible = "jedec,spi-nor";
+			spi-max-frequency = <50000000>;
+			reg = <0>;
+			spi-cpol;
+			spi-cpha;
+		};
+	};
diff --git a/doc/device-tree-bindings/spi/spi-ath79.txt b/doc/device-tree-bindings/spi/spi-ath79.txt
new file mode 100644
index 00000000000..3fd9d67a2b2
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-ath79.txt
@@ -0,0 +1,19 @@
+Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller
+
+Required properties:
+- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
+- reg: Base address and size of the controllers memory area
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Child nodes as per the generic SPI binding.
+
+Example:
+
+	spi@1f000000 {
+		compatible = "qca,ar9132-spi", "qca,ar7100-spi";
+		reg = <0x1f000000 0x10>;
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
diff --git a/doc/device-tree-bindings/spi/spi-bus.txt b/doc/device-tree-bindings/spi/spi-bus.txt
new file mode 100644
index 00000000000..e57897ac0c6
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-bus.txt
@@ -0,0 +1,94 @@
+SPI (Serial Peripheral Interface) busses
+
+SPI busses can be described with a node for the SPI master device
+and a set of child nodes for each SPI slave on the bus.  For this
+discussion, it is assumed that the system's SPI controller is in
+SPI master mode.  This binding does not describe SPI controllers
+in slave mode.
+
+The SPI master node requires the following properties:
+- #address-cells  - number of cells required to define a chip select
+		address on the SPI bus.
+- #size-cells     - should be zero.
+- compatible      - name of SPI bus controller following generic names
+		recommended practice.
+- cs-gpios	  - (optional) gpios chip select.
+No other properties are required in the SPI bus node.  It is assumed
+that a driver for an SPI bus device will understand that it is an SPI bus.
+However, the binding does not attempt to define the specific method for
+assigning chip select numbers.  Since SPI chip select configuration is
+flexible and non-standardized, it is left out of this binding with the
+assumption that board specific platform code will be used to manage
+chip selects.  Individual drivers can define additional properties to
+support describing the chip select layout.
+
+Optional property:
+- num-cs : total number of chipselects
+
+If cs-gpios is used the number of chip select will automatically increased
+with max(cs-gpios > hw cs)
+
+So if for example the controller has 2 CS lines, and the cs-gpios
+property looks like this:
+
+cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;
+
+Then it should be configured so that num_chipselect = 4 with the
+following mapping:
+
+cs0 : &gpio1 0 0
+cs1 : native
+cs2 : &gpio1 1 0
+cs3 : &gpio1 2 0
+
+SPI slave nodes must be children of the SPI master node and can
+contain the following properties.
+- reg             - (required) chip select address of device.
+- compatible      - (required) name of SPI device following generic names
+		recommended practice
+- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz
+- spi-cpol        - (optional) Empty property indicating device requires
+		inverse clock polarity (CPOL) mode
+- spi-cpha        - (optional) Empty property indicating device requires
+		shifted clock phase (CPHA) mode
+- spi-cs-high     - (optional) Empty property indicating device requires
+		chip select active high
+- spi-3wire       - (optional) Empty property indicating device requires
+		    3-wire mode.
+- spi-tx-bus-width - (optional) The bus width(number of data wires) that
+                      used for MOSI. Defaults to 1 if not present.
+- spi-rx-bus-width - (optional) The bus width(number of data wires) that
+                      used for MISO. Defaults to 1 if not present.
+- spi-half-duplex  - (optional) Indicates that the SPI bus should wait for
+		      a header byte before reading data from the slave.
+
+Some SPI controllers and devices support Dual and Quad SPI transfer mode.
+It allows data in SPI system transferred in 2 wires(DUAL) or 4 wires(QUAD).
+Now the value that spi-tx-bus-width and spi-rx-bus-width can receive is
+only 1(SINGLE), 2(DUAL) and 4(QUAD).
+Dual/Quad mode is not allowed when 3-wire mode is used.
+
+If a gpio chipselect is used for the SPI slave the gpio number will be passed
+via the cs_gpio
+
+SPI example for an MPC5200 SPI bus:
+	spi@f00 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+		reg = <0xf00 0x20>;
+		interrupts = <2 13 0 2 14 0>;
+		interrupt-parent = <&mpc5200_pic>;
+
+		ethernet-switch@0 {
+			compatible = "micrel,ks8995m";
+			spi-max-frequency = <1000000>;
+			reg = <0>;
+		};
+
+		codec@1 {
+			compatible = "ti,tlv320aic26";
+			spi-max-frequency = <100000>;
+			reg = <1>;
+		};
+	};
diff --git a/doc/device-tree-bindings/spi/spi-cadence.txt b/doc/device-tree-bindings/spi/spi-cadence.txt
new file mode 100644
index 00000000000..69e02c1c4b1
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-cadence.txt
@@ -0,0 +1,31 @@
+Cadence QSPI controller device tree bindings
+--------------------------------------------
+
+Required properties:
+- compatible		: should be "cdns,qspi-nor"
+- reg			: 1.Physical base address and size of SPI registers map.
+			  2. Physical base address & size of NOR Flash.
+- clocks		: Clock phandles (see clock bindings for details).
+- cdns,fifo-depth	: Size of the data FIFO in words.
+- cdns,fifo-width	: Bus width of the data FIFO in bytes.
+- cdns,trigger-address	: 32-bit indirect AHB trigger address.
+- cdns,is-decoded-cs	: Flag to indicate whether decoder is used or not.
+- status		: enable in requried dts.
+
+connected flash properties
+--------------------------
+
+- spi-max-frequency	: Max supported spi frequency.
+- page-size		: Flash page size.
+- block-size		: Flash memory block size.
+- cdns,tshsl-ns		: Added delay in master reference clocks (ref_clk) for
+			  the length that the master mode chip select outputs
+			  are de-asserted between transactions.
+- cdns,tsd2d-ns		: Delay in master reference clocks (ref_clk) between one
+			  chip select being de-activated and the activation of
+			  another.
+- cdns,tchsh-ns		: Delay in master reference clocks between last bit of
+			  current transaction and de-asserting the device chip
+			  select (n_ss_out).
+- cdns,tslch-ns		: Delay in master reference clocks between setting
+			  n_ss_out low and first bit transfer
diff --git a/doc/device-tree-bindings/spi/spi-mcf-dspi.txt b/doc/device-tree-bindings/spi/spi-mcf-dspi.txt
new file mode 100644
index 00000000000..4684d7846a9
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-mcf-dspi.txt
@@ -0,0 +1,34 @@
+Freescale ColdFire DSPI controller
+
+Required properties:
+- compatible : "fsl,mcf-dspi"
+- #address-cells: <1>, as required by generic SPI binding
+- #size-cells: <0>, also as required by generic SPI binding
+- reg : offset and length of the register set for the device
+
+Optional properties:
+- spi-max-frequency : max supported spi frequency
+- num-cs : the number of the chipselect signals
+- spi-mode: spi motorola mode, 0 to 3
+- ctar-params: CTAR0 to 7 register configuration, as an array
+  of 8 integer fields for each register, where each register
+  is defined as: <fmsz, pcssck, pasc, pdt, cssck, asc, dt, br>.
+- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
+  select and the start of clock signal, at the start of a transfer.
+- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
+  signal and deactivating chip select, at the end of a transfer.
+
+Example:
+
+dspi0: dspi@fc05c000 {
+	compatible = "fsl,mcf-dspi";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	reg = <0xfc05c000 0x100>;
+	spi-max-frequency = <50000000>;
+	num-cs = <4>;
+	spi-mode = <0>;
+	ctar-fields = <7, 0, 0, 0, 0, 0, 1, 6>,
+		      <7, 0, 0, 0, 0, 0, 1, 6>,
+		      <7, 0, 0, 0, 0, 0, 1, 6>;
+};
diff --git a/doc/device-tree-bindings/spi/spi-qup.txt b/doc/device-tree-bindings/spi/spi-qup.txt
new file mode 100644
index 00000000000..2f2f070c5ac
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-qup.txt
@@ -0,0 +1,33 @@
+Qualcomm QUP SPI controller Device Tree Bindings
+-------------------------------------------
+
+Required properties:
+- compatible : Should be "qcom,spi-qup-v1.1.1", "qcom,spi-qup-v2.1.1"
+				or "qcom,spi-qup-v2.2.1"
+- reg : Physical base address and size of SPI registers map.
+- clock	: Clock phandle (see clock bindings for details).
+- #address-cells : Number of cells required to define a chip select
+			address on the SPI bus. Should be set to 1.
+- #size-cells : Should be zero.
+- pinctrl-names : Must be "default"
+- pinctrl-n : At least one pinctrl phandle
+- cs-gpios : Should specify GPIOs used for chipselects.
+				The gpios will be referred to as reg = <index> in the
+				SPI child nodes.
+
+Optional properties:
+- num-cs : total number of chipselects
+
+Example:
+
+	blsp1_spi1: spi@78b5000 {
+		compatible = "qcom,spi-qup-v2.2.1";
+		reg = <0x78b5000 0x600>;
+		clock = <&gcc 23>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "spi";
+		pinctrl-0 = <&blsp_spi0>;
+		num-cs = <2>;
+		cs-gpios = <&soc_gpios 54 GPIO_ACTIVE_HIGH>, <&soc_gpios 4 GPIO_ACTIVE_HIGH>;
+	};
diff --git a/doc/device-tree-bindings/spi/spi-zynq-qspi.txt b/doc/device-tree-bindings/spi/spi-zynq-qspi.txt
new file mode 100644
index 00000000000..47472fdb8c0
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-zynq-qspi.txt
@@ -0,0 +1,26 @@
+Xilinx Zynq QSPI controller Device Tree Bindings
+-------------------------------------------------
+
+Required properties:
+- compatible		: Should be "xlnx,zynq-qspi-1.0".
+- reg			: Physical base address and size of QSPI registers map.
+- interrupts		: Property with a value describing the interrupt
+			  number.
+- interrupt-parent	: Must be core interrupt controller
+- clock-names		: List of input clock names - "ref_clk", "pclk"
+			  (See clock bindings for details).
+- clocks		: Clock phandles (see clock bindings for details).
+
+Optional properties:
+- num-cs		: Number of chip selects used.
+
+Example:
+	qspi@e000d000 {
+		compatible = "xlnx,zynq-qspi-1.0";
+		clock-names = "ref_clk", "pclk";
+		clocks = <&clkc 10>, <&clkc 43>;
+		interrupt-parent = <&intc>;
+		interrupts = <0 19 4>;
+		num-cs = <1>;
+		reg = <0xe000d000 0x1000>;
+	} ;
diff --git a/doc/device-tree-bindings/spi/spi-zynq.txt b/doc/device-tree-bindings/spi/spi-zynq.txt
new file mode 100644
index 00000000000..cb2945789d0
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-zynq.txt
@@ -0,0 +1,32 @@
+Cadence SPI controller Device Tree Bindings
+-------------------------------------------
+
+Required properties:
+- compatible		: Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6".
+- reg			: Physical base address and size of SPI registers map.
+- interrupts		: Property with a value describing the interrupt
+			  number.
+- interrupt-parent	: Must be core interrupt controller
+- clock-names		: List of input clock names - "ref_clk", "pclk"
+			  (See clock bindings for details).
+- clocks		: Clock phandles (see clock bindings for details).
+- spi-max-frequency	: Maximum SPI clocking speed of device in Hz
+
+Optional properties:
+- num-cs		: Number of chip selects used.
+			  If a decoder is used, this will be the number of
+			  chip selects after the decoder.
+- is-decoded-cs		: Flag to indicate whether decoder is used or not.
+
+Example:
+
+	spi@e0007000 {
+		compatible = "xlnx,zynq-spi-r1p6";
+		clock-names = "ref_clk", "pclk";
+		clocks = <&clkc 26>, <&clkc 35>;
+		interrupt-parent = <&intc>;
+		interrupts = <0 49 4>;
+		num-cs = <4>;
+		is-decoded-cs = <0>;
+		reg = <0xe0007000 0x1000>;
+	} ;
diff --git a/doc/device-tree-bindings/spi/spi_altera.txt b/doc/device-tree-bindings/spi/spi_altera.txt
new file mode 100644
index 00000000000..de4fae8318f
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi_altera.txt
@@ -0,0 +1,4 @@
+Altera SPI
+
+Required properties:
+- compatible : should be "altr,spi-1.0".
diff --git a/doc/device-tree-bindings/spmi/spmi-sandbox.txt b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
new file mode 100644
index 00000000000..8569a1a840b
--- /dev/null
+++ b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
@@ -0,0 +1,31 @@
+Sandbox SPMI emulated arbiter.
+
+This is bus driver for Sandbox. It includes part of emulated pm8916 pmic.
+
+Required properties:
+- compatible: "sandbox,spmi"
+- #address-cells: 0x1 - childs slave ID address
+- #size-cells: 0x1
+
+Example:
+
+spmi: spmi@0 {
+	compatible = "sandbox,spmi";
+	#address-cells = <0x1>;
+	#size-cells = <0x1>;
+	pm8916@0 {
+		compatible = "qcom,spmi-pmic";
+		reg = <0x0 0x1>;
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+
+		spmi_gpios: gpios@c000 {
+			compatible = "qcom,pm8916-gpio";
+			reg = <0xc000 0x400>;
+			gpio-controller;
+			gpio-count = <4>;
+			#gpio-cells = <2>;
+			gpio-bank-name="spmi";
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/sysinfo/gdsys,sysinfo_gazerbeam.txt b/doc/device-tree-bindings/sysinfo/gdsys,sysinfo_gazerbeam.txt
new file mode 100644
index 00000000000..f70652d3c48
--- /dev/null
+++ b/doc/device-tree-bindings/sysinfo/gdsys,sysinfo_gazerbeam.txt
@@ -0,0 +1,46 @@
+gdsys Gazerbeam sysinfo driver
+
+This driver provides capabilities to access the gdsys Gazerbeam board's device
+information. Furthermore, phandles to some internal devices are provided for
+the board files.
+
+Required properties:
+- compatible:  should be "gdsys,sysinfo-gazerbeam"
+- csb:         phandle to the board's coherent system bus (CSB) device node
+- rxaui[0-3]:  phandles to the rxaui control device nodes
+- fpga[0-1]:   phandles to the board's gdsys FPGA device nodes
+- ioep[0-1]:   phandles to the board's IO endpoint device nodes
+- ver-gpios:   GPIO list to read the hardware version from
+- var-gpios:   GPIO list to read the hardware variant information from
+- reset-gpios: GPIO list for the board's reset GPIOs
+
+Example:
+
+
+sysinfo {
+	compatible = "gdsys,sysinfo-gazerbeam";
+	csb = <&board_soc>;
+	serdes = <&SERDES>;
+	rxaui0 = <&RXAUI0>;
+	rxaui1 = <&RXAUI1>;
+	rxaui2 = <&RXAUI2>;
+	rxaui3 = <&RXAUI3>;
+	fpga0 = <&FPGA0>;
+	fpga1 = <&FPGA1>;
+	ioep0 = <&IOEP0>;
+	ioep1 = <&IOEP1>;
+
+	ver-gpios = <&PPCPCA 12 0
+		     &PPCPCA 13 0
+		     &PPCPCA 14 0
+		     &PPCPCA 15 0>;
+
+	/* MC2/SC-Board */
+	var-gpios-mc2 = <&GPIO_VB0 0 0    /* VAR-MC_SC */
+			 &GPIO_VB0 11 0>; /* VAR-CON */
+	/* MC4-Board */
+	var-gpios-mc4 = <&GPIO_VB1 0 0    /* VAR-MC_SC */
+			 &GPIO_VB1 11 0>; /* VAR-CON */
+
+	reset-gpios = <&gpio0 1 0 &gpio0 2 1>;
+};
diff --git a/doc/device-tree-bindings/sysinfo/google,coral.txt b/doc/device-tree-bindings/sysinfo/google,coral.txt
new file mode 100644
index 00000000000..d8a1a79687e
--- /dev/null
+++ b/doc/device-tree-bindings/sysinfo/google,coral.txt
@@ -0,0 +1,37 @@
+Google Coral sysinfo information
+================================
+
+This binding allows information about the board to be described. It includes
+the SMBIOS binding as well.
+
+Required properties:
+
+  - compatible: "google,coral"
+  - recovery-gpios: GPIO to use for recovery button (-1 if none)
+  - wite-protect-gpios: GPIO to use for write-protect screw
+  - phase-enforce-gpios: GPIO to indicate the board is in final ship mode
+  - memconfig-gpios: 4 GPIOs to use to read memory config (as base2 int)
+
+Optional properties:
+  - skuconfig-gpios: 2 GPIOs to use to read SKU ID. If not present, the
+       Chromium OS EC SKU_ID is used instead
+
+Example:
+
+board: board {
+	compatible = "google,coral";
+	recovery-gpios = <&gpio_nw (-1) GPIO_ACTIVE_LOW>;
+	write-protect-gpios = <&gpio_nw GPIO_75 GPIO_ACTIVE_HIGH>;
+	phase-enforce-gpios = <&gpio_n GPIO_10 GPIO_ACTIVE_HIGH>;
+	memconfig-gpios = <&gpio_nw GPIO_101 GPIO_ACTIVE_HIGH
+		&gpio_nw GPIO_102 GPIO_ACTIVE_HIGH
+		&gpio_n GPIO_38 GPIO_ACTIVE_HIGH
+		&gpio_n GPIO_45 GPIO_ACTIVE_HIGH>;
+
+	/*
+	 * This is used for reef only:
+	 *
+	 * skuconfig-gpios = <&gpio_nw GPIO_16 GPIO_ACTIVE_HIGH
+	 *	&gpio_nw GPIO_17 GPIO_ACTIVE_HIGH>;
+	 */
+ };
diff --git a/doc/device-tree-bindings/sysinfo/gpio-sysinfo.txt b/doc/device-tree-bindings/sysinfo/gpio-sysinfo.txt
new file mode 100644
index 00000000000..b5739d94e9e
--- /dev/null
+++ b/doc/device-tree-bindings/sysinfo/gpio-sysinfo.txt
@@ -0,0 +1,37 @@
+GPIO-based Sysinfo device
+
+This binding describes several GPIOs which specify a board revision. Each GPIO
+forms a digit in a ternary revision number. This revision is then mapped to a
+name using the revisions and names properties.
+
+Each GPIO may be floating, pulled-up, or pulled-down, mapping to digits 2, 1,
+and 0, respectively. The first GPIO forms the least-significant digit of the
+revision. For example, consider the property
+
+	gpios = <&gpio 0>, <&gpio 1>, <&gpio 2>;
+
+If GPIO 0 is pulled-up, GPIO 1 is pulled-down, and GPIO 2 is floating, then the
+revision would be
+
+	0t201 = 2*9 + 0*3 + 1*3 = 19
+
+If instead GPIO 0 is floating, GPIO 1 is pulled-up, and GPIO 2 is pulled-down,
+then the revision would be
+
+	0t012 = 0*9 + 1*3 + 2*1 = 5
+
+Required properties:
+- compatible: should be "gpio-sysinfo".
+- gpios: should be a list of gpios forming the revision number,
+  least-significant-digit first
+- revisions: a list of known revisions; any revisions not present will have the
+  name "unknown"
+- names: the name of each revision in revisions
+
+Example:
+sysinfo {
+	compatible = "gpio-sysinfo";
+	gpios = <&gpio_a 15>, <&gpio_a 16>, <&gpio_a 17>;
+	revisions = <19>, <5>;
+	names = "rev_a", "foo";
+};
diff --git a/doc/device-tree-bindings/sysinfo/smbios.txt b/doc/device-tree-bindings/sysinfo/smbios.txt
new file mode 100644
index 00000000000..b5223228025
--- /dev/null
+++ b/doc/device-tree-bindings/sysinfo/smbios.txt
@@ -0,0 +1,77 @@
+SMBIOS sysinfo information
+==========================
+
+This binding allows the values for the SMBIOS tables to be specified in the
+devicetree, as below.
+
+Required properties:
+
+  - compatible: "u-boot,smbios" or any other string depending on your board
+
+This driver allows providing board-specific features such as power control
+GPIOs. In addition, the SMBIOS values can be specified in the device tree,
+as below:
+
+An optional 'smbios' subnode can be used to provide these properties. Within
+that, the properties are broken down by table type, as in the System Management
+BIOS (Basic Input/Output System) Specification.
+
+Available subnodes for each table type are:
+
+  - 1 : system
+  - 2 : baseboard
+  - 3 : chassis
+
+Within each subnode the following tables are recognised:
+
+"system" subnode optional properties:
+
+  - manufacturer: Product manufacturer for system
+  - product:      Product name
+  - version:      Product version string
+  - serial:       Serial number for system (note that this can be overridden by
+                      the serial# environment variable)
+  - sku:          Product SKU (Stock-Keeping Unit)
+  - family:       Product family
+
+"baseboard" subnode optional properties:
+
+  - manufacturer: Product manufacturer for baseboard
+  - product:      Product name
+  - asset-tag:    Asset tag for the motherboard, sometimes used in organisations
+                      to track devices
+
+"chassis" subnode optional properties:
+
+  - manufacturer: Product manufacturer for chassis
+
+
+Example:
+
+sysinfo {
+	compatible = "sandbox,sysinfo-sandbox";
+
+	smbios {
+		/* Type 1 table */
+		system {
+			manufacturer = "Google";
+			product = "Coral";
+			version = "rev2";
+			serial = "123456789";
+			sku = "sku3";
+			family = "Google_Coral";
+		};
+
+		/* Type 2 table */
+		baseboard {
+			manufacturer = "Google";
+			product = "Coral";
+			asset-tag = "ABC123";
+		};
+
+		/* Type 3 table */
+		chassis {
+			manufacturer = "Google";
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/sysinfo/sysinfo.txt b/doc/device-tree-bindings/sysinfo/sysinfo.txt
new file mode 100644
index 00000000000..9445031b182
--- /dev/null
+++ b/doc/device-tree-bindings/sysinfo/sysinfo.txt
@@ -0,0 +1,19 @@
+Sysinfo
+=======
+
+This provides capabilities to access information about a board/system, for
+use by drivers.
+
+Required properties:
+
+  - compatible: any suitable string where the driver is in the UCLASS_SYSINFO
+      class
+
+See also smbios.txt
+
+
+Example
+
+sysinfo {
+	compatible = "sandbox,sysinfo-sandbox";
+};
diff --git a/doc/device-tree-bindings/thermal/rockchip-thermal.txt b/doc/device-tree-bindings/thermal/rockchip-thermal.txt
new file mode 100644
index 00000000000..ef802de4957
--- /dev/null
+++ b/doc/device-tree-bindings/thermal/rockchip-thermal.txt
@@ -0,0 +1,68 @@
+* Temperature Sensor ADC (TSADC) on rockchip SoCs
+
+Required properties:
+- compatible : "rockchip,rk3288-tsadc"
+- reg : physical base address of the controller and length of memory mapped
+	region.
+- interrupts : The interrupt number to the cpu. The interrupt specifier format
+	       depends on the interrupt controller.
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
+		the peripheral clock.
+- resets : Must contain an entry for each entry in reset-names.
+	   See ../reset/reset.txt for details.
+- reset-names : Must include the name "tsadc-apb".
+- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description.
+- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
+- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
+- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
+			       1:HIGH.
+
+Exiample:
+tsadc: tsadc@ff280000 {
+	compatible = "rockchip,rk3288-tsadc";
+	reg = <0xff280000 0x100>;
+	interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+	clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+	clock-names = "tsadc", "apb_pclk";
+	resets = <&cru SRST_TSADC>;
+	reset-names = "tsadc-apb";
+	pinctrl-names = "default";
+	pinctrl-0 = <&otp_out>;
+	#thermal-sensor-cells = <1>;
+	rockchip,hw-tshut-temp = <95000>;
+	rockchip,hw-tshut-mode = <0>;
+	rockchip,hw-tshut-polarity = <0>;
+};
+
+Example: referring to thermal sensors:
+thermal-zones {
+	cpu_thermal: cpu_thermal {
+		polling-delay-passive = <1000>; /* milliseconds */
+		polling-delay = <5000>; /* milliseconds */
+
+		/* sensor	ID */
+		thermal-sensors = <&tsadc	1>;
+
+		trips {
+			cpu_alert0: cpu_alert {
+				temperature = <70000>; /* millicelsius */
+				hysteresis = <2000>; /* millicelsius */
+				type = "passive";
+			};
+			cpu_crit: cpu_crit {
+				temperature = <90000>; /* millicelsius */
+				hysteresis = <2000>; /* millicelsius */
+				type = "critical";
+			};
+		};
+
+		cooling-maps {
+			map0 {
+				trip = <&cpu_alert0>;
+				cooling-device =
+				    <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+			};
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/thermal/ti_soc_thermal.txt b/doc/device-tree-bindings/thermal/ti_soc_thermal.txt
new file mode 100644
index 00000000000..b4e88c2d1e5
--- /dev/null
+++ b/doc/device-tree-bindings/thermal/ti_soc_thermal.txt
@@ -0,0 +1,35 @@
+* Texas Instrument dra7xx SCM bandgap bindings
+
+In the System Control Module, SoC supplies a voltage reference
+and a temperature sensor feature that are gathered in the band
+gap voltage and temperature sensor (VBGAPTS) module. The band
+gap provides current and voltage reference for its internal
+circuits and other analog IP blocks. The analog-to-digital
+converter (ADC) produces an output value that is proportional
+to the silicon temperature.
+
+Required properties:
+- compatible : Should be:
+  - "ti,dra752-bandgap"
+- interrupts : this entry should indicate which interrupt line
+the talert signal is routed to;
+- regs : this is specific to each bandgap version, because
+the mapping may change from soc to soc, apart from depending
+on available features.
+
+Optional:
+- gpios : this entry should be used to inform which GPIO
+line the tshut signal is routed to. The informed GPIO will
+be treated as an IRQ;
+
+Example:
+bandgap {
+	reg = <0x4a0021e0 0xc
+		0x4a00232c 0xc
+		0x4a002380 0x2c
+		0x4a0023C0 0x3c
+		0x4a002564 0x8
+		0x4a002574 0x50>;
+	compatible = "ti,dra752-bandgap";
+	interrupts = <0 126 4>; /* talert */
+};
diff --git a/doc/device-tree-bindings/timer/altera_timer.txt b/doc/device-tree-bindings/timer/altera_timer.txt
new file mode 100644
index 00000000000..904a5846d7a
--- /dev/null
+++ b/doc/device-tree-bindings/timer/altera_timer.txt
@@ -0,0 +1,19 @@
+Altera Timer
+
+Required properties:
+
+- compatible : should be "altr,timer-1.0"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-parent: phandle of the interrupt controller
+- interrupts : Should contain the timer interrupt number
+- clock-frequency : The frequency of the clock that drives the counter, in Hz.
+
+Example:
+
+timer {
+	compatible = "altr,timer-1.0";
+	reg = <0x00400000 0x00000020>;
+	interrupt-parent = <&cpu>;
+	interrupts = <11>;
+	clock-frequency = <125000000>;
+};
diff --git a/doc/device-tree-bindings/timer/arc_timer.txt b/doc/device-tree-bindings/timer/arc_timer.txt
new file mode 100644
index 00000000000..5493b21d271
--- /dev/null
+++ b/doc/device-tree-bindings/timer/arc_timer.txt
@@ -0,0 +1,24 @@
+ARC Timer
+
+Required properties:
+
+- compatible : should be "snps,arc-timer".
+- reg : Specifies timer ID, could be either 0 or 1.
+- clocks : Specifies clocks that drives the counter.
+
+Examples:
+
+timer@0 {
+	compatible = "snps,arc-timer";
+	clocks = <&core_clk>;
+	reg = <0>;
+};
+
+timer@1 {
+	compatible = "snps,arc-timer";
+	clocks = <&core_clk>;
+	reg = <1>;
+};
+
+NOTE: if you specify both timers, clocks always should be the same
+as each timer is driven by the same core clock.
diff --git a/doc/device-tree-bindings/timer/atcpit100_timer.txt b/doc/device-tree-bindings/timer/atcpit100_timer.txt
new file mode 100644
index 00000000000..620814e948c
--- /dev/null
+++ b/doc/device-tree-bindings/timer/atcpit100_timer.txt
@@ -0,0 +1,31 @@
+Andestech ATCPIT100 timer
+------------------------------------------------------------------
+ATCPIT100 is a generic IP block from Andes Technology, embedded in
+Andestech AE3XX, AE250 platforms and other designs.
+
+This timer is a set of compact multi-function timers, which can be
+used as pulse width modulators (PWM) as well as simple timers.
+
+It supports up to 4 PIT channels. Each PIT channel is a
+multi-function timer and provide the following usage scenarios:
+One 32-bit timer
+Two 16-bit timers
+Four 8-bit timers
+One 16-bit PWM
+One 16-bit timer and one 8-bit PWM
+Two 8-bit timer and one 8-bit PWM
+
+Required properties:
+- compatible	: Should be "andestech,atcpit100"
+- reg		: Address and length of the register set
+- interrupts	: Reference to the timer interrupt
+- clock-frequency : The rate in HZ in input of the Andestech ATCPIT100 timer
+
+Examples:
+
+timer0: timer@f0400000 {
+	compatible = "andestech,atcpit100";
+	reg = <0xf0400000 0x1000>;
+	interrupts = <2 4>;
+	clock-frequency = <30000000>;
+}:
diff --git a/doc/device-tree-bindings/timer/fsl,mpc83xx-timer.txt b/doc/device-tree-bindings/timer/fsl,mpc83xx-timer.txt
new file mode 100644
index 00000000000..608d24110ba
--- /dev/null
+++ b/doc/device-tree-bindings/timer/fsl,mpc83xx-timer.txt
@@ -0,0 +1,21 @@
+MPC83xx timer devices
+
+MPC83xx SoCs offer a decrementer interrupt that can be used to implement delay
+functionality, and periodically triggered actions.
+
+Required properties:
+- compatible: must be "fsl,mpc83xx-timer"
+- clocks: must be a reference to the system's CSB (coherent system bus) clock,
+  provided by one of the "fsl,mpc83xx-clk" devices
+
+Example:
+
+socclocks: clocks {
+	compatible = "fsl,mpc832x-clk";
+	#clock-cells = <1>;
+};
+
+timer {
+	compatible = "fsl,mpc83xx-timer";
+	clocks = <&socclocks MPC83XX_CLK_CSB>;
+};
diff --git a/doc/device-tree-bindings/timer/sandbox_timer.txt b/doc/device-tree-bindings/timer/sandbox_timer.txt
new file mode 100644
index 00000000000..3e113f83f00
--- /dev/null
+++ b/doc/device-tree-bindings/timer/sandbox_timer.txt
@@ -0,0 +1,7 @@
+Sandbox timer
+
+The sandbox timer device is an emulated device which gets time from
+host os.
+
+Required properties:
+  compatible: "sandbox,timer"
diff --git a/doc/device-tree-bindings/tpm2/sandbox.txt b/doc/device-tree-bindings/tpm2/sandbox.txt
new file mode 100644
index 00000000000..05a310e057f
--- /dev/null
+++ b/doc/device-tree-bindings/tpm2/sandbox.txt
@@ -0,0 +1,11 @@
+Sandbox TPMv2.0 bindings
+------------------------
+
+Required properties:
+- compatible		: Should be "sandbox,tpm2"
+
+Example:
+
+	tpm {
+		compatible = "sandbox,tpm2";
+	};
diff --git a/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt b/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt
new file mode 100644
index 00000000000..16f870225fd
--- /dev/null
+++ b/doc/device-tree-bindings/tpm2/tis-tpm2-spi.txt
@@ -0,0 +1,19 @@
+ST33TPHF20 SPI TPMv2.0 bindings
+-------------------------------
+
+Required properties:
+- compatible		: Should be "tcg,tpm_tis-spi"
+- reg			: SPI Chip select
+
+Optional properties:
+- reset-gpios		: Reset GPIO (if not connected to the SoC reset line)
+- gpio-reset		: Reset GPIO (deprecated, use reset-gpios instead)
+- spi-max-frequency	: See spi-bus.txt
+
+Example:
+
+	tpm@1 {
+		compatible = "tcg,tpm_tis-spi";
+		reg = <1>;
+		spi-max-frequency = <10000000>;
+	};
diff --git a/doc/device-tree-bindings/usb/dwc2.txt b/doc/device-tree-bindings/usb/dwc2.txt
new file mode 100644
index 00000000000..61493f7cb0c
--- /dev/null
+++ b/doc/device-tree-bindings/usb/dwc2.txt
@@ -0,0 +1,58 @@
+Platform DesignWare HS OTG USB 2.0 controller
+-----------------------------------------------------
+
+Required properties:
+- compatible : One of:
+  - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
+  - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
+  - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
+  - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
+  - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
+  - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
+  - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
+  - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
+  - "amlogic,meson8-usb": The DWC2 USB controller instance in Amlogic Meson8 SoCs;
+  - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;
+  - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;
+  - "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs;
+  - snps,dwc2: A generic DWC2 USB controller with default parameters.
+  - "st,stm32f4x9-fsotg": The DWC2 USB FS/HS controller instance in STM32F4x9 SoCs
+  configured in FS mode;
+  - "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
+  configured in HS mode;
+  - "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
+    configured in HS mode;
+- reg : Should contain 1 register range (address and length)
+- interrupts : Should contain 1 interrupt
+- clocks: clock provider specifier
+- clock-names: shall be "otg"
+Refer to clk/clock-bindings.txt for generic clock consumer properties
+
+Optional properties:
+- phys: phy provider specifier
+- phy-names: shall be "usb2-phy"
+Refer to phy/phy-bindings.txt for generic phy consumer properties
+- dr_mode: shall be one of "host", "peripheral" and "otg"
+  Refer to usb/generic.txt
+- g-rx-fifo-size: size of rx fifo size in gadget mode.
+- g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.
+- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
+- usb33d-supply: external VBUS and ID sensing comparators supply, in order to
+  perform OTG operation, used on STM32MP1 SoCs.
+- u-boot,force-b-session-valid: force B-peripheral session instead of relying on
+  VBUS sensing (only valid when dr_mode = "peripheral" and for u-boot).
+
+Deprecated properties:
+- g-use-dma: gadget DMA mode is automatically detected
+
+Example:
+
+        usb@101c0000 {
+                compatible = "ralink,rt3050-usb, snps,dwc2";
+                reg = <0x101c0000 40000>;
+                interrupts = <18>;
+		clocks = <&usb_otg_ahb_clk>;
+		clock-names = "otg";
+		phys = <&usbphy>;
+		phy-names = "usb2-phy";
+        };
diff --git a/doc/device-tree-bindings/usb/dwc3-st.txt b/doc/device-tree-bindings/usb/dwc3-st.txt
new file mode 100644
index 00000000000..a26a1397edf
--- /dev/null
+++ b/doc/device-tree-bindings/usb/dwc3-st.txt
@@ -0,0 +1,60 @@
+ST DWC3 glue logic
+
+This file documents the parameters for the dwc3-st driver.
+This driver controls the glue logic used to configure the dwc3 core on
+STiH407 based platforms.
+
+Required properties:
+ - compatible	: must be "st,stih407-dwc3"
+ - reg		: glue logic base address and USB syscfg ctrl register offset
+ - reg-names	: should be "reg-glue" and "syscfg-reg"
+ - st,syscon	: should be phandle to system configuration node which
+		  encompasses the glue registers
+ - resets	: list of phandle and reset specifier pairs. There should be two entries, one
+		  for the powerdown and softreset lines of the usb3 IP
+ - reset-names	: list of reset signal names. Names should be "powerdown" and "softreset"
+
+ - #address-cells, #size-cells : should be '1' if the device has sub-nodes
+   with 'reg' property
+
+ - pinctl-names	: A pinctrl state named "default" must be defined
+
+ - pinctrl-0	: Pin control group
+
+ - ranges	: allows valid 1:1 translation between child's address space and
+		  parent's address space
+
+Sub-nodes:
+The dwc3 core should be added as subnode to ST DWC3 glue as shown in the
+example below.
+
+NB: The dr_mode property is NOT optional for this driver, as the default value
+is "otg", which isn't supported by this SoC. Valid dr_mode values for dwc3-st are
+either "host" or "device".
+
+Example:
+
+st_dwc3: dwc3@8f94000 {
+	status		= "disabled";
+	compatible	= "st,stih407-dwc3";
+	reg		= <0x08f94000 0x1000>, <0x110 0x4>;
+	reg-names	= "reg-glue", "syscfg-reg";
+	st,syscfg	= <&syscfg_core>;
+	resets		= <&powerdown STIH407_USB3_POWERDOWN>,
+			  <&softreset STIH407_MIPHY2_SOFTRESET>;
+	reset-names	= "powerdown", "softreset";
+	#address-cells	= <1>;
+	#size-cells	= <1>;
+	pinctrl-names	= "default";
+	pinctrl-0	= <&pinctrl_usb3>;
+	ranges;
+
+	dwc3: dwc3@9900000 {
+		compatible	= "snps,dwc3";
+		reg		= <0x09900000 0x100000>;
+		interrupts	= <GIC_SPI 155 IRQ_TYPE_NONE>;
+		dr_mode		= "host";
+		phy-names	= "usb2-phy", "usb3-phy";
+		phys		= <&usb2_picophy2>, <&phy_port2 PHY_TYPE_USB3>;
+	};
+};
diff --git a/doc/device-tree-bindings/usb/generic.txt b/doc/device-tree-bindings/usb/generic.txt
new file mode 100644
index 00000000000..a02a198dfbe
--- /dev/null
+++ b/doc/device-tree-bindings/usb/generic.txt
@@ -0,0 +1,31 @@
+Generic USB Properties
+
+Optional properties:
+ - maximum-speed: tells USB controllers we want to work up to a certain
+			speed. Valid arguments are "super-speed-plus",
+			"super-speed", "high-speed", "full-speed" and
+			"low-speed". In case this isn't passed via DT, USB
+			controllers should default to their maximum HW
+			capability.
+ - dr_mode: tells Dual-Role USB controllers that we want to work on a
+			particular mode. Valid arguments are "host",
+			"peripheral" and "otg". In case this attribute isn't
+			passed via DT, USB DRD controllers should default to
+			OTG.
+ - phy_type: tells USB controllers that we want to configure the core to support
+			a UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is
+			selected. Valid arguments are "utmi" and "utmi_wide".
+			In case this isn't passed via DT, USB controllers should
+			default to HW capability.
+
+This is an attribute to a USB controller such as:
+
+dwc3@4a030000 {
+	compatible = "synopsys,dwc3";
+	reg = <0x4a030000 0xcfff>;
+	interrupts = <0 92 4>
+	usb-phy = <&usb2_phy>, <&usb3,phy>;
+	maximum-speed = "super-speed";
+	dr_mode = "otg";
+	phy_type = "utmi_wide";
+};
diff --git a/doc/device-tree-bindings/usb/marvell.xhci-usb.txt b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt
new file mode 100644
index 00000000000..e042d1b966f
--- /dev/null
+++ b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt
@@ -0,0 +1,28 @@
+Marvell SOC USB controllers
+
+This controller is integrated in Armada 3700/8K.
+It uses the same properties as a generic XHCI host controller
+
+Required properties :
+ - compatible: should be one or more of:
+   - "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs
+   - "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs
+ - reg: should contain address and length of the standard XHCI
+   register set for the device.
+ - interrupts: one XHCI interrupt should be described here.
+
+Optional properties:
+ - clocks: phandle to system controller clock driving this unit
+ - vbus-supply : If present, specifies the fixed regulator to be turned on
+   for providing power to the USB VBUS rail.
+
+Example:
+	cpm_usb3_0: usb3@500000 {
+		compatible = "marvell,armada-8k-xhci",
+			     "generic-xhci";
+		reg = <0x500000 0x4000>;
+		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cpm_syscon0 1 22>;
+		vbus-supply = <&reg_usb3h0_vbus>;
+		status = "disabled";
+	};
diff --git a/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt b/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt
new file mode 100644
index 00000000000..e26e9618eb9
--- /dev/null
+++ b/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt
@@ -0,0 +1,46 @@
+MediaTek xHCI
+
+The device node for USB3 host controller on MediaTek SoCs.
+
+Required properties:
+ - compatible : should be one of
+	"mediatek,mtk-xhci"
+	"mediatek,mt8195-xhci"
+ - reg : specifies physical base address and size of the registers
+ - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
+ - power-domains : a phandle to USB power domain node to control USB's
+	MTCMOS
+ - vusb33-supply : regulator of USB avdd3.3v
+
+ - clocks : a list of phandle + clock-specifier pairs, one for each
+	entry in clock-names
+ - clock-names : must contain
+	"sys_ck": controller clock used by normal mode,
+	the following ones are optional:
+	"ref_ck": reference clock used by low power mode etc,
+	"mcu_ck": mcu_bus clock for register access,
+	"dma_ck": dma_bus clock for data transfer by DMA,
+	"xhci_ck": controller clock
+
+ - phys : list of all the USB PHYs on this HCD
+ - phy-names: name specifier for the USB PHY
+
+Optional properties:
+ - vbus-supply : reference to the VBUS regulator;
+ - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
+	bit1 for u3port1, ... etc;
+ - mediatek,u2p-dis-msk : mask to disable u2ports, bit0 for u2port0,
+	bit1 for u2port1, ... etc;
+
+Example:
+xhci: usb@1a0c0000 {
+	compatible = "mediatek,mt7629-xhci", "mediatek,mtk-xhci";
+	reg = <0x1a0c0000 0x1000>, <0x1a0c3e00 0x0100>;
+	reg-names = "mac", "ippc";
+	power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>;
+	clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, <&ssusbsys CLK_SSUSB_REF_EN>,
+		 <&ssusbsys CLK_SSUSB_MCU_EN>, <&ssusbsys CLK_SSUSB_DMA_EN>;
+	clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+	phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
+	status = "disabled";
+};
diff --git a/doc/device-tree-bindings/usb/mediatek,mtu3.txt b/doc/device-tree-bindings/usb/mediatek,mtu3.txt
new file mode 100644
index 00000000000..ab877bfa89f
--- /dev/null
+++ b/doc/device-tree-bindings/usb/mediatek,mtu3.txt
@@ -0,0 +1,79 @@
+The device node for Mediatek USB3 DRD controller
+
+Required properties:
+ - compatible : should be "mediatek,<soc-model>-mtu3", "mediatek,mtu3",
+	soc-model is the name of SoC, such as mt8512 etc,
+	when using "mediatek,mtu3" compatible string, you need SoC specific
+	ones in addition, one of:
+	- "mediatek,mt8512-mtu3"
+ - reg : specifies physical base address and size of the registers
+ - reg-names: should be
+	- "ippc" : IP Port Control
+ - power-domains : a phandle to USB power domain node to control USB's MTCMOS
+ - clocks : a list of phandle + clock-specifier pairs, one for each
+	entry in clock-names
+ - clock-names : must contain "sys_ck" for clock of controller,
+	the following clocks are optional:
+	"ref_ck", "mcu_ck", "dma_ck" and "xhci_ck";
+ - phys : list of all the USB PHYs on this HCD
+ - #address-cells, #size-cells : used for sub-nodes with 'reg' property
+ - ranges : allows valid 1:1 translation between child's address space and
+	parent's address space
+
+Optional properties:
+ - vusb33-supply : regulator of USB AVDD3.3v
+ - vbus-supply : regulator of VBUS 5v, needed when supports host mode.
+
+Sub-nodes:
+Required properties:
+ - compatible : should be "mediatek,ssusb"
+ - reg : specifies physical base address and size of the registers
+ - reg-names: should be
+	- "mac" : SSUSB MAC, include xHCI and device
+ - interrupts : interrupt used by xHCI or device
+ - dr_mode : should be one of "host" or "peripheral",
+	see : usb/generic.txt
+
+Optional properties:
+ - pinctrl-names : a pinctrl state named "default" is optional
+ - pinctrl-0 : pin control group
+	See: pinctrl/pinctrl-bindings.txt
+
+ - device mode:
+   - maximum-speed : valid arguments are "full-speed", "high-speed",
+	"super-speed" and "super-speed-plus",
+	see: usb/generic.txt
+   - mediatek,force-vbus : force vbus as valid by SW
+
+ - host mode (dr_mode is "host"):
+   - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0,
+	bit1 for u3port1, ... etc;
+
+Example:
+usb3: usb@11213e00 {
+	compatible = "mediatek,mt8512-mtu3", "mediatek,mtu3";
+	reg = <0x11213e00 0x0100>;
+	reg-names = "ippc";
+	phys = <&u2port0 PHY_TYPE_USB2>, <&u2port1 PHY_TYPE_USB2>;
+	power-domains = <&scpsys MT8512_POWER_DOMAIN_USB>;
+	clocks = <&infracfg CLK_INFRA_USB_SYS>,
+		 <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>,
+		 <&infracfg CLK_INFRA_ICUSB>;
+	clock-names = "sys_ck", "ref_ck", "mcu_ck";
+	vusb33-supply = <reg_3p3v>;
+	vbus-supply = <&usb_p0_vbus>;
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	status = "disabled";
+
+	ssusb: usb@11210000 {
+		compatible = "mediatek,ssusb";
+		reg = <0x11210000 0x3e00>;
+		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_LOW>;
+		reg-names = "mac";
+		dr_mode = "peripheral";
+		maximum-speed = "high-speed";
+		status = "disabled";
+	};
+};
diff --git a/doc/device-tree-bindings/usb/tegra-usb.txt b/doc/device-tree-bindings/usb/tegra-usb.txt
new file mode 100644
index 00000000000..5282d44ac08
--- /dev/null
+++ b/doc/device-tree-bindings/usb/tegra-usb.txt
@@ -0,0 +1,25 @@
+Tegra SOC USB controllers
+
+The device node for a USB controller that is part of a Tegra
+SOC is as described in the document "Open Firmware Recommended
+Practice : Universal Serial Bus" with the following modifications
+and additions :
+
+Required properties :
+ - compatible : Should be "nvidia,tegra20-ehci" for USB controllers
+   used in host mode.
+ - phy_type : Should be one of "ulpi" or "utmi".
+ - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
+   activated for the bus to be powered.
+
+Optional properties:
+  - dr_mode : dual role mode. Indicates the working mode for
+    nvidia,tegra20-ehci compatible controllers.  Can be "host", "peripheral",
+    or "otg".  Default to "host" if not defined for backward compatibility.
+      host means this is a host controller
+      peripheral means it is device controller
+      otg means it can operate as either ("on the go")
+  - nvidia,has-legacy-mode : boolean indicates whether this controller can
+    operate in legacy mode (as APX 2500 / 2600). In legacy mode some
+    registers are accessed through the APB_MISC base address instead of
+    the USB controller.
diff --git a/doc/device-tree-bindings/video/atmel-hlcdc.txt b/doc/device-tree-bindings/video/atmel-hlcdc.txt
new file mode 100644
index 00000000000..7c9441ae8b3
--- /dev/null
+++ b/doc/device-tree-bindings/video/atmel-hlcdc.txt
@@ -0,0 +1,42 @@
+Atmel HLCDC Framebuffer
+-----------------------------------------------------
+Required properties:
+- compatible :
+	"atmel,sama5d2-hlcdc", "atmel,at91sam9x5-hlcdc".
+- reg: physical base address of the controller and length of memory mapped
+       region.
+- clocks: phandles to input clocks.
+- atmel,vl-bpix: Bits per pixel.
+- atmel,output-mode: LCD Controller Output Mode,
+  The unit is bits per pixel, there are four values,
+  <12>, <16>, <18>, <24>, the default value is <24>.
+- atmel,guard-time: lcd guard time (Delay in frame periods).
+- display-timings: please refer the displaymode.txt.
+
+Example:
+hlcdc: hlcdc@f0000000 {
+	bootph-all;
+	compatible = "atmel,sama5d2-hlcdc";
+	reg = <0xf0000000 0x2000>;
+	clocks = <&lcdc_clk>;
+	atmel,vl-bpix = <4>;
+	atmel,output-mode = <24>;
+	atmel,guard-time = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>;
+	status = "okay";
+
+	display-timings {
+		480x272 {
+			clock-frequency = <9000000>;
+			hactive = <480>;
+			vactive = <272>;
+			hsync-len = <41>;
+			hfront-porch = <2>;
+			hback-porch = <2>;
+			vfront-porch = <2>;
+			vback-porch = <2>;
+			vsync-len = <11>;
+		};
+	};
+};
diff --git a/doc/device-tree-bindings/video/bridge/ps8622.txt b/doc/device-tree-bindings/video/bridge/ps8622.txt
new file mode 100644
index 00000000000..66d5d07ebb8
--- /dev/null
+++ b/doc/device-tree-bindings/video/bridge/ps8622.txt
@@ -0,0 +1,33 @@
+ps8622-bridge bindings
+
+Required properties:
+	- compatible: "parade,ps8622" or "parade,ps8625"
+	- reg: first i2c address of the bridge
+	- sleep-gpios: OF device-tree gpio specification for PD_ pin.
+	- reset-gpios: OF device-tree gpio specification for RST_ pin.
+	- parade,regs: List of 3-byte registers tuples to write:
+		<I2C chip address offset> <register> <value>
+
+Optional properties:
+	- lane-count: number of DP lanes to use
+	- use-external-pwm: backlight will be controlled by an external PWM
+	- video interfaces: Device node can contain video interface port
+			    nodes for panel according to [1].
+
+[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+	lvds-bridge@48 {
+		compatible = "parade,ps8622";
+		reg = <0x48>;
+		sleep-gpios = <&gpc3 6 1 0 0>;
+		reset-gpios = <&gpc3 1 1 0 0>;
+		lane-count = <1>;
+		ports {
+			port@0 {
+				bridge_out: endpoint {
+					remote-endpoint = <&panel_in>;
+				};
+			};
+		};
+	};
diff --git a/doc/device-tree-bindings/video/display-timing.txt b/doc/device-tree-bindings/video/display-timing.txt
new file mode 100644
index 00000000000..e1d4a0b5961
--- /dev/null
+++ b/doc/device-tree-bindings/video/display-timing.txt
@@ -0,0 +1,110 @@
+display-timing bindings
+=======================
+
+display-timings node
+--------------------
+
+required properties:
+ - none
+
+optional properties:
+ - native-mode: The native mode for the display, in case multiple modes are
+		provided. When omitted, assume the first node is the native.
+
+timing subnode
+--------------
+
+required properties:
+ - hactive, vactive: display resolution
+ - hfront-porch, hback-porch, hsync-len: horizontal display timing parameters
+   in pixels
+   vfront-porch, vback-porch, vsync-len: vertical display timing parameters in
+   lines
+ - clock-frequency: display clock in Hz
+
+optional properties:
+ - hsync-active: hsync pulse is active low/high/ignored
+ - vsync-active: vsync pulse is active low/high/ignored
+ - de-active: data-enable pulse is active low/high/ignored
+ - pixelclk-active: with
+			- active high = drive pixel data on rising edge/
+					sample data on falling edge
+			- active low  = drive pixel data on falling edge/
+					sample data on rising edge
+			- ignored     = ignored
+ - interlaced (bool): boolean to enable interlaced mode
+ - doublescan (bool): boolean to enable doublescan mode
+ - doubleclk (bool): boolean to enable doubleclock mode
+
+All the optional properties that are not bool follow the following logic:
+    <1>: high active
+    <0>: low active
+    omitted: not used on hardware
+
+There are different ways of describing the capabilities of a display. The
+devicetree representation corresponds to the one commonly found in datasheets
+for displays. If a display supports multiple signal timings, the native-mode
+can be specified.
+
+The parameters are defined as:
+
+  +----------+-------------------------------------+----------+-------+
+  |          |        ↑                            |          |       |
+  |          |        |vback_porch                 |          |       |
+  |          |        ↓                            |          |       |
+  +----------#######################################----------+-------+
+  |          #        ↑                            #          |       |
+  |          #        |                            #          |       |
+  |  hback   #        |                            #  hfront  | hsync |
+  |   porch  #        |       hactive              #  porch   |  len  |
+  |<-------->#<-------+--------------------------->#<-------->|<----->|
+  |          #        |                            #          |       |
+  |          #        |vactive                     #          |       |
+  |          #        |                            #          |       |
+  |          #        ↓                            #          |       |
+  +----------#######################################----------+-------+
+  |          |        ↑                            |          |       |
+  |          |        |vfront_porch                |          |       |
+  |          |        ↓                            |          |       |
+  +----------+-------------------------------------+----------+-------+
+  |          |        ↑                            |          |       |
+  |          |        |vsync_len                   |          |       |
+  |          |        ↓                            |          |       |
+  +----------+-------------------------------------+----------+-------+
+
+Example:
+
+	display-timings {
+		native-mode = <&timing0>;
+		timing0: 1080p24 {
+			/* 1920x1080p24 */
+			clock-frequency = <52000000>;
+			hactive = <1920>;
+			vactive = <1080>;
+			hfront-porch = <25>;
+			hback-porch = <25>;
+			hsync-len = <25>;
+			vback-porch = <2>;
+			vfront-porch = <2>;
+			vsync-len = <2>;
+			hsync-active = <1>;
+		};
+	};
+
+Every required property also supports the use of ranges, so the commonly used
+datasheet description with minimum, typical and maximum values can be used.
+
+Example:
+
+	timing1: timing {
+		/* 1920x1080p24 */
+		clock-frequency = <148500000>;
+		hactive = <1920>;
+		vactive = <1080>;
+		hsync-len = <0 44 60>;
+		hfront-porch = <80 88 95>;
+		hback-porch = <100 148 160>;
+		vfront-porch = <0 4 6>;
+		vback-porch = <0 36 50>;
+		vsync-len = <0 5 6>;
+	};
diff --git a/doc/device-tree-bindings/video/displaymode.txt b/doc/device-tree-bindings/video/displaymode.txt
new file mode 100644
index 00000000000..45ca42db508
--- /dev/null
+++ b/doc/device-tree-bindings/video/displaymode.txt
@@ -0,0 +1,42 @@
+videomode bindings
+==================
+
+(from http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html)
+
+Required properties:
+ - xres, yres: Display resolution
+ - left-margin, right-margin, hsync-len: Horizontal Display timing
+   parameters in pixels
+ - upper-margin, lower-margin, vsync-len: Vertical display timing
+   parameters in lines
+ - clock: display clock in Hz
+
+Optional properties:
+ - width-mm, height-mm: Display dimensions in mm
+ - hsync-active-high (bool): Hsync pulse is active high
+ - vsync-active-high (bool): Vsync pulse is active high
+ - interlaced (bool): This is an interlaced mode
+ - doublescan (bool): This is a doublescan mode
+
+There are different ways of describing a display mode. The devicetree
+representation corresponds to the one used by the Linux Framebuffer
+framework described here in Documentation/fb/framebuffer.txt. This
+representation has been chosen because it's the only format which does
+not allow for inconsistent parameters. Unlike the Framebuffer framework
+the devicetree has the clock in Hz instead of ps.
+
+Example:
+
+	display@0 {
+		/* 1920x1080p24 */
+		clock = <52000000>;
+		xres = <1920>;
+		yres = <1080>;
+		left-margin = <25>;
+		right-margin = <25>;
+		hsync-len = <25>;
+		lower-margin = <2>;
+		upper-margin = <2>;
+		vsync-len = <2>;
+		hsync-active-high;
+	};
diff --git a/doc/device-tree-bindings/video/exynos-dp.txt b/doc/device-tree-bindings/video/exynos-dp.txt
new file mode 100644
index 00000000000..273d8fc7968
--- /dev/null
+++ b/doc/device-tree-bindings/video/exynos-dp.txt
@@ -0,0 +1,69 @@
+Exynos Display port controller
+==============================
+
+Required properties:
+SOC specific:
+	compatible: should be "samsung,exynos5-dp"
+	reg: Base address of DP IP
+
+Optional properties:
+	samsung,h-res: X resolution of the panel
+	samsung,h-sync-width: hsync value
+	samsung,h-back-porch: left margin
+	samsung,h-front-porch right margin
+	samsung,v-res: Y resolution of the panel
+	samsung,v-sync-width: vsync value
+	samsung,v-back-porch: upper margin
+	samsung,v-front-porch: lower margin
+	samsung,v-sync-rate: refresh rate
+
+	samsung,lt-status: Link training status
+		0(DP_LT_NONE), 1(DP_LT_START), 2(DP_LT_CR), 3(DP_LT_ET),
+		4(DP_LT_FINISHED), 5(DP_LT_FAIL)
+
+	samsung,master-mode: 1 if you want to run DP as master, else 0
+	samsung,bist-mode: 1 to enable video bist mode, else 0
+	samsung,bist-pattern: bist mode pattern type
+		0(NO_PATTERN), 1(COLOR_RAMP), 2(BALCK_WHITE_V_LINES),
+		3(COLOR_SQUARE), 4(INVALID_PATTERN), 5(COLORBAR_32),
+		6(COLORBAR_64),7(WHITE_GRAY_BALCKBAR_32),
+		8(WHITE_GRAY_BALCKBAR_64),9(MOBILE_WHITEBAR_32),
+		10(MOBILE_WHITEBAR_64)
+	samsung,h-sync-polarity: Horizontal Sync polarity
+			CFG_SYS_LOW if defined, else CONFIG_SYS_HIGH
+	samsung,v-sync-polarity: Vertical Sync polarity
+			CFG_SYS_LOW if defined, else CONFIG_SYS_HIGH
+	samsung,interlaced: Progressive if 0, else Interlaced
+	samsung,color-space: input video data format
+		COLOR_RGB = 0, COLOR_YCBCR422 = 1, COLOR_YCBCR444 = 2
+	samsung,dynamic-range: dynamic range for input video data
+		VESA = 0, CEA = 1
+	samsung,ycbcr-coeff: YCbCr co-efficients for input video
+		COLOR_YCBCR601 = 0, COLOR_YCBCR709 = 1
+	samsung,color-depth: number of bits per colour component
+		COLOR_6 = 0, COLOR_8 = 1, COLOR_10 = 2, COLOR_12 = 3
+
+Example:
+SOC specific part:
+	dp@145b0000 {
+		compatible = "samsung,exynos5-dp";
+		reg = <0x145b0000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+
+Board(panel) specific part:
+	dp@145b0000 {
+		samsung,lt-status = <0>;
+
+		samsung,master-mode = <0>;
+		samsung,bist-mode = <0>;
+		samsung,bist-pattern = <0>;
+		samsung,h-sync-polarity = <0>;
+		samsung,v-sync-polarity = <0>;
+		samsung,interlaced = <0>;
+		samsung,color-space = <0>;
+		samsung,dynamic-range = <0>;
+		samsung,ycbcr-coeff = <0>;
+		samsung,color-depth = <1>;
+	};
diff --git a/doc/device-tree-bindings/video/exynos-fb.txt b/doc/device-tree-bindings/video/exynos-fb.txt
new file mode 100644
index 00000000000..bff0cecfcfb
--- /dev/null
+++ b/doc/device-tree-bindings/video/exynos-fb.txt
@@ -0,0 +1,100 @@
+Exynos Display Controller
+=========================
+Required properties:
+SOC specific:
+	compatible: should be "samsung,exynos-fimd"
+	reg: Base address of FIMD IP.
+
+Board(panel specific):
+	samsung,vl-col: X resolution of the panel
+	samsung,vl-row: Y resolution of the panel
+	samsung,vl-freq: Refresh rate
+	samsung,vl-bpix: Bits per pixel
+	samsung,vl-hspw: Hsync value
+	samsung,vl-hfpd: Right margin
+	samsung,vl-hbpd: Left margin
+	samsung,vl-vspw: Vsync value
+	samsung,vl-vfpd: Lower margin
+	samsung,vl-vbpd: Upper margin
+
+Optional properties:
+Board(panel specific):
+	samsung,vl-width: width of display area in mm
+	samsung,vl-height: Height of display area in mm
+
+	samsung,vl-clkp: Clock polarity
+		CFG_SYS_LOW if defined, else CONFIG_SYS_HIGH
+	samsung,vl-oep: Output Enable polarity
+		CFG_SYS_LOW if defined, else CONFIG_SYS_HIGH
+	samsung,vl-hsp: Horizontal Sync polarity
+		CFG_SYS_LOW if defined, else CONFIG_SYS_HIGH
+	samsung,vl-vsp: Vertical Sync polarity
+		CFG_SYS_LOW if defined, else CONFIG_SYS_HIGH
+	samsung,vl-dp: Data polarity
+		CFG_SYS_LOW if defined, else CONFIG_SYS_HIGH
+
+	samsung,vl-cmd-allow-len: Wait end of frame
+	samsung,winid: Window number on which data is to be displayed
+	samsung,init-delay: Delay before LCD initialization starts
+	samsung,power-on-delay: Delay after LCD is powered on
+	samsung,reset-delay: Delay after LCD is reset
+	samsung,interface-mode: 1(FIMD_RGB_INTERFACE), 2(FIMD_CPU_INTERFACE)
+	samsung,mipi-enabled: 1 if you want to use MIPI, else 0
+	samsung,dp-enabled: 1is you want to use DP, else 0
+	samsung,cs-setup: cs_setup value in FIMD_CPU_INTERFACE mode.
+	samsung,wr-setup: wr_setup value in FIMD_CPU_INTERFACE mode.
+	samsung,wr-act: wr_act value in FIMD_CPU_INTERFACE mode.
+	samsung,wr-hold: wr_hold value in FIMD_CPU_INTERFACE mode.
+	samsung,logo-on: 1 if you want to use custom logo.
+			 0 if you want LCD console.
+	samsung,logo-width: pixel width of logo image. Valid if logo_on = 1
+	samsung,logo-height: pixel height of logo image. Valid if logo_on = 1
+	samsung,logo-addr: Address of logo image. Valid if logo_on = 1
+	samsung,rgb-mode: 0(MODE_RGB_P), 1(MODE_BGR_P),
+			  2(MODE_RGB_S), 3(MODE_BGR_S)
+	samsung,pclk-name: parent clock identifier: 1(MPLL), 2(EPLL), 3(VPLL)
+	samsung,sclk-div: parent_clock/source_clock ratio
+	samsung,dual-lcd-enabled: 1 if you support two LCD, else 0
+	samsung,disable-sysmmu: Define this if you want to disable FIMD sysmmu.
+				(needed for Exynos5420 and newer versions)
+				Add the required FIMD sysmmu nodes to be
+				disabled with compatible string
+				"samsung,sysmmu-v3.3", with a "reg" property
+				holding the register address of FIMD sysmmu.
+	samsung,pwm-out-gpio: PWM output GPIO.
+	samsung,bl-en-gpio: backlight enable GPIO.
+
+Example:
+SOC specific part:
+	fimd@14400000 {
+		compatible = "samsung,exynos-fimd";
+		reg = <0x14400000 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+
+Board specific part:
+	fimd@14400000 {
+		samsung,vl-freq = <60>;
+		samsung,vl-col = <2560>;
+		samsung,vl-row = <1600>;
+		samsung,vl-width = <2560>;
+		samsung,vl-height = <1600>;
+
+		samsung,vl-clkp;
+		samsung,vl-dp;
+		samsung,vl-bpix = <4>;
+
+		samsung,vl-hspw = <32>;
+		samsung,vl-hbpd = <80>;
+		samsung,vl-hfpd = <48>;
+		samsung,vl-vspw = <6>;
+		samsung,vl-vbpd = <37>;
+		samsung,vl-vfpd = <3>;
+		samsung,vl-cmd-allow-len = <0xf>;
+
+		samsung,winid = <3>;
+		samsung,interface-mode = <1>;
+		samsung,dp-enabled = <1>;
+		samsung,dual-lcd-enabled = <0>;
+	};
diff --git a/doc/device-tree-bindings/video/exynos_mipi_dsi.txt b/doc/device-tree-bindings/video/exynos_mipi_dsi.txt
new file mode 100644
index 00000000000..4938ea01ec0
--- /dev/null
+++ b/doc/device-tree-bindings/video/exynos_mipi_dsi.txt
@@ -0,0 +1,82 @@
+Exynos MIPI-DSIM Controller
+=========================
+
+Required properties:
+SOC specific:
+	compatible: should be "samsung,exynos-mipi-dsi"
+	reg: Base address of MIPI-DSIM IP.
+
+Board specific:
+	samsung,dsim-config-e-interface: interface to be used (RGB interface
+		for main display or CPU interface for main or sub display).
+	samsung,dsim-config-e-virtual-ch: virtual channel number that main
+		or sub display uses.
+	samsung,dsim-config-e-pixel-format: pixel stream format for main
+		or sub display.
+	samsung,dsim-config-e-burst-mode: selects Burst mode in Video mode.
+		in Non-burst mode, RGB data area is filled with RGB data and
+		NULL packets, according to input bandwidth of RGB interface.
+	samsung,dsim-config-e-no-data-lane: data lane count used by Master.
+	samsung,dsim-config-e-byte-clk: select byte clock source.
+		It must be DSIM_PLL_OUT_DIV8.
+		DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported.
+	samsung,dsim-config-hfp: HFP disable mode.
+		If set, DSI master ignores HFP area in VIDEO mode.
+		In command mode, this variable is ignored.
+	samsung,dsim-config-p: P value for PMS setting.
+	samsung,dsim-config-m: M value for PMS setting.
+	samsung,dsim-config-s: S value for PMS setting.
+	samsung,dsim-config-pll-stable-time: the PLL Timer for stability
+		of the ganerated clock.
+	samsung,dsim-config-esc-clk: escape clock frequency for getting
+		the escape clock prescaler value.
+	samsung,dsim-config-stop-holding-cnt: the interval value between
+		transmitting read packet (or write "set_tear_on" command)
+		and BTA request. After transmitting read packet or write
+		"set_tear_on" command, BTA requests to D-PHY automatically.
+		This counter value specifies the interval between them.
+	samsung,dsim-config-bta-timeout: the timer for BTA. This register
+		specifies time out from BTA request to change the direction
+		with respect to Tx escape clock.
+	samsung,dsim-config-rx-timeout: the timer for LP Rx mode timeout.
+		this register specifies time out on how long RxValid deasserts,
+		after RxLpdt asserts with respect to Tx escape clock.
+		- RxValid specifies Rx data valid indicator.
+		- RxLpdt specifies an indicator that D-PHY is under RxLpdt mode
+		- RxValid and RxLpdt specifies signal from D-PHY.
+	samsung,dsim-device-name: name of the device.
+	samsung,dsim-device-id: unique device id.
+	samsung,dsim-device-bus_id: bus id for identifing connected bus
+		and this bus id should be same as id of mipi_dsim_device.
+
+Optional properties:
+	samsung,dsim-device-reverse-panel: reverse panel.
+
+Example:
+	mipidsi@11c80000 {
+		compatible = "samsung,exynos-mipi-dsi";
+		reg = <0x11c80000 0x5c>;
+
+		samsung,dsim-config-e-interface = <1>;
+		samsung,dsim-config-e-virtual-ch = <0>;
+		samsung,dsim-config-e-pixel-format = <7>;
+		samsung,dsim-config-e-burst-mode = <1>;
+		samsung,dsim-config-e-no-data-lane = <3>;
+		samsung,dsim-config-e-byte-clk = <0>;
+		samsung,dsim-config-hfp = <1>;
+
+		samsung,dsim-config-p = <3>;
+		samsung,dsim-config-m = <120>;
+		samsung,dsim-config-s = <1>;
+
+		samsung,dsim-config-pll-stable-time = <500>;
+		samsung,dsim-config-esc-clk = <20000000>;
+		samsung,dsim-config-stop-holding-cnt = <0x7ff>;
+		samsung,dsim-config-bta-timeout = <0xff>;
+		samsung,dsim-config-rx-timeout = <0xffff>;
+
+		samsung,dsim-device-id = <0xffffffff>;
+		samsung,dsim-device-bus-id = <0>;
+
+		samsung,dsim-device-reverse-panel = <1>;
+	};
diff --git a/doc/device-tree-bindings/video/intel-gma.txt b/doc/device-tree-bindings/video/intel-gma.txt
new file mode 100644
index 00000000000..914be4fedde
--- /dev/null
+++ b/doc/device-tree-bindings/video/intel-gma.txt
@@ -0,0 +1,40 @@
+Intel GMA Bindings
+==================
+
+This is the Intel Graphics Media Accelerator. This binding supports selection
+of display parameters only.
+
+
+Required properties:
+ - compatible : "intel,gma";
+
+Optional properties:
+ - intel,dp-hotplug : values for digital port hotplug, one cell per value for
+     ports B, C and D
+  - intel,panel-port-select : output port to use: 0=LVDS 1=DP_B 2=DP_C 3=DP_D
+  - intel,panel-power-cycle-delay : T4 time sequence (6 = 500ms)
+
+  The following delays are in units of 0.1ms:
+  - intel,panel-power-up-delay : T1+T2 time sequence
+  - intel,panel-power-down-delay : T3 time sequence
+  - intel,panel-power-backlight-on-delay : T5 time sequence
+  - intel,panel-power-backlight-off-delay : Tx time sequence
+
+  - intel,cpu-backlight : Value for CPU Backlight PWM
+  - intel,pch-backlight : Value for PCH Backlight PWM
+
+Example
+-------
+
+gma {
+	compatible = "intel,gma";
+	intel,dp_hotplug = <0 0 0x06>;
+	intel,panel-port-select = <1>;
+	intel,panel-power-cycle-delay = <6>;
+	intel,panel-power-up-delay = <2000>;
+	intel,panel-power-down-delay = <500>;
+	intel,panel-power-backlight-on-delay = <2000>;
+	intel,panel-power-backlight-off-delay = <2000>;
+	intel,cpu-backlight = <0x00000200>;
+	intel,pch-backlight = <0x04000000>;
+};
diff --git a/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt b/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt
new file mode 100644
index 00000000000..d7aacc827ed
--- /dev/null
+++ b/doc/device-tree-bindings/video/osd/gdsys,ihs_video_out.txt
@@ -0,0 +1,23 @@
+* Guntermann & Drunck Integrated Hardware Systems OSD
+
+Required properties:
+- compatible: "gdsys,ihs_video_out"
+- reg: A combination of three register spaces:
+       - Register base for the video registers
+       - Register base for the OSD registers
+       - Address of the OSD video memory
+- mode: The initial resolution and frequency: "1024_768_60", "720_400_70", or
+        "640_480_70"
+- clk_gen: phandle to the pixel clock generator
+- dp_tx: phandle to the display associated with the OSD
+
+Example:
+
+fpga0_video0 {
+	compatible = "gdsys,ihs_video_out";
+	reg = <0x100 0x40
+	       0x180 0x20
+	       0x1000 0x1000>;
+	dp_tx = <&fpga0_dp_video0>;
+	clk_gen = <&fpga0_video0_clkgen>;
+};
diff --git a/doc/device-tree-bindings/video/rockchip-lvds.txt b/doc/device-tree-bindings/video/rockchip-lvds.txt
new file mode 100644
index 00000000000..7432e221669
--- /dev/null
+++ b/doc/device-tree-bindings/video/rockchip-lvds.txt
@@ -0,0 +1,77 @@
+Rockchip LVDS interface
+------------------
+
+Required properties:
+- compatible: "rockchip,rk3288-lvds";
+
+- reg: physical base address of the controller and length
+	of memory mapped region.
+- clocks: must include clock specifiers corresponding to entries in the
+	clock-names property.
+- clock-names: must contain "pclk_lvds"
+
+- rockchip,grf: phandle to the general register files syscon
+
+- rockchip,data-mapping: should be <LVDS_FORMAT_VESA> or  <LVDS_FORMAT_JEIDA>,
+	This describes how the color bits are laid out in the
+	serialized LVDS signal.
+- rockchip,data-width : should be <18> or <24>;
+- rockchip,output: should be <LVDS_OUTPUT_RGB>, <LVDS_OUTPUT_SINGLE> or
+	<LVDS_OUTPUT_DUAL>, This describes the output face.
+
+- display-timings : described by
+	doc/device-tree-bindings/video/display-timing.txt.
+
+Example:
+	lvds: lvds@ff96c000 {
+		compatible = "rockchip,rk3288-lvds";
+		reg = <0xff96c000 0x4000>;
+		clocks = <&cru PCLK_LVDS_PHY>;
+		clock-names = "pclk_lvds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&lcdc0_ctl>;
+		rockchip,grf = <&grf>;
+		status = "disabled";
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			lvds_in: port@0 {
+				reg = <0>;
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				lvds_in_vopb: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vopb_out_lvds>;
+				};
+				lvds_in_vopl: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vopl_out_lvds>;
+				};
+			};
+		};
+	};
+
+	&lvds {
+		rockchip,data-mapping = <LVDS_FORMAT_VESA>;
+		rockchip,data-width = <24>;
+		rockchip,output = <LVDS_OUTPUT_DUAL>;
+		rockchip,panel = <&panel>;
+		status = "okay";
+
+		display-timings {
+			timing@0 {
+				clock-frequency = <40000000>;
+				hactive = <1920>;
+				vactive = <1080>;
+				hsync-len = <44>;
+				hfront-porch = <88>;
+				hback-porch = <148>;
+				vfront-porch = <4>;
+				vback-porch = <36>;
+				vsync-len = <5>;
+			};
+		};
+	};
diff --git a/doc/device-tree-bindings/video/sandbox-fb.txt b/doc/device-tree-bindings/video/sandbox-fb.txt
new file mode 100644
index 00000000000..230d25c23bb
--- /dev/null
+++ b/doc/device-tree-bindings/video/sandbox-fb.txt
@@ -0,0 +1,17 @@
+Sandbox LCD
+===========
+
+This uses the displaymode.txt binding except that only xres and yres are
+required properties. Also an additional optional property is defined:
+
+log2-depth: Log base 2 of the U-Boot display buffer depth (4=16bpp, 5=32bpp).
+	If not provided, a value of 4 is used.
+
+Example:
+
+	lcd {
+		compatible = "sandbox,lcd-sdl";
+		xres = <800>;
+		yres = <600>;
+		log2-depth = <5>;
+	};
diff --git a/doc/device-tree-bindings/video/simple-framebuffer.txt b/doc/device-tree-bindings/video/simple-framebuffer.txt
new file mode 100644
index 00000000000..3ea46058311
--- /dev/null
+++ b/doc/device-tree-bindings/video/simple-framebuffer.txt
@@ -0,0 +1,25 @@
+Simple Framebuffer
+
+A simple frame-buffer describes a raw memory region that may be rendered to,
+with the assumption that the display hardware has already been set up to scan
+out from that buffer.
+
+Required properties:
+- compatible: "simple-framebuffer"
+- reg: Should contain the location and size of the framebuffer memory.
+- width: The width of the framebuffer in pixels.
+- height: The height of the framebuffer in pixels.
+- stride: The number of bytes in each line of the framebuffer.
+- format: The format of the framebuffer surface. Valid values are:
+  - r5g6b5 (16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b).
+
+Example:
+
+	framebuffer {
+		compatible = "simple-framebuffer";
+		reg = <0x1d385000 (1600 * 1200 * 2)>;
+		width = <1600>;
+		height = <1200>;
+		stride = <(1600 * 2)>;
+		format = "r5g6b5";
+	};
diff --git a/doc/device-tree-bindings/video/syncoam,seps525.txt b/doc/device-tree-bindings/video/syncoam,seps525.txt
new file mode 100644
index 00000000000..e1e0db9d71f
--- /dev/null
+++ b/doc/device-tree-bindings/video/syncoam,seps525.txt
@@ -0,0 +1,24 @@
+spi based seps525 framebuffer display driver
+
+Driver for seps525 display controller (in spi mode), This binding supports selection
+of spi chipselect, spi max frequency, gpio to drive dc and reset pin of seps525
+controller and spi transaction bit length.
+
+Required properties:
+- compatible: "syncoam,seps525"
+- reg: Specifies the chip-select the seps525 is connected to on the spi bus
+- reset-gpios: gpio connected to reset pin of seps525 controller.
+- dc-gpios: gpio connected to dc pin of seps525 controller:
+- buswidth: bitlength of each spi transaction
+
+Example:
+	displayspi@0 {
+		compatible = "syncoam,seps525";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+		spi-cpol;
+		spi-cpha;
+		buswidth = <8>;
+		reset-gpios = <&gpio 0x1c GPIO_ACTIVE_LOW>;
+		dc-gpios = <&gpio 0x1b GPIO_ACTIVE_HIGH>;
+	};
diff --git a/doc/device-tree-bindings/video/tegra20-dc.txt b/doc/device-tree-bindings/video/tegra20-dc.txt
new file mode 100644
index 00000000000..4731c3fbab4
--- /dev/null
+++ b/doc/device-tree-bindings/video/tegra20-dc.txt
@@ -0,0 +1,85 @@
+Display Controller
+------------------
+
+(there isn't yet a generic binding in Linux, so this describes what is in
+U-Boot, and may change based on Linux activity)
+
+The device node for a display device is as described in the document
+"Open Firmware Recommended Practice : Universal Serial Bus" with the
+following modifications and additions :
+
+Required properties :
+ - compatible : Should be "nvidia,tegra20-dc"
+
+Required subnode 'rgb' is as follows:
+
+Required properties (rgb) :
+ - nvidia,panel : phandle of LCD panel information
+
+
+The panel node describes the panel itself. This has the properties listed in
+displaymode.txt as well as:
+
+Required properties (panel) :
+ - nvidia,bits-per-pixel: number of bits per pixel (depth)
+ - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt)
+ - nvidia,panel-timings: 4 cells containing required timings in ms:
+	* delay before asserting panel_vdd
+	* delay between panel_vdd-rise and data-rise
+	* delay between data-rise and backlight_vdd-rise
+	* delay between backlight_vdd and pwm-rise
+	* delay between pwm-rise and backlight_en-rise
+
+Optional GPIO properies all have (phandle, GPIO number, flags):
+ - nvidia,backlight-enable-gpios: backlight enable GPIO
+ - nvidia,lvds-shutdown-gpios: LVDS power shutdown GPIO
+ - nvidia,backlight-vdd-gpios: backlight power GPIO
+ - nvidia,panel-vdd-gpios: panel power GPIO
+
+Example:
+
+host1x {
+	compatible = "nvidia,tegra20-host1x", "simple-bus";
+	reg = <0x50000000 0x00024000>;
+	interrupts = <0 65 0x04   /* mpcore syncpt */
+			0 67 0x04>; /* mpcore general */
+
+	#address-cells = <1>;
+	#size-cells = <1>;
+	status = "okay";
+
+	ranges = <0x54000000 0x54000000 0x04000000>;
+
+	dc@54200000 {
+		compatible = "nvidia,tegra20-dc";
+		reg = <0x54200000 0x00040000>;
+		interrupts = <0 73 0x04>;
+		status = "okay";
+
+		rgb {
+			status = "okay";
+			nvidia,panel = <&lcd_panel>;
+		};
+	};
+};
+
+lcd_panel: panel {
+	/* Seaboard has 1366x768 */
+	clock = <70600000>;
+	xres = <1366>;
+	yres = <768>;
+	left-margin = <58>;
+	right-margin = <58>;
+	hsync-len = <58>;
+	lower-margin = <4>;
+	upper-margin = <4>;
+	vsync-len = <4>;
+	hsync-active-high;
+	nvidia,bits-per-pixel = <16>;
+	nvidia,pwm = <&pwm 2 0>;
+	nvidia,backlight-enable-gpios = <&gpio 28 0>;	/* PD4 */
+	nvidia,lvds-shutdown-gpios = <&gpio 10 0>;	/* PB2 */
+	nvidia,backlight-vdd-gpios = <&gpio 176 0>;	/* PW0 */
+	nvidia,panel-vdd-gpios = <&gpio 22 0>;		/* PC6 */
+	nvidia,panel-timings = <400 4 203 17 15>;
+};
diff --git a/doc/device-tree-bindings/video/tilcdc/panel.txt b/doc/device-tree-bindings/video/tilcdc/panel.txt
new file mode 100644
index 00000000000..808216310ea
--- /dev/null
+++ b/doc/device-tree-bindings/video/tilcdc/panel.txt
@@ -0,0 +1,66 @@
+Device-Tree bindings for tilcdc DRM generic panel output driver
+
+Required properties:
+ - compatible: value should be "ti,tilcdc,panel".
+ - panel-info: configuration info to configure LCDC correctly for the panel
+   - ac-bias: AC Bias Pin Frequency
+   - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
+   - dma-burst-sz: DMA burst size
+   - bpp: Bits per pixel
+   - fdd: FIFO DMA Request Delay
+   - sync-edge: Horizontal and Vertical Sync Edge: 0=rising 1=falling
+   - sync-ctrl: Horizontal and Vertical Sync: Control: 0=ignore
+   - raster-order: Raster Data Order Select: 1=Most-to-least 0=Least-to-most
+   - fifo-th: DMA FIFO threshold
+ - display-timings: typical videomode of lcd panel.  Multiple video modes
+   can be listed if the panel supports multiple timings, but the 'native-mode'
+   should be the preferred/default resolution.  Refer to
+   Documentation/devicetree/bindings/display/panel/display-timing.txt for display
+   timing binding details.
+
+Optional properties:
+- backlight: phandle of the backlight device attached to the panel
+- enable-gpios: GPIO pin to enable or disable the panel
+
+Recommended properties:
+ - pinctrl-names, pinctrl-0: the pincontrol settings to configure
+   muxing properly for pins that connect to TFP410 device
+
+Example:
+
+	/* Settings for CDTech_S035Q01 / LCD3 cape: */
+	lcd3 {
+		compatible = "ti,tilcdc,panel";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bone_lcd3_cape_lcd_pins>;
+		backlight = <&backlight>;
+		enable-gpios = <&gpio3 19 0>;
+
+		panel-info {
+			ac-bias           = <255>;
+			ac-bias-intrpt    = <0>;
+			dma-burst-sz      = <16>;
+			bpp               = <16>;
+			fdd               = <0x80>;
+			sync-edge         = <0>;
+			sync-ctrl         = <1>;
+			raster-order      = <0>;
+			fifo-th           = <0>;
+		};
+		display-timings {
+			native-mode = <&timing0>;
+			timing0: 320x240 {
+				hactive         = <320>;
+				vactive         = <240>;
+				hback-porch     = <21>;
+				hfront-porch    = <58>;
+				hsync-len       = <47>;
+				vback-porch     = <11>;
+				vfront-porch    = <23>;
+				vsync-len       = <2>;
+				clock-frequency = <8000000>;
+				hsync-active    = <0>;
+				vsync-active    = <0>;
+			};
+		};
+	};
diff --git a/doc/device-tree-bindings/video/tilcdc/tilcdc.txt b/doc/device-tree-bindings/video/tilcdc/tilcdc.txt
new file mode 100644
index 00000000000..7600801055d
--- /dev/null
+++ b/doc/device-tree-bindings/video/tilcdc/tilcdc.txt
@@ -0,0 +1,82 @@
+Device-Tree bindings for tilcdc DRM driver
+
+Required properties:
+ - compatible: value should be one of the following:
+    - "ti,am33xx-tilcdc" for AM335x based boards
+    - "ti,da850-tilcdc" for DA850/AM18x/OMAP-L138 based boards
+ - interrupts: the interrupt number
+ - reg: base address and size of the LCDC device
+
+Recommended properties:
+ - ti,hwmods: Name of the hwmod associated to the LCDC
+
+Optional properties:
+ - max-bandwidth: The maximum pixels per second that the memory
+   interface / lcd controller combination can sustain
+ - max-width: The maximum horizontal pixel width supported by
+   the lcd controller.
+ - max-pixelclock: The maximum pixel clock that can be supported
+   by the lcd controller in KHz.
+ - blue-and-red-wiring: Recognized values "straight" or "crossed".
+   This property deals with the LCDC revision 2 (found on AM335x)
+   color errata [1].
+    - "straight" indicates normal wiring that supports RGB565,
+      BGR888, and XBGR8888 color formats.
+    - "crossed" indicates wiring that has blue and red wires
+      crossed. This setup supports BGR565, RGB888 and XRGB8888
+      formats.
+    - If the property is not present or its value is not recognized
+      the legacy mode is assumed. This configuration supports RGB565,
+      RGB888 and XRGB8888 formats. However, depending on wiring, the red
+      and blue colors are swapped in either 16 or 24-bit color modes.
+
+Optional nodes:
+
+ - port/ports: to describe a connection to an external encoder. The
+   binding follows Documentation/devicetree/bindings/graph.txt and
+   supports a single port with a single endpoint.
+
+ - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and
+   Documentation/devicetree/bindings/display/tilcdc/tfp410.txt for connecting
+   tfp410 DVI encoder or lcd panel to lcdc
+
+[1] There is an errata about AM335x color wiring. For 16-bit color mode
+    the wires work as they should (LCD_DATA[0:4] is for Blue[3:7]),
+    but for 24 bit color modes the wiring of blue and red components is
+    crossed and LCD_DATA[0:4] is for Red[3:7] and LCD_DATA[11:15] is
+    for Blue[3-7]. For more details see section 3.1.1 in AM335x
+    Silicon Errata:
+    https://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=sprz360
+
+Example:
+
+	fb: fb@4830e000 {
+		compatible = "ti,am33xx-tilcdc", "ti,da850-tilcdc";
+		reg = <0x4830e000 0x1000>;
+		interrupt-parent = <&intc>;
+		interrupts = <36>;
+		ti,hwmods = "lcdc";
+
+		blue-and-red-wiring = "crossed";
+
+		port {
+			lcdc_0: endpoint@0 {
+				remote-endpoint = <&hdmi_0>;
+			};
+		};
+	};
+
+	tda19988: tda19988 {
+		compatible = "nxp,tda998x";
+		reg = <0x70>;
+
+		pinctrl-names = "default", "off";
+		pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
+		pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
+
+		port {
+			hdmi_0: endpoint@0 {
+				remote-endpoint = <&lcdc_0>;
+			};
+		};
+	};
diff --git a/doc/device-tree-bindings/w1-eeprom/ds24xxx.txt b/doc/device-tree-bindings/w1-eeprom/ds24xxx.txt
new file mode 100644
index 00000000000..3ad8d460f2c
--- /dev/null
+++ b/doc/device-tree-bindings/w1-eeprom/ds24xxx.txt
@@ -0,0 +1,36 @@
+Maxim DS24 families driver device binding - one wire protocol EEPROMS from Maxim
+=======================
+
+This memory needs to be connected to a onewire bus, as a child node.
+The bus will read the device serial number and match this node with a found
+device on the bus
+Also check doc/device-tree-bindings/w1 for onewire bus drivers
+
+Driver:
+- drivers/w1-eeprom/ds24xxx.c
+
+Software ds24xxx device-tree node properties:
+Required:
+* compatible = "maxim,ds24b33"
+or
+* compatible = "maxim,ds2431"
+Further memories can be added.
+
+Optional:
+* none
+
+Example:
+	eeprom1: eeprom@0 {
+		compatible = "maxim,ds24xxx";
+	}
+
+Example with parent bus:
+
+onewire_tm: onewire {
+		compatible = "w1-gpio";
+		gpios = <&pioA 32 0>;
+
+		eeprom1: eeprom@0 {
+			compatible = "maxim,ds24xxx";
+		}
+};
diff --git a/doc/device-tree-bindings/w1-eeprom/ds2502.txt b/doc/device-tree-bindings/w1-eeprom/ds2502.txt
new file mode 100644
index 00000000000..8788e570587
--- /dev/null
+++ b/doc/device-tree-bindings/w1-eeprom/ds2502.txt
@@ -0,0 +1,32 @@
+Maxim DS2502 driver device binding - one wire protocol add only memory from Maxim
+=======================
+
+This memory needs to be connected to a onewire bus, as a child node.
+The bus will read the device serial number and match this node with a found
+device on the bus
+Also check doc/device-tree-bindings/w1 for onewire bus drivers
+
+Driver:
+- drivers/w1-eeprom/ds2502.c
+
+Ds2502 device-tree node properties:
+Required:
+* compatible = "maxim,ds2502"
+
+Optional:
+* none
+
+Example:
+	eeprom1: eeprom@0 {
+		compatible = "maxim,ds2502";
+	};
+
+Example with parent bus:
+	onewire {
+		compatible = "fsl,imx53-owire";
+		reg = <0x63fa4000 0x4000>;
+
+		eeprom1: eeprom@0 {
+			compatible = "maxim,ds2502";
+		};
+	};
diff --git a/doc/device-tree-bindings/w1-eeprom/eep_sandbox.txt b/doc/device-tree-bindings/w1-eeprom/eep_sandbox.txt
new file mode 100644
index 00000000000..ebf718c7432
--- /dev/null
+++ b/doc/device-tree-bindings/w1-eeprom/eep_sandbox.txt
@@ -0,0 +1,33 @@
+Onewire EEPROM sandbox driver device binding - one wire protocol sandbox EEPROM
+=======================
+
+This memory needs to be connected to a onewire bus, as a child node.
+The bus will read the device serial number and match this node with a found
+device on the bus
+Also check doc/device-tree-bindings/w1 for onewire bus drivers
+
+Driver:
+- drivers/w1-eeprom/eep_sandbox.c
+
+Software ds24xxx device-tree node properties:
+Required:
+* compatible = "sandbox,w1-eeprom"
+
+Optional:
+* none
+
+Example:
+	eeprom1: eeprom@0 {
+		compatible = "sandbox,w1-eeprom";
+	}
+
+Example with parent bus:
+
+onewire_tm: onewire {
+		compatible = "w1-gpio";
+		gpios = <&gpio_a 8>;
+
+		eeprom1: eeprom@0 {
+			compatible = "sandbox,w1-eeprom";
+		}
+};
diff --git a/doc/device-tree-bindings/w1/mxc-w1.txt b/doc/device-tree-bindings/w1/mxc-w1.txt
new file mode 100644
index 00000000000..1fb49cc111d
--- /dev/null
+++ b/doc/device-tree-bindings/w1/mxc-w1.txt
@@ -0,0 +1,37 @@
+NXP i.MX (MXC) One wire bus master controller
+=======================
+
+Child nodes are required in device tree. The driver will detect
+the devices serial number and then search in the child nodes in the device tree
+for the proper node and try to match it with the device.
+
+Also check doc/device-tree-bindings/w1-eeprom for possible child nodes drivers
+
+Driver:
+- drivers/w1/mxc_w1.c
+
+Required properties:
+- compatible : should be one of
+	"fsl,imx21-owire", "fsl,imx27-owire", "fsl,imx31-owire", "fsl,imx25-owire"
+	"fsl,imx25-owire", "fsl,imx35-owire", "fsl,imx50-owire", "fsl,imx53-owire"
+
+- reg : Address and length of the register set for the device
+
+Optional:
+* none
+
+Example:
+	onewire {
+		compatible = "fsl,imx53-owire";
+		reg = <0x63fa4000 0x4000>;
+	};
+
+Example with child:
+	onewire {
+		compatible = "fsl,imx53-owire";
+		reg = <0x63fa4000 0x4000>;
+
+		eeprom1: eeprom@0 {
+			compatible = "maxim,ds24xxx";
+		};
+	};
diff --git a/doc/device-tree-bindings/w1/w1-gpio.txt b/doc/device-tree-bindings/w1/w1-gpio.txt
new file mode 100644
index 00000000000..2ba86d7d91f
--- /dev/null
+++ b/doc/device-tree-bindings/w1/w1-gpio.txt
@@ -0,0 +1,39 @@
+W1 gpio device binding - one wire protocol over bitbanged gpio
+=======================
+
+
+Child nodes are required in device tree. The driver will detect
+the devices serial number and then search in the child nodes in the device tree
+for the proper node and try to match it with the device.
+
+Also check doc/device-tree-bindings/w1-eeprom for possible child nodes drivers
+
+Driver:
+- drivers/w1/w1-gpio.c
+
+Software w1 device-tree node properties:
+Required:
+* compatible = "w1-gpio";
+* gpios = <...>;
+	This is the gpio used for one wire protocol, using bitbanging
+
+Optional:
+* none
+
+Example:
+
+onewire_tm: onewire {
+		compatible = "w1-gpio";
+		gpios = <&pioA 32 0>;
+};
+
+Example with child:
+
+onewire_tm: onewire {
+		compatible = "w1-gpio";
+		gpios = <&pioA 32 0>;
+
+		eeprom1: eeprom@0 {
+			compatible = "maxim,ds24xxx";
+		}
+};
diff --git a/doc/device-tree-bindings/watchdog/common.txt b/doc/device-tree-bindings/watchdog/common.txt
new file mode 100644
index 00000000000..d041fea2347
--- /dev/null
+++ b/doc/device-tree-bindings/watchdog/common.txt
@@ -0,0 +1,13 @@
+Common watchdog properties.
+
+Optional properties:
+- timeout-sec : Timeout of the watchdog in seconds
+                If this timeout is not defined, the value of WATCHDOG_TIMEOUT_MSECS will
+                be used instead.
+- hw_margin_ms : Period used to reset the watchdog in ms
+                 If this period is not defined, the default value is 1000.
+- u-boot,noautostart :
+- u-boot,autostart : These (mutually exclusive) boolean properties can be used to control
+                     whether the watchdog is automatically started when probed. If neither
+                     are present, the behaviour is determined by the config option
+                     WATCHDOG_AUTOSTART.
diff --git a/doc/device-tree-bindings/watchdog/gpio-wdt.txt b/doc/device-tree-bindings/watchdog/gpio-wdt.txt
new file mode 100644
index 00000000000..746c2c081ea
--- /dev/null
+++ b/doc/device-tree-bindings/watchdog/gpio-wdt.txt
@@ -0,0 +1,25 @@
+GPIO watchdog timer
+
+Describes a simple watchdog timer which is reset by toggling a gpio.
+
+Required properties:
+
+- compatible: Must be "linux,wdt-gpio".
+- gpios: From common gpio binding; gpio connection to WDT reset pin.
+- hw_algo: The algorithm used by the driver. Should be one of the
+  following values:
+  - toggle: Toggle from high-to-low or low-to-high when resetting the watchdog.
+  - level: Maintain a constant high/low level, and trigger a short pulse when
+    resetting the watchdog. Active level is determined by the GPIO flags.
+- always-running: Boolean property indicating that the watchdog cannot
+  be disabled. At present, U-Boot only supports this kind of GPIO
+  watchdog.
+
+Example:
+
+	gpio-wdt {
+		gpios = <&gpio0 1 0>;
+		compatible = "linux,wdt-gpio";
+		hw_algo = "toggle";
+		always-running;
+	};
diff --git a/doc/dumpimage.1 b/doc/dumpimage.1
new file mode 100644
index 00000000000..52a45a3404e
--- /dev/null
+++ b/doc/dumpimage.1
@@ -0,0 +1,103 @@
+.\" SPDX-License-Identifier: GPL-2.0
+.\" Copyright (C) 2022 Sean Anderson <seanga2@gmail.com>
+.TH DUMPIMAGE 1 2022-06-11 U-Boot
+.SH NAME
+dumpimage \- extract data from U-Boot images
+.
+.SH SYNOPSIS
+.SY dumpimage
+.OP \-T type
+.BI \-l\~ image
+.YS
+.SY dumpimage
+.OP \-T type
+.OP \-p position
+.BI \-o\~ outfile
+.I image
+.YS
+.SY dumpimage
+.B \-h
+.YS
+.SY dumpimage
+.B \-V
+.YS
+.
+.SH DESCRIPTION
+.B dumpimage
+lists and extracts data from U-Boot images. If
+.B \-l
+is specified,
+.B dumpimage
+lists the components in
+.IR image .
+Otherwise,
+.B dumpimage
+extracts the component at
+.IR position " to " outfile .
+.
+.SH OPTIONS
+.TP
+.B \-h
+Print usage information and exit.
+.
+.TP
+.B \-l
+Print the header information for
+.IR image ,
+including a list of components.
+.
+.TP
+.BI \-o " outfile"
+The file to write the dumped component to.
+.TP
+.BI \-p " position"
+Specify the
+.I position
+of the component to dump. This should be a numeric index, starting at 0. If not
+specified, the default
+.I position
+is 0.
+.
+.TP
+.BI \-T " type"
+Specify the
+.I type
+of the image. If not specified, the image type will be automatically detected. A
+list of supported image types may be printed by running
+.BR "mkimage\~\-T\~list" .
+.
+.TP
+.B \-V
+Print version information and exit.
+.
+.SH BUGS
+Please report bugs to the
+.UR https://\:source\:.denx\:.de/\:u-boot/\:u-boot/\:issues
+U-Boot bug tracker
+.UE .
+.SH EXAMPLES
+Create a multi-file image and then extract part of that image
+.PP
+.EX
+.in +4
+$ \c
+.B mkimage \-A x86 \-O linux \-T multi \-n x86 \\\\\&
+.in +4
+.B \-d vmlinuz:initrd.img:System.map multi.img
+.in
+Image Name:   x86
+Created:      Thu Jul 25 10:29:13 2013
+Image Type:   Intel x86 Linux Multi-File Image (gzip compressed)
+Data Size:    13722956 Bytes = 13401.32 kB = 13.09 MB
+Load Address: 00000000
+Entry Point:  00000000
+Contents:
+   Image 0: 4040128 Bytes = 3945.44 kB = 3.85 MB
+   Image 1: 7991719 Bytes = 7804.41 kB = 7.62 MB
+   Image 2: 1691092 Bytes = 1651.46 kB = 1.61 MB
+$ \c
+.B dumpimage -p 2 -o System.map multi.img
+.EE
+.in
+.SH SEE ALSO
+.BR mkimage (1)
diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt
new file mode 100644
index 00000000000..546d2da17d9
--- /dev/null
+++ b/doc/feature-removal-schedule.txt
@@ -0,0 +1,31 @@
+The following is a list of files and features that are going to be
+removed from the U-Boot source tree.  Every entry should contain what
+exactly is going away, when it will be gone, why it is being removed,
+and who is going to be doing the work.	When the feature is removed
+from U-Boot, its corresponding entry should also be removed from this
+file.
+
+---------------------------
+
+What:	Users of the legacy miiphy_* code
+When:	undetermined
+
+Why:	We now have a PHY library, which allows everyone to share PHY
+	drivers. All new drivers should use this infrastructure, and
+	all old drivers should get converted to use it.
+
+Who:	Andy Fleming <afleming@gmail.com> and driver maintainers
+
+---------------------------
+
+What:	GPL cleanup
+When:	August 2009
+Why:	Over time, a couple of files have sneaked in into the U-Boot
+	source code that are either missing a valid GPL license
+	header or that carry a license that is incompatible with the
+	GPL.
+	Such files shall be removed from the U-Boot source tree.
+	See http://www.denx.de/wiki/pub/U-Boot/TaskGplCleanup/u-boot-1.1.2-files
+	for an old and probably incomplete list of such files.
+
+Who:	Wolfgang Denk <wd@denx.de> and board maintainers
diff --git a/doc/genindex.rst b/doc/genindex.rst
new file mode 100644
index 00000000000..2e452cb8f55
--- /dev/null
+++ b/doc/genindex.rst
@@ -0,0 +1,4 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Index
+=====
diff --git a/doc/git-mailrc b/doc/git-mailrc
new file mode 100644
index 00000000000..ca2f67a3b6e
--- /dev/null
+++ b/doc/git-mailrc
@@ -0,0 +1,133 @@
+# To use this file, run in your u-boot tree:
+#	git config sendemail.aliasesfile doc/git-mailrc
+#	git config sendemail.aliasfiletype mutt
+#
+# Then when sending patches, you can use:
+#	git send-email --to u-boot --cc i2c ...
+
+alias uboot  u-boot@lists.denx.de
+alias u-boot uboot
+
+# Maintainer aliases.  Use the same alias here as patchwork to keep
+# things simple and easy to look up/coordinate.
+alias abiessmann     Andreas Bießmann <andreas@biessmann.org>
+alias abrodkin       Alexey Brodkin <alexey.brodkin@synopsys.com>
+alias afleming       Andy Fleming <afleming@gmail.com>
+alias ag             Anatolij Gustschin <agust@denx.de>
+alias agraf          Alexander Graf <agraf@csgraf.de>
+alias alexnemirovsky Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
+alias alisonwang     Alison Wang <alison.wang@nxp.com>
+alias angelo_ts      Angelo Dureghello <angelo@sysam.it>
+alias apritzel       Andre Przywara <andre.przywara@arm.com>
+alias bmeng          Bin Meng <bmeng.cn@gmail.com>
+alias danielschwierzeck Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
+alias dinh           Dinh Nguyen <dinguyen@kernel.org>
+alias ehristev       Eugen Hristev <eugen.hristev@collabora.com>
+alias hs             Heiko Schocher <hs@denx.de>
+alias freenix        Peng Fan <peng.fan@nxp.com>
+alias iwamatsu       Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+alias jaehoon        Jaehoon Chung <jh80.chung@samsung.com>
+alias jagan          Jagan Teki <jagan@amarulasolutions.com>
+alias jhersh         Joe Hershberger <joe.hershberger@ni.com>
+alias kevery         Kever Yang <kever.yang@rock-chips.com>
+alias leyfoon        Ley Foon Tan <lftan.linux@gmail.com>
+alias lokeshvutla    Lokesh Vutla <lokeshvutla@ti.com>
+alias lukma          Lukasz Majewski <lukma@denx.de>
+alias macpaul        Macpaul Lin <macpaul@andestech.com>
+alias marex          Marek Vasut <marex@denx.de>
+alias mariosix       Mario Six <mario.six@gdsys.cc>
+alias masahiro       Masahiro Yamada <yamada.masahiro@socionext.com>
+alias mateusz        Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
+alias mbrugger       Matthias Brugger <mbrugger@suse.com>
+alias monstr         Michal Simek <monstr@monstr.eu>
+alias prom           Minkyu Kang <mk7.kang@samsung.com>
+alias ptomsich       Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+alias sbabic         Stefano Babic <sbabic@denx.de>
+alias simongoldschmidt Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
+alias sjg            Simon Glass <sjg@chromium.org>
+alias smcnutt        Scott McNutt <smcnutt@psyent.com>
+alias stroese        Stefan Roese <sr@denx.de>
+alias tienfong       Tien Fong Chee <tien.fong.chee@intel.com>
+alias trini          Tom Rini <trini@konsulko.com>
+alias wd             Wolfgang Denk <wd@denx.de>
+alias priyankajain   Priyanka Jain <priyanka.jain@nxp.com>
+
+# Architecture aliases
+alias arch           arc, arm, m68k, microblaze, mips, nios2, powerpc, sandbox, superh, x86
+alias arches         arch
+
+alias arc            uboot, abrodkin
+
+alias arm            uboot, trini
+alias at91           uboot, abiessmann
+alias cortina        uboot, alexnemirovsky
+alias davinci        ti
+alias imx            uboot, sbabic
+alias kirkwood       uboot, stroese
+alias omap           ti
+alias pxa            uboot, marex
+alias renesas        uboot, marex, iwamatsu
+alias rmobile        uboot, marex, iwamatsu
+alias s3c            samsung
+alias s5pc           samsung
+alias samsung        uboot, prom
+alias snapdragon     uboot, mateusz
+alias socfpga        uboot, marex, dinh, simongoldschmidt, tienfong
+alias sunxi          uboot, jagan, apritzel
+alias tegra          uboot, sjg, Tom Warren <twarren@nvidia.com>, Stephen Warren <swarren@nvidia.com>
+alias tegra2         tegra
+alias ti             uboot, trini
+alias uniphier       uboot, masahiro
+alias zynq           uboot, monstr
+alias rockchip       uboot, sjg, kevery, ptomsich
+
+alias bcm283x        uboot, mbrugger
+alias rpi            uboot, mbrugger
+
+alias m68k           uboot, alisonwang, angelo_ts
+alias coldfire       m68k
+
+alias microblaze     uboot, monstr
+alias mb             microblaze
+
+alias mips           uboot, danielschwierzeck
+
+alias nios           uboot, Thomas Chou <thomas@wytron.com.tw>, smcnutt
+alias nios2          nios
+
+alias powerpc        uboot, afleming, stroese, wd, priyankajain, mariosix
+alias ppc            powerpc
+alias mpc8xx         uboot, wd, Christophe Leroy <christophe.leroy@csgroup.eu>
+alias mpc83xx        uboot, mariosix
+alias mpc85xx        uboot, afleming, priyankajain
+
+alias sandbox        sjg
+alias sb             sandbox
+
+alias superh         uboot, iwamatsu, marex
+alias sh             superh
+
+alias x86            uboot, sjg, bmeng
+
+# Subsystem aliases
+alias dm             uboot, sjg
+alias cfi            uboot, stroese
+alias dfu            uboot, lukma
+alias eth            uboot, jhersh
+alias kerneldoc      uboot, marex
+alias fdt            uboot, sjg
+alias i2c            uboot, hs
+alias kconfig        uboot, masahiro
+alias mmc            uboot, freenix, jaehoon
+alias nand           uboot
+alias net            uboot, jhersh
+alias phy            uboot, jhersh
+alias spi            uboot, jagan
+alias spmi           uboot, mateusz
+alias ubi            uboot, hs
+alias usb            uboot, marex
+alias xhci           uboot, bmeng
+alias video          uboot, ag
+alias patman         uboot, sjg
+alias buildman       uboot, sjg
+alias pmic           uboot, jaehoon
diff --git a/doc/imx/ahab/csf_examples/csf_enc_boot_image.txt b/doc/imx/ahab/csf_examples/csf_enc_boot_image.txt
new file mode 100644
index 00000000000..6c70db657b1
--- /dev/null
+++ b/doc/imx/ahab/csf_examples/csf_enc_boot_image.txt
@@ -0,0 +1,27 @@
+[Header]
+Target = AHAB
+Version = 1.0
+
+[Install SRK]
+# SRK table generated by srktool
+File = "./release/crts/SRK_1_2_3_4_table.bin"
+# Public key certificate in PEM format
+Source = "./release/crts/SRK1_sha384_secp384r1_v3_usr_crt.pem"
+# Index of the public key certificate within the SRK table (0 .. 3)
+Source index = 0
+# Type of SRK set (NXP or OEM)
+Source set = OEM
+# bitmask of the revoked SRKs
+Revocations = 0x0
+
+[Authenticate Data]
+# Binary to be signed generated by mkimage
+File = "flash.bin"
+# Offsets = Container header  Signature block (printed out by mkimage)
+Offsets   = 0x400             0x590
+
+[Install Secret Key]
+Key = "dek.bin"
+Key Length = 128
+#Key Identifier = 0x1234CAFE
+Image Indexes = 0xFFFFFFFE
diff --git a/doc/imx/ahab/guides/mx8_mx8x_encrypted_boot.txt b/doc/imx/ahab/guides/mx8_mx8x_encrypted_boot.txt
new file mode 100644
index 00000000000..dfea4c8277c
--- /dev/null
+++ b/doc/imx/ahab/guides/mx8_mx8x_encrypted_boot.txt
@@ -0,0 +1,293 @@
+         +=========================================================+
+         +      i.MX 8, i.MX 8X Encrypted Boot guide using AHAB    +
+         +=========================================================+
+
+1. AHAB Encrypted Boot process
+-------------------------------
+
+This document describes a step-by-step procedure on how to encrypt and sign a
+bootloader image for i.MX8/8x family devices. It is assumed that the reader
+is familiar with basic AHAB concepts and has already closed the device,
+step-by-step procedure can be found in mx8_mx8x_secure_boot.txt and
+mx8_mx8x_spl_secure_boot.txt guides.
+
+The steps described in this document were based in i.MX8QM device, the same
+concept can be applied to others processors in i.MX8/8X family devices.
+
+1.1 Understanding the encrypted image signature block
+------------------------------------------------------
+
+As described in mx8_mx8x_secure_boot.txt guide a single binary is used to boot
+the device. The imx-mkimage tool combines all the input images in a container
+structure, generating a flash.bin binary.
+
+AHAB is able to decrypt image containers by calling SECO authentication
+functions, the image must be encrypted by CST and the resulting DEK (Data
+Encryption Key) must be encapsulated and included into the container signature
+block:
+
+                +----------------------------+
+                |                            |  ^
+                |                            |  |
+                |      Container header      |  |
+                |                            |  |
+                |                            |  |
+                +---+------------------------+  |
+                | S | Signature block header |  | Signed
+                | i +------------------------+  |
+                | g |                        |  |
+                | n |                        |  |
+                | a |        SRK table       |  |
+                | t |                        |  |
+                | u |                        |  v
+                | r +------------------------+
+                | e |       Signature        |
+                |   +------------------------+
+                | B |                        |
+                | l |        SGK Key         |
+                | o | Certificate (optional) |
+                | c |                        |
+                | k +------------------------+
+                |   |        DEK Blob        |
+                +---+------------------------+
+
+1.1.1 Understanding and generating the DEK blob
+------------------------------------------------
+
+The encrypted boot image requires a DEK blob on each time AHAB is used to
+decrypt an image. The DEK blob is used as a security layer to wrap and store
+the DEK off-chip using the OTPMK which is unique per device.
+
+On i.MX8/8x devices the DEK blob is generated using the SECO API, the following
+funtion is available in U-Boot and can be executed through dek_blob command:
+
+- sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr,
+		       sc_faddr_t export_addr, uint16_t max_size)
+
+Details in API usage can be found in SCFW API guide [1].
+
+1.2 Enabling the encrypted boot support in U-Boot
+--------------------------------------------------
+
+For deploying an encrypted boot image additional U-Boot tools are needed,
+please be sure to have the following features enabled, this can be achieved
+by following one of the methods below:
+
+- Defconfig:
+
+  CONFIG_AHAB_BOOT=y
+  CONFIG_CMD_DEKBLOB=y
+  CONFIG_IMX_SECO_DEK_ENCAP=y
+  CONFIG_FAT_WRITE=y
+
+- Kconfig:
+
+  ARM architecture -> Support i.MX8 AHAB features
+  ARM architecture -> Support the 'dek_blob' command
+  File systems -> Enable FAT filesystem support-> Enable FAT filesystem
+  write support
+
+1.3 Enabling the encrypted boot support in CST
+-----------------------------------------------
+
+The encryption feature is not enabled by default in Code Signing tools (CST).
+The CST backend must be recompiled, execute the following commands to enable
+encryption support in CST:
+
+  $ sudo apt-get install libssl-dev openssl
+  $ cd <CST install directory>/code/back_end/src
+  $ gcc -o cst_encrypted -I ../hdr -L ../../../linux64/lib *.c
+    -lfrontend -lcrypto
+  $ cp cst_encrypted ../../../linux64/bin/
+
+1.4 Preparing the image container
+----------------------------------
+
+The container generation is explained in and mx8_mx8x_secure_boot.txt and
+mx8_mx8x_spl_secure_boot.txt guides. This document is based in imx-mkimage
+flash target (2 containers in flash.bin).
+
+- Assembly flash.bin binary:
+
+  $ make SOC=<SoC Name> flash
+
+The mkimage log is used during the encrypted boot procedure to create the
+Command Sequence File (CSF):
+
+  CST: CONTAINER 0 offset: 0x400
+  CST: CONTAINER 0: Signature Block: offset is at 0x590
+  DONE.
+  Note: Please copy image to offset: IVT_OFFSET + IMAGE_OFFSET
+
+1.6 Creating the CSF description to encrypt the 2nd container
+--------------------------------------------------------------
+
+The csf_enc_boot_image.txt available under ahab/csf_examples/ can be used as
+example for encrypting the flash.bin binary, the main change is the Install
+Secret Key command that must be added after Authenticate Data command.
+
+  [Install Secret Key]
+  Key = "dek.bin"
+  Key Length = 128
+  #Key Identifier = 0x1234CAFE
+  Image Indexes = 0xFFFFFFFE
+
+By default all images are encrypted and image indexes parameter can be used
+to mask the images indexes that must be encrypted, on this example only the
+2nd container will be encrypted.
+
+Optionally users can provide a key identifier that must match the value
+provided during the blob generation, by default its value is zero.
+
+1.7 Encrypting the 2nd container
+---------------------------------
+
+The image is encrypted using the Code Signing Tool. The tool generates the
+encrypted image and a random dek.bin file.
+
+- Encrypt flash.bin binary:
+
+  $ ./cst_encrypted -i csf_enc_boot_image.txt -o enc_flash.bin
+   The DEK BLOB must be inserted at offset 0x7c0 (its expected size is 72 bytes)
+   CSF Processed successfully and signed image available in enc_boot_image.bin
+
+The output log will be used in a later step to insert the DEK blob into the
+signature block.
+
+1.8 Generating the DEK Blob
+----------------------------
+
+The DEK must be encapsulated into a CAAM blob so it can be included into the
+final encrypted binary. The U-Boot provides a tool called dek_blob which is
+calling the SECO blob encapsulation API.
+
+Copy the dek.bin in SDCard FAT partition and run the following commands from
+U-Boot prompt:
+
+  => mmc list
+     FSL_SDHC: 1 (SD)
+     FSL_SDHC: 2
+  => fatload mmc 1:1 0x80280000 dek.bin
+  => dek_blob 0x80280000 0x80280100 128
+  => fatwrite mmc 1:1 0x80280100 dek_blob.bin 0x48
+
+In host PC copy the generated dek_blob.bin to the CST directory.
+
+1.9 Assembling the encrypted image
+-----------------------------------
+
+The DEK blob generated in the step above have to be inserted into the container
+signature block.
+
+The CSF log is used to determine the DEK Blob offset:
+
+  The DEK BLOB must be inserted at offset 0x7c0 (its expected size is 72 bytes)
+  CSF Processed successfully and signed image available in enc_boot_image.bin
+
+- Insert DEK Blob into container signature block:
+
+  $ dd if=dek_blob.bin of=enc_flash.bin bs=1 seek=$((0x7c0)) conv=notrunc
+
+1.10 Flashing the encrypted boot image
+---------------------------------------
+
+The same offset is used for encrypted boot images, in case booting from
+eMMC/SDCard the offset is 32K.
+
+- Flash encrypted image in SDCard:
+
+  $ sudo dd if=enc_flash.bin of=/dev/sd<x> bs=1K seek=32 && sync
+
+2.0 Encrypting a standalone container
+--------------------------------------
+
+CST is also able to encrypt additional images containers, the steps documented
+in this section are based in OS container but can be also applied to SPL
+targets and 3rd containers.
+
+2.1 Creating the OS container
+------------------------------
+
+As explained in mx8_mx8x_secure_boot.txt guide the imx-mkimage tool is used to
+generate an image container for OS images, the mkimage log is used during the
+encrypted boot procedure to create the Command Sequence File (CSF).
+
+- Creating OS container:
+
+  $ make SOC=<SoC Name> flash_kernel
+   ...
+   CST: CONTAINER 0 offset: 0x0
+   CST: CONTAINER 0: Signature Block: offset is at 0x110
+
+2.2 Creating the CSF description file for standalone container
+---------------------------------------------------------------
+
+The Image Indexes parameter is used to mask the images that are encrypted by
+CST, as a single container is used for OS images the Image Indexes command can
+be commented or set to 0xFFFFFFFF.
+
+  [Install Secret Key]
+  Key = "dek_os.bin"
+  Key Length = 128
+  #Key Identifier = 0x1234CAFE
+  Image Indexes = 0xFFFFFFFF
+
+2.3 Encrypting the standalone container
+----------------------------------------
+
+As explained in section 1.7 the CST generates the encrypted image and a random
+dek.bin file.
+
+- Encrypt the standalone container:
+
+  $ ./cst_encrypted -i csf_linux_img.txt -o enc_flash_os.bin
+   The DEK BLOB must be inserted at offset 0x340 (its expected size is 72 bytes)
+   CSF Processed successfully and signed image available in enc_flash_os.bin
+
+The output log will be used in a later step to insert the DEK blob into the
+signature block.
+
+2.4 Generating the DEK Blob for standalone container
+----------------------------------------------------
+
+Similar to section 1.8 the DEK must be encapsulated into a CAAM blob so it can
+be included into the final encrypted binary.
+
+Copy the dek_os.bin in SDCard FAT partition and run the following commands from
+U-Boot prompt:
+
+  => mmc list
+     FSL_SDHC: 1 (SD)
+     FSL_SDHC: 2
+  => fatload mmc 1:1 0x80280000 dek_os.bin
+  => dek_blob 0x80280000 0x80280100 128
+  => fatwrite mmc 1:1 0x80280100 dek_blob_os.bin 0x48
+
+In host PC copy the generated dek_blob_os.bin to the CST directory.
+
+2.5 Assembling the encrypted image
+-----------------------------------
+
+The DEK blob generated in the step above have to be inserted into the container
+signature block.
+
+The CSF log is used to determine the DEK Blob offset:
+
+   The DEK BLOB must be inserted at offset 0x340 (its expected size is 72 bytes)
+   CSF Processed successfully and signed image available in enc_flash_os.bin
+
+- Insert DEK Blob into container signature block:
+
+  $ dd if=dek_blob_os.bin of=enc_flash_os.bin bs=1 seek=$((0x340)) conv=notrunc
+
+2.6 Copy encrypted image to SDCard
+-----------------------------------
+
+The encrypted container can be copied to SDCard FAT partition, please note
+that U-Boot requires signed and encrypted containers to be named as
+os_cntr_signed.bin.
+
+  $ sudo cp enc_flash_os.bin /media/UserID/Boot\ imx8/os_cntr_signed.bin
+
+References:
+[1] SCFW API guide: "System Controller Firmware API Reference Guide - Rev 1.5"
diff --git a/doc/imx/clk/ccf.txt b/doc/imx/clk/ccf.txt
new file mode 100644
index 00000000000..f47ca8832de
--- /dev/null
+++ b/doc/imx/clk/ccf.txt
@@ -0,0 +1,102 @@
+Introduction:
+=============
+
+This documentation entry describes the Common Clock Framework [CCF] port from
+Linux kernel (v5.1.12) to U-Boot.
+
+This code is supposed to bring CCF to IMX based devices (imx6q, imx7 imx8).
+Moreover, it also provides some common clock code, which would allow easy
+porting of CCF Linux code to other platforms.
+
+Design decisions:
+=================
+
+* U-Boot's driver model [DM] for clk differs from Linux CCF. The most notably
+  difference is the lack of support for hierarchical clocks and "clock as a
+  manager driver" (single clock DTS node acts as a starting point for all other
+  clocks).
+
+* The clk_get_rate() caches the previously read data if CLK_GET_RATE_NOCACHE is
+  not set (no need for recursive access).
+
+* On purpose the "manager" clk driver (clk-imx6q.c) is not using large table to
+  store pointers to clocks - e.g. clk[IMX6QDL_CLK_USDHC2_SEL] = .... Instead we
+  use udevice's linked list for the same class (UCLASS_CLK).
+
+  Rationale:
+  ----------
+    When porting the code as is from Linux, one would need ~1KiB of RAM to store
+    it. This is way too much if we do plan to use this driver in SPL.
+
+* The "central" structure of this patch series is struct udevice and its
+  uclass_priv field contains the struct clk pointer (to the originally created
+  one).
+
+* To keep things simple the struct udevice's uclass_priv pointer is used to
+  store back pointer to corresponding struct clk. However, it is possible to
+  modify clk-uclass.c file and add there struct uc_clk_priv, which would have
+  clock related members (like pointer to clk). As of this writing there is no
+  such need, so to avoid extra allocations (as it can be auto allocated by
+  setting .per_device_auto = sizeof(struct uc_clk_priv)) the
+  uclass_priv stores the pointer to struct clk.
+
+* Non-CCF clocks do not have a pointer to a clock in clk->dev->priv. In the case
+  of composite clocks, clk->dev->priv may not match clk. Drivers should always
+  use the struct clk which is passed to them, and not clk->dev->priv.
+
+* It is advised to add common clock code (like already added rate and flags) to
+  the struct clk, which is a top level description of the clock.
+
+* U-Boot's driver model already provides the facility to automatically allocate
+  (via private_alloc_size) device private data (accessible via dev->priv). It
+  may look appealing to use this feature to allocate private structures for CCF
+  clk devices e.g. divider (struct clk_divider *divider) for IMX6Q clock.
+
+  The above feature had not been used for following reasons:
+  - The original CCF Linux kernel driver is the "manager" for clocks - it
+    decides when clock is instantiated (and when memory for it is allocated).
+
+  - Using it would change the original structure of the CCF code.
+
+  - To bind (via clk_register()) the clock device with U-Boot driver model we
+    first need udevice for it (the "chicken and egg problem").
+
+* I've added the clk_get_parent(), which reads parent's dev->uclass_priv to
+  provide parent's struct clk pointer. This seems the easiest way to get
+  child/parent relationship for struct clk in U-Boot's udevice based clocks.  In
+  the future arbitrary parents may be supported by adding a get_parent function
+  to clk_ops.
+
+* Linux's CCF 'struct clk_core' corresponds to U-Boot's udevice in 'struct clk'.
+  Clock IP block agnostic flags from 'struct clk_core' (e.g. NOCACHE) have been
+  moved from this struct one level up to 'struct clk'. Many flags are
+  unimplemented at the moment.
+
+* For tests the new ./test/dm/clk_ccf.c and ./drivers/clk/clk_sandbox_ccf.c
+  files have been introduced. The latter setups the CCF clock structure for
+  sandbox by reusing, if possible, generic clock primitives - like divier and
+  mux. The former file provides code to tests this setup.
+
+  For sandbox new CONFIG_SANDBOX_CLK_CCF Kconfig define has been introduced.
+  All new primitives added for new architectures must have corresponding test in
+  the two aforementioned files.
+
+Testing (sandbox):
+==================
+
+make mrproper; make sandbox_defconfig; make -j4
+./u-boot -i -d arch/sandbox/dts/test.dtb
+=> ut dm clk
+
+or in a more "scriptable" way (with -v to print debug output):
+./u-boot --fdt arch/sandbox/dts/test.dtb --command "ut dm clk_ccf" -v
+
+To do:
+------
+
+* Use of OF_PLATDATA in the SPL setup for CCF - as it is now - the SPL grows
+  considerably and using CCF in boards with tiny resources (OCRAM) is
+  problematic.
+
+* On demand port other parts of CCF to U-Boot - as now only features _really_
+  needed by DM/DTS converted drivers are used.
diff --git a/doc/imx/common/imx27.txt b/doc/imx/common/imx27.txt
new file mode 100644
index 00000000000..6f92cb47cec
--- /dev/null
+++ b/doc/imx/common/imx27.txt
@@ -0,0 +1,10 @@
+U-Boot for Freescale i.MX27
+
+This file contains information for the port of U-Boot to the Freescale i.MX27
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in the words 4 to 9 of fuse bank 0, using the
+    reversed MAC byte order (i.e. LSB first).
diff --git a/doc/imx/common/imx5.txt b/doc/imx/common/imx5.txt
new file mode 100644
index 00000000000..6c8c2e594fb
--- /dev/null
+++ b/doc/imx/common/imx5.txt
@@ -0,0 +1,40 @@
+U-Boot for Freescale i.MX5x
+
+This file contains information for the port of U-Boot to the Freescale
+i.MX5x SoCs.
+
+1. CONFIGURATION OPTIONS/SETTINGS
+---------------------------------
+
+1.1 CONFIG_MX51_PLL_ERRATA: Workaround for i.MX51 PLL errata.
+    This option should be enabled by all boards using the i.MX51 silicon
+    version up until (including) 3.0 running at 800MHz.
+    The PLL's in the i.MX51 processor can go out of lock due to a metastable
+    condition in an analog flip-flop when used at high frequencies.
+    This workaround implements an undocumented feature in the PLL (dither
+    mode), which causes the effect of this failure to be much lower (in terms
+    of frequency deviation), avoiding system failure, or at least decreasing
+    the likelihood of system failure.
+
+1.2 CFG_SYS_MAIN_PWR_ON: Trigger MAIN_PWR_ON upon startup.
+    This option should be enabled for boards having a SYS_ON_OFF_CTL signal
+    connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
+    reference designs.
+
+2. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+2.1 MAC Address: It is stored in the words 9 to 14 of fuse bank 1, using the
+    natural MAC byte order (i.e. MSB first).
+
+    This is an example how to program an example MAC address 01:23:45:67:89:ab
+    into the eFuses. Assure that the programming voltage is available and then
+    execute:
+
+    => fuse prog -y 1 9 01 23 45 67 89 ab
+
+    After programming a MAC address, consider locking the MAC fuses. This is
+    done by programming the MAC_ADDR_LOCK fuse, which is bit 4 of word 0 in
+    bank 1:
+
+    => fuse prog -y 1 0 10
diff --git a/doc/imx/common/imx6.txt b/doc/imx/common/imx6.txt
new file mode 100644
index 00000000000..c5554d8d6b3
--- /dev/null
+++ b/doc/imx/common/imx6.txt
@@ -0,0 +1,195 @@
+U-Boot for Freescale i.MX6
+
+This file contains information for the port of U-Boot to the Freescale i.MX6
+SoC.
+
+1. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+1.1 MAC Address: It is stored in fuse bank 4, with the 32 lsbs in word 2 and the
+    16 msbs in word 3[15:0].
+    For i.MX6SX and i.MX6UL, they have two MAC addresses. The second MAC address
+    is stored in fuse bank 4, with the 16 lsb in word 3[31:16] and the 32 msbs in
+    word 4.
+
+Example:
+
+For reading the MAC address fuses on a MX6Q:
+
+- The MAC address is stored in two fuse addresses (the fuse addresses are
+described in the Fusemap Descriptions table from the mx6q Reference Manual):
+
+0x620[31:0] - MAC_ADDR[31:0]
+0x630[15:0] - MAC_ADDR[47:32]
+
+In order to use the fuse API, we need to pass the bank and word values, which
+are calculated as below:
+
+Fuse address for the lower MAC address: 0x620
+Base address for the fuses: 0x400
+
+(0x620 - 0x400)/0x10 = 0x22 = 34 decimal
+
+As the fuses are arranged in banks of 8 words:
+
+34 / 8 = 4 and the remainder is 2, so in this case:
+
+bank = 4
+word = 2
+
+And the U-Boot command would be:
+
+=> fuse read 4 2
+Reading bank 4:
+
+Word 0x00000002: 9f027772
+
+Doing the same for the upper MAC address:
+
+Fuse address for the upper MAC address: 0x630
+Base address for the fuses: 0x400
+
+(0x630 - 0x400)/0x10 = 0x23 = 35 decimal
+
+As the fuses are arranged in banks of 8 words:
+
+35 / 8 = 4 and the remainder is 3, so in this case:
+
+bank = 4
+word = 3
+
+And the U-Boot command would be:
+
+=> fuse read 4 3
+Reading bank 4:
+
+Word 0x00000003: 00000004
+
+,which matches the ethaddr value:
+=> echo ${ethaddr}
+00:04:9f:02:77:72
+
+Some other useful hints:
+
+- The 'bank' and 'word' numbers can be easily obtained from the mx6 Reference
+Manual. For the mx6quad case, please check the "46.5 OCOTP Memory Map/Register
+Definition" from the "i.MX 6Dual/6Quad Applications Processor Reference Manual,
+Rev. 1, 04/2013" document. For example, for the MAC fuses we have:
+
+Address:
+21B_C620	Value of OTP Bank4 Word2 (MAC Address)(OCOTP_MAC0)
+
+21B_C630	Value of OTP Bank4 Word3 (MAC Address)(OCOTP_MAC1)
+
+- The command '=> fuse read 4 2 2' reads the whole MAC addresses at once:
+
+=> fuse read 4 2 2
+Reading bank 4:
+
+Word 0x00000002: 9f027772 00000004
+
+NAND Boot on i.MX6 with SPL support
+--------------------------------------
+
+Writing/updating boot image in nand device is not straight forward in
+i.MX6 platform and it requires boot control block(BCB) to be configured.
+
+BCB contains two data structures, Firmware Configuration Block(FCB) and
+Discovered Bad Block Table(DBBT). FCB has nand timings, DBBT search area,
+and firmware. See IMX6DQRM Section 8.5.2.2
+for more information.
+
+We can't use 'nand write' command to write SPL/firmware image directly
+like other platforms does. So we need special setup to write BCB block
+as per IMX6QDL reference manual 'nandbcb update' command do that job.
+
+for nand boot, up on reset bootrom look for FCB structure in
+first block's if FCB found the nand timings are loaded for
+further reads. once FCB read done, DTTB will be loaded and
+finally firmware will be loaded which is boot image.
+
+cmd_nandbcb will create FCB these structures
+by taking mtd partition as an example.
+- initial code will erase entire partition
+- followed by FCB setup, like first 2 blocks for FCB/DBBT write,
+  and next block for FW1/SPL
+- write firmware at FW1 block and
+- finally write fcb/dttb in first 2 block.
+
+Typical NAND BCB layout:
+=======================
+
+   no.of blocks = partition size / erasesize
+   no.of fcb/dbbt blocks = 2
+   FW1 offset = no.of fcb/dbbt
+
+block  0          1          2
+        -------------------------------
+       |FCB/DBBT 0|FCB/DBBT 1|  FW 1  |
+       --------------------------------
+
+On summary, nandbcb update will
+- erase the entire partition
+- create BCB by creating 2 FCB/BDDT block followed by
+  1 FW blocks based on partition size and erasesize.
+- fill FCB/DBBT structures
+- write FW/SPL in FW1
+- write FCB/DBBT in first 2 blocks
+
+step-1: write SPL
+
+icorem6qdl> ext4load mmc 0:1 $loadaddr SPL
+39936 bytes read in 10 ms (3.8 MiB/s)
+
+icorem6qdl> nandbcb update $loadaddr spl $filesize
+device 0 offset 0x0, size 0x9c00
+Erasing at 0x1c0000 -- 100% complete.
+NAND fw write: 0x80000 offset, 0xb000 bytes written: OK
+
+step-2: write u-boot-dtb.img
+
+icorem6qdl> nand erase.part uboot
+
+NAND erase.part: device 0 offset 0x200000, size 0x200000
+Erasing at 0x3c0000 -- 100% complete.
+OK
+
+icorem6qdl> ext4load mmc 0:1 $loadaddr u-boot-dtb.img
+589094 bytes read in 37 ms (15.2 MiB/s)
+
+icorem6qdl> nand write ${loadaddr} uboot ${filesize}
+
+NAND write: device 0 offset 0x200000, size 0x8fd26
+ 589094 bytes written: OK
+icorem6qdl>
+
+SPL Stack size and location notes
+---------------------------------
+
+If we have CONFIG_MX6_OCRAM_256KB then see Figure 8.4.1 in IMX6DQ Reference
+manuals:
+  - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF
+  - BOOT ROM stack is at 0x0093FFB8
+  - if icache/dcache is enabled (eFuse/strapping controlled) then the
+    IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to
+    fit between 0x00907000 and 0x00938000.
+  - Additionally the BOOT ROM loads what they consider the firmware image
+    which consists of a 4K header in front of us that contains the IVT, DCD
+    and some padding thus 'our' max size is really 0x00908000 - 0x00938000
+    or 192KB
+  - Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the
+    SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
+    boot media (given that boot media specific offset is configured properly).
+and if we don't, see Figure 8-3 in IMX6SDL Reference manuals:
+  - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF
+  - BOOT ROM stack is at 0x0091FFB8
+  - if icache/dcache is enabled (eFuse/strapping controlled) then the
+    IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to
+    fit between 0x00907000 and 0x00918000.
+  - Additionally the BOOT ROM loads what they consider the firmware image
+    which consists of a 4K header in front of us that contains the IVT, DCD
+    and some padding thus 'our' max size is really 0x00908000 - 0x00918000
+    or 64KB
+  - Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the
+    SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
+    boot media (given that boot media specific offset is configured properly).
diff --git a/doc/imx/common/imx7.txt b/doc/imx/common/imx7.txt
new file mode 100644
index 00000000000..b9db10341ad
--- /dev/null
+++ b/doc/imx/common/imx7.txt
@@ -0,0 +1,23 @@
+U-Boot for Freescale i.MX7
+
+SPL Stack size and location notes
+---------------------------------
+See figure 6-22 in i.MX 7Dual/Solo Reference manuals:
+  - IMX7D/S OCRAM free area RAM (OCRAM) is from 0x00910000 to
+    0x00946C00.
+  - Set the stack at the end of the free area section, at 0x00946BB8.
+  - The BOOT ROM loads what they consider the firmware image
+    which consists of a 4K header in front of us that contains the IVT, DCD
+    and some padding. However, the manual also states that the ROM uses the
+    OCRAM_EPCD and OCRAM_PXP areas for itself. While the SPL is free to use
+    this range for stack and malloc, the SPL itself must fit below 0x920000,
+    or the image will be truncated in at least some boot modes like USB SDP.
+    Thus our max size is really 0x00920000 - 0x00912000. If necessary,
+    CONFIG_SPL_TEXT_BASE could be moved to 0x00911000 to gain 4KB of space
+    for the SPL, but 56KB should be more than enough for the SPL.
+  - Pad SPL to 68KB (4KB header + 56KB max size + 8KB extra padding)
+    The extra padding could be removed, but this value was used historically
+    based on an incorrect CONFIG_SPL_MAX_SIZE definition.
+    This allows to write the SPL/U-Boot combination generated with
+    u-boot-with-spl.imx directly to a boot media (given that boot media specific
+    offset is configured properly).
diff --git a/doc/imx/common/mxs.txt b/doc/imx/common/mxs.txt
new file mode 100644
index 00000000000..372062c0eaf
--- /dev/null
+++ b/doc/imx/common/mxs.txt
@@ -0,0 +1,290 @@
+Booting U-Boot on a MXS processor
+=================================
+
+This document describes the MXS U-Boot port. This document mostly covers topics
+related to making the module/board bootable.
+
+Terminology
+-----------
+
+The term "MXS" refers to a family of Freescale SoCs that is composed by MX23
+and MX28.
+
+The dollar symbol ($) introduces a snipped of shell code. This shall be typed
+into the unix command prompt in U-Boot source code root directory.
+
+The (=>) introduces a snipped of code that should by typed into U-Boot command
+prompt
+
+Contents
+--------
+
+1) Prerequisites
+2) Compiling U-Boot for a MXS based board
+3) Installation of U-Boot for a MXS based board to SD card
+4) Installation of U-Boot into NAND flash on a MX28 based board
+5) Installation of U-Boot into SPI NOR flash on a MX28 based board
+
+1) Prerequisites
+----------------
+
+To make a MXS based board bootable, some tools are necessary. The only
+mandatory tool is the "mxsboot" tool found in U-Boot source tree. The
+tool is built automatically when compiling U-Boot for i.MX23 or i.MX28.
+
+The production of BootStream image is handled via "mkimage", which is
+also part of the U-Boot source tree. The "mkimage" requires OpenSSL
+development libraries to be installed. In case of Debian and derivates,
+this is installed by running:
+
+	$ sudo apt-get install libssl-dev
+
+NOTE: The "elftosb" tool distributed by Freescale Semiconductor is no
+      longer necessary for general use of U-Boot on i.MX23 and i.MX28.
+      The mkimage supports generation of BootStream images encrypted
+      with a zero key, which is the vast majority of use-cases. In
+      case you do need to produce image encrypted with non-zero key
+      or other special features, please use the "elftosb" tool,
+      otherwise continue to section 2). The installation procedure of
+      the "elftosb" is outlined below:
+
+Firstly, obtain the elftosb archive from the following location:
+
+	ftp://ftp.denx.de/pub/tools/elftosb-10.12.01.tar.gz
+
+We use a $VER variable here to denote the current version. At the time of
+writing of this document, that is "10.12.01". To obtain the file from command
+line, use:
+
+	$ VER="10.12.01"
+	$ wget http://repository.timesys.com/buildsources/e/elftosb/elftosb-10.12.01/elftosb-${VER}.tar.gz
+
+Extract the file:
+
+	$ tar xzf elftosb-${VER}.tar.gz
+
+Compile the file. We need to manually tell the linker to use also libm:
+
+	$ cd elftosb-${VER}/
+	$ make LIBS="-lstdc++ -lm" elftosb
+
+Optionally, remove debugging symbols from elftosb:
+
+	$ strip bld/linux/elftosb
+
+Finally, install the "elftosb" binary. The "install" target is missing, so just
+copy the binary by hand:
+
+	$ sudo cp bld/linux/elftosb /usr/local/bin/
+
+Make sure the "elftosb" binary can be found in your $PATH, in this case this
+means "/usr/local/bin/" has to be in your $PATH.
+
+2) Compiling U-Boot for a MXS based board
+-------------------------------------------
+
+Compiling the U-Boot for a MXS board is straightforward and done as compiling
+U-Boot for any other ARM device. For cross-compiler setup, please refer to
+ELDK5.0 documentation. First, clean up the source code:
+
+	$ make mrproper
+
+Next, configure U-Boot for a MXS based board
+
+	$ make <mxs_based_board_name>_config
+
+Examples:
+
+1. For building U-Boot for Aries M28EVK board:
+
+	$ make m28evk_config
+
+2. For building U-Boot for Freescale MX28EVK board:
+
+	$ make mx28evk_config
+
+3. For building U-Boot for Freescale MX23EVK board:
+
+	$ make mx23evk_config
+
+4. For building U-Boot for Olimex MX23 Olinuxino board:
+
+	$ make mx23_olinuxino_config
+
+Lastly, compile U-Boot and prepare a "BootStream". The "BootStream" is a special
+type of file, which MXS CPUs can boot. This is handled by the following
+command:
+
+	$ make u-boot.sb
+
+HINT: To speed-up the build process, you can add -j<N>, where N is number of
+      compiler instances that'll run in parallel.
+
+The code produces "u-boot.sb" file. This file needs to be augmented with a
+proper header to allow successful boot from SD or NAND. Adding the header is
+discussed in the following chapters.
+
+NOTE: The process that produces u-boot.sb uses the mkimage to generate the
+      BootStream. The BootStream is encrypted with zero key. In case you need
+      some special features of the BootStream and plan on using the "elftosb"
+      tool instead, the invocation to produce a compatible BootStream with the
+      one produced by mkimage is outlined below. For further details, refer to
+      the documentation bundled with the "elftosb" package.
+
+	$ elftosb -zf imx23 -c arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd \
+		-o u-boot.sb
+	$ elftosb -zf imx28 -c arch/arm/cpu/arm926ejs/mxs/u-boot-imx28.bd \
+		-o u-boot.sb
+
+3) Installation of U-Boot for a MXS based board to SD card
+----------------------------------------------------------
+
+To boot a MXS based board from SD, set the boot mode DIP switches according to
+to MX28 manual, section 12.2.1 (Table 12-2) or MX23 manual, section 35.1.2
+(Table 35-3).
+
+The SD card used to boot U-Boot must contain a DOS partition table, which in
+turn carries a partition of special type and which contains a special header.
+The rest of partitions in the DOS partition table can be used by the user.
+
+To prepare such partition, use your favourite partitioning tool. The partition
+must have the following parameters:
+
+	* Start sector .......... sector 2048
+	* Partition size ........ at least 1024 kb
+	* Partition type ........ 0x53 (sometimes "OnTrack DM6 Aux3")
+
+For example in Linux fdisk, the sequence for a clear card follows. Be sure to
+run fdisk with the option "-u=sectors" to set units to sectors:
+
+	* o ..................... create a clear partition table
+	* n ..................... create new partition
+		* p ............. primary partition
+		* 1 ............. first partition
+		* 2048 .......... first sector is 2048
+		* +1M ........... make the partition 1Mb big
+	* t 1 ................... change first partition ID
+		* 53 ............ change the ID to 0x53 (OnTrack DM6 Aux3)
+	* <create other partitions>
+	* w ..................... write partition table to disk
+
+The partition layout is ready, next the special partition must be filled with
+proper contents. The contents is generated by running the following command
+(see chapter 2)):
+
+	$ ./tools/mxsboot sd u-boot.sb u-boot.sd
+
+The resulting file, "u-boot.sd", shall then be written to the partition. In this
+case, we assume the first partition of the SD card is /dev/mmcblk0p1:
+
+	$ dd if=u-boot.sd of=/dev/mmcblk0p1
+
+Last step is to insert the card into the MXS based board and boot.
+
+NOTE: If the user needs to adjust the start sector, the "mxsboot" tool contains
+      a "-p" switch for that purpose. The "-p" switch takes the sector number as
+      an argument.
+
+4) Installation of U-Boot into NAND flash on a MX28 based board
+---------------------------------------------------------------
+
+To boot a MX28 based board from NAND, set the boot mode DIP switches according
+to MX28 manual section 12.2.1 (Table 12-2), PORT=GPMI, NAND 1.8 V.
+
+There are two possibilities when preparing an image writable to NAND flash.
+
+	I) The NAND wasn't written at all yet or the BCB is broken
+	----------------------------------------------------------
+	   In this case, both BCB (FCB and DBBT) and firmware needs to be
+	   written to NAND. To generate NAND image containing all these,
+	   there is a tool called "mxsboot" in the "tools/" directory. The tool
+	   is invoked on "u-boot.sb" file from chapter 2):
+
+		 $ ./tools/mxsboot nand u-boot.sb u-boot.nand
+
+	   NOTE: The above invokation works for NAND flash with geometry of
+		 2048b per page, 64b OOB data, 128kb erase size. If your chip
+		 has a different geometry, please use:
+
+		 -w <size>	change page size (default 2048 b)
+		 -o <size>	change oob size (default 64 b)
+		 -e <size>	change erase size (default 131072 b)
+
+		 The geometry information can be obtained from running U-Boot
+		 on the MX28 board by issuing the "nand info" command.
+
+	   The resulting file, "u-boot.nand" can be written directly to NAND
+	   from the U-Boot prompt. To simplify the process, the U-Boot default
+	   environment contains script "update_nand_full" to update the system.
+
+	   This script expects a working TFTP server containing the file
+	   "u-boot.nand" in it's root directory. This can be changed by
+	   adjusting the "update_nand_full_filename" variable.
+
+	   To update the system, run the following in U-Boot prompt:
+
+		 => run update_nand_full
+
+	   In case you would only need to update the bootloader in future,
+	   see II) below.
+
+	II) The NAND was already written with a good BCB
+	------------------------------------------------
+	   This part applies after the part I) above was done at least once.
+
+	   If part I) above was done correctly already, there is no need to
+	   write the FCB and DBBT parts of NAND again. It's possible to upgrade
+	   only the bootloader image.
+
+	   To simplify the process of firmware update, the U-Boot default
+	   environment contains script "update_nand_firmware" to update only
+	   the firmware, without rewriting FCB and DBBT.
+
+	   This script expects a working TFTP server containing the file
+	   "u-boot.sb" in it's root directory. This can be changed by
+	   adjusting the "update_nand_firmware_filename" variable.
+
+	   To update the system, run the following in U-Boot prompt:
+
+		 => run update_nand_firmware
+
+	III) Special settings for the update scripts
+	--------------------------------------------
+	   There is a slight possibility of the user wanting to adjust the
+	   STRIDE and COUNT options of the NAND boot. For description of these,
+	   see MX28 manual section 12.12.1.2 and 12.12.1.3.
+
+	   The update scripts take this possibility into account. In case the
+	   user changes STRIDE by blowing fuses, the user also has to change
+	   "update_nand_stride" variable. In case the user changes COUNT by
+	   blowing fuses, the user also has to change "update_nand_count"
+	   variable for the update scripts to work correctly.
+
+	   In case the user needs to boot a firmware image bigger than 1Mb, the
+	   user has to adjust the "update_nand_firmware_maxsz" variable for the
+	   update scripts to work properly.
+
+5) Installation of U-Boot into SPI NOR flash on a MX28 based board
+------------------------------------------------------------------
+
+The u-boot.sb file can be directly written to SPI NOR from U-Boot prompt.
+
+Load u-boot.sb into RAM, this can be done in several ways and one way is to use
+tftp:
+       => tftp u-boot.sb 0x42000000
+
+Probe the SPI NOR flash:
+       => sf probe
+
+(SPI NOR should be succesfully detected in this step)
+
+Erase the blocks where U-Boot binary will be written to:
+       => sf erase 0x0 0x80000
+
+Write u-boot.sb to SPI NOR:
+       => sf write 0x42000000 0 0x80000
+
+Power off the board and set the boot mode DIP switches to boot from the SPI NOR
+according to MX28 manual section 12.2.1 (Table 12-2)
+
+Last step is to power up the board and U-Boot should start from SPI NOR.
diff --git a/doc/imx/habv4/csf_examples/additional_images/csf_additional_images.txt b/doc/imx/habv4/csf_examples/additional_images/csf_additional_images.txt
new file mode 100644
index 00000000000..bbe489714bc
--- /dev/null
+++ b/doc/imx/habv4/csf_examples/additional_images/csf_additional_images.txt
@@ -0,0 +1,34 @@
+[Header]
+    Version = 4.2
+    Hash Algorithm = sha256
+    Engine Configuration = 0
+    Certificate Format = X509
+    Signature Format = CMS
+    Engine = CAAM
+
+[Install SRK]
+    # Index of the key location in the SRK table to be installed
+    File = "../crts/SRK_1_2_3_4_table.bin"
+    Source index = 0
+
+[Install CSFK]
+    # Key used to authenticate the CSF data
+    File = "../crts/CSF1_1_sha256_2048_65537_v3_usr_crt.pem"
+
+[Authenticate CSF]
+
+[Install Key]
+    # Key slot index used to authenticate the key to be installed
+    Verification index = 0
+    # Target key slot in HAB key store where key will be installed
+    Target Index = 2
+    # Key to install
+    File= "../crts/IMG1_1_sha256_2048_65537_v3_usr_crt.pem"
+
+[Authenticate Data]
+    # Key slot index used to authenticate the image data
+    Verification index = 2
+    # Authenticate Start Address, Offset, Length and file
+    Blocks = 0x80800000 0x00000000 0x80EEA020 "zImage", \
+	     0x83800000 0x00000000 0x8380B927 "imx7d-sdb.dtb", \
+	     0x84000000 0x00000000 0x840425B8 "uTee-7dsdb"
diff --git a/doc/imx/habv4/csf_examples/mx6_mx7/csf_uboot.txt b/doc/imx/habv4/csf_examples/mx6_mx7/csf_uboot.txt
new file mode 100644
index 00000000000..39986243e4b
--- /dev/null
+++ b/doc/imx/habv4/csf_examples/mx6_mx7/csf_uboot.txt
@@ -0,0 +1,32 @@
+[Header]
+    Version = 4.2
+    Hash Algorithm = sha256
+    Engine Configuration = 0
+    Certificate Format = X509
+    Signature Format = CMS
+    Engine = CAAM
+
+[Install SRK]
+    # Index of the key location in the SRK table to be installed
+    File = "../crts/SRK_1_2_3_4_table.bin"
+    Source index = 0
+
+[Install CSFK]
+    # Key used to authenticate the CSF data
+    File = "../crts/CSF1_1_sha256_2048_65537_v3_usr_crt.pem"
+
+[Authenticate CSF]
+
+[Install Key]
+    # Key slot index used to authenticate the key to be installed
+    Verification index = 0
+    # Target key slot in HAB key store where key will be installed
+    Target Index = 2
+    # Key to install
+    File= "../crts/IMG1_1_sha256_2048_65537_v3_usr_crt.pem"
+
+[Authenticate Data]
+    # Key slot index used to authenticate the image data
+    Verification index = 2
+    # Authenticate Start Address, Offset, Length and file
+    Blocks =  0x877ff400 0x00000000 0x0009ec00 "u-boot-dtb.imx"
diff --git a/doc/imx/habv4/csf_examples/mx6_mx7/csf_uboot_fast_authentication.txt b/doc/imx/habv4/csf_examples/mx6_mx7/csf_uboot_fast_authentication.txt
new file mode 100644
index 00000000000..cdb34bcf741
--- /dev/null
+++ b/doc/imx/habv4/csf_examples/mx6_mx7/csf_uboot_fast_authentication.txt
@@ -0,0 +1,23 @@
+[Header]
+    Version = 4.2
+    Hash Algorithm = sha256
+    Engine Configuration = 0
+    Certificate Format = X509
+    Signature Format = CMS
+    Engine = CAAM
+
+[Install SRK]
+    # Index of the key location in the SRK table to be installed
+    File = "../crts/SRK_1_2_3_4_table.bin"
+    Source index = 0
+
+[Install NOCAK]
+    File = "../crts/SRK1_sha256_2048_65537_v3_usr_crt.pem"
+
+[Authenticate CSF]
+
+[Authenticate Data]
+    # Key slot index 0 used to authenticate the image data
+    Verification index = 0
+    # Authenticate Start Address, Offset, Length and file
+    Blocks =  0x877ff400 0x00000000 0x0009ec00 "u-boot-dtb.imx"
diff --git a/doc/imx/habv4/guides/encrypted_boot.txt b/doc/imx/habv4/guides/encrypted_boot.txt
new file mode 100644
index 00000000000..e2b435749e3
--- /dev/null
+++ b/doc/imx/habv4/guides/encrypted_boot.txt
@@ -0,0 +1,43 @@
+1. Setup U-Boot Image for Encrypted Boot
+----------------------------------------
+An authenticated U-Boot image is used as starting point for
+Encrypted Boot. The image is encrypted by i.MX Code Signing
+Tool (CST). The CST replaces only the image data of
+u-boot-dtb.imx with the encrypted data. The Initial Vector Table,
+DCD, and Boot data, remains in plaintext.
+
+The image data is encrypted with a Encryption Key (DEK).
+Therefore, this key is needed to decrypt the data during the
+booting process. The DEK is protected by wrapping it in a Blob,
+which needs to be appended to the U-Boot image and specified in
+the CSF file.
+
+The DEK blob is generated by an authenticated U-Boot image with
+the dek_blob cmd enabled. The image used for DEK blob generation
+needs to have the following configurations enabled in Kconfig:
+
+CONFIG_IMX_HAB=y
+CONFIG_CMD_DEKBLOB=y
+
+Note: The encrypted boot feature is only supported by HABv4 or
+greater.
+
+The dek_blob command then can be used to generate the DEK blob of
+a DEK previously loaded in memory. The command is used as follows:
+
+dek_blob <DEK address> <Output Address> <Key Size in Bits>
+example: dek_blob 0x10800000 0x10801000 192
+
+The resulting DEK blob then is used to construct the encrypted
+U-Boot image. Note that the blob needs to be transferred back
+to the host.Then the following commands are used to construct
+the final image.
+
+cat u-boot-dtb.imx csf-u-boot.bin > u-boot-signed.imx
+objcopy -I binary -O binary --pad-to <blob_dst> --gap-fill=0x00 \
+    u-boot-signed.imx u-boot-signed-pad.bin
+cat u-boot-signed-pad.imx DEK_blob.bin > u-boot-encrypted.imx
+
+    NOTE: u-boot-signed.bin needs to be padded to the value
+    equivalent to the address in which the DEK blob is specified
+    in the CSF.
diff --git a/doc/imx/habv4/guides/mx6_mx7_secure_boot.txt b/doc/imx/habv4/guides/mx6_mx7_secure_boot.txt
new file mode 100644
index 00000000000..7fba84a3947
--- /dev/null
+++ b/doc/imx/habv4/guides/mx6_mx7_secure_boot.txt
@@ -0,0 +1,427 @@
+         +=======================================================+
+         +   i.MX6, i.MX7 U-Boot Secure Boot guide using HABv4   +
+         +=======================================================+
+
+1. HABv4 secure boot process
+-----------------------------
+
+This document describes a step-by-step procedure on how to sign and securely
+boot an U-Boot image for non-SPL targets. It is assumed that the reader is
+familiar with basic HAB concepts and with the PKI tree generation.
+
+Details about HAB can be found in the application note AN4581[1] and in the
+introduction_habv4.txt document.
+
+1.1 Building a u-boot-dtb.imx image supporting secure boot
+-----------------------------------------------------------
+
+The U-Boot provides support to secure boot configuration and also provide
+access to the HAB APIs exposed by the ROM vector table, the support is
+enabled by selecting the CONFIG_IMX_HAB option.
+
+When built with this configuration, the U-Boot provides extra functions for
+HAB, such as the HAB status logs retrievement through the hab_status command
+and support for extending the root of trust.
+
+The U-Boot also correctly pads the final image by aligning to the next 0xC00
+address, so the CSF signature data generated by CST can be concatenated to
+image.
+
+The diagram below illustrate a signed u-boot-dtb.imx image layout:
+
+            ------- +-----------------------------+ <-- *start
+                ^   |      Image Vector Table     |
+                |   +-----------------------------+ <-- *boot_data
+                |   |          Boot Data          |
+                |   +-----------------------------+ <-- *dcd
+                |   |          DCD Table          |
+                |   +-----------------------------+
+         Signed |   |           Padding           |
+          Data  |   +-----------------------------+ <-- *entry
+                |   |                             |
+                |   |                             |
+                |   |       u-boot-dtb.bin        |
+                |   |                             |
+                |   |                             |
+                |   +-----------------------------+
+                v   |           Padding           |
+            ------- +-----------------------------+ <-- *csf
+                    |                             |
+                    | Command Sequence File (CSF) |
+                    |                             |
+                    +-----------------------------+
+                    |      Padding (optional)     |
+                    +-----------------------------+
+
+1.2 Enabling the secure boot support
+-------------------------------------
+
+The first step is to generate an U-Boot image supporting the HAB features
+mentioned above, this can be achieved by adding CONFIG_IMX_HAB to the
+build configuration:
+
+- Defconfig:
+
+  CONFIG_IMX_HAB=y
+
+- Kconfig:
+
+  ARM architecture -> Support i.MX HAB features
+
+1.3 Creating the CSF description file
+--------------------------------------
+
+The CSF contains all the commands that the HAB executes during the secure
+boot. These commands instruct the HAB on which memory areas of the image
+to authenticate, which keys to install, use and etc.
+
+CSF examples are available under doc/imx/habv4/csf_examples/ directory.
+
+A build log containing the "Authenticate Data" parameters is available after
+the U-Boot build, the example below is a log for mx7dsabresd_defconfig target:
+
+- mkimage build log:
+
+  $ cat u-boot-dtb.imx.log
+
+  Image Type:   Freescale IMX Boot Image
+  Image Ver:    2 (i.MX53/6/7 compatible)
+  Mode:         DCD
+  Data Size:    667648 Bytes = 652.00 KiB = 0.64 MiB
+  Load Address: 877ff420
+  Entry Point:  87800000
+  HAB Blocks:   0x877ff400 0x00000000 0x0009ec00
+                ^^^^^^^^^^ ^^^^^^^^^^ ^^^^^^^^^^
+                |          |          |
+                |          |          ------- (1)
+                |          |
+                |          ------------------ (2)
+                |
+                ----------------------------- (3)
+
+  (1)   Size of area in file u-boot-dtb.imx to sign.
+        This area should include the IVT, the Boot Data the DCD
+        and the U-Boot itself.
+  (2)   Start of area in u-boot-dtb.imx to sign.
+  (3)   Start of area in RAM to authenticate.
+
+- In "Authenticate Data" CSF command users can copy and past the output
+  addresses:
+
+  Block = 0x877ff400 0x00000000 0x0009ec00 "u-boot-dtb.imx"
+
+1.4 Signing the U-Boot binary
+------------------------------
+
+The CST tool is used for signing the U-Boot binary and generating a CSF binary,
+users should input the CSF description file created in the step above and
+should receive a CSF binary, which contains the CSF commands, SRK table,
+signatures and certificates.
+
+- Create CSF binary file:
+
+  $ ./cst -i csf_uboot.txt -o csf_uboot.bin
+
+- Append CSF signature to the end of U-Boot image:
+
+  $ cat u-boot-dtb.imx csf_uboot.bin > u-boot-signed.imx
+
+The u-boot-signed.imx is the signed binary and should be flashed into the boot
+media.
+
+- Flash signed U-Boot binary:
+
+  $ sudo dd if=u-boot-signed.imx of=/dev/sd<x> bs=1K seek=1 && sync
+
+1.5 Programming SRK Hash
+-------------------------
+
+As explained in AN4581[1] and in introduction_habv4.txt document the SRK Hash
+fuse values are generated by the srktool and should be programmed in the
+SoC SRK_HASH[255:0] fuses.
+
+Be careful when programming these values, as this data is the basis for the
+root of trust. An error in SRK Hash results in a part that does not boot.
+
+The U-Boot fuse tool can be used for programming eFuses on i.MX SoCs.
+
+- Dump SRK Hash fuses values in host machine:
+
+  $ hexdump -e '/4 "0x"' -e '/4 "%X""\n"' SRK_1_2_3_4_fuse.bin
+  0x20593752
+  0x6ACE6962
+  0x26E0D06C
+  0xFC600661
+  0x1240E88F
+  0x1209F144
+  0x831C8117
+  0x1190FD4D
+
+- Program SRK_HASH[255:0] fuses, using i.MX6 series as example:
+
+  => fuse prog 3 0 0x20593752
+  => fuse prog 3 1 0x6ACE6962
+  => fuse prog 3 2 0x26E0D06C
+  => fuse prog 3 3 0xFC600661
+  => fuse prog 3 4 0x1240E88F
+  => fuse prog 3 5 0x1209F144
+  => fuse prog 3 6 0x831C8117
+  => fuse prog 3 7 0x1190FD4D
+
+The table below lists the SRK_HASH bank and word according to the i.MX device:
+
+    +-------------------+---------------+---------------+---------------+
+    |                   |  i.MX6 Series |    i.MX7D/S   |    i.MX7ULP   |
+    +-------------------+---------------+---------------+---------------+
+    | SRK_HASH[31:00]   | bank 3 word 0 | bank 6 word 0 | bank 5 word 0 |
+    +-------------------+---------------+---------------+---------------+
+    | SRK_HASH[63:32]   | bank 3 word 1 | bank 6 word 1 | bank 5 word 1 |
+    +-------------------+---------------+---------------+---------------+
+    | SRK_HASH[95:64]   | bank 3 word 2 | bank 6 word 2 | bank 5 word 2 |
+    +-------------------+---------------+---------------+---------------+
+    | SRK_HASH[127:96]  | bank 3 word 3 | bank 6 word 3 | bank 5 word 3 |
+    +-------------------+---------------+---------------+---------------+
+    | SRK_HASH[159:128] | bank 3 word 4 | bank 7 word 0 | bank 5 word 4 |
+    +-------------------+---------------+---------------+---------------+
+    | SRK_HASH[191:160] | bank 3 word 5 | bank 7 word 1 | bank 5 word 5 |
+    +-------------------+---------------+---------------+---------------+
+    | SRK_HASH[223:192] | bank 3 word 6 | bank 7 word 2 | bank 5 word 6 |
+    +-------------------+---------------+---------------+---------------+
+    | SRK_HASH[255:224] | bank 3 word 7 | bank 7 word 3 | bank 5 word 7 |
+    +-------------------+---------------+---------------+---------------+
+
+1.6 Verifying HAB events
+-------------------------
+
+The next step is to verify that the signature attached to U-Boot is
+successfully processed without errors. HAB generates events when processing
+the commands if it encounters issues.
+
+The hab_status U-Boot command call the hab_report_event() and hab_status()
+HAB API functions to verify the processor security configuration and status.
+This command displays any events that were generated during the process.
+
+Prior to closing the device users should ensure no HAB events were found, as
+the example below:
+
+- Verify HAB events:
+
+  => hab_status
+
+  Secure boot disabled
+
+  HAB Configuration: 0xf0, HAB State: 0x66
+  No HAB Events Found!
+
+1.6.1 Verifying HAB events in i.MX7ULP
+---------------------------------------
+
+When booting i.MX7ULP in low power or dual boot modes the M4 binary is
+authenticated by an independent HAB in M4 ROM code using a
+different SRK key set.
+
+The U-Boot provides a M4 option in hab_status command so users can retrieve
+M4 HAB failure and warning events.
+
+- Verify HAB M4 events:
+
+  => hab_status m4
+
+  Secure boot disabled
+
+  HAB Configuration: 0xf0, HAB State: 0x66
+  No HAB Events Found!
+
+As HAB M4 API cannot be called from A7 core the command is parsing the M4 HAB
+persistent memory region, M4 software should not modify this reserved region.
+
+Details about HAB persistent memory region can be found in AN12263[2].
+
+1.7 Closing the device
+-----------------------
+
+After the device successfully boots a signed image without generating any HAB
+events, it is safe to close the device. This is the last step in the HAB
+process, and is achieved by programming the SEC_CONFIG[1] fuse bit.
+
+Once the fuse is programmed, the chip does not load an image that has not been
+signed using the correct PKI tree.
+
+- Program SEC_CONFIG[1] fuse, using i.MX6 series as example:
+
+  => fuse prog 0 6 0x00000002
+
+The table below list the SEC_CONFIG[1] bank and word according to the i.MX
+device:
+
+             +--------------+-----------------+------------+
+             |    Device    |  Bank and Word  |    Value   |
+             +--------------+-----------------+------------+
+             | i.MX6 Series |  bank 0 word 6  | 0x00000002 |
+             +--------------+-----------------+------------+
+             | i.MX7D/S     |  bank 1 word 3  | 0x02000000 |
+             +--------------+-----------------+------------+
+             | i.MX7ULP     |  bank 29 word 6 | 0x80000000 |
+             +--------------+-----------------+------------+
+
+1.8 Completely secure the device
+---------------------------------
+
+Additional fuses can be programmed for completely secure the device, more
+details about these fuses and their possible impact can be found at AN4581[1].
+
+- Program SRK_LOCK, using i.MX6 series as example:
+
+  => fuse prog 0 0 0x4000
+
+- Program DIR_BT_DIS, using i.MX6 series as example:
+
+  => fuse prog 0 6 0x8
+
+- Program SJC_DISABLE, using i.MX6 series as example:
+
+  => fuse prog 0 6 0x100000
+
+- JTAG_SMODE, using i.MX6 series as example:
+
+  => fuse prog 0 6 0xC00000
+
+The table below list the SRK_LOCK, DIR_BT_DIS, SJC_DISABLE, and JTAG_SMODE bank
+and word according to the i.MX device:
+
+              +--------------+---------------+------------+
+              |    Device    | Bank and Word |   Value    |
+              +--------------+---------------+------------+
+              |                  SRK_LOCK                 |
+              +-------------------------------------------+
+              | i.MX6 Series | bank 0 word 0 | 0x00004000 |
+              +--------------+---------------+------------+
+              | i.MX7D/S     | bank 0 word 0 | 0x00000200 |
+              +--------------+---------------+------------+
+              | i.MX7ULP     | bank 1 word 1 | 0x00000080 |
+              +--------------+---------------+------------+
+              |                 DIR_BT_DIS                |
+              +-------------------------------------------+
+              | i.MX6 Series | bank 0 word 6 | 0x00000008 |
+              +--------------+---------------+------------+
+              | i.MX7D/S     | bank 1 word 3 | 0x08000000 |
+              +--------------+---------------+------------+
+              | i.MX7ULP     | bank 1 word 1 | 0x00002000 |
+              +--------------+---------------+------------+
+              |                 SJC_DISABLE               |
+              +-------------------------------------------+
+              | i.MX6 Series | bank 0 word 6 | 0x00100000 |
+              +--------------+---------------+------------+
+              | i.MX7D/S     | bank 1 word 3 | 0x00200000 |
+              +--------------+---------------+------------+
+              | i.MX7ULP     | bank 1 word 1 | 0x00000020 |
+              +--------------+---------------+------------+
+              |                 JTAG_SMODE                |
+              +-------------------------------------------+
+              | i.MX6 Series | bank 0 word 6 | 0x00C00000 |
+              +--------------+---------------+------------+
+              | i.MX7D/S     | bank 1 word 3 | 0x00C00000 |
+              +--------------+---------------+------------+
+              | i.MX7ULP     | bank 1 word 1 | 0x000000C0 |
+              +--------------+---------------+------------+
+
+2. Extending the root of trust
+-------------------------------
+
+The High Assurance Boot (HAB) code located in the on-chip ROM provides an
+Application Programming Interface (API) making it possible to call back
+into the HAB code for authenticating additional boot images.
+
+The U-Boot supports this feature and can be used to authenticate the Linux
+Kernel Image.
+
+The process of signing an additional image is similar to the U-Boot.
+The diagram below illustrate the zImage layout:
+
+            ------- +-----------------------------+ <-- *load_address
+                ^   |                             |
+                |   |                             |
+                |   |                             |
+                |   |                             |
+                |   |           zImage            |
+         Signed |   |                             |
+          Data  |   |                             |
+                |   |                             |
+                |   +-----------------------------+
+                |   |    Padding Next Boundary    |
+                |   +-----------------------------+ <-- *ivt
+                v   |     Image Vector Table      |
+            ------- +-----------------------------+ <-- *csf
+                    |                             |
+                    | Command Sequence File (CSF) |
+                    |                             |
+                    +-----------------------------+
+                    |     Padding (optional)      |
+                    +-----------------------------+
+
+2.1 Padding the image
+----------------------
+
+The zImage must be padded to the next boundary address (0x1000), for instance
+if the image size is 0x649920 it must be padded to 0x64A000.
+
+The tool objcopy can be used for padding the image.
+
+- Pad the zImage:
+
+  $ objcopy -I binary -O binary --pad-to 0x64A000 --gap-fill=0x00 \
+	zImage zImage_pad.bin
+
+2.2 Generating Image Vector Table
+----------------------------------
+
+The HAB code requires an Image Vector Table (IVT) for determining the image
+length and the CSF location. Since zImage does not include an IVT this has
+to be manually created and appended to the end of the padded zImage, the
+script genIVT.pl in script_examples directory can be used as reference.
+
+- Generate IVT:
+
+  $ genIVT.pl
+
+Note: The load Address may change depending on the device.
+
+- Append the ivt.bin at the end of the padded zImage:
+
+  $ cat zImage_pad.bin ivt.bin > zImage_pad_ivt.bin
+
+2.3 Signing the image
+----------------------
+
+A CSF file has to be created to sign the image. HAB does not allow to change
+the SRK once the first image is authenticated, so the same SRK key used in
+U-Boot must be used when extending the root of trust.
+
+CSF examples are available in ../csf_examples/additional_images/
+directory.
+
+- Create CSF binary file:
+
+  $ ./cst --i csf_additional_images.txt --o csf_zImage.bin
+
+- Attach the CSF binary to the end of the image:
+
+  $ cat zImage_pad_ivt.bin csf_zImage.bin > zImage_signed.bin
+
+2.4 Verifying HAB events
+-------------------------
+
+The U-Boot includes the hab_auth_img command which can be used for
+authenticating and troubleshooting the signed image, zImage must be
+loaded at the load address specified in the IVT.
+
+- Authenticate additional image:
+
+  => hab_auth_img <Load Address> <Image Size> <IVT Offset>
+
+If no HAB events were found the zImage is successfully signed.
+
+References:
+[1] AN4581: "Secure Boot on i.MX 50, i.MX 53, i.MX 6 and i.MX 7 Series using
+ HABv4" - Rev 2.
+[2] AN12263: "HABv4 RVT Guidelines and Recommendations" - Rev 0.
diff --git a/doc/imx/habv4/guides/mx6_mx7_spl_secure_boot.txt b/doc/imx/habv4/guides/mx6_mx7_spl_secure_boot.txt
new file mode 100644
index 00000000000..56b8cd62cb6
--- /dev/null
+++ b/doc/imx/habv4/guides/mx6_mx7_spl_secure_boot.txt
@@ -0,0 +1,181 @@
+      +===============================================================+
+      +  i.MX6, i.MX7 U-Boot HABv4 Secure Boot guide for SPL targets  +
+      +===============================================================+
+
+1. HABv4 secure boot process
+-----------------------------
+
+This document is an addendum of mx6_mx7_secure_boot.txt guide describing a
+step-by-step procedure on how to sign and securely boot an U-Boot image for
+SPL targets.
+
+Details about HAB can be found in the application note AN4581[1] and in the
+introduction_habv4.txt document.
+
+1.1 Building a SPL target supporting secure boot
+-------------------------------------------------
+
+The U-Boot provides Second Program Loader (SPL) support which generates two
+final images, SPL and U-Boot proper. The HABv4 can be used to authenticate
+both binaries.
+
+Out of reset the ROM code authenticates the SPL which is responsible for
+initializing essential features such as DDR, UART, PMIC and clock
+enablement. Once the DDR is available, the SPL code loads the U-Boot proper
+image to its specific execution address and call the HAB APIs to extend the
+root of trust.
+
+The U-Boot provides support to secure boot configuration and also provide
+access to the HAB APIs exposed by the ROM vector table, the support is
+enabled by selecting the CONFIG_IMX_HAB option.
+
+When built with this configuration the U-Boot correctly pads the final SPL
+image by aligning to the next 0xC00 address, so the CSF signature data
+generated by CST can be concatenated to the image.
+
+The U-Boot also append an Image Vector Table (IVT) in the final U-Boot proper
+binary (u-boot-ivt.img) so it can be used by HAB API in a post ROM stage.
+
+The diagram below illustrate a signed SPL image layout:
+
+            ------- +-----------------------------+ <-- *start
+                ^   |      Image Vector Table     |
+                |   +-----------------------------+ <-- *boot_data
+                |   |          Boot Data          |
+                |   +-----------------------------+
+         Signed |   |           Padding           |
+          Data  |   +-----------------------------+ <-- *entry
+                |   |                             |
+                |   |            SPL              |
+                |   |                             |
+                |   +-----------------------------+
+                v   |           Padding           |
+            ------- +-----------------------------+ <-- *csf
+                    |                             |
+                    | Command Sequence File (CSF) |
+                    |                             |
+                    +-----------------------------+
+                    |      Padding (optional)     |
+                    +-----------------------------+
+
+The diagram below illustrate a signed u-boot-ivt.img image layout:
+
+            ------- +-----------------------------+ <-- *load_address
+                ^   |                             |
+                |   |                             |
+                |   |         u-boot.img          |
+         Signed |   |                             |
+          Data  |   |                             |
+                |   +-----------------------------+
+                |   |    Padding Next Boundary    |
+                |   +-----------------------------+ <-- *ivt
+                v   |     Image Vector Table      |
+            ------- +-----------------------------+ <-- *csf
+                    |                             |
+                    | Command Sequence File (CSF) |
+                    |                             |
+                    +-----------------------------+
+                    |     Padding (optional)      |
+                    +-----------------------------+
+
+1.2 Enabling the secure boot support
+-------------------------------------
+
+The first step is to generate an U-Boot image supporting the HAB features
+mentioned above, this can be achieved by adding CONFIG_IMX_HAB to the
+build configuration:
+
+- Defconfig:
+
+  CONFIG_IMX_HAB=y
+
+- Kconfig:
+
+  ARM architecture -> Support i.MX HAB features
+
+1.3 Creating the CSF description file
+--------------------------------------
+
+The CSF contains all the commands that the HAB executes during the secure
+boot. These commands instruct the HAB code on which memory areas of the image
+to authenticate, which keys to install, use and etc.
+
+CSF examples are available under doc/imx/habv4/csf_examples/ directory.
+
+Build logs containing the "Authenticate Data" parameters are available after
+the U-Boot build, the example below is a log for mx6sabresd_defconfig target:
+
+- SPL build log:
+
+  $ cat SPL.log
+  Image Type:   Freescale IMX Boot Image
+  Image Ver:    2 (i.MX53/6/7 compatible)
+  Mode:         DCD
+  Data Size:    69632 Bytes = 68.00 KiB = 0.07 MiB
+  Load Address: 00907420
+  Entry Point:  00908000
+  HAB Blocks:   0x00907400 0x00000000 0x0000ec00
+
+- u-boot-ivt.img build log:
+
+  $ cat u-boot-ivt.img.log
+  Image Name:   U-Boot 2019.01-00003-g78ee492eb3
+  Created:      Mon Jan 14 17:58:10 2019
+  Image Type:   ARM U-Boot Firmware with HABv4 IVT (uncompressed)
+  Data Size:    458688 Bytes = 447.94 KiB = 0.44 MiB
+  Load Address: 17800000
+  Entry Point:  00000000
+  HAB Blocks:   0x177fffc0   0x0000   0x0006e020
+
+As explained in section above the SPL is first authenticated by the ROM code
+and the root of trust is extended to the U-Boot image, hence two CSF files are
+necessary to completely sign a bootloader image.
+
+In "Authenticate Data" CSF command users can copy and past the output
+addresses, the csf_uboot.txt can be used as example:
+
+- In csf_SPL.txt:
+
+  Block = 0x00907400 0x00000000 0x0000ec00 "SPL"
+
+- In csf_uboot-ivt.txt:
+
+  Block = 0x177fffc0 0x0000 0x0006e020 "u-boot-ivt.img"
+
+1.4 Signing the images
+-----------------------
+
+The CST tool is used for signing the U-Boot binary and generating a CSF binary,
+users should input the CSF description file created in the step above and
+receive a CSF binary, which contains the CSF commands, SRK table, signatures
+and certificates.
+
+- Create SPL CSF binary file:
+
+  $ ./cst -i csf_SPL.txt -o csf_SPL.bin
+
+- Append CSF signature to the end of SPL image:
+
+  $ cat SPL csf_SPL.bin > SPL-signed
+
+- Create U-Boot proper CSF binary file:
+
+  $ ./cst -i csf_uboot-ivt.txt -o csf_uboot-ivt.bin
+
+- Append CSF signature to the end of U-Boot proper image:
+
+  $ cat u-boot-ivt.img csf_uboot-ivt.bin > u-boot-signed.img
+
+The bootloader is signed and can be flashed into the boot media.
+
+1.5 Closing the device
+-----------------------
+
+The procedure for closing the device is similar as in Non-SPL targets, for a
+complete procedure please refer to section "1.5 Programming SRK Hash" in
+mx6_mx7_secure_boot.txt document available under doc/imx/habv4/guides/
+directory.
+
+References:
+[1] AN4581: "Secure Boot on i.MX 50, i.MX 53, i.MX 6 and i.MX 7 Series using
+ HABv4" - Rev 2.
diff --git a/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
new file mode 100644
index 00000000000..1bea091344d
--- /dev/null
+++ b/doc/imx/habv4/guides/mx8m_spl_secure_boot.txt
@@ -0,0 +1,202 @@
+      +=========================================================+
+      +  i.MX8M U-Boot HABv4 Secure Boot guide for SPL targets  +
+      +=========================================================+
+
+1. HABv4 secure boot process
+-----------------------------
+
+This document is an addendum of mx6_mx7_spl_secure_boot.txt guide describing
+a step-by-step procedure on how to sign and securely boot an U-Boot image for
+SPL targets on i.MX8M, i.MX8M Mini, i.MX8M Nano, i.MX8M Plus.
+
+Details about HAB can be found in the application note AN4581[1] and in the
+introduction_habv4.txt document.
+
+1.1 Building a SPL target supporting secure boot
+-------------------------------------------------
+
+The U-Boot build for i.MX8M SoC makes use of Second Program Loader (SPL)
+support, fitImage support and custom i.MX8M specific flash.bin container.
+This leads to a generation of multiple intermediate build artifacts, the
+U-Boot SPL, U-Boot binary, DT blob. These later two artifacts are bundled
+with external ATF BL31 blob to form a fitImage. The fitImage is bundled
+with SPL and external DDR and optional HDMI PHY initialization blobs to
+form the final flash.bin container. The HABv4 can be used to authenticate
+all of the input binaries separately.
+
+Out of reset the ROM code authenticates the SPL and PHY initialization
+blobs, combination of which is responsible for initializing essential
+features such as DDR, UART, PMIC and clock enablement. Once the DDR is
+available, the SPL code loads the secondary fitImage to its specific
+address and call the HAB APIs to extend the root of trust on its
+components.
+
+The U-Boot SPL provides support to secure boot configuration and also
+provide access to the HAB APIs exposed by the ROM vector table, the
+U-Boot provides access to HAB APIs via SMC calls to ATF. The support
+is enabled by selecting the CONFIG_IMX_HAB option.
+
+When built with this configuration the U-Boot correctly pads combined
+SPL and PHY initialization blob image, called u-boot-spl-ddr.bin, by
+aligning to the next 0xC00 address, so the CSF signature data generated
+by CST can be concatenated to the image.
+
+The U-Boot also reserves space in the fitImage binary (u-boot.itb) between
+the fitImage tree and external blobs included in it, so it can be used to
+inject IVT and CST signatures used by SPL HAB calls to authenticate the
+fitImage components.
+
+The diagram below illustrate a signed SPL combined with DDR PHY
+initialization firmware blobs part of flash.bin container layout.
+This part is loaded to memory address ( CONFIG_SPL_TEXT_BASE - 0x40 ) and
+authenticated the BootROM. The reason for the offset is so that the *entry
+would be at memory address CONFIG_SPL_TEXT_BASE when BootROM executes the
+code within it:
+
+            ------- +-----------------------------+ <-- *start
+                ^   |      Image Vector Table     |
+                |   |         (0x20 bytes)        |
+                |   +-----------------------------+ <-- *boot_data
+                |   |          Boot Data          |
+                |   +-----------------------------+
+                |   |           Padding           |
+         Signed |   |  to 0x40 bytes from *start  |
+          Data  |   +-----------------------------+ <-- *entry
+                |   |                             |
+                |   |  SPL combined with DDR PHY  |
+                |   |    initialization blobs     |
+                |   |    (u-boot-spl-ddr.bin)     |
+                |   |                             |
+                |   +-----------------------------+
+                v   |           Padding           |
+            ------- +-----------------------------+ <-- *csf
+                    |                             |
+                    | Command Sequence File (CSF) |
+                    |                             |
+                    +-----------------------------+
+                    |      Padding (optional)     |
+                    +-----------------------------+
+
+The diagram below illustrate a signed U-Boot binary, DT blob and external
+ATF BL31 blob combined to form fitImage part of flash.bin container layout.
+The *load_address is CONFIG_SPL_LOAD_FIT_ADDRESS, the fitImage is loaded
+including all of its embedded data, authenticated using IVT+CSF concatenated
+at the end of the fitImage at offset aligned to 4 kiB. The fitImage with
+external data is not supported.
+
+            ------- +-----------------------------+ <-- *load_address
+                ^   |                             |
+                |   |        fitImage tree        |
+                |   |      with embedded data     |
+                |   |        (cca. 1 MiB)         |
+         Signed |   |                             |
+  .-----  Tree  |   +-----------------------------+
+  |       Data  |   | Padding to next 4k aligned  |
+  |             |   |     from *load_address      |
+  |             |   +-----------------------------+ <-- *ivt
+  |             |   |     Image Vector Table      |
+  |             v   |         (0x20 bytes)        |
+  |         ------- +-----------------------------+ <-- *csf
+  |                 | Command Sequence File (CSF) |
+  |                 |  for all signed entries in  |
+  '---------------->| the fitImage, tree and data |
+                    |        (cca 6-7 kiB)        |
+                    +-----------------------------+
+
+The diagram below illustrate a combined flash.bin container layout:
+
+                    +-----------------------------+
+                    |       Signed SPL part       |
+                    +-----------------------------+
+                    |     Signed fitImage part    |
+                    +-----------------------------+
+
+1.2 Enabling the secure boot support
+-------------------------------------
+
+The first step is to generate an U-Boot image supporting the HAB features
+mentioned above, this can be achieved by adding CONFIG_IMX_HAB to the
+build configuration:
+
+- Defconfig:
+
+  CONFIG_IMX_HAB=y
+  CONFIG_FSL_CAAM=y
+  CONFIG_ARCH_MISC_INIT=y
+  CONFIG_SPL_CRYPTO=y
+
+- Kconfig:
+
+  ARM architecture -> Support i.MX HAB features
+
+1.3 Signing the images
+-----------------------
+
+The CSF contains all the commands that the HAB executes during the secure
+boot. These commands instruct the HAB code on which memory areas of the image
+to authenticate, which keys to install, use and etc. The CSF is generated
+using the CST Code Signing Tool based on input configuration file. This tool
+input configuration file is generated using binman, and the tool is invoked
+from binman as well.
+
+The SPL and fitImage sections of the generated image are signed separately.
+The signing is activated by wrapping SPL and fitImage sections into nxp-imx8mcst
+etype, which is done automatically in arch/arm/dts/imx8m{m,n,p,q}-u-boot.dtsi
+in case CONFIG_IMX_HAB Kconfig symbol is enabled.
+
+Per default the HAB keys and certificates need to be located in the build
+directory, this means creating a symbolic link or copying the following files
+from the HAB keys directory flat (e.g. removing the `keys` and `cert`
+subdirectory) into the u-boot build directory for the CST Code Signing Tool to
+locate them:
+
+- `crts/SRK_1_2_3_4_table.bin`
+- `crts/CSF1_1_sha256_4096_65537_v3_usr_crt.pem`
+- `keys/CSF1_1_sha256_4096_65537_v3_usr_key.pem`
+- `crts/IMG1_1_sha256_4096_65537_v3_usr_crt.pem`
+- `keys/IMG1_1_sha256_4096_65537_v3_usr_key.pem`
+- `keys/key_pass.txt`
+
+The paths to the SRK table and the certificates can be modified via changes to
+the nxp_imx8mcst device tree node(s), however the other files are required by
+the CST tools as well, and will be searched for in relation to them.
+
+Build of flash.bin target then produces a signed flash.bin automatically.
+
+The nxp-imx8mcst etype is configurable using either DT properties or environment
+variables. The following DT properties and environment variables are supported.
+Note that environment variables override DT properties.
+
++--------------------+-----------+------------------------------------------------------------------+
+| DT property        | Variable  | Description                                                      |
++====================+===========+==================================================================+
+| nxp,loader-address |           | SPL base address                                                 |
++--------------------+-----------+------------------------------------------------------------------+
+| nxp,srk-table      | SRK_TABLE | full path to SRK_1_2_3_4_table.bin                               |
++--------------------+-----------+------------------------------------------------------------------+
+| nxp,csf-crt        | CSF_KEY   | full path to the CSF Key CSF1_1_sha256_4096_65537_v3_usr_crt.pem |
++--------------------+-----------+------------------------------------------------------------------+
+| nxp,img-crt        | IMG_KEY   | full path to the IMG Key IMG1_1_sha256_4096_65537_v3_usr_crt.pem |
++--------------------+-----------+------------------------------------------------------------------+
+
+Environment variables can be set as follows to point the build process
+to external key material:
+```
+export CST_DIR=/usr/src/cst-3.3.1/
+export CSF_KEY=$CST_DIR/crts/CSF1_1_sha256_4096_65537_v3_usr_crt.pem
+export IMG_KEY=$CST_DIR/crts/IMG1_1_sha256_4096_65537_v3_usr_crt.pem
+export SRK_TABLE=$CST_DIR/crts/SRK_1_2_3_4_table.bin
+make flash.bin
+```
+
+1.4 Closing the device
+-----------------------
+
+The procedure for closing the device is similar as in Non-SPL targets, for a
+complete procedure please refer to section "1.5 Programming SRK Hash" in
+mx6_mx7_secure_boot.txt document available under doc/imx/habv4/guides/
+directory.
+
+References:
+[1] AN4581: "Secure Boot on i.MX 50, i.MX 53, i.MX 6 and i.MX 7 Series using
+ HABv4" - Rev 2.
diff --git a/doc/imx/habv4/introduction_habv4.txt b/doc/imx/habv4/introduction_habv4.txt
new file mode 100644
index 00000000000..25711bbe95a
--- /dev/null
+++ b/doc/imx/habv4/introduction_habv4.txt
@@ -0,0 +1,262 @@
+          +=======================================================+
+          +     i.MX Secure and Encrypted Boot using HABv4        +
+          +=======================================================+
+
+1. Introduction
+----------------
+
+The i.MX family of applications processors provides the High Assurance Boot
+(HAB) feature in the on-chip ROM. The ROM is responsible for loading the
+initial program image (U-Boot) from the boot media and HAB enables the ROM
+to authenticate and/or decrypt the program image by using cryptography
+operations.
+
+This feature is supported in i.MX 50, i.MX 53, i.MX 6, i.MX 7 series and
+ i.MX 8M, i.MX 8MM devices.
+
+Step-by-step guides are available under doc/imx/habv4/guides/ directory,
+users familiar with HAB and CST PKI tree generation should refer to these
+documents instead.
+
+1.1 The HABv4 Secure Boot Architecture
+---------------------------------------
+
+The HABv4 secure boot feature uses digital signatures to prevent unauthorized
+software execution during the device boot sequence. In case a malware takes
+control of the boot sequence, sensitive data, services and network can be
+impacted.
+
+The HAB authentication is based on public key cryptography using the RSA
+algorithm in which image data is signed offline using a series of private
+keys. The resulting signed image data is then verified on the i.MX processor
+using the corresponding public keys. The public keys are included in the CSF
+binary and the SRK Hash is programmed in the SoC fuses for establishing the
+root of trust.
+
+The diagram below illustrate the secure boot process overview:
+
+          Host PC + CST                             i.MX + HAB
+          +----------+                             +----------+
+     ---> |  U-Boot  |                             | Compare  |
+     |    +----------+                             +----------+
+     |          |                                     ^    ^
+     |          v                         Reference  /      \  Generated
+     |    +----------+                      Hash    /        \   Hash
+     |    |   Hash   |  Private                    /          \
+     |    +----------+    Key                     /            \
+     |          |          |                +----------+  +----------+
+     |          v          |                |  Verify  |  |   Hash   |
+     |    +----------+     |                +----------+  +----------+
+     |    |   Sign   |  <---      SRK            ^            ^
+     |    +----------+            HASH            \          /
+     |          |                  |          CSF  \        /   U-Boot
+     |          v                  v                \      /
+     |    +----------+        +----------+        +----------+
+     |    |  U-Boot  |        |          |        |  U-Boot  |
+     ---> |     +    | -----> |   i.MX   | -----> |     +    |
+          |    CSF   |        |          |        |    CSF   |
+          +----------+        +----------+        +----------+
+
+The U-Boot image to be programmed into the boot media needs to be properly
+constructed i.e. it must contain a proper Command Sequence File (CSF).
+
+The CSF is a binary data structure interpreted by the HAB to guide
+authentication process, this is generated by the Code Signing Tool[1].
+The CSF structure contains the commands, SRK table, signatures and
+certificates.
+
+Details about the Secure Boot and Code Signing Tool (CST) can be found in
+the application note AN4581[2] and in the secure boot guides.
+
+1.2 The HABv4 Encrypted Boot Architecture
+------------------------------------------
+
+The HAB Encrypted Boot feature available in CAAM supported devices adds an
+extra security operation to the bootloading sequence. It uses cryptographic
+techniques (AES-CCM) to obscure the U-Boot data, so it cannot be seen or used
+by unauthorized users. This mechanism protects the U-Boot code residing on
+flash or external memory and also ensures that the final image is unique
+per device.
+
+The process can be divided into two protection mechanisms. The first mechanism
+is the bootloader code encryption which provides data confidentiality and the
+second mechanism is the digital signature, which authenticates the encrypted
+image.
+
+Keep in mind that the encrypted boot makes use of both mechanisms whatever the
+order is (sign and then encrypt, or encrypt and then sign), both operations
+can be applied on the same region with exception of the U-Boot Header (IVT,
+boot data and DCD) which can only be signed, not encrypted.
+
+The diagram below illustrate the encrypted boot process overview:
+
+     Host PC + CST                                      i.MX + HAB
+     +------------+                                  +--------------+
+     |   U-Boot   |                                  |    U-Boot    |
+     +------------+                                  +--------------+
+            |                                                ^
+            |                                                |
+            v         DEK                            +--------------+
+     +------------+    |                       ----> |    Decrypt   |
+     |   Encrypt  | <---                       |     +--------------+
+     +------------+                        DEK |             ^
+            |                                  |             |
+            |       Private                    |             |
+            v         Key                  +------+   +--------------+
+     +------------+    |                   | CAAM |   | Authenticate |
+     |    Sign    | <---                   +------+   +--------------+
+     +------------+            DEK             ^             ^
+            |                + OTPMK       DEK  \           /  U-Boot
+            |                   |          Blob  \         /   + CSF
+            v                   v                 \       /
+     +------------+       +----------+          +------------+
+     | Enc U-Boot |       |          |          | Enc U-Boot |
+     |   + CSF    | ----> |   i.MX   | -------> |   + CSF    |
+     | + DEK Blob |       |          |          | + DEK Blob |
+     +------------+       +----------+          +------------+
+            ^                   |
+            |                   |
+            ---------------------
+                   DEK Blob
+                    (CAAM)
+
+The Code Signing Tool automatically generates a random AES Data Encryption Key
+(DEK) when encrypting an image. This key is used in both encrypt and decrypt
+operations and should be present in the final image structure encapsulated
+by a CAAM blob.
+
+The OTP Master Key (OTPMK) is used to encrypt and wrap the DEK in a blob
+structure. The OTPMK is unique per device and can be accessed by CAAM only.
+To further add to the security of the DEK, the blob is decapsulated and
+decrypted inside a secure memory partition that can only be accessed by CAAM.
+
+During the design of encrypted boot using DEK blob, it is necessary to inhibit
+any modification or replacement of DEK blob with a counterfeit one allowing
+execution of malicious code. The PRIBLOB setting in CAAM allows secure boot
+software to have its own private blobs that cannot be decapsulated or
+encapsulated by any other user code, including any software running in trusted
+mode.
+
+Details about DEK Blob generation and PRIBLOB setting can be found in the
+encrypted boot guide and application note AN12056[3] .
+
+2. Generating a PKI tree
+-------------------------
+
+The first step is to generate the private keys and public keys certificates.
+The HAB architecture is based in a Public Key Infrastructure (PKI) tree.
+
+The Code Signing Tools package contains an OpenSSL based key generation script
+under keys/ directory. The hab4_pki_tree.sh script is able to generate a PKI
+tree containing up to 4 Super Root Keys (SRK) as well as their subordinated
+IMG and CSF keys.
+
+A new PKI tree can be generated by following the example below:
+
+- Generating 2048-bit PKI tree on CST v3.1.0:
+
+  $ ./hab4_pki_tree.sh
+  ...
+  Do you want to use an existing CA key (y/n)?: n
+  Do you want to use Elliptic Curve Cryptography (y/n)?: n
+  Enter key length in bits for PKI tree: 2048
+  Enter PKI tree duration (years): 5
+  How many Super Root Keys should be generated? 4
+  Do you want the SRK certificates to have the CA flag set? (y/n)?: y
+
+The diagram below illustrate the PKI tree:
+
+                                +---------+
+                                |   CA    |
+                                +---------+
+                                     |
+                                     |
+            ---------------------------------------------------
+            |               |                 |               |
+            |               |                 |               |
+            v               v                 v               v
+       +--------+       +--------+       +--------+       +--------+
+       |  SRK1  |       |  SRK2  |       |  SRK3  |       |  SRK4  |
+       +--------+       +--------+       +--------+       +--------+
+         /    \           /    \           /    \           /    \
+        v      v         v      v         v      v         v      v
+     +----+  +----+   +----+  +----+   +----+  +----+   +----+  +----+
+     |CSF1|  |IMG1|   |CSF2|  |IMG2|   |CSF3|  |IMG3|   |CSF4|  |IMG4|
+     +----+  +----+   +----+  +----+   +----+  +----+   +----+  +----+
+
+After running the script users can check the private keys under keys/ directory
+and their respective X.509v3 public key certificates under crts/ directory.
+Those files will be used during the signing and authentication process.
+
+2.1 Generating a fast authentication PKI tree
+----------------------------------------------
+
+Starting in HAB v4.1.2 users can use a single SRK key to authenticate the both
+CSF and IMG contents. This reduces the number of key pair authentications that
+must occur during the ROM/HAB boot stage, thus providing a faster boot process.
+
+The script hab4_pki_tree.sh is also able to generate a Public Key Infrastructure
+(PKI) tree which only contains SRK Keys, users should not set the CA flag when
+generating the SRK certificates.
+
+- Generating 2048-bit fast authentication PKI tree on CST v3.1.0:
+
+  $ ./hab4_pki_tree.sh
+  ...
+  Do you want to use an existing CA key (y/n)?: n
+  Do you want to use Elliptic Curve Cryptography (y/n)?: n
+  Enter key length in bits for PKI tree: 2048
+  Enter PKI tree duration (years): 5
+  How many Super Root Keys should be generated? 4
+  Do you want the SRK certificates to have the CA flag set? (y/n)?: n
+
+The diagram below illustrate the PKI tree generated:
+
+                             +---------+
+                             |   CA    |
+                             +---------+
+                                  |
+                                  |
+         ---------------------------------------------------
+         |               |                 |               |
+         |               |                 |               |
+         v               v                 v               v
+    +--------+       +--------+       +--------+       +--------+
+    |  SRK1  |       |  SRK2  |       |  SRK3  |       |  SRK4  |
+    +--------+       +--------+       +--------+       +--------+
+
+2.2 Generating a SRK Table and SRK Hash
+----------------------------------------
+
+The next step is to generated the SRK Table and its respective SRK Table Hash
+from the SRK public key certificates created in one of the steps above.
+
+In the HAB architecture, the SRK Table is included in the CSF binary and the
+SRK Hash is programmed in the SoC SRK_HASH[255:0] fuses.
+
+On the target device during the authentication process the HAB code verify the
+SRK Table against the SoC SRK_HASH fuses, in case the verification success the
+root of trust is established and the HAB code can progress with the image
+authentication.
+
+The srktool can be used for generating the SRK Table and its respective SRK
+Table Hash.
+
+- Generating SRK Table and SRK Hash in Linux 64-bit machines:
+
+  $ ../linux64/bin/srktool -h 4 -t SRK_1_2_3_4_table.bin -e \
+	SRK_1_2_3_4_fuse.bin -d sha256 -c \
+	SRK1_sha256_2048_65537_v3_ca_crt.pem,\
+	SRK2_sha256_2048_65537_v3_ca_crt.pem,\
+	SRK3_sha256_2048_65537_v3_ca_crt.pem,\
+	SRK4_sha256_2048_65537_v3_ca_crt.pem
+
+The SRK_1_2_3_4_table.bin and SRK_1_2_3_4_fuse.bin files can be used in further
+steps as explained in HAB guides available under doc/imx/habv4/guides/
+directory.
+
+References:
+[1] CST: i.MX High Assurance Boot Reference Code Signing Tool.
+[2] AN4581: "Secure Boot on i.MX 50, i.MX 53, i.MX 6 and i.MX 7 Series using
+ HABv4" - Rev 2.
+[3] AN12056: "Encrypted Boot on HABv4 and CAAM Enabled Devices" - Rev. 1
diff --git a/doc/imx/habv4/script_examples/genIVT.pl b/doc/imx/habv4/script_examples/genIVT.pl
new file mode 100644
index 00000000000..84a4fcb16f3
--- /dev/null
+++ b/doc/imx/habv4/script_examples/genIVT.pl
@@ -0,0 +1,12 @@
+#! /usr/bin/perl -w
+use strict;
+open(my $out, '>:raw', 'ivt.bin') or die "Unable to open: $!";
+print $out pack("V", 0x412000D1); # Signature
+print $out pack("V", 0x80800000); # Load Address (*load_address)
+print $out pack("V", 0x0); # Reserved
+print $out pack("V", 0x0); # DCD pointer
+print $out pack("V", 0x0); # Boot Data
+print $out pack("V", 0x80EEA000); # Self Pointer (*ivt)
+print $out pack("V", 0x80EEA020); # CSF Pointer (*csf)
+print $out pack("V", 0x0); # Reserved
+close($out);
diff --git a/doc/imx/misc/sdp.txt b/doc/imx/misc/sdp.txt
new file mode 100644
index 00000000000..49b281234b7
--- /dev/null
+++ b/doc/imx/misc/sdp.txt
@@ -0,0 +1,118 @@
+-------------
+SDP in U-Boot
+-------------
+
+SDP stands for serial download protocol. It is the protocol used in NXP's
+i.MX SoCs ROM Serial Downloader and provides means to download a program
+image to the chip over USB and UART serial connection.
+
+The implementation in U-Boot uses the USB Downloader Gadget (g_dnl) to
+provide a SDP implementation over USB. This allows to download program
+images to the target in SPL/U-Boot using the same protocol/tooling the
+SoC's recovery mechanism is using.
+
+The SDP protocol over USB is a USB HID class protocol. USB HID class
+protocols allow to access a USB device without OS specific drivers. The
+U-Boot implementation has primarly been tested using the open source
+imx_loader utility (https://github.com/boundarydevices/imx_usb_loader).
+
+imx_usb_loader is a very nice tool by Boundary Devices that allow to
+install U-Boot without a JTAG debugger, using the USB boot mode as
+described in the manual. It is a replacement for Freescale's
+MFGTOOLS.
+
+The host side utilities are typically capable to interpret the i.MX
+specific image header (see doc/imx/mkimage/imximage.txt). There are extensions
+for imx_loader's imx_usb utility which allow to interpret the U-Boot
+specific legacy image format (see mkimage(1)). Also the U-Boot side
+support beside the i.MX specific header the U-Boot legacy header.
+
+1. Using imx_usb_loader for first install with SPL
+--------------------------------------------------
+
+This implementation can be started in U-Boot using the sdp command
+(CONFIG_CMD_USB_SDP) or in SPL if Serial Downloader boot mode has been
+detected (CONFIG_SPL_USB_SDP_SUPPORT).
+
+A typical use case is downloading full U-Boot after SPL has been
+downloaded through the boot ROM's Serial Downloader. Using boot mode
+detection the SPL will run the SDP implementation automatically in
+this case:
+
+  # imx_usb SPL
+
+Targets Serial Console:
+
+  Trying to boot from USB SDP
+  SDP: initialize...
+  SDP: handle requests...
+
+At this point the SPL reenumerated as a new HID device and emulating
+the boot ROM's SDP protocol. The USB VID/PID will depend on standard
+U-Boot configurations CONFIG_G_DNL_(VENDOR|PRODUCT)_NUM. Make sure
+imx_usb is aware of the USB VID/PID for your device by adding a
+configuration entry in imx_usb.conf:
+
+  0x1b67:0x4fff, mx6_usb_sdp_spl.conf
+
+And the device specific configuration file mx6_usb_sdp_spl.conf:
+
+  mx6_spl_sdp
+  hid,uboot_header,1024,0x910000,0x10000000,1G,0x00900000,0x40000
+
+This allows to download the regular U-Boot with legacy image headers
+(u-boot.img) using a second invocation of imx_usb:
+
+  # imx_usb u-boot.img
+
+Furthermore, when U-Boot is running the sdp command can be used to
+download and run scripts:
+
+  # imx_usb script.scr
+
+imx_usb configuration files can be also used to download multiple
+files and of arbitrary types, e.g.
+
+  mx6_usb_sdp_uboot
+  hid,1024,0x10000000,1G,0x00907000,0x31000
+  full.itb:load 0x12100000
+  boot.scr:load 0x12000000,jump 0x12000000
+
+There is also a batch mode which allows imx_usb to handle multiple
+consecutive reenumerations by adding multiple VID/PID specifications
+in imx_usb.conf:
+
+  0x15a2:0x0061, mx6_usb_rom.conf, 0x1b67:0x4fff, mx6_usb_sdp_spl.conf
+
+In this mode the file to download (imx_usb job) needs to be specified
+in the configuration files.
+
+mx6_usb_rom.conf:
+
+  mx6_qsb
+  hid,1024,0x910000,0x10000000,1G,0x00900000,0x40000
+  SPL:jump header2
+
+mx6_usb_sdp_spl.conf:
+
+  mx6_spl_sdp
+  hid,uboot_header,1024,0x10000000,1G,0x00907000,0x31000
+  u-boot.img:jump header2
+
+With that SPL and U-Boot can be downloaded with a single invocation
+of imx_usb without arguments:
+
+  # imx_usb
+
+2. Using imx_usb_loader non-SPL images
+---------------------------------------
+
+Booting in USB mode, the i.MX6 announces itself to the Linux Host as:
+
+Bus 001 Device 111: ID 15a2:0061 Freescale Semiconductor, Inc.
+
+imx_usb_loader is able to download a single file (u-boot.imx)
+to the board. For boards without SPL support, it is enough to
+issue the command:
+
+	sudo ../imx_usb_loader/imx_usb -v u-boot.imx
diff --git a/doc/imx/mkimage/imx8image.txt b/doc/imx/mkimage/imx8image.txt
new file mode 100644
index 00000000000..76664a86fa4
--- /dev/null
+++ b/doc/imx/mkimage/imx8image.txt
@@ -0,0 +1,45 @@
+Introduction:
+=============
+
+This documentation entry describes the i.MX8 container format and how
+to use.
+
+A Boot image consists of:
+ - Primary Boot Container Set
+ - Optional Secondary Boot Container Set
+
+The imx8image only support the Primary Boot Container Set.
+
+The Primary Boot Container Set contains two containers. The 1st container
+only contain the SECO firmware image, the 2nd container can contain
+multiple images and typically have:
+ - SCF FW image
+ - M4 FW image
+ - AP FW image
+
+For more details, refer i.MX8 Reference Mannual Chapter 5
+"System Boot and section", "5.9 (Boot image) of the processor's manual"
+
+Configuration file:
+==================
+BOOT_FROM	[sd|emmc_fastboot|fspi|nand_4k|nand_8k|nand_16k] [sector_size]
+ - indicates the boot media
+SOC_TYPE	[IMX8QM|IMX8QX]
+ - indicates the soc
+APPEND		[ahab container image]
+ - indicates the ahah image that will be put in the 1st container
+   When creating container image will be loaded by SPL, this entry
+   should not this included
+CONTAINER
+ - indicates to create the 2nd container
+IMAGE		[SCU|M40|M41|A35|A53|A72] [image file] [load address]
+ - indicates images will be put in the 2nd container
+
+Example:
+=======
+BOOT_FROM SD 0x400
+SOC_TYPE IMX8QM
+APPEND mx8qm-ahab-container.img
+CONTAINER
+IMAGE SCU mx8qm-mek-scfw-tcm.bin
+IMAGE A35 spl/u-boot-spl.bin 0x00100000
diff --git a/doc/imx/mkimage/imximage.txt b/doc/imx/mkimage/imximage.txt
new file mode 100644
index 00000000000..fa4e486661c
--- /dev/null
+++ b/doc/imx/mkimage/imximage.txt
@@ -0,0 +1,239 @@
+---------------------------------------------
+Imximage Boot Image generation using mkimage
+---------------------------------------------
+
+This document describes how to set up a U-Boot image that can be booted
+by Freescale MX25, MX35, MX51, MX53 and MX6 processors via internal boot
+mode.
+
+These processors can boot directly from NAND, SPI flash and SD card flash
+using its internal boot ROM support. MX6 processors additionally support
+boot from NOR flash and SATA disks. All processors can boot from an internal
+UART, if booting from device media fails.
+Booting from NOR flash does not require to use this image type.
+
+For more details refer Chapter 2 - System Boot and section 2.14
+(flash header description) of the processor's manual.
+
+Command syntax:
+--------------
+./tools/mkimage -l <mx u-boot_file>
+		to list the imx image file details
+
+./tools/mkimage -T imximage \
+		-n <board specific configuration file> \
+		-e <execution address> -d <u-boot binary>  <output image file>
+
+For example, for the mx51evk board:
+./tools/mkimage -n ./board/freescale/mx51evk/imximage.cfg \
+		-T imximage -e 0x97800000  \
+		-d u-boot.bin u-boot.imx
+
+You can generate directly the image when you compile u-boot with:
+
+$ make u-boot.imx
+
+The output image can be flashed on the board SPI flash or on a SD card.
+In both cases, you have to copy the image at the offset required for the
+chosen media devices (0x400 for both SPI flash or SD card).
+
+Please check Freescale documentation for further details.
+
+Board specific configuration file specifications:
+-------------------------------------------------
+1. This file must present in the $(BOARDDIR) and the name should be
+	imximage.cfg (since this is used in Makefile).
+2. This file can have empty lines and lines starting with "#" as first
+	character to put comments.
+3. This file can have configuration command lines as mentioned below,
+	any other information in this file is treated as invalid.
+
+Configuration command line syntax:
+---------------------------------
+1. Each command line is must have two strings, first one command or address
+	and second one data string
+2. Following are the valid command strings and associated data strings:-
+	Command string		data string
+	--------------		-----------
+	IMXIMAGE_VERSION        1/2
+				1 is for mx25/mx35/mx51 compatible,
+				2 is for mx53/mx6 compatible,
+				others is invalid and error is generated.
+				This command need appear the fist before
+				other valid commands in configuration file.
+
+	BOOT_OFFSET		value
+
+				This command is parallel to BOOT_FROM and
+				is preferred over BOOT_FROM.
+
+				value:  Offset of the image header, this
+					value shall be set to one of the
+					values found in the file:
+						arch/arm/include/asm/\
+						mach-imx/imximage.cfg
+				Example:
+				BOOT_OFFSET FLASH_OFFSET_STANDARD
+
+	BOOT_FROM		nand/spi/sd/onenand/nor/sata
+
+				This command is parallel to BOOT_OFFSET and
+				is to be deprecated in favor of BOOT_OFFSET.
+
+				Example:
+				BOOT_FROM spi
+
+	CSF			value
+
+				Total size of CSF (Command Sequence File)
+				used for Secure Boot/ High Assurance Boot
+				(HAB).
+
+				Using this command will populate the IVT
+				(Initial Vector Table) CSF pointer and adjust
+				the length fields only. The CSF itself needs
+				to be generated with Freescale tools and
+				'manually' appended to the u-boot.imx file.
+
+				The CSF is then simply concatenated
+				to the u-boot image, making a signed bootloader,
+				that the processor can verify
+				if the fuses for the keys are burned.
+
+				Further infos how to configure the SOC to verify
+				the bootloader can be found in the "High
+				Assurance Boot Version Application Programming
+				Interface Reference Manual" as part of the
+				Freescale Code Signing Tool, available on the
+				manufacturer's website.
+
+				Example:
+				CSF 0x2000
+
+	DATA			type address value
+
+				type: word=4, halfword=2, byte=1
+				address: physycal register address
+				value: value to be set in register
+				All values are in in hexadecimal.
+				Example (write to IOMUXC):
+				DATA 4 0x73FA88a0 0x200
+
+The processor support up to 60 register programming commands for IMXIMAGE_VERSION 1
+and 220 register programming commands for IMXIMAGE_VERSION 2.
+An error is generated if more commands are found in the configuration file.
+
+3. All commands are optional to program.
+
+Setup a SD Card for booting
+--------------------------------
+
+The following example prepare a SD card with u-boot and a FAT partition
+to be used to stored the kernel to be booted.
+I will set the SD in the most compatible mode, setting it with
+255 heads and 63 sectors, as suggested from several documentation and
+howto on line (I took as reference the preparation of a SD Card for the
+Beagleboard, running u-boot as bootloader).
+
+You should start clearing the partitions table on the SD card. Because
+the u-boot image must be stored at the offset 0x400, it must be assured
+that there is no partition at that address. A new SD card is already
+formatted with FAT filesystem and the partition starts from the first
+cylinder, so we need to change it.
+
+You can do all steps with fdisk. If the device for the SD card is
+/dev/mmcblk0, the following commands make the job:
+
+1. Start the fdisk utility (as superuser)
+	fdisk /dev/mmcblk0
+
+2. Clear the actual partition
+
+Command (m for help): o
+
+3. Print card info:
+
+Command (m for help): p
+Disk /dev/mmcblk0: 1981 MB, 1981284352 bytes
+
+In my case, I have a 2 GB card. I need the size to set later the correct value
+for the cylinders.
+
+4. Go to expert mode:
+
+Command (m for help): x
+
+5. Set card geometry
+
+Expert command (m for help): h
+Number of heads (1-256, default 4): 255
+
+Expert command (m for help): s
+Number of sectors (1-63, default 16): 63
+Warning: setting sector offset for DOS compatiblity
+
+We have set 255 heads, 63 sector. We have to set the cylinder.
+The value to be set can be calculated with:
+
+	cylinder = <total size> / <heads> / <sectors> / <blocksize>
+
+in this example,
+	1981284352 / 255 / 63 / 512 = 239.x = 239
+
+
+Expert command (m for help): c
+Number of cylinders (1-1048576, default 60032): 239
+
+6. Leave the expert mode
+Expert command (m for help): r
+
+7. Set up a partition
+
+Now set a partition table to store the kernel or whatever you want. Of course,
+you can set additional partitions to store rootfs, data, etc.
+In my example I want to set a single partition. I must take care
+to not overwrite the space where I will put u-boot.
+
+Command (m for help): n
+Command action
+   e   extended
+   p   primary partition (1-4)
+p
+Partition number (1-4): 1
+First cylinder (1-239, default 1): 3
+Last cylinder, +cylinders or +size{K,M,G} (3-239, default 239): +100M
+
+Command (m for help): p
+
+Disk /dev/mmcblk0: 1967 MB, 1967128576 bytes
+255 heads, 63 sectors/track, 239 cylinders
+Units = cylinders of 16065 * 512 = 8225280 bytes
+Disk identifier: 0xb712a870
+
+	Device Boot	 Start	       End	Blocks	 Id  System
+/dev/mmcblk0p1		     3		16	112455	 83  Linux
+
+I have set 100MB, leaving the first 2 sectors free. I will copy U-Boot
+there.
+
+8. Write the partition table and exit.
+
+Command (m for help): w
+The partition table has been altered!
+
+Calling ioctl() to re-read partition table.
+
+9. Copy u-boot.imx on the SD card
+
+I use dd:
+
+dd if=u-boot.imx of=/dev/mmcblk0 bs=512 seek=2
+
+This command copies the u-boot image at the address 0x400, as required
+by the processor.
+
+Now remove your card from the PC and go to the target. If evrything went right,
+the u-boot prompt should come after power on.
+
+------------------------------------------------
+Author: Stefano babic <sbabic@denx.de>
diff --git a/doc/imx/mkimage/mxsimage.txt b/doc/imx/mkimage/mxsimage.txt
new file mode 100644
index 00000000000..9159f93a977
--- /dev/null
+++ b/doc/imx/mkimage/mxsimage.txt
@@ -0,0 +1,170 @@
+Freescale i.MX233/i.MX28 SB image generator via mkimage
+=======================================================
+
+This tool allows user to produce SB BootStream encrypted with a zero key.
+Such a BootStream is then bootable on i.MX23/i.MX28.
+
+Usage -- producing image:
+=========================
+The mxsimage tool is targeted to be a simple replacement for the elftosb2 .
+To generate an image, write an image configuration file and run:
+
+ mkimage -A arm -O u-boot -T mxsimage -n <path to configuration file> \
+	 <output bootstream file>
+
+The output bootstream file is usually using the .sb file extension. Note
+that the example configuration files for producing bootable BootStream with
+the U-Boot bootloader can be found under arch/arm/boot/cpu/arm926ejs/mxs/
+directory. See the following files:
+
+ mxsimage.mx23.cfg -- This is an example configuration for i.MX23
+ mxsimage.mx28.cfg -- This is an example configuration for i.MX28
+
+Each configuration file uses very simple instruction semantics and a few
+additional rules have to be followed so that a useful image can be produced.
+These semantics and rules will be outlined now.
+
+- Each line of the configuration file contains exactly one instruction.
+- Every numeric value must be encoded in hexadecimal and in format 0xabcdef12 .
+- The configuration file is a concatenation of blocks called "sections" and
+  optionally "DCD blocks" (see below), and optional flags lines.
+  - Each "section" is started by the "SECTION" instruction.
+  - The "SECTION" instruction has the following semantics:
+
+      SECTION u32_section_number [BOOTABLE]
+      - u32_section_number :: User-selected ID of the section
+      - BOOTABLE           :: Sets the section as bootable
+
+  - A bootable section is one from which the BootROM starts executing
+    subsequent instructions or code. Exactly one section must be selected
+    as bootable, usually the one containing the instructions and data to
+    load the bootloader.
+
+  - A "SECTION" must be immediatelly followed by a "TAG" instruction.
+  - The "TAG" instruction has the following semantics:
+
+      TAG [LAST]
+      - LAST               :: Flag denoting the last section in the file
+
+  - After a "TAG" instruction, any of the following instructions may follow
+    in any order and any quantity:
+
+      NOOP
+      - This instruction does nothing
+
+      LOAD     u32_address string_filename
+      - Instructs the BootROM to load file pointed by "string_filename" onto
+	address "u32_address".
+
+      LOAD IVT u32_address u32_IVT_entry_point
+      - Crafts and loads IVT onto address "u32_address" with the entry point
+	of u32_IVT_entry_point.
+      - i.MX28-specific instruction!
+
+      LOAD DCD u32_address u32_DCD_block_ID
+      - Loads the DCD block with ID "u32_DCD_block_ID" onto address
+	"u32_address" and executes the contents of this DCD block
+      - i.MX28-specific instruction!
+
+      FILL u32_address u32_pattern u32_length
+      - Starts to write memory from addres "u32_address" with a pattern
+	specified by "u32_pattern". Writes exactly "u32_length" bytes of the
+	pattern.
+
+      JUMP [HAB] u32_address [u32_r0_arg]
+      - Jumps onto memory address specified by "u32_address" by setting this
+	address in PT. The BootROM will pass the "u32_r0_arg" value in ARM
+	register "r0" to the executed code if this option is specified.
+	Otherwise, ARM register "r0" will default to value 0x00000000. The
+	optional "HAB" flag is i.MX28-specific flag turning on the HAB boot.
+
+      CALL [HAB] u32_address [u32_r0_arg]
+      - See JUMP instruction above, as the operation is exactly the same with
+	one difference. The CALL instruction does allow returning into the
+	BootROM from the executed code. U-Boot makes use of this in it's SPL
+	code.
+
+      MODE string_mode
+      - Restart the CPU and start booting from device specified by the
+	"string_mode" argument. The "string_mode" differs for each CPU
+	and can be:
+	 i.MX23, string_mode = USB/I2C/SPI1_FLASH/SPI2_FLASH/NAND_BCH
+			       JTAG/SPI3_EEPROM/SD_SSP0/SD_SSP1
+	 i.MX28, string_mode = USB/I2C/SPI2_FLASH/SPI3_FLASH/NAND_BCH
+			       JTAG/SPI2_EEPROM/SD_SSP0/SD_SSP1
+
+  - An optional "DCD" blocks can be added at the begining of the configuration
+    file. Note that the DCD is only supported on i.MX28.
+    - The DCD blocks must be inserted before the first "section" in the
+      configuration file.
+    - The DCD block has the following semantics:
+
+	DCD u32_DCD_block_ID
+	- u32_DCD_block_ID	:: The ID number of the DCD block, must match
+				   the ID number used by "LOAD DCD" instruction.
+
+    - The DCD block must be followed by one of the following instructions. All
+      of the instructions operate either on 1, 2 or 4 bytes. This is selected by
+      the 'n' suffix of the instruction:
+
+	WRITE.n u32_address u32_value
+	- Write the "u32_value" to the "u32_address" address.
+
+	ORR.n u32_address u32_value
+	- Read the "u32_address", perform a bitwise-OR with the "u32_value" and
+	  write the result back to "u32_address".
+
+	ANDC.n u32_address u32_value
+	- Read the "u32_address", perform a bitwise-AND with the complement of
+	  "u32_value" and write the result back to "u32_address".
+
+	EQZ.n u32_address u32_count
+	- Read the "u32_address" at most "u32_count" times and test if the value
+	  read is zero. If it is, break the loop earlier.
+
+	NEZ.n u32_address u32_count
+	- Read the "u32_address" at most "u32_count" times and test if the value
+	  read is non-zero. If it is, break the loop earlier.
+
+	EQ.n u32_address u32_mask
+	- Read the "u32_address" in a loop and test if the result masked with
+	  "u32_mask" equals the "u32_mask". If the values are equal, break the
+	  reading loop.
+
+	NEQ.n u32_address u32_mask
+	- Read the "u32_address" in a loop and test if the result masked with
+	  "u32_mask" does not equal the "u32_mask". If the values are not equal,
+	  break the reading loop.
+
+	NOOP
+	- This instruction does nothing.
+
+  - An optional flags lines can be one of the following:
+
+	DISPLAYPROGRESS
+	- Enable boot progress output from the BootROM.
+
+- If the boot progress output from the BootROM is enabled, the BootROM will
+  produce a letter on the Debug UART for each instruction it started processing.
+  Here is a mapping between the above instructions and the BootROM output:
+
+   H -- SB Image header loaded
+   T -- TAG instruction
+   N -- NOOP instruction
+   L -- LOAD instruction
+   F -- FILL instruction
+   J -- JUMP instruction
+   C -- CALL instruction
+   M -- MODE instruction
+
+Usage -- verifying image:
+=========================
+
+The mxsimage can also verify and dump contents of an image. Use the following
+syntax to verify and dump contents of an image:
+
+ mkimage -l <input bootstream file>
+
+This will output all the information from the SB image header and all the
+instructions contained in the SB image. It will also check if the various
+checksums in the SB image are correct.
diff --git a/doc/index.rst b/doc/index.rst
new file mode 100644
index 00000000000..43398627d89
--- /dev/null
+++ b/doc/index.rst
@@ -0,0 +1,105 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. _u-boot_doc:
+
+The U-Boot Documentation
+========================
+
+This is the top level of the U-Boot's documentation tree.  U-Boot
+documentation, like the U-Boot itself, is very much a work in progress;
+that is especially true as we work to integrate our many scattered
+documents into a coherent whole.  Please note that improvements to the
+documentation are welcome; join the U-Boot list at http://lists.denx.de
+if you want to help out.
+
+.. toctree::
+   :maxdepth: 2
+
+User-oriented documentation
+---------------------------
+
+The following manuals are written for *users* of the U-Boot - those who are
+trying to get it to work optimally on a given system.
+
+.. toctree::
+   :maxdepth: 2
+
+   build/index
+   learn/index
+   usage/index
+
+Developer-oriented documentation
+--------------------------------
+
+The following manuals are written for *developers* of the U-Boot - those who
+want to contribute to U-Boot.
+
+.. toctree::
+   :maxdepth: 2
+
+   develop/index
+
+
+U-Boot API documentation
+------------------------
+
+These books get into the details of how specific U-Boot subsystems work
+from the point of view of a U-Boot developer.  Much of the information here
+is taken directly from the U-Boot source, with supplemental material added
+as needed (or at least as we managed to add it - probably *not* all that is
+needed).
+
+.. toctree::
+   :maxdepth: 2
+
+   api/index
+
+Architecture-specific doc
+-------------------------
+
+These books provide programming details about architecture-specific
+implementation.
+
+.. toctree::
+   :maxdepth: 2
+
+   arch/index
+
+Board-specific doc
+------------------
+
+These books provide details about board-specific information. They are
+organized in a vendor subdirectory.
+
+.. toctree::
+   :maxdepth: 2
+
+   board/index
+
+Android-specific doc
+--------------------
+
+These books provide information about booting the Android OS from U-Boot,
+manipulating Android images from U-Boot shell and discusses other
+Android-specific features available in U-Boot.
+
+.. toctree::
+   :maxdepth: 2
+
+   android/index
+
+Chromium OS-specific doc
+------------------------
+
+.. toctree::
+   :maxdepth: 2
+
+   chromium/index
+
+Indices and tables
+==================
+
+.. toctree::
+   :maxdepth: 1
+
+   genindex
diff --git a/doc/kwboot.1 b/doc/kwboot.1
new file mode 100644
index 00000000000..32d324f0550
--- /dev/null
+++ b/doc/kwboot.1
@@ -0,0 +1,198 @@
+.TH KWBOOT 1 "2022-03-02"
+
+.SH NAME
+kwboot \- Boot Marvell Kirkwood (and others 32-bit) SoCs over a serial link.
+.SH SYNOPSIS
+.B kwboot
+.RB [ "-b \fIimage\fP" ]
+.RB [ "-t" ]
+.RB [ "-B \fIbaudrate\fP" ]
+.RB \fITTY\fP
+.SH "DESCRIPTION"
+
+The \fBkwboot\fP program boots boards based on Marvell's 32-bit
+platforms including Kirkwood, Dove, Avanta, A370, AXP, A375, A38x
+and A39x over their integrated UART. Boot image files will typically
+contain a second stage boot loader, such as U-Boot. The image file
+must conform to Marvell's BootROM firmware image format
+(\fIkwbimage v0\fP or \fIv1\fP), created using a tool such as
+\fBmkimage\fP.
+
+Following power-up or a system reset, system BootROM code polls the
+UART for a brief period of time, sensing a handshake message which
+initiates an image upload. This program sends this boot message until
+it receives a positive acknowledgement. The image is transferred using
+Xmodem.
+
+Additionally, this program implements a minimal terminal mode, which
+can be used either standalone, or entered immediately following boot
+image transfer completion. This is often useful to catch early boot
+messages, or to manually interrupt a default boot procedure performed
+by the second-stage loader.
+
+.SH "OPTIONS"
+
+.TP
+.BI "\-b \fIimage\fP"
+Handshake; then upload file \fIimage\fP over \fITTY\fP.
+
+Note that for the encapsulated boot code to be executed, \fIimage\fP
+must be of type "UART boot" (0x69). The \fBkwboot\fP program changes
+this type automatically, unless the \fIimage\fP is signed, in which
+case it cannot be changed.
+
+This mode writes handshake status and upload progress indication to
+stdout. It is possible that \fIimage\fP contains an optional binary
+code in it's header which may also print some output via UART (for
+example U-Boot SPL does this). In such a case, this output is also
+written to stdout after the header is sent.
+
+.TP
+.B "\-b"
+Do only handshake on \fITTY\fP without uploading any file. File upload
+could be done later via option \fB\-D\fP or via any other Xmodem
+application, like \fBsx\fP(1).
+
+.TP
+.B "\-d"
+Do special handshake on \fITTY\fP for console debug mode.
+
+This will instruct BootROM to enter builtin simple console debug mode.
+Should be combined with option \fB\-t\fP.
+
+To get a BootROM help, type this command followed by ENTER key:
+
+.RS 1.2i
+.TP
+.B ?
+.RE
+.IP
+
+Armada 38x BootROM has a bug which cause that BootROM's standard output
+is turned off on UART when default boot source location contains valid boot image. Nevertheless
+BootROM's standard input and BootROM's terminal echo are active and working
+fine. To workaround this BootROM bug with standard output, it is possible
+to manually overwrite BootROM variables stored in SRAM which BootROM use
+for checking if standard output is enabled or not. To enable BootROM
+standard output on UART, type this command followed by ENTER key:
+
+.RS 1.2i
+.TP
+.B w 0x40034100 1
+.RE
+
+.TP
+.BI "\-D" " image"
+Upload file \fIimage\fP over \fITTY\fP without initial handshake.
+
+This method is used primary on Dove platforms, where BootROM does
+not support initial handshake for entering UART upload mode and
+strapping pins (exported via e.g. buttons) are used instead.
+
+.TP
+.BI "\-p"
+Obsolete. Does nothing.
+
+In the past, when this option was used, the program patched the header
+in the image prior upload, to "UART boot" type. This is now done by
+default.
+
+.TP
+.B "\-q"
+Obsolete. Does nothing.
+
+It is unknown whether it did something in the past.
+
+.TP
+.BI "\-s" " response-timeout"
+Specify custom response timeout when doing handshake. Default value is 50 ms.
+It is the timeout between sending two consecutive handshake patterns, meaning
+how long to wait for response from BootROM. Affects only option \fB\-b\fP with
+image file and option \fB\-d\fP.
+
+Option \fB-a\fP specify response timeout suitable for Armada XP BootROM and
+currently it is 1000 ms.
+
+Some testing showed that specifying 24 ms as response timeout make handshake
+with Armada 385 BootROM more stable.
+
+.TP
+.BI "\-t"
+Run a terminal program, connecting standard input and output to
+.RB \fITTY\fP.
+
+If used in combination with \fB\-b\fP, \fB\-D\fP or \fB\-d\fP option,
+terminal mode is entered immediately following a successful image upload
+or successful handshake (if not doing image upload).
+
+If standard I/O streams connect to a console, this mode will terminate
+after receiving \fBctrl-\e\fP followed by \fBc\fP from console input.
+
+.TP
+.BI "\-B \fIbaudrate\fP"
+If used in combination with \fB-b\fP, inject into the image header
+code that changes baud rate to \fIbaudrate\fP after uploading image
+header, and code that changes the baud rate back to the default
+(115200 Bd) before executing payload, and also adjust the baud rate
+on \fITTY\fP correspondingly. This can make the upload significantly
+faster.
+
+If used in combination with \fB-t\fP, adjust the baud rate to
+\fIbaudrate\fP on \fITTY\fP before starting terminal.
+
+If both \fB-b\fP and \fB-t\fP are used, the baud rate is changed
+back to 115200 after the upload.
+
+Tested values for \fIbaudrate\fP for Armada 38x include: 115200,
+230400, 460800, 500000, 576000, 921600, 1000000, 1152000, 1500000,
+2000000, 2500000, 3125000, 4000000 and 5200000.
+
+.SH "EXAMPLES"
+
+Instruct BootROM to enter boot Xmodem boot mode, send \fIu-boot-with-spl.kwb\fP
+kwbimage file via Xmodem on \fI/dev/ttyUSB0\fP at 115200 Bd and run terminal
+program:
+.IP
+.B kwboot -b u-boot-with-spl.kwb -t /dev/ttyUSB0
+
+.PP
+Instruct BootROM to enter boot Xmodem boot mode, send header of
+\fIu-boot-with-spl.kwb\fP kwbimage file via Xmodem at 115200 Bd, then instruct
+BootROM to change baudrate to 5200000 Bd, send data part of the kwbimage
+file via Xmodem at high speed, then change baudrate back to 115200 Bd,
+and finally run terminal program:
+.IP
+.B kwboot -b u-boot-with-spl.kwb -B 5200000 -t /dev/ttyUSB0
+
+.PP
+Only send \fIu-boot-with-spl.kwb\fP kwbimage file via Xmodem on \fI/dev/ttyUSB0\fP
+at 115200 Bd:
+.IP
+.B kwboot -D u-boot-with-spl.kwb /dev/ttyUSB0
+
+.PP
+Instruct BootROM to enter console debug mode and run terminal program on
+\fI/dev/ttyUSB0\fP at 115200 Bd:
+.IP
+.B kwboot -d -t /dev/ttyUSB0
+
+.PP
+Only run terminal program on \fI/dev/ttyUSB0\fP at 115200 Bd:
+.IP
+.B kwboot -t /dev/ttyUSB0
+
+.SH "SEE ALSO"
+.PP
+\fBmkimage\fP(1), \fBsx\fP(1)
+
+.SH "AUTHORS"
+
+Daniel Stodden <daniel.stodden@gmail.com>
+.br
+Luka Perkov <luka@openwrt.org>
+.br
+David Purdy <david.c.purdy@gmail.com>
+.br
+Pali Rohár <pali@kernel.org>
+.br
+Marek Behún <kabel@kernel.org>
diff --git a/doc/learn/index.rst b/doc/learn/index.rst
new file mode 100644
index 00000000000..8075c01d1df
--- /dev/null
+++ b/doc/learn/index.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Learn about U-Boot
+==================
+
+.. toctree::
+   :maxdepth: 1
+
+   talks
diff --git a/doc/learn/talks.rst b/doc/learn/talks.rst
new file mode 100644
index 00000000000..d65e3b92be1
--- /dev/null
+++ b/doc/learn/talks.rst
@@ -0,0 +1,23 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot Talks
+============
+
+U-Boot is a topic at various conferences each year. These talks might help you
+learn a bit about U-Boot:
+
+* `Tutorial: Introduction to the Embedded Boot Loader U-boot - Behan Webster,
+  Converse in Code <https://www.youtube.com/watch?v=INWghYZH3hI>`__
+  from Embedded Linux Conference 2020
+  (`slides <https://cm.e-ale.org/2020/ELC2020/intro-to-u-boot/intro-to-u-boot-2020.pdf>`__).
+
+* `Recent Advances in U-Boot - Simon Glass, Google Inc.
+  <https://www.youtube.com/watch?v=YlJBsVZJkDI>`__
+  from Embedded Linux Conference 2023.
+
+* `Introduction to U-Boot for beginners
+  <https://www.youtube.com/watch?v=rVaiLgXccSE>`__
+
+See elinux_talks_ for a more comprehensive list.
+
+.. _elinux_talks: https://elinux.org/Boot_Loaders#U-Boot
diff --git a/doc/media/Makefile b/doc/media/Makefile
new file mode 100644
index 00000000000..9b32258696b
--- /dev/null
+++ b/doc/media/Makefile
@@ -0,0 +1,39 @@
+# Rules to convert a .h file to inline RST documentation
+
+SRC_DIR=$(srctree)/doc/media
+PARSER = $(srctree)/doc/sphinx/parse-headers.pl
+API = $(srctree)/include
+
+FILES = linker_lists.h.rst
+
+TARGETS := $(addprefix $(BUILDDIR)/, $(FILES))
+
+gen_rst = \
+	echo ${PARSER} $< $@ $(SRC_DIR)/$(notdir $@).exceptions; \
+	${PARSER} $< $@ $(SRC_DIR)/$(notdir $@).exceptions
+
+quiet_gen_rst = echo '  PARSE   $(patsubst $(srctree)/%,%,$<)'; \
+	${PARSER} $< $@ $(SRC_DIR)/$(notdir $@).exceptions
+
+silent_gen_rst = ${gen_rst}
+
+$(BUILDDIR)/linker_lists.h.rst: ${API}/linker_lists.h ${PARSER} $(SRC_DIR)/linker_lists.h.rst.exceptions
+	@$($(quiet)gen_rst)
+
+# Media build rules
+
+.PHONY: all html texinfo epub xml latex
+
+all: $(IMGDOT) $(BUILDDIR) ${TARGETS}
+html: all
+texinfo: all
+epub: all
+xml: all
+latex: $(IMGPDF) all
+linkcheck:
+
+clean:
+	-rm -f $(DOTTGT) $(IMGTGT) ${TARGETS} 2>/dev/null
+
+$(BUILDDIR):
+	$(Q)mkdir -p $@
diff --git a/doc/media/linker_lists.h.rst.exceptions b/doc/media/linker_lists.h.rst.exceptions
new file mode 100644
index 00000000000..e69de29bb2d
--- /dev/null
+++ b/doc/media/linker_lists.h.rst.exceptions
diff --git a/doc/mkeficapsule.1 b/doc/mkeficapsule.1
new file mode 100644
index 00000000000..c4c2057d5c7
--- /dev/null
+++ b/doc/mkeficapsule.1
@@ -0,0 +1,129 @@
+.\" SPDX-License-Identifier: GPL-2.0+
+.\" Copyright (c) 2021, Linaro Limited
+.\" 		written by AKASHI Takahiro <takahiro.akashi@linaro.org>
+.TH MAEFICAPSULE 1 "May 2021"
+
+.SH NAME
+mkeficapsule \- Generate EFI capsule file for U-Boot
+
+.SH SYNOPSIS
+.B mkeficapsule
+.RI [ options ] " " [ image-blob ] " " capsule-file
+
+.SH "DESCRIPTION"
+The
+.B mkeficapsule
+command is used to create an EFI capsule file to be used by U-Boot for firmware
+updates.
+A capsule file may contain various types of firmware blobs which are to be
+applied to the system.
+If a capsule file is placed in the /EFI/CapusuleUpdate directory of the EFI
+system partition, U-Boot will try to execute the update at the next reboot.
+
+Optionally, a capsule file can be signed with a given private key.
+In this case, the update will be authenticated by verifying the signature
+before applying.
+
+Additionally, an empty capsule file can be generated to indicate the acceptance
+or rejection of firmware images by a governing component like an operating
+system.
+Empty capsules do not require an image-blob input file.
+
+.B mkeficapsule
+takes any type of image files when generating non empty capsules, including:
+.TP
+.I raw image
+format is a single binary blob of any type of firmware.
+
+.TP
+.I FIT (Flattened Image Tree) image
+format is the same as used in the new uImage format and allows for
+multiple binary blobs in a single capsule file.
+This type of image file can be generated by
+.BR mkimage .
+
+.SH "OPTIONS"
+
+.TP
+.BI "-g\fR,\fB --guid " guid-string
+Specify guid for image blob type. The format is:
+    xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx
+
+The first three elements are in little endian, while the rest
+is in big endian. The option must be specified for all non empty and
+image acceptance capsules
+
+.TP
+.BI "-i\fR,\fB --index " index
+Specify an image index
+
+.TP
+.BI "-I\fR,\fB --instance " instance
+Specify a hardware instance
+
+.PP
+FMP Payload Header is inserted right before the payload if
+.BR --fw-version
+is specified
+
+
+.TP
+.BI "-v\fR,\fB --fw-version " firmware-version
+Specify a firmware version, 0 if omitted
+
+.PP
+For generation of firmware accept empty capsule
+.BR --guid
+is mandatory
+.TP
+.BI "-A\fR,\fB --fw-accept "
+Generate a firmware acceptance empty capsule
+
+.TP
+.BI "-R\fR,\fB --fw-revert "
+Generate a firmware revert empty capsule
+
+.TP
+.BI "-o\fR,\fB --capoemflag "
+Capsule OEM flag, value between 0x0000 to 0xffff
+
+.TP
+.BR -h ", " --help
+Print a help message
+
+.PP
+With signing,
+.BR --private-key ", " --certificate " and " --monotonic-count
+are all mandatory.
+
+.TP
+.BI "-p\fR,\fB --private-key " private-key-file
+Specify signer's private key file in PEM
+
+.TP
+.BI "-c\fR,\fB --certificate " certificate-file
+Specify signer's certificate file in EFI certificate list format
+
+.TP
+.BI "-m\fR,\fB --monotonic-count " count
+Specify a monotonic count which is set to be monotonically incremented
+at every firmware update.
+
+.TP
+.B "-d\fR,\fB --dump_sig"
+Dump signature data into *.p7 file
+
+.PP
+.SH FILES
+.TP
+.I /EFI/UpdateCapsule
+The directory in which all capsule files be placed
+
+.SH SEE ALSO
+.BR mkimage (1)
+
+.SH AUTHORS
+Written by AKASHI Takahiro <takahiro.akashi@linaro.org>
+
+.SH HOMEPAGE
+http://www.denx.de/wiki/U-Boot/WebHome
diff --git a/doc/mkfwumdata.1 b/doc/mkfwumdata.1
new file mode 100644
index 00000000000..2ed0fb100b8
--- /dev/null
+++ b/doc/mkfwumdata.1
@@ -0,0 +1,103 @@
+.\" SPDX-License-Identifier: GPL-2.0-or-later
+.\" Copyright (C) 2023 Jassi Brar <jaswinder.singh@linaro.org>
+.TH MKFWUMDATA 1 2023-04-10 U-Boot
+.SH NAME
+mkfwumdata \- create FWU metadata image
+.
+.SH SYNOPSIS
+.SY mkfwumdata
+.OP \-v version
+.OP \-a activeidx
+.OP \-p previousidx
+.OP \-g
+.OP \-V vendor-file
+.BI \-i\~ imagecount
+.BI \-b\~ bankcount
+.I UUIDs
+.I outputimage
+.YS
+.SY mkfwumdata
+.B \-h
+.YS
+.
+.SH DESCRIPTION
+.B mkfwumdata
+creates metadata info to be used with FWU.
+.
+.SH OPTIONS
+.TP
+.B \-h
+Print usage information and exit.
+.
+.TP
+.B \-v
+Set 
+.IR version
+as the metadata version to generate. Valid values 1 or 2.
+.
+.TP
+.B \-a
+Set 
+.IR activeidx
+as the currently active Bank. Default is 0.
+.
+.TP
+.B \-p
+Set 
+.IR previousidx
+as the previous active Bank. Default is
+.IR activeidx "-1"
+or
+.IR bankcount "-1,"
+whichever is non-negative.
+.
+.TP
+.B \-g
+Convert the
+.IR UUIDs
+as GUIDs before use.
+.
+.TP
+.B \-V
+Pass
+.IR vendor-file
+for appending vendor data to the metadata. Supported only with version 2.
+.
+.TP
+.B \-i
+Specify there are
+.IR imagecount
+images in each bank.
+.
+.TP
+.B \-b
+Specify there are a total of
+.IR bankcount
+banks.
+.
+.TP
+.IR UUIDs
+Comma-separated list of UUIDs required to create the metadata :-
+location_uuid,image_type_uuid,<images per bank uuid list of all banks>
+.
+.TP
+.IR outputimage
+Specify the name of the metadata image file to be created.
+.
+.SH BUGS
+Please report bugs to the
+.UR https://\:source\:.denx\:.de/\:u-boot/\:u-boot/\:issues
+U-Boot bug tracker
+.UE .
+.SH EXAMPLES
+Create a metadata image with 2 banks and 1 image/bank, BankAct=0, BankPrev=1:
+.PP
+.EX
+.in +4
+$ \c
+.B mkfwumdata \-v 2 \-a 0 \-p 1 \-b 2 \-i 1 \\\\\&
+.in +6
+.B 17e86d77-41f9-4fd7-87ec-a55df9842de5,\\\\\&
+.B 10c36d7d-ca52-b843-b7b9-f9d6c501d108,\\\\\&
+.B 5a66a702-99fd-4fef-a392-c26e261a2828,a8f868a1-6e5c-4757-878d-ce63375ef2c0 \\\\\&
+.B fwu-mdata.img
diff --git a/doc/mkimage.1 b/doc/mkimage.1
new file mode 100644
index 00000000000..d0a038a880a
--- /dev/null
+++ b/doc/mkimage.1
@@ -0,0 +1,890 @@
+.\" SPDX-License-Identifier: GPL-2.0
+.\" Copyright (C) 2022 Sean Anderson <seanga2@gmail.com>
+.\" Copyright (C) 2013-20 Simon Glass <sjg@chromium.org>
+.\" Copyright (C) 2010 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+.\" Copyright (C) 2010 Wolfgang Denk <wd@denx.de>
+.TH MKIMAGE 1 2022-06-11 U-Boot
+.
+.SH NAME
+mkimage \- generate images for U-Boot
+.SH SYNOPSIS
+.SY mkimage
+.OP \-T type
+.BI \-l\~ image-file-name
+.YS
+.
+.SY mkimage
+.RI [ option\~ .\|.\|.\&]
+.OP \-T type
+.I image-file-name
+.YS
+.
+.SY mkimage
+.RI [ option\~ .\|.\|.\&]
+.BI \-f\~ image-tree-source-file\c
+.RB | auto\c
+.RB | auto-conf
+.I image-file-name
+.YS
+.
+.SY mkimage
+.RI [ option\~ .\|.\|.\&]
+.BI \-F\~ image-file-name
+.YS
+.
+.SH DESCRIPTION
+The
+.B mkimage
+command is used to create images for use with the U-Boot boot loader.  These
+images can contain the Linux kernel, device tree blob, root file system image,
+firmware images etc., either separate or combined.
+.P
+.B mkimage
+supports many image formats. Some of these formats may be used by embedded boot
+firmware to load U-Boot. Others may be used by U-Boot to load Linux (or some
+other kernel):
+.P
+The legacy image format concatenates the individual parts (for example, kernel
+image, device tree blob and ramdisk image) and adds a 64 byte header containing
+information about the target architecture, operating system, image type,
+compression method, entry points, time stamp, checksums, etc.
+.P
+The new
+.I FIT
+(Flattened Image Tree) format allows for more flexibility in handling images of
+various types and also enhances integrity protection of images with stronger
+checksums. It also supports verified boot.
+.
+.SH OPTIONS
+.
+.SS General options
+.
+.TP
+.B \-h
+.TQ
+.B \-\-help
+Print a help message and exit.
+.
+.TP
+.B \-l
+.TQ
+.B \-\-list
+.B mkimage
+lists the information contained in the header of an existing U-Boot image.
+.
+.TP
+.B \-s
+.TQ
+.B \-\-no\-copy
+Don't copy in the image data. Depending on the image type, this may create
+just the header, everything but the image data, or nothing at all.
+.
+.TP
+.BI \-T " image-type"
+.TQ
+.BI \-\-type " image-type"
+Parse image file as
+.IR image-type .
+Pass
+.B list
+as
+.I image-type
+to see the list of supported image types. If this option is absent, then it
+defaults to
+.B kernel
+(legacy image). If this option is absent when
+.B \-l
+is passed, then
+.B mkimage
+will attempt to automatically detect the image type. Not all image types support
+automatic detection, so it may be necessary to pass
+.B \-T
+explicitly.
+.IP
+When creating a FIT image with
+.BR \-f ,
+the image type is always set to
+.BR flat_dt .
+In this case,
+.B \-T
+specifies the image node's \(oqtype\(cq property. If
+.B \-T
+is absent, then the \(oqtype\(cq property will default to
+.BR kernel .
+.
+.TP
+.B \-q
+.TQ
+.B \-\-quiet
+Quiet. Don't print the image header.
+.
+.TP
+.B \-v
+.TQ
+.B \-\-verbose
+Verbose. Print file names as they are added to the image.
+.
+.TP
+.B \-V
+.TQ
+.B \-\-version
+Print version information and exit.
+.
+.SS General image-creation options
+.
+.TP
+.BI \-A " architecture"
+.TQ
+.BI \-\-architecture " architecture"
+Set the architecture. Pass
+.B \-h
+as the architecture to see the list of supported architectures. If
+.B \-A
+is absent, it defaults to
+.BR ppc .
+.
+.TP
+.BI \-O " os"
+.TQ
+.BI \-\-os " os"
+Set the operating system. The U-Boot
+.I bootm
+command changes boot method based on the OS type.
+Pass
+.B \-h
+as the
+.I os
+to see the list of supported OSs. If
+.B \-O
+is absent, it defaults to
+.BR linux .
+.
+.TP
+.BI \-C " compression-type"
+.TQ
+.BI \-\-compression " compression-type"
+Set the compression type. The image data should have already been compressed
+using this compression type.
+.B mkimage
+will not automatically compress image data.
+Pass
+.B \-h
+as the
+.I compression-type
+to see the list of supported compression types. If
+.B \-C
+is absent, it defaults to
+.BR gzip .
+.
+.TP
+.BI \-a " load-address"
+.TQ
+.BI \-\-load\-address " load-address"
+Set the absolute address to load the image data to.
+.I load-address
+will be interpreted as a hexadecimal number.
+.
+.TP
+.BI \-e " entry-point"
+.TQ
+.BI \-\-entry\-point " entry-point"
+Set the absolute address of the image entry point. The U-Boot
+.I bootm
+command will jump to this address after loading the image.
+.I entry-point
+will be interpreted as a hexadecimal number.
+.
+.TP
+.BI \-n " primary-configuration"
+.TQ
+.BI \-\-config " primary-configuration"
+Images may require additional configuration not specified with other options,
+often in a image-type-specific format. The image types which support this
+option and the format of their configuration are listed in
+.BR CONFIGURATION .
+.
+.TP
+.BI \-R " secondary-configuration"
+.TQ
+.BI \-\-secondary\-config " secondary-configuration"
+Some image types support a second set of configuration data. The image types
+which support secondary configuration and the formap of their configuration are
+listed in
+.BR CONFIGURATION .
+.
+.TP
+.BI \-d " image-data-file"
+.TQ
+.BI \-\-image " image-data-file"
+Use image data from
+.IR image-data-file .
+If the
+.I image-type
+is
+.BR multi ,
+then multiple images may be specified, separated by colons:
+.RS
+.IP
+.IR image-data-file [\fB:\fP image-data-file .\|.\|.]
+.RE
+.
+.TP
+.B \-x
+.TQ
+.B \-\-xip
+Set the
+.I XIP
+(execute in place) flag. The U-Boot
+.I bootm
+command will not load the image data, and instead will assume it is already
+accessible at the load address (such as via memory-mapped flash).
+.
+.SS Options for creating FIT images
+.
+.TP
+.BI \-b " device-tree-file"
+.TQ
+.BI \-\-device\-tree " device-tree-file"
+Appends the device tree binary file (.dtb) to the FIT.
+.
+.TP
+.BI \-c " comment"
+.TQ
+.BI \-\-comment " comment"
+Specifies a comment to be added when signing. This is typically a message which
+describes how the image was signed or some other useful information.
+.
+.TP
+.BI \-D " dtc-options"
+.TQ
+.BI \-\-dtcopts " dtc-options"
+Provide additional options to the device tree compiler when creating the image.
+See
+.BR dtc (1)
+for documentation of possible options. If
+.B \-D
+is absent, it defaults to
+.BR "\-I dts \-O dtb \-p 500" .
+.
+.TP
+.BI \-E
+.TQ
+.BI \-\-external
+After processing, move the image data outside the FIT and store a data offset
+in the FIT. Images will be placed one after the other immediately after the FIT,
+with each one aligned to a 4-byte boundary. The existing \(oqdata\(cq property
+in each image will be replaced with \(oqdata-offset\(cq and \(oqdata-size\(cq
+properties.  A \(oqdata-offset\(cq of 0 indicates that it starts in the first
+(4-byte-aligned) byte after the FIT.
+.
+.TP
+.BI \-B " alignment"
+.TQ
+.BI \-\-alignment " alignment"
+The alignment, in hexadecimal, that external data will be aligned to. This
+option only has an effect when \-E is specified.
+.
+.TP
+.BI \-p " external-position"
+.TQ
+.BI \-\-position " external-position"
+Place external data at a static external position. Instead of writing a
+\(oqdata-offset\(cq property defining the offset from the end of the FIT,
+.B \-p
+will use \(oqdata-position\(cq as the absolute position from the base of the
+FIT. See
+.B \-E
+for details on using external data.
+.
+.TP
+\fB\-f \fIimage-tree-source-file\fR | \fBauto\fR | \fBauto-conf
+.TQ
+\fB\-\-fit \fIimage-tree-source-file\fR | \fBauto\fR | \fBauto-conf
+Image tree source file that describes the structure and contents of the
+FIT image.
+.IP
+In some simple cases, the image tree source can be generated automatically. To
+use this feature, pass
+.BR "\-f auto" .
+The
+.BR \-d ,
+.BR \-A ,
+.BR \-O ,
+.BR \-T ,
+.BR \-C ,
+.BR \-a ,
+and
+.B \-e
+options may be used to specify the image to include in the FIT and its
+attributes. No
+.I image-tree-source-file
+is required. The
+.BR \-g ,
+.BR \-o ,
+and
+.B \-k
+or
+.B \-G
+options may be used to get \(oqimages\(cq signed subnodes in the generated
+auto FIT. Instead, to get \(oqconfigurations\(cq signed subnodes and
+\(oqimages\(cq hashed subnodes, pass
+.BR "\-f auto-conf".
+In this case
+.BR \-g ,
+.BR \-o ,
+and
+.B \-k
+or
+.B \-G
+are mandatory options.
+.
+.TP
+.B \-F
+.TQ
+.B \-\-update
+Indicates that an existing FIT image should be modified. No dtc compilation will
+be performed and
+.B \-f
+should not be passed. This can be used to sign images with additional keys
+after initial image creation.
+.
+.TP
+.BI \-i " ramdisk-file"
+.TQ
+.BI \-\-initramfs " ramdisk-file"
+Append a ramdisk or initramfs file to the image.
+.
+.TP
+.BI \-k " key-directory"
+.TQ
+.BI \-\-key\-dir " key-directory"
+Specifies the directory containing keys to use for signing. This directory
+should contain a private key file
+.IR name .key
+for use with signing, and a certificate
+.IR name .crt
+(containing the public key) for use with verification. The public key is only
+necessary when embedding it into another device tree using
+.BR \-K .
+.I name
+is the value of the signature node's \(oqkey-name-hint\(cq property.
+.
+.TP
+.BI \-G " key-file"
+.TQ
+.BI \-\-key\-file " key-file"
+Specifies the private key file to use when signing. This option may be used
+instead of \-k. Useful when the private key file basename does not match
+\(oqkey-name-hint\(cq value. But note that it may lead to unexpected results
+when used together with -K and/or -k options.
+.
+.TP
+.BI \-K " key-destination"
+.TQ
+.BI \-\-key\-dest " key-destination"
+Specifies a compiled device tree binary file (typically .dtb) to write
+public key information into. When a private key is used to sign an image,
+the corresponding public key is written into this file for for run-time
+verification. Typically the file here is the device tree binary used by
+CONFIG_OF_CONTROL in U-Boot.
+.
+.TP
+.BI \-g " key-name-hint"
+.TQ
+.BI \-\-key\-name\-hint " key-name-hint"
+Specifies the value of signature node \(oqkey-name-hint\(cq property for
+an automatically generated FIT image. It makes sense only when used with
+.B "\-f auto"
+or
+.BR "\-f auto-conf".
+This option also indicates that the images or configurations included in
+the FIT should be signed. If this option is specified, then
+.B \-o
+must be specified as well.
+.
+.TP
+.BI \-o " checksum" , crypto
+.TQ
+.BI \-\-algo " checksum" , crypto
+Specifies the algorithm to be used for signing a FIT image, overriding value
+taken from the signature node \(oqalgo\(cq property in the
+.IR image-tree-source-file .
+It is mandatory for automatically generated FIT.
+.IP
+The valid values for
+.I checksum
+are:
+.RS
+.IP
+.TS
+lb.
+sha1
+sha256
+sha384
+sha512
+.TE
+.RE
+.IP
+The valid values for
+.I crypto
+are:
+.RS
+.IP
+.TS
+lb.
+rsa2048
+rsa3072
+rsa4096
+ecdsa256
+.TE
+.RE
+.
+.TP
+.B \-r
+.TQ
+.B \-\-key\-required
+Specifies that keys used to sign the FIT are required. This means that images
+or configurations signatures must be verified before using them (i.e. to
+boot). Without this option, the verification will be optional (useful for
+testing but not for release). It makes sense only when used with
+.BR \-K.
+When both, images and configurations, are signed, \(oqrequired\(cq property
+value will be "conf".
+.
+.TP
+.BI \-N " engine"
+.TQ
+.BI \-\-engine " engine"
+The openssl engine to use when signing and verifying the image. For a complete
+list of available engines, refer to
+.BR engine (1).
+.
+.TP
+.B \-t
+.TQ
+.B \-\-touch
+Update the timestamp in the FIT.
+.IP
+Normally the FIT timestamp is created the first time mkimage runs,
+when converting the source .its to the binary .fit file. This corresponds to
+using
+.BR -f .
+But if the original input to mkimage is a binary file (already compiled), then
+the timestamp is assumed to have been set previously.
+.
+.SH CONFIGURATION
+This section documents the formats of the primary and secondary configuration
+options for each image type which supports them.
+.
+.SS aisimage
+The primary configuration is a file containing a series of
+.I AIS
+(Application Image Script) commands, one per line. Each command has the form
+.RS
+.P
+.IR "command argument " .\|.\|.
+.RE
+.P
+See
+.UR https://\:www\:.ti\:.com/\:lit/\:pdf/\:spraag0
+TI application report SPRAAG0E
+.UE
+for details.
+.
+.SS atmelimage
+The primary configuration is a comma-separated list of NAND Flash parameters of
+the form
+.RS
+.P
+\fIparameter\fB=\fIvalue\fR[\fB,\fIparameter\fB=\fIvalue\fR.\|.\|.\&]
+.RE
+.P
+Valid
+.IR parameter s
+are
+.RS
+.P
+.TS
+lb.
+usePmecc
+nbSectorPerPage
+spareSize
+eccBitReq
+sectorSize
+eccOffset
+.TE
+.RE
+.P
+and valid
+.IR value s
+are decimal numbers. See section 11.4.4.1 of the SAMA5D3 Series Data Sheet for
+valid values for each parameter.
+.
+.SS imximage
+The primary configuration is a file containing configuration commands, as
+documented in doc/\:imx/\:mkimage/\:imximage.txt of the U-Boot source.
+.
+.SS imx8image and imx8mimage
+The primary configuration is a file containing configuration commands, as
+documented in doc/\:imx/\:mkimage/\:imx8image.txt of the U-Boot source.
+.
+.SS kwbimage
+The primary configuration is a file containing configuration commands, as
+documented in doc/\:imx/\:mkimage/\:kwbimage.txt of the U-Boot source.
+.
+.SS mtk_image
+The primary configuration is a semicolon-separated list of header options of the
+form
+.RS
+.P
+\fIkey\fB=\fIvalue\fR[\fB;\fIkey\fB=\fIvalue\fR.\|.\|.\&]
+.RE
+.P
+where the valid keys are:
+.RS
+.P
+.TS
+lb lbx
+lb l.
+Key	Description
+_
+lk	T{
+If \fB1\fP, then an \fILK\fP (legacy) image header is used. Otherwise, a
+\fIBootROM\fP image header is used.
+T}
+lkname	T{
+The name of the LK image header. The maximum length is 32 ASCII characters. If
+not specified, the default value is \fBU-Boot\fP.
+T}
+media	The boot device. See below for valid values.
+nandinfo	The desired NAND device type. See below for valid values.
+arm64	If \fB1\fP, then this denotes an AArch64 image.
+hdroffset	Increase the reported size of the BRLYT header by this amount.
+.TE
+.RE
+.P
+Valid values for
+.B media
+are:
+.RS
+.P
+.TS
+lb lb
+lb l.
+Value	Description
+_
+nand	Parallel NAND flash
+snand	Serial NAND flash
+nor	Serial NOR flash
+emmc	\fIeMMC\fP (Embedded Multi-Media Card)
+sdmmc	\fISD\fP (Secure Digital) card
+.TE
+.RE
+.P
+Valid values for
+.B nandinfo
+are:
+.RS
+.P
+.TS
+lb lb lb	lb	lb
+lb l	l	l	l.
+Value	NAND type	Page size	OOB size	Total size
+_
+2k+64	Serial	2KiB	64B
+2k+120	Serial	2KiB	120B
+2k+128	Serial	2KiB	128B
+4k+256	Serial	4KiB	256B
+1g:2k+64	Parallel	2KiB	64B	1Gbit
+2g:2k+64	Parallel	2KiB	64B	2Gbit
+4g:2k+64	Parallel	2KiB	64B	4Gbit
+2g:2k+128	Parallel	2KiB	128B	2Gbit
+4g:2k+128	Parallel	2KiB	128B	4Gbit
+.TE
+.RE
+.
+.SS mxsimage
+The primary configuration is a file containing configuration commands, as
+documented in doc/\:imx/\:mkimage/\:mxsimage.txt of the U-Boot source.
+.
+.SS omapimage
+The primary configuration is the optional value
+.BR byteswap .
+If present, each 32-bit word of the image will have its bytes swapped
+(converting from little-endian to big-endian, or vice versa).
+.
+.SS pblimage
+The primary configuration is a file containing the
+.I PBI
+(Pre-Boot Image) header. Each line of the configuration has the format
+.RS
+.P
+.IR value "[ " value .\|.\|.\&]
+.RE
+.P
+Where
+.I value
+is a 32-bit hexadecimal integer. Each
+.I value
+will, after being converted to raw bytes, be literally prepended to the PBI.
+.P
+The secondary configuration is a file with the same format as the primary
+configuration file. It will be inserted into the image after the primary
+configuration data and before the image data.
+.P
+It is traditional to use the primary configuration file for the
+.I RCW
+(Reset Configuration Word), and the secondary configuration file for any
+additional PBI commands. However, it is also possible to convert an existing PBI
+to the above format and \(lqchain\(rq additional data onto the end of the
+image. This may be especially useful for creating secure boot images.
+.
+.SS rkimage
+The primary configuration is the name of the processor to generate the image
+for. Valid values are:
+.RS
+.P
+.TS
+lb.
+px30
+rk3036
+rk3066
+rk3128
+rk3188
+rk322x
+rk3288
+rk3308
+rk3328
+rk3368
+rk3399
+rv1108
+rk3568
+.TE
+.RE
+.
+.SS spkgimage
+The primary configuration file consists of lines containing key/value pairs
+delimited by whitespace. An example follows.
+.PP
+.RS
+.EX
+# Comments and blank lines may be used
+.I key1 value1
+.I key2 value2
+.EE
+.RE
+.P
+The supported
+.I key
+types are as follows.
+.TP
+.B VERSION
+.TQ
+.B NAND_ECC_BLOCK_SIZE
+.TQ
+.B NAND_ECC_ENABLE
+.TQ
+.B NAND_ECC_SCHEME
+.TQ
+.B NAND_BYTES_PER_ECC_BLOCK
+These all take a positive integer value as their argument.
+The value will be copied directly into the respective field
+of the SPKG header structure. For details on these values,
+refer to Section 7.4 of the Renesas RZ/N1 User's Manual.
+.
+.TP
+.B ADD_DUMMY_BLP
+Takes a numeric argument, which is treated as a boolean. Any nonzero
+value will cause a fake BLp security header to be included in the SPKG
+output.
+.
+.TP
+.B PADDING
+Takes a positive integer value, with an optional
+.B K
+or
+.B M
+suffix, indicating KiB / MiB respectively.
+The output SPKG file will be padded to a multiple of this value.
+.
+.SS sunxi_egon
+The primary configuration is the name to use for the device tree.
+.
+.SS ublimage
+The primary configuration is a file containing configuration commands, as
+documented in doc/\:README.ublimage of the U-Boot source.
+.
+.SS zynqimage and zynqmpimage
+For
+.BR zynqmpimage ,
+the primary configuration is a file containing the
+.I PMUFW
+(Power Management Unit Firmware).
+.B zynqimage
+does not use the primary configuration.
+.P
+For both image types, the secondary configuration is a file containinig
+initialization parameters, one per line. Each parameter has the form
+.RS
+.P
+.I address data
+.RE
+.P
+where
+.I address
+and
+.I data
+are hexadecimal integers. The boot ROM will write each
+.I data
+to
+.I address
+when loading the image. At most 256 parameters may be specified in this
+manner.
+.
+.SH BUGS
+Please report bugs to the
+.UR https://\:source\:.denx\:.de/\:u-boot/\:u-boot/\:issues
+U-Boot bug tracker
+.UE .
+.SH EXAMPLES
+.\" Reduce the width of the tab stops to something reasonable
+.ta T 1i
+List image information:
+.RS
+.P
+.EX
+\fBmkimage \-l uImage
+.EE
+.RE
+.P
+Create legacy image with compressed PowerPC Linux kernel:
+.RS
+.P
+.EX
+\fBmkimage \-A powerpc \-O linux \-T kernel \-C gzip \\
+	\-a 0 \-e 0 \-n Linux \-d vmlinux.gz uImage
+.EE
+.RE
+.P
+Create FIT image with compressed PowerPC Linux kernel:
+.RS
+.P
+.EX
+\fBmkimage \-f kernel.its kernel.itb
+.EE
+.RE
+.P
+Create FIT image with compressed kernel and sign it with keys in the
+/public/signing\-keys directory. Add corresponding public keys into u\-boot.dtb,
+skipping those for which keys cannot be found. Also add a comment.
+.RS
+.P
+.EX
+\fBmkimage \-f kernel.its \-k /public/signing\-keys \-K u\-boot.dtb \\
+	\-c \(dqKernel 3.8 image for production devices\(dq kernel.itb
+.EE
+.RE
+.P
+Add public key to u\-boot.dtb without needing a FIT to sign. This will also
+create a FIT containing an images node with no data named unused.itb.
+.RS
+.P
+.EX
+\fBmkimage \-f auto \-d /dev/null \-k /public/signing\-keys \-g dev \\
+	\-o sha256,rsa2048 \-K u\-boot.dtb unused.itb
+.EE
+.RE
+.P
+Add public key with required = "conf" property to u\-boot.dtb without needing
+a FIT to sign. This will also create a useless FIT named unused.itb.
+.RS
+.P
+.EX
+\fBmkimage \-f auto-conf \-d /dev/null \-k /public/signing\-keys \-g dev \\
+	\-o sha256,rsa2048 \-K u\-boot.dtb -r unused.itb
+.EE
+.RE
+.P
+Update an existing FIT image, signing it with additional keys.
+Add corresponding public keys into u\-boot.dtb. This will resign all images
+with keys that are available in the new directory. Images that request signing
+with unavailable keys are skipped.
+.RS
+.P
+.EX
+\fBmkimage \-F \-k /secret/signing\-keys \-K u\-boot.dtb \\
+	\-c \(dqKernel 3.8 image for production devices\(dq kernel.itb
+.EE
+.RE
+.P
+Create a FIT image containing a kernel, using automatic mode. No .its file
+is required.
+.RS
+.P
+.EX
+\fBmkimage \-f auto \-A arm \-O linux \-T kernel \-C none \-a 43e00000 \-e 0 \\
+	\-c \(dqKernel 4.4 image for production devices\(dq \-d vmlinuz kernel.itb
+.EE
+.RE
+.P
+Create a FIT image containing a kernel and some device tree files, using
+automatic mode. No .its file is required.
+.RS
+.P
+.EX
+\fBmkimage \-f auto \-A arm \-O linux \-T kernel \-C none \-a 43e00000 \-e 0 \\
+	\-c \(dqKernel 4.4 image for production devices\(dq \-d vmlinuz \\
+	\-b /path/to/rk3288\-firefly.dtb \-b /path/to/rk3288\-jerry.dtb kernel.itb
+.EE
+.RE
+.P
+Create a FIT image containing a signed kernel, using automatic mode. No .its
+file is required.
+.RS
+.P
+.EX
+\fBmkimage \-f auto \-A arm \-O linux \-T kernel \-C none \-a 43e00000 \-e 0 \\
+	\-d vmlinuz \-k /secret/signing\-keys \-g dev \-o sha256,rsa2048 kernel.itb
+.EE
+.RE
+.P
+Create a FIT image containing a kernel and some device tree files, signing
+each configuration, using automatic mode. Moreover, the public key needed to
+verify signatures is added to u\-boot.dtb with required = "conf" property.
+.RS
+.P
+.EX
+\fBmkimage \-f auto-conf \-A arm \-O linux \-T kernel \-C none \-a 43e00000 \\
+	\-e 0 \-d vmlinuz \-b /path/to/file\-1.dtb \-b /path/to/file\-2.dtb \\
+	\-k /folder/with/signing\-keys \-g dev \-o sha256,rsa2048 \\
+	\-K u\-boot.dtb -r kernel.itb
+.EE
+.RE
+.P
+Convert an existing FIT image from any of the three types of data storage
+(internal, external data-offset or external data-position) to another type
+of data storage.
+.RS
+.P
+.EX
+\fB// convert FIT from internal data to data-position
+\fBmkimage -p 0x20000 -F internal_data.itb
+.EE
+.EX
+\fB// convert FIT from data-position to data-offset
+\fBmkimage -E -F external_data-position.itb
+.EE
+.EX
+\fB// convert FIT from data-offset to internal data
+\fBmkimage -F external_data-offset.itb
+.EE
+.RE
+.
+.SH SEE ALSO
+.BR dtc (1),
+.BR dumpimage (1),
+.BR openssl (1),
+the\~
+.UR https://\:u-boot\:.readthedocs\:.io/\:en/\:latest/\:index.html
+U-Boot documentation
+.UE
diff --git a/doc/mvebu/armada-8k-memory.txt b/doc/mvebu/armada-8k-memory.txt
new file mode 100644
index 00000000000..f554d71e99c
--- /dev/null
+++ b/doc/mvebu/armada-8k-memory.txt
@@ -0,0 +1,55 @@
+		     Memory Layout on Armada-8k SoC's
+		     ================================
+
+The below desribes the physical memory layout for Marvell's Armada-8k SoC's.
+
+This assumes that the SoC includes Dual CP configuration, in case the flavor is using
+a single CP configuration, then all secondary-CP mappings are invalid.
+
+All "Reserved" areas below, are kept for future usage.
+
+Start		End			Use
+--------------------------------------------------------------------------
+0x00000000	0xEFFFFFFF		DRAM
+
+0xF0000000	0xF0FFFFFF		AP Internal registers space
+
+0xF1000000	0xF1FFFFFF		Reserved.
+
+0xF2000000	0xF3FFFFFF		CP-0 Internal (configuration) registers
+					space.
+
+0xF4000000	0xF5FFFFFF		CP-1 Internal (configuration) registers
+					space.
+
+0xF6000000	0xF6FFFFFF		CP-0 / PCIe#0 Memory space.
+
+0xF7000000	0xF7FFFFFF		CP-0 / PCIe#1 Memory space.
+
+0xF8000000	0xF8FFFFFF		CP-0 / PCIe#2 Memory space.
+
+0xF9000000	0xF900FFFF		CP-0 / PCIe#0 IO space.
+
+0xF9010000	0xF901FFFF		CP-0 / PCIe#1 IO space.
+
+0xF9020000	0xF902FFFF		CP-0 / PCIe#2 IO space.
+
+0xF9030000	0xF9FFFFFF		Reserved.
+
+0xFA000000	0xFAFFFFFF		CP-1 / PCIe#0 Memory space.
+
+0xFB000000	0xFBFFFFFF		CP-1 / PCIe#1 Memory space.
+
+0xFC000000	0xFCFFFFFF		CP-1 / PCIe#2 Memory space.
+
+0xFD000000	0xFD00FFFF		CP-1 / PCIe#0 IO space.
+
+0xFD010000	0xFD01FFFF		CP-1 / PCIe#1 IO space.
+
+0xFD020000	0xFD02FFFF		CP-1 / PCIe#2 IO space.
+
+0xFD030000	0xFFEFFFFF		Reserved.
+
+0xFFF00000	0xFFFFFFFF		Bootrom
+
+0x100000000	<DRAM Size>-1		DRAM
diff --git a/doc/mvebu/cmd/bubt.txt b/doc/mvebu/cmd/bubt.txt
new file mode 100644
index 00000000000..52bd3e66c51
--- /dev/null
+++ b/doc/mvebu/cmd/bubt.txt
@@ -0,0 +1,63 @@
+BUBT (Burn ATF) command
+--------------------------
+Bubt command is used to burn a new ATF image to flash device.
+
+The bubt command gets the following parameters: ATF file name, destination device and source device.
+bubt [file-name] [destination [source]]
+	- file-name		Image file name to burn. default = flash-image.bin
+	- destination		Flash to burn to [spi, nand, mmc, sata]. default = active flash
+	- source		Source to load image from [tftp, usb, mmc, sata]. default = tftp
+
+Examples:
+	bubt				- Burn flash-image.bin from tftp to active flash
+	bubt latest-spi.bin nand	- Burn latest-spi.bin from tftp to NAND flash
+
+Notes:
+- For the TFTP interface set serverip and ipaddr.
+- To burn image to SD/eMMC device, the target is defined by HW partition.
+
+Bubt command details (burn image step by-step)
+----------------------------------------------
+This section describes bubt command flow:
+
+1. Fetch the requested ATF image from an available interface (USB/SD/SATA/XDB, etc.)
+   into the DRAM, and place it at <load_address>
+   Example: when using the FAT file system on USB flash device:
+   # usb reset
+   # fatls usb 0 (see files in device)
+   # fatload usb 0 <load_address> <file_name>
+
+2. Erase the target device:
+	- NAND:		# nand erase 0 100000
+	- SPI:		# sf probe 0
+			# sf erase 0 100000
+	- SD/eMMC:	# mmc dev <dev_id> <boot_partition>
+
+Notes:
+- The eMMC has 2 boot partitions (BOOT0 and BOOT1) and a user data partition (DATA).
+  The boot partitions are numbered as partition 1 and 2 in MMC driver.
+  Number 0 is used for user data partition and should not be utilized for storing
+  boot images and U-Boot environment in RAW mode since it will break file system
+  structures usually located here.
+
+  Currently configured boot partition can be printed by command:
+  # mmc partconf 0
+  (search for BOOT_PARTITION_ACCESS output, number 7 is user data)
+
+  Change it to BOOT0:
+  # mmc partconf 0 0 1 1
+
+  Change it to BOOT1:
+  # mmc partconf 0 0 2 2
+
+  Change it to user data:
+  # mmc partconf 0 0 7 0
+
+- The partition number is ignored if the target device is SD card.
+- The boot image offset starts at block 0 for eMMC and block 1 for SD devices.
+  The block 0 on SD devices is left for MBR storage.
+
+3. Write the ATF image:
+	- NAND:		# nand write <load_address> 0 <ATF Size>
+	- SPI:		# sf write <load_address> 0 <ATF Size>
+	- SD/eMMC:	# mmc write <load_address> [0|1] <ATF Size>/<block_size>
diff --git a/doc/sphinx-static/theme_overrides.css b/doc/sphinx-static/theme_overrides.css
new file mode 100644
index 00000000000..02e11518155
--- /dev/null
+++ b/doc/sphinx-static/theme_overrides.css
@@ -0,0 +1,128 @@
+/* -*- coding: utf-8; mode: css -*-
+ *
+ * Sphinx HTML theme customization: read the doc
+ * Please don't add any color definition here, as the theme should
+ * work for both normal and dark modes.
+ */
+
+@import 'css/theme.css';
+@import 'pygments.css';
+
+/* Improve contrast and increase size for easier reading. */
+
+body {
+	font-family: sans-serif;
+	font-size: 100%;
+}
+
+h1, h2, .rst-content .toctree-wrapper p.caption, h3, h4, h5, h6, legend {
+	font-family: sans-serif;
+}
+
+div[class^="highlight"] pre {
+	font-family: monospace;
+	font-size: 100%;
+}
+
+.wy-menu-vertical {
+	font-family: sans-serif;
+}
+
+.c {
+	font-style: normal;
+}
+
+p {
+	font-size: 100%;
+}
+
+/* Interim: Code-blocks with line nos - lines and line numbers don't line up.
+ * see: https://github.com/rtfd/sphinx_rtd_theme/issues/419
+ */
+
+div[class^="highlight"] pre {
+    line-height: normal;
+}
+.rst-content .highlight > pre {
+    line-height: normal;
+}
+
+/* Keep fields from being strangely far apart due to inheirited table CSS. */
+.rst-content table.field-list th.field-name {
+    padding-top: 1px;
+    padding-bottom: 1px;
+}
+.rst-content table.field-list td.field-body {
+    padding-top: 1px;
+    padding-bottom: 1px;
+}
+
+@media screen {
+
+    /* content column
+     *
+     * RTD theme's default is 800px as max width for the content, but we have
+     * tables with tons of columns, which need the full width of the view-port.
+     */
+
+    .wy-nav-content{max-width: none; }
+
+    /* table:
+     *
+     *   - Sequences of whitespace should collapse into a single whitespace.
+     *   - make the overflow auto (scrollbar if needed)
+     *   - align caption "left" ("center" is unsuitable on vast tables)
+     */
+
+    .wy-table-responsive table td { white-space: normal; }
+    .wy-table-responsive { overflow: auto; }
+    .rst-content table.docutils caption { text-align: left; font-size: 100%; }
+
+    /* captions:
+     *
+     *   - captions should have 100% (not 85%) font size
+     *   - hide the permalink symbol as long as link is not hovered
+     */
+
+    .toc-title {
+        font-size: 150%;
+	font-weight: bold;
+    }
+
+    caption, .wy-table caption, .rst-content table.field-list caption {
+        font-size: 100%;
+    }
+    caption a.headerlink { opacity: 0; }
+    caption a.headerlink:hover { opacity: 1; }
+
+    /* Menu selection and keystrokes */
+
+    span.menuselection {
+	font-family: "Courier New", Courier, monospace
+    }
+
+    code.kbd, code.kbd span {
+	font-weight: bold;
+	font-family: "Courier New", Courier, monospace
+    }
+
+    /* fix bottom margin of lists items */
+
+    .rst-content .section ul li:last-child, .rst-content .section ul li p:last-child {
+          margin-bottom: 12px;
+    }
+
+    /* inline literal: drop the borderbox, padding and red color */
+
+    code, .rst-content tt, .rst-content code {
+        color: inherit;
+        border: none;
+        padding: unset;
+        background: inherit;
+        font-size: 85%;
+    }
+
+    .rst-content tt.literal,.rst-content tt.literal,.rst-content code.literal {
+        color: inherit;
+    }
+}
diff --git a/doc/sphinx/automarkup.py b/doc/sphinx/automarkup.py
new file mode 100644
index 00000000000..953b24b6e2b
--- /dev/null
+++ b/doc/sphinx/automarkup.py
@@ -0,0 +1,290 @@
+# SPDX-License-Identifier: GPL-2.0
+# Copyright 2019 Jonathan Corbet <corbet@lwn.net>
+#
+# Apply kernel-specific tweaks after the initial document processing
+# has been done.
+#
+from docutils import nodes
+import sphinx
+from sphinx import addnodes
+if sphinx.version_info[0] < 2 or \
+   sphinx.version_info[0] == 2 and sphinx.version_info[1] < 1:
+    from sphinx.environment import NoUri
+else:
+    from sphinx.errors import NoUri
+import re
+from itertools import chain
+
+#
+# Python 2 lacks re.ASCII...
+#
+try:
+    ascii_p3 = re.ASCII
+except AttributeError:
+    ascii_p3 = 0
+
+#
+# Regex nastiness.  Of course.
+# Try to identify "function()" that's not already marked up some
+# other way.  Sphinx doesn't like a lot of stuff right after a
+# :c:func: block (i.e. ":c:func:`mmap()`s" flakes out), so the last
+# bit tries to restrict matches to things that won't create trouble.
+#
+RE_function = re.compile(r'\b(([a-zA-Z_]\w+)\(\))', flags=ascii_p3)
+
+#
+# Sphinx 2 uses the same :c:type role for struct, union, enum and typedef
+#
+RE_generic_type = re.compile(r'\b(struct|union|enum|typedef)\s+([a-zA-Z_]\w+)',
+                             flags=ascii_p3)
+
+#
+# Sphinx 3 uses a different C role for each one of struct, union, enum and
+# typedef
+#
+RE_struct = re.compile(r'\b(struct)\s+([a-zA-Z_]\w+)', flags=ascii_p3)
+RE_union = re.compile(r'\b(union)\s+([a-zA-Z_]\w+)', flags=ascii_p3)
+RE_enum = re.compile(r'\b(enum)\s+([a-zA-Z_]\w+)', flags=ascii_p3)
+RE_typedef = re.compile(r'\b(typedef)\s+([a-zA-Z_]\w+)', flags=ascii_p3)
+
+#
+# Detects a reference to a documentation page of the form Documentation/... with
+# an optional extension
+#
+RE_doc = re.compile(r'\bDocumentation(/[\w\-_/]+)(\.\w+)*')
+
+RE_namespace = re.compile(r'^\s*..\s*c:namespace::\s*(\S+)\s*$')
+
+#
+# Reserved C words that we should skip when cross-referencing
+#
+Skipnames = [ 'for', 'if', 'register', 'sizeof', 'struct', 'unsigned' ]
+
+
+#
+# Many places in the docs refer to common system calls.  It is
+# pointless to try to cross-reference them and, as has been known
+# to happen, somebody defining a function by these names can lead
+# to the creation of incorrect and confusing cross references.  So
+# just don't even try with these names.
+#
+Skipfuncs = [ 'open', 'close', 'read', 'write', 'fcntl', 'mmap',
+              'select', 'poll', 'fork', 'execve', 'clone', 'ioctl',
+              'socket' ]
+
+c_namespace = ''
+
+def markup_refs(docname, app, node):
+    t = node.astext()
+    done = 0
+    repl = [ ]
+    #
+    # Associate each regex with the function that will markup its matches
+    #
+    markup_func_sphinx2 = {RE_doc: markup_doc_ref,
+                           RE_function: markup_c_ref,
+                           RE_generic_type: markup_c_ref}
+
+    markup_func_sphinx3 = {RE_doc: markup_doc_ref,
+                           RE_function: markup_func_ref_sphinx3,
+                           RE_struct: markup_c_ref,
+                           RE_union: markup_c_ref,
+                           RE_enum: markup_c_ref,
+                           RE_typedef: markup_c_ref}
+
+    if sphinx.version_info[0] >= 3:
+        markup_func = markup_func_sphinx3
+    else:
+        markup_func = markup_func_sphinx2
+
+    match_iterators = [regex.finditer(t) for regex in markup_func]
+    #
+    # Sort all references by the starting position in text
+    #
+    sorted_matches = sorted(chain(*match_iterators), key=lambda m: m.start())
+    for m in sorted_matches:
+        #
+        # Include any text prior to match as a normal text node.
+        #
+        if m.start() > done:
+            repl.append(nodes.Text(t[done:m.start()]))
+
+        #
+        # Call the function associated with the regex that matched this text and
+        # append its return to the text
+        #
+        repl.append(markup_func[m.re](docname, app, m))
+
+        done = m.end()
+    if done < len(t):
+        repl.append(nodes.Text(t[done:]))
+    return repl
+
+#
+# In sphinx3 we can cross-reference to C macro and function, each one with its
+# own C role, but both match the same regex, so we try both.
+#
+def markup_func_ref_sphinx3(docname, app, match):
+    class_str = ['c-func', 'c-macro']
+    reftype_str = ['function', 'macro']
+
+    cdom = app.env.domains['c']
+    #
+    # Go through the dance of getting an xref out of the C domain
+    #
+    base_target = match.group(2)
+    target_text = nodes.Text(match.group(0))
+    xref = None
+    possible_targets = [base_target]
+    # Check if this document has a namespace, and if so, try
+    # cross-referencing inside it first.
+    if c_namespace:
+        possible_targets.insert(0, c_namespace + "." + base_target)
+
+    if base_target not in Skipnames:
+        for target in possible_targets:
+            if target not in Skipfuncs:
+                for class_s, reftype_s in zip(class_str, reftype_str):
+                    lit_text = nodes.literal(classes=['xref', 'c', class_s])
+                    lit_text += target_text
+                    pxref = addnodes.pending_xref('', refdomain = 'c',
+                                                  reftype = reftype_s,
+                                                  reftarget = target, modname = None,
+                                                  classname = None)
+                    #
+                    # XXX The Latex builder will throw NoUri exceptions here,
+                    # work around that by ignoring them.
+                    #
+                    try:
+                        xref = cdom.resolve_xref(app.env, docname, app.builder,
+                                                 reftype_s, target, pxref,
+                                                 lit_text)
+                    except NoUri:
+                        xref = None
+
+                    if xref:
+                        return xref
+
+    return target_text
+
+def markup_c_ref(docname, app, match):
+    class_str = {# Sphinx 2 only
+                 RE_function: 'c-func',
+                 RE_generic_type: 'c-type',
+                 # Sphinx 3+ only
+                 RE_struct: 'c-struct',
+                 RE_union: 'c-union',
+                 RE_enum: 'c-enum',
+                 RE_typedef: 'c-type',
+                 }
+    reftype_str = {# Sphinx 2 only
+                   RE_function: 'function',
+                   RE_generic_type: 'type',
+                   # Sphinx 3+ only
+                   RE_struct: 'struct',
+                   RE_union: 'union',
+                   RE_enum: 'enum',
+                   RE_typedef: 'type',
+                   }
+
+    cdom = app.env.domains['c']
+    #
+    # Go through the dance of getting an xref out of the C domain
+    #
+    base_target = match.group(2)
+    target_text = nodes.Text(match.group(0))
+    xref = None
+    possible_targets = [base_target]
+    # Check if this document has a namespace, and if so, try
+    # cross-referencing inside it first.
+    if c_namespace:
+        possible_targets.insert(0, c_namespace + "." + base_target)
+
+    if base_target not in Skipnames:
+        for target in possible_targets:
+            if not (match.re == RE_function and target in Skipfuncs):
+                lit_text = nodes.literal(classes=['xref', 'c', class_str[match.re]])
+                lit_text += target_text
+                pxref = addnodes.pending_xref('', refdomain = 'c',
+                                              reftype = reftype_str[match.re],
+                                              reftarget = target, modname = None,
+                                              classname = None)
+                #
+                # XXX The Latex builder will throw NoUri exceptions here,
+                # work around that by ignoring them.
+                #
+                try:
+                    xref = cdom.resolve_xref(app.env, docname, app.builder,
+                                             reftype_str[match.re], target, pxref,
+                                             lit_text)
+                except NoUri:
+                    xref = None
+
+                if xref:
+                    return xref
+
+    return target_text
+
+#
+# Try to replace a documentation reference of the form Documentation/... with a
+# cross reference to that page
+#
+def markup_doc_ref(docname, app, match):
+    stddom = app.env.domains['std']
+    #
+    # Go through the dance of getting an xref out of the std domain
+    #
+    target = match.group(1)
+    xref = None
+    pxref = addnodes.pending_xref('', refdomain = 'std', reftype = 'doc',
+                                  reftarget = target, modname = None,
+                                  classname = None, refexplicit = False)
+    #
+    # XXX The Latex builder will throw NoUri exceptions here,
+    # work around that by ignoring them.
+    #
+    try:
+        xref = stddom.resolve_xref(app.env, docname, app.builder, 'doc',
+                                   target, pxref, None)
+    except NoUri:
+        xref = None
+    #
+    # Return the xref if we got it; otherwise just return the plain text.
+    #
+    if xref:
+        return xref
+    else:
+        return nodes.Text(match.group(0))
+
+def get_c_namespace(app, docname):
+    source = app.env.doc2path(docname)
+    with open(source) as f:
+        for l in f:
+            match = RE_namespace.search(l)
+            if match:
+                return match.group(1)
+    return ''
+
+def auto_markup(app, doctree, name):
+    global c_namespace
+    c_namespace = get_c_namespace(app, name)
+    #
+    # This loop could eventually be improved on.  Someday maybe we
+    # want a proper tree traversal with a lot of awareness of which
+    # kinds of nodes to prune.  But this works well for now.
+    #
+    # The nodes.literal test catches ``literal text``, its purpose is to
+    # avoid adding cross-references to functions that have been explicitly
+    # marked with cc:func:.
+    #
+    for para in doctree.traverse(nodes.paragraph):
+        for node in para.traverse(nodes.Text):
+            if not isinstance(node.parent, nodes.literal):
+                node.parent.replace(node, markup_refs(name, app, node))
+
+def setup(app):
+    app.connect('doctree-resolved', auto_markup)
+    return {
+        'parallel_read_safe': True,
+        'parallel_write_safe': True,
+        }
diff --git a/doc/sphinx/cdomain.py b/doc/sphinx/cdomain.py
new file mode 100644
index 00000000000..491a7ed5f47
--- /dev/null
+++ b/doc/sphinx/cdomain.py
@@ -0,0 +1,259 @@
+# -*- coding: utf-8; mode: python -*-
+# pylint: disable=W0141,C0113,C0103,C0325
+u"""
+    cdomain
+    ~~~~~~~
+
+    Replacement for the sphinx c-domain.
+
+    :copyright:  Copyright (C) 2016  Markus Heiser
+    :license:    GPL Version 2, June 1991 see Linux/COPYING for details.
+
+    List of customizations:
+
+    * Moved the *duplicate C object description* warnings for function
+      declarations in the nitpicky mode. See Sphinx documentation for
+      the config values for ``nitpick`` and ``nitpick_ignore``.
+
+    * Add option 'name' to the "c:function:" directive.  With option 'name' the
+      ref-name of a function can be modified. E.g.::
+
+          .. c:function:: int ioctl( int fd, int request )
+             :name: VIDIOC_LOG_STATUS
+
+      The func-name (e.g. ioctl) remains in the output but the ref-name changed
+      from 'ioctl' to 'VIDIOC_LOG_STATUS'. The function is referenced by::
+
+          * :c:func:`VIDIOC_LOG_STATUS` or
+          * :any:`VIDIOC_LOG_STATUS` (``:any:`` needs sphinx 1.3)
+
+     * Handle signatures of function-like macros well. Don't try to deduce
+       arguments types of function-like macros.
+
+"""
+
+from docutils import nodes
+from docutils.parsers.rst import directives
+
+import sphinx
+from sphinx import addnodes
+from sphinx.domains.c import c_funcptr_sig_re, c_sig_re
+from sphinx.domains.c import CObject as Base_CObject
+from sphinx.domains.c import CDomain as Base_CDomain
+from itertools import chain
+import re
+
+__version__  = '1.1'
+
+# Get Sphinx version
+major, minor, patch = sphinx.version_info[:3]
+
+# Namespace to be prepended to the full name
+namespace = None
+
+#
+# Handle trivial newer c domain tags that are part of Sphinx 3.1 c domain tags
+# - Store the namespace if ".. c:namespace::" tag is found
+#
+RE_namespace = re.compile(r'^\s*..\s*c:namespace::\s*(\S+)\s*$')
+
+def markup_namespace(match):
+    global namespace
+
+    namespace = match.group(1)
+
+    return ""
+
+#
+# Handle c:macro for function-style declaration
+#
+RE_macro = re.compile(r'^\s*..\s*c:macro::\s*(\S+)\s+(\S.*)\s*$')
+def markup_macro(match):
+    return ".. c:function:: " + match.group(1) + ' ' + match.group(2)
+
+#
+# Handle newer c domain tags that are evaluated as .. c:type: for
+# backward-compatibility with Sphinx < 3.0
+#
+RE_ctype = re.compile(r'^\s*..\s*c:(struct|union|enum|enumerator|alias)::\s*(.*)$')
+
+def markup_ctype(match):
+    return ".. c:type:: " + match.group(2)
+
+#
+# Handle newer c domain tags that are evaluated as :c:type: for
+# backward-compatibility with Sphinx < 3.0
+#
+RE_ctype_refs = re.compile(r':c:(var|struct|union|enum|enumerator)::`([^\`]+)`')
+def markup_ctype_refs(match):
+    return ":c:type:`" + match.group(2) + '`'
+
+#
+# Simply convert :c:expr: and :c:texpr: into a literal block.
+#
+RE_expr = re.compile(r':c:(expr|texpr):`([^\`]+)`')
+def markup_c_expr(match):
+    return '\\ ``' + match.group(2) + '``\\ '
+
+#
+# Parse Sphinx 3.x C markups, replacing them by backward-compatible ones
+#
+def c_markups(app, docname, source):
+    result = ""
+    markup_func = {
+        RE_namespace: markup_namespace,
+        RE_expr: markup_c_expr,
+        RE_macro: markup_macro,
+        RE_ctype: markup_ctype,
+        RE_ctype_refs: markup_ctype_refs,
+    }
+
+    lines = iter(source[0].splitlines(True))
+    for n in lines:
+        match_iterators = [regex.finditer(n) for regex in markup_func]
+        matches = sorted(chain(*match_iterators), key=lambda m: m.start())
+        for m in matches:
+            n = n[:m.start()] + markup_func[m.re](m) + n[m.end():]
+
+        result = result + n
+
+    source[0] = result
+
+#
+# Now implements support for the cdomain namespacing logic
+#
+
+def setup(app):
+
+    # Handle easy Sphinx 3.1+ simple new tags: :c:expr and .. c:namespace::
+    app.connect('source-read', c_markups)
+
+    if (major == 1 and minor < 8):
+        app.override_domain(CDomain)
+    else:
+        app.add_domain(CDomain, override=True)
+
+    return dict(
+        version = __version__,
+        parallel_read_safe = True,
+        parallel_write_safe = True
+    )
+
+class CObject(Base_CObject):
+
+    """
+    Description of a C language object.
+    """
+    option_spec = {
+        "name" : directives.unchanged
+    }
+
+    def handle_func_like_macro(self, sig, signode):
+        u"""Handles signatures of function-like macros.
+
+        If the objtype is 'function' and the the signature ``sig`` is a
+        function-like macro, the name of the macro is returned. Otherwise
+        ``False`` is returned.  """
+
+        global namespace
+
+        if not self.objtype == 'function':
+            return False
+
+        m = c_funcptr_sig_re.match(sig)
+        if m is None:
+            m = c_sig_re.match(sig)
+            if m is None:
+                raise ValueError('no match')
+
+        rettype, fullname, arglist, _const = m.groups()
+        arglist = arglist.strip()
+        if rettype or not arglist:
+            return False
+
+        arglist = arglist.replace('`', '').replace('\\ ', '') # remove markup
+        arglist = [a.strip() for a in arglist.split(",")]
+
+        # has the first argument a type?
+        if len(arglist[0].split(" ")) > 1:
+            return False
+
+        # This is a function-like macro, it's arguments are typeless!
+        signode  += addnodes.desc_name(fullname, fullname)
+        paramlist = addnodes.desc_parameterlist()
+        signode  += paramlist
+
+        for argname in arglist:
+            param = addnodes.desc_parameter('', '', noemph=True)
+            # separate by non-breaking space in the output
+            param += nodes.emphasis(argname, argname)
+            paramlist += param
+
+        if namespace:
+            fullname = namespace + "." + fullname
+
+        return fullname
+
+    def handle_signature(self, sig, signode):
+        """Transform a C signature into RST nodes."""
+
+        global namespace
+
+        fullname = self.handle_func_like_macro(sig, signode)
+        if not fullname:
+            fullname = super(CObject, self).handle_signature(sig, signode)
+
+        if "name" in self.options:
+            if self.objtype == 'function':
+                fullname = self.options["name"]
+            else:
+                # FIXME: handle :name: value of other declaration types?
+                pass
+        else:
+            if namespace:
+                fullname = namespace + "." + fullname
+
+        return fullname
+
+    def add_target_and_index(self, name, sig, signode):
+        # for C API items we add a prefix since names are usually not qualified
+        # by a module name and so easily clash with e.g. section titles
+        targetname = 'c.' + name
+        if targetname not in self.state.document.ids:
+            signode['names'].append(targetname)
+            signode['ids'].append(targetname)
+            signode['first'] = (not self.names)
+            self.state.document.note_explicit_target(signode)
+            inv = self.env.domaindata['c']['objects']
+            if (name in inv and self.env.config.nitpicky):
+                if self.objtype == 'function':
+                    if ('c:func', name) not in self.env.config.nitpick_ignore:
+                        self.state_machine.reporter.warning(
+                            'duplicate C object description of %s, ' % name +
+                            'other instance in ' + self.env.doc2path(inv[name][0]),
+                            line=self.lineno)
+            inv[name] = (self.env.docname, self.objtype)
+
+        indextext = self.get_index_text(name)
+        if indextext:
+            if major == 1 and minor < 4:
+                # indexnode's tuple changed in 1.4
+                # https://github.com/sphinx-doc/sphinx/commit/e6a5a3a92e938fcd75866b4227db9e0524d58f7c
+                self.indexnode['entries'].append(
+                    ('single', indextext, targetname, ''))
+            else:
+                self.indexnode['entries'].append(
+                    ('single', indextext, targetname, '', None))
+
+class CDomain(Base_CDomain):
+
+    """C language domain."""
+    name = 'c'
+    label = 'C'
+    directives = {
+        'function': CObject,
+        'member':   CObject,
+        'macro':    CObject,
+        'type':     CObject,
+        'var':      CObject,
+    }
diff --git a/doc/sphinx/kernel_abi.py b/doc/sphinx/kernel_abi.py
new file mode 100644
index 00000000000..32c50e496b5
--- /dev/null
+++ b/doc/sphinx/kernel_abi.py
@@ -0,0 +1,194 @@
+# -*- coding: utf-8; mode: python -*-
+# coding=utf-8
+# SPDX-License-Identifier: GPL-2.0
+#
+u"""
+    kernel-abi
+    ~~~~~~~~~~
+
+    Implementation of the ``kernel-abi`` reST-directive.
+
+    :copyright:  Copyright (C) 2016  Markus Heiser
+    :copyright:  Copyright (C) 2016-2020  Mauro Carvalho Chehab
+    :maintained-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
+    :license:    GPL Version 2, June 1991 see Linux/COPYING for details.
+
+    The ``kernel-abi`` (:py:class:`KernelCmd`) directive calls the
+    scripts/get_abi.pl script to parse the Kernel ABI files.
+
+    Overview of directive's argument and options.
+
+    .. code-block:: rst
+
+        .. kernel-abi:: <ABI directory location>
+            :debug:
+
+    The argument ``<ABI directory location>`` is required. It contains the
+    location of the ABI files to be parsed.
+
+    ``debug``
+      Inserts a code-block with the *raw* reST. Sometimes it is helpful to see
+      what reST is generated.
+
+"""
+
+import codecs
+import os
+import subprocess
+import sys
+import re
+import kernellog
+
+from os import path
+
+from docutils import nodes, statemachine
+from docutils.statemachine import ViewList
+from docutils.parsers.rst import directives, Directive
+from docutils.utils.error_reporting import ErrorString
+
+#
+# AutodocReporter is only good up to Sphinx 1.7
+#
+import sphinx
+
+Use_SSI = sphinx.__version__[:3] >= '1.7'
+if Use_SSI:
+    from sphinx.util.docutils import switch_source_input
+else:
+    from sphinx.ext.autodoc import AutodocReporter
+
+__version__  = '1.0'
+
+def setup(app):
+
+    app.add_directive("kernel-abi", KernelCmd)
+    return dict(
+        version = __version__
+        , parallel_read_safe = True
+        , parallel_write_safe = True
+    )
+
+class KernelCmd(Directive):
+
+    u"""KernelABI (``kernel-abi``) directive"""
+
+    required_arguments = 1
+    optional_arguments = 2
+    has_content = False
+    final_argument_whitespace = True
+
+    option_spec = {
+        "debug"     : directives.flag,
+        "rst"       : directives.unchanged
+    }
+
+    def run(self):
+
+        doc = self.state.document
+        if not doc.settings.file_insertion_enabled:
+            raise self.warning("docutils: file insertion disabled")
+
+        env = doc.settings.env
+        cwd = path.dirname(doc.current_source)
+        cmd = "get_abi.pl rest --enable-lineno --dir "
+        cmd += self.arguments[0]
+
+        if 'rst' in self.options:
+            cmd += " --rst-source"
+
+        srctree = path.abspath(os.environ["srctree"])
+
+        fname = cmd
+
+        # extend PATH with $(srctree)/scripts
+        path_env = os.pathsep.join([
+            srctree + os.sep + "scripts",
+            os.environ["PATH"]
+        ])
+        shell_env = os.environ.copy()
+        shell_env["PATH"]    = path_env
+        shell_env["srctree"] = srctree
+
+        lines = self.runCmd(cmd, shell=True, cwd=cwd, env=shell_env)
+        nodeList = self.nestedParse(lines, self.arguments[0])
+        return nodeList
+
+    def runCmd(self, cmd, **kwargs):
+        u"""Run command ``cmd`` and return it's stdout as unicode."""
+
+        try:
+            proc = subprocess.Popen(
+                cmd
+                , stdout = subprocess.PIPE
+                , stderr = subprocess.PIPE
+                , **kwargs
+            )
+            out, err = proc.communicate()
+
+            out, err = codecs.decode(out, 'utf-8'), codecs.decode(err, 'utf-8')
+
+            if proc.returncode != 0:
+                raise self.severe(
+                    u"command '%s' failed with return code %d"
+                    % (cmd, proc.returncode)
+                )
+        except OSError as exc:
+            raise self.severe(u"problems with '%s' directive: %s."
+                              % (self.name, ErrorString(exc)))
+        return out
+
+    def nestedParse(self, lines, fname):
+        content = ViewList()
+        node = nodes.section()
+
+        if "debug" in self.options:
+            code_block = "\n\n.. code-block:: rst\n    :linenos:\n"
+            for l in lines.split("\n"):
+                code_block += "\n    " + l
+            lines = code_block + "\n\n"
+
+        line_regex = re.compile(r"^#define LINENO (\S+)\#([0-9]+)$")
+        ln = 0
+        n = 0
+        f = fname
+
+        for line in lines.split("\n"):
+            n = n + 1
+            match = line_regex.search(line)
+            if match:
+                new_f = match.group(1)
+
+                # Sphinx parser is lazy: it stops parsing contents in the
+                # middle, if it is too big. So, handle it per input file
+                if new_f != f and content:
+                    self.do_parse(content, node)
+                    content = ViewList()
+
+                f = new_f
+
+                # sphinx counts lines from 0
+                ln = int(match.group(2)) - 1
+            else:
+                content.append(line, f, ln)
+
+        kernellog.info(self.state.document.settings.env.app, "%s: parsed %i lines" % (fname, n))
+
+        if content:
+            self.do_parse(content, node)
+
+        return node.children
+
+    def do_parse(self, content, node):
+        if Use_SSI:
+            with switch_source_input(self.state, content):
+                self.state.nested_parse(content, 0, node, match_titles=1)
+        else:
+            buf  = self.state.memo.title_styles, self.state.memo.section_level, self.state.memo.reporter
+
+            self.state.memo.title_styles  = []
+            self.state.memo.section_level = 0
+            self.state.memo.reporter      = AutodocReporter(content, self.state.memo.reporter)
+            try:
+                self.state.nested_parse(content, 0, node, match_titles=1)
+            finally:
+                self.state.memo.title_styles, self.state.memo.section_level, self.state.memo.reporter = buf
diff --git a/doc/sphinx/kernel_feat.py b/doc/sphinx/kernel_feat.py
new file mode 100644
index 00000000000..2fee04f1ded
--- /dev/null
+++ b/doc/sphinx/kernel_feat.py
@@ -0,0 +1,169 @@
+# coding=utf-8
+# SPDX-License-Identifier: GPL-2.0
+#
+u"""
+    kernel-feat
+    ~~~~~~~~~~~
+
+    Implementation of the ``kernel-feat`` reST-directive.
+
+    :copyright:  Copyright (C) 2016  Markus Heiser
+    :copyright:  Copyright (C) 2016-2019  Mauro Carvalho Chehab
+    :maintained-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
+    :license:    GPL Version 2, June 1991 see Linux/COPYING for details.
+
+    The ``kernel-feat`` (:py:class:`KernelFeat`) directive calls the
+    scripts/get_feat.pl script to parse the Kernel ABI files.
+
+    Overview of directive's argument and options.
+
+    .. code-block:: rst
+
+        .. kernel-feat:: <ABI directory location>
+            :debug:
+
+    The argument ``<ABI directory location>`` is required. It contains the
+    location of the ABI files to be parsed.
+
+    ``debug``
+      Inserts a code-block with the *raw* reST. Sometimes it is helpful to see
+      what reST is generated.
+
+"""
+
+import codecs
+import os
+import subprocess
+import sys
+
+from os import path
+
+from docutils import nodes, statemachine
+from docutils.statemachine import ViewList
+from docutils.parsers.rst import directives, Directive
+from docutils.utils.error_reporting import ErrorString
+
+#
+# AutodocReporter is only good up to Sphinx 1.7
+#
+import sphinx
+
+Use_SSI = sphinx.__version__[:3] >= '1.7'
+if Use_SSI:
+    from sphinx.util.docutils import switch_source_input
+else:
+    from sphinx.ext.autodoc import AutodocReporter
+
+__version__  = '1.0'
+
+def setup(app):
+
+    app.add_directive("kernel-feat", KernelFeat)
+    return dict(
+        version = __version__
+        , parallel_read_safe = True
+        , parallel_write_safe = True
+    )
+
+class KernelFeat(Directive):
+
+    u"""KernelFeat (``kernel-feat``) directive"""
+
+    required_arguments = 1
+    optional_arguments = 2
+    has_content = False
+    final_argument_whitespace = True
+
+    option_spec = {
+        "debug"     : directives.flag
+    }
+
+    def warn(self, message, **replace):
+        replace["fname"]   = self.state.document.current_source
+        replace["line_no"] = replace.get("line_no", self.lineno)
+        message = ("%(fname)s:%(line_no)s: [kernel-feat WARN] : " + message) % replace
+        self.state.document.settings.env.app.warn(message, prefix="")
+
+    def run(self):
+
+        doc = self.state.document
+        if not doc.settings.file_insertion_enabled:
+            raise self.warning("docutils: file insertion disabled")
+
+        env = doc.settings.env
+        cwd = path.dirname(doc.current_source)
+        cmd = "get_feat.pl rest --dir "
+        cmd += self.arguments[0]
+
+        if len(self.arguments) > 1:
+            cmd += " --arch " + self.arguments[1]
+
+        srctree = path.abspath(os.environ["srctree"])
+
+        fname = cmd
+
+        # extend PATH with $(srctree)/scripts
+        path_env = os.pathsep.join([
+            srctree + os.sep + "scripts",
+            os.environ["PATH"]
+        ])
+        shell_env = os.environ.copy()
+        shell_env["PATH"]    = path_env
+        shell_env["srctree"] = srctree
+
+        lines = self.runCmd(cmd, shell=True, cwd=cwd, env=shell_env)
+        nodeList = self.nestedParse(lines, fname)
+        return nodeList
+
+    def runCmd(self, cmd, **kwargs):
+        u"""Run command ``cmd`` and return it's stdout as unicode."""
+
+        try:
+            proc = subprocess.Popen(
+                cmd
+                , stdout = subprocess.PIPE
+                , stderr = subprocess.PIPE
+                , **kwargs
+            )
+            out, err = proc.communicate()
+
+            out, err = codecs.decode(out, 'utf-8'), codecs.decode(err, 'utf-8')
+
+            if proc.returncode != 0:
+                raise self.severe(
+                    u"command '%s' failed with return code %d"
+                    % (cmd, proc.returncode)
+                )
+        except OSError as exc:
+            raise self.severe(u"problems with '%s' directive: %s."
+                              % (self.name, ErrorString(exc)))
+        return out
+
+    def nestedParse(self, lines, fname):
+        content = ViewList()
+        node    = nodes.section()
+
+        if "debug" in self.options:
+            code_block = "\n\n.. code-block:: rst\n    :linenos:\n"
+            for l in lines.split("\n"):
+                code_block += "\n    " + l
+            lines = code_block + "\n\n"
+
+        for c, l in enumerate(lines.split("\n")):
+            content.append(l, fname, c)
+
+        buf  = self.state.memo.title_styles, self.state.memo.section_level, self.state.memo.reporter
+
+        if Use_SSI:
+            with switch_source_input(self.state, content):
+                self.state.nested_parse(content, 0, node, match_titles=1)
+        else:
+            self.state.memo.title_styles  = []
+            self.state.memo.section_level = 0
+            self.state.memo.reporter      = AutodocReporter(content, self.state.memo.reporter)
+            try:
+                self.state.nested_parse(content, 0, node, match_titles=1)
+            finally:
+                self.state.memo.title_styles, self.state.memo.section_level, self.state.memo.reporter = buf
+
+        return node.children
diff --git a/doc/sphinx/kernel_include.py b/doc/sphinx/kernel_include.py
new file mode 100755
index 00000000000..f523aa68a36
--- /dev/null
+++ b/doc/sphinx/kernel_include.py
@@ -0,0 +1,190 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8; mode: python -*-
+# pylint: disable=R0903, C0330, R0914, R0912, E0401
+
+u"""
+    kernel-include
+    ~~~~~~~~~~~~~~
+
+    Implementation of the ``kernel-include`` reST-directive.
+
+    :copyright:  Copyright (C) 2016  Markus Heiser
+    :license:    GPL Version 2, June 1991 see linux/COPYING for details.
+
+    The ``kernel-include`` reST-directive is a replacement for the ``include``
+    directive. The ``kernel-include`` directive expand environment variables in
+    the path name and allows to include files from arbitrary locations.
+
+    .. hint::
+
+      Including files from arbitrary locations (e.g. from ``/etc``) is a
+      security risk for builders. This is why the ``include`` directive from
+      docutils *prohibit* pathnames pointing to locations *above* the filesystem
+      tree where the reST document with the include directive is placed.
+
+    Substrings of the form $name or ${name} are replaced by the value of
+    environment variable name. Malformed variable names and references to
+    non-existing variables are left unchanged.
+"""
+
+# ==============================================================================
+# imports
+# ==============================================================================
+
+import os.path
+
+from docutils import io, nodes, statemachine
+from docutils.utils.error_reporting import SafeString, ErrorString
+from docutils.parsers.rst import directives
+from docutils.parsers.rst.directives.body import CodeBlock, NumberLines
+from docutils.parsers.rst.directives.misc import Include
+
+__version__  = '1.0'
+
+# ==============================================================================
+def setup(app):
+# ==============================================================================
+
+    app.add_directive("kernel-include", KernelInclude)
+    return dict(
+        version = __version__,
+        parallel_read_safe = True,
+        parallel_write_safe = True
+    )
+
+# ==============================================================================
+class KernelInclude(Include):
+# ==============================================================================
+
+    u"""KernelInclude (``kernel-include``) directive"""
+
+    def run(self):
+        path = os.path.realpath(
+            os.path.expandvars(self.arguments[0]))
+
+        # to get a bit security back, prohibit /etc:
+        if path.startswith(os.sep + "etc"):
+            raise self.severe(
+                'Problems with "%s" directive, prohibited path: %s'
+                % (self.name, path))
+
+        self.arguments[0] = path
+
+        #return super(KernelInclude, self).run() # won't work, see HINTs in _run()
+        return self._run()
+
+    def _run(self):
+        """Include a file as part of the content of this reST file."""
+
+        # HINT: I had to copy&paste the whole Include.run method. I'am not happy
+        # with this, but due to security reasons, the Include.run method does
+        # not allow absolute or relative pathnames pointing to locations *above*
+        # the filesystem tree where the reST document is placed.
+
+        if not self.state.document.settings.file_insertion_enabled:
+            raise self.warning('"%s" directive disabled.' % self.name)
+        source = self.state_machine.input_lines.source(
+            self.lineno - self.state_machine.input_offset - 1)
+        source_dir = os.path.dirname(os.path.abspath(source))
+        path = directives.path(self.arguments[0])
+        if path.startswith('<') and path.endswith('>'):
+            path = os.path.join(self.standard_include_path, path[1:-1])
+        path = os.path.normpath(os.path.join(source_dir, path))
+
+        # HINT: this is the only line I had to change / commented out:
+        #path = utils.relative_path(None, path)
+
+        path = nodes.reprunicode(path)
+        encoding = self.options.get(
+            'encoding', self.state.document.settings.input_encoding)
+        e_handler=self.state.document.settings.input_encoding_error_handler
+        tab_width = self.options.get(
+            'tab-width', self.state.document.settings.tab_width)
+        try:
+            self.state.document.settings.record_dependencies.add(path)
+            include_file = io.FileInput(source_path=path,
+                                        encoding=encoding,
+                                        error_handler=e_handler)
+        except UnicodeEncodeError as error:
+            raise self.severe('Problems with "%s" directive path:\n'
+                              'Cannot encode input file path "%s" '
+                              '(wrong locale?).' %
+                              (self.name, SafeString(path)))
+        except IOError as error:
+            raise self.severe('Problems with "%s" directive path:\n%s.' %
+                      (self.name, ErrorString(error)))
+        startline = self.options.get('start-line', None)
+        endline = self.options.get('end-line', None)
+        try:
+            if startline or (endline is not None):
+                lines = include_file.readlines()
+                rawtext = ''.join(lines[startline:endline])
+            else:
+                rawtext = include_file.read()
+        except UnicodeError as error:
+            raise self.severe('Problem with "%s" directive:\n%s' %
+                              (self.name, ErrorString(error)))
+        # start-after/end-before: no restrictions on newlines in match-text,
+        # and no restrictions on matching inside lines vs. line boundaries
+        after_text = self.options.get('start-after', None)
+        if after_text:
+            # skip content in rawtext before *and incl.* a matching text
+            after_index = rawtext.find(after_text)
+            if after_index < 0:
+                raise self.severe('Problem with "start-after" option of "%s" '
+                                  'directive:\nText not found.' % self.name)
+            rawtext = rawtext[after_index + len(after_text):]
+        before_text = self.options.get('end-before', None)
+        if before_text:
+            # skip content in rawtext after *and incl.* a matching text
+            before_index = rawtext.find(before_text)
+            if before_index < 0:
+                raise self.severe('Problem with "end-before" option of "%s" '
+                                  'directive:\nText not found.' % self.name)
+            rawtext = rawtext[:before_index]
+
+        include_lines = statemachine.string2lines(rawtext, tab_width,
+                                                  convert_whitespace=True)
+        if 'literal' in self.options:
+            # Convert tabs to spaces, if `tab_width` is positive.
+            if tab_width >= 0:
+                text = rawtext.expandtabs(tab_width)
+            else:
+                text = rawtext
+            literal_block = nodes.literal_block(rawtext, source=path,
+                                    classes=self.options.get('class', []))
+            literal_block.line = 1
+            self.add_name(literal_block)
+            if 'number-lines' in self.options:
+                try:
+                    startline = int(self.options['number-lines'] or 1)
+                except ValueError:
+                    raise self.error(':number-lines: with non-integer '
+                                     'start value')
+                endline = startline + len(include_lines)
+                if text.endswith('\n'):
+                    text = text[:-1]
+                tokens = NumberLines([([], text)], startline, endline)
+                for classes, value in tokens:
+                    if classes:
+                        literal_block += nodes.inline(value, value,
+                                                      classes=classes)
+                    else:
+                        literal_block += nodes.Text(value, value)
+            else:
+                literal_block += nodes.Text(text, text)
+            return [literal_block]
+        if 'code' in self.options:
+            self.options['source'] = path
+            codeblock = CodeBlock(self.name,
+                                  [self.options.pop('code')], # arguments
+                                  self.options,
+                                  include_lines, # content
+                                  self.lineno,
+                                  self.content_offset,
+                                  self.block_text,
+                                  self.state,
+                                  self.state_machine)
+            return codeblock.run()
+        self.state_machine.insert_input(include_lines, path)
+        return []
diff --git a/doc/sphinx/kerneldoc.py b/doc/sphinx/kerneldoc.py
new file mode 100644
index 00000000000..bc8bb9e5125
--- /dev/null
+++ b/doc/sphinx/kerneldoc.py
@@ -0,0 +1,170 @@
+# coding=utf-8
+#
+# Copyright © 2016 Intel Corporation
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice (including the next
+# paragraph) shall be included in all copies or substantial portions of the
+# Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+# IN THE SOFTWARE.
+#
+# Authors:
+#    Jani Nikula <jani.nikula@intel.com>
+#
+# Please make sure this works on both python2 and python3.
+#
+
+import codecs
+import os
+import subprocess
+import sys
+import re
+import glob
+
+from docutils import nodes, statemachine
+from docutils.statemachine import ViewList
+from docutils.parsers.rst import directives, Directive
+import sphinx
+from sphinx.util.docutils import switch_source_input
+import kernellog
+
+__version__  = '1.0'
+
+class KernelDocDirective(Directive):
+    """Extract kernel-doc comments from the specified file"""
+    required_argument = 1
+    optional_arguments = 4
+    option_spec = {
+        'doc': directives.unchanged_required,
+        'export': directives.unchanged,
+        'internal': directives.unchanged,
+        'identifiers': directives.unchanged,
+        'no-identifiers': directives.unchanged,
+        'functions': directives.unchanged,
+    }
+    has_content = False
+
+    def run(self):
+        env = self.state.document.settings.env
+        cmd = [env.config.kerneldoc_bin, '-rst', '-enable-lineno']
+
+	# Pass the version string to kernel-doc, as it needs to use a different
+	# dialect, depending what the C domain supports for each specific
+	# Sphinx versions
+        cmd += ['-sphinx-version', sphinx.__version__]
+
+        filename = env.config.kerneldoc_srctree + '/' + self.arguments[0]
+        export_file_patterns = []
+
+        # Tell sphinx of the dependency
+        env.note_dependency(os.path.abspath(filename))
+
+        tab_width = self.options.get('tab-width', self.state.document.settings.tab_width)
+
+        # 'function' is an alias of 'identifiers'
+        if 'functions' in self.options:
+            self.options['identifiers'] = self.options.get('functions')
+
+        # FIXME: make this nicer and more robust against errors
+        if 'export' in self.options:
+            cmd += ['-export']
+            export_file_patterns = str(self.options.get('export')).split()
+        elif 'internal' in self.options:
+            cmd += ['-internal']
+            export_file_patterns = str(self.options.get('internal')).split()
+        elif 'doc' in self.options:
+            cmd += ['-function', str(self.options.get('doc'))]
+        elif 'identifiers' in self.options:
+            identifiers = self.options.get('identifiers').split()
+            if identifiers:
+                for i in identifiers:
+                    cmd += ['-function', i]
+            else:
+                cmd += ['-no-doc-sections']
+
+        if 'no-identifiers' in self.options:
+            no_identifiers = self.options.get('no-identifiers').split()
+            if no_identifiers:
+                for i in no_identifiers:
+                    cmd += ['-nosymbol', i]
+
+        for pattern in export_file_patterns:
+            for f in glob.glob(env.config.kerneldoc_srctree + '/' + pattern):
+                env.note_dependency(os.path.abspath(f))
+                cmd += ['-export-file', f]
+
+        cmd += [filename]
+
+        try:
+            kernellog.verbose(env.app,
+                              'calling kernel-doc \'%s\'' % (" ".join(cmd)))
+
+            p = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            out, err = p.communicate()
+
+            out, err = codecs.decode(out, 'utf-8'), codecs.decode(err, 'utf-8')
+
+            if p.returncode != 0:
+                sys.stderr.write(err)
+
+                kernellog.warn(env.app,
+                               'kernel-doc \'%s\' failed with return code %d' % (" ".join(cmd), p.returncode))
+                return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))]
+            elif env.config.kerneldoc_verbosity > 0:
+                sys.stderr.write(err)
+
+            lines = statemachine.string2lines(out, tab_width, convert_whitespace=True)
+            result = ViewList()
+
+            lineoffset = 0;
+            line_regex = re.compile(r"^#define LINENO ([0-9]+)$")
+            for line in lines:
+                match = line_regex.search(line)
+                if match:
+                    # sphinx counts lines from 0
+                    lineoffset = int(match.group(1)) - 1
+                    # we must eat our comments since the upset the markup
+                else:
+                    doc = str(env.srcdir) + "/" + env.docname + ":" + str(self.lineno)
+                    result.append(line, doc + ": " + filename, lineoffset)
+                    lineoffset += 1
+
+            node = nodes.section()
+            self.do_parse(result, node)
+
+            return node.children
+
+        except Exception as e:  # pylint: disable=W0703
+            kernellog.warn(env.app, 'kernel-doc \'%s\' processing failed with: %s' %
+                           (" ".join(cmd), str(e)))
+            return [nodes.error(None, nodes.paragraph(text = "kernel-doc missing"))]
+
+    def do_parse(self, result, node):
+        with switch_source_input(self.state, result):
+            self.state.nested_parse(result, 0, node, match_titles=1)
+
+def setup(app):
+    app.add_config_value('kerneldoc_bin', None, 'env')
+    app.add_config_value('kerneldoc_srctree', None, 'env')
+    app.add_config_value('kerneldoc_verbosity', 1, 'env')
+
+    app.add_directive('kernel-doc', KernelDocDirective)
+
+    return dict(
+        version = __version__,
+        parallel_read_safe = True,
+        parallel_write_safe = True
+    )
diff --git a/doc/sphinx/kernellog.py b/doc/sphinx/kernellog.py
new file mode 100644
index 00000000000..8ac7d274f54
--- /dev/null
+++ b/doc/sphinx/kernellog.py
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Sphinx has deprecated its older logging interface, but the replacement
+# only goes back to 1.6.  So here's a wrapper layer to keep around for
+# as long as we support 1.4.
+#
+import sphinx
+
+if sphinx.__version__[:3] >= '1.6':
+    UseLogging = True
+    from sphinx.util import logging
+    logger = logging.getLogger('kerneldoc')
+else:
+    UseLogging = False
+
+def warn(app, message):
+    if UseLogging:
+        logger.warning(message)
+    else:
+        app.warn(message)
+
+def verbose(app, message):
+    if UseLogging:
+        logger.verbose(message)
+    else:
+        app.verbose(message)
+
+def info(app, message):
+    if UseLogging:
+        logger.info(message)
+    else:
+        app.info(message)
diff --git a/doc/sphinx/kfigure.py b/doc/sphinx/kfigure.py
new file mode 100644
index 00000000000..dea7f91ef5a
--- /dev/null
+++ b/doc/sphinx/kfigure.py
@@ -0,0 +1,557 @@
+# -*- coding: utf-8; mode: python -*-
+# pylint: disable=C0103, R0903, R0912, R0915
+u"""
+    scalable figure and image handling
+    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+    Sphinx extension which implements scalable image handling.
+
+    :copyright:  Copyright (C) 2016  Markus Heiser
+    :license:    GPL Version 2, June 1991 see Linux/COPYING for details.
+
+    The build for image formats depend on image's source format and output's
+    destination format. This extension implement methods to simplify image
+    handling from the author's POV. Directives like ``kernel-figure`` implement
+    methods *to* always get the best output-format even if some tools are not
+    installed. For more details take a look at ``convert_image(...)`` which is
+    the core of all conversions.
+
+    * ``.. kernel-image``: for image handling / a ``.. image::`` replacement
+
+    * ``.. kernel-figure``: for figure handling / a ``.. figure::`` replacement
+
+    * ``.. kernel-render``: for render markup / a concept to embed *render*
+      markups (or languages). Supported markups (see ``RENDER_MARKUP_EXT``)
+
+      - ``DOT``: render embedded Graphviz's **DOC**
+      - ``SVG``: render embedded Scalable Vector Graphics (**SVG**)
+      - ... *developable*
+
+    Used tools:
+
+    * ``dot(1)``: Graphviz (https://www.graphviz.org). If Graphviz is not
+      available, the DOT language is inserted as literal-block.
+
+    * SVG to PDF: To generate PDF, you need at least one of this tools:
+
+      - ``convert(1)``: ImageMagick (https://www.imagemagick.org)
+
+    List of customizations:
+
+    * generate PDF from SVG / used by PDF (LaTeX) builder
+
+    * generate SVG (html-builder) and PDF (latex-builder) from DOT files.
+      DOT: see https://www.graphviz.org/content/dot-language
+
+    """
+
+import os
+from os import path
+import subprocess
+from hashlib import sha1
+import sys
+
+from docutils import nodes
+from docutils.statemachine import ViewList
+from docutils.parsers.rst import directives
+from docutils.parsers.rst.directives import images
+import sphinx
+
+from sphinx.util.nodes import clean_astext
+from six import iteritems
+
+import kernellog
+
+PY3 = sys.version_info[0] == 3
+
+if PY3:
+    _unicode = str
+else:
+    _unicode = unicode
+
+# Get Sphinx version
+major, minor, patch = sphinx.version_info[:3]
+if major == 1 and minor > 3:
+    # patches.Figure only landed in Sphinx 1.4
+    from sphinx.directives.patches import Figure  # pylint: disable=C0413
+else:
+    Figure = images.Figure
+
+__version__  = '1.0.0'
+
+# simple helper
+# -------------
+
+def which(cmd):
+    """Searches the ``cmd`` in the ``PATH`` environment.
+
+    This *which* searches the PATH for executable ``cmd`` . First match is
+    returned, if nothing is found, ``None` is returned.
+    """
+    envpath = os.environ.get('PATH', None) or os.defpath
+    for folder in envpath.split(os.pathsep):
+        fname = folder + os.sep + cmd
+        if path.isfile(fname):
+            return fname
+
+def mkdir(folder, mode=0o775):
+    if not path.isdir(folder):
+        os.makedirs(folder, mode)
+
+def file2literal(fname):
+    with open(fname, "r") as src:
+        data = src.read()
+        node = nodes.literal_block(data, data)
+    return node
+
+def isNewer(path1, path2):
+    """Returns True if ``path1`` is newer than ``path2``
+
+    If ``path1`` exists and is newer than ``path2`` the function returns
+    ``True`` is returned otherwise ``False``
+    """
+    return (path.exists(path1)
+            and os.stat(path1).st_ctime > os.stat(path2).st_ctime)
+
+def pass_handle(self, node):           # pylint: disable=W0613
+    pass
+
+# setup conversion tools and sphinx extension
+# -------------------------------------------
+
+# Graphviz's dot(1) support
+dot_cmd = None
+
+# ImageMagick' convert(1) support
+convert_cmd = None
+
+
+def setup(app):
+    # check toolchain first
+    app.connect('builder-inited', setupTools)
+
+    # image handling
+    app.add_directive("kernel-image",  KernelImage)
+    app.add_node(kernel_image,
+                 html    = (visit_kernel_image, pass_handle),
+                 latex   = (visit_kernel_image, pass_handle),
+                 texinfo = (visit_kernel_image, pass_handle),
+                 text    = (visit_kernel_image, pass_handle),
+                 man     = (visit_kernel_image, pass_handle), )
+
+    # figure handling
+    app.add_directive("kernel-figure", KernelFigure)
+    app.add_node(kernel_figure,
+                 html    = (visit_kernel_figure, pass_handle),
+                 latex   = (visit_kernel_figure, pass_handle),
+                 texinfo = (visit_kernel_figure, pass_handle),
+                 text    = (visit_kernel_figure, pass_handle),
+                 man     = (visit_kernel_figure, pass_handle), )
+
+    # render handling
+    app.add_directive('kernel-render', KernelRender)
+    app.add_node(kernel_render,
+                 html    = (visit_kernel_render, pass_handle),
+                 latex   = (visit_kernel_render, pass_handle),
+                 texinfo = (visit_kernel_render, pass_handle),
+                 text    = (visit_kernel_render, pass_handle),
+                 man     = (visit_kernel_render, pass_handle), )
+
+    app.connect('doctree-read', add_kernel_figure_to_std_domain)
+
+    return dict(
+        version = __version__,
+        parallel_read_safe = True,
+        parallel_write_safe = True
+    )
+
+
+def setupTools(app):
+    u"""
+    Check available build tools and log some *verbose* messages.
+
+    This function is called once, when the builder is initiated.
+    """
+    global dot_cmd, convert_cmd   # pylint: disable=W0603
+    kernellog.verbose(app, "kfigure: check installed tools ...")
+
+    dot_cmd = which('dot')
+    convert_cmd = which('convert')
+
+    if dot_cmd:
+        kernellog.verbose(app, "use dot(1) from: " + dot_cmd)
+    else:
+        kernellog.warn(app, "dot(1) not found, for better output quality install "
+                       "graphviz from https://www.graphviz.org")
+    if convert_cmd:
+        kernellog.verbose(app, "use convert(1) from: " + convert_cmd)
+    else:
+        kernellog.warn(app,
+            "convert(1) not found, for SVG to PDF conversion install "
+            "ImageMagick (https://www.imagemagick.org)")
+
+
+# integrate conversion tools
+# --------------------------
+
+RENDER_MARKUP_EXT = {
+    # The '.ext' must be handled by convert_image(..) function's *in_ext* input.
+    # <name> : <.ext>
+    'DOT' : '.dot',
+    'SVG' : '.svg'
+}
+
+def convert_image(img_node, translator, src_fname=None):
+    """Convert a image node for the builder.
+
+    Different builder prefer different image formats, e.g. *latex* builder
+    prefer PDF while *html* builder prefer SVG format for images.
+
+    This function handles output image formats in dependence of source the
+    format (of the image) and the translator's output format.
+    """
+    app = translator.builder.app
+
+    fname, in_ext = path.splitext(path.basename(img_node['uri']))
+    if src_fname is None:
+        src_fname = path.join(translator.builder.srcdir, img_node['uri'])
+        if not path.exists(src_fname):
+            src_fname = path.join(translator.builder.outdir, img_node['uri'])
+
+    dst_fname = None
+
+    # in kernel builds, use 'make SPHINXOPTS=-v' to see verbose messages
+
+    kernellog.verbose(app, 'assert best format for: ' + img_node['uri'])
+
+    if in_ext == '.dot':
+
+        if not dot_cmd:
+            kernellog.verbose(app,
+                              "dot from graphviz not available / include DOT raw.")
+            img_node.replace_self(file2literal(src_fname))
+
+        elif translator.builder.format == 'latex':
+            dst_fname = path.join(translator.builder.outdir, fname + '.pdf')
+            img_node['uri'] = fname + '.pdf'
+            img_node['candidates'] = {'*': fname + '.pdf'}
+
+
+        elif translator.builder.format == 'html':
+            dst_fname = path.join(
+                translator.builder.outdir,
+                translator.builder.imagedir,
+                fname + '.svg')
+            img_node['uri'] = path.join(
+                translator.builder.imgpath, fname + '.svg')
+            img_node['candidates'] = {
+                '*': path.join(translator.builder.imgpath, fname + '.svg')}
+
+        else:
+            # all other builder formats will include DOT as raw
+            img_node.replace_self(file2literal(src_fname))
+
+    elif in_ext == '.svg':
+
+        if translator.builder.format == 'latex':
+            if convert_cmd is None:
+                kernellog.verbose(app,
+                                  "no SVG to PDF conversion available / include SVG raw.")
+                img_node.replace_self(file2literal(src_fname))
+            else:
+                dst_fname = path.join(translator.builder.outdir, fname + '.pdf')
+                img_node['uri'] = fname + '.pdf'
+                img_node['candidates'] = {'*': fname + '.pdf'}
+
+    if dst_fname:
+        # the builder needs not to copy one more time, so pop it if exists.
+        translator.builder.images.pop(img_node['uri'], None)
+        _name = dst_fname[len(str(translator.builder.outdir)) + 1:]
+
+        if isNewer(dst_fname, src_fname):
+            kernellog.verbose(app,
+                              "convert: {out}/%s already exists and is newer" % _name)
+
+        else:
+            ok = False
+            mkdir(path.dirname(dst_fname))
+
+            if in_ext == '.dot':
+                kernellog.verbose(app, 'convert DOT to: {out}/' + _name)
+                ok = dot2format(app, src_fname, dst_fname)
+
+            elif in_ext == '.svg':
+                kernellog.verbose(app, 'convert SVG to: {out}/' + _name)
+                ok = svg2pdf(app, src_fname, dst_fname)
+
+            if not ok:
+                img_node.replace_self(file2literal(src_fname))
+
+
+def dot2format(app, dot_fname, out_fname):
+    """Converts DOT file to ``out_fname`` using ``dot(1)``.
+
+    * ``dot_fname`` pathname of the input DOT file, including extension ``.dot``
+    * ``out_fname`` pathname of the output file, including format extension
+
+    The *format extension* depends on the ``dot`` command (see ``man dot``
+    option ``-Txxx``). Normally you will use one of the following extensions:
+
+    - ``.ps`` for PostScript,
+    - ``.svg`` or ``svgz`` for Structured Vector Graphics,
+    - ``.fig`` for XFIG graphics and
+    - ``.png`` or ``gif`` for common bitmap graphics.
+
+    """
+    out_format = path.splitext(out_fname)[1][1:]
+    cmd = [dot_cmd, '-T%s' % out_format, dot_fname]
+    exit_code = 42
+
+    with open(out_fname, "w") as out:
+        exit_code = subprocess.call(cmd, stdout = out)
+        if exit_code != 0:
+            kernellog.warn(app,
+                          "Error #%d when calling: %s" % (exit_code, " ".join(cmd)))
+    return bool(exit_code == 0)
+
+def svg2pdf(app, svg_fname, pdf_fname):
+    """Converts SVG to PDF with ``convert(1)`` command.
+
+    Uses ``convert(1)`` from ImageMagick (https://www.imagemagick.org) for
+    conversion.  Returns ``True`` on success and ``False`` if an error occurred.
+
+    * ``svg_fname`` pathname of the input SVG file with extension (``.svg``)
+    * ``pdf_name``  pathname of the output PDF file with extension (``.pdf``)
+
+    """
+    cmd = [convert_cmd, svg_fname, pdf_fname]
+    # use stdout and stderr from parent
+    exit_code = subprocess.call(cmd)
+    if exit_code != 0:
+        kernellog.warn(app, "Error #%d when calling: %s" % (exit_code, " ".join(cmd)))
+    return bool(exit_code == 0)
+
+
+# image handling
+# ---------------------
+
+def visit_kernel_image(self, node):    # pylint: disable=W0613
+    """Visitor of the ``kernel_image`` Node.
+
+    Handles the ``image`` child-node with the ``convert_image(...)``.
+    """
+    img_node = node[0]
+    convert_image(img_node, self)
+
+class kernel_image(nodes.image):
+    """Node for ``kernel-image`` directive."""
+    pass
+
+class KernelImage(images.Image):
+    u"""KernelImage directive
+
+    Earns everything from ``.. image::`` directive, except *remote URI* and
+    *glob* pattern. The KernelImage wraps a image node into a
+    kernel_image node. See ``visit_kernel_image``.
+    """
+
+    def run(self):
+        uri = self.arguments[0]
+        if uri.endswith('.*') or uri.find('://') != -1:
+            raise self.severe(
+                'Error in "%s: %s": glob pattern and remote images are not allowed'
+                % (self.name, uri))
+        result = images.Image.run(self)
+        if len(result) == 2 or isinstance(result[0], nodes.system_message):
+            return result
+        (image_node,) = result
+        # wrap image node into a kernel_image node / see visitors
+        node = kernel_image('', image_node)
+        return [node]
+
+# figure handling
+# ---------------------
+
+def visit_kernel_figure(self, node):   # pylint: disable=W0613
+    """Visitor of the ``kernel_figure`` Node.
+
+    Handles the ``image`` child-node with the ``convert_image(...)``.
+    """
+    img_node = node[0][0]
+    convert_image(img_node, self)
+
+class kernel_figure(nodes.figure):
+    """Node for ``kernel-figure`` directive."""
+
+class KernelFigure(Figure):
+    u"""KernelImage directive
+
+    Earns everything from ``.. figure::`` directive, except *remote URI* and
+    *glob* pattern.  The KernelFigure wraps a figure node into a kernel_figure
+    node. See ``visit_kernel_figure``.
+    """
+
+    def run(self):
+        uri = self.arguments[0]
+        if uri.endswith('.*') or uri.find('://') != -1:
+            raise self.severe(
+                'Error in "%s: %s":'
+                ' glob pattern and remote images are not allowed'
+                % (self.name, uri))
+        result = Figure.run(self)
+        if len(result) == 2 or isinstance(result[0], nodes.system_message):
+            return result
+        (figure_node,) = result
+        # wrap figure node into a kernel_figure node / see visitors
+        node = kernel_figure('', figure_node)
+        return [node]
+
+
+# render handling
+# ---------------------
+
+def visit_kernel_render(self, node):
+    """Visitor of the ``kernel_render`` Node.
+
+    If rendering tools available, save the markup of the ``literal_block`` child
+    node into a file and replace the ``literal_block`` node with a new created
+    ``image`` node, pointing to the saved markup file. Afterwards, handle the
+    image child-node with the ``convert_image(...)``.
+    """
+    app = self.builder.app
+    srclang = node.get('srclang')
+
+    kernellog.verbose(app, 'visit kernel-render node lang: "%s"' % (srclang))
+
+    tmp_ext = RENDER_MARKUP_EXT.get(srclang, None)
+    if tmp_ext is None:
+        kernellog.warn(app, 'kernel-render: "%s" unknown / include raw.' % (srclang))
+        return
+
+    if not dot_cmd and tmp_ext == '.dot':
+        kernellog.verbose(app, "dot from graphviz not available / include raw.")
+        return
+
+    literal_block = node[0]
+
+    code      = literal_block.astext()
+    hashobj   = code.encode('utf-8') #  str(node.attributes)
+    fname     = path.join('%s-%s' % (srclang, sha1(hashobj).hexdigest()))
+
+    tmp_fname = path.join(
+        self.builder.outdir, self.builder.imagedir, fname + tmp_ext)
+
+    if not path.isfile(tmp_fname):
+        mkdir(path.dirname(tmp_fname))
+        with open(tmp_fname, "w") as out:
+            out.write(code)
+
+    img_node = nodes.image(node.rawsource, **node.attributes)
+    img_node['uri'] = path.join(self.builder.imgpath, fname + tmp_ext)
+    img_node['candidates'] = {
+        '*': path.join(self.builder.imgpath, fname + tmp_ext)}
+
+    literal_block.replace_self(img_node)
+    convert_image(img_node, self, tmp_fname)
+
+
+class kernel_render(nodes.General, nodes.Inline, nodes.Element):
+    """Node for ``kernel-render`` directive."""
+    pass
+
+class KernelRender(Figure):
+    u"""KernelRender directive
+
+    Render content by external tool.  Has all the options known from the
+    *figure*  directive, plus option ``caption``.  If ``caption`` has a
+    value, a figure node with the *caption* is inserted. If not, a image node is
+    inserted.
+
+    The KernelRender directive wraps the text of the directive into a
+    literal_block node and wraps it into a kernel_render node. See
+    ``visit_kernel_render``.
+    """
+    has_content = True
+    required_arguments = 1
+    optional_arguments = 0
+    final_argument_whitespace = False
+
+    # earn options from 'figure'
+    option_spec = Figure.option_spec.copy()
+    option_spec['caption'] = directives.unchanged
+
+    def run(self):
+        return [self.build_node()]
+
+    def build_node(self):
+
+        srclang = self.arguments[0].strip()
+        if srclang not in RENDER_MARKUP_EXT.keys():
+            return [self.state_machine.reporter.warning(
+                'Unknown source language "%s", use one of: %s.' % (
+                    srclang, ",".join(RENDER_MARKUP_EXT.keys())),
+                line=self.lineno)]
+
+        code = '\n'.join(self.content)
+        if not code.strip():
+            return [self.state_machine.reporter.warning(
+                'Ignoring "%s" directive without content.' % (
+                    self.name),
+                line=self.lineno)]
+
+        node = kernel_render()
+        node['alt'] = self.options.get('alt','')
+        node['srclang'] = srclang
+        literal_node = nodes.literal_block(code, code)
+        node += literal_node
+
+        caption = self.options.get('caption')
+        if caption:
+            # parse caption's content
+            parsed = nodes.Element()
+            self.state.nested_parse(
+                ViewList([caption], source=''), self.content_offset, parsed)
+            caption_node = nodes.caption(
+                parsed[0].rawsource, '', *parsed[0].children)
+            caption_node.source = parsed[0].source
+            caption_node.line = parsed[0].line
+
+            figure_node = nodes.figure('', node)
+            for k,v in self.options.items():
+                figure_node[k] = v
+            figure_node += caption_node
+
+            node = figure_node
+
+        return node
+
+def add_kernel_figure_to_std_domain(app, doctree):
+    """Add kernel-figure anchors to 'std' domain.
+
+    The ``StandardDomain.process_doc(..)`` method does not know how to resolve
+    the caption (label) of ``kernel-figure`` directive (it only knows about
+    standard nodes, e.g. table, figure etc.). Without any additional handling
+    this will result in a 'undefined label' for kernel-figures.
+
+    This handle adds labels of kernel-figure to the 'std' domain labels.
+    """
+
+    std = app.env.domains["std"]
+    docname = app.env.docname
+    labels = std.data["labels"]
+
+    for name, explicit in iteritems(doctree.nametypes):
+        if not explicit:
+            continue
+        labelid = doctree.nameids[name]
+        if labelid is None:
+            continue
+        node = doctree.ids[labelid]
+
+        if node.tagname == 'kernel_figure':
+            for n in node.next_node():
+                if n.tagname == 'caption':
+                    sectname = clean_astext(n)
+                    # add label to std domain
+                    labels[name] = docname, labelid, sectname
+                    break
diff --git a/doc/sphinx/load_config.py b/doc/sphinx/load_config.py
new file mode 100644
index 00000000000..8b416bfd75a
--- /dev/null
+++ b/doc/sphinx/load_config.py
@@ -0,0 +1,59 @@
+# -*- coding: utf-8; mode: python -*-
+# pylint: disable=R0903, C0330, R0914, R0912, E0401
+
+import os
+import sys
+from sphinx.util.osutil import fs_encoding
+
+# ------------------------------------------------------------------------------
+def loadConfig(namespace):
+# ------------------------------------------------------------------------------
+
+    u"""Load an additional configuration file into *namespace*.
+
+    The name of the configuration file is taken from the environment
+    ``SPHINX_CONF``. The external configuration file extends (or overwrites) the
+    configuration values from the origin ``conf.py``.  With this you are able to
+    maintain *build themes*.  """
+
+    config_file = os.environ.get("SPHINX_CONF", None)
+    if (config_file is not None
+        and os.path.normpath(namespace["__file__"]) != os.path.normpath(config_file) ):
+        config_file = os.path.abspath(config_file)
+
+        # Let's avoid one conf.py file just due to latex_documents
+        start = config_file.find('Documentation/')
+        if start >= 0:
+            start = config_file.find('/', start + 1)
+
+        end = config_file.rfind('/')
+        if start >= 0 and end > 0:
+            dir = config_file[start + 1:end]
+
+            print("source directory: %s" % dir)
+            new_latex_docs = []
+            latex_documents = namespace['latex_documents']
+
+            for l in latex_documents:
+                if l[0].find(dir + '/') == 0:
+                    has = True
+                    fn = l[0][len(dir) + 1:]
+                    new_latex_docs.append((fn, l[1], l[2], l[3], l[4]))
+                    break
+
+            namespace['latex_documents'] = new_latex_docs
+
+        # If there is an extra conf.py file, load it
+        if os.path.isfile(config_file):
+            sys.stdout.write("load additional sphinx-config: %s\n" % config_file)
+            config = namespace.copy()
+            config['__file__'] = config_file
+            with open(config_file, 'rb') as f:
+                code = compile(f.read(), fs_encoding, 'exec')
+                exec(code, config)
+            del config['__file__']
+            namespace.update(config)
+        else:
+            config = namespace.copy()
+            config['tags'].add("subproject")
+            namespace.update(config)
diff --git a/doc/sphinx/maintainers_include.py b/doc/sphinx/maintainers_include.py
new file mode 100755
index 00000000000..13557d3d3c2
--- /dev/null
+++ b/doc/sphinx/maintainers_include.py
@@ -0,0 +1,197 @@
+#!/usr/bin/env python
+# SPDX-License-Identifier: GPL-2.0
+# -*- coding: utf-8; mode: python -*-
+# pylint: disable=R0903, C0330, R0914, R0912, E0401
+
+u"""
+    maintainers-include
+    ~~~~~~~~~~~~~~~~~~~
+
+    Implementation of the ``maintainers-include`` reST-directive.
+
+    :copyright:  Copyright (C) 2019  Kees Cook <keescook@chromium.org>
+    :license:    GPL Version 2, June 1991 see linux/COPYING for details.
+
+    The ``maintainers-include`` reST-directive performs extensive parsing
+    specific to the Linux kernel's standard "MAINTAINERS" file, in an
+    effort to avoid needing to heavily mark up the original plain text.
+"""
+
+import sys
+import re
+import os.path
+
+from docutils import statemachine
+from docutils.utils.error_reporting import ErrorString
+from docutils.parsers.rst import Directive
+from docutils.parsers.rst.directives.misc import Include
+
+__version__  = '1.0'
+
+def setup(app):
+    app.add_directive("maintainers-include", MaintainersInclude)
+    return dict(
+        version = __version__,
+        parallel_read_safe = True,
+        parallel_write_safe = True
+    )
+
+class MaintainersInclude(Include):
+    u"""MaintainersInclude (``maintainers-include``) directive"""
+    required_arguments = 0
+
+    def parse_maintainers(self, path):
+        """Parse all the MAINTAINERS lines into ReST for human-readability"""
+
+        result = list()
+        result.append(".. _maintainers:")
+        result.append("")
+
+        # Poor man's state machine.
+        descriptions = False
+        maintainers = False
+        subsystems = False
+
+        # Field letter to field name mapping.
+        field_letter = None
+        fields = dict()
+
+        prev = None
+        field_prev = ""
+        field_content = ""
+
+        for line in open(path):
+            if sys.version_info.major == 2:
+                line = unicode(line, 'utf-8')
+            # Have we reached the end of the preformatted Descriptions text?
+            if descriptions and line.startswith('Maintainers'):
+                descriptions = False
+                # Ensure a blank line following the last "|"-prefixed line.
+                result.append("")
+
+            # Start subsystem processing? This is to skip processing the text
+            # between the Maintainers heading and the first subsystem name.
+            if maintainers and not subsystems:
+                if re.search('^[A-Z0-9]', line):
+                    subsystems = True
+
+            # Drop needless input whitespace.
+            line = line.rstrip()
+
+            # Linkify all non-wildcard refs to ReST files in doc/.
+            pat = r'(doc/([^\s\?\*]*)\.rst)'
+            m = re.search(pat, line)
+            if m:
+                # maintainers.rst is in a subdirectory, so include "../".
+                line = re.sub(pat, ':doc:`%s <../%s>`' % (m.group(2), m.group(2)), line)
+
+            # Check state machine for output rendering behavior.
+            output = None
+            if descriptions:
+                # Escape the escapes in preformatted text.
+                output = "| %s" % (line.replace("\\", "\\\\"))
+                # Look for and record field letter to field name mappings:
+                #   R: Designated *reviewer*: FullName <address@domain>
+                m = re.search(r"\s(\S):\s", line)
+                if m:
+                    field_letter = m.group(1)
+                if field_letter and not field_letter in fields:
+                    m = re.search(r"\*([^\*]+)\*", line)
+                    if m:
+                        fields[field_letter] = m.group(1)
+            elif subsystems:
+                # Skip empty lines: subsystem parser adds them as needed.
+                if len(line) == 0:
+                    continue
+                # Subsystem fields are batched into "field_content"
+                if line[1] != ':':
+                    # Render a subsystem entry as:
+                    #   SUBSYSTEM NAME
+                    #   ~~~~~~~~~~~~~~
+
+                    # Flush pending field content.
+                    output = field_content + "\n\n"
+                    field_content = ""
+
+                    # Collapse whitespace in subsystem name.
+                    heading = re.sub(r"\s+", " ", line)
+                    output = output + "%s\n%s" % (heading, "~" * len(heading))
+                    field_prev = ""
+                else:
+                    # Render a subsystem field as:
+                    #   :Field: entry
+                    #           entry...
+                    field, details = line.split(':', 1)
+                    details = details.strip()
+
+                    # Mark paths (and regexes) as literal text for improved
+                    # readability and to escape any escapes.
+                    if field in ['F', 'N', 'X', 'K']:
+                        # But only if not already marked :)
+                        if not ':doc:' in details:
+                            details = '``%s``' % (details)
+
+                    # Comma separate email field continuations.
+                    if field == field_prev and field_prev in ['M', 'R', 'L']:
+                        field_content = field_content + ","
+
+                    # Do not repeat field names, so that field entries
+                    # will be collapsed together.
+                    if field != field_prev:
+                        output = field_content + "\n"
+                        field_content = ":%s:" % (fields.get(field, field))
+                    field_content = field_content + "\n\t%s" % (details)
+                    field_prev = field
+            else:
+                output = line
+
+            # Re-split on any added newlines in any above parsing.
+            if output != None:
+                for separated in output.split('\n'):
+                    result.append(separated)
+
+            # Update the state machine when we find heading separators.
+            if line.startswith('----------'):
+                if prev.startswith('Descriptions'):
+                    descriptions = True
+                if prev.startswith('Maintainers'):
+                    maintainers = True
+
+            # Retain previous line for state machine transitions.
+            prev = line
+
+        # Flush pending field contents.
+        if field_content != "":
+            for separated in field_content.split('\n'):
+                result.append(separated)
+
+        output = "\n".join(result)
+        # For debugging the pre-rendered results...
+        #print(output, file=open("/tmp/MAINTAINERS.rst", "w"))
+
+        self.state_machine.insert_input(
+          statemachine.string2lines(output), path)
+
+    def run(self):
+        """Include the MAINTAINERS file as part of this reST file."""
+        if not self.state.document.settings.file_insertion_enabled:
+            raise self.warning('"%s" directive disabled.' % self.name)
+
+        # Walk up source path directories to find doc/../
+        path = self.state_machine.document.attributes['source']
+        path = os.path.realpath(path)
+        tail = path
+        while tail != "doc" and tail != "":
+            (path, tail) = os.path.split(path)
+
+        # Append "MAINTAINERS"
+        path = os.path.join(path, "MAINTAINERS")
+
+        try:
+            self.state.document.settings.record_dependencies.add(path)
+            lines = self.parse_maintainers(path)
+        except IOError as error:
+            raise self.severe('Problems with "%s" directive path:\n%s.' %
+                      (self.name, ErrorString(error)))
+
+        return []
diff --git a/doc/sphinx/parallel-wrapper.sh b/doc/sphinx/parallel-wrapper.sh
new file mode 100644
index 00000000000..e54c44ce117
--- /dev/null
+++ b/doc/sphinx/parallel-wrapper.sh
@@ -0,0 +1,33 @@
+#!/bin/sh
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Figure out if we should follow a specific parallelism from the make
+# environment (as exported by scripts/jobserver-exec), or fall back to
+# the "auto" parallelism when "-jN" is not specified at the top-level
+# "make" invocation.
+
+sphinx="$1"
+shift || true
+
+parallel="$PARALLELISM"
+if [ -z "$parallel" ] ; then
+	# If no parallelism is specified at the top-level make, then
+	# fall back to the expected "-jauto" mode that the "htmldocs"
+	# target has had.
+	auto=$(perl -e 'open IN,"'"$sphinx"' --version 2>&1 |";
+			while (<IN>) {
+				if (m/([\d\.]+)/) {
+					print "auto" if ($1 >= "1.7")
+				}
+			}
+			close IN')
+	if [ -n "$auto" ] ; then
+		parallel="$auto"
+	fi
+fi
+# Only if some parallelism has been determined do we add the -jN option.
+if [ -n "$parallel" ] ; then
+	parallel="-j$parallel"
+fi
+
+exec "$sphinx" $parallel "$@"
diff --git a/doc/sphinx/parse-headers.pl b/doc/sphinx/parse-headers.pl
new file mode 100755
index 00000000000..b063f2f1cfb
--- /dev/null
+++ b/doc/sphinx/parse-headers.pl
@@ -0,0 +1,401 @@
+#!/usr/bin/env perl
+use strict;
+use Text::Tabs;
+use Getopt::Long;
+use Pod::Usage;
+
+my $debug;
+my $help;
+my $man;
+
+GetOptions(
+	"debug" => \$debug,
+	'usage|?' => \$help,
+	'help' => \$man
+) or pod2usage(2);
+
+pod2usage(1) if $help;
+pod2usage(-exitstatus => 0, -verbose => 2) if $man;
+pod2usage(2) if (scalar @ARGV < 2 || scalar @ARGV > 3);
+
+my ($file_in, $file_out, $file_exceptions) = @ARGV;
+
+my $data;
+my %ioctls;
+my %defines;
+my %typedefs;
+my %enums;
+my %enum_symbols;
+my %structs;
+
+require Data::Dumper if ($debug);
+
+#
+# read the file and get identifiers
+#
+
+my $is_enum = 0;
+my $is_comment = 0;
+open IN, $file_in or die "Can't open $file_in";
+while (<IN>) {
+	$data .= $_;
+
+	my $ln = $_;
+	if (!$is_comment) {
+		$ln =~ s,/\*.*(\*/),,g;
+
+		$is_comment = 1 if ($ln =~ s,/\*.*,,);
+	} else {
+		if ($ln =~ s,^(.*\*/),,) {
+			$is_comment = 0;
+		} else {
+			next;
+		}
+	}
+
+	if ($is_enum && $ln =~ m/^\s*([_\w][\w\d_]+)\s*[\,=]?/) {
+		my $s = $1;
+		my $n = $1;
+		$n =~ tr/A-Z/a-z/;
+		$n =~ tr/_/-/;
+
+		$enum_symbols{$s} =  "\\ :ref:`$s <$n>`\\ ";
+
+		$is_enum = 0 if ($is_enum && m/\}/);
+		next;
+	}
+	$is_enum = 0 if ($is_enum && m/\}/);
+
+	if ($ln =~ m/^\s*#\s*define\s+([_\w][\w\d_]+)\s+_IO/) {
+		my $s = $1;
+		my $n = $1;
+		$n =~ tr/A-Z/a-z/;
+
+		$ioctls{$s} = "\\ :ref:`$s <$n>`\\ ";
+		next;
+	}
+
+	if ($ln =~ m/^\s*#\s*define\s+([_\w][\w\d_]+)\s+/) {
+		my $s = $1;
+		my $n = $1;
+		$n =~ tr/A-Z/a-z/;
+		$n =~ tr/_/-/;
+
+		$defines{$s} = "\\ :ref:`$s <$n>`\\ ";
+		next;
+	}
+
+	if ($ln =~ m/^\s*typedef\s+([_\w][\w\d_]+)\s+(.*)\s+([_\w][\w\d_]+);/) {
+		my $s = $2;
+		my $n = $3;
+
+		$typedefs{$n} = "\\ :c:type:`$n <$s>`\\ ";
+		next;
+	}
+	if ($ln =~ m/^\s*enum\s+([_\w][\w\d_]+)\s+\{/
+	    || $ln =~ m/^\s*enum\s+([_\w][\w\d_]+)$/
+	    || $ln =~ m/^\s*typedef\s*enum\s+([_\w][\w\d_]+)\s+\{/
+	    || $ln =~ m/^\s*typedef\s*enum\s+([_\w][\w\d_]+)$/) {
+		my $s = $1;
+
+		$enums{$s} =  "enum :c:type:`$s`\\ ";
+
+		$is_enum = $1;
+		next;
+	}
+	if ($ln =~ m/^\s*struct\s+([_\w][\w\d_]+)\s+\{/
+	    || $ln =~ m/^\s*struct\s+([[_\w][\w\d_]+)$/
+	    || $ln =~ m/^\s*typedef\s*struct\s+([_\w][\w\d_]+)\s+\{/
+	    || $ln =~ m/^\s*typedef\s*struct\s+([[_\w][\w\d_]+)$/
+	    ) {
+		my $s = $1;
+
+		$structs{$s} = "struct $s\\ ";
+		next;
+	}
+}
+close IN;
+
+#
+# Handle multi-line typedefs
+#
+
+my @matches = ($data =~ m/typedef\s+struct\s+\S+?\s*\{[^\}]+\}\s*(\S+)\s*\;/g,
+	       $data =~ m/typedef\s+enum\s+\S+?\s*\{[^\}]+\}\s*(\S+)\s*\;/g,);
+foreach my $m (@matches) {
+	my $s = $m;
+
+	$typedefs{$s} = "\\ :c:type:`$s`\\ ";
+	next;
+}
+
+#
+# Handle exceptions, if any
+#
+
+my %def_reftype = (
+	"ioctl"   => ":ref",
+	"define"  => ":ref",
+	"symbol"  => ":ref",
+	"typedef" => ":c:type",
+	"enum"    => ":c:type",
+	"struct"  => ":c:type",
+);
+
+if ($file_exceptions) {
+	open IN, $file_exceptions or die "Can't read $file_exceptions";
+	while (<IN>) {
+		next if (m/^\s*$/ || m/^\s*#/);
+
+		# Parsers to ignore a symbol
+
+		if (m/^ignore\s+ioctl\s+(\S+)/) {
+			delete $ioctls{$1} if (exists($ioctls{$1}));
+			next;
+		}
+		if (m/^ignore\s+define\s+(\S+)/) {
+			delete $defines{$1} if (exists($defines{$1}));
+			next;
+		}
+		if (m/^ignore\s+typedef\s+(\S+)/) {
+			delete $typedefs{$1} if (exists($typedefs{$1}));
+			next;
+		}
+		if (m/^ignore\s+enum\s+(\S+)/) {
+			delete $enums{$1} if (exists($enums{$1}));
+			next;
+		}
+		if (m/^ignore\s+struct\s+(\S+)/) {
+			delete $structs{$1} if (exists($structs{$1}));
+			next;
+		}
+		if (m/^ignore\s+symbol\s+(\S+)/) {
+			delete $enum_symbols{$1} if (exists($enum_symbols{$1}));
+			next;
+		}
+
+		# Parsers to replace a symbol
+		my ($type, $old, $new, $reftype);
+
+		if (m/^replace\s+(\S+)\s+(\S+)\s+(\S+)/) {
+			$type = $1;
+			$old = $2;
+			$new = $3;
+		} else {
+			die "Can't parse $file_exceptions: $_";
+		}
+
+		if ($new =~ m/^\:c\:(data|func|macro|type)\:\`(.+)\`/) {
+			$reftype = ":c:$1";
+			$new = $2;
+		} elsif ($new =~ m/\:ref\:\`(.+)\`/) {
+			$reftype = ":ref";
+			$new = $1;
+		} else {
+			$reftype = $def_reftype{$type};
+		}
+		$new = "$reftype:`$old <$new>`";
+
+		if ($type eq "ioctl") {
+			$ioctls{$old} = $new if (exists($ioctls{$old}));
+			next;
+		}
+		if ($type eq "define") {
+			$defines{$old} = $new if (exists($defines{$old}));
+			next;
+		}
+		if ($type eq "symbol") {
+			$enum_symbols{$old} = $new if (exists($enum_symbols{$old}));
+			next;
+		}
+		if ($type eq "typedef") {
+			$typedefs{$old} = $new if (exists($typedefs{$old}));
+			next;
+		}
+		if ($type eq "enum") {
+			$enums{$old} = $new if (exists($enums{$old}));
+			next;
+		}
+		if ($type eq "struct") {
+			$structs{$old} = $new if (exists($structs{$old}));
+			next;
+		}
+
+		die "Can't parse $file_exceptions: $_";
+	}
+}
+
+if ($debug) {
+	print Data::Dumper->Dump([\%ioctls], [qw(*ioctls)]) if (%ioctls);
+	print Data::Dumper->Dump([\%typedefs], [qw(*typedefs)]) if (%typedefs);
+	print Data::Dumper->Dump([\%enums], [qw(*enums)]) if (%enums);
+	print Data::Dumper->Dump([\%structs], [qw(*structs)]) if (%structs);
+	print Data::Dumper->Dump([\%defines], [qw(*defines)]) if (%defines);
+	print Data::Dumper->Dump([\%enum_symbols], [qw(*enum_symbols)]) if (%enum_symbols);
+}
+
+#
+# Align block
+#
+$data = expand($data);
+$data = "    " . $data;
+$data =~ s/\n/\n    /g;
+$data =~ s/\n\s+$/\n/g;
+$data =~ s/\n\s+\n/\n\n/g;
+
+#
+# Add escape codes for special characters
+#
+$data =~ s,([\_\`\*\<\>\&\\\\:\/\|\%\$\#\{\}\~\^]),\\$1,g;
+
+$data =~ s,DEPRECATED,**DEPRECATED**,g;
+
+#
+# Add references
+#
+
+my $start_delim = "[ \n\t\(\=\*\@]";
+my $end_delim = "(\\s|,|\\\\=|\\\\:|\\;|\\\)|\\}|\\{)";
+
+foreach my $r (keys %ioctls) {
+	my $s = $ioctls{$r};
+
+	$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
+
+	print "$r -> $s\n" if ($debug);
+
+	$data =~ s/($start_delim)($r)$end_delim/$1$s$3/g;
+}
+
+foreach my $r (keys %defines) {
+	my $s = $defines{$r};
+
+	$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
+
+	print "$r -> $s\n" if ($debug);
+
+	$data =~ s/($start_delim)($r)$end_delim/$1$s$3/g;
+}
+
+foreach my $r (keys %enum_symbols) {
+	my $s = $enum_symbols{$r};
+
+	$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
+
+	print "$r -> $s\n" if ($debug);
+
+	$data =~ s/($start_delim)($r)$end_delim/$1$s$3/g;
+}
+
+foreach my $r (keys %enums) {
+	my $s = $enums{$r};
+
+	$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
+
+	print "$r -> $s\n" if ($debug);
+
+	$data =~ s/enum\s+($r)$end_delim/$s$2/g;
+}
+
+foreach my $r (keys %structs) {
+	my $s = $structs{$r};
+
+	$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
+
+	print "$r -> $s\n" if ($debug);
+
+	$data =~ s/struct\s+($r)$end_delim/$s$2/g;
+}
+
+foreach my $r (keys %typedefs) {
+	my $s = $typedefs{$r};
+
+	$r =~ s,([\_\`\*\<\>\&\\\\:\/]),\\\\$1,g;
+
+	print "$r -> $s\n" if ($debug);
+	$data =~ s/($start_delim)($r)$end_delim/$1$s$3/g;
+}
+
+$data =~ s/\\ ([\n\s])/\1/g;
+
+#
+# Generate output file
+#
+
+my $title = $file_in;
+$title =~ s,.*/,,;
+
+open OUT, "> $file_out" or die "Can't open $file_out";
+print OUT ".. -*- coding: utf-8; mode: rst -*-\n\n";
+print OUT "$title\n";
+print OUT "=" x length($title);
+print OUT "\n\n.. parsed-literal::\n\n";
+print OUT $data;
+close OUT;
+
+__END__
+
+=head1 NAME
+
+parse_headers.pl - parse a C file, in order to identify functions, structs,
+enums and defines and create cross-references to a Sphinx book.
+
+=head1 SYNOPSIS
+
+B<parse_headers.pl> [<options>] <C_FILE> <OUT_FILE> [<EXCEPTIONS_FILE>]
+
+Where <options> can be: --debug, --help or --usage.
+
+=head1 OPTIONS
+
+=over 8
+
+=item B<--debug>
+
+Put the script in verbose mode, useful for debugging.
+
+=item B<--usage>
+
+Prints a brief help message and exits.
+
+=item B<--help>
+
+Prints a more detailed help message and exits.
+
+=back
+
+=head1 DESCRIPTION
+
+Convert a C header or source file (C_FILE), into a ReStructured Text
+included via ..parsed-literal block with cross-references for the
+documentation files that describe the API. It accepts an optional
+EXCEPTIONS_FILE with describes what elements will be either ignored or
+be pointed to a non-default reference.
+
+The output is written at the (OUT_FILE).
+
+It is capable of identifying defines, functions, structs, typedefs,
+enums and enum symbols and create cross-references for all of them.
+It is also capable of distinguish #define used for specifying a Linux
+ioctl.
+
+The EXCEPTIONS_FILE contain two rules to allow ignoring a symbol or
+to replace the default references by a custom one.
+
+Please read Documentation/doc-guide/parse-headers.rst at the Kernel's
+tree for more details.
+
+=head1 BUGS
+
+Report bugs to Mauro Carvalho Chehab <mchehab@kernel.org>
+
+=head1 COPYRIGHT
+
+Copyright (c) 2016 by Mauro Carvalho Chehab <mchehab+samsung@kernel.org>.
+
+License GPLv2: GNU GPL version 2 <https://gnu.org/licenses/gpl.html>.
+
+This is free software: you are free to change and redistribute it.
+There is NO WARRANTY, to the extent permitted by law.
+
+=cut
diff --git a/doc/sphinx/requirements.txt b/doc/sphinx/requirements.txt
new file mode 100644
index 00000000000..40dde599916
--- /dev/null
+++ b/doc/sphinx/requirements.txt
@@ -0,0 +1,25 @@
+alabaster==0.7.16
+Babel==2.15.0
+certifi==2024.7.4
+charset-normalizer==3.3.2
+docutils==0.20.1
+idna==3.7
+imagesize==1.4.1
+Jinja2==3.1.4
+MarkupSafe==2.1.5
+packaging==24.1
+Pygments==2.18.0
+requests==2.32.3
+six==1.16.0
+snowballstemmer==2.2.0
+Sphinx==7.3.7
+sphinx-prompt==1.8.0
+sphinx-rtd-theme==2.0.0
+sphinxcontrib-applehelp==1.0.8
+sphinxcontrib-devhelp==1.0.6
+sphinxcontrib-htmlhelp==2.0.5
+sphinxcontrib-jquery==4.1
+sphinxcontrib-jsmath==1.0.1
+sphinxcontrib-qthelp==1.0.7
+sphinxcontrib-serializinghtml==1.1.10
+urllib3==2.2.2
diff --git a/doc/sphinx/rstFlatTable.py b/doc/sphinx/rstFlatTable.py
new file mode 100755
index 00000000000..2019a55f6b1
--- /dev/null
+++ b/doc/sphinx/rstFlatTable.py
@@ -0,0 +1,374 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8; mode: python -*-
+# pylint: disable=C0330, R0903, R0912
+
+u"""
+    flat-table
+    ~~~~~~~~~~
+
+    Implementation of the ``flat-table`` reST-directive.
+
+    :copyright:  Copyright (C) 2016  Markus Heiser
+    :license:    GPL Version 2, June 1991 see linux/COPYING for details.
+
+    The ``flat-table`` (:py:class:`FlatTable`) is a double-stage list similar to
+    the ``list-table`` with some additional features:
+
+    * *column-span*: with the role ``cspan`` a cell can be extended through
+      additional columns
+
+    * *row-span*: with the role ``rspan`` a cell can be extended through
+      additional rows
+
+    * *auto span* rightmost cell of a table row over the missing cells on the
+      right side of that table-row.  With Option ``:fill-cells:`` this behavior
+      can changed from *auto span* to *auto fill*, which automaticly inserts
+      (empty) cells instead of spanning the last cell.
+
+    Options:
+
+    * header-rows:   [int] count of header rows
+    * stub-columns:  [int] count of stub columns
+    * widths:        [[int] [int] ... ] widths of columns
+    * fill-cells:    instead of autospann missing cells, insert missing cells
+
+    roles:
+
+    * cspan: [int] additionale columns (*morecols*)
+    * rspan: [int] additionale rows (*morerows*)
+"""
+
+# ==============================================================================
+# imports
+# ==============================================================================
+
+import sys
+
+from docutils import nodes
+from docutils.parsers.rst import directives, roles
+from docutils.parsers.rst.directives.tables import Table
+from docutils.utils import SystemMessagePropagation
+
+# ==============================================================================
+# common globals
+# ==============================================================================
+
+__version__  = '1.0'
+
+PY3 = sys.version_info[0] == 3
+PY2 = sys.version_info[0] == 2
+
+if PY3:
+    # pylint: disable=C0103, W0622
+    unicode     = str
+    basestring  = str
+
+# ==============================================================================
+def setup(app):
+# ==============================================================================
+
+    app.add_directive("flat-table", FlatTable)
+    roles.register_local_role('cspan', c_span)
+    roles.register_local_role('rspan', r_span)
+
+    return dict(
+        version = __version__,
+        parallel_read_safe = True,
+        parallel_write_safe = True
+    )
+
+# ==============================================================================
+def c_span(name, rawtext, text, lineno, inliner, options=None, content=None):
+# ==============================================================================
+    # pylint: disable=W0613
+
+    options  = options if options is not None else {}
+    content  = content if content is not None else []
+    nodelist = [colSpan(span=int(text))]
+    msglist  = []
+    return nodelist, msglist
+
+# ==============================================================================
+def r_span(name, rawtext, text, lineno, inliner, options=None, content=None):
+# ==============================================================================
+    # pylint: disable=W0613
+
+    options  = options if options is not None else {}
+    content  = content if content is not None else []
+    nodelist = [rowSpan(span=int(text))]
+    msglist  = []
+    return nodelist, msglist
+
+
+# ==============================================================================
+class rowSpan(nodes.General, nodes.Element): pass # pylint: disable=C0103,C0321
+class colSpan(nodes.General, nodes.Element): pass # pylint: disable=C0103,C0321
+# ==============================================================================
+
+# ==============================================================================
+class FlatTable(Table):
+# ==============================================================================
+
+    u"""FlatTable (``flat-table``) directive"""
+
+    option_spec = {
+        'name': directives.unchanged
+        , 'class': directives.class_option
+        , 'header-rows': directives.nonnegative_int
+        , 'stub-columns': directives.nonnegative_int
+        , 'widths': directives.positive_int_list
+        , 'fill-cells' : directives.flag }
+
+    def run(self):
+
+        if not self.content:
+            error = self.state_machine.reporter.error(
+                'The "%s" directive is empty; content required.' % self.name,
+                nodes.literal_block(self.block_text, self.block_text),
+                line=self.lineno)
+            return [error]
+
+        title, messages = self.make_title()
+        node = nodes.Element()          # anonymous container for parsing
+        self.state.nested_parse(self.content, self.content_offset, node)
+
+        tableBuilder = ListTableBuilder(self)
+        tableBuilder.parseFlatTableNode(node)
+        tableNode = tableBuilder.buildTableNode()
+        # SDK.CONSOLE()  # print --> tableNode.asdom().toprettyxml()
+        if title:
+            tableNode.insert(0, title)
+        return [tableNode] + messages
+
+
+# ==============================================================================
+class ListTableBuilder(object):
+# ==============================================================================
+
+    u"""Builds a table from a double-stage list"""
+
+    def __init__(self, directive):
+        self.directive = directive
+        self.rows      = []
+        self.max_cols  = 0
+
+    def buildTableNode(self):
+
+        colwidths    = self.directive.get_column_widths(self.max_cols)
+        if isinstance(colwidths, tuple):
+            # Since docutils 0.13, get_column_widths returns a (widths,
+            # colwidths) tuple, where widths is a string (i.e. 'auto').
+            # See https://sourceforge.net/p/docutils/patches/120/.
+            colwidths = colwidths[1]
+        stub_columns = self.directive.options.get('stub-columns', 0)
+        header_rows  = self.directive.options.get('header-rows', 0)
+
+        table = nodes.table()
+        tgroup = nodes.tgroup(cols=len(colwidths))
+        table += tgroup
+
+
+        for colwidth in colwidths:
+            colspec = nodes.colspec(colwidth=colwidth)
+            # FIXME: It seems, that the stub method only works well in the
+            # absence of rowspan (observed by the html buidler, the docutils-xml
+            # build seems OK).  This is not extraordinary, because there exists
+            # no table directive (except *this* flat-table) which allows to
+            # define coexistent of rowspan and stubs (there was no use-case
+            # before flat-table). This should be reviewed (later).
+            if stub_columns:
+                colspec.attributes['stub'] = 1
+                stub_columns -= 1
+            tgroup += colspec
+        stub_columns = self.directive.options.get('stub-columns', 0)
+
+        if header_rows:
+            thead = nodes.thead()
+            tgroup += thead
+            for row in self.rows[:header_rows]:
+                thead += self.buildTableRowNode(row)
+
+        tbody = nodes.tbody()
+        tgroup += tbody
+
+        for row in self.rows[header_rows:]:
+            tbody += self.buildTableRowNode(row)
+        return table
+
+    def buildTableRowNode(self, row_data, classes=None):
+        classes = [] if classes is None else classes
+        row = nodes.row()
+        for cell in row_data:
+            if cell is None:
+                continue
+            cspan, rspan, cellElements = cell
+
+            attributes = {"classes" : classes}
+            if rspan:
+                attributes['morerows'] = rspan
+            if cspan:
+                attributes['morecols'] = cspan
+            entry = nodes.entry(**attributes)
+            entry.extend(cellElements)
+            row += entry
+        return row
+
+    def raiseError(self, msg):
+        error =  self.directive.state_machine.reporter.error(
+            msg
+            , nodes.literal_block(self.directive.block_text
+                                  , self.directive.block_text)
+            , line = self.directive.lineno )
+        raise SystemMessagePropagation(error)
+
+    def parseFlatTableNode(self, node):
+        u"""parses the node from a :py:class:`FlatTable` directive's body"""
+
+        if len(node) != 1 or not isinstance(node[0], nodes.bullet_list):
+            self.raiseError(
+                'Error parsing content block for the "%s" directive: '
+                'exactly one bullet list expected.' % self.directive.name )
+
+        for rowNum, rowItem in enumerate(node[0]):
+            row = self.parseRowItem(rowItem, rowNum)
+            self.rows.append(row)
+        self.roundOffTableDefinition()
+
+    def roundOffTableDefinition(self):
+        u"""Round off the table definition.
+
+        This method rounds off the table definition in :py:member:`rows`.
+
+        * This method inserts the needed ``None`` values for the missing cells
+        arising from spanning cells over rows and/or columns.
+
+        * recount the :py:member:`max_cols`
+
+        * Autospan or fill (option ``fill-cells``) missing cells on the right
+          side of the table-row
+        """
+
+        y = 0
+        while y < len(self.rows):
+            x = 0
+
+            while x < len(self.rows[y]):
+                cell = self.rows[y][x]
+                if cell is None:
+                    x += 1
+                    continue
+                cspan, rspan = cell[:2]
+                # handle colspan in current row
+                for c in range(cspan):
+                    try:
+                        self.rows[y].insert(x+c+1, None)
+                    except: # pylint: disable=W0702
+                        # the user sets ambiguous rowspans
+                        pass # SDK.CONSOLE()
+                # handle colspan in spanned rows
+                for r in range(rspan):
+                    for c in range(cspan + 1):
+                        try:
+                            self.rows[y+r+1].insert(x+c, None)
+                        except: # pylint: disable=W0702
+                            # the user sets ambiguous rowspans
+                            pass # SDK.CONSOLE()
+                x += 1
+            y += 1
+
+        # Insert the missing cells on the right side. For this, first
+        # re-calculate the max columns.
+
+        for row in self.rows:
+            if self.max_cols < len(row):
+                self.max_cols = len(row)
+
+        # fill with empty cells or cellspan?
+
+        fill_cells = False
+        if 'fill-cells' in self.directive.options:
+            fill_cells = True
+
+        for row in self.rows:
+            x =  self.max_cols - len(row)
+            if x and not fill_cells:
+                if row[-1] is None:
+                    row.append( ( x - 1, 0, []) )
+                else:
+                    cspan, rspan, content = row[-1]
+                    row[-1] = (cspan + x, rspan, content)
+            elif x and fill_cells:
+                for i in range(x):
+                    row.append( (0, 0, nodes.comment()) )
+
+    def pprint(self):
+        # for debugging
+        retVal = "[   "
+        for row in self.rows:
+            retVal += "[ "
+            for col in row:
+                if col is None:
+                    retVal += ('%r' % col)
+                    retVal += "\n    , "
+                else:
+                    content = col[2][0].astext()
+                    if len (content) > 30:
+                        content = content[:30] + "..."
+                    retVal += ('(cspan=%s, rspan=%s, %r)'
+                               % (col[0], col[1], content))
+                    retVal += "]\n    , "
+            retVal = retVal[:-2]
+            retVal += "]\n  , "
+        retVal = retVal[:-2]
+        return retVal + "]"
+
+    def parseRowItem(self, rowItem, rowNum):
+        row = []
+        childNo = 0
+        error   = False
+        cell    = None
+        target  = None
+
+        for child in rowItem:
+            if (isinstance(child , nodes.comment)
+                or isinstance(child, nodes.system_message)):
+                pass
+            elif isinstance(child , nodes.target):
+                target = child
+            elif isinstance(child, nodes.bullet_list):
+                childNo += 1
+                cell = child
+            else:
+                error = True
+                break
+
+        if childNo != 1 or error:
+            self.raiseError(
+                'Error parsing content block for the "%s" directive: '
+                'two-level bullet list expected, but row %s does not '
+                'contain a second-level bullet list.'
+                % (self.directive.name, rowNum + 1))
+
+        for cellItem in cell:
+            cspan, rspan, cellElements = self.parseCellItem(cellItem)
+            if target is not None:
+                cellElements.insert(0, target)
+            row.append( (cspan, rspan, cellElements) )
+        return row
+
+    def parseCellItem(self, cellItem):
+        # search and remove cspan, rspan colspec from the first element in
+        # this listItem (field).
+        cspan = rspan = 0
+        if not len(cellItem):
+            return cspan, rspan, []
+        for elem in cellItem[0]:
+            if isinstance(elem, colSpan):
+                cspan = elem.get("span")
+                elem.parent.remove(elem)
+                continue
+            if isinstance(elem, rowSpan):
+                rspan = elem.get("span")
+                elem.parent.remove(elem)
+                continue
+        return cspan, rspan, cellItem[:]
diff --git a/doc/usage/blkmap.rst b/doc/usage/blkmap.rst
new file mode 100644
index 00000000000..7337ea507a1
--- /dev/null
+++ b/doc/usage/blkmap.rst
@@ -0,0 +1,111 @@
+.. SPDX-License-Identifier: GPL-2.0+
+..
+.. Copyright (c) 2023 Addiva Elektronik
+.. Author: Tobias Waldekranz <tobias@waldekranz.com>
+
+Block Maps (blkmap)
+===================
+
+Block maps are a way of looking at various sources of data through the
+lens of a regular block device. It lets you treat devices that are not
+block devices, like RAM, as if they were. It also lets you export a
+slice of an existing block device, which does not have to correspond
+to a partition boundary, as a new block device.
+
+This is primarily useful because U-Boot's filesystem drivers only
+operate on block devices, so a block map lets you access filesystems
+wherever they might be located.
+
+The implementation is loosely modeled on Linux's "Device Mapper"
+subsystem, see `kernel documentation`_ for more information.
+
+.. _kernel documentation: https://www.kernel.org/doc/html/latest/admin-guide/device-mapper/index.html
+
+
+Example: Netbooting an Ext4 Image
+---------------------------------
+
+Say that our system is using an Ext4 filesystem as its rootfs, where
+the kernel is stored in ``/boot``. This image is then typically stored
+in an eMMC partition. In this configuration, we can use something like
+``load mmc 0 ${kernel_addr_r} /boot/Image`` to load the kernel image
+into the expected location, and then boot the system. No problems.
+
+Now imagine that during development, or as a recovery mechanism, we
+want to boot the same type of image by downloading it over the
+network. Getting the image to the target is easy enough:
+
+::
+
+   dhcp ${ramdisk_addr_r} rootfs.ext4
+
+But now we are faced with a predicament: how to we extract the kernel
+image? Block maps to the rescue!
+
+We start by creating a new device:
+
+::
+
+   blkmap create netboot
+
+Before setting up the mapping, we figure out the size of the
+downloaded file, in blocks:
+
+::
+
+   setexpr fileblks ${filesize} + 0x1ff
+   setexpr fileblks ${filesize} / 0x200
+
+Then we can add a mapping to the start of our device, backed by the
+memory at `${loadaddr}`:
+
+::
+
+   blkmap map netboot 0 ${fileblks} mem ${fileaddr}
+
+Now we can access the filesystem via the virtual device:
+
+::
+
+   blkmap get netboot dev devnum
+   load blkmap ${devnum} ${kernel_addr_r} /boot/Image
+
+
+Example: Accessing a filesystem inside an FIT image
+---------------------------------------------------
+
+In this example, an FIT image is stored in an eMMC partition. We would
+like to read the file ``/etc/version``, stored inside a Squashfs image
+in the FIT. Since the Squashfs image is not stored on a partition
+boundary, there is no way of accessing it via ``load mmc ...``.
+
+What we can to instead is to first figure out the offset and size of
+the filesystem:
+
+::
+
+   mmc dev 0
+   mmc read ${loadaddr} 0 0x100
+
+   fdt addr ${loadaddr}
+   fdt get value squashaddr /images/ramdisk data-position
+   fdt get value squashsize /images/ramdisk data-size
+
+   setexpr squashblk  ${squashaddr} / 0x200
+   setexpr squashsize ${squashsize} + 0x1ff
+   setexpr squashsize ${squashsize} / 0x200
+
+Then we can create a block map that maps to that slice of the full
+partition:
+
+::
+
+   blkmap create sq
+   blkmap map sq 0 ${squashsize} linear mmc 0 ${squashblk}
+
+Now we can access the filesystem:
+
+::
+
+   blkmap get sq dev devnum
+   load blkmap ${devnum} ${loadaddr} /etc/version
diff --git a/doc/usage/cmd/acpi.rst b/doc/usage/cmd/acpi.rst
new file mode 100644
index 00000000000..9f30972fe53
--- /dev/null
+++ b/doc/usage/cmd/acpi.rst
@@ -0,0 +1,263 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: acpi (command)
+
+acpi command
+============
+
+Synopsis
+--------
+
+::
+
+    acpi list
+    acpi items [-d]
+    acpi dump <name>
+    acpi set <address>
+
+Description
+-----------
+
+The *acpi* command is used to dump the ACPI tables generated by U-Boot for
+passing to the operating systems. It allows manually setting the address to take
+a look at existing ACPI tables.
+
+ACPI tables can be generated by various output functions and even devices can
+output material to include in the Differentiated System Description Table (DSDT)
+and SSDT tables (Secondary System Description Table). U-Boot keeps track of
+which device or table-writer produced each piece of the ACPI tables.
+
+The ACPI tables are stored contiguously in memory.
+
+
+acpi list
+~~~~~~~~~
+
+List the ACPI tables that have been generated. Each table has a 4-character
+table name (e.g. SSDT, FACS) and has a format defined by the
+`ACPI specification`_.
+
+U-Boot does not currently support decoding the tables. Unlike devicetree, ACPI
+tables have no regular schema and also some include bytecode, so decoding the
+tables requires a lot of code.
+
+The table shows the following information:
+
+Name
+    Table name, e.g. `MCFG`
+
+Base
+    Base address of table in memory
+
+Size
+    Size of table in bytes
+
+Detail
+    More information depending on the table type
+
+    Revision
+        Table revision number (two decimal digits)
+
+    OEM ID
+        ID for the Original Equipment Manufacturer. Typically this is "U-BOOT".
+
+    OEM Table ID
+        Table ID for the Original Equipment Manufacturer. Typically this is
+        "U-BOOTBL" (U-Boot bootloader)
+
+    OEM Revision
+        Revision string for the Original Equipment Manufacturer. Typically this
+        is the U-Boot release number, e.g. 20220101 (meaning v2022.01 since the
+        final 01 is not used). For DSDT, this is set by the source code in
+        the parameters of DefinitionBlock().
+
+    ACPI compiler-vendor ID
+        This is normally `INTL` for Intel
+
+    ACPI compiler revision
+        This is the compiler revision. It is set to the version string for the
+        DSDT table but other tables just use the value 0 or 1, since U-Boot does
+        not actually use the compiler in these cases. It generates the code
+        itself.
+
+acpi items
+~~~~~~~~~~
+
+List the ACPI data that was generated, broken down by item. An item is either
+an ACPI table generated by a writer function, or the part of a table that was
+generated by a particular device.
+
+The `-d` flag also shows a binary dump of the table.
+
+The table shows the following information about each item:
+
+Seq
+    Sequence number in hex
+
+Type
+    Type of item
+
+    =====  ============================================================
+    Type   Meaning
+    =====  ============================================================
+    dsdt   Fragment of a DSDT table, as generated by a device
+    ssdt   Fragment of a SSDT table, as generated by a device
+    other  A whole table of a particular type. as generated by a writer
+    =====  ============================================================
+
+Base
+    Base address of table in memory
+
+Size
+    Size of table in bytes
+
+Device / Writer
+    Name of device (for ssdt/dsdt) that wrong this fragment of the table, or
+    name of the registered writer function (otherwise) that wrote the table.
+
+acpi dump
+~~~~~~~~~
+
+Dump a paticular ACPI table in binary format. This can be used to read the table
+if you have the specification handy.
+
+
+Example
+-------
+
+::
+
+    => acpi list
+    Name      Base   Size  Detail
+    ----  --------  -----  ------
+    RSDP  79925000     24  v02 U-BOOT
+    RSDT  79925030     48  v01 U-BOOT U-BOOTBL 20220101 INTL 0
+    XSDT  799250e0     6c  v01 U-BOOT U-BOOTBL 20220101 INTL 0
+    FACP  79929570     f4  v04 U-BOOT U-BOOTBL 20220101 INTL 1
+    DSDT  79925280   32ea  v02 U-BOOT U-BOOTBL 20110725 INTL 20180105
+    FACS  79925240     40
+    MCFG  79929670     2c  v01 U-BOOT U-BOOTBL 20220101 INTL 0
+    SPCR  799296a0     50  v02 U-BOOT U-BOOTBL 20220101 INTL 0
+    TPM2  799296f0     4c  v04 U-BOOT U-BOOTBL 20220101 INTL 0
+    APIC  79929740     6c  v02 U-BOOT U-BOOTBL 20220101 INTL 0
+    SSDT  799297b0   1523  v02 U-BOOT U-BOOTBL 20220101 INTL 1
+    NHLT  7992ace0    e60  v05 coral coral 3 INTL 0
+    DBG2  7992db40     61  v00 U-BOOT U-BOOTBL 20220101 INTL 0
+    HPET  7992dbb0     38  v01 U-BOOT U-BOOTBL 20220101 INTL 0
+    => acpi items
+    Seq  Type       Base   Size  Device/Writer
+    ---  -----  --------   ----  -------------
+      0  other  79925000    240  0base
+      1  other  79925240     40  1facs
+      2  dsdt   799252a4     58  board
+      3  dsdt   799252fc     10  lpc
+      4  other  79925280   32f0  3dsdt
+      5  other  79928570   1000  4gnvs
+      6  other  79929570    100  5fact
+      7  other  79929670     30  5mcfg
+      8  other  799296a0     50  5spcr
+      9  other  799296f0     50  5tpm2
+      a  other  79929740     70  5x86
+      b  ssdt   799297d4     fe  maxim-codec
+      c  ssdt   799298d2     28  i2c2@16,0
+      d  ssdt   799298fa    270  da-codec
+      e  ssdt   79929b6a     28  i2c2@16,1
+      f  ssdt   79929b92     28  i2c2@16,2
+     10  ssdt   79929bba     83  tpm@50
+     11  ssdt   79929c3d     28  i2c2@16,3
+     12  ssdt   79929c65    282  elan-touchscreen@10
+     13  ssdt   79929ee7    285  raydium-touchscreen@39
+     14  ssdt   7992a16c     28  i2c2@17,0
+     15  ssdt   7992a194     d8  elan-touchpad@15
+     16  ssdt   7992a26c    163  synaptics-touchpad@2c
+     17  ssdt   7992a3cf     28  i2c2@17,1
+     18  ssdt   7992a3f7    111  wacom-digitizer@9
+     19  ssdt   7992a508     8f  sdmmc@1b,0
+     1a  ssdt   7992a597     4b  wifi
+     1b  ssdt   7992a5e2    1a0  cpu@0
+     1c  ssdt   7992a782    1a0  cpu@1
+     1d  ssdt   7992a922    1a0  cpu@2
+     1e  ssdt   7992aac2    211  cpu@3
+     1f  other  799297b0   1530  6ssdt
+     20  other  7992ace0   2f10  8dev
+    => acpi dump mcfg
+    MCFG @ 79929670
+    00000000: 4d 43 46 47 2c 00 00 00 01 41 55 2d 42 4f 4f 54  MCFG,....AU-BOOT
+    00000010: 55 2d 42 4f 4f 54 42 4c 01 01 22 20 49 4e 54 4c  U-BOOTBL.." INTL
+    00000020: 00 00 00 00 00 00 00 00 00 00 00 00              ............
+    => acpi items -d
+    Seq  Type       Base   Size  Device/Writer
+    ---  -----  --------   ----  -------------
+      0  other  79925000    240  0base
+    00000000: 52 53 44 20 50 54 52 20 9e 55 2d 42 4f 4f 54 02  RSD PTR .U-BOOT.
+    00000010: 30 50 92 79 24 00 00 00 e0 50 92 79 00 00 00 00  0P.y$....P.y....
+    00000020: a1 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    00000030: 52 53 44 54 48 00 00 00 01 8b 55 2d 42 4f 4f 54  RSDTH.....U-BOOT
+    00000040: 55 2d 42 4f 4f 54 42 4c 01 01 22 20 49 4e 54 4c  U-BOOTBL.." INTL
+    00000050: 00 00 00 00 70 95 92 79 70 96 92 79 a0 96 92 79  ....p..yp..y...y
+    00000060: f0 96 92 79 40 97 92 79 b0 97 92 79 e0 ac 92 79  ...y@..y...y...y
+    00000070: 40 db 92 79 b0 db 92 79 00 00 00 00 00 00 00 00  @..y...y........
+    00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    000000e0: 58 53 44 54 6c 00 00 00 01 61 55 2d 42 4f 4f 54  XSDTl....aU-BOOT
+    000000f0: 55 2d 42 4f 4f 54 42 4c 01 01 22 20 49 4e 54 4c  U-BOOTBL.." INTL
+    00000100: 00 00 00 00 70 95 92 79 00 00 00 00 70 96 92 79  ....p..y....p..y
+    00000110: 00 00 00 00 a0 96 92 79 00 00 00 00 f0 96 92 79  .......y.......y
+    00000120: 00 00 00 00 40 97 92 79 00 00 00 00 b0 97 92 79  ....@..y.......y
+    00000130: 00 00 00 00 e0 ac 92 79 00 00 00 00 40 db 92 79  .......y....@..y
+    00000140: 00 00 00 00 b0 db 92 79 00 00 00 00 00 00 00 00  .......y........
+    00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    ...
+
+      1  other  79925240     40  1facs
+    00000000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00  FACS@...........
+    00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    00000020: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+    00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+
+      2  dsdt   799252a4     58  board
+    00000000: 10 87 05 00 5c 00 08 4f 49 50 47 12 8c 04 00 03  ....\..OIPG.....
+    00000010: 12 8b 01 00 04 01 01 0e ff ff ff ff ff ff ff ff  ................
+    00000020: 0d 49 4e 54 33 34 35 32 3a 30 31 00 12 85 01 00  .INT3452:01.....
+    00000030: 04 0a 03 01 0a 23 0d 49 4e 54 33 34 35 32 3a 30  .....#.INT3452:0
+    00000040: 31 00 12 85 01 00 04 0a 04 01 0a 0a 0d 49 4e 54  1............INT
+    00000050: 33 34 35 32 3a 30 30 00                          3452:00.
+
+      3  dsdt   799252fc     10  lpc
+    00000000: 10 8f 00 00 5c 00 08 4e 56 53 41 0c 10 50 93 79  ....\..NVSA..P.y
+
+      4  other  79925280   32f0  3dsdt
+    00000000: 44 53 44 54 ea 32 00 00 02 eb 55 2d 42 4f 4f 54  DSDT.2....U-BOOT
+    00000010: 55 2d 42 4f 4f 54 42 4c 25 07 11 20 49 4e 54 4c  U-BOOTBL%.. INTL
+
+This shows searching for tables in a known area of memory, then setting the
+pointer::
+
+    => acpi list
+    No ACPI tables present
+    => ms.s bff00000 80000 "RSD PTR"
+    bff75000: 52 53 44 20 50 54 52 20 cf 42 4f 43 48 53 20 00  RSD PTR .BOCHS .
+    1 match
+    => acpi set bff75000
+    Setting ACPI pointer to bff75000
+    => acpi list
+    Name      Base   Size  Detail
+    ----  --------  -----  ------
+    RSDP  bff75000      0  v00 BOCHS
+    RSDT  bff76a63     38  v01 BOCHS  BXPC     1 BXPC 1
+    FACP  bff768ff     74  v01 BOCHS  BXPC     1 BXPC 1
+    DSDT  bff75080   187f  v01 BOCHS  BXPC     1 BXPC 1
+    FACS  bff75040     40
+    APIC  bff76973     90  v01 BOCHS  BXPC     1 BXPC 1
+    HPET  bff76a03     38  v01 BOCHS  BXPC     1 BXPC 1
+    WAET  bff76a3b     28  v01 BOCHS  BXPC     1 BXPC 1
+    SSDT  bff95040     c5  v02 COREv4 COREBOOT 2a CORE 20221020
+
+
+.. _`ACPI specification`: https://uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf
diff --git a/doc/usage/cmd/addrmap.rst b/doc/usage/cmd/addrmap.rst
new file mode 100644
index 00000000000..6d0dbceefea
--- /dev/null
+++ b/doc/usage/cmd/addrmap.rst
@@ -0,0 +1,44 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: addrmap (command)
+
+addrmap command
+===============
+
+Synopsis
+--------
+
+::
+
+    addrmap
+
+Description
+-----------
+
+The addrmap command is used to display non-identity virtual-physical memory
+mappings for 32-bit CPUs.
+
+The output may look like:
+
+::
+
+    => addrmap
+               vaddr            paddr             size
+    ================ ================ ================
+            e0000000        fe0000000         00100000
+            00000000         00000000         04000000
+            04000000         04000000         04000000
+            80000000        c00000000         10000000
+            90000000        c10000000         10000000
+            a0000000        fe1000000         00010000
+
+The first column indicates the virtual address.
+The second column indicates the physical address.
+The third column indicates the mapped size.
+
+Configuration
+-------------
+
+To use the addrmap command you must specify CONFIG_CMD_ADDRMAP=y.
+It is automatically turned on when CONFIG_ADDR_MAP is set.
diff --git a/doc/usage/cmd/armffa.rst b/doc/usage/cmd/armffa.rst
new file mode 100644
index 00000000000..4f41e3393fd
--- /dev/null
+++ b/doc/usage/cmd/armffa.rst
@@ -0,0 +1,97 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
+
+.. index::
+   single: armffa (command)
+
+armffa command
+==============
+
+Synopsis
+--------
+
+::
+
+   armffa [sub-command] [arguments]
+
+   sub-commands:
+
+        getpart [partition UUID]
+
+            lists the partition(s) info
+
+        ping [partition ID]
+
+            sends a data pattern to the specified partition
+
+        devlist
+
+            displays information about the FF-A device/driver
+
+Description
+-----------
+
+armffa is a command showcasing how to use the FF-A bus and how to invoke its operations.
+
+This provides a guidance to the client developers on how to call the FF-A bus interfaces.
+
+The command also allows to gather secure partitions information and ping these  partitions.
+
+The command is also helpful in testing the communication with secure partitions.
+
+Example
+-------
+
+The following examples are run on Corstone-1000 platform.
+
+* ping
+
+::
+
+   corstone1000# armffa ping 0x8003
+   SP response:
+   [LSB]
+   fffffffe
+   0
+   0
+   0
+   0
+
+* ping (failure case)
+
+::
+
+   corstone1000# armffa ping 0
+   Sending direct request error (-22)
+
+* getpart
+
+::
+
+   corstone1000# armffa getpart 33d532ed-e699-0942-c09c-a798d9cd722d
+   Partition: id = 8003 , exec_ctxt 1 , properties 3
+
+* getpart (failure case)
+
+::
+
+   corstone1000# armffa getpart 33d532ed-e699-0942-c09c-a798d9cd7221
+   INVALID_PARAMETERS: Unrecognized UUID
+   Failure in querying partitions count (error code: -22)
+
+* devlist
+
+::
+
+   corstone1000# armffa devlist
+   device name arm_ffa, dev 00000000fdf41c30, driver name arm_ffa, ops 00000000fffc0e98
+
+Configuration
+-------------
+
+The command is available if CONFIG_CMD_ARMFFA=y and CONFIG_ARM_FFA_TRANSPORT=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) on success, 1 (false) on failure.
diff --git a/doc/usage/cmd/askenv.rst b/doc/usage/cmd/askenv.rst
new file mode 100644
index 00000000000..e2b3c5379ae
--- /dev/null
+++ b/doc/usage/cmd/askenv.rst
@@ -0,0 +1,92 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: askenv (command)
+
+askenv command
+==============
+
+Synopsis
+--------
+
+::
+
+    askenv name [message] [size]
+
+Description
+-----------
+
+Display message and get environment variable name of max size characters
+from stdin.
+
+See also *env ask* in :doc:`env`.
+
+name
+    name of the environment variable
+
+message
+    message is displayed while the command waits for the  value to be
+    entered from stdin.if no message is specified,a default message
+    "Please enter name:" will be displayed.
+
+size
+    maximum number of characters that will be stored in environment
+    variable name.this is in decimal number format (unlike in
+    other commands where size values are in hexa-decimal). Default
+    value of size is 1023 (CONFIG_SYS_CBSIZE - 1).
+
+Example
+-------
+
+Value of a environment variable env1 without message and size parameters:
+
+::
+
+    => askenv env1;echo $?
+    Please enter 'env1': val1
+    0
+    => printenv env1
+    env1=val1
+
+Value of a environment variable env2 with message and size parameters:
+
+::
+
+    => askenv env2 Please type-in a value for env2: 10;echo $?
+    Please type-in a value for env2: 1234567890123
+    0
+    => printenv env2
+    env2=1234567890
+
+Value of a environment variable env3 with size parameter only:
+
+::
+
+    => askenv env3 10;echo $?
+    Please enter 'env3': val3
+    0
+    => printenv env3
+    env3=val3
+
+Return Value of askenv command, when used without any other arguments:
+
+::
+
+    => askenv;echo $?
+    askenv - get environment variables from stdin
+
+    Usage:
+    askenv name [message] [size]
+        - display 'message' and get environment variable 'name' from stdin (max 'size' chars)
+    1
+
+Configuration
+-------------
+
+The askenv command is only available if CMD_ASKENV=y
+
+Return value
+------------
+
+The return value $? is set to 0 (true).
+If no other arguments are specified (along with askenv), it is set to 1 (false).
diff --git a/doc/usage/cmd/base.rst b/doc/usage/cmd/base.rst
new file mode 100644
index 00000000000..0d030a1d1e0
--- /dev/null
+++ b/doc/usage/cmd/base.rst
@@ -0,0 +1,26 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: base (command)
+
+base command
+============
+
+Synopsis
+--------
+
+::
+
+    base [address]
+
+Description
+-----------
+
+The *base* command sets or displays the address offset used by the memory
+commands *cmp, cp, md, mdc, mm, ms, mw, mwc*.
+
+All other commands ignore the address defined by *base*.
+
+address
+    new base address as hexadecimal number. If no value is provided, the current
+    value is displayed.
diff --git a/doc/usage/cmd/bdinfo.rst b/doc/usage/cmd/bdinfo.rst
new file mode 100644
index 00000000000..a21fbc83ccf
--- /dev/null
+++ b/doc/usage/cmd/bdinfo.rst
@@ -0,0 +1,122 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+
+.. index::
+   single: bdinfo (command)
+
+bdinfo command
+==============
+
+Synopsis
+--------
+
+::
+
+    bdinfo
+
+Description
+-----------
+
+The *bdinfo* command prints information about the board.
+
+Example
+-------
+
+::
+
+    => bdinfo
+    boot_params = 0x0000000000000000
+    DRAM bank   = 0x0000000000000000
+    -> start    = 0x0000000040000000
+    -> size     = 0x0000000100000000
+    flashstart  = 0x0000000000000000
+    flashsize   = 0x0000000004000000
+    flashoffset = 0x00000000000e87f8
+    baudrate    = 115200 bps
+    relocaddr   = 0x000000013fefb000
+    reloc off   = 0x000000013fefb000
+    Build       = 64-bit
+    current eth = virtio-net#32
+    ethaddr     = 52:52:52:52:52:52
+    IP addr     = 10.0.2.15
+    fdt_blob    = 0x000000013edbadb0
+    new_fdt     = 0x000000013edbadb0
+    fdt_size    = 0x0000000000100000
+    lmb_dump_all:
+     memory.cnt  = 0x1
+     memory[0]      [0x40000000-0x13fffffff], 0x100000000 bytes flags: 0
+     reserved.cnt  = 0x2
+     reserved[0]    [0x13ddb3000-0x13fffffff], 0x0224d000 bytes flags: 0
+     reserved[1]    [0x13edb6930-0x13fffffff], 0x012496d0 bytes flags: 0
+    devicetree  = board
+    arch_number = 0x0000000000000000
+    TLB addr    = 0x000000013fff0000
+    irq_sp      = 0x000000013edbada0
+    sp start    = 0x000000013edbada0
+    Early malloc usage: 3a8 / 2000
+    =>
+
+boot_params
+    address of the memory area for boot parameters
+
+DRAM bank
+    index, start address and end address of a memory bank
+
+baudrate
+    baud rate of the serial console
+
+relocaddr
+    address to which U-Boot has relocated itself
+
+reloc off
+    relocation offset, difference between *relocaddr* and the text base
+
+Build
+    bitness of the system
+
+current eth
+    name of the active network device
+
+IP addr
+    network address, value of the environment variable *ipaddr*
+
+fdt_blob
+    address of U-Boot's own device tree, NULL if none
+
+new_fdt
+    location of the relocated device tree
+
+fdt_size
+    space reserved for relocated device space
+
+lmb_dump_all
+    available memory and memory reservations
+
+devicetree
+    source of the device-tree
+
+arch_number
+    unique id for the board
+
+TLB addr
+    address of the translation lookaside buffer
+
+irq_sp
+    address of the IRQ stack pointer
+
+sp start
+    initial stack pointer address
+
+Early malloc usage
+    amount of memory used in the early malloc memory and its maximum size
+    as defined by CONFIG_SYS_MALLOC_F_LEN
+
+Configuration
+-------------
+
+The bdinfo command is available if CONFIG_CMD_BDI=y.
+
+Return code
+-----------
+
+The return code $? is 0 (true).
diff --git a/doc/usage/cmd/bind.rst b/doc/usage/cmd/bind.rst
new file mode 100644
index 00000000000..23457783666
--- /dev/null
+++ b/doc/usage/cmd/bind.rst
@@ -0,0 +1,106 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: bind (command)
+
+bind command
+============
+
+Synopsis
+--------
+
+::
+
+    bind <node path> <driver>
+    bind <class> <index> <driver>
+
+Description
+-----------
+
+The bind command is used to bind a device to a driver. This makes the
+device available in U-Boot.
+
+While binding to a *node path* typically provides a working device
+binding by parent node and driver may lead to a device that is only
+partially initialized.
+
+node path
+    path of the device's device-tree node
+
+class
+    device class name
+
+index
+    index of the parent device in the device class
+
+driver
+    device driver name
+
+Example
+-------
+
+Given a system with a real time clock device with device path */pl031@9010000*
+and using driver rtc-pl031 unbinding and binding of the device is demonstrated
+using the two alternative bind syntaxes.
+
+.. code-block::
+
+    => dm tree
+     Class     Index  Probed  Driver                Name
+    -----------------------------------------------------------
+     root          0  [ + ]   root_driver           root_driver
+    ...
+     rtc           0  [   ]   rtc-pl031             |-- pl031@9010000
+    ...
+    => fdt addr $fdtcontroladdr
+    Working FDT set to 7ed7fdb0
+    => fdt print
+    / {
+            interrupt-parent = <0x00008003>;
+            model = "linux,dummy-virt";
+            #size-cells = <0x00000002>;
+            #address-cells = <0x00000002>;
+            compatible = "linux,dummy-virt";
+    ...
+            pl031@9010000 {
+                    clock-names = "apb_pclk";
+                    clocks = <0x00008000>;
+                    interrupts = <0x00000000 0x00000002 0x00000004>;
+                    reg = <0x00000000 0x09010000 0x00000000 0x00001000>;
+                    compatible = "arm,pl031", "arm,primecell";
+            };
+    ...
+    }
+    => unbind /pl031@9010000
+    => date
+    Cannot find RTC: err=-19
+    => dm tree
+     Class     Index  Probed  Driver                Name
+    -----------------------------------------------------------
+     root          0  [ + ]   root_driver           root_driver
+    ...
+    => bind /pl031@9010000 rtc-pl031
+    => dm tree
+     Class     Index  Probed  Driver                Name
+    -----------------------------------------------------------
+     root          0  [ + ]   root_driver           root_driver
+    ...
+     rtc           0  [   ]   rtc-pl031             |-- pl031@9010000
+    => date
+    Date: 2023-06-22 (Thursday)    Time: 15:14:51
+    => unbind rtc 0 rtc-pl031
+    => bind root 0 rtc-pl031
+    => date
+    Date: 1980-08-19 (Tuesday)    Time: 14:45:30
+
+Obviously the device is not initialized correctly by the last bind command.
+
+Configuration
+-------------
+
+The bind command is only available if CONFIG_CMD_BIND=y.
+
+Return code
+-----------
+
+The return code $? is 0 (true) on success and 1 (false) on failure.
diff --git a/doc/usage/cmd/blkcache.rst b/doc/usage/cmd/blkcache.rst
new file mode 100644
index 00000000000..0329261ba9a
--- /dev/null
+++ b/doc/usage/cmd/blkcache.rst
@@ -0,0 +1,77 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+
+.. index::
+   single: blkcache (command)
+
+blkcache command
+================
+
+Synopsis
+--------
+
+::
+
+    blkcache show
+    blkcache configure <blocks> <entries>
+
+Description
+-----------
+
+The *blkcache* command is used to control the size of the block cache and to
+display statistics.
+
+The block cache buffers data read from block devices. This speeds up the access
+to file-systems.
+
+show
+    show and reset statistics
+
+configure
+    set the maximum number of cache entries and the maximum number of blocks per
+    entry
+
+blocks
+    maximum number of blocks per cache entry. The block size is device specific.
+    The initial value is 8.
+
+entries
+    maximum number of entries in the cche. The initial value is 32.
+
+Example
+-------
+
+.. code-block::
+
+    => blkcache show
+    hits: 296
+    misses: 149
+    entries: 7
+    max blocks/entry: 8
+    max cache entries: 32
+    => blkcache show
+    hits: 0
+    misses: 0
+    entries: 7
+    max blocks/entry: 8
+    max cache entries: 32
+    => blkcache configure 16 64
+    changed to max of 64 entries of 16 blocks each
+    => blkcache show
+    hits: 0
+    misses: 0
+    entries: 0
+    max blocks/entry: 16
+    max cache entries: 64
+    =>
+
+Configuration
+-------------
+
+The blkcache command is only available if CONFIG_CMD_BLOCK_CACHE=y.
+
+Return code
+-----------
+
+If the command succeeds, the return code $? is set 0 (true). In case of an
+error the return code is set to 1 (false).
diff --git a/doc/usage/cmd/bootd.rst b/doc/usage/cmd/bootd.rst
new file mode 100644
index 00000000000..619cfb601a0
--- /dev/null
+++ b/doc/usage/cmd/bootd.rst
@@ -0,0 +1,41 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: bootd (command)
+
+bootd command
+=============
+
+Synopsis
+--------
+
+::
+
+    bootd
+
+Description
+-----------
+
+The bootd command executes the command stored in the environment variable
+*bootcmd*, i.e. it does the same thing as *run bootcmd*.
+
+Example
+-------
+
+::
+
+    => setenv bootcmd 'echo Hello World'
+    => bootd
+    Hello World
+    => setenv bootcmd true
+    => bootd; echo $?
+    0
+    => setenv bootcmd false
+    => bootd; echo $?
+    1
+
+Return value
+------------
+
+The return value $? of the bootd command is the return value of the command in
+the environment variable *bootcmd*.
diff --git a/doc/usage/cmd/bootdev.rst b/doc/usage/cmd/bootdev.rst
new file mode 100644
index 00000000000..98a0f43c580
--- /dev/null
+++ b/doc/usage/cmd/bootdev.rst
@@ -0,0 +1,178 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: bootdev (command)
+
+bootdev command
+===============
+
+Synopsis
+--------
+
+::
+
+    bootdev list [-p]        - list all available bootdevs (-p to probe)
+    bootdev hunt [-l|<spec>] - use hunt drivers to find bootdevs
+    bootdev select <bm>      - select a bootdev by name
+    bootdev info [-p]        - show information about a bootdev
+
+Description
+-----------
+
+The `bootdev` command is used to manage bootdevs. It can list available
+bootdevs, select one and obtain information about it.
+
+See :doc:`/develop/bootstd/index` for more information about bootdevs in general.
+
+
+bootdev list
+~~~~~~~~~~~~
+
+This lists available bootdevs
+
+Scanning with `-p` causes the bootdevs to be probed. This happens automatically
+when they are used.
+
+The list looks something like this:
+
+===  ======  ======  ========  =========================
+Seq  Probed  Status  Uclass    Name
+===  ======  ======  ========  =========================
+  0   [ + ]      OK  mmc       mmc@7e202000.bootdev
+  1   [   ]      OK  mmc       sdhci@7e300000.bootdev
+  2   [   ]      OK  ethernet  smsc95xx_eth.bootdev
+===  ======  ======  ========  =========================
+
+
+The fields are as follows:
+
+Seq:
+    Sequence number in the scan, used to reference the bootflow later
+
+Probed:
+    Shows a plus (+) if the device is probed, empty if not.
+
+Status:
+    Shows the status of the device. Typically this is `OK` meaning that there is
+    no error. If you use -p and an error occurs when probing, then this shows
+    the error number. You can look up Linux error codes to find the meaning of
+    the number.
+
+Uclass:
+    Name of the media device's Uclass. This indicates the type of the parent
+    device (e.g. MMC, Ethernet).
+
+Name:
+    Name of the bootdev. This is generated from the media device appended
+    with `.bootdev`
+
+
+bootdev hunt
+~~~~~~~~~~~~
+
+This hunts for new bootdevs, or shows a list of hunters.
+
+Use `-l` to list the available bootdev hunters.
+
+To run hunters, specify the name of the hunter to run, e.g. "mmc". If no
+name is provided, all hunters are run.
+
+
+bootdev select
+~~~~~~~~~~~~~~
+
+Use this to select a particular bootdev. You can select it by the sequence
+number or name, as shown in `bootdev list`.
+
+Once a bootdev is selected, you can use `bootdev info` to look at it or
+`bootflow scan` to scan it.
+
+If no bootdev name or number is provided, then any existing bootdev is
+unselected.
+
+
+bootdev info
+~~~~~~~~~~~~
+
+This shows information on the current bootdev, with the format looking like
+this:
+
+=========  =======================
+Name       `mmc@7e202000.bootdev`
+Sequence   0
+Status     Probed
+Uclass     mmc
+Bootflows  1 (1 valid)
+=========  =======================
+
+Most of the information is the same as `bootdev list` above. The new fields
+are:
+
+Device
+    Name of the bootdev
+
+Status
+    Shows `Probed` if the device is probed, `OK` if not. If `-p` is used and the
+    device fails to probe, an error code is shown.
+
+Bootflows
+    Indicates the number of bootflows attached to the bootdev. This is 0
+    unless you have used 'bootflow scan' on the bootflow, or on all bootflows.
+
+
+Example
+-------
+
+This example shows listing available bootdev and getting information about
+one of them::
+
+   U-Boot> bootdev list
+   Seq  Probed  Status  Uclass    Name
+   ---  ------  ------  --------  ------------------
+     0   [ + ]      OK  mmc       mmc@7e202000.bootdev
+     1   [   ]      OK  mmc       sdhci@7e300000.bootdev
+     2   [   ]      OK  ethernet  smsc95xx_eth.bootdev
+   ---  ------  ------  --------  ------------------
+   (3 devices)
+   U-Boot> bootdev sel 0
+   U-Boot> bootflow scan
+   U-Boot> bootdev info
+   Name:      mmc@7e202000.bootdev
+   Sequence:  0
+   Status:    Probed
+   Uclass:    mmc
+   Bootflows: 1 (1 valid)
+
+This shows using one of the available hunters, then listing them::
+
+    => bootdev hunt usb
+    Hunting with: usb
+    Bus usb@1: scanning bus usb@1 for devices...
+    3 USB Device(s) found
+    => bootdev hunt -l
+    Prio  Used  Uclass           Hunter
+    ----  ----  ---------------  ---------------
+    6        ethernet         eth_bootdev
+    1        simple_bus       (none)
+    5        ide              ide_bootdev
+    2        mmc              mmc_bootdev
+    4        nvme             nvme_bootdev
+    4        scsi             scsi_bootdev
+    4        spi_flash        sf_bootdev
+    5     *  usb              usb_bootdev
+    4        virtio           virtio_bootdev
+    (total hunters: 9)
+    => usb stor
+    Device 0: Vendor: sandbox Rev: 1.0 Prod: flash
+                Type: Hard Disk
+                Capacity: 4.0 MB = 0.0 GB (8192 x 512)
+    Device 1: Vendor: sandbox Rev: 1.0 Prod: flash
+                Type: Hard Disk
+                Capacity: 0.0 MB = 0.0 GB (1 x 512)
+    =>
+
+
+Return value
+------------
+
+The return value $? is always 0 (true).
diff --git a/doc/usage/cmd/bootefi.rst b/doc/usage/cmd/bootefi.rst
new file mode 100644
index 00000000000..3efe9e9df57
--- /dev/null
+++ b/doc/usage/cmd/bootefi.rst
@@ -0,0 +1,154 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
+
+.. index::
+   single: bootefi (command)
+
+bootefi command
+===============
+
+Synopsis
+--------
+
+::
+
+    bootefi <image_addr>[:<image_size>] [<fdt_addr>]
+    bootefi bootmgr [<fdt_addr>]
+    bootefi hello [<fdt_addr>]
+    bootefi selftest [<fdt_addr>]
+
+Description
+-----------
+
+The *bootefi* command is used to launch a UEFI binary which can be either of
+
+* UEFI application
+* UEFI boot services driver
+* UEFI run-time services driver
+
+An operating system requires a hardware description which can either be
+presented as ACPI table (CONFIG\_GENERATE\_ACPI\_TABLE=y) or as device-tree.
+The load address of the device-tree may be provided as parameter *fdt\_addr*. If
+this address is not specified, the bootefi command will try to fall back in
+sequence to:
+
+* the device-tree specified by environment variable *fdt\_addr*
+* the device-tree specified by environment variable *fdtcontroladdr*
+
+The load address of the binary is specified by parameter *image_address*. A
+command sequence to run a UEFI application might look like
+
+::
+
+    load mmc 0:2 $fdt_addr_r dtb
+    load mmc 0:1 $kernel_addr_r /EFI/grub/grubaa64.efi
+    bootefi $kernel_addr_r $fdt_addr_r
+
+The last UEFI binary loaded defines the image file path in the loaded image
+protocol.
+
+The value of the environment variable *bootargs* is converted from UTF-8 to
+UTF-16 and passed as load options in the loaded image protocol to the UEFI
+binary.
+
+image_addr
+    Address of the UEFI binary.
+
+fdt_addr
+    Address of the device-tree or '-'. If no address is specifiy, the
+    environment variable $fdt_addr is used as first fallback, the address of
+    U-Boot's internal device-tree $fdtcontroladdr as second fallback.
+    When using ACPI no device-tree shall be specified.
+
+image_size
+    Size of the UEFI binary file. This argument is only needed if *image_addr*
+    does not match the address of the last loaded UEFI binary. In this case
+    a memory device path will be used as image file path in the loaded image
+    protocol.
+
+Note
+    UEFI binaries that are contained in FIT images are launched via the
+    *bootm* command.
+
+UEFI boot manager
+'''''''''''''''''
+
+The UEFI boot manager is invoked by the *bootefi bootmgr* sub-command.
+Here boot options are defined by UEFI variables with a name consisting of the
+letters *Boot* followed by a four digit hexadecimal number, e.g. *Boot0001* or
+*BootA03E*. The boot variable defines a label, the device path of the binary to
+execute as well as the load options passed in the loaded image protocol.
+
+If the UEFI variable *BootNext* is defined, it specifies the number of the boot
+option to execute next. If no binary can be loaded via *BootNext* the variable
+*BootOrder* specifies in which sequence boot options shalled be tried.
+
+The values of these variables can be managed using the U-Boot command
+*efidebug*.
+
+UEFI hello world application
+''''''''''''''''''''''''''''
+
+U-Boot can be compiled with a hello world application that can be launched using
+the *bootefi hello* sub-command. A session might look like
+
+::
+
+    => setenv bootargs 'Greetings to the world'
+    => bootefi hello
+    Booting /MemoryMapped(0x0,0x10001000,0x1000)
+    Hello, world!
+    Running on UEFI 2.8
+    Have SMBIOS table
+    Have device tree
+    Load options: Greetings to the world
+
+UEFI selftest
+'''''''''''''
+
+U-Boot can be compiled with UEFI unit tests. These unit tests are invoked using
+the *bootefi selftest* sub-command.
+
+Which unit test is executed is controlled by the environment variable
+*efi\_selftest*. If this variable is not set, all unit tests that are not marked
+as 'on request' are executed.
+
+To show a list of the available unit tests the value *list* can be used
+
+::
+
+    => setenv efi_selftest list
+    => bootefi selftest
+
+    Available tests:
+    'block image transfer' - on request
+    'block device'
+    'configuration tables'
+    ...
+
+A single test is selected for execution by setting the *efi\_selftest*
+environment variable to match one of the listed identifiers
+
+::
+
+    => setenv efi_selftest 'block image transfer'
+    => bootefi selftest
+
+Some of the tests execute the ExitBootServices() UEFI boot service and will not
+return to the command line but require a board reset.
+
+Configuration
+-------------
+
+To use the *bootefi* command you must specify CONFIG\_CMD\_BOOTEFI=y.
+The *bootefi bootmgr* sub-command requries CMD\_BOOTEFI\_BOOTMGR=y.
+The *bootefi hello* sub-command requries CMD\_BOOTEFI\_HELLO=y.
+The *bootefi selftest* sub-command depends on CMD\_BOOTEFI\_SELFTEST=y.
+
+See also
+--------
+
+* *bootm* for launching UEFI binaries packed in FIT images
+* :doc:`booti<booti>`, *bootm*, *bootz* for launching a Linux kernel without
+  using the UEFI sub-system
+* *efidebug* for setting UEFI boot variables and boot options
diff --git a/doc/usage/cmd/bootelf.rst b/doc/usage/cmd/bootelf.rst
new file mode 100644
index 00000000000..705524c594a
--- /dev/null
+++ b/doc/usage/cmd/bootelf.rst
@@ -0,0 +1,61 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+.. Copyright 2024, Maxim Moskalets <maximmosk4@gmail.com>
+
+.. index::
+   single: bootelf (command)
+
+bootelf command
+===============
+
+Synopsis
+--------
+
+::
+
+    bootelf [-p|-s] [-d <fdt_addr>] [<image_addr> [<arg>]...]
+
+Description
+-----------
+
+The *bootelf* command is used to launch a ELF binary at *image_addr*. If
+*image_addr* is not specified, the bootelf command will try to find image in
+*image_load_addr* variable (*CONFIG\_SYS\_LOAD\_ADDR* by default).
+
+Args after *image_addr* will be passed to application in common *argc*, *argv*
+format.
+
+A command sequence to run a ELF image using FDT might look like
+
+::
+
+    load mmc 0:1 ${loadaddr} /kernel.elf
+    load mmc 0:1 ${fdt_addr_r} /soc-board.dtb
+    bootelf -d ${fdt_addr_r} ${loadaddr} ${loadaddr}
+
+image_addr
+    Address of the ELF binary.
+
+fdt_addr
+    Address of the device-tree. This argument in only needed if bootable
+    application uses FDT that requires additional setup (like /memory node).
+
+arg
+    Any text arguments for bootable application. This is usually the address
+    of the device-tree.
+
+Flags:
+
+-p
+    Load ELF image via program headers.
+
+-s
+    Load ELF image via section headers.
+
+-d
+    Setup FDT by address.
+
+Configuration
+-------------
+
+The bootelf command is only available if CONFIG_CMD_ELF=y. FDT setup by flag -d
+need CONFIG_CMD_ELF_FDT_SETUP=y.
diff --git a/doc/usage/cmd/bootflow.rst b/doc/usage/cmd/bootflow.rst
new file mode 100644
index 00000000000..5d41fe37a7a
--- /dev/null
+++ b/doc/usage/cmd/bootflow.rst
@@ -0,0 +1,748 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: bootflow (command)
+
+bootflow command
+================
+
+Synopsis
+--------
+
+::
+
+    bootflow scan [-abelGH] [bootdev]
+    bootflow list [-e]
+    bootflow select [<num|name>]
+    bootflow info [-ds]
+    bootflow read
+    bootflow boot
+    bootflow cmdline [set|get|clear|delete|auto] <param> [<value>]
+    bootfloe menu [-t]
+
+Description
+-----------
+
+The `bootflow` command is used to manage bootflows. It can scan bootdevs to
+locate bootflows, list them and boot them.
+
+See :doc:`/develop/bootstd/index` for more information.
+
+Note that `CONFIG_BOOTSTD_FULL` (which enables `CONFIG_CMD_BOOTFLOW_FULL) must
+be enabled to obtain full functionality with this command. Otherwise, it only
+supports `bootflow scan` which scans and boots the first available bootflow.
+
+bootflow scan
+~~~~~~~~~~~~~
+
+Scans for available bootflows, optionally booting the first valid one it finds.
+This operates in two modes:
+
+- If no bootdev is selected (see `bootdev select`) it scans bootflows one
+  by one, extracting all the bootdevs from each
+- If a bootdev is selected, it just scans that one bootflow
+
+Flags are:
+
+-a
+    Collect all bootflows, even those that cannot be loaded. Normally if a file
+    is not where it is expected, then the bootflow fails and so is dropped
+    during the scan. With this option you can see why each bootflow would be
+    dropped.
+
+-b
+    Boot each valid bootflow as it is scanned. Typically only the first bootflow
+    matters, since by then the system boots in the OS and U-Boot is no-longer
+    running. `bootflow scan -b` is a quick way to boot the first available OS.
+    A valid bootflow is one that made it all the way to the `loaded` state.
+    Note that if `-m` is provided as well, booting is delayed until the user
+    selects a bootflow.
+
+-e
+    Used with -l to also show errors for each bootflow. The shows detailed error
+    information for each bootflow that failed to make it to the `loaded` state.
+
+-l
+    List bootflows while scanning. This is helpful when you want to see what
+    is happening during scanning. Use it with the `-b` flag to see which
+    bootdev and bootflows are being tried.
+
+-G
+    Skip global bootmeths when scanning. By default these are tried first, but
+    this flag disables them.
+
+-H
+    Don't use bootdev hunters. By default these are used before each boot
+    priority or label is tried, to see if more bootdevs can be discovered, but
+    this flag disables that process.
+
+-m
+    Show a menu of available bootflows for the user to select. When used with
+    -b it then boots the one that was selected, if any.
+
+The optional argument specifies a particular bootdev to scan. This can either be
+the name of a bootdev or its sequence number (both shown with `bootdev list`).
+Alternatively a convenience label can be used, like `mmc0`, which is the type of
+device and an optional sequence number. Specifically, the label is the uclass of
+the bootdev's parent followed by the sequence number of that parent. Sequence
+numbers are typically set by aliases, so if you have 'mmc0' in your devicetree
+alias section, then `mmc0` refers to the bootdev attached to that device.
+
+
+bootflow list
+~~~~~~~~~~~~~
+
+Lists the previously scanned bootflows. You must use `bootflow scan` before this
+to see anything.
+
+If you scanned with -a and have bootflows with errors, -e can be used to show
+those errors.
+
+The list looks something like this:
+
+===  ======  ======  ========  ====  ===============================   ================
+Seq  Method  State   Uclass    Part  Name                              Filename
+===  ======  ======  ========  ====  ===============================   ================
+  0  distro  ready   mmc          2  mmc\@7e202000.bootdev.part_2      /boot/extlinux/extlinux.conf
+  1  pxe     ready   ethernet     0  smsc95xx_eth.bootdev.0            rpi.pxe/extlinux/extlinux.conf
+===  ======  ======  ========  ====  ===============================   ================
+
+The fields are as follows:
+
+Seq:
+    Sequence number in the scan, used to reference the bootflow later
+
+Method:
+    The boot method (bootmeth) used to find the bootflow. Several methods are
+    included in U-Boot.
+
+State:
+    Current state of the bootflow, indicating how far the bootdev got in
+    obtaining a valid one. See :ref:`BootflowStates` for a list of states.
+
+Uclass:
+    Name of the media device's Uclass. This indicates the type of the parent
+    device (e.g. MMC, Ethernet).
+
+Part:
+    Partition number being accesseed, numbered from 1. Normally a device will
+    have a partition table with a small number of partitions. For devices
+    without partition tables (e.g. network) this field is 0.
+
+Name:
+    Name of the bootflow. This is generated from the bootdev appended with
+    the partition information
+
+Filename:
+    Name of the bootflow file. This indicates where the file is on the
+    filesystem or network device.
+
+
+bootflow select
+~~~~~~~~~~~~~~~
+
+Use this to select a particular bootflow. You can select it by the sequence
+number or name, as shown in `bootflow list`.
+
+Once a bootflow is selected, you can use `bootflow info` and `bootflow boot`.
+
+If no bootflow name or number is provided, then any existing bootflow is
+unselected.
+
+
+bootflow info
+~~~~~~~~~~~~~
+
+This shows information on the current bootflow, with the format looking like
+this:
+
+=========  ===============================
+Name       mmc\@7e202000.bootdev.part_2
+Device     mmc\@7e202000.bootdev
+Block dev  mmc\@7e202000.blk
+Type       distro
+Method:    extlinux
+State      ready
+Partition  2
+Subdir     (none)
+Filename   /extlinux/extlinux.conf
+Buffer     3db7ad48
+Size       232 (562 bytes)
+FDT:       <NULL>
+Error      0
+=========  ===============================
+
+Most of the information is the same as `bootflow list` above. The new fields
+are:
+
+Device
+    Name of the bootdev
+
+Block dev
+    Name of the block device, if any. Network devices don't have a block device.
+
+Subdir
+    Subdirectory used for retrieving files. For network bootdevs this is the
+    directory of the 'bootfile' parameter passed from DHCP. All file retrievals
+    when booting are relative to this.
+
+Buffer
+    Buffer containing the bootflow file. You can use the :doc:`md` to look at
+    it, or dump it with `bootflow info -d`.
+
+Size
+    Size of the bootflow file
+
+FDT:
+    Filename of the device tree, if supported. The EFI bootmeth uses this to
+    remember the filename to load. If `<NULL>` then there is none.
+
+Error
+    Error number returned from scanning for the bootflow. This is 0 if the
+    bootflow is in the 'loaded' state, or a negative error value on error. You
+    can look up Linux error codes to find the meaning of the number.
+
+Use the `-d` flag to dump out the contents of the bootfile file.
+
+The `-s` flag shows any x86 setup block, instead of the above.
+
+
+bootflow read
+~~~~~~~~~~~~~
+
+This reads any files related to the bootflow. Some bootflows with large files
+avoid doing this when the bootflow is scanned, since it uses a lot of memory
+and takes extra time. The files are then automatically read when `bootflow boot`
+is used.
+
+This command reads these files immediately. Typically this fills in the bootflow
+`buf` property, which can be used to examine the bootflow.
+
+Note that reading the files does not result in any extra parsing, nor loading of
+images in the files. This is purely used to read in the data ready for
+booting, or examination.
+
+
+bootflow boot
+~~~~~~~~~~~~~
+
+This boots the current bootflow, reading any required files first.
+
+
+bootflow cmdline
+~~~~~~~~~~~~~~~~
+
+Some bootmeths can obtain the OS command line since it is stored with the OS.
+In that case, you can use `bootflow cmdline` to adjust this. The command line
+is assumed to be in the format used by Linux, i.e. a space-separated set of
+parameters with optional values, e.g. "noinitrd console=/dev/tty0".
+
+To change or add a parameter, use::
+
+    bootflow cmdline set <param> <value>
+
+To clear a parameter value to empty you can use "" for the value, or use::
+
+    bootflow cmdline clear <param>
+
+To delete a parameter entirely, use::
+
+    bootflow cmdline delete <param>
+
+Automatic parameters are available in a very few cases. You can use these to
+add parmeters where the value is known by U-Boot. For example::
+
+    bootflow cmdline auto earlycon
+    bootflow cmdline auto console
+
+can be used to set the early console (or console) to a suitable value so that
+output appears on the serial port. This is only supported by the 16550 serial
+driver so far.
+
+bootflow menu
+~~~~~~~~~~~~~
+
+This shows a menu with available bootflows. The user can select a particular
+bootflow, which then becomes the current one.
+
+The `-t` flag requests a text menu. Otherwise, if a display is available, a
+graphical menu is shown.
+
+
+Example
+-------
+
+Here is an example of scanning for bootflows, then listing them::
+
+    U-Boot> bootflow scan -l
+    Scanning for bootflows in all bootdevs
+    Seq  Type         State   Uclass    Part  Name                      Filename
+    ---  -----------  ------  --------  ----  ------------------------  ----------------
+    Scanning bootdev 'mmc@7e202000.bootdev':
+      0  distro       ready   mmc          2  mmc@7e202000.bootdev.p    /extlinux/extlinux.conf
+    Scanning bootdev 'sdhci@7e300000.bootdev':
+    Card did not respond to voltage select! : -110
+    Scanning bootdev 'smsc95xx_eth.bootdev':
+    Waiting for Ethernet connection... done.
+    BOOTP broadcast 1
+    DHCP client bound to address 192.168.4.30 (4 ms)
+    Using smsc95xx_eth device
+    TFTP from server 192.168.4.1; our IP address is 192.168.4.30
+    Filename 'rpi.pxe/'.
+    Load address: 0x200000
+    Loading: *
+    TFTP error: 'Is a directory' (0)
+    Starting again
+
+    missing environment variable: pxeuuid
+    Retrieving file: rpi.pxe/pxelinux.cfg/01-b8-27-eb-a6-61-e1
+    Waiting for Ethernet connection... done.
+    Using smsc95xx_eth device
+    TFTP from server 192.168.4.1; our IP address is 192.168.4.30
+    Filename 'rpi.pxe/pxelinux.cfg/01-b8-27-eb-a6-61-e1'.
+    Load address: 0x2500000
+    Loading: ##################################################  566 Bytes
+    	 45.9 KiB/s
+    done
+    Bytes transferred = 566 (236 hex)
+      1  distro       ready   ethernet     0  smsc95xx_eth.bootdev.0 rpi.pxe/extlinux/extlinux.conf
+    No more bootdevs
+    ---  -----------  ------  --------  ----  ------------------------  ----------------
+    (2 bootflows, 2 valid)
+    U-Boot> bootflow l
+    Showing all bootflows
+    Seq  Type         State   Uclass    Part  Name                      Filename
+    ---  -----------  ------  --------  ----  ------------------------  ----------------
+      0  distro       ready   mmc          2  mmc@7e202000.bootdev.p    /extlinux/extlinux.conf
+      1  pxe          ready   ethernet     0  smsc95xx_eth.bootdev.0     rpi.pxe/extlinux/extlinux.conf
+    ---  -----------  ------  --------  ----  ------------------------  ----------------
+    (2 bootflows, 2 valid)
+
+
+The second one is then selected by name (we could instead use `bootflow sel 0`),
+displayed and booted::
+
+    U-Boot> bootflow info
+    No bootflow selected
+    U-Boot> bootflow sel mmc@7e202000.bootdev.part_2
+    U-Boot> bootflow info
+    Name:      mmc@7e202000.bootdev.part_2
+    Device:    mmc@7e202000.bootdev
+    Block dev: mmc@7e202000.blk
+    Method:    distro
+    State:     ready
+    Partition: 2
+    Subdir:    (none)
+    Filename:  extlinux/extlinux.conf
+    Buffer:    3db7ae88
+    Size:      232 (562 bytes)
+    OS:        Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+    Cmdline:   (none)
+    Logo:      (none)
+    FDT:       <NULL>
+    Error:     0
+    U-Boot> bootflow boot
+    ** Booting bootflow 'smsc95xx_eth.bootdev.0'
+    Ignoring unknown command: ui
+    Ignoring malformed menu command:  autoboot
+    Ignoring malformed menu command:  hidden
+    Ignoring unknown command: totaltimeout
+    1:	Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+    Retrieving file: rpi.pxe/initramfs-5.3.7-301.fc31.armv7hl.img
+    get 2700000 rpi.pxe/initramfs-5.3.7-301.fc31.armv7hl.img
+    Waiting for Ethernet connection... done.
+    Using smsc95xx_eth device
+    TFTP from server 192.168.4.1; our IP address is 192.168.4.30
+    Filename 'rpi.pxe/initramfs-5.3.7-301.fc31.armv7hl.img'.
+    Load address: 0x2700000
+    Loading: ###################################T ###############  57.7 MiB
+    	 1.9 MiB/s
+    done
+    Bytes transferred = 60498594 (39b22a2 hex)
+    Retrieving file: rpi.pxe//vmlinuz-5.3.7-301.fc31.armv7hl
+    get 80000 rpi.pxe//vmlinuz-5.3.7-301.fc31.armv7hl
+    Waiting for Ethernet connection... done.
+    Using smsc95xx_eth device
+    TFTP from server 192.168.4.1; our IP address is 192.168.4.30
+    Filename 'rpi.pxe//vmlinuz-5.3.7-301.fc31.armv7hl'.
+    Load address: 0x80000
+    Loading: ##################################################  7.2 MiB
+    	 2.3 MiB/s
+    done
+    Bytes transferred = 7508480 (729200 hex)
+    append: ro root=UUID=9732b35b-4cd5-458b-9b91-80f7047e0b8a rhgb quiet LANG=en_US.UTF-8 cma=192MB cma=256MB
+    Retrieving file: rpi.pxe//dtb-5.3.7-301.fc31.armv7hl/bcm2837-rpi-3-b.dtb
+    get 2600000 rpi.pxe//dtb-5.3.7-301.fc31.armv7hl/bcm2837-rpi-3-b.dtb
+    Waiting for Ethernet connection... done.
+    Using smsc95xx_eth device
+    TFTP from server 192.168.4.1; our IP address is 192.168.4.30
+    Filename 'rpi.pxe//dtb-5.3.7-301.fc31.armv7hl/bcm2837-rpi-3-b.dtb'.
+    Load address: 0x2600000
+    Loading: ##################################################  13.8 KiB
+    	 764.6 KiB/s
+    done
+    Bytes transferred = 14102 (3716 hex)
+    Kernel image @ 0x080000 [ 0x000000 - 0x729200 ]
+    ## Flattened Device Tree blob at 02600000
+       Booting using the fdt blob at 0x2600000
+       Using Device Tree in place at 02600000, end 02606715
+
+    Starting kernel ...
+
+    [  OK  ] Started Show Plymouth Boot Screen.
+    [  OK  ] Started Forward Password R…s to Plymouth Directory Watch.
+    [  OK  ] Reached target Local Encrypted Volumes.
+    [  OK  ] Reached target Paths.
+    ....
+
+
+Here we scan for bootflows and boot the first one found::
+
+    U-Boot> bootflow scan -bl
+    Scanning for bootflows in all bootdevs
+    Seq  Method       State   Uclass    Part  Name                    Filename
+    ---  -----------  ------  --------  ----  ----------------------  ----------------
+    Scanning bootdev 'mmc@7e202000.bootdev':
+      0  distro       ready   mmc          2  mmc@7e202000.bootdev.p  /extlinux/extlinux.conf
+    ** Booting bootflow 'mmc@7e202000.bootdev.part_2'
+    Ignoring unknown command: ui
+    Ignoring malformed menu command:  autoboot
+    Ignoring malformed menu command:  hidden
+    Ignoring unknown command: totaltimeout
+    1:	Fedora-KDE-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+    Retrieving file: /initramfs-5.3.7-301.fc31.armv7hl.img
+    getfile 2700000 /initramfs-5.3.7-301.fc31.armv7hl.img
+    Retrieving file: /vmlinuz-5.3.7-301.fc31.armv7hl
+    getfile 80000 /vmlinuz-5.3.7-301.fc31.armv7hl
+    append: ro root=UUID=b8781f09-e2dd-4cb8-979b-7df5eeaaabea rhgb LANG=en_US.UTF-8 cma=192MB console=tty0 console=ttyS1,115200
+    Retrieving file: /dtb-5.3.7-301.fc31.armv7hl/bcm2837-rpi-3-b.dtb
+    getfile 2600000 /dtb-5.3.7-301.fc31.armv7hl/bcm2837-rpi-3-b.dtb
+    Kernel image @ 0x080000 [ 0x000000 - 0x729200 ]
+    ## Flattened Device Tree blob at 02600000
+       Booting using the fdt blob at 0x2600000
+       Using Device Tree in place at 02600000, end 02606715
+
+    Starting kernel ...
+
+    [    0.000000] Booting Linux on physical CPU 0x0
+
+
+Here is am example using the -e flag to see all errors::
+
+    U-Boot> bootflow scan -a
+    Card did not respond to voltage select! : -110
+    Waiting for Ethernet connection... done.
+    BOOTP broadcast 1
+    DHCP client bound to address 192.168.4.30 (4 ms)
+    Using smsc95xx_eth device
+    TFTP from server 192.168.4.1; our IP address is 192.168.4.30
+    Filename 'rpi.pxe/'.
+    Load address: 0x200000
+    Loading: *
+    TFTP error: 'Is a directory' (0)
+    Starting again
+
+    missing environment variable: pxeuuid
+    Retrieving file: rpi.pxe/pxelinux.cfg/01-b8-27-eb-a6-61-e1
+    Waiting for Ethernet connection... done.
+    Using smsc95xx_eth device
+    TFTP from server 192.168.4.1; our IP address is 192.168.4.30
+    Filename 'rpi.pxe/pxelinux.cfg/01-b8-27-eb-a6-61-e1'.
+    Load address: 0x2500000
+    Loading: ##################################################  566 Bytes
+    	 49.8 KiB/s
+    done
+    Bytes transferred = 566 (236 hex)
+    U-Boot> bootflow l -e
+    Showing all bootflows
+    Seq  Type         State   Uclass    Part  Name                   Filename
+    ---  -----------  ------  --------  ----  ---------------------  ----------------
+      0  distro       fs      mmc          1  mmc@7e202000.bootdev.p /extlinux/extlinux.conf
+         ** File not found, err=-2
+      1  distro       ready   mmc          2  mmc@7e202000.bootdev.p /extlinux/extlinux.conf
+      2  distro       fs      mmc          3  mmc@7e202000.bootdev.p /extlinux/extlinux.conf
+         ** File not found, err=-1
+      3  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      4  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      5  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      6  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      7  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      8  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      9  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      a  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      b  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      c  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      d  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      e  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+      f  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+     10  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+     11  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+     12  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+     13  distro       media   mmc          0  mmc@7e202000.bootdev.p <NULL>
+         ** No partition found, err=-2
+     14  distro       ready   ethernet     0  smsc95xx_eth.bootdev.0 rpi.pxe/extlinux/extlinux.conf
+    ---  -----------  ------  --------  ----  ---------------------  ----------------
+    (21 bootflows, 2 valid)
+    U-Boot>
+
+Here is an example of booting ChromeOS, adjusting the console beforehand. Note that
+the cmdline is word-wrapped here and some parts of the command line are elided::
+
+    => bootfl list
+    Showing all bootflows
+    Seq  Method       State   Uclass    Part  Name                      Filename
+    ---  -----------  ------  --------  ----  ------------------------  ----------------
+    0  cros         ready   nvme         0  5.10.153-20434-g98da1eb2c <NULL>
+    1  efi          ready   nvme         c  nvme#0.blk#1.bootdev.part efi/boot/bootia32.efi
+    2  efi          ready   usb_mass_    2  usb_mass_storage.lun0.boo efi/boot/bootia32.efi
+    ---  -----------  ------  --------  ----  ------------------------  ----------------
+    (3 bootflows, 3 valid)
+    => bootfl sel 0
+    => bootfl inf
+    Name:      5.10.153-20434-g98da1eb2cf9d (chrome-bot@chromeos-release-builder-us-central1-b-x32-12-xijx) #1 SMP PREEMPT Tue Jan 24 19:38:23 PST 2023
+    Device:    nvme#0.blk#1.bootdev
+    Block dev: nvme#0.blk#1
+    Method:    cros
+    State:     ready
+    Partition: 0
+    Subdir:    (none)
+    Filename:  <NULL>
+    Buffer:    737a1400
+    Size:      c47000 (12873728 bytes)
+    OS:        ChromeOS
+    Cmdline:   console= loglevel=7 init=/sbin/init cros_secure drm.trace=0x106
+        root=/dev/dm-0 rootwait ro dm_verity.error_behavior=3
+        dm_verity.max_bios=-1 dm_verity.dev_wait=1
+        dm="1 vroot none ro 1,0 6348800
+          verity payload=PARTUUID=799c935b-ae62-d143-8493-816fa936eef7/PARTNROFF=1
+          hashtree=PARTUUID=799c935b-ae62-d143-8493-816fa936eef7/PARTNROFF=1
+          hashstart=6348800 alg=sha256
+          root_hexdigest=78cc462cd45aecbcd49ca476587b4dee59aa1b00ba5ece58e2c29ec9acd914ab
+          salt=8dec4dc80a75dd834a9b3175c674405e15b16a253fdfe05c79394ae5fd76f66a"
+        noinitrd vt.global_cursor_default=0
+        kern_guid=799c935b-ae62-d143-8493-816fa936eef7 add_efi_memmap
+        noresume i915.modeset=1 ramoops.ecc=1 tpm_tis.force=0
+        intel_pmc_core.warn_on_s0ix_failures=1 i915.enable_guc=3 i915.enable_dc=4
+        xdomain=0 swiotlb=65536 intel_iommu=on i915.enable_psr=1
+        usb-storage.quirks=13fe:6500:u
+    X86 setup: 742e3400
+    Logo:      (none)
+    FDT:       <NULL>
+    Error:     0
+    => bootflow cmdline auto earlycon
+    => bootflow cmd auto console
+    => print bootargs
+    bootargs=console=ttyS0,115200n8 loglevel=7 ...
+        usb-storage.quirks=13fe:6500:u earlycon=uart8250,mmio32,0xfe03e000,115200n8
+    => bootflow cmd del console
+    => print bootargs
+    bootargs=loglevel=7 ... earlycon=uart8250,mmio32,0xfe03e000,115200n8
+    => bootfl boot
+    ** Booting bootflow '5.10.153-20434-g98da1eb2cf9d (chrome-bot@chromeos-release-builder-us-central1-b-x32-12-xijx) #1 SMP PREEMPT Tue Jan 24 19:38:23 PST 2023' with cros
+    Kernel command line: "loglevel=7 ... earlycon=uart8250,mmio32,0xfe03e000,115200n8"
+
+    Starting kernel ...
+
+    [    0.000000] Linux version 5.10.153-20434-g98da1eb2cf9d (chrome-bot@chromeos-release-builder-us-central1-b-x32-12-xijx) (Chromium OS 15.0_pre465103_p20220825-r4 clang version 15.0.0 (/var/tmp/portage/sys-devel/llvm-15.0_pre465103_p20220825-r4/work/llvm-15.0_pre465103_p20220825/clang db1978b67431ca3462ad8935bf662c15750b8252), LLD 15.0.0) #1 SMP PREEMPT Tue Jan 24 19:38:23 PST 2023
+    [    0.000000] Command line: loglevel=7 ... usb-storage.quirks=13fe:6500:u earlycon=uart8250,mmio32,0xfe03e000,115200n8
+    [    0.000000] x86/split lock detection: warning about user-space split_locks
+
+This shows looking at x86 setup information::
+
+    => bootfl sel 0
+    => bootfl i -s
+    Setup located at 77b56010:
+
+    ACPI RSDP addr      : 0
+    E820: 2 entries
+            Addr        Size  Type
+               0        1000  RAM
+        fffff000        1000  Reserved
+    Setup sectors       : 1e
+    Root flags          : 1
+    Sys size            : 63420
+    RAM size            : 0
+    Video mode          : ffff
+    Root dev            : 0
+    Boot flag           : 0
+    Jump                : 66eb
+    Header              : 53726448
+                          Kernel V2
+    Version             : 20d
+    Real mode switch    : 0
+    Start sys seg       : 1000
+    Kernel version      : 38cc
+       @00003acc:
+    Type of loader      : ff
+                          unknown
+    Load flags          : 1
+                        : loaded-high
+    Setup move size     : 8000
+    Code32 start        : 100000
+    Ramdisk image       : 0
+    Ramdisk size        : 0
+    Bootsect kludge     : 0
+    Heap end ptr        : 5160
+    Ext loader ver      : 0
+    Ext loader type     : 0
+    Command line ptr    : 735000
+    Initrd addr max     : 7fffffff
+    Kernel alignment    : 200000
+    Relocatable kernel  : 1
+    Min alignment       : 15
+                        : 200000
+    Xload flags         : 3
+                        : 64-bit-entry can-load-above-4gb
+    Cmdline size        : 7ff
+    Hardware subarch    : 0
+    HW subarch data     : 0
+    Payload offset      : 26e
+    Payload length      : 612045
+    Setup data          : 0
+    Pref address        : 1000000
+    Init size           : 1383000
+    Handover offset     : 0
+
+This shows reading a bootflow to examine the kernel::
+
+    => bootfl i 0
+    Name:
+    Device:    emmc@1c,0.bootdev
+    Block dev: emmc@1c,0.blk
+    Method:    cros
+    State:     ready
+    Partition: 2
+    Subdir:    (none)
+    Filename:  <NULL>
+    Buffer:    0
+    Size:      63ee00 (6548992 bytes)
+    OS:        ChromeOS
+    Cmdline:   console= loglevel=7 init=/sbin/init cros_secure oops=panic panic=-1 root=PARTUUID=35c775e7-3735-d745-93e5-d9e0238f7ed0/PARTNROFF=1 rootwait rw dm_verity.error_behavior=3 dm_verity.max_bios=-1 dm_verity.dev_wait=0 dm="1 vroot none rw 1,0 3788800 verity payload=ROOT_DEV hashtree=HASH_DEV hashstart=3788800 alg=sha1 root_hexdigest=55052b629d3ac889f25a9583ea12cdcd3ea15ff8 salt=a2d4d9e574069f4fed5e3961b99054b7a4905414b60a25d89974a7334021165c" noinitrd vt.global_cursor_default=0 kern_guid=35c775e7-3735-d745-93e5-d9e0238f7ed0 add_efi_memmap boot=local noresume noswap i915.modeset=1 tpm_tis.force=1 tpm_tis.interrupts=0 nmi_watchdog=panic,lapic disablevmx=off
+    X86 setup: 77b56010
+    Logo:      (none)
+    FDT:       <NULL>
+    Error:     0
+
+Note that `Buffer` is 0 so it has not be read yet. Using `bootflow read`::
+
+    => bootfl read
+    => bootfl info
+    Name:
+    Device:    emmc@1c,0.bootdev
+    Block dev: emmc@1c,0.blk
+    Method:    cros
+    State:     ready
+    Partition: 2
+    Subdir:    (none)
+    Filename:  <NULL>
+    Buffer:    77b7e400
+    Size:      63ee00 (6548992 bytes)
+    OS:        ChromeOS
+    Cmdline:   console= loglevel=7 init=/sbin/init cros_secure oops=panic panic=-1 root=PARTUUID=35c775e7-3735-d745-93e5-d9e0238f7ed0/PARTNROFF=1 rootwait rw dm_verity.error_behavior=3 dm_verity.max_bios=-1 dm_verity.dev_wait=0 dm="1 vroot none rw 1,0 3788800 verity payload=ROOT_DEV hashtree=HASH_DEV hashstart=3788800 alg=sha1 root_hexdigest=55052b629d3ac889f25a9583ea12cdcd3ea15ff8 salt=a2d4d9e574069f4fed5e3961b99054b7a4905414b60a25d89974a7334021165c" noinitrd vt.global_cursor_default=0 kern_guid=35c775e7-3735-d745-93e5-d9e0238f7ed0 add_efi_memmap boot=local noresume noswap i915.modeset=1 tpm_tis.force=1 tpm_tis.interrupts=0 nmi_watchdog=panic,lapic disablevmx=off
+    X86 setup: 781b4400
+    Logo:      (none)
+    FDT:       <NULL>
+    Error:     0
+
+Now the buffer can be accessed::
+
+    => md 77b7e400
+    77b7e400: 1186f6fc 40000002 b8fa0c75 00000018  .......@u.......
+    77b7e410: c08ed88e a68dd08e 000001e8 000000e8  ................
+    77b7e420: ed815d00 00000021 62c280b8 89e80100  .]..!......b....
+    77b7e430: 22f7e8c4 c0850061 22ec850f eb890061  ..."a......"a...
+    77b7e440: 0230868b 01480000 21d0f7c3 00fb81c3  ..0...H....!....
+    77b7e450: 7d010000 0000bb05 c3810100 00d4f000  ...}............
+    77b7e460: 8130858d 85890061 00618132 3095010f  ..0.a...2.a....0
+    77b7e470: 0f006181 c883e020 e0220f20 e000bb8d  .a.. ... .".....
+    77b7e480: c0310062 001800b9 8dabf300 62e000bb  b.1............b
+    77b7e490: 07878d00 89000010 00bb8d07 8d0062f0  .............b..
+    77b7e4a0: 00100787 0004b900 07890000 00100005  ................
+    77b7e4b0: 08c78300 8df37549 630000bb 0183b800  ....Iu.....c....
+    77b7e4c0: 00b90000 89000008 00000507 c7830020  ............ ...
+    77b7e4d0: f3754908 e000838d 220f0062 0080b9d8  .Iu.....b.."....
+    77b7e4e0: 320fc000 08e8ba0f c031300f b8d0000f  ...2.....01.....
+    77b7e4f0: 00000020 6ad8000f 00858d10 50000002   ......j.......P
+
+This shows using a text menu to boot an OS::
+
+    => bootflow scan
+    => bootfl list
+    => bootfl menu -t
+    U-Boot    :    Boot Menu
+
+    UP and DOWN to choose, ENTER to select
+
+      >    0  mmc1        mmc1.bootdev.whole
+           1  mmc1        Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+           2  mmc1        mmc1.bootdev.part_1
+           3  mmc4        mmc4.bootdev.whole
+           4  mmc4        Armbian
+           5  mmc4        mmc4.bootdev.part_1
+           6  mmc5        mmc5.bootdev.whole
+           7  mmc5        ChromeOS
+           8  mmc5        ChromeOS
+    U-Boot    :    Boot Menu
+
+    UP and DOWN to choose, ENTER to select
+
+           0  mmc1        mmc1.bootdev.whole
+      >    1  mmc1        Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+           2  mmc1        mmc1.bootdev.part_1
+           3  mmc4        mmc4.bootdev.whole
+           4  mmc4        Armbian
+           5  mmc4        mmc4.bootdev.part_1
+           6  mmc5        mmc5.bootdev.whole
+           7  mmc5        ChromeOS
+           8  mmc5        ChromeOS
+    U-Boot    :    Boot Menu
+
+    Selected: Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+    => bootfl boot
+    ** Booting bootflow 'mmc1.bootdev.part_1' with extlinux
+    Ignoring unknown command: ui
+    Ignoring malformed menu command:  autoboot
+    Ignoring malformed menu command:  hidden
+    Ignoring unknown command: totaltimeout
+    Fedora-Workstation-armhfp-31-1.9 Boot Options.
+    1:	Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+    Enter choice: 1
+    1:	Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+    Retrieving file: /vmlinuz-5.3.7-301.fc31.armv7hl
+    Retrieving file: /initramfs-5.3.7-301.fc31.armv7hl.img
+    append: ro root=UUID=9732b35b-4cd5-458b-9b91-80f7047e0b8a rhgb quiet LANG=en_US.UTF-8 cma=192MB cma=256MB
+    Retrieving file: /dtb-5.3.7-301.fc31.armv7hl/sandbox.dtb
+    ...
+
+
+Return value
+------------
+
+On success `bootflow boot` normally boots into the Operating System and does not
+return to U-Boot. If something about the U-Boot processing fails, then the
+return value $? is 1. If the boot succeeds but for some reason the Operating
+System returns, then $? is 0, indicating success.
+
+For `bootflow menu` the return value is $? is 0 (true) if an option was choses,
+else 1.
+
+For other subcommands, the return value $? is always 0 (true).
+
+
+.. BootflowStates_:
diff --git a/doc/usage/cmd/booti.rst b/doc/usage/cmd/booti.rst
new file mode 100644
index 00000000000..313efb83cc6
--- /dev/null
+++ b/doc/usage/cmd/booti.rst
@@ -0,0 +1,117 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: booti (command)
+
+booti command
+=============
+
+Synopsis
+--------
+
+::
+
+    booti [<addr> [<initrd>[:<size>]] [<fdt>]]
+
+Description
+-----------
+
+The booti command is used to boot a Linux kernel in flat or compressed
+'Image' format. Which compressed formats are supported is configurable.
+
+addr
+    address of kernel image, defaults to CONFIG_SYS_LOAD_ADDR.
+
+initrd
+    address of the initial RAM disk. Use '-' to boot a kernel with a device
+    tree but without an initial RAM disk.
+
+size
+    size of the initial RAM disk. This parameter must be specified for raw
+    initial RAM disks.
+
+fdt
+    address of the device tree.
+
+To support compressed Image files the following environment variables must be
+set:
+
+kernel_comp_addr_r
+    start of memory area used for decompression
+
+kernel_comp_size
+    size of the compressed file. The value has to be at least the size of
+    loaded image for decompression to succeed. For the booti command the
+    maximum decompressed size is 10 times this value.
+
+Example
+-------
+
+This is the boot log of an Odroid C2 board:
+
+::
+
+    => load mmc 0:1 $fdt_addr_r dtb-5.10.0-3-arm64
+    27530 bytes read in 7 ms (3.7 MiB/s)
+    => load mmc 0:1 $kernel_addr_r vmlinuz-5.10.0-3-arm64
+    26990448 bytes read in 1175 ms (21.9 MiB/s)
+    => load mmc 0:1 $ramdisk_addr_r initrd.img-5.10.0-3-arm64
+    27421776 bytes read in 1209 ms (21.6 MiB/s)
+    => booti $kernel_addr_r $ramdisk_addr_r:$filesize $fdt_addr_r
+    Moving Image from 0x8080000 to 0x8200000, end=9c60000
+    ## Flattened Device Tree blob at 08008000
+       Booting using the fdt blob at 0x8008000
+       Loading Ramdisk to 7a52a000, end 7bf50c50 ... OK
+       Loading Device Tree to 000000007a520000, end 000000007a529b89 ... OK
+
+    Starting kernel ...
+
+The kernel can be compressed with gzip:
+
+.. code-block:: bash
+
+    cd /boot
+    gzip -k vmlinuz-5.10.0-3-arm64
+
+Here is the boot log for the compressed kernel:
+
+::
+
+    => setenv kernel_comp_addr_r 0x50000000
+    => setenv kernel_comp_size 0x04000000
+    => load mmc 0:1 $fdt_addr_r dtb-5.10.0-3-arm64
+    27530 bytes read in 6 ms (4.4 MiB/s)
+    => load mmc 0:1 $kernel_addr_r vmlinuz-5.10.0-3-arm64.gz
+    9267730 bytes read in 402 ms (22 MiB/s)
+    => load mmc 0:1 $ramdisk_addr_r initrd.img-5.10.0-3-arm64
+    27421776 bytes read in 1181 ms (22.1 MiB/s)
+    => booti $kernel_addr_r $ramdisk_addr_r:$filesize $fdt_addr_r
+       Uncompressing Kernel Image
+    Moving Image from 0x8080000 to 0x8200000, end=9c60000
+    ## Flattened Device Tree blob at 08008000
+       Booting using the fdt blob at 0x8008000
+       Loading Ramdisk to 7a52a000, end 7bf50c50 ... OK
+       Loading Device Tree to 000000007a520000, end 000000007a529b89 ... OK
+
+    Starting kernel ...
+
+Configuration
+-------------
+
+The booti command is only available if CONFIG_CMD_BOOTI=y.
+
+Which compression types are supported depends on:
+
+* CONFIG_BZIP2
+* CONFIG_GZIP
+* CONFIG_LZ4
+* CONFIG_LZMA
+* CONFIG_LZO
+* CONFIG_ZSTD
+
+Return value
+------------
+
+Normally this command does not return. If an error occurs, the return value $?
+is set to 1 (false). If the operating system returns to U-Boot, the system is
+reset.
diff --git a/doc/usage/cmd/bootm.rst b/doc/usage/cmd/bootm.rst
new file mode 100644
index 00000000000..e409ebc193b
--- /dev/null
+++ b/doc/usage/cmd/bootm.rst
@@ -0,0 +1,303 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: bootm (command)
+
+bootm command
+=============
+
+Synopsis
+--------
+
+::
+
+    bootm [fit_addr]#<conf>[#extra-conf]
+    bootm [[fit_addr]:<os_subimg>] [[<fit_addr2>]:<rd_subimg2>] [[<fit_addr3>]:<fdt_subimg>]
+
+    bootm <addr1> [[<addr2> [<addr3>]]    # Legacy boot
+
+Description
+-----------
+
+The *bootm* command is used to boot an Operating System. It has a large number
+of options depending on what needs to be booted.
+
+Note that the second form supports the first and/or second arguments to be
+omitted by using a hyphen '-' instead.
+
+fit_addr / fit_addr2 / fit_addr3
+    address of FIT to boot, defaults to CONFIG_SYS_LOAD_ADDR. See notes below.
+
+conf
+    configuration unit to boot (must be preceded by hash '#')
+
+extra-conf
+    extra configuration to boot. This is supported only for additional
+    devicetree overlays to apply on the base device tree supplied by the first
+    configuration unit.
+
+os_subimg
+    OS sub-image to boot (must be preceded by colon ':')
+
+rd_subimg
+    ramdisk sub-image to boot. Use a hyphen '-' if there is no ramdisk but an
+    FDT is needed.
+
+fdt_subimg
+    FDT sub-image to boot
+
+See below for legacy boot. Booting using :doc:`../fit/index` is recommended.
+
+Note on current image address
+-----------------------------
+
+When bootm is called without arguments, the image at current image address is
+booted. The current image address is the address set most recently by a load
+command, etc, and is by default equal to CONFIG_SYS_LOAD_ADDR. For example,
+consider the following commands::
+
+    tftp 200000 /tftpboot/kernel
+    bootm
+    # Last command is equivalent to:
+    # bootm 200000
+
+As shown above, with FIT the address portion of any argument
+can be omitted. If <addr3> is omitted, then it is assumed that image at
+<addr2> should be used. Similarly, when <addr2> is omitted, it is assumed that
+image at <addr1> should be used. If <addr1> is omitted, it is assumed that the
+current image address is to be used. For example, consider the following
+commands::
+
+    tftp 200000 /tftpboot/uImage
+    bootm :kernel-1
+    # Last command is equivalent to:
+    # bootm 200000:kernel-1
+
+    tftp 200000 /tftpboot/uImage
+    bootm 400000:kernel-1 :ramdisk-1
+    # Last command is equivalent to:
+    # bootm 400000:kernel-1 400000:ramdisk-1
+
+    tftp 200000 /tftpboot/uImage
+    bootm :kernel-1 400000:ramdisk-1 :fdt-1
+    # Last command is equivalent to:
+    # bootm 200000:kernel-1 400000:ramdisk-1 400000:fdt-1
+
+
+Legacy boot
+-----------
+
+U-Boot supports a legacy image format, enabled by `CONFIG_LEGACY_IMAGE_FORMAT`.
+This is not recommended as it is quite limited and insecure. Use
+:doc:`../fit/index` instead. It is documented here for old boards which still
+use it.
+
+Arguments are:
+
+addr1
+    address of legacy image to boot. If the image includes a second component
+    (ramdisk) it is used as well, unless the second parameter is hyphen '-'.
+
+addr2
+    address of legacy image to use as ramdisk
+
+addr3
+    address of legacy image to use as FDT
+
+
+Example syntax
+--------------
+
+This section provides various examples of possible usage::
+
+    1.  bootm       /* boot image at the current address, equivalent to 2,3,8 */
+
+This is equivalent to cases 2, 3 or 8, depending on the type of image at
+the current image address.
+
+Boot method: see cases 2,3,8
+
+Legacy uImage syntax
+~~~~~~~~~~~~~~~~~~~~
+
+::
+
+    2.  bootm <addr1>            /* single image at <addr1> */
+
+Boot kernel image located at <addr1>.
+
+Boot method: non-FDT
+
+::
+
+    3.  bootm <addr1>            /* multi-image at <addr1>  */
+
+First and second components of the image at <addr1> are assumed to be a
+kernel and a ramdisk, respectively. The kernel is booted with initrd loaded
+with the ramdisk from the image.
+
+Boot method: depends on the number of components at <addr1>, and on whether
+U-Boot is compiled with OF support, which it should be.
+
+    ==================== ======================== ========================
+    Configuration        2 components             3 components
+                         (kernel, initrd)         (kernel, initrd, fdt)
+    ==================== ======================== ========================
+    #ifdef CONFIG_OF_*                   non-FDT                     FDT
+    #ifndef CONFIG_OF_*                  non-FDT                 non-FDT
+    ==================== ======================== ========================
+
+::
+
+    4.  bootm <addr1> -            /* multi-image at <addr1>  */
+
+Similar to case 3, but the kernel is booted without initrd.  Second
+component of the multi-image is irrelevant (it can be a dummy, 1-byte file).
+
+Boot method: see case 3
+
+::
+
+    5.  bootm <addr1> <addr2>        /* single image at <addr1> */
+
+Boot kernel image located at <addr1> with initrd loaded with ramdisk
+from the image at <addr2>.
+
+Boot method: non-FDT
+
+::
+
+    6.  bootm <addr1> <addr2> <addr3>   /* single image at <addr1> */
+
+<addr1> is the address of a kernel image, <addr2> is the address of a
+ramdisk image, and <addr3> is the address of a FDT binary blob.  Kernel is
+booted with initrd loaded with ramdisk from the image at <addr2>.
+
+Boot method: FDT
+
+::
+
+    7.  bootm <addr1> -      <addr3>   /* single image at <addr1> */
+
+<addr1> is the address of a kernel image and <addr3> is the address of
+a FDT binary blob. Kernel is booted without initrd.
+
+Boot method: FDT
+
+FIT syntax
+~~~~~~~~~~
+
+::
+
+    8.  bootm <addr1>
+
+Image at <addr1> is assumed to contain a default configuration, which
+is booted.
+
+Boot method: FDT or non-FDT, depending on whether the default configuration
+defines FDT
+
+::
+
+    9.  bootm [<addr1>]:<subimg1>
+
+Similar to case 2: boot kernel stored in <subimg1> from the image at
+address <addr1>.
+
+Boot method: non-FDT
+
+::
+
+    10. bootm [<addr1>]#<conf>[#<extra-conf[#...]]
+
+Boot configuration <conf> from the image at <addr1>.
+
+Boot method: FDT or non-FDT, depending on whether the configuration given
+defines FDT
+
+::
+
+    11. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2>
+
+Equivalent to case 5: boot kernel stored in <subimg1> from the image
+at <addr1> with initrd loaded with ramdisk <subimg2> from the image at
+<addr2>.
+
+Boot method: non-FDT
+
+::
+
+    12. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2> [<addr3>]:<subimg3>
+
+Equivalent to case 6: boot kernel stored in <subimg1> from the image
+at <addr1> with initrd loaded with ramdisk <subimg2> from the image at
+<addr2>, and pass FDT blob <subimg3> from the image at <addr3>.
+
+Boot method: FDT
+
+::
+
+    13. bootm [<addr1>]:<subimg1> [<addr2>]:<subimg2> <addr3>
+
+Similar to case 12, the difference being that <addr3> is the address
+of FDT binary blob that is to be passed to the kernel.
+
+Boot method: FDT
+
+::
+
+    14. bootm [<addr1>]:<subimg1> -              [<addr3>]:<subimg3>
+
+Equivalent to case 7: boot kernel stored in <subimg1> from the image
+at <addr1>, without initrd, and pass FDT blob <subimg3> from the image at
+<addr3>.
+
+Boot method: FDT
+
+    15. bootm [<addr1>]:<subimg1> -              <addr3>
+
+Similar to case 14, the difference being that <addr3> is the address
+of the FDT binary blob that is to be passed to the kernel.
+
+Boot method: FDT
+
+
+
+Example
+-------
+
+boot kernel "kernel-1" stored in a new uImage located at 200000::
+
+    bootm 200000:kernel-1
+
+boot configuration "cfg-1" from a new uImage located at 200000::
+
+    bootm 200000#cfg-1
+
+boot configuration "cfg-1" with extra "cfg-2" from a new uImage located
+at 200000::
+
+    bootm 200000#cfg-1#cfg-2
+
+boot "kernel-1" from a new uImage at 200000 with initrd "ramdisk-2" found in
+some other new uImage stored at address 800000::
+
+    bootm 200000:kernel-1 800000:ramdisk-2
+
+boot "kernel-2" from a new uImage at 200000, with initrd "ramdisk-1" and FDT
+"fdt-1", both stored in some other new uImage located at 800000::
+
+    bootm 200000:kernel-1 800000:ramdisk-1 800000:fdt-1
+
+boot kernel "kernel-2" with initrd "ramdisk-2", both stored in a new uImage
+at address 200000, with a raw FDT blob stored at address 600000::
+
+    bootm 200000:kernel-2 200000:ramdisk-2 600000
+
+boot kernel "kernel-2" from new uImage at 200000 with FDT "fdt-1" from the
+same new uImage::
+
+    bootm 200000:kernel-2 - 200000:fdt-1
+
+.. sectionauthor:: Bartlomiej Sieka <tur@semihalf.com>
+.. sectionauthor:: Simon Glass <sjg@chromium.org>
diff --git a/doc/usage/cmd/bootmenu.rst b/doc/usage/cmd/bootmenu.rst
new file mode 100644
index 00000000000..294cc02b17a
--- /dev/null
+++ b/doc/usage/cmd/bootmenu.rst
@@ -0,0 +1,167 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. (C) Copyright 2011-2012 Pali Rohár <pali@kernel.org>
+
+.. index::
+   single: bootmenu (command)
+
+bootmenu command
+================
+
+Synopsis
+--------
+::
+
+    bootmenu [delay]
+
+Description
+-----------
+
+The "bootmenu" command uses U-Boot menu interfaces and provides
+a simple mechanism for creating menus with different boot items.
+The cursor keys "Up" and "Down" are used for navigation through
+the items. Current active menu item is highlighted and can be
+selected using the "Enter" key. The selection of the highlighted
+menu entry invokes an U-Boot command (or a list of commands)
+associated with this menu entry.
+
+The "bootmenu" command interprets ANSI escape sequences, so
+an ANSI terminal is required for proper menu rendering and item
+selection.
+
+The assembling of the menu is done via a set of environment variables
+"bootmenu_<num>" and "bootmenu_delay", i.e.::
+
+    bootmenu_delay=<delay>
+    bootmenu_<num>="<title>=<commands>"
+
+<delay>
+    is the autoboot delay in seconds, after which the first
+    menu entry will be selected automatically
+
+<num>
+    is the boot menu entry number, starting from zero
+
+<title>
+    is the text of the menu entry shown on the console
+    or on the boot screen
+
+<commands>
+    are commands which will be executed when a menu
+    entry is selected
+
+Title and commands are separated by the first appearance of a '='
+character in the value of the environment variable.
+
+The first (optional) argument of the "bootmenu" command is a delay specifier
+and it overrides the delay value defined by "bootmenu_delay" environment
+variable. If the environment variable "bootmenu_delay" is not set or if
+the argument of the "bootmenu" command is not specified, the default delay
+will be CONFIG_BOOTDELAY. If delay is 0, no menu entries will be shown on
+the console (or on the screen) and the command of the first menu entry will
+be called immediately. If delay is less then 0, bootmenu will be shown and
+autoboot will be disabled.
+
+Bootmenu always adds menu entry "U-Boot console" at the end of all menu
+entries specified by environment variables. When selecting this entry
+the bootmenu terminates and the usual U-Boot command prompt is presented
+to the user.
+
+Example environment::
+
+    setenv bootmenu_0 Boot 1. kernel=bootm 0x82000000  # Set first menu entry
+    setenv bootmenu_1 Boot 2. kernel=bootm 0x83000000  # Set second menu entry
+    setenv bootmenu_2 Reset board=reset                # Set third menu entry
+    setenv bootmenu_3 U-Boot boot order=boot           # Set fourth menu entry
+    bootmenu 20        # Run bootmenu with autoboot delay 20s
+
+
+The above example will be rendered as below::
+
+    *** U-Boot Boot Menu ***
+
+       Boot 1. kernel
+       Boot 2. kernel
+       Reset board
+       U-Boot boot order
+       U-Boot console
+
+    Hit any key to stop autoboot: 20
+    Press UP/DOWN to move, ENTER to select
+
+The selected menu entry will be highlighted - it will have inverted
+background and text colors.
+
+UEFI boot variable enumeration
+''''''''''''''''''''''''''''''
+If enabled, the bootmenu command will automatically generate and add
+UEFI-related boot menu entries for the following items.
+
+ * possible bootable media with default file names
+ * user-defined UEFI boot options
+
+The bootmenu automatically enumerates the possible bootable
+media devices supporting EFI_SIMPLE_FILE_SYSTEM_PROTOCOL.
+This auto generated entry is named as "<interface> <devnum>:<part>" format.
+(e.g. "usb 0:1")
+
+The bootmenu displays the UEFI-related menu entries in order of "BootOrder".
+When the user selects the UEFI boot menu entry, the bootmenu sets
+the selected boot variable index to "BootNext" without non-volatile attribute,
+then call the uefi boot manager with the command "bootefi bootmgr".
+
+Example bootmenu is as below::
+
+    *** U-Boot Boot Menu ***
+
+       mmc 0:1
+       mmc 0:2
+       debian
+       nvme 0:1
+       ubuntu
+       nvme 0:2
+       usb 0:2
+       U-Boot console
+
+Default behavior when user exits from the bootmenu
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+User can exit from bootmenu by selecting the last entry
+"U-Boot console"/"Quit" or ESC key.
+
+When the CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is disabled,
+user exits from the bootmenu and returns to the U-Boot console.
+
+When the CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is enabled, user can not
+enter the U-Boot console. When the user exits from the bootmenu,
+the bootmenu invokes the following default behavior.
+
+ * if CONFIG_CMD_BOOTEFI_BOOTMGR is enabled, execute "bootefi bootmgr" command
+ * "bootefi bootmgr" fails or is not enabled, then execute "run bootcmd" command.
+
+Configuration
+-------------
+
+The "bootmenu" command is enabled by::
+
+    CONFIG_CMD_BOOTMENU=y
+
+To run the bootmenu at startup add these additional settings::
+
+    CONFIG_AUTOBOOT_KEYED=y
+    CONFIG_BOOTDELAY=30
+    CONFIG_AUTOBOOT_MENU_SHOW=y
+
+UEFI boot variable enumeration is enabled by::
+
+    CONFIG_CMD_BOOTEFI_BOOTMGR=y
+
+To improve the product security, entering U-Boot console from bootmenu
+can be disabled by::
+
+    CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE=y
+
+To scan the discoverable devices connected to the buses such as
+USB and PCIe prior to bootmenu showing up, CONFIG_PREBOOT can be
+used to run the command before showing the bootmenu, i.e.::
+
+    CONFIG_USE_PREBOOT=y
+    CONFIG_PREBOOT="pci enum; usb start; scsi scan; nvme scan; virtio scan"
diff --git a/doc/usage/cmd/bootmeth.rst b/doc/usage/cmd/bootmeth.rst
new file mode 100644
index 00000000000..c3d2ec1574b
--- /dev/null
+++ b/doc/usage/cmd/bootmeth.rst
@@ -0,0 +1,114 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: bootmeth (command)
+
+bootmeth command
+================
+
+Synopsis
+--------
+
+::
+
+    bootmeth list [-a]          - list selected bootmeths (-a for all)
+    bootmeth order "[<bm> ...]" - select the order of bootmeths\n"
+
+
+Description
+-----------
+
+The `bootmeth` command is used to manage bootmeths. It can list them and change
+the order in which they are used.
+
+See :doc:`/develop/bootstd/index` for more information.
+
+
+.. _bootmeth_order:
+
+bootmeth order
+~~~~~~~~~~~~~~
+
+Selects which bootmeths to use and the order in which they are invoked. When
+scanning bootdevs, each bootmeth is tried in turn to see if it can find a valid
+bootflow. You can use this command to adjust the order or even to omit some
+boomeths.
+
+The argument is a quoted list of bootmeths to use, by name. If global bootmeths
+are included, they must be at the end, otherwise the scanning mechanism will not
+work correctly.
+
+
+bootmeth list
+~~~~~~~~~~~~~
+
+This lists the selected bootmeths, or all of them, if the `-a` flag is used.
+The format looks like this:
+
+=====  ===  ==================  =================================
+Order  Seq  Name                Description
+=====  ===  ==================  =================================
+    0    0  extlinux            Extlinux boot from a block device
+    1    1  efi                 EFI boot from an .efi file
+    2    2  pxe                 PXE boot from a network device
+    3    3  sandbox             Sandbox boot for testing
+ glob    4  efi_mgr             EFI bootmgr flow
+=====  ===  ==================  =================================
+
+The fields are as follows:
+
+Order:
+    The order in which these bootmeths are invoked for each bootdev. If this
+    shows as a hyphen, then the bootmeth is not in the current ordering. If it
+    shows as 'glob', then this is a global bootmeth and should be at the end.
+
+Seq:
+    The sequence number of the bootmeth, i.e. the normal ordering if none is set
+
+Name:
+    Name of the bootmeth
+
+Description:
+    A friendly description for the bootmeth
+
+
+Example
+-------
+
+This shows listing bootmeths. All are present and in the normal order::
+
+    => bootmeth list
+    Order  Seq  Name                Description
+    -----  ---  ------------------  ------------------
+        0    0  distro              Extlinux boot from a block device
+        1    1  efi                 EFI boot from an .efi file
+        2    2  pxe                 PXE boot from a network device
+        3    3  sandbox             Sandbox boot for testing
+        4    4  efi_mgr             EFI bootmgr flow
+    -----  ---  ------------------  ------------------
+    (5 bootmeths)
+
+Now the order is changed, to include only two of them::
+
+    => bootmeth order "sandbox distro"
+    => bootmeth list
+    Order  Seq  Name                Description
+    -----  ---  ------------------  ------------------
+        0    3  sandbox             Sandbox boot for testing
+        1    0  distro              Extlinux boot from a block device
+    -----  ---  ------------------  ------------------
+    (2 bootmeths)
+
+The -a flag shows all bootmeths so you can clearly see which ones are used and
+which are not::
+
+    => bootmeth list -a
+    Order  Seq  Name                Description
+    -----  ---  ------------------  ------------------
+        1    0  distro              Extlinux boot from a block device
+        -    1  efi                 EFI boot from an .efi file
+        -    2  pxe                 PXE boot from a network device
+        0    3  sandbox             Sandbox boot for testing
+        -    4  efi_mgr             EFI bootmgr flow
+    -----  ---  ------------------  ------------------
+    (5 bootmeths)
diff --git a/doc/usage/cmd/bootz.rst b/doc/usage/cmd/bootz.rst
new file mode 100644
index 00000000000..b85875adde3
--- /dev/null
+++ b/doc/usage/cmd/bootz.rst
@@ -0,0 +1,69 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: bootz (command)
+
+bootz command
+=============
+
+Synopsis
+--------
+
+::
+
+    bootz [<addr> [<initrd>[:<size>]] [<fdt>]]
+
+Description
+-----------
+
+The bootz command is used to boot a Linux kernel in 'zImage' format.
+
+addr
+    address of kernel image, defaults to the value of the environment
+    variable $loadaddr.
+
+initrd
+    address of the initial RAM disk. Use '-' to boot a kernel with a device
+    tree but without an initial RAM disk.
+
+size
+    size of the initial RAM disk. This parameter must be specified for raw
+    initial RAM disks.
+
+fdt
+    address of the device tree.
+
+Example
+-------
+
+This is the boot log of an OrangePi PC board:
+
+::
+
+    => load mmc 0:2 $fdt_addr_r dtb
+    23093 bytes read in 7 ms (3.1 MiB/s)
+    => load mmc 0:2 $kernel_addr_r vmlinuz
+    5079552 bytes read in 215 ms (22.5 MiB/s)
+    => load mmc 0:2 $ramdisk_addr_r initrd.img
+    23854965 bytes read in 995 ms (22.9 MiB/s)
+    => bootz $kernel_addr_r $ramdisk_addr_r:$filesize $fdt_addr_r
+    Kernel image @ 0x42000000 [ 0x000000 - 0x4d8200 ]
+    ## Flattened Device Tree blob at 43000000
+       Booting using the fdt blob at 0x43000000
+    EHCI failed to shut down host controller.
+       Loading Ramdisk to 48940000, end 49ffff75 ... OK
+       Loading Device Tree to 48937000, end 4893fa34 ... OK
+
+    Starting kernel ...
+
+Configuration
+-------------
+
+The bootz command is only available if CONFIG_CMD_BOOTZ=y.
+
+Return value
+------------
+
+Normally this command does not return. If an error occurs, the return value $?
+is set to 1 (false). If the operating system returns to U-Boot, the system is
+reset.
diff --git a/doc/usage/cmd/button.rst b/doc/usage/cmd/button.rst
new file mode 100644
index 00000000000..6c6794f31b8
--- /dev/null
+++ b/doc/usage/cmd/button.rst
@@ -0,0 +1,67 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: button (command)
+
+button command
+==============
+
+Synopsis
+--------
+
+::
+
+    button list
+    button <name>
+
+Description
+-----------
+
+The button command is used to retrieve the status of a button. To show the
+status of a button with name 'button1' you would issue the command
+
+::
+
+    button button1
+
+The status of the button is both written to the console as *ON* or *OFF* and
+set in the return value variable *$?* as 0 (true) or 1 (false). To retrieve
+the status of a button with name *button1* and to write it to environment
+variable *status1* you would execute the commands
+
+::
+
+    button button1
+    setenv status1 $?
+
+A list of all available buttons and their status can be displayed using
+
+::
+
+    button list
+
+If a button device has not been probed yet, its status will be shown as
+*<inactive>* in the list.
+
+Configuration
+-------------
+
+To use the button command you must specify CONFIG_CMD_BUTTON=y and enable a
+button driver. The available buttons are defined in the device-tree.
+
+Return value
+------------
+
+The variable *$?* takes the following values
+
++---+-----------------------------+
+| 0 | ON, the button is pressed   |
++---+-----------------------------+
+| 1 | OFF, the button is released |
++---+-----------------------------+
+| 0 | button list was shown       |
++---+-----------------------------+
+| 1 | button not found            |
++---+-----------------------------+
+| 1 | invalid arguments           |
++---+-----------------------------+
diff --git a/doc/usage/cmd/cat.rst b/doc/usage/cmd/cat.rst
new file mode 100644
index 00000000000..b22dc6184a2
--- /dev/null
+++ b/doc/usage/cmd/cat.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: cat (command)
+
+cat command
+===========
+
+Synopsis
+--------
+
+::
+
+    cat <interface> <dev[:part]> <file>
+
+Description
+-----------
+
+The cat command prints the file content to standard out.
+
+interface
+    interface for accessing the block device (mmc, sata, scsi, usb, ....)
+
+dev
+    device number
+
+part
+    partition number, defaults to 1
+
+file
+    path to file
+
+Example
+-------
+
+Here is the output for a example text file:
+
+::
+
+    => cat mmc 0:1 hello
+    hello world
+    =>
+
+Configuration
+-------------
+
+The cat command is only available if CONFIG_CMD_CAT=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the file is readable, otherwise it returns a non-zero error code.
diff --git a/doc/usage/cmd/cbsysinfo.rst b/doc/usage/cmd/cbsysinfo.rst
new file mode 100644
index 00000000000..80d8ba1b662
--- /dev/null
+++ b/doc/usage/cmd/cbsysinfo.rst
@@ -0,0 +1,25 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+cbsysinfo
+=========
+
+Synopsis
+--------
+
+::
+
+    cbsysinfo
+
+
+Description
+-----------
+
+This displays information obtained from the coreboot sysinfo table. It is only
+useful when booting U-Boot from coreboot.
+
+Example
+-------
+
+::
+
+    => cbsysinfo
diff --git a/doc/usage/cmd/cedit.rst b/doc/usage/cmd/cedit.rst
new file mode 100644
index 00000000000..5670805a00e
--- /dev/null
+++ b/doc/usage/cmd/cedit.rst
@@ -0,0 +1,151 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: cedit (command)
+
+cedit command
+=============
+
+Synopsis
+--------
+
+::
+
+    cedit load <interface> <dev[:part]> <filename>
+    cedit run
+    cedit write_fdt <dev[:part]> <filename>
+    cedit read_fdt <dev[:part]> <filename>
+    cedit write_env [-v]
+    cedit read_env [-v]
+    cedit write_cmos [-v] [dev]
+
+Description
+-----------
+
+The *cedit* command is used to load a configuration-editor description and allow
+the user to interact with it.
+
+It makes use of the expo subsystem.
+
+The description is in the form of a devicetree file, as documented at
+:ref:`expo_format`.
+
+See :doc:`../../develop/cedit` for information about the configuration editor.
+
+cedit load
+~~~~~~~~~~
+
+Loads a configuration-editor description from a file. It creates a new cedit
+structure ready for use. Initially no settings are read, so default values are
+used for each object.
+
+cedit run
+~~~~~~~~~
+
+Runs the default configuration-editor event loop. This is very simple, just
+accepting character input and moving through the objects under user control.
+The implementation is at `cedit_run()`.
+
+cedit write_fdt
+~~~~~~~~~~~~~~~
+
+Writes the current user settings to a devicetree file. For each menu item the
+selected ID and its text string are written.
+
+cedit read_fdt
+~~~~~~~~~~~~~~
+
+Reads the user settings from a devicetree file and updates the cedit with those
+settings.
+
+cedit read_env
+~~~~~~~~~~~~~~
+
+Reads the settings from the environment variables. For each menu item `<name>`,
+cedit looks for a variable called `c.<name>` with the ID of the selected menu
+item.
+
+The `-v` flag enables verbose mode, where each variable is printed after it is
+read.
+
+cedit write_env
+~~~~~~~~~~~~~~~
+
+Writes the settings to environment variables. For each menu item the selected
+ID and its text string are written, similar to:
+
+   setenv c.<name> <selected_id>
+   setenv c.<name>-str <selected_id's text string>
+
+The `-v` flag enables verbose mode, where each variable is printed before it is
+set.
+
+cedit write_cmos
+~~~~~~~~~~~~~~~~
+
+Writes the settings to locations in the CMOS RAM. The locations used are
+specified by the schema. See `expo_format_`.
+
+The `-v` flag enables verbose mode, which shows which CMOS locations were
+updated.
+
+Normally the first RTC device is used to hold the data. You can specify a
+different device by name using the `dev` parameter.
+
+
+Example
+-------
+
+::
+
+    => cedit load hostfs - fred.dtb
+    => cedit run
+    => cedit write_fdt hostfs - settings.dtb
+
+That results in::
+
+    / {
+        cedit-values {
+            cpu-speed = <0x00000006>;
+            cpu-speed-str = "2 GHz";
+            power-loss = <0x0000000a>;
+            power-loss-str = "Always Off";
+        };
+    }
+
+    => cedit read_fdt hostfs - settings.dtb
+
+This shows settings being stored in the environment::
+
+    => cedit write_env -v
+    c.cpu-speed=7
+    c.cpu-speed-str=2.5 GHz
+    c.power-loss=12
+    c.power-loss-str=Memory
+    => print
+    ...
+    c.cpu-speed=6
+    c.cpu-speed-str=2 GHz
+    c.power-loss=10
+    c.power-loss-str=Always Off
+    ...
+
+    => cedit read_env -v
+    c.cpu-speed=7
+    c.power-loss=12
+
+This shows writing to CMOS RAM. Notice that the bytes at 80 and 84 change::
+
+    => rtc read 80 8
+    00000080: 00 00 00 00 00 2f 2a 08                          ...../*.
+    =>  cedit write_cmos -v
+    Write 2 bytes from offset 80 to 84
+    => rtc read 80 8
+    00000080: 01 00 00 00 08 2f 2a 08                          ...../*.
+    => cedit read_cmos -v
+    Read 2 bytes from offset 80 to 84
+
+Here is an example with the device specified::
+
+    => cedit write_cmos rtc@43
+    =>
diff --git a/doc/usage/cmd/cli.rst b/doc/usage/cmd/cli.rst
new file mode 100644
index 00000000000..23e5ee7a902
--- /dev/null
+++ b/doc/usage/cmd/cli.rst
@@ -0,0 +1,77 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: cli (command)
+
+cli command
+===========
+
+Synopsis
+--------
+
+::
+
+    cli get
+    cli set cli_flavor
+
+Description
+-----------
+
+The cli command permits getting and changing the current parser at runtime.
+
+cli get
+~~~~~~~
+
+It shows the current value of the parser used by the CLI.
+
+cli set
+~~~~~~~
+
+It permits setting the value of the parser used by the CLI.
+
+Possible values are old and modern.
+Note that, to use a specific parser its code should have been compiled, that
+is to say you need to enable the corresponding CONFIG_HUSH*.
+Otherwise, an error message is printed.
+
+Examples
+--------
+
+Get the current parser::
+
+    => cli get
+    old
+
+Change the current parser::
+
+    => cli get
+    old
+    => cli set modern
+    => cli get
+    modern
+    => cli set old
+    => cli get
+    old
+
+Trying to set the current parser to an unknown value::
+
+    => cli set foo
+    Bad value for parser name: foo
+    cli - cli
+
+    Usage:
+    cli get - print current cli
+    set - set the current cli, possible values are: old, modern
+
+Trying to set the current parser to a correct value but its code was not
+compiled::
+
+    => cli get
+    modern
+    => cli set old
+    Want to set current parser to old, but its code was not compiled!
+
+Return value
+------------
+
+The return value $? indicates whether the command succeeded.
diff --git a/doc/usage/cmd/cls.rst b/doc/usage/cmd/cls.rst
new file mode 100644
index 00000000000..828276742b9
--- /dev/null
+++ b/doc/usage/cmd/cls.rst
@@ -0,0 +1,29 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: cls (command)
+
+cls command
+===========
+
+Synopsis
+--------
+
+::
+
+    cls
+
+Description
+-----------
+
+The cls command clears the screen.
+
+Configuration
+-------------
+
+The cls command is only available if CONFIG_CMD_CLS=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) on success and 1 (false) on failure.
diff --git a/doc/usage/cmd/cmp.rst b/doc/usage/cmd/cmp.rst
new file mode 100644
index 00000000000..a3830747364
--- /dev/null
+++ b/doc/usage/cmd/cmp.rst
@@ -0,0 +1,108 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: cmp (command)
+
+cmp command
+===========
+
+Synopsis
+--------
+
+::
+
+    cmp [.b, .w, .l, .q] addr1 addr2 count
+
+Description
+-----------
+
+The cmp command is used to compare two memory areas. By default it works on
+four byte (32-bit) values. By appending .b, .w, .l, .q the size of the
+values is controlled:
+
+cmp.b
+    compare 1 byte (8-bit) values
+
+cmp.w
+    compare 2 byte (16-bit) values
+
+cmp.l
+    compare 4 byte (32-bit) values
+
+cmp.q
+    compare 8 byte (64-bit) values
+
+The parameters are used as follows:
+
+addr1
+    Address of the first memory area.
+
+addr2
+    Address of the second memory area.
+
+count
+    Number of bytes to compare (as hexadecimal number).
+
+Example
+-------
+
+In the example below the strings "Hello world\n" and "Hello World\n" are written
+to memory and then compared.
+
+::
+
+    => mm.b 0x1000000
+    01000000: 00 ? 48
+    01000001: 00 ? 65
+    01000002: 00 ? 6c
+    01000003: 00 ? 6c
+    01000004: 00 ? 6f
+    01000005: 00 ? 20
+    01000006: 00 ? 77
+    01000007: 00 ? 6f
+    01000008: 00 ? 72
+    01000009: 00 ? 6c
+    0100000a: 00 ? 64
+    0100000b: 00 ? 0d
+    0100000c: 00 ? => <INTERRUPT>
+    => mm.b 0x101000
+    00101000: 00 ? 48
+    00101001: 00 ? 65
+    00101002: 00 ? 6c
+    00101003: 00 ? 6c
+    00101004: 00 ? 6f
+    00101005: 00 ? 20
+    00101006: 00 ? 57
+    00101007: 00 ? 6f
+    00101008: 00 ? 72
+    00101009: 00 ? 6c
+    0010100a: 00 ? 64
+    0010100b: 00 ? 0d
+    0010100c: 00 ? => <INTERRUPT>
+    => cmp 0x1000000 0x101000 0xc
+    word at 0x01000004 (0x6f77206f) != word at 0x00101004 (0x6f57206f)
+    Total of 1 word(s) were the same
+    => cmp.b 0x1000000 0x101000 0xc
+    byte at 0x01000006 (0x77) != byte at 0x00101006 (0x57)
+    Total of 6 byte(s) were the same
+    => cmp.w 0x1000000 0x101000 0xc
+    halfword at 0x01000006 (0x6f77) != halfword at 0x00101006 (0x6f57)
+    Total of 3 halfword(s) were the same
+    => cmp.l 0x1000000 0x101000 0xc
+    word at 0x01000004 (0x6f77206f) != word at 0x00101004 (0x6f57206f)
+    Total of 1 word(s) were the same
+    => cmp.q 0x1000000 0x101000 0xc
+    double word at 0x01000000 (0x6f77206f6c6c6548) != double word at 0x00101000 (0x6f57206f6c6c6548)
+    Total of 0 double word(s) were the same
+
+Configuration
+-------------
+
+The cmp command is only available if CONFIG_CMD_MEMORY=y. The cmp.q command is
+only available on 64-bit targets.
+
+Return value
+------------
+
+The return value $? is true (0) if the compared memory areas are equal.
+The reutrn value is false (1) if the compared memory areas differ.
diff --git a/doc/usage/cmd/coninfo.rst b/doc/usage/cmd/coninfo.rst
new file mode 100644
index 00000000000..a66cf90a27b
--- /dev/null
+++ b/doc/usage/cmd/coninfo.rst
@@ -0,0 +1,58 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: coninfo (command)
+
+coninfo command
+===============
+
+Synopsis
+--------
+
+::
+
+    coninfo
+
+Description
+-----------
+
+The coninfo command provides a list of available console input and output
+devices and their assignment as stdin, stdout, stderr console devices.
+
+If CONFIG_SYS_CONSOLE_IS_IN_ENV=y, the assignment is controlled by the
+environment variables stdin, stdout, stderr which contain a comma separated
+list of device names.
+
+Example
+-------
+
+.. code-block:: console
+
+    => coninfo
+    List of available devices
+    |-- pl011@9000000 (IO)
+    |   |-- stdin
+    |   |-- stdout
+    |   |-- stderr
+    |-- serial (IO)
+    |-- usbkbd (I)
+    => setenv stdin pl011@9000000,usbkbd
+    => coninfo
+    List of available devices
+    |-- pl011@9000000 (IO)
+    |   |-- stdin
+    |   |-- stdout
+    |   |-- stderr
+    |-- serial (IO)
+    |-- usbkbd (I)
+    |   |-- stdin
+
+Configuration
+-------------
+
+The coninfo command is only available if CONFIG_CMD_CONSOLE=y.
+
+Return value
+------------
+
+The return value $? is always 0 (true).
diff --git a/doc/usage/cmd/conitrace.rst b/doc/usage/cmd/conitrace.rst
new file mode 100644
index 00000000000..38ec66ad529
--- /dev/null
+++ b/doc/usage/cmd/conitrace.rst
@@ -0,0 +1,57 @@
+.. index::
+   single: conitrace (command)
+
+conitrace command
+=================
+
+Synopsis
+--------
+
+::
+
+    conitrace
+
+Description
+-----------
+
+The conitrace command is used to test the correct function of the console input
+driver. It is especially valuable for checking the support for special keys like
+<F1> or <POS1>.
+
+To display escape sequences on a single line the output only advances to the
+next line after detecting a pause of a few milliseconds.
+
+The output is hexadecimal.
+
+Examples
+--------
+
+Entering keys <B><SHIFT-B><CTRL-B><X>
+
+::
+
+    => conitrace
+    Waiting for your input
+    To terminate type 'x'
+    62
+    42
+    02
+    =>
+
+Entering keys <F1><POS1><DEL><BACKSPACE><X>
+
+::
+
+    => conitrace
+    Waiting for your input
+    To terminate type 'x'
+    1b 4f 50
+    1b 5b 48
+    1b 5b 33 7e
+    7f
+    =>
+
+Configuration
+-------------
+
+The conitrace command is only available if CONFIG_CMD_CONITRACE=y.
diff --git a/doc/usage/cmd/cp.rst b/doc/usage/cmd/cp.rst
new file mode 100644
index 00000000000..434dfedfc2b
--- /dev/null
+++ b/doc/usage/cmd/cp.rst
@@ -0,0 +1,87 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: cp (command)
+
+cp command
+==========
+
+Synopsis
+--------
+
+::
+
+    cp source target count
+    cp.b source target count
+    cp.w source target count
+    cp.l source target count
+    cp.q source target count
+
+Description
+-----------
+
+The cp command is used to copy *count* chunks of memory from the *source*
+address to the *target* address. If the *target* address points to NOR flash,
+the flash is programmed. When the *target* address points at ordinary memory,
+memmove() is used, so the two regions may overlap.
+
+The number bytes in one chunk is defined by the suffix defaulting to 4 bytes:
+
+====== ==========
+suffix chunk size
+====== ==========
+.b     1 byte
+.w     2 bytes
+.l     4 bytes
+.q     8 bytes
+<none> 4 bytes
+====== ==========
+
+source
+        source address, hexadecimal
+
+target
+        target address, hexadecimal
+
+count
+        number of words to be copied, hexadecimal
+
+Examples
+--------
+
+The example device has a NOR flash where the lower part of the flash is
+protected. We first copy to RAM, then to unprotected flash. Last we try to
+write to protectd flash.
+
+::
+
+    => mtd list
+    List of MTD devices:
+    * nor0
+      - device: flash@0
+      - parent: root_driver
+      - driver: cfi_flash
+      - path: /flash@0
+      - type: NOR flash
+      - block size: 0x20000 bytes
+      - min I/O: 0x1 bytes
+      - 0x000000000000-0x000002000000 : "nor0"
+    => cp.b 4020000 5000000 200000
+    => cp.b 4020000 1e00000 20000
+    Copy to Flash... done
+    => cp.b 4020000 0 20000
+    Copy to Flash... Can't write to protected Flash sectors
+    =>
+
+Configuration
+-------------
+
+The cp command is available if CONFIG_CMD_MEMORY=y. Support for 64 bit words
+(cp.q) is only available on 64-bit targets. Copying to flash depends on
+CONFIG_MTD_NOR_FLASH=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the command was successfully,
+1 (false) otherwise.
diff --git a/doc/usage/cmd/cyclic.rst b/doc/usage/cmd/cyclic.rst
new file mode 100644
index 00000000000..ac1e4c663bf
--- /dev/null
+++ b/doc/usage/cmd/cyclic.rst
@@ -0,0 +1,48 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: cyclic (command)
+
+cyclic command
+==============
+
+Synopsis
+--------
+
+::
+
+    cyclic list
+
+Description
+-----------
+
+The cyclic list command provides a list of the currently registered
+cyclic functions.
+
+This shows the following information:
+
+Function
+    Function name
+
+cpu-time
+    Total time spent in this cyclic function.
+
+Frequency
+    Frequency of execution of this function, e.g. 100 times/s for a
+    pediod of 10ms.
+
+
+See :doc:`../../develop/cyclic` for more information on cyclic functions.
+
+Example
+-------
+
+::
+
+    => cyclic list
+    function: cyclic_demo, cpu-time: 52906 us, frequency: 99.20 times/s
+
+Configuration
+-------------
+
+The cyclic command is only available if CONFIG_CMD_CYCLIC=y.
diff --git a/doc/usage/cmd/dm.rst b/doc/usage/cmd/dm.rst
new file mode 100644
index 00000000000..7651507937a
--- /dev/null
+++ b/doc/usage/cmd/dm.rst
@@ -0,0 +1,519 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: dm (command)
+
+dm command
+==========
+
+Synopsis
+--------
+
+::
+
+    dm compat
+    dm devres
+    dm drivers
+    dm static
+    dm tree [-s][-e] [uclass name]
+    dm uclass [-e] [udevice name]
+
+Description
+-----------
+
+The *dm* command allows viewing information about driver model, including the
+tree of devices and list of available uclasses.
+
+
+dm compat
+~~~~~~~~~
+
+This shows the compatible strings associated with each driver. Often there
+is only one, but multiple strings are shown on their own line. These strings
+can be looked up in the device tree files for each board, to see which driver is
+used for each node.
+
+dm devres
+~~~~~~~~~
+
+This shows a list of a `devres` (device resource) records for a device. Some
+drivers use the devres API to allocate memory, so that it can be freed
+automatically (without any code needed in the driver's remove() method) when the
+device is removed.
+
+This feature is controlled by CONFIG_DEVRES so no useful output is obtained if
+this option is disabled.
+
+dm drivers
+~~~~~~~~~~
+
+This shows all the available drivers, their uclass and a list of devices that
+use that driver, each on its own line. Drivers with no devices are shown with
+`<none>` as the driver name.
+
+
+dm mem
+~~~~~~
+
+This subcommand is really just for debugging and exploration. It can be enabled
+with the `CONFIG_DM_STATS` option.
+
+All output is in hex except that in brackets which is decimal.
+
+The output consists of a header shows the size of the main device model
+structures (struct udevice, struct driver, struct uclass and struct uc_driver)
+and the count and memory used by each (number of devices, memory used by
+devices, memory used by device names, number of uclasses, memory used by
+uclasses).
+
+After that is a table of information about each type of data that can be
+attached to a device, showing the number that have non-null data for that type,
+the total size of all that data, the amount of memory used in total, the
+amount that would be used if this type uses tags instead and the amount that
+would be thus saved.
+
+The `driver_data` line shows the number of devices which have non-NULL driver
+data.
+
+The `tags` line shows the number of tags and the memory used by those.
+
+At the bottom is an indication of the total memory usage obtained by undertaking
+various changes, none of which is currently implemented in U-Boot:
+
+With tags
+    Using tags instead of all attached types
+
+Singly linked
+    Using a singly linked list
+
+driver index
+    Using a driver index instead of a pointer
+
+uclass index
+    Using a uclass index instead of a pointer
+
+Drop device name
+    Using empty device names
+
+
+dm static
+~~~~~~~~~
+
+This shows devices bound by platform data, i.e. not from the device tree. There
+are normally none of these, but some boards may use static devices for space
+reasons.
+
+
+dm tree
+~~~~~~~
+
+This shows the full tree of devices including the following fields:
+
+uclass
+    Shows the name of the uclass for the device
+
+Index
+    Shows the index number of the device, within the uclass. This shows the
+    ordering within the uclass, but not the sequence number.
+
+Probed
+    Shows `+` if the device is active
+
+Driver
+    Shows the name of the driver that this device uses
+
+Name
+    Shows the device name as well as the tree structure, since child devices are
+    shown attached to their parent.
+
+If -s is given, the top-level devices (those which are children of the root
+device) are shown sorted in order of uclass ID, so it is easier to find a
+particular device type.
+
+If -e is given, forward-matching against existing devices is
+made and only the matched devices are shown.
+
+If a device name is given, forward-matching against existing devices is
+made and only the matched devices are shown.
+
+dm uclass
+~~~~~~~~~
+
+This shows each uclass along with a list of devices in that uclass. The uclass
+ID is shown (e.g. uclass 7) and its name.
+
+For each device, the format is::
+
+    n    name @ a, seq s
+
+where `n` is the index within the uclass, `a` is the address of the device in
+memory and `s` is the sequence number of the device.
+
+If -e is given, forward-matching against existing uclasses is
+made and only the matched uclasses are shown.
+
+If no uclass name is given, all the uclasses are shown.
+
+
+Examples
+--------
+
+dm compat
+~~~~~~~~~
+
+This example shows an abridged version of the sandbox output::
+
+    => dm compat
+    Driver                Compatible
+    --------------------------------
+    act8846_reg
+    sandbox_adder         sandbox,adder
+    axi_sandbox_bus       sandbox,axi
+    blk_partition
+    bootcount-rtc         u-boot,bootcount-rtc
+    ...
+    rockchip_rk805        rockchip,rk805
+                          rockchip,rk808
+                          rockchip,rk809
+                          rockchip,rk816
+                          rockchip,rk817
+                          rockchip,rk818
+    root_driver
+    rtc-rv8803            microcrystal,rv8803
+                          epson,rx8803
+                          epson,rx8900
+    ...
+    wdt_gpio              linux,wdt-gpio
+    wdt_sandbox           sandbox,wdt
+
+
+dm devres
+~~~~~~~~~
+
+This example shows an abridged version of the sandbox test output (running
+U-Boot with the -T flag)::
+
+    => dm devres
+    - root_driver
+    - demo_shape_drv
+    - demo_simple_drv
+    - demo_shape_drv
+    ...
+    - h-test
+    - devres-test
+        00000000130194e0 (100 byte) devm_kmalloc_release  BIND
+    - another-test
+    ...
+    - syscon@3
+    - a-mux-controller
+        0000000013025e60 (96 byte) devm_kmalloc_release  PROBE
+        0000000013025f00 (24 byte) devm_kmalloc_release  PROBE
+        0000000013026010 (24 byte) devm_kmalloc_release  PROBE
+        0000000013026070 (24 byte) devm_kmalloc_release  PROBE
+        00000000130260d0 (24 byte) devm_kmalloc_release  PROBE
+    - syscon@3
+    - a-mux-controller
+        0000000013026150 (96 byte) devm_kmalloc_release  PROBE
+        00000000130261f0 (24 byte) devm_kmalloc_release  PROBE
+        0000000013026300 (24 byte) devm_kmalloc_release  PROBE
+        0000000013026360 (24 byte) devm_kmalloc_release  PROBE
+        00000000130263c0 (24 byte) devm_kmalloc_release  PROBE
+    - emul-mux-controller
+        0000000013025fa0 (32 byte) devm_kmalloc_release  PROBE
+    - testfdtm0
+    - testfdtm1
+    ...
+    - pinmux_spi0_pins
+    - pinmux_uart0_pins
+    - pinctrl-single-bits
+        0000000013229180 (320 byte) devm_kmalloc_release  PROBE
+        0000000013229300 (40 byte) devm_kmalloc_release  PROBE
+        0000000013229370 (160 byte) devm_kmalloc_release  PROBE
+        000000001322c190 (40 byte) devm_kmalloc_release  PROBE
+        000000001322c200 (32 byte) devm_kmalloc_release  PROBE
+    - pinmux_i2c0_pins
+    ...
+    - reg@0
+    - reg@1
+
+
+dm drivers
+~~~~~~~~~~
+
+This example shows an abridged version of the sandbox output::
+
+    => dm drivers
+    Driver                    uid uclass               Devices
+    ----------------------------------------------------------
+    act8846_reg               087 regulator            <none>
+    sandbox_adder             021 axi                  adder
+                                                    adder
+    axi_sandbox_bus           021 axi                  axi@0
+    ...
+    da7219                    061 misc                 <none>
+    demo_shape_drv            001 demo                 demo_shape_drv
+                                                    demo_shape_drv
+                                                    demo_shape_drv
+    demo_simple_drv           001 demo                 demo_simple_drv
+                                                    demo_simple_drv
+    testfdt_drv               003 testfdt              a-test
+                                                    b-test
+                                                    d-test
+                                                    e-test
+                                                    f-test
+                                                    g-test
+                                                    another-test
+                                                    chosen-test
+    testbus_drv               005 testbus              some-bus
+                                                    mmio-bus@0
+                                                    mmio-bus@1
+    dsa-port                  039 ethernet             lan0
+                                                    lan1
+    dsa_sandbox               035 dsa                  dsa-test
+    eep_sandbox               121 w1_eeprom            <none>
+    ...
+    pfuze100_regulator        087 regulator            <none>
+    phy_sandbox               077 phy                  bind-test-child1
+                                                    gen_phy@0
+                                                    gen_phy@1
+                                                    gen_phy@2
+    pinconfig                 078 pinconfig            gpios
+                                                    gpio0
+                                                    gpio1
+                                                    gpio2
+                                                    gpio3
+                                                    i2c
+                                                    groups
+                                                    pins
+                                                    i2s
+                                                    spi
+                                                    cs
+                                                    pinmux_pwm_pins
+                                                    pinmux_spi0_pins
+                                                    pinmux_uart0_pins
+                                                    pinmux_i2c0_pins
+                                                    pinmux_lcd_pins
+    pmc_sandbox               017 power-mgr            pci@1e,0
+    act8846 pmic              080 pmic                 <none>
+    max77686_pmic             080 pmic                 <none>
+    mc34708_pmic              080 pmic                 pmic@41
+    ...
+    wdt_gpio                  122 watchdog             gpio-wdt
+    wdt_sandbox               122 watchdog             wdt@0
+    =>
+
+
+dm mem
+~~~~~~
+
+This example shows the sandbox output::
+
+    > dm mem
+    Struct sizes: udevice b0, driver 80, uclass 30, uc_driver 78
+    Memory: device fe:aea0, device names a16, uclass 5e:11a0
+
+    Attached type    Count   Size    Cur   Tags   Save
+    ---------------  -----  -----  -----  -----  -----
+    plat                45    a8f   aea0   a7c4    6dc (1756)
+    parent_plat         1a    3b8   aea0   a718    788 (1928)
+    uclass_plat         3d    6b4   aea0   a7a4    6fc (1788)
+    priv                8a   68f3   aea0   a8d8    5c8 (1480)
+    parent_priv          8   38a0   aea0   a6d0    7d0 (2000)
+    uclass_priv         4e   14a6   aea0   a7e8    6b8 (1720)
+    driver_data          f      0   aea0   a6ec    7b4 (1972)
+    uclass               6     20
+    Attached total     191   cb54                  3164 (12644)
+    tags                 0      0
+
+    Total size: 18b94 (101268)
+
+    With tags:       15a30 (88624)
+    - singly-linked: 14260 (82528)
+    - driver index:  13b6e (80750)
+    - uclass index:  1347c (78972)
+    Drop device name (not SRAM): a16 (2582)
+    =>
+
+
+dm static
+~~~~~~~~~
+
+This example shows the sandbox output::
+
+    => dm static
+    Driver                    Address
+    ---------------------------------
+    demo_shape_drv            0000562edab8dca0
+    demo_simple_drv           0000562edab8dca0
+    demo_shape_drv            0000562edab8dc90
+    demo_simple_drv           0000562edab8dc80
+    demo_shape_drv            0000562edab8dc80
+    test_drv                  0000562edaae8840
+    test_drv                  0000562edaae8848
+    test_drv                  0000562edaae8850
+    sandbox_gpio              0000000000000000
+    mod_exp_sw                0000000000000000
+    sandbox_test_proc         0000562edabb5330
+    qfw_sandbox               0000000000000000
+    sandbox_timer             0000000000000000
+    sandbox_serial            0000562edaa8ed00
+    sysreset_sandbox          0000000000000000
+
+
+dm tree
+-------
+
+This example shows the abridged sandbox output::
+
+    => dm tree
+    Class     Index  Probed  Driver                Name
+    -----------------------------------------------------------
+    root          0  [ + ]   root_driver           root_driver
+    demo          0  [   ]   demo_shape_drv        |-- demo_shape_drv
+    demo          1  [   ]   demo_simple_drv       |-- demo_simple_drv
+    demo          2  [   ]   demo_shape_drv        |-- demo_shape_drv
+    demo          3  [   ]   demo_simple_drv       |-- demo_simple_drv
+    demo          4  [   ]   demo_shape_drv        |-- demo_shape_drv
+    test          0  [   ]   test_drv              |-- test_drv
+    test          1  [   ]   test_drv              |-- test_drv
+    test          2  [   ]   test_drv              |-- test_drv
+    ..
+    sysreset      0  [   ]   sysreset_sandbox      |-- sysreset_sandbox
+    bootstd       0  [   ]   bootstd_drv           |-- bootstd
+    bootmeth      0  [   ]   bootmeth_extlinux     |   |-- extlinux
+    bootmeth      1  [   ]   bootmeth_efi          |   `-- efi
+    reboot-mod    0  [   ]   reboot-mode-gpio      |-- reboot-mode0
+    reboot-mod    1  [   ]   reboot-mode-rtc       |-- reboot-mode@14
+    ...
+    ethernet      7  [ + ]   dsa-port              |   `-- lan1
+    pinctrl       0  [ + ]   sandbox_pinctrl_gpio  |-- pinctrl-gpio
+    gpio          1  [ + ]   sandbox_gpio          |   |-- base-gpios
+    nop           0  [ + ]   gpio_hog              |   |   |-- hog_input_active_low
+    nop           1  [ + ]   gpio_hog              |   |   |-- hog_input_active_high
+    nop           2  [ + ]   gpio_hog              |   |   |-- hog_output_low
+    nop           3  [ + ]   gpio_hog              |   |   `-- hog_output_high
+    gpio          2  [   ]   sandbox_gpio          |   |-- extra-gpios
+    gpio          3  [   ]   sandbox_gpio          |   `-- pinmux-gpios
+    i2c           0  [ + ]   sandbox_i2c           |-- i2c@0
+    i2c_eeprom    0  [   ]   i2c_eeprom            |   |-- eeprom@2c
+    i2c_eeprom    1  [   ]   i2c_eeprom_partition  |   |   `-- bootcount@10
+    rtc           0  [   ]   sandbox_rtc           |   |-- rtc@43
+    rtc           1  [ + ]   sandbox_rtc           |   |-- rtc@61
+    i2c_emul_p    0  [ + ]   sandbox_i2c_emul_par  |   |-- emul
+    i2c_emul      0  [   ]   sandbox_i2c_eeprom_e  |   |   |-- emul-eeprom
+    i2c_emul      1  [   ]   sandbox_i2c_rtc_emul  |   |   |-- emul0
+    i2c_emul      2  [ + ]   sandbox_i2c_rtc_emul  |   |   |-- emull
+    i2c_emul      3  [   ]   sandbox_i2c_pmic_emu  |   |   |-- pmic-emul0
+    i2c_emul      4  [   ]   sandbox_i2c_pmic_emu  |   |   `-- pmic-emul1
+    pmic          0  [   ]   sandbox_pmic          |   |-- sandbox_pmic
+    regulator     0  [   ]   sandbox_buck          |   |   |-- buck1
+    regulator     1  [   ]   sandbox_buck          |   |   |-- buck2
+    regulator     2  [   ]   sandbox_ldo           |   |   |-- ldo1
+    regulator     3  [   ]   sandbox_ldo           |   |   |-- ldo2
+    regulator     4  [   ]   sandbox_buck          |   |   `-- no_match_by_nodename
+    pmic          1  [   ]   mc34708_pmic          |   `-- pmic@41
+    bootcount     0  [ + ]   bootcount-rtc         |-- bootcount@0
+    bootcount     1  [   ]   bootcount-i2c-eeprom  |-- bootcount
+    ...
+    clk           4  [   ]   fixed_clock           |-- osc
+    firmware      0  [   ]   sandbox_firmware      |-- sandbox-firmware
+    scmi_agent    0  [   ]   sandbox-scmi_agent    `-- scmi
+    clk           5  [   ]   scmi_clk                  |-- protocol@14
+    reset         2  [   ]   scmi_reset_domain         |-- protocol@16
+    nop           8  [   ]   scmi_voltage_domain       `-- regulators
+    regulator     5  [   ]   scmi_regulator                |-- reg@0
+    regulator     6  [   ]   scmi_regulator                `-- reg@1
+    => dm tree pinc
+    pinctrl       0  [ + ]   sandbox_pinctrl_gpio  pinctrl-gpio
+    gpio          1  [ + ]   sandbox_gpio          |-- base-gpios
+    nop           0  [ + ]   gpio_hog              |   |-- hog_input_active_low
+    nop           1  [ + ]   gpio_hog              |   |-- hog_input_active_high
+    nop           2  [ + ]   gpio_hog              |   |-- hog_output_low
+    nop           3  [ + ]   gpio_hog              |   `-- hog_output_high
+    gpio          2  [   ]   sandbox_gpio          |-- extra-gpios
+    gpio          3  [   ]   sandbox_gpio          `-- pinmux-gpios
+    =>
+
+
+dm uclass
+~~~~~~~~~
+
+This example shows the abridged sandbox output::
+
+    => dm uclass
+    uclass 0: root
+    0   * root_driver @ 03015460, seq 0
+
+    uclass 1: demo
+    0     demo_shape_drv @ 03015560, seq 0
+    1     demo_simple_drv @ 03015620, seq 1
+    2     demo_shape_drv @ 030156e0, seq 2
+    3     demo_simple_drv @ 030157a0, seq 3
+    4     demo_shape_drv @ 03015860, seq 4
+
+    uclass 2: test
+    0     test_drv @ 03015980, seq 0
+    1     test_drv @ 03015a60, seq 1
+    2     test_drv @ 03015b40, seq 2
+    ...
+    uclass 20: audio-codec
+    0     audio-codec @ 030168e0, seq 0
+
+    uclass 21: axi
+    0     adder @ 0301db60, seq 1
+    1     adder @ 0301dc40, seq 2
+    2     axi@0 @ 030217d0, seq 0
+
+    uclass 22: blk
+    0     mmc2.blk @ 0301ca00, seq 0
+    1     mmc1.blk @ 0301cee0, seq 1
+    2     mmc0.blk @ 0301d380, seq 2
+
+    uclass 23: bootcount
+    0   * bootcount@0 @ 0301b3f0, seq 0
+    1     bootcount @ 0301b4b0, seq 1
+    2     bootcount_4@0 @ 0301b570, seq 2
+    3     bootcount_2@0 @ 0301b630, seq 3
+
+    uclass 24: bootdev
+    0     mmc2.bootdev @ 0301cbb0, seq 0
+    1     mmc1.bootdev @ 0301d050, seq 1
+    2     mmc0.bootdev @ 0301d4f0, seq 2
+
+    ...
+    uclass 78: pinconfig
+    0     gpios @ 03022410, seq 0
+    1     gpio0 @ 030224d0, seq 1
+    2     gpio1 @ 03022590, seq 2
+    3     gpio2 @ 03022650, seq 3
+    4     gpio3 @ 03022710, seq 4
+    5     i2c @ 030227d0, seq 5
+    6     groups @ 03022890, seq 6
+    7     pins @ 03022950, seq 7
+    8     i2s @ 03022a10, seq 8
+    9     spi @ 03022ad0, seq 9
+    10    cs @ 03022b90, seq 10
+    11    pinmux_pwm_pins @ 03022e10, seq 11
+    12    pinmux_spi0_pins @ 03022ed0, seq 12
+    13    pinmux_uart0_pins @ 03022f90, seq 13
+    14  * pinmux_i2c0_pins @ 03023130, seq 14
+    15  * pinmux_lcd_pins @ 030231f0, seq 15
+
+    ...
+    uclass 119: virtio
+    0     sandbox_virtio1 @ 030220d0, seq 0
+    1     sandbox_virtio2 @ 03022190, seq 1
+
+    uclass 120: w1
+    uclass 121: w1_eeprom
+    uclass 122: watchdog
+    0   * gpio-wdt @ 0301c070, seq 0
+    1   * wdt@0 @ 03021710, seq 1
+
+    => dm uclass blk
+    uclass 22: blk
+    0     mmc2.blk @ 0301ca00, seq 0
+    1     mmc1.blk @ 0301cee0, seq 1
+    2     mmc0.blk @ 0301d380, seq 2
+
+    =>
diff --git a/doc/usage/cmd/ebtupdate.rst b/doc/usage/cmd/ebtupdate.rst
new file mode 100644
index 00000000000..22415ee07b4
--- /dev/null
+++ b/doc/usage/cmd/ebtupdate.rst
@@ -0,0 +1,72 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: ebtupdate (command)
+
+ebtupdate command
+=================
+
+Synopsis
+--------
+
+::
+
+    ebtupdate [<bct> [<ebt>] [<size>]]
+
+Description
+-----------
+
+The "ebtupdate" command is used to self-update bootloader on Tegra 2 and Tegra 3
+production devices which were processed using re-cryption.
+
+The "ebtupdate" performs encryption of new bootloader and decryption, patching
+and re-encryption of BCT "in situ". After BCT and bootloader can be written in
+their respective places.
+
+bct
+    address of BCT block pre-loaded into RAM.
+
+ebt
+    address of the bootloader pre-loaded into RAM.
+
+size
+    size of the pre-loaded bootloader.
+
+Example
+-------
+
+This is the boot log of a LG Optimus Vu:
+
+::
+
+    => mmc dev 0 1
+    switch to partitions #1, OK
+    mmc0(part 1) is current device
+    => mmc read $kernel_addr_r 0 $boot_block_size
+    MMC read: dev # 0, block # 0, count 4096 ... 4096 blocks read: OK
+    => load mmc 0:1 $ramdisk_addr_r $bootloader_file
+    684783 bytes read in 44 ms (14.8 MiB/s)
+    => size mmc 0:1 $bootloader_file
+    => ebtupdate $kernel_addr_r $ramdisk_addr_r $filesize
+    => mmc dev 0 1
+    switch to partitions #1, OK
+    mmc0(part 1) is current device
+    => mmc write $kernel_addr_r 0 $boot_block_size
+    MMC write: dev # 0, block # 0, count 4096 ... 4096 blocks written: OK
+    => mmc dev 0 2
+    switch to partitions #2, OK
+    mmc0(part 2) is current device
+    => mmc write $ramdisk_addr_r 0 $boot_block_size
+    MMC write: dev # 0, block # 0, count 4096 ... 4096 blocks written: OK
+
+Configuration
+-------------
+
+The ebtupdate command is only available if CONFIG_CMD_EBTUPDATE=y and
+only on Tegra 2 and Tegra 3 configurations.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if everything went successfully. If an
+error occurs, the return value $? is set to 1 (false).
diff --git a/doc/usage/cmd/echo.rst b/doc/usage/cmd/echo.rst
new file mode 100644
index 00000000000..ebc9ff5f843
--- /dev/null
+++ b/doc/usage/cmd/echo.rst
@@ -0,0 +1,68 @@
+.. index::
+   single: echo (command)
+
+echo command
+============
+
+Synopsis
+--------
+
+::
+
+    echo [-n] [args ...]
+
+Description
+-----------
+
+The echo command prints its arguments to the console separated by spaces.
+
+-n
+    Do not print a line feed after the last argument.
+
+args
+    Arguments to be printed. The arguments are evaluated before being passed to
+    the command.
+
+Examples
+--------
+
+Strings are parsed before the arguments are passed to the echo command:
+
+::
+
+    => echo "a" 'b' c
+    a b c
+    =>
+
+Observe how variables included in strings are handled:
+
+::
+
+    => setenv var X; echo "a)" ${var} 'b)' '${var}' c) ${var}
+    a) X b) ${var} c) X
+    =>
+
+
+-n suppresses the line feed:
+
+::
+
+    => echo -n 1 2 3; echo a b c
+    1 2 3a b c
+    => echo -n 1 2 3
+    1 2 3=>
+
+A more complex example:
+
+::
+
+    => for i in a b c; do for j in 1 2 3; do echo -n "${i}${j}, "; done; echo; done;
+    a1, a2, a3,
+    b1, b2, b3,
+    c1, c2, c3,
+    =>
+
+Return value
+------------
+
+The return value $? is always set to 0 (true).
diff --git a/doc/usage/cmd/efi.rst b/doc/usage/cmd/efi.rst
new file mode 100644
index 00000000000..b19d36188a9
--- /dev/null
+++ b/doc/usage/cmd/efi.rst
@@ -0,0 +1,222 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2020, Heinrich Schuchardt <xypron.glpk@gmx.de>
+
+.. index::
+   single: efi (command)
+
+efi command
+===========
+
+Synopsis
+--------
+
+::
+
+    efi mem [all]
+    efi tables
+
+Description
+-----------
+
+The *efi* command provides information about the EFI environment U-Boot is
+running in, when it is started from EFI.
+
+When running as an EFI app, this command queries EFI boot services for the
+information. When running as an EFI payload, EFI boot services have been
+stopped, so it uses the information collected by the boot stub before that
+happened.
+
+efi mem
+~~~~~~~
+
+This shows the EFI memory map, sorted in order of physical address.
+
+This is normally a very large table. To help reduce the amount of detritus,
+boot-time memory is normally merged with conventional memory. Use the 'all'
+argument to show everything.
+
+The fields are as follows:
+
+#
+    Entry number (sequentially from 0)
+
+Type
+    Memory type. EFI has a large number of memory types. The type is shown in
+    the format <n>:<name> where in is the format number in hex and <name> is the
+    name.
+
+Physical
+    Physical address
+
+Virtual
+    Virtual address
+
+Size
+    Size of memory area in bytes
+
+Attributes
+    Shows a code for memory attributes. The key for this is shown below the
+    table.
+
+efi tables
+~~~~~~~~~~
+
+This shows a list of the EFI tables provided in the system table. These use
+GUIDs so it is not possible in general to show the name of a table. But some
+effort is made to provide a useful table, where the GUID is known by U-Boot.
+
+
+Example
+-------
+
+::
+
+    => efi mem
+    EFI table at 0, memory map 000000001ad38b60, size 1260, key a79, version 1, descr. size 0x30
+     #  Type              Physical     Virtual        Size  Attributes
+     0  7:conv          0000000000  0000000000  00000a0000  f
+        <gap>           00000a0000              0000060000
+     1  7:conv          0000100000  0000000000  0000700000  f
+     2  a:acpi_nvs      0000800000  0000000000  0000008000  f
+     3  7:conv          0000808000  0000000000  0000008000  f
+     4  a:acpi_nvs      0000810000  0000000000  00000f0000  f
+     5  7:conv          0000900000  0000000000  001efef000  f
+     6  6:rt_data       001f8ef000  0000000000  0000100000  rf
+     7  5:rt_code       001f9ef000  0000000000  0000100000  rf
+     8  0:reserved      001faef000  0000000000  0000080000  f
+     9  9:acpi_reclaim  001fb6f000  0000000000  0000010000  f
+    10  a:acpi_nvs      001fb7f000  0000000000  0000080000  f
+    11  7:conv          001fbff000  0000000000  0000359000  f
+    12  6:rt_data       001ff58000  0000000000  0000020000  rf
+    13  a:acpi_nvs      001ff78000  0000000000  0000088000  f
+        <gap>           0020000000              0090000000
+    14  0:reserved      00b0000000  0000000000  0010000000  1
+
+    Attributes key:
+     f: uncached, write-coalescing, write-through, write-back
+    rf: uncached, write-coalescing, write-through, write-back, needs runtime mapping
+     1: uncached
+    *Some areas are merged (use 'all' to see)
+
+
+    => efi mem  all
+    EFI table at 0, memory map 000000001ad38bb0, size 1260, key a79, version 1, descr. size 0x30
+     #  Type              Physical     Virtual        Size  Attributes
+     0  3:bs_code       0000000000  0000000000  0000001000  f
+     1  7:conv          0000001000  0000000000  000009f000  f
+        <gap>           00000a0000              0000060000
+     2  7:conv          0000100000  0000000000  0000700000  f
+     3  a:acpi_nvs      0000800000  0000000000  0000008000  f
+     4  7:conv          0000808000  0000000000  0000008000  f
+     5  a:acpi_nvs      0000810000  0000000000  00000f0000  f
+     6  4:bs_data       0000900000  0000000000  0000c00000  f
+     7  7:conv          0001500000  0000000000  000aa36000  f
+     8  2:loader_data   000bf36000  0000000000  0010000000  f
+     9  4:bs_data       001bf36000  0000000000  0000020000  f
+    10  7:conv          001bf56000  0000000000  00021e1000  f
+    11  1:loader_code   001e137000  0000000000  00000c4000  f
+    12  7:conv          001e1fb000  0000000000  000009b000  f
+    13  1:loader_code   001e296000  0000000000  00000e2000  f
+    14  7:conv          001e378000  0000000000  000005b000  f
+    15  4:bs_data       001e3d3000  0000000000  000001e000  f
+    16  7:conv          001e3f1000  0000000000  0000016000  f
+    17  4:bs_data       001e407000  0000000000  0000016000  f
+    18  2:loader_data   001e41d000  0000000000  0000002000  f
+    19  4:bs_data       001e41f000  0000000000  0000828000  f
+    20  3:bs_code       001ec47000  0000000000  0000045000  f
+    21  4:bs_data       001ec8c000  0000000000  0000001000  f
+    22  3:bs_code       001ec8d000  0000000000  000000e000  f
+    23  4:bs_data       001ec9b000  0000000000  0000001000  f
+    24  3:bs_code       001ec9c000  0000000000  000002c000  f
+    25  4:bs_data       001ecc8000  0000000000  0000001000  f
+    26  3:bs_code       001ecc9000  0000000000  000000c000  f
+    27  4:bs_data       001ecd5000  0000000000  0000006000  f
+    28  3:bs_code       001ecdb000  0000000000  0000014000  f
+    29  4:bs_data       001ecef000  0000000000  0000001000  f
+    30  3:bs_code       001ecf0000  0000000000  000005b000  f
+    31  4:bs_data       001ed4b000  0000000000  000000b000  f
+    32  3:bs_code       001ed56000  0000000000  0000024000  f
+    33  4:bs_data       001ed7a000  0000000000  0000006000  f
+    34  3:bs_code       001ed80000  0000000000  0000010000  f
+    35  4:bs_data       001ed90000  0000000000  0000002000  f
+    36  3:bs_code       001ed92000  0000000000  0000025000  f
+    37  4:bs_data       001edb7000  0000000000  0000003000  f
+    38  3:bs_code       001edba000  0000000000  0000011000  f
+    39  4:bs_data       001edcb000  0000000000  0000008000  f
+    40  3:bs_code       001edd3000  0000000000  000002d000  f
+    41  4:bs_data       001ee00000  0000000000  0000201000  f
+    42  3:bs_code       001f001000  0000000000  0000024000  f
+    43  4:bs_data       001f025000  0000000000  0000002000  f
+    44  3:bs_code       001f027000  0000000000  0000009000  f
+    45  4:bs_data       001f030000  0000000000  0000005000  f
+    46  3:bs_code       001f035000  0000000000  000002f000  f
+    47  4:bs_data       001f064000  0000000000  0000001000  f
+    48  3:bs_code       001f065000  0000000000  0000005000  f
+    49  4:bs_data       001f06a000  0000000000  0000005000  f
+    50  3:bs_code       001f06f000  0000000000  0000007000  f
+    51  4:bs_data       001f076000  0000000000  0000007000  f
+    52  3:bs_code       001f07d000  0000000000  000000d000  f
+    53  4:bs_data       001f08a000  0000000000  0000001000  f
+    54  3:bs_code       001f08b000  0000000000  0000006000  f
+    55  4:bs_data       001f091000  0000000000  0000004000  f
+    56  3:bs_code       001f095000  0000000000  000000d000  f
+    57  4:bs_data       001f0a2000  0000000000  0000003000  f
+    58  3:bs_code       001f0a5000  0000000000  0000026000  f
+    59  4:bs_data       001f0cb000  0000000000  0000005000  f
+    60  3:bs_code       001f0d0000  0000000000  0000019000  f
+    61  4:bs_data       001f0e9000  0000000000  0000004000  f
+    62  3:bs_code       001f0ed000  0000000000  0000024000  f
+    63  4:bs_data       001f111000  0000000000  0000008000  f
+    64  3:bs_code       001f119000  0000000000  000000b000  f
+    65  4:bs_data       001f124000  0000000000  0000001000  f
+    66  3:bs_code       001f125000  0000000000  0000002000  f
+    67  4:bs_data       001f127000  0000000000  0000002000  f
+    68  3:bs_code       001f129000  0000000000  0000009000  f
+    69  4:bs_data       001f132000  0000000000  0000003000  f
+    70  3:bs_code       001f135000  0000000000  0000005000  f
+    71  4:bs_data       001f13a000  0000000000  0000003000  f
+    72  3:bs_code       001f13d000  0000000000  0000005000  f
+    73  4:bs_data       001f142000  0000000000  0000003000  f
+    74  3:bs_code       001f145000  0000000000  0000011000  f
+    75  4:bs_data       001f156000  0000000000  000000b000  f
+    76  3:bs_code       001f161000  0000000000  0000009000  f
+    77  4:bs_data       001f16a000  0000000000  0000400000  f
+    78  3:bs_code       001f56a000  0000000000  0000006000  f
+    79  4:bs_data       001f570000  0000000000  0000001000  f
+    80  3:bs_code       001f571000  0000000000  0000001000  f
+    81  4:bs_data       001f572000  0000000000  0000002000  f
+    82  3:bs_code       001f574000  0000000000  0000017000  f
+    83  4:bs_data       001f58b000  0000000000  0000364000  f
+    84  6:rt_data       001f8ef000  0000000000  0000100000  rf
+    85  5:rt_code       001f9ef000  0000000000  0000100000  rf
+    86  0:reserved      001faef000  0000000000  0000080000  f
+    87  9:acpi_reclaim  001fb6f000  0000000000  0000010000  f
+    88  a:acpi_nvs      001fb7f000  0000000000  0000080000  f
+    89  4:bs_data       001fbff000  0000000000  0000201000  f
+    90  7:conv          001fe00000  0000000000  00000e8000  f
+    91  4:bs_data       001fee8000  0000000000  0000020000  f
+    92  3:bs_code       001ff08000  0000000000  0000026000  f
+    93  4:bs_data       001ff2e000  0000000000  0000009000  f
+    94  3:bs_code       001ff37000  0000000000  0000021000  f
+    95  6:rt_data       001ff58000  0000000000  0000020000  rf
+    96  a:acpi_nvs      001ff78000  0000000000  0000088000  f
+        <gap>           0020000000              0090000000
+    97  0:reserved      00b0000000  0000000000  0010000000  1
+
+    Attributes key:
+     f: uncached, write-coalescing, write-through, write-back
+    rf: uncached, write-coalescing, write-through, write-back, needs runtime mapping
+     1: uncached
+
+
+    => efi tables
+    000000001f8edf98  ee4e5898-3914-4259-9d6e-dc7bd79403cf  EFI_LZMA_COMPRESSED
+    000000001ff2ace0  05ad34ba-6f02-4214-952e-4da0398e2bb9  EFI_DXE_SERVICES
+    000000001f8ea018  7739f24c-93d7-11d4-9a3a-0090273fc14d  EFI_HOB_LIST
+    000000001ff2bac0  4c19049f-4137-4dd3-9c10-8b97a83ffdfa  EFI_MEMORY_TYPE
+    000000001ff2cb10  49152e77-1ada-4764-b7a2-7afefed95e8b  (unknown)
+    000000001f9ac018  060cc026-4c0d-4dda-8f41-595fef00a502  EFI_MEM_STATUS_CODE_REC
+    000000001f9ab000  eb9d2d31-2d88-11d3-9a16-0090273fc14d  SMBIOS table
+    000000001fb7e000  eb9d2d30-2d88-11d3-9a16-0090273fc14d  EFI_GUID_EFI_ACPI1
+    000000001fb7e014  8868e871-e4f1-11d3-bc22-0080c73c8881  ACPI table
+    000000001e654018  dcfa911d-26eb-469f-a220-38b7dc461220  (unknown)
diff --git a/doc/usage/cmd/eficonfig.rst b/doc/usage/cmd/eficonfig.rst
new file mode 100644
index 00000000000..83a3ebf4f0b
--- /dev/null
+++ b/doc/usage/cmd/eficonfig.rst
@@ -0,0 +1,106 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. (C) Copyright 2022, Masahisa Kojima <masahisa.kojima@linaro.org>
+
+.. index::
+   single: eficonfig (command)
+
+eficonfig command
+=================
+
+Synopsis
+--------
+::
+
+    eficonfig
+
+Description
+-----------
+
+The "eficonfig" command uses the U-Boot menu interface to provide a
+menu-driven UEFI variable maintenance feature. These are the top level menu
+entries:
+
+Add Boot Option
+    Add a new UEFI Boot Option.
+    The user can edit description, file path, and optional_data.
+    The new boot opiton is appended to the boot order in the *BootOrder*
+    variable. The user may want to update the boot order using the
+    *Change Boot Order* menu entry.
+
+Edit Boot Option
+    Edit an existing UEFI Boot Option.
+    The User can edit description, file path, and optional_data.
+
+Change Boot Order
+    Change the boot order updating the UEFI BootOrder variable.
+
+Delete Boot Option
+    Delete a UEFI Boot Option
+
+Secure Boot Configuration
+    Edit the UEFI Secure Boot Configuration
+
+How to boot the system with a newly added UEFI Boot Option
+''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
+
+The "eficonfig" command is used to set the UEFI boot options which are stored
+in the UEFI variable Boot#### where #### is a hexadecimal number.
+
+The command *bootefi bootmgr* can be used to boot by trying in sequence all
+boot options selected by the variable *BootOrder*.
+
+If the bootmenu is enabled, CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is enabled,
+and "eficonfig" is configured as preboot command, the newly added Boot Options
+are enumerated in the bootmenu when the user exits from the eficonfig menu.
+The user may select the entry in the bootmenu to boot the system, or follow
+the U-Boot configuration the system already has.
+
+Auto boot with the UEFI Boot Option
+'''''''''''''''''''''''''''''''''''
+
+To do auto boot according to the UEFI BootOrder variable,
+add "bootefi bootmgr" entry as a default or first bootmenu entry::
+
+    CONFIG_PREBOOT="setenv bootmenu_0 UEFI Boot Manager=bootefi bootmgr; setenv bootmenu_1 UEFI Maintenance Menu=eficonfig"
+
+UEFI Secure Boot Configuration
+''''''''''''''''''''''''''''''
+
+The user can enroll the variables PK, KEK, db and dbx by selecting a file.
+The "eficonfig" command only accepts signed EFI Signature List(s) with an
+authenticated header, typically a ".auth" file.
+
+To clear the PK, KEK, db and dbx, the user needs to enroll a null value
+signed by PK or KEK.
+
+Configuration
+-------------
+
+The "eficonfig" command is enabled by::
+
+    CONFIG_CMD_EFICONFIG=y
+
+If CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE is enabled, the user can not enter
+U-Boot console. In this case, the bootmenu can be used to invoke "eficonfig"::
+
+    CONFIG_USE_PREBOOT=y
+    CONFIG_PREBOOT="setenv bootmenu_0 UEFI Maintenance Menu=eficonfig"
+
+The only way U-Boot can currently store EFI variables on a tamper
+resistant medium is via OP-TEE. The Kconfig option that enables that is::
+
+    CONFIG_EFI_MM_COMM_TEE=y.
+
+It enables storing EFI variables on the RPMB partition of an eMMC device.
+
+The UEFI Secure Boot Configuration menu entry is only available if the following
+options are enabled::
+
+    CONFIG_EFI_SECURE_BOOT=y
+    CONFIG_EFI_MM_COMM_TEE=y
+
+See also
+--------
+
+* :doc:`bootmenu<bootmenu>` provides a simple mechanism for creating menus with
+  different boot items
diff --git a/doc/usage/cmd/env.rst b/doc/usage/cmd/env.rst
new file mode 100644
index 00000000000..9629f97ffc4
--- /dev/null
+++ b/doc/usage/cmd/env.rst
@@ -0,0 +1,389 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later:
+
+.. index::
+   single: env (command)
+
+env command
+===========
+
+Synopsis
+--------
+
+::
+
+	env ask name [message] [size]
+	env callbacks
+	env default [-f] (-a | var [...])
+	env delete [-f] var [...]
+	env edit name
+	env erase
+	env exists name
+	env export [-t | -b | -c] [-s size] addr [var ...]
+	env flags
+	env grep [-e] [-n | -v | -b] string [...]
+	env import [-d] [-t [-r] | -b | -c] addr [size] [var ...]
+	env info [-d] [-p] [-q]
+	env load
+	env print [-a | name ...]
+	env print -e [-guid guid] [-n] [name ...]
+	env run var [...]
+	env save
+	env select [target]
+	env set [-f] name [value]
+	env set -e [-nv][-bs][-rt][-at][-a][-i addr:size][-v] name [value]
+
+Description
+-----------
+
+The *env* commands is used to handle the U-Boot (:doc:`../environment`) or
+the UEFI variables.
+
+The next commands are kept as alias and for compatibility:
+
++ :doc:`askenv <askenv>` = *env ask*
++ *editenv* = *env edit*
++ *grepenv* = *env grep*
++ :doc:`printenv <printenv>` = *env print*
++ *run* = *env run*
++ *setenv* = *env set*
+
+Ask
+~~~
+
+The *env ask* command asks for the new value of an environment variable
+(alias :doc:`askenv`).
+
+    name
+        name of the environment variable.
+
+    message
+        message to be displayed while the command waits for the value to be
+        entered from stdin. If no message is specified, a default message
+        "Please enter name:" will be displayed.
+
+    size
+        maximum number of characters that will be stored in the environment
+        variable name. This is in decimal number format (unlike in
+        other commands where size values are hexa-decimal). The default
+        value of size is 1023 (CONFIG_SYS_CBSIZE - 1).
+
+Callbacks
+~~~~~~~~~
+
+The *env callbacks* command prints callbacks and their associated variables.
+
+Default
+~~~~~~~
+
+The *env default* command resets the selected variables in the U-Boot
+environment to their default values.
+
+    var
+        list of variable name.
+    \-a
+        all U-Boot environment.
+    \-f
+        forcibly, overwrite read-only/write-once variables.
+
+Delete
+~~~~~~
+
+The *env delete* command deletes the selected variables from the U-Boot
+environment.
+
+    var
+        name of the variable to delete.
+    \-f
+        forcibly, overwrite read-only/write-once variables.
+
+Edit
+~~~~
+
+The *env edit* command edits an environment variable.
+
+    name
+        name of the variable.
+
+Erase
+~~~~~
+
+The *env erase* command erases the U-Boot environment.
+
+Exists
+~~~~~~
+
+The *env exists* command tests for existence of variable.
+
+    name
+        name of the variable.
+
+Export
+~~~~~~
+
+The *env export* command exports the U-Boot environment in memory; on success,
+the variable $filesize will be set.
+
+    addr
+        memory address where environment gets stored.
+    var
+        list of variable names that get included into the export.
+        Without arguments, the whole environment gets exported.
+    \-b
+        export as binary format (name=value pairs separated by
+        list end marked by double "\0\0").
+    \-t
+        export as text format; if size is given, data will be
+        padded with '\0' bytes; if not, one terminating '\0'
+        will be added.
+    \-c
+        Export as checksum protected environment format as used by
+        'env save' command.
+    \-s size
+        size of output buffer.
+
+Flags
+~~~~~
+
+The *env flags* command prints variables that have non-default flags.
+
+Grep
+~~~~
+
+The *env grep* command searches environment, list environment name=value pairs
+matching the requested 'string'.
+
+    string
+        string to search in U-Boot environment.
+    \-e
+        enable regular expressions.
+    \-n
+        search string in variable names.
+    \-v
+        search string in vairable values.
+    \-b
+        search both names and values (default).
+
+Import
+~~~~~~
+
+The *env import* command imports environment from memory.
+
+    addr
+        memory address to read from.
+    size
+        length of input data; if missing, proper '\0' termination is mandatory
+        if var is set and size should be missing (i.e. '\0' termination),
+        set size to '-'.
+    var
+        List of the names of the only variables that get imported from
+        the environment at address 'addr'. Without arguments, the whole
+        environment gets imported.
+    \-d
+        delete existing environment before importing if no var is passed;
+        if vars are passed, if one var is in the current environment but not
+        in the environment at addr, delete var from current environment;
+        otherwise overwrite / append to existing definitions.
+    \-t
+        assume text format; either "size" must be given or the text data must
+        be '\0' terminated.
+    \-r
+        handle CRLF like LF, that means exported variables with a content which
+        ends with \r won't get imported. Used to import text files created with
+        editors which are using CRLF for line endings.
+        Only effective in addition to -t.
+    \-b
+        assume binary format ('\0' separated, "\0\0" terminated).
+    \-c
+        assume checksum protected environment format.
+
+Info
+~~~~
+
+The *env info* command displays (without argument) or evaluates the U-Boot
+environment information.
+
+    \-d
+        evaluate if the default environment is used.
+    \-p
+        evaluate if environment can be persisted.
+    \-q
+        quiet output,  use only for command result, by example with
+        'test' command.
+
+Load
+~~~~
+
+The *env load* command loads the U-Boot environment from persistent storage.
+
+Print
+~~~~~
+
+The *env print* command prints the selected variables in U-Boot environment or
+in UEFI variables.
+
+    name
+        list of variable name.
+    \-a
+        all U-Boot environment, when 'name' is absent.
+    \-e
+        print UEFI variables, all by default if 'name' is not provided.
+    \-guid guid
+        print only the UEFI variables matching this GUID (any by default)
+        with guid format = "xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx".
+    \-n
+         suppress dumping variable's value for UEFI.
+
+Run
+~~~
+
+The *env run* command runs commands in an environment variable.
+
+    var
+        name of the variable.
+
+Save
+~~~~
+
+The *env save* command saves the U-Boot environment in persistent storage.
+
+Select
+~~~~~~
+
+The *env select* command selects an U-Boot environment target, it is useful to
+overid the default location when several U-Boot environment backend are
+availables.
+
+    target
+        name of the U-Boot environment backend to select: EEPROM, EXT4, FAT,
+        Flash, MMC, NAND, nowhere, NVRAM, OneNAND, Remote, SATA, SPIFlash, UBI.
+
+
+Set
+~~~
+
+The *env set* command sets or delete (when 'value' or '-i' are absent)
+U-Boot variable in environment or UEFI variables (when -e is specified).
+
+    name
+        variable name to modify.
+    value
+        when present, set the environment variable 'name' to 'value'
+        when absent, delete the environment variable 'name'.
+    \-f
+        forcibly, overwrite read-only/write-once U-Boot variables.
+    \-e
+        update UEFI variables.
+    \-nv
+        set non-volatile attribute (UEFI).
+    \-bs
+        set boot-service attribute (UEFI).
+    \-rt
+        set runtime attribute (UEFI).
+    \-at
+        set time-based authentication attribute (UEFI).
+    \-a
+        append-write (UEFI).
+    \-i addr:size
+        use <addr,size> as variable's value (UEFI).
+    \-v
+        verbose message (UEFI).
+
+Example
+-------
+
+Print the U-Boot environment variables::
+
+    => env print -a
+    => env print bootcmd stdout
+
+Update environment variable in memory::
+
+    => env set bootcmd "run distro_bootcmd"
+    => env set stdout "serial,vidconsole"
+
+Delete environment variable in memory::
+
+    => env delete bootcmd
+    => env set bootcmd
+
+Reset environment variable to default value, in memory::
+
+    => env default bootcmd
+    => env default -a
+
+Save current environment in persistent storage::
+
+    => env save
+
+Restore the default environment in persistent storage::
+
+    => env erase
+
+Create a text snapshot/backup of the current settings in RAM
+(${filesize} can be use to save the snapshot in file)::
+
+    => env export -t ${backup_addr}
+
+Re-import this snapshot, deleting all other settings::
+
+    => env import -d -t ${backup_addr}
+
+Save environment if default enviromnent is used and persistent storage is
+selected::
+
+    => if env info -p -d -q; then env save; fi
+
+Configuration
+-------------
+
+The env command is always available but some sub-commands depend on
+configuration options:
+
+ask
+    CONFIG_CMD_ASKENV
+
+callback
+    CONFIG_CMD_ENV_CALLBACK
+
+edit
+    CONFIG_CMD_EDITENV
+
+exists
+    CONFIG_CMD_ENV_EXISTS
+
+erase
+    CONFIG_CMD_ERASEENV
+
+export
+    CONFIG_CMD_EXPORTENV
+
+flags
+    CONFIG_CMD_ENV_FLAGS
+
+grep
+    CONFIG_CMD_GREPENV, CONFIG_REGEX for '-e' option
+
+import
+    CONFIG_CMD_IMPORTENV
+
+info
+    CONFIG_CMD_NVEDIT_INFO
+
+load
+    CONFIG_CMD_NVEDIT_LOAD
+
+print
+    CONFIG_CMD_NVEDIT_EFI for UEFI variables support ('-e' option),
+    additionally CONFIG_HEXDUMP to display content of UEFI variables
+
+run
+    CONFIG_CMD_RUN
+
+save
+    CONFIG_CMD_SAVEENV
+
+select
+    CONFIG_CMD_NVEDIT_SELECT
+
+set
+    CONFIG_CMD_NVEDIT_EFI for UEFI variables support ('-e' option)
diff --git a/doc/usage/cmd/event.rst b/doc/usage/cmd/event.rst
new file mode 100644
index 00000000000..5c5e3043733
--- /dev/null
+++ b/doc/usage/cmd/event.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: event (command)
+
+event command
+=============
+
+Synopsis
+--------
+
+::
+
+    event list
+
+Description
+-----------
+
+The event command provides spy list.
+
+This shows the following information:
+
+Seq
+    Sequence number of the spy, numbered from 0
+
+Type
+    Type of the spy, both as a number and a label. If `CONFIG_EVENT_DEBUG` is
+    not enabled, the label just shows `(unknown)`.
+
+Function
+    Address of the function to call
+
+ID
+    ID string for this event, if `CONFIG_EVENT_DEBUG` is enabled. Otherwise this
+    just shows `?`.
+
+
+See :doc:`../../develop/event` for more information on events.
+
+Example
+-------
+
+::
+
+    => event list
+    Seq  Type                              Function  ID
+      0  7   misc_init_f               55a070517c68  ?
+
+Configuration
+-------------
+
+The event command is only available if CONFIG_CMD_EVENT=y.
diff --git a/doc/usage/cmd/exception.rst b/doc/usage/cmd/exception.rst
new file mode 100644
index 00000000000..9cb492d6049
--- /dev/null
+++ b/doc/usage/cmd/exception.rst
@@ -0,0 +1,69 @@
+.. index::
+   single: exception (command)
+
+exception command
+=================
+
+Synopsis
+--------
+
+::
+
+    exception <type>
+
+Description
+-----------
+
+The exception command is used to test the handling of exceptions like undefined
+instructions, segmentation faults or alignment faults.
+
+type
+  type of exception to be generated. The available types are architecture
+  dependent. Use 'help exception' to determine which are available.
+
+  **ARM:**
+
+  breakpoint
+    prefetch abort
+
+  unaligned
+    data abort
+
+  undefined
+    undefined instruction
+
+  **RISC-V:**
+
+  ebreak
+    breakpoint exception
+
+  unaligned
+    load address misaligned
+
+  undefined
+    undefined instruction
+
+  **Sandbox:**
+
+  sigsegv
+    illegal memory access
+
+  undefined
+    undefined instruction
+
+  **x86:**
+
+  undefined
+    undefined instruction
+
+Examples
+--------
+
+::
+
+    => exception undefined
+
+    Illegal instruction
+    pc = 0x56076dd1a0f9, pc_reloc = 0x540f9
+
+    resetting ...
diff --git a/doc/usage/cmd/exit.rst b/doc/usage/cmd/exit.rst
new file mode 100644
index 00000000000..2f250bf4bde
--- /dev/null
+++ b/doc/usage/cmd/exit.rst
@@ -0,0 +1,45 @@
+.. index::
+   single: exit (command)
+
+exit command
+============
+
+Synopsis
+--------
+
+::
+
+    exit
+
+Description
+-----------
+
+The exit command terminates a script started via the run or source command.
+If scripts are nested, only the innermost script is left.
+
+::
+
+    => setenv inner 'echo entry inner; exit; echo inner done'
+    => setenv outer 'echo entry outer; run inner; echo outer done'
+    => run outer
+    entry outer
+    entry inner
+    outer done
+    =>
+
+When executed outside a script a warning is written. Following commands are not
+executed.
+
+::
+
+    => echo first; exit; echo last
+    first
+    exit not allowed from main input shell.
+    =>
+
+Return value
+------------
+
+$? is default set to 0 (true). In case zero or positive integer parameter
+is passed to the command, the return value is the parameter value. In case
+negative integer parameter is passed to the command, the return value is 0.
diff --git a/doc/usage/cmd/extension.rst b/doc/usage/cmd/extension.rst
new file mode 100644
index 00000000000..4c261e74951
--- /dev/null
+++ b/doc/usage/cmd/extension.rst
@@ -0,0 +1,114 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2021, Kory Maincent <kory.maincent@bootlin.com>
+
+.. index::
+   single: extension (command)
+
+extension command
+=================
+
+Synopsis
+--------
+
+::
+
+    extension scan
+    extension list
+    extension apply <extension number|all>
+
+Description
+-----------
+
+The "extension" command proposes a generic U-Boot mechanism to detect
+extension boards connected to the HW platform, and apply the appropriate
+Device Tree overlays depending on the detected extension boards.
+
+The "extension" command comes with three sub-commands:
+
+ - "extension scan" makes the generic code call the board-specific
+   extension_board_scan() function to retrieve the list of detected
+   extension boards.
+
+ - "extension list" allows to list the detected extension boards.
+
+ - "extension apply <number>|all" allows to apply the Device Tree
+   overlay(s) corresponding to one, or all, extension boards
+
+The latter requires two environment variables to exist:
+
+ - extension_overlay_addr: the RAM address where to load the Device
+   Tree overlays
+
+ - extension_overlay_cmd: the U-Boot command to load one overlay.
+   Indeed, the location and mechanism to load DT overlays is very setup
+   specific.
+
+In order to enable this mechanism, board-specific code must implement
+the extension_board_scan() function that fills in a linked list of
+"struct extension", each describing one extension board. In addition,
+the board-specific code must select the SUPPORT_EXTENSION_SCAN Kconfig
+boolean.
+
+Usage example
+-------------
+
+1. Make sure your devicetree is loaded and set as the working fdt tree.
+
+::
+
+    => run loadfdt
+    => fdt addr $fdtaddr
+
+2. Prepare the environment variables
+
+::
+
+    => setenv extension_overlay_addr 0x88080000
+    => setenv extension_overlay_cmd 'load mmc 0:1 ${extension_overlay_addr} /boot/${extension_overlay_name}'
+
+3. Detect the plugged extension board
+
+::
+
+    => extension scan
+
+4. List the plugged extension board information and the devicetree
+   overlay name
+
+::
+
+    => extension list
+
+5. Apply the appropriate devicetree overlay
+
+For apply the selected overlay:
+
+::
+
+    => extension apply 0
+
+For apply all the overlays:
+
+::
+
+    => extension apply all
+
+Simple extension_board_scan function example
+--------------------------------------------
+
+.. code-block:: c
+
+    int extension_board_scan(struct list_head *extension_list)
+    {
+        struct extension *extension;
+
+        extension = calloc(1, sizeof(struct extension));
+        snprintf(extension->overlay, sizeof(extension->overlay), "overlay.dtbo");
+        snprintf(extension->name, sizeof(extension->name), "extension board");
+        snprintf(extension->owner, sizeof(extension->owner), "sandbox");
+        snprintf(extension->version, sizeof(extension->version), "1.1");
+        snprintf(extension->other, sizeof(extension->other), "Extension board information");
+        list_add_tail(&extension->list, extension_list);
+
+        return 1;
+    }
diff --git a/doc/usage/cmd/false.rst b/doc/usage/cmd/false.rst
new file mode 100644
index 00000000000..510377e22cd
--- /dev/null
+++ b/doc/usage/cmd/false.rst
@@ -0,0 +1,31 @@
+.. index::
+   single: false (command)
+
+false command
+=============
+
+Synopsis
+--------
+
+::
+
+    false
+
+Description
+-----------
+
+The false command sets the return value $? to 1 (false).
+
+Example
+-------
+
+::
+
+    => false; echo $?
+    1
+    =>
+
+Configuration
+-------------
+
+The false command is only available if CONFIG_HUSH_PARSER=y.
diff --git a/doc/usage/cmd/fatinfo.rst b/doc/usage/cmd/fatinfo.rst
new file mode 100644
index 00000000000..2e05ab8bece
--- /dev/null
+++ b/doc/usage/cmd/fatinfo.rst
@@ -0,0 +1,54 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: fatinfo (command)
+
+fatinfo command
+===============
+
+Synopsis
+--------
+
+::
+
+    fatinfo <interface> <dev[:part]>
+
+Description
+-----------
+
+The fatinfo command displays information about a FAT partition.
+
+interface
+    interface for accessing the block device (mmc, sata, scsi, usb, ....)
+
+dev
+    device number
+
+part
+    partition number, defaults to 1
+
+Example
+-------
+
+Here is the output for a partition on a 32 GB SD-Card:
+
+::
+
+    => fatinfo mmc 0:1
+    Interface:  MMC
+      Device 0: Vendor: Man 00001b Snr 97560602 Rev: 13.8 Prod: EB1QT0
+                Type: Removable Hard Disk
+                Capacity: 30528.0 MB = 29.8 GB (62521344 x 512)
+    Filesystem: FAT32 "MYDISK     "
+    =>
+
+Configuration
+-------------
+
+The fatinfo command is only available if CONFIG_CMD_FAT=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the partition is a FAT partition.
+Otherwise it is set to 1 (false).
diff --git a/doc/usage/cmd/fatload.rst b/doc/usage/cmd/fatload.rst
new file mode 100644
index 00000000000..6c048b7bdac
--- /dev/null
+++ b/doc/usage/cmd/fatload.rst
@@ -0,0 +1,83 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: fatload (command)
+
+fatload command
+===============
+
+Synopsis
+--------
+
+::
+
+    fatload <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]
+
+Description
+-----------
+
+The fatload command is used to read a file from a FAT filesystem into memory.
+You can always use the :doc:`load command <load>` instead.
+
+The number of transferred bytes is saved in the environment variable filesize.
+The load address is saved in the environment variable fileaddr.
+
+interface
+    interface for accessing the block device (mmc, sata, scsi, usb, ....)
+
+dev
+    device number
+
+part
+    partition number, defaults to 0 (whole device)
+
+addr
+    load address, defaults to environment variable loadaddr or if loadaddr is
+    not set to configuration variable CONFIG_SYS_LOAD_ADDR
+
+filename
+    path to file, defaults to environment variable bootfile
+
+bytes
+    maximum number of bytes to load
+
+pos
+    number of bytes to skip
+
+addr, bytes, pos are hexadecimal numbers.
+
+If either 'pos' or 'bytes' are not aligned according to the minimum alignment
+requirement for DMA transfer (ARCH_DMA_MINALIGN) additional buffering will be
+used, a misaligned buffer warning will be printed, and performance will suffer
+for the load.
+
+Example
+-------
+
+::
+
+    => fatload mmc 0:1 ${kernel_addr_r} snp.efi
+    149280 bytes read in 11 ms (12.9 MiB/s)
+    =>
+    => fatload mmc 0:1 ${kernel_addr_r} snp.efi 1000000
+    149280 bytes read in 9 ms (15.8 MiB/s)
+    =>
+    => fatload mmc 0:1 ${kernel_addr_r} snp.efi 1000000 100
+    149024 bytes read in 10 ms (14.2 MiB/s)
+    =>
+    => fatload mmc 0:1 ${kernel_addr_r} snp.efi 10
+    16 bytes read in 1 ms (15.6 KiB/s)
+    =>
+
+Configuration
+-------------
+
+The fatload command is only available if CONFIG_CMD_FAT=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the file was successfully loaded
+even if the number of bytes is less then the specified length.
+
+If an error occurs, the return value $? is set to 1 (false).
diff --git a/doc/usage/cmd/fdt.rst b/doc/usage/cmd/fdt.rst
new file mode 100644
index 00000000000..71a9fc627e5
--- /dev/null
+++ b/doc/usage/cmd/fdt.rst
@@ -0,0 +1,73 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: fdt (command)
+
+fdt command
+===========
+
+Synopsis
+--------
+
+::
+
+    fdt addr [-cq] [addr [len]]
+
+Description
+-----------
+
+The fdt command provides access to flat device tree blobs in memory. It has
+many subcommands, some of which are not documented here.
+
+Flags:
+
+-c
+    Select the control FDT (otherwise the working FDT is used).
+-q
+    Don't display errors
+
+The control FDT is the one used by U-Boot itself to control various features,
+including driver model. This should only be changed if you really know what you
+are doing, since once U-Boot starts it maintains pointers into the FDT from the
+various driver model data structures.
+
+The working FDT is the one passed to the Operating System when booting. This
+can be freely modified, so far as U-Boot is concerned, since it does not affect
+U-Boot's operation.
+
+fdt addr
+~~~~~~~~
+
+With no arguments, this shows the address of the current working or control
+FDT.
+
+If the `addr` argument is provided, then this sets the address of the working or
+control FDT to the provided address.
+
+If the `len` argument is provided, then the device tree is expanded to that
+size. This can be used to make space for more nodes and properties. It is
+assumed that there is enough space in memory for this expansion.
+
+Example
+-------
+
+Get the control address and copy that FDT to free memory::
+
+    => fdt addr -c
+    Control fdt: 0aff9fd0
+    => cp.b 0aff9fd0 10000 10000
+    => md 10000 4
+    00010000: edfe0dd0 5b3d0000 78000000 7c270000  ......=[...x..'|
+
+The second word shows the size of the FDT. Now set the working FDT to that
+address and expand it to 0xf000 in size::
+
+    => fdt addr 10000 f000
+    Working FDT set to 10000
+    => md 10000 4
+    00010000: edfe0dd0 00f00000 78000000 7c270000  ...........x..'|
+
+Return value
+------------
+
+The return value $? indicates whether the command succeeded.
diff --git a/doc/usage/cmd/font.rst b/doc/usage/cmd/font.rst
new file mode 100644
index 00000000000..a8782546333
--- /dev/null
+++ b/doc/usage/cmd/font.rst
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: font (command)
+
+font command
+============
+
+Synopsis
+--------
+
+::
+
+    font list
+    font select <name> [<size>]
+    font size <size>
+
+Description
+-----------
+
+The *font* command allows selection of the font to use on the video console.
+This is available when the TrueType console is in use.
+
+font list
+~~~~~~~~~
+
+This lists the available fonts, using the name of the font file in the build.
+
+font select
+~~~~~~~~~~~
+
+This selects a new font and optionally changes the size.
+
+font size
+~~~~~~~~~
+
+This changes the font size only.
+
+Examples
+--------
+
+::
+
+    => font list
+    nimbus_sans_l_regular
+    cantoraone_regular
+    => font size 40
+    => font select cantoraone_regular 20
+    =>
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CONSOLE_TRUETYPE=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) if the command completes.
+The return value is 1 (false) if the command fails.
diff --git a/doc/usage/cmd/for.rst b/doc/usage/cmd/for.rst
new file mode 100644
index 00000000000..729bd4db43c
--- /dev/null
+++ b/doc/usage/cmd/for.rst
@@ -0,0 +1,68 @@
+.. index::
+   single: for (command)
+
+for command
+===========
+
+Synopsis
+--------
+
+::
+
+    for <variable> in <items>; do <commands>; done
+
+Description
+-----------
+
+The for command is used to loop over a list of values and execute a series of
+commands for each of these.
+
+The counter variable of the loop is a shell variable. Please, keep in mind that
+an environment variable takes precedence over a shell variable of the same name.
+
+variable
+    name of the counter variable
+
+items
+    space separated item list
+
+commands
+    commands to execute
+
+Example
+-------
+
+::
+
+    => setenv c
+    => for c in 1 2 3; do echo item ${c}; done
+    item 1
+    item 2
+    item 3
+    => echo ${c}
+    3
+    => setenv c x
+    => for c in 1 2 3; do echo item ${c}; done
+    item x
+    item x
+    item x
+    =>
+
+The first line ensures that there is no environment variable *c*. Hence in the
+first loop the shell variable *c* is printed.
+
+After defining an environment variable of name *c* it takes precedence over the
+shell variable and the environment variable is printed.
+
+Return value
+------------
+
+The return value $? after the done statement is the return value of the last
+statement executed in the loop.
+
+::
+
+    => for i in true false; do ${i}; done; echo $?
+    1
+    => for i in false true; do ${i}; done; echo $?
+    0
diff --git a/doc/usage/cmd/fwu_mdata.rst b/doc/usage/cmd/fwu_mdata.rst
new file mode 100644
index 00000000000..f1bf08fde1d
--- /dev/null
+++ b/doc/usage/cmd/fwu_mdata.rst
@@ -0,0 +1,46 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: fwu_mdata_read (command)
+
+fwu_mdata_read command
+======================
+
+Synopsis
+--------
+
+::
+
+    fwu_mdata_read
+
+Description
+-----------
+
+The fwu_mdata_read command is used to read the FWU metadata
+structure. The command prints out information about the current active
+bank, the previous active bank, image GUIDs, image acceptance etc.
+
+The output may look like:
+
+::
+
+    => fwu_mdata_read
+            FWU Metadata
+    crc32: 0xec4fb997
+    version: 0x1
+    active_index: 0x0
+    previous_active_index: 0x1
+            Image Info
+
+    Image Type Guid: 19D5DF83-11B0-457B-BE2C-7559C13142A5
+    Location Guid: 49272BEB-8DD8-46DF-8D75-356C65EFF417
+    Image Guid:  D57428CC-BB9A-42E0-AA36-3F5A132059C7
+    Image Acceptance: yes
+    Image Guid:  2BE37D6D-8281-4938-BD7B-9A5BBF80869F
+    Image Acceptance: yes
+
+Configuration
+-------------
+
+To use the fwu_mdata_read command, CONFIG_CMD_FWU_METADATA needs to be
+enabled.
diff --git a/doc/usage/cmd/gpio.rst b/doc/usage/cmd/gpio.rst
new file mode 100644
index 00000000000..4b0dc2716e5
--- /dev/null
+++ b/doc/usage/cmd/gpio.rst
@@ -0,0 +1,135 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: gpio (command)
+
+gpio command
+============
+
+Synopsis
+--------
+
+::
+
+    gpio <input|set|clear|toggle> <pin>
+    gpio read <name> <pin>
+    gpio status [-a] [<bank>|<pin>]
+
+The gpio command is used to access General Purpose Inputs/Outputs.
+
+gpio input
+----------
+
+Switch the GPIO *pin* to input mode.
+
+gpio set
+--------
+
+Switch the GPIO *pin* to output mode and set the signal to 1.
+
+gpio clear
+----------
+
+Switch the GPIO *pin* to output mode and set the signal to 0.
+
+gpio toggle
+-----------
+
+Switch the GPIO *pin* to output mode and reverse the signal state.
+
+gpio read
+---------
+
+Read the signal state of the GPIO *pin* and save it in environment variable
+*name*.
+
+gpio status
+-----------
+
+Display the status of one or multiple GPIOs. By default only claimed GPIOs
+are displayed.
+gpio status command output fields are::
+
+    <name>: <function>: <value> [x] <label>
+
+*function* can take the following values:
+
+output
+    pin configured in gpio output, *value* indicates the pin's level
+
+input
+    pin configured in gpio input, *value* indicates the pin's level
+
+func
+    pin configured in alternate function, followed by *label*
+    which shows pinmuxing label.
+
+unused
+    pin not configured
+
+*[x]* or *[ ]* indicate respectively if the gpio is used or not.
+
+*label* shows the gpio label.
+
+Parameters
+----------
+
+-a
+    Display GPIOs irrespective of being claimed.
+
+bank
+    Name of a bank of GPIOs to be displayed.
+
+pin
+    Name of a single GPIO to be displayed or manipulated.
+
+Examples
+--------
+
+Switch the status of a GPIO::
+
+    => gpio set a5
+    gpio: pin a5 (gpio 133) value is 1
+    => gpio clear a5
+    gpio: pin a5 (gpio 133) value is 0
+    => gpio toggle a5
+    gpio: pin a5 (gpio 133) value is 1
+    => gpio read myvar a5
+    gpio: pin a5 (gpio 133) value is 1
+    => echo $myvar
+    1
+    => gpio toggle a5
+    gpio: pin a5 (gpio 133) value is 0
+    => gpio read myvar a5
+    gpio: pin a5 (gpio 133) value is 0
+    => echo $myvar
+    0
+
+Show the GPIO status::
+
+    => gpio status
+    Bank GPIOA:
+    GPIOA1: func rgmii-0
+    GPIOA2: func rgmii-0
+    GPIOA7: func rgmii-0
+    GPIOA10: output: 0 [x] hdmi-transmitter@39.reset-gpios
+    GPIOA13: output: 1 [x] red.gpios
+
+    Bank GPIOB:
+    GPIOB0: func rgmii-0
+    GPIOB1: func rgmii-0
+    GPIOB2: func uart4-0
+    GPIOB7: input: 0 [x] mmc@58005000.cd-gpios
+    GPIOB11: func rgmii-0
+
+Configuration
+-------------
+
+The *gpio* command is only available if CONFIG_CMD_GPIO=y.
+The *gpio read* command is only available if CONFIG_CMD_GPIO_READ=y.
+
+Return value
+------------
+
+If the command succeds the return value $? is set to 0. If an error occurs, the
+return value $? is set to 1.
diff --git a/doc/usage/cmd/gpt.rst b/doc/usage/cmd/gpt.rst
new file mode 100644
index 00000000000..8534f78cbac
--- /dev/null
+++ b/doc/usage/cmd/gpt.rst
@@ -0,0 +1,230 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: gpt (command)
+
+gpt command
+===========
+
+Synopsis
+--------
+
+::
+
+    gpt enumerate <interface> <dev>
+    gpt guid <interface> <dev> [<varname>]
+    gpt read <interface> <dev> [<varname>]
+    gpt rename <interface> <dev> <part> <name>
+    gpt repair <interface> <dev>
+    gpt set-bootable <interface> <dev> <partition list>
+    gpt setenv <interface> <dev> <partition name>
+    gpt swap <interface> <dev> <name1> <name2>
+    gpt transpose <interface> <dev> <part1> <part2>
+    gpt verify <interface> <dev> [<partition string>]
+    gpt write <interface> <dev> <partition string>
+
+Description
+-----------
+
+The gpt command lets users read, create, modify, or verify the GPT (GUID
+Partition Table) partition layout.
+
+Common arguments:
+
+interface
+    interface for accessing the block device (mmc, sata, scsi, usb, ....)
+
+dev
+    device number
+
+partition string
+    Describes the GPT partition layout for a disk.  The syntax is similar to
+    the one used by the :doc:`mbr command <mbr>` command. The string contains
+    one or more partition descriptors, each separated by a ";". Each descriptor
+    contains one or more fields, with each field separated by a ",". Fields are
+    either of the form "key=value" to set a specific value, or simple "flag" to
+    set a boolean flag
+
+    The first descriptor can optionally be used to describe parameters for the
+    whole disk with the following fields:
+
+    * uuid_disk=UUID - Set the UUID for the disk
+
+    Partition descriptors can have the following fields:
+
+    * name=<NAME> - The partition name, required
+    * start=<BYTES> - The partition start offset in bytes, required
+    * size=<BYTES> - The partition size in bytes or "-" to expand it to the whole free area
+    * bootable - Set the legacy bootable flag
+    * uuid=<UUID> - The partition UUID, optional if CONFIG_RANDOM_UUID=y is enabled
+    * type=<UUID> - The partition type GUID, requires CONFIG_PARTITION_TYPE_GUID=y
+
+
+    If 'uuid' is not specified, but CONFIG_RANDOM_UUID is enabled, a random UUID
+    will be generated for the partition
+
+gpt enumerate
+~~~~~~~~~~~~~
+
+Sets the variable 'gpt_partition_list' to be a list of all the partition names
+on the device.
+
+gpt guid
+~~~~~~~~
+
+Report the GUID of a disk. If 'varname' is specified, the command will set the
+variable to the GUID, otherwise it will be printed out.
+
+gpt read
+~~~~~~~~
+
+Prints the current state of the GPT partition table. If 'varname' is specified,
+the variable will be filled with a partition string in the same format as a
+'<partition string>', suitable for passing to other 'gpt' commands.  If the
+argument is omitted, a human readable description is printed out.
+CONFIG_CMD_GPT_RENAME=y is required.
+
+gpt rename
+~~~~~~~~~~
+
+Renames all partitions named 'part' to be 'name'. CONFIG_CMD_GPT_RENAME=y is
+required.
+
+gpt repair
+~~~~~~~~~~
+
+Repairs the GPT partition tables if it they become corrupted.
+
+gpt set-bootable
+~~~~~~~~~~~~~~~~
+
+Sets the bootable flag for all partitions in the table. If the partition name
+is in 'partition list' (separated by ','), the bootable flag is set, otherwise
+it is cleared. CONFIG_CMD_GPT_RENAME=y is required.
+
+gpt setenv
+~~~~~~~~~~
+
+The 'gpt setenv' command will set a series of environment variables with
+information about the partition named '<partition name>'. The variables are:
+
+gpt_partition_addr
+    the starting offset of the partition in blocks as a hexadecimal number
+
+gpt_partition_size
+    the size of the partition in blocks as a hexadecimal number
+
+gpt_partition_name
+    the name of the partition
+
+gpt_partition_entry
+    the partition number in the table, e.g. 1, 2, 3, etc.
+
+gpt_partition_bootable
+    1 if the partition is marked as bootable, 0 if not
+
+gpt swap
+~~~~~~~~
+
+Changes the names of all partitions that are named 'name1' to be 'name2', and
+all partitions named 'name2' to be 'name1'. CONFIG_CMD_GPT_RENAME=y is
+required.
+
+gpt transpose
+~~~~~~~~~~~~~
+
+Swaps the order of two partition table entries with indexes 'part1' and 'part2'
+in the partition table, but otherwise leaves the actual partition data
+untouched.
+
+gpt verify
+~~~~~~~~~~
+
+Sets return value $? to 0 (true) if the partition layout on the
+specified disk matches the one in the provided partition string, and 1 (false)
+if it does not match. If no partition string is specified, the command will
+check if the disk is partitioned or not.
+
+gpt write
+~~~~~~~~~
+
+(Re)writes the partition table on the disk to match the provided
+partition string. It returns 0 on success or 1 on failure.
+
+Configuration
+-------------
+
+To use the 'gpt' command you must specify CONFIG_CMD_GPT=y. To enable 'gpt
+read', 'gpt swap' and 'gpt rename', you must specify CONFIG_CMD_GPT_RENAME=y.
+
+Examples
+~~~~~~~~
+
+Create 6 partitions on a disk::
+
+    => setenv gpt_parts 'uuid_disk=bec9fc2a-86c1-483d-8a0e-0109732277d7;
+        name=boot,start=4M,size=128M,bootable,type=ebd0a0a2-b9e5-4433-87c0-68b6b72699c7,
+        name=rootfs,size=3072M,type=0fc63daf-8483-4772-8e79-3d69d8477de4;
+        name=system-data,size=512M,type=0fc63daf-8483-4772-8e79-3d69d8477de4;
+        name=[ext],size=-,type=0fc63daf-8483-4772-8e79-3d69d8477de4;
+        name=user,size=-,type=0fc63daf-8483-4772-8e79-3d69d8477de4;
+        name=modules,size=100M,type=0fc63daf-8483-4772-8e79-3d69d8477de4;
+        name=ramdisk,size=8M,type=0fc63daf-8483-4772-8e79-3d69d8477de4
+    => gpt write mmc 0 $gpt_parts
+
+
+Verify that the device matches the partition layout described in the variable
+$gpt_parts::
+
+    => gpt verify mmc 0 $gpt_parts
+
+
+Get the information about the partition named 'rootfs'::
+
+    => gpt setenv mmc 0 rootfs
+    => echo ${gpt_partition_addr}
+    2000
+    => echo ${gpt_partition_size}
+    14a000
+    => echo ${gpt_partition_name}
+    rootfs
+    => echo ${gpt_partition_entry}
+    2
+    => echo ${gpt_partition_bootable}
+    0
+
+Get the list of partition names on the disk::
+
+    => gpt enumerate
+    => echo ${gpt_partition_list}
+    boot rootfs system-data [ext] user modules ramdisk
+
+Get the GUID for a disk::
+
+    => gpt guid mmc 0
+    bec9fc2a-86c1-483d-8a0e-0109732277d7
+    => gpt guid mmc gpt_disk_uuid
+    => echo ${gpt_disk_uuid}
+    bec9fc2a-86c1-483d-8a0e-0109732277d7
+
+Set the bootable flag for the 'boot' partition and clear it for all others::
+
+    => gpt set-bootable mmc 0 boot
+
+Swap the order of the 'boot' and 'rootfs' partition table entries::
+
+    => gpt setenv mmc 0 rootfs
+    => echo ${gpt_partition_entry}
+    2
+    => gpt setenv mmc 0 boot
+    => echo ${gpt_partition_entry}
+    1
+
+    => gpt transpose mmc 0 1 2
+
+    => gpt setenv mmc 0 rootfs
+    => echo ${gpt_partition_entry}
+    1
+    => gpt setenv mmc 0 boot
+    => echo ${gpt_partition_entry}
+    2
diff --git a/doc/usage/cmd/history.rst b/doc/usage/cmd/history.rst
new file mode 100644
index 00000000000..b52b5b220ae
--- /dev/null
+++ b/doc/usage/cmd/history.rst
@@ -0,0 +1,70 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: history (command)
+
+history command
+===============
+
+Synopsis
+--------
+
+::
+
+    history
+
+Description
+-----------
+
+The *history* command shows a list of previously entered commands on the
+command line. When U-Boot starts, this it is initially empty. Each new command
+entered is added to the list.
+
+Normally these commands can be accessed by pressing the `up arrow` and
+`down arrow` keys, which cycle through the list. The `history` command provides
+a simple way to view the list.
+
+Example
+-------
+
+This example shows entering three commands, then `history`. Note that `history`
+itself is added to the list.
+
+::
+
+    => bootflow scan -l
+    Scanning for bootflows in all bootdevs
+    Seq  Method       State   Uclass    Part  Name                      Filename
+    ---  -----------  ------  --------  ----  ------------------------  ----------------
+    Scanning global bootmeth 'firmware0':
+    Hunting with: simple_bus
+    Found 2 extension board(s).
+    Scanning bootdev 'mmc2.bootdev':
+    Scanning bootdev 'mmc1.bootdev':
+      0  extlinux     ready   mmc          1  mmc1.bootdev.part_1       /extlinux/extlinux.conf
+    No more bootdevs
+    ---  -----------  ------  --------  ----  ------------------------  ----------------
+    (1 bootflow, 1 valid)
+    => bootflow select 0
+    => bootflow info
+    Name:      mmc1.bootdev.part_1
+    Device:    mmc1.bootdev
+    Block dev: mmc1.blk
+    Method:    extlinux
+    State:     ready
+    Partition: 1
+    Subdir:    (none)
+    Filename:  /extlinux/extlinux.conf
+    Buffer:    aebdea0
+    Size:      253 (595 bytes)
+    OS:        Fedora-Workstation-armhfp-31-1.9 (5.3.7-301.fc31.armv7hl)
+    Cmdline:   (none)
+    Logo:      (none)
+    FDT:       <NULL>
+    Error:     0
+    => history
+    bootflow scan -l
+    bootflow select 0
+    bootflow info
+    history
+    =>
diff --git a/doc/usage/cmd/host.rst b/doc/usage/cmd/host.rst
new file mode 100644
index 00000000000..a70a432b6f2
--- /dev/null
+++ b/doc/usage/cmd/host.rst
@@ -0,0 +1,119 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: host (command)
+
+host command
+============
+
+Synopsis
+--------
+
+::
+
+    host bind [-r] <label> [<filename>]
+    host unbind <label|seq>
+    host info [<label|seq>]
+    host dev [<label|seq>]
+
+Description
+-----------
+
+The host command provides a way to attach disk images on the host to U-Boot
+sandbox. This can be useful for testing U-Boot's filesystem implementations.
+
+Common arguments:
+
+<label|seq>
+    This is used to specify a host device. It can either be a label (a string)
+    or the sequence number of the device. An invalid value causes the command
+    to fail.
+
+
+host bind
+~~~~~~~~~
+
+This creates a new host device and binds a file to it.
+
+Arguments:
+
+label
+    Label to use to identify this binding. This can be any string.
+
+filename:
+    Host filename to bind to
+
+Flags:
+
+-r
+    Mark the device as removable
+
+
+host unbind
+~~~~~~~~~~~
+
+This unbinds a host device that was previously bound. The sequence numbers of
+other devices remain unchanged.
+
+
+host info
+~~~~~~~~~
+
+Provides information about a particular host binding, or all of them.
+
+
+host dev
+~~~~~~~~
+
+Allowing selecting a particular device, or (with no arguments) seeing which one
+is selected.
+
+
+Example
+-------
+
+Initially there are no devices::
+
+    => host info
+    dev       blocks label           path
+
+Bind a device::
+
+    => host bind -r test2 2MB.ext2.img
+    => host bind fat 1MB.fat32.img
+    => host info
+    dev       blocks label           path
+      0         4096 test2           2MB.ext2.img
+      1         2048 fat             1MB.fat32.img
+
+Select a device by label or sequence number::
+
+    => host dev fat
+    Current host device: 1: fat
+    => host dev 0
+    Current host device: 0: test2
+
+Write a file::
+
+    => ext4write host 0 0 /dump 1e00
+    File System is consistent
+    7680 bytes written in 3 ms (2.4 MiB/s)
+    => ext4ls host 0
+    <DIR>       4096 .
+    <DIR>       4096 ..
+    <DIR>      16384 lost+found
+                4096 testing
+                7680 dump
+
+Unbind a device::
+
+    => host unbind test2
+    => host info
+    dev       blocks label           path
+      1         2048 fat             1MB.fat32.img
+
+
+Return value
+------------
+
+The return value $? indicates whether the command succeeded.
diff --git a/doc/usage/cmd/if.rst b/doc/usage/cmd/if.rst
new file mode 100644
index 00000000000..813f903a8d8
--- /dev/null
+++ b/doc/usage/cmd/if.rst
@@ -0,0 +1,72 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+.. index::
+   single: if (command)
+
+if command
+==========
+
+Synopsis
+--------
+
+::
+
+    if <test statement>
+    then
+        <statements>
+    fi
+
+    if <test statement>
+    then
+        <statements>
+    else
+        <statements>
+    fi
+
+Description
+-----------
+
+The if command is used to conditionally execute statements.
+
+test statement
+    Any command. The test statement set the $? variable. If the value of
+    $? becomes 0 (true) the statements after the **then** statement will
+    be executed. Otherwise the statements after the **else** statement.
+
+Examples
+--------
+
+The examples shows how the value of a numeric variable can be tested with
+the :doc:`itest <itest>` command.
+
+::
+
+    => a=1; if itest $a == 0; then echo true; else echo false; fi
+    false
+    => a=0; if itest $a == 0; then echo true; else echo false; fi
+    true
+
+In the following example we try to load an EFI binary via TFTP. If loading
+succeeds, the binary is executed.
+
+::
+
+    if tftp $kernel_addr_r shellriscv64.efi; then bootefi $kernel_addr_r; fi
+
+Return value
+------------
+
+The value of $? is the return value of the last executed statement.
+
+::
+
+    => if true; then true; else true; fi; echo $?
+    0
+    => if false; then true; else true; fi; echo $?
+    0
+    => if false; then false; else false; fi; echo $?
+    1
+    => if true; then false; else false; fi; echo $?
+    1
+    => if false; then true; fi; echo $?
+    1
diff --git a/doc/usage/cmd/imxtract.rst b/doc/usage/cmd/imxtract.rst
new file mode 100644
index 00000000000..235d15e445b
--- /dev/null
+++ b/doc/usage/cmd/imxtract.rst
@@ -0,0 +1,84 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: imxtract (command)
+
+imxtract command
+================
+
+Synopsis
+--------
+
+::
+
+    imxtract addr part [dest]
+    imxtract addr uname [dest]
+
+Description
+-----------
+
+The imxtract command is used to extract a part of a multi-image file.
+
+Two different file formats are supported:
+
+* FIT images
+* legacy U-Boot images
+
+addr
+    Address of the multi-image file from which a part shall be extracted
+
+part
+    Index (hexadecimal) of the part of a legacy U-Boot image to be extracted
+
+uname
+    Name of the part of a FIT image to be extracted
+
+dest
+    Destination address (defaults to 0x0)
+
+The value of environment variable *verify* controls if the hashes and
+signatures of FIT images or the check sums of legacy U-Boot images are checked.
+To enable checking set *verify* to one of the values *1*, *yes*, *true*.
+(Actually only the first letter is checked disregarding the case.)
+
+To list the parts of an image the *iminfo* command can be used.
+
+Examples
+--------
+
+With verify=no incorrect hashes, signatures, or check sums don't stop the
+extraction. But correct hashes are still indicated in the output
+(here: sha256, sha512).
+
+.. code-block:: console
+
+    => setenv verify no
+    => imxtract $loadaddr kernel-1 $kernel_addr_r
+    ## Copying 'kernel-1' subimage from FIT image at 40200000 ...
+    sha256+ sha512+    Loading part 0 ... OK
+    =>
+
+With verify=yes incorrect hashes, signatures, or check sums stop the extraction.
+
+.. code-block:: console
+
+    => setenv verify yes
+    => imxtract $loadaddr kernel-1 $kernel_addr_r
+    ## Copying 'kernel-1' subimage from FIT image at 40200000 ...
+    sha256 error!
+    Bad hash value for 'hash-1' hash node in 'kernel-1' image node
+    Bad Data Hash
+    =>
+
+Configuration
+-------------
+
+The imxtract command is only available if CONFIG_CMD_XIMG=y. Support for FIT
+images requires CONFIG_FIT=y. Support for legacy U-Boot images requires
+CONFIG_LEGACY_IMAGE_FORMAT=y.
+
+Return value
+------------
+
+On success the return value $? of the command is 0 (true). On failure the
+return value is 1 (false).
diff --git a/doc/usage/cmd/itest.rst b/doc/usage/cmd/itest.rst
new file mode 100644
index 00000000000..adcad05b2d4
--- /dev/null
+++ b/doc/usage/cmd/itest.rst
@@ -0,0 +1,115 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: itest (command)
+
+itest command
+=============
+
+Synopsis
+--------
+
+::
+
+    itest[.b | .w | .l | .q | .s] [*]<value1> <op> [*]<value2>
+
+Description
+-----------
+
+The itest command is used to compare two values. The return value $? is set
+accordingly.
+
+By default it is assumed that the values are 4 byte integers. By appending a
+postfix (.b, .w, .l, .q, .s) the size can be specified:
+
+======= ======================================================
+postfix meaning
+======= ======================================================
+.b      1 byte integer
+.w      2 byte integer
+.l      4 byte integer
+.q      8 byte integer (only available if CONFIG_PHYS_64BIT=y)
+.s      string
+======= ======================================================
+
+value1, value2
+    values to compare. Numeric values are hexadecimal. If '*' is prefixed a
+    hexadecimal address is passed, which points to the value to be compared.
+
+op
+    operator, see table
+
+    ======== ======================
+    operator meaning
+    ======== ======================
+    -lt      less than
+    <        less than
+    -le      less or equal
+    <=       less or equal
+    -eq      equal
+    ==       equal
+    -ne      not equal
+    !=       not equal
+    <>       not equal
+    -ge      greater or equal
+    >=       greater or equal
+    -gt      greater than
+    >        greater than
+    ======== ======================
+
+Examples
+--------
+
+The itest command sets the result variable $? to true (0) or false (1):
+
+::
+
+    => itest 3 < 4; echo $?
+    0
+    => itest 3 == 4; echo $?
+    1
+
+This value can be used in the :doc:`if <if>` command:
+
+::
+
+    => if itest 0x3002 < 0x4001; then echo true; else echo false; fi
+    true
+
+Numbers will be truncated according to the postfix before comparing:
+
+::
+
+    => if itest.b 0x3002 < 0x4001; then echo true; else echo false; fi
+    false
+
+Postfix .s causes a string compare. The string '0xa1234' is alphabetically
+smaller than '0xb'.
+
+::
+
+    => if itest.s 0xa1234 < 0xb; then echo true; else echo false; fi
+    true
+
+A value prefixed by '*' is a pointer to the value in memory.
+
+::
+
+    => mm 0x4000
+    00004000: 00000004 ?
+    00004004: 00000003 ? =>
+    => if itest *0x4000 == 4; then echo true; else echo false; fi
+    true
+    => if itest *0x4004 == 3; then echo true; else echo false; fi
+    true
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_ITEST=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) if the condition is true and 1 (false)
+otherwise.
diff --git a/doc/usage/cmd/load.rst b/doc/usage/cmd/load.rst
new file mode 100644
index 00000000000..bfa45c6f36c
--- /dev/null
+++ b/doc/usage/cmd/load.rst
@@ -0,0 +1,77 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: load (command)
+
+load command
+============
+
+Synopsis
+--------
+
+::
+
+    load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]
+
+Description
+-----------
+
+The load command is used to read a file from a filesystem into memory.
+
+The number of transferred bytes is saved in the environment variable filesize.
+The load address is saved in the environment variable fileaddr.
+
+interface
+    interface for accessing the block device (mmc, sata, scsi, usb, ....)
+
+dev
+    device number
+
+part
+    partition number, defaults to 0 (whole device)
+
+addr
+    load address, defaults to environment variable loadaddr or if loadaddr is
+    not set to configuration variable CONFIG_SYS_LOAD_ADDR
+
+filename
+    path to file, defaults to environment variable bootfile
+
+bytes
+    maximum number of bytes to load
+
+pos
+    number of bytes to skip
+
+part, addr, bytes, pos are hexadecimal numbers.
+
+Example
+-------
+
+::
+
+    => load mmc 0:1 ${kernel_addr_r} snp.efi
+    149280 bytes read in 11 ms (12.9 MiB/s)
+    =>
+    => load mmc 0:1 ${kernel_addr_r} snp.efi 1000000
+    149280 bytes read in 9 ms (15.8 MiB/s)
+    =>
+    => load mmc 0:1 ${kernel_addr_r} snp.efi 1000000 100
+    149024 bytes read in 10 ms (14.2 MiB/s)
+    =>
+    => load mmc 0:1 ${kernel_addr_r} snp.efi 10
+    16 bytes read in 1 ms (15.6 KiB/s)
+    =>
+
+Configuration
+-------------
+
+The load command is only available if CONFIG_CMD_FS_GENERIC=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the file was successfully loaded
+even if the number of bytes is less then the specified length.
+
+If an error occurs, the return value $? is set to 1 (false).
diff --git a/doc/usage/cmd/loadb.rst b/doc/usage/cmd/loadb.rst
new file mode 100644
index 00000000000..4f9a52c793f
--- /dev/null
+++ b/doc/usage/cmd/loadb.rst
@@ -0,0 +1,73 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: loadb (command)
+
+loadb command
+=============
+
+Synopsis
+--------
+
+::
+
+    loadb [addr [baud]]
+
+Description
+-----------
+
+The loadb command is used to transfer a file to the device via the serial line
+using the Kermit protocol.
+
+The number of transferred bytes is saved in environment variable filesize.
+
+addr
+    load address, defaults to environment variable loadaddr or if loadaddr is
+    not set to configuration variable CONFIG_SYS_LOAD_ADDR
+
+baud
+    baud rate for the Kermit transmission. After the transmission the baud
+    rate is reset to the original value.
+
+Example
+-------
+
+In the example below the terminal emulation program picocom and G-Kermit
+serve to transfer a file to a device.
+
+.. code-block:: bash
+
+    picocom --baud 115200 --send-cmd "gkermit -iXvs" /dev/ttyUSB0
+
+After entering the loadb command the key sequence <CTRL-A><CTRL-S> is used to
+let picocom prompt for the file name. Picocom invokes G-Kermit for the file
+transfer.
+
+::
+
+    => loadb 60800000 115200
+    ## Ready for binary (kermit) download to 0x60800000 at 115200 bps...
+
+    *** file: helloworld.efi
+    $ gkermit -iXvs helloworld.efi
+    G-Kermit 2.01, The Kermit Project, 2021-11-15
+    Escape back to your local Kermit and give a RECEIVE command.
+
+    KERMIT READY TO SEND...
+    |
+    *** exit status: 0 ***
+    ## Total Size      = 0x00000c00 = 3072 Bytes
+    ## Start Addr      = 0x60800000
+    =>
+
+The transfer can be cancelled by pressing <CTRL+C>.
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_LOADB=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) on success, 1 (false) on error.
diff --git a/doc/usage/cmd/loadm.rst b/doc/usage/cmd/loadm.rst
new file mode 100644
index 00000000000..005840a27bb
--- /dev/null
+++ b/doc/usage/cmd/loadm.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: loadm (command)
+
+loadm command
+=============
+
+Synopsis
+--------
+
+::
+
+    loadm <src_addr> <dst_addr> <len>
+
+Description
+-----------
+
+The loadm command is used to copy memory content from source address
+to destination address and, if efi is enabled, will setup a "Mem" efi
+boot device.
+
+The number of transferred bytes must be set by bytes parameter
+
+src_addr
+    start address of the memory location to be loaded
+
+dst_addr
+    destination address of the byte stream to be loaded
+
+len
+    number of bytes to be copied in hexadecimal. Can not be 0 (zero).
+
+Example
+-------
+
+::
+
+    => loadm ${kernel_addr} ${kernel_addr_r} ${kernel_size}
+    loaded bin to memory: size: 12582912
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_LOADM=y.
+
+Return value
+------------
+
+The return value $? is set 0 (true) if the loading is succefull, and
+is set to 1 (false) in case of error.
+
diff --git a/doc/usage/cmd/loads.rst b/doc/usage/cmd/loads.rst
new file mode 100644
index 00000000000..0a2ac14acfe
--- /dev/null
+++ b/doc/usage/cmd/loads.rst
@@ -0,0 +1,99 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: loads (command)
+
+loads command
+=============
+
+Synopsis
+--------
+
+::
+
+    loads [offset [baud]]
+
+Description
+-----------
+
+The loads command is used to transfer a file to the device via the serial line
+using the Motorola S-record file format.
+
+offset
+    offset added to the addresses in the S-record file
+
+baud
+    baud rate to use for download. This parameter is only available if
+    CONFIG_SYS_LOADS_BAUD_CHANGE=y
+
+Example
+-------
+
+As example file to be transferred we use a script printing 'hello s-record'.
+Here are the commands to create the S-record file:
+
+.. code-block:: bash
+
+    $ echo 'echo hello s-record' > script.txt
+    $ mkimage -T script -d script.txt script.scr
+    Image Name:
+    Created:      Sun Jun 25 10:35:02 2023
+    Image Type:   PowerPC Linux Script (gzip compressed)
+    Data Size:    28 Bytes = 0.03 KiB = 0.00 MiB
+    Load Address: 00000000
+    Entry Point:  00000000
+    Contents:
+       Image 0: 20 Bytes = 0.02 KiB = 0.00 MiB
+    $ srec_cat script.scr -binary -CRLF -Output script.srec
+    $ echo -e "S9030000FC\r" >> script.srec
+    $ cat script.srec
+    S0220000687474703A2F2F737265636F72642E736F75726365666F7267652E6E65742F1D
+    S1230000270519566D773EB6649815E30000001700000000000000003DE3D97005070601E2
+    S12300200000000000000000000000000000000000000000000000000000000000000000BC
+    S11A00400000000F0000000068656C6C6F20732D7265636F72640A39
+    S5030003F9
+    S9030000FC
+    $
+
+The load address in the first S1 record is 0x0000.
+
+The terminal emulation program picocom is invoked with *cat* as the send
+command to transfer the file.
+
+.. code-block::
+
+    picocom --send-cmd 'cat' --baud 115200 /dev/ttyUSB0
+
+After entering the *loads* command the key sequence <CTRL-A><CTRL-S> is used to
+let picocom prompt for the file name. Picocom invokes the program *cat* for the
+file transfer. The loaded script is executed using the *source* command.
+
+.. code-block::
+
+    => loads $scriptaddr
+    ## Ready for S-Record download ...
+
+    *** file: script.srec
+    $ cat script.srec
+
+    *** exit status: 0 ***
+
+    ## First Load Addr = 0x4FC00000
+    ## Last  Load Addr = 0x4FC0005B
+    ## Total Size      = 0x0000005C = 92 Bytes
+    ## Start Addr      = 0x00000000
+    => source $scriptaddr
+    ## Executing script at 4fc00000
+    hello s-record
+    =>
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_LOADS=y. The parameter to set the
+baud rate is only available if CONFIG_SYS_LOADS_BAUD_CHANGE=y
+
+Return value
+------------
+
+The return value $? is 0 (true) on success, 1 (false) otherwise.
diff --git a/doc/usage/cmd/loadx.rst b/doc/usage/cmd/loadx.rst
new file mode 100644
index 00000000000..661b36723c3
--- /dev/null
+++ b/doc/usage/cmd/loadx.rst
@@ -0,0 +1,80 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: loadx (command)
+
+loadx command
+=============
+
+Synopsis
+--------
+
+::
+
+    loadx [addr [baud]]
+
+Description
+-----------
+
+The loadx command is used to transfer a file to the device via the serial line
+using the XMODEM protocol.
+
+The number of transferred bytes is saved in environment variable filesize.
+
+addr
+    load address, defaults to environment variable loadaddr or if loadaddr is
+    not set to configuration variable CONFIG_SYS_LOAD_ADDR
+
+baud
+    baud rate for the ymodem transmission. After the transmission the baud
+    rate is reset to the original value.
+
+Example
+-------
+
+In the example below the terminal emulation program picocom was used to
+transfer a file to the device.
+
+.. code-block::
+
+    picocom --send-cmd 'sx -b vv' --baud 115200 /dev/ttyUSB0
+
+After entering the loadx command the key sequence <CTRL-A><CTRL-S> is used to
+let picocom prompt for the file name. Picocom invokes the program sx for the
+file transfer.
+
+::
+
+    => loadx 60800000 115200
+    ## Ready for binary (xmodem) download to 0x60800000 at 115200 bps...
+    C
+    *** file: helloworld.efi
+    $ sx -b vv helloworld.efi
+    sx: cannot open vv: No such file or directory
+    Sending helloworld.efi, 24 blocks: Give your local XMODEM receive command now.
+    Xmodem sectors/kbytes sent:   0/ 0kRetry 0: NAK on sector
+    Bytes Sent:   3072   BPS:1147
+
+    Transfer incomplete
+
+    *** exit status: 1 ***
+    ## Total Size      = 0x00000c00 = 3072 Bytes
+    ## Start Addr      = 0x60800000
+    =>
+
+The transfer can be cancelled by pressing 3 times <CTRL+C> after two seconds
+of inactivity on terminal.
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_LOADB=y.
+
+Initial timeout in seconds while waiting for transfer is configured by
+config option CMD_LOADXY_TIMEOUT or by env variable $loadxy_timeout.
+Setting it to 0 means infinite timeout.
+
+Return value
+------------
+
+The return value $? is 0 (true) on success, 1 (false) otherwise.
diff --git a/doc/usage/cmd/loady.rst b/doc/usage/cmd/loady.rst
new file mode 100644
index 00000000000..8367759471e
--- /dev/null
+++ b/doc/usage/cmd/loady.rst
@@ -0,0 +1,77 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: loady (command)
+
+loady command
+=============
+
+Synopsis
+--------
+
+::
+
+    loady [addr [baud]]
+
+Description
+-----------
+
+The loady command is used to transfer a file to the device via the serial line
+using the YMODEM protocol.
+
+The number of transferred bytes is saved in environment variable filesize.
+
+addr
+    load address, defaults to environment variable loadaddr or if loadaddr is
+    not set to configuration variable CONFIG_SYS_LOAD_ADDR
+
+baud
+    baud rate for the ymodem transmission. After the transmission the baud
+    rate is reset to the original value.
+
+Example
+-------
+
+In the example below the terminal emulation program picocom was used to
+transfer a file to the device.
+
+After entering the loady command the key sequence <CTRL-A><CTRL-S> is used to
+let picocom prompt for the file name. Picocom invokes the program sz for the
+file transfer.
+
+::
+
+    => loady 80064000 115200
+    ## Ready for binary (ymodem) download to 0x80064000 at 115200 bps...
+    C
+    *** file: BOOTRISCV64.EFI
+    $ sz -b -vv BOOTRISCV64.EFI
+    Sending: BOOTRISCV64.EFI
+    Bytes Sent: 398976   BPS:7883
+    Sending:
+    Ymodem sectors/kbytes sent:   0/ 0k
+    Transfer complete
+
+    *** exit status: 0 ***
+    /1(CAN) packets, 4 retries
+    ## Total Size      = 0x0006165f = 398943 Bytes
+    => echo ${filesize}
+    6165f
+    =>
+
+Transfer can be cancelled by pressing 3 times <CTRL+C> after two seconds
+of inactivity on terminal.
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_LOADB=y.
+
+Initial timeout in seconds while waiting for transfer is configured by
+config option CMD_LOADXY_TIMEOUT or by env variable $loadxy_timeout.
+Setting it to 0 means infinite timeout.
+
+Return value
+------------
+
+The return value $? is 0 (true) on success, 1 (false) otherwise.
diff --git a/doc/usage/cmd/mbr.rst b/doc/usage/cmd/mbr.rst
new file mode 100644
index 00000000000..925a1181055
--- /dev/null
+++ b/doc/usage/cmd/mbr.rst
@@ -0,0 +1,97 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: mbr (command)
+
+mbr command
+===========
+
+Synopsis
+--------
+
+::
+
+    mbr verify [interface] [device no] [partition list]
+    mbr write [interface] [device no] [partition list]
+
+Description
+-----------
+
+The mbr command lets users create or verify the MBR (Master Boot Record)
+partition layout based on the provided text description. The partition
+layout is alternatively read from the 'mbr_parts' environment variable.
+This can be used in scripts to help system image flashing tools to ensure
+proper partition layout.
+
+The syntax of the text description of the partition list is similar to
+the one used by the 'gpt' command.
+
+Supported partition parameters are:
+
+* name (currently ignored)
+* start (partition start offset in bytes)
+* size (in bytes or '-' to expand it to the whole free area)
+* bootable (boolean flag)
+* id (MBR partition type)
+
+If one wants to create more than 4 partitions, an 'Extended' primary
+partition (with 0x05 ID) has to be explicitly provided as a one of the
+first 4 entries.
+
+Here is an example how to create a 6 partitions (3 on the 'extended
+volume'), some of the predefined sizes:
+
+::
+
+    => setenv mbr_parts 'name=boot,start=4M,size=128M,bootable,id=0x0e;
+        name=rootfs,size=3072M,id=0x83;
+        name=system-data,size=512M,id=0x83;
+        name=[ext],size=-,id=0x05;
+        name=user,size=-,id=0x83;
+        name=modules,size=100M,id=0x83;
+        name=ramdisk,size=8M,id=0x83'
+    => mbr write mmc 0
+
+To check if the layout on the MMC #0 storage device matches the provided
+text description one has to issue following command (assuming that
+mbr_parts environment variable is set):
+
+::
+
+    => mbr verify mmc 0
+
+The verify sub-command is especially useful in the system update scripts:
+
+::
+
+    => if mbr verify mmc 0; then
+         echo MBR layout needs to be updated
+         ...
+       fi
+
+The 'mbr write' command returns 0 on success write or 1 on failure.
+
+The 'mbr verify' returns 0 if the layout matches the one on the storage
+device or 1 if not.
+
+Configuration
+-------------
+
+To use the mbr command you must specify CONFIG_CMD_MBR=y.
+
+Return value
+------------
+
+The variable *$?* takes the following values
+
++---+------------------------------+
+| 0 | mbr write was succesful      |
++---+------------------------------+
+| 1 | mbr write failed             |
++---+------------------------------+
+| 0 | mbr verify was succesful     |
++---+------------------------------+
+| 1 | mbr verify was not succesful |
++---+------------------------------+
+|-1 | invalid arguments            |
++---+------------------------------+
diff --git a/doc/usage/cmd/md.rst b/doc/usage/cmd/md.rst
new file mode 100644
index 00000000000..9a9919f9ad0
--- /dev/null
+++ b/doc/usage/cmd/md.rst
@@ -0,0 +1,107 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: md (command)
+
+md command
+==========
+
+Synopsis
+--------
+
+::
+
+    md <address>[<data_size>] [<length>]
+
+Description
+-----------
+
+The md command is used to dump the contents of memory. It uses a standard
+format that includes the address, hex data and ASCII display. It supports
+various data sizes and uses the endianness of the target.
+
+The specified data_size and length become the defaults for future memory
+commands commands.
+
+address
+    start address to display
+
+data_size
+    size of each value to display (defaults to .l):
+
+    =========  ===================
+    data_size  Output size
+    =========  ===================
+    .b         byte
+    .w         word (16 bits)
+    .l         long (32 bits)
+    .q         quadword (64 bits)
+    =========  ===================
+
+length
+    number of values to dump. Defaults to 40 (0d64). Note that this is not
+    the same as the number of bytes, unless .b is used.
+
+Note that the format of 'md.b' can be emulated from linux with::
+
+    # This works but requires using sed to get the extra spaces
+    # <addr> is the address, <f> is the filename
+    xxd -o <addr> -g1 <f> |sed 's/  /    /' >bad
+
+    # This uses a single tool but the offset always starts at 0
+    # <f> is the filename
+    hexdump -v -e '"%08.8_ax: " 16/1 "%02x " "    "' -e '16/1 "%_p" "\n" ' <f>
+
+
+Example
+-------
+
+::
+
+    => md 10000
+    00010000: 00010000 00000000 f0f30f00 00005596    .............U..
+    00010010: 10011010 00000000 10011010 00000000    ................
+    00010020: 10011050 00000000 b96d4cd8 00007fff    P........Lm.....
+    00010030: 00000000 00000000 f0f30f18 00005596    .............U..
+    00010040: 10011040 00000000 10011040 00000000    @.......@.......
+    00010050: b96d4cd8 00007fff 10011020 00000000    .Lm..... .......
+    00010060: 00000003 000000c3 00000000 00000000    ................
+    00010070: 00000000 00000000 f0e892f3 00005596    .............U..
+    00010080: 00000000 000000a1 00000000 00000000    ................
+    00010090: 00000000 00000000 f0e38aa6 00005596    .............U..
+    000100a0: 00000000 000000a6 00000022 00000000    ........".......
+    000100b0: 00000001 00000000 f0e38aa1 00005596    .............U..
+    000100c0: 00000000 000000be 00000000 00000000    ................
+    000100d0: 00000000 00000000 00000000 00000000    ................
+    000100e0: 00000000 00000000 00000000 00000000    ................
+    000100f0: 00000000 00000000 00000000 00000000    ................
+    => md.b 10000
+    00010000: 00 00 01 00 00 00 00 00 00 0f f3 f0 96 55 00 00    .............U..
+    00010010: 10 10 01 10 00 00 00 00 10 10 01 10 00 00 00 00    ................
+    00010020: 50 10 01 10 00 00 00 00 d8 4c 6d b9 ff 7f 00 00    P........Lm.....
+    00010030: 00 00 00 00 00 00 00 00 18 0f f3 f0 96 55 00 00    .............U..
+    => md.b 10000 10
+    00010000: 00 00 01 00 00 00 00 00 00 0f f3 f0 96 55 00 00    .............U..
+    =>
+    00010010: 10 10 01 10 00 00 00 00 10 10 01 10 00 00 00 00    ................
+    =>
+    00010020: 50 10 01 10 00 00 00 00 d8 4c 6d b9 ff 7f 00 00    P........Lm.....
+    =>
+    => md.q 10000
+    00010000: 0000000000010000 00005596f0f30f00    .............U..
+    00010010: 0000000010011010 0000000010011010    ................
+    00010020: 0000000010011050 00007fffb96d4cd8    P........Lm.....
+    00010030: 0000000000000000 00005596f0f30f18    .............U..
+    00010040: 0000000010011040 0000000010011040    @.......@.......
+    00010050: 00007fffb96d4cd8 0000000010011020    .Lm..... .......
+    00010060: 000000c300000003 0000000000000000    ................
+    00010070: 0000000000000000 00005596f0e892f3    .............U..
+
+The empty commands cause a 'repeat', so that md shows the next available data
+in the same format as before.
+
+
+Return value
+------------
+
+The return value $? is always 0 (true).
diff --git a/doc/usage/cmd/mmc.rst b/doc/usage/cmd/mmc.rst
new file mode 100644
index 00000000000..5a64400eeae
--- /dev/null
+++ b/doc/usage/cmd/mmc.rst
@@ -0,0 +1,297 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: mmc (command)
+
+mmc command
+===========
+
+Synopsis
+--------
+
+::
+
+    mmc info
+    mmc read addr blk# cnt
+    mmc write addr blk# cnt
+    mmc erase blk# cnt
+    mmc rescan [mode]
+    mmc part
+    mmc dev [dev] [part] [mode]
+    mmc list
+    mmc wp
+    mmc bootbus <dev> <boot_bus_width> <reset_boot_bus_width> <boot_mode>
+    mmc bootpart-resize <dev> <dev part size MB> <RPMB part size MB>
+    mmc partconf <dev> [[varname] | [<boot_ack> <boot_partition> <partition_access>]]
+    mmc rst-function <dev> <value>
+    mmc reg read <reg> <offset> [env]
+
+Description
+-----------
+
+The mmc command is used to control MMC(eMMC/SD) device.
+
+The 'mmc info' command displays information (Manufacturer ID, OEM, Name, Bus Speed, Mode, ...) of MMC device.
+
+The 'mmc read' command reads raw data to memory address from MMC device with block offset and count.
+
+The 'mmc write' command writes raw data to MMC device from memory address with block offset and count.
+
+    addr
+        memory address
+    blk#
+        start block offset
+    cnt
+        block count
+
+The 'mmc erase' command erases *cnt* blocks on the MMC device starting at block *blk#*.
+
+    blk#
+        start block offset
+    cnt
+        block count
+
+The 'mmc rescan' command scans the available MMC device.
+
+   mode
+       speed mode to set.
+       CONFIG_MMC_SPEED_MODE_SET should be enabled. The requested speed mode is
+       passed as a decimal number according to the following table:
+
+       ========== ==========================
+       Speed mode Description
+       ========== ==========================
+           0      MMC legacy
+           1      MMC High Speed (26MHz)
+           2      SD High Speed (50MHz)
+           3      MMC High Speed (52MHz)
+           4      MMC DDR52 (52MHz)
+           5      UHS SDR12 (25MHz)
+           6      UHS SDR25 (50MHz)
+           7      UHS SDR50 (100MHz)
+           8      UHS DDR50 (50MHz)
+           9      UHS SDR104 (208MHz)
+          10      HS200 (200MHz)
+          11      HS400 (200MHz)
+          12      HS400ES (200MHz)
+       ========== ==========================
+
+       A speed mode can be set only if it has already been enabled in the device tree
+
+The 'mmc part' command displays the list available partition on current mmc device.
+
+The 'mmc dev' command shows or set current mmc device.
+
+    dev
+        device number to change
+    part
+        partition number to change
+
+   mode
+       speed mode to set.
+       CONFIG_MMC_SPEED_MODE_SET should be enabled. The requested speed mode is
+       passed as a decimal number according to the following table:
+
+       ========== ==========================
+       Speed mode Description
+       ========== ==========================
+           0      MMC legacy
+           1      MMC High Speed (26MHz)
+           2      SD High Speed (50MHz)
+           3      MMC High Speed (52MHz)
+           4      MMC DDR52 (52MHz)
+           5      UHS SDR12 (25MHz)
+           6      UHS SDR25 (50MHz)
+           7      UHS SDR50 (100MHz)
+           8      UHS DDR50 (50MHz)
+           9      UHS SDR104 (208MHz)
+          10      HS200 (200MHz)
+          11      HS400 (200MHz)
+          12      HS400ES (200MHz)
+       ========== ==========================
+
+       A speed mode can be set only if it has already been enabled in the device tree
+
+The 'mmc list' command displays the list available devices.
+
+The 'mmc wp' command enables "power on write protect" function for boot partitions.
+
+The 'mmc bootbus' command sets the BOOT_BUS_WIDTH field. (*Refer to eMMC specification*)
+
+    boot_bus_width
+        0x0
+            x1 (sdr) or x4(ddr) buswidth in boot operation mode (default)
+        0x1
+            x4 (sdr/ddr) buswidth in boot operation mode
+        0x2
+            x8 (sdr/ddr) buswidth in boot operation mode
+        0x3
+            Reserved
+
+    reset_boot_bus_width
+        0x0
+            Reset buswidth to x1, Single data reate and backward compatible timing after boot operation (default)
+        0x1
+            Retain BOOT_BUS_WIDTH and BOOT_MODE value after boot operation. This is relevant to Push-pull mode operation only
+
+    boot_mode
+        0x0
+            Use single data rate + backward compatible timing in boot operation (default)
+        0x1
+            Use single data rate + High Speed timing in boot operation mode
+        0x2
+            Use dual data rate in boot operation
+        0x3
+            Reserved
+
+The 'mmc partconf' command shows or changes PARTITION_CONFIG field.
+
+    varname
+        When showing the PARTITION_CONFIG, an optional environment variable to store the current boot_partition value into.
+    boot_ack
+        boot acknowledge value
+    boot_partition
+        boot partition to enable for boot
+            0x0
+                Device not boot enabled(default)
+            0x1
+                Boot partition1 enabled for boot
+            0x2
+                Boot partition2 enabled for boot
+            0x7
+                User area enabled for boot
+            others
+                Reserved
+    partition_access
+        partitions to access
+
+The 'mmc bootpart-resize' command changes sizes of boot and RPMB partitions.
+
+    dev
+        device number
+    boot part size MB
+        target size of boot partition
+    RPMB part size MB
+        target size of RPMB partition
+
+The 'mmc rst-function' command changes the RST_n_FUNCTION field.
+**WARNING** : This is a write-once field. (*Refer to eMMC specification*)
+
+    value
+        0x0
+            RST_n signal is temporarily disabled (default)
+        0x1
+            RST_n signal is permanently enabled
+        0x2
+            RST_n signal is permanently disabled
+        0x3
+            Reserved
+
+The 'mmc reg read <reg> <offset> [env]' reads eMMC card register and
+either print it to standard output, or store the value in environment
+variable.
+
+<reg> with
+optional offset <offset> into the register array, and print it to
+standard output or store it into environment variable [env].
+
+    reg
+        cid
+            The Device IDentification (CID) register. Uses offset.
+        csd
+            The Device-Specific Data (CSD) register. Uses offset.
+        dsr
+            The driver stage register (DSR).
+        ocr
+            The operation conditions register (OCR).
+        rca
+            The relative Device address (RCA) register.
+        extcsd
+            The Extended CSD register. Uses offset.
+    offset
+        For 'cid'/'csd' 128 bit registers '[0..3]' in 32-bit increments. For 'extcsd' 512 bit register '[0..512,all]' in 8-bit increments, or 'all' to read the entire register.
+    env
+        Optional environment variable into which 32-bit value read from register should be stored.
+
+Examples
+--------
+
+The 'mmc info' command displays device's capabilities:
+::
+
+    => mmc info
+    Device: EXYNOS DWMMC
+    Manufacturer ID: 45
+    OEM: 100
+    Name: SDW16
+    Bus Speed: 52000000
+    Mode: MMC DDR52 (52MHz)
+    Rd Block Len: 512
+    MMC version 5.0
+    High Capacity: Yes
+    Capacity: 14.7 GiB
+    Bus Width: 8-bit DDR
+    Erase Group Size: 512 KiB
+    HC WP Group Size: 8 MiB
+    User Capacity: 14.7 GiB WRREL
+    Boot Capacity: 4 MiB ENH
+    RPMB Capacity: 4 MiB ENH
+    Boot area 0 is not write protected
+    Boot area 1 is not write protected
+
+The raw data can be read/written via 'mmc read/write' command:
+::
+
+    => mmc read 40000000 5000 100
+    MMC read: dev # 0, block # 20480, count 256 ... 256 blocks read: OK
+
+    => mmc write 40000000 5000 100
+    MMC write: dev # 0, block # 20480, count 256 ... 256 blocks written: OK
+
+The partition list can be shown via 'mmc part' command:
+::
+
+    => mmc part
+    Partition Map for MMC device 0  --   Partition Type: DOS
+
+    Part    Start Sector    Num Sectors     UUID            Type
+      1     8192            131072          dff8751a-01     0e Boot
+      2     139264          6291456         dff8751a-02     83
+      3     6430720         1048576         dff8751a-03     83
+      4     7479296         23298048        dff8751a-04     05 Extd
+      5     7481344         307200          dff8751a-05     83
+      6     7790592         65536           dff8751a-06     83
+      7     7858176         16384           dff8751a-07     83
+      8     7876608         22900736        dff8751a-08     83
+
+The current device can be shown or set via 'mmc dev' command:
+::
+
+    => mmc dev
+    switch to partitions #0, OK
+    mmc0(part0) is current device
+    => mmc dev 2 0
+    switch to partitions #0, OK
+    mmc2 is current device
+    => mmc dev 0 1 4
+    switch to partitions #1, OK
+    mmc0(part 1) is current device
+
+The list of available devices can be shown via 'mmc list' command:
+::
+
+    => mmc list
+    mmc list
+    EXYNOS DWMMC: 0 (eMMC)
+    EXYNOS DWMMC: 2 (SD)
+
+Configuration
+-------------
+
+The mmc command is only available if CONFIG_CMD_MMC=y.
+Some commands need to enable more configuration.
+
+write, erase
+    CONFIG_MMC_WRITE
+bootbus, bootpart-resize, partconf, rst-function
+    CONFIG_SUPPORT_EMMC_BOOT=y
diff --git a/doc/usage/cmd/mtest.rst b/doc/usage/cmd/mtest.rst
new file mode 100644
index 00000000000..e01f2a6d575
--- /dev/null
+++ b/doc/usage/cmd/mtest.rst
@@ -0,0 +1,69 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2022, Heinrich Schuchardt <xypron.glpk@gmx.de>
+
+.. index::
+   single: mtest (command)
+
+mtest command
+=============
+
+Synopsis
+--------
+
+::
+
+    mtest [start [end [pattern [iterations]]]]
+
+Description
+-----------
+
+The *mtest* command tests the random access memory. It writes long values, reads
+them back and checks for differences. The test can be interrupted with CTRL+C.
+
+The default test uses *pattern* as first value to be written and varies it
+between memory addresses.
+
+An alternative test can be selected with CONFIG_SYS_ALT_MEMTEST=y. It uses
+multiple hard coded bit patterns.
+
+With CONFIGSYS_ALT_MEMTEST_BITFLIP=y a further test is executed. It writes long
+values offset by half the size of long and checks if writing to the one address
+causes bit flips at the other address.
+
+start
+	start address of the memory range tested, defaults to
+	CONFIG_SYS_MEMTEST_START
+
+end
+	end address of the memory range tested, defaults to
+	CONFIG_SYS_MEMTEST_END. If CONFIGSYS_ALT_MEMTEST_BITFLIP=y, a value will
+	be written to this address. Otherwise it is excluded from the range.
+
+pattern
+	pattern to be written to memory. This is a 64bit value on 64bit systems
+	and a 32bit value on 32bit systems. It defaults to 0. The value is
+	ignored if CONFIG_SYS_ALT_MEMTEST=y.
+
+iterations
+	number of test repetitions. If the value is not provided the test will
+	not terminate automatically. Enter CTRL+C instead.
+
+Examples
+--------
+
+::
+
+    => mtest 1000 2000 0x55aa55aa55aa55aa 10
+    Testing 00001000 ... 00002000:
+    Pattern AA55AA55AA55AA55  Writing...  Reading...
+    Tested 16 iteration(s) with 0 errors.
+
+Configuration
+-------------
+
+The mtest command is enabled by CONFIG_CMD_MEMTEST=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) if the command succeeds, 1 (false) otherwise.
diff --git a/doc/usage/cmd/mtrr.rst b/doc/usage/cmd/mtrr.rst
new file mode 100644
index 00000000000..3c5c3ba3d43
--- /dev/null
+++ b/doc/usage/cmd/mtrr.rst
@@ -0,0 +1,154 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: mtrr (command)
+
+mtrr command
+============
+
+Synopsis
+--------
+
+    mtrr [list]
+    mtrr set <reg> <type> <start> <size>
+    mtrr disable <reg>
+    mtrr enable
+
+
+Description
+-----------
+
+The *mtrr* command is used to dump the Memory Type Range Registers (MTRRs) on
+an x86 machine. These register control cache behaviour in selected memory
+ranges.
+
+Note that the number of registers can vary between CPUs.
+
+
+mtrr [list]
+~~~~~~~~~~~
+
+List the MTRRs. The table shows the following information:
+
+Reg
+    Register number (the first is register 0)
+
+Valid
+    Shows Y if the register is valid (has bit 11 set), N if not
+
+Write-type
+    Shows the behaviour when writing to the memory region. The types are
+    abbreviated to fit a reasonable line length. Valid types shown below.
+
+    ======  ==============  ====================================================
+    Value   Type            Meaning
+    ======  ==============  ====================================================
+    0       Uncacheable     Skip cache and write directly to memory
+    1       Combine         Multiple writes can be combined into one transaction
+    4       Through         Update cache and also write to memory
+    5       Protect         Writes are prohibited
+    6       Back            Update cache but don't write to memory
+    ======  ==============  ====================================================
+
+Base
+    Base memory address from which the register controls behaviour
+
+Mask
+    Mask value, which also indicates the size
+
+Size
+    Length of memory region within which the register controls behaviour
+
+
+mtrr set
+~~~~~~~~
+
+This sets the value of a particular MTRR. Parameters are:
+
+reg
+    Register number to set, with 0 being the first
+
+type
+    Access type to set. See Write-type above for valid types. This uses the name
+    rather than its numeric value.
+
+start
+    Base memory address from which the register should control behaviour
+
+size
+    Length of memory region within which the register controls behaviour
+
+
+mtrr disable
+~~~~~~~~~~~~
+
+This disables a particular register, by clearing its `valid` bit (11).
+
+
+mtrr enable
+~~~~~~~~~~~
+
+This enables a particular register, by setting its `valid` bit (11).
+
+
+Example
+-------
+
+This shows disabling and enabling an MTRR, as well as setting its type::
+
+    => mtrr
+    CPU 0:
+    Reg Valid Write-type   Base   ||        Mask   ||        Size   ||
+    0   Y     Back         0000000000000000 0000000f80000000 0000000080000000
+    1   Y     Back         0000000080000000 0000000fe0000000 0000000020000000
+    2   Y     Back         00000000a0000000 0000000ff0000000 0000000010000000
+    3   Y     Uncacheable  00000000ad000000 0000000fff000000 0000000001000000
+    4   Y     Uncacheable  00000000ae000000 0000000ffe000000 0000000002000000
+    5   Y     Combine      00000000d0000000 0000000ff0000000 0000000010000000
+    6   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    7   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    8   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    9   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    => mtrr d 5
+    => mtrr
+    CPU 0:
+    Reg Valid Write-type   Base   ||        Mask   ||        Size   ||
+    0   Y     Back         0000000000000000 0000000f80000000 0000000080000000
+    1   Y     Back         0000000080000000 0000000fe0000000 0000000020000000
+    2   Y     Back         00000000a0000000 0000000ff0000000 0000000010000000
+    3   Y     Uncacheable  00000000ad000000 0000000fff000000 0000000001000000
+    4   Y     Uncacheable  00000000ae000000 0000000ffe000000 0000000002000000
+    5   N     Combine      00000000d0000000 0000000ff0000000 0000000010000000
+    6   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    7   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    8   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    9   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    => mtrr e 5
+    => mtrr
+    CPU 0:
+    Reg Valid Write-type   Base   ||        Mask   ||        Size   ||
+    0   Y     Back         0000000000000000 0000000f80000000 0000000080000000
+    1   Y     Back         0000000080000000 0000000fe0000000 0000000020000000
+    2   Y     Back         00000000a0000000 0000000ff0000000 0000000010000000
+    3   Y     Uncacheable  00000000ad000000 0000000fff000000 0000000001000000
+    4   Y     Uncacheable  00000000ae000000 0000000ffe000000 0000000002000000
+    5   Y     Combine      00000000d0000000 0000000ff0000000 0000000010000000
+    6   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    7   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    8   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    9   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    => mtrr set 5 Uncacheable d0000000 10000000
+    => mtrr
+    CPU 0:
+    Reg Valid Write-type   Base   ||        Mask   ||        Size   ||
+    0   Y     Back         0000000000000000 0000000f80000000 0000000080000000
+    1   Y     Back         0000000080000000 0000000fe0000000 0000000020000000
+    2   Y     Back         00000000a0000000 0000000ff0000000 0000000010000000
+    3   Y     Uncacheable  00000000ad000000 0000000fff000000 0000000001000000
+    4   Y     Uncacheable  00000000ae000000 0000000ffe000000 0000000002000000
+    5   Y     Uncacheable  00000000d0000000 0000000ff0000000 0000000010000000
+    6   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    7   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    8   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    9   N     Uncacheable  0000000000000000 0000000000000000 0000001000000000
+    =>
diff --git a/doc/usage/cmd/panic.rst b/doc/usage/cmd/panic.rst
new file mode 100644
index 00000000000..39d32adbc99
--- /dev/null
+++ b/doc/usage/cmd/panic.rst
@@ -0,0 +1,36 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: panic (command)
+
+panic command
+=============
+
+Synopsis
+--------
+
+::
+
+    panic [message]
+
+Description
+-----------
+
+Display a message and reset the board.
+
+message
+    text to be displayed
+
+Examples
+--------
+
+::
+
+    => panic 'Unrecoverable error'
+    Unrecoverable error
+    resetting ...
+
+Configuration
+-------------
+
+If CONFIG_PANIC_HANG=y, the user has to reset the board manually.
diff --git a/doc/usage/cmd/part.rst b/doc/usage/cmd/part.rst
new file mode 100644
index 00000000000..e7faeccbb09
--- /dev/null
+++ b/doc/usage/cmd/part.rst
@@ -0,0 +1,231 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: part (command)
+
+part command
+============
+
+Synopsis
+--------
+
+::
+
+    part uuid <interface> <dev>:<part> [varname]
+    part list <interface> <dev> [flags] [varname]
+    part start <interface> <dev> <part> <varname>
+    part size <interface> <dev> <part> <varname>
+    part number <interface> <dev> <part> <varname>
+    part set <interface> <dev> <part> <type>
+    part type <interface> <dev>:<part> [varname]
+    part types
+
+Description
+-----------
+
+The `part` command is used to manage disk partition related commands.
+
+The 'part uuid' command prints or sets an environment variable to partition UUID
+
+    interface
+        interface for accessing the block device (mmc, sata, scsi, usb, ....)
+    dev
+        device number
+    part
+        partition number
+    varname
+        an optional environment variable to store the current partition UUID value into.
+
+The 'part list' command prints or sets an environment variable to the list of partitions
+
+    interface
+        interface for accessing the block device (mmc, sata, scsi, usb, ....)
+    dev
+        device number
+    part
+        partition number
+    flags
+        -bootable
+            lists only bootable partitions
+    varname
+        an optional environment variable to store the list of partitions value into.
+
+The 'part start' commnad sets an environment variable to the start of the partition (in blocks),
+part can be either partition number or partition name.
+
+    interface
+        interface for accessing the block device (mmc, sata, scsi, usb, ....)
+    dev
+        device number
+    part
+        partition number
+    varname
+        a variable to store the current start of the partition value into.
+
+The 'part size' command sets an environment variable to the size of the partition (in blocks),
+part can be either partition number or partition name.
+
+    interface
+        interface for accessing the block device (mmc, sata, scsi, usb, ....)
+    dev
+        device number
+    part
+        partition number
+    varname
+        a variable to store the current size of the partition value into.
+
+The 'part number' command sets an environment variable to the partition number using the partition name,
+part must be specified as partition name.
+
+    interface
+        interface for accessing the block device (mmc, sata, scsi, usb, ....)
+    dev
+        device number
+    part
+        partition number
+    varname
+        a variable to store the current partition number value into
+
+The 'part set' command sets the type of a partition. This is useful when
+autodetection fails or does not do the correct thing:
+
+    interface
+        interface for accessing the block device (mmc, sata, scsi, usb, ....)
+    dev
+        device number
+    part
+        partition number
+    type
+        partition type to use (see 'part types') to check available types
+
+The 'part type' command prints or sets an environment variable to the partition type UUID.
+
+    interface
+        interface for accessing the block device (mmc, sata, scsi, usb, ....)
+    dev
+        device number
+    part
+        partition number
+    varname
+        a variable to store the current partition type UUID value into
+
+The 'part types' command list supported partition table types.
+
+Examples
+--------
+
+::
+
+    => host bind 0 ./test_gpt_disk_image.bin
+    => part uuid host 0:1
+    24156b69-3378-497f-bb3e-b982223de528
+    => part uuid host 0:1 varname
+    => env print varname
+    varname=24156b69-3378-497f-bb3e-b982223de528
+    =>
+    => part list host 0
+
+    Partition Map for HOST device 0  --   Partition Type: EFI
+
+    Part	Start LBA	End LBA		Name
+    Attributes
+    Type GUID
+    Partition GUID
+    1	        0x00000800	0x00000fff	"second"
+    attrs:	0x0000000000000000
+    type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+                (data)
+    guid:	24156b69-3378-497f-bb3e-b982223de528
+    2	        0x00001000	0x00001bff	"first"
+    attrs:	0x0000000000000000
+    type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+                (data)
+    guid:	5272ee44-29ab-4d46-af6c-4b45ac67d3b7
+    =>
+    => part start host 0 2 varname
+    => env print varname
+    varname=1000
+    =>
+    => part size host 0 2 varname
+    => env print varname
+    varname=c00
+    =>
+    => part number host 0 2 varname
+    => env print varname
+    varname=0x2
+    =>
+    => part type host 0:1
+    ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+    => part type host 0:1 varname
+    => env print varname
+    varname=ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+    =>
+    => part types
+    Supported partition tables: EFI, AMIGA, DOS, ISO, MAC
+
+This shows looking at a device with multiple partition tables::
+
+    => virtio scan
+    => part list virtio 0
+
+    Partition Map for VirtIO device 0  --   Partition Type: EFI
+
+    Part	Start LBA	End LBA		Name
+            Attributes
+            Type GUID
+            Partition GUID
+    1	0x00000040	0x0092b093	"ISO9660"
+            attrs:	0x1000000000000001
+            type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+            guid:	a0891d7e-b930-4513-94d8-f629dbd637b2
+    2	0x0092b094	0x0092d7e7	"Appended2"
+            attrs:	0x0000000000000000
+            type:	c12a7328-f81f-11d2-ba4b-00a0c93ec93b
+            guid:	a0891d7e-b930-4513-94db-f629dbd637b2
+    3	0x0092d7e8	0x0092da3f	"Gap1"
+            attrs:	0x1000000000000001
+            type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+            guid:	a0891d7e-b930-4513-94da-f629dbd637b2
+    => ls virtio 0:3
+    => part types
+    Supported partition tables: EFI, DOS, ISO
+    => part set virtio 0 dos
+
+    Partition Map for VirtIO device 0  --   Partition Type: DOS
+
+    Part	Start Sector	Num Sectors	UUID		Type
+    1	1         	9624191   	00000000-01	ee
+    => part set virtio 0 iso
+
+    Partition Map for VirtIO device 0  --   Partition Type: ISO
+
+    Part   Start     Sect x Size Type
+    1     3020        4    512 U-Boot
+    2  9613460    10068    512 U-Boot
+    => part set virtio 0 efi
+
+    Partition Map for VirtIO device 0  --   Partition Type: EFI
+
+    Part	Start LBA	End LBA		Name
+            Attributes
+            Type GUID
+            Partition GUID
+    1	0x00000040	0x0092b093	"ISO9660"
+            attrs:	0x1000000000000001
+            type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+            guid:	a0891d7e-b930-4513-94d8-f629dbd637b2
+    2	0x0092b094	0x0092d7e7	"Appended2"
+            attrs:	0x0000000000000000
+            type:	c12a7328-f81f-11d2-ba4b-00a0c93ec93b
+            guid:	a0891d7e-b930-4513-94db-f629dbd637b2
+    3	0x0092d7e8	0x0092da3f	"Gap1"
+            attrs:	0x1000000000000001
+            type:	ebd0a0a2-b9e5-4433-87c0-68b6b72699c7
+            guid:	a0891d7e-b930-4513-94da-f629dbd637b2
+    =>
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the command succededd. If an
+error occurs, the return value $? is set to 1 (false).
diff --git a/doc/usage/cmd/pause.rst b/doc/usage/cmd/pause.rst
new file mode 100644
index 00000000000..6cdd83d3163
--- /dev/null
+++ b/doc/usage/cmd/pause.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later:
+
+.. index::
+   single: pause (command)
+
+pause command
+=============
+
+Synopsis
+--------
+
+::
+
+    pause [prompt]
+
+
+Description
+-----------
+
+The pause command delays execution waiting for any user input.
+
+It can accept a single parameter to change the prompt message.
+
+Examples
+--------
+
+Using with the default prompt:
+
+::
+
+    => pause
+    Press any key to continue...
+
+
+Using with a custom prompt:
+
+::
+
+    => pause 'Prompt for pause...'
+    Prompt for pause...
+
+Note that complex prompts require proper quoting:
+
+::
+
+    => pause Prompt for pause...
+    pause - delay until user input
+    
+    Usage:
+    pause [prompt] - Wait until users presses any key. [prompt] can be used to customize the message.
+
+Return value
+------------
+
+The return value $? is always set to 0 (true), unless invoked in an invalid
+manner.
diff --git a/doc/usage/cmd/pinmux.rst b/doc/usage/cmd/pinmux.rst
new file mode 100644
index 00000000000..30c5eb16a68
--- /dev/null
+++ b/doc/usage/cmd/pinmux.rst
@@ -0,0 +1,98 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: pinmux (command)
+
+pinmux command
+==============
+
+Synopsis
+--------
+
+::
+
+    pinmux list
+    pinmux dev [pincontroller-name]
+    pinmux status [-a | pin-name]
+
+Description
+-----------
+
+The pinmux command is used to show the pin-controller muxing.
+
+The 'pinmux list' command diplays the available pin-controller.
+
+The 'pinmux dev' command selects the pin-controller for next commands.
+
+    pincontroller-name
+        name of the pin-controller to select
+
+The 'pinmux status' command displays the pin muxing information.
+
+    \-a
+        display pin muxing of all pin-controllers.
+    pin-name
+        name of the pin to display
+
+Example
+-------
+
+::
+
+    => pinmux list
+    | Device                        | Driver                        | Parent
+    | pinctrl-gpio                  | sandbox_pinctrl_gpio          | root_driver
+    | pinctrl                       | sandbox_pinctrl               | root_driver
+    =>
+    => pinmux dev pinctrl
+    dev: pinctrl
+    =>
+    => pinmux status
+    P0        : UART TX.
+    P1        : UART RX.
+    P2        : I2S SCK.
+    P3        : I2S SD.
+    P4        : I2S WS.
+    P5        : GPIO0 bias-pull-up input-disable.
+    P6        : GPIO1 drive-open-drain.
+    P7        : GPIO2 bias-pull-down input-enable.
+    P8        : GPIO3 bias-disable.
+    =>
+    => pinmux status P0
+    P0        : UART TX.
+    =>
+    => pinmux status -a
+    --------------------------
+    pinctrl-gpio:
+    a0        : gpio input .
+    a1        : gpio input .
+    a2        : gpio input .
+    a3        : gpio input .
+    a4        : gpio input .
+    a5        : gpio output .
+    a6        : gpio output .
+    a7        : gpio input .
+    a8        : gpio input .
+    a9        : gpio input .
+    --------------------------
+    pinctrl:
+    P0        : UART TX.
+    P1        : UART RX.
+    P2        : I2S SCK.
+    P3        : I2S SD.
+    P4        : I2S WS.
+    P5        : GPIO0 bias-pull-up input-disable.
+    P6        : GPIO1 drive-open-drain.
+    P7        : GPIO2 bias-pull-down input-enable.
+    P8        : GPIO3 bias-disable.
+
+Configuration
+-------------
+
+The pinmux command is only available if CONFIG_CMD_PINMUX=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the command succeded and to 1 (false)
+otherwise.
diff --git a/doc/usage/cmd/printenv.rst b/doc/usage/cmd/printenv.rst
new file mode 100644
index 00000000000..dfdb3624934
--- /dev/null
+++ b/doc/usage/cmd/printenv.rst
@@ -0,0 +1,93 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: printenv (command)
+
+printenv command
+================
+
+Synopsis
+--------
+
+::
+
+    printenv [-a] [name ...]
+    printenv -e [-guid guid][-n] [name]
+
+Description
+-----------
+
+The printenv command is used to print environment or UEFI variables.
+
+\-a
+    Print environment variables starting with a period ('.').
+
+\-e
+    Print UEFI variables. Without -e environment variables are printed.
+
+\-guid *guid*
+    Specify vendor GUID *guid*. If none is specified, all UEFI variables with
+    the specified name are printed irrespective of their vendor GUID.
+
+\-n
+    don't show hexadecimal dump of value
+
+name
+    Variable name. If no name is provided, all variables are printed.
+    Multiple environment variable names may be specified.
+
+Examples
+--------
+
+The following examples demonstrates the effect of the *-a* flag when displaying
+environment variables:
+
+::
+
+    => setenv .foo bar
+    => printenv
+    arch=sandbox
+    baudrate=115200
+    board=sandbox
+    ...
+    stdout=serial,vidconsole
+
+    Environment size: 644/8188 bytes
+    => printenv -a
+    .foo=bar
+    arch=sandbox
+    baudrate=115200
+    board=sandbox
+    ...
+    stdout=serial,vidconsole
+
+    Environment size: 653/8188 bytes
+    =>
+
+The next example shows the effect of the *-n* flag when displaying an UEFI
+variable and how to specify a vendor GUID:
+
+::
+
+    => printenv -e -guid 8be4df61-93ca-11d2-aa0d-00e098032b8c PlatformLangCodes
+    PlatformLangCodes:
+        8be4df61-93ca-11d2-aa0d-00e098032b8c (EFI_GLOBAL_VARIABLE_GUID)
+        BS|RT|RO, DataSize = 0x6
+        00000000: 65 6e 2d 55 53 00                                en-US.
+    => printenv -e -n PlatformLangCodes
+    PlatformLangCodes:
+        8be4df61-93ca-11d2-aa0d-00e098032b8c (EFI_GLOBAL_VARIABLE_GUID)
+        BS|RT|RO, DataSize = 0x6
+    =>
+
+Configuration
+-------------
+
+UEFI variables are only supported if CONFIG_CMD_NVEDIT_EFI=y. The value of UEFI
+variables can only be displayed if CONFIG_HEXDUMP=y.
+
+Return value
+------------
+
+The return value $? is 1 (false) if a specified variable is not found.
+Otherwise $? is set to 0 (true).
diff --git a/doc/usage/cmd/pstore.rst b/doc/usage/cmd/pstore.rst
new file mode 100644
index 00000000000..63a437135ec
--- /dev/null
+++ b/doc/usage/cmd/pstore.rst
@@ -0,0 +1,96 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: pstore (command)
+
+pstore command
+==============
+
+Synopsis
+--------
+
+::
+
+    pstore set <addr> <len> [record-size] [console-size] [ftrace-size] [pmsg_size] [ecc-size]
+    pstore display [record-type] [nb]
+    pstore save <interface> <dev[:part]> <directory-path>
+
+Design
+------
+
+Linux PStore and Ramoops modules (Linux config options PSTORE and PSTORE_RAM)
+allow to use memory to pass data from the dying breath of a crashing kernel to
+its successor. This command allows to read those records from U-Boot command
+line.
+
+Ramoops is an oops/panic logger that writes its logs to RAM before the system
+crashes. It works by logging oopses and panics in a circular buffer. Ramoops
+needs a system with persistent RAM so that the content of that area can survive
+after a restart.
+
+Ramoops uses a predefined memory area to store the dump.
+
+Ramoops parameters can be passed as kernel parameters or through Device Tree,
+i.e.::
+
+    ramoops.mem_address=0x30000000 ramoops.mem_size=0x100000 ramoops.record_size=0x2000 ramoops.console_size=0x2000 memmap=0x100000$0x30000000
+
+The same values should be set in U-Boot to be able to retrieve the records.
+This values can be set at build time in U-Boot configuration file, or at runtime.
+U-Boot automatically patches the Device Tree to pass the Ramoops parameters to
+the kernel.
+
+The PStore configuration parameters are:
+
+======================= ==========
+ Name                   Default
+======================= ==========
+CMD_PSTORE_MEM_ADDR
+CMD_PSTORE_MEM_SIZE     0x10000
+CMD_PSTORE_RECORD_SIZE  0x1000
+CMD_PSTORE_CONSOLE_SIZE 0x1000
+CMD_PSTORE_FTRACE_SIZE  0x1000
+CMD_PSTORE_PMSG_SIZE    0x1000
+CMD_PSTORE_ECC_SIZE     0
+======================= ==========
+
+Records sizes should be a power of 2.
+The memory size and the record/console size must be non-zero.
+
+Multiple 'dump' records can be stored in the memory reserved for PStore.
+The memory size has to be larger than the sum of the record sizes, i.e.::
+
+    MEM_SIZE >= RECORD_SIZE * n + CONSOLE_SIZE + FTRACE_SIZE + PMSG_SIZE
+
+Usage
+-----
+
+Generate kernel crash
+~~~~~~~~~~~~~~~~~~~~~
+
+For test purpose, you can generate a kernel crash by setting reboot timeout to
+10 seconds and trigger a panic
+
+.. code-block:: console
+
+    $ sudo sh -c "echo 1 > /proc/sys/kernel/sysrq"
+    $ sudo sh -c "echo 10 > /proc/sys/kernel/panic"
+    $ sudo sh -c "echo c > /proc/sysrq-trigger"
+
+Retrieve logs in U-Boot
+~~~~~~~~~~~~~~~~~~~~~~~
+
+First of all, unless PStore parameters as been set during U-Boot configuration
+and match kernel ramoops parameters, it needs to be set using 'pstore set', e.g.::
+
+    => pstore set 0x30000000 0x100000 0x2000 0x2000
+
+Then all available dumps can be displayed
+using::
+
+    => pstore display
+
+Or saved to an existing directory in an Ext2 or Ext4 partition, e.g. on root
+directory of 1st partition of the 2nd MMC::
+
+    => pstore save mmc 1:1 /
diff --git a/doc/usage/cmd/qfw.rst b/doc/usage/cmd/qfw.rst
new file mode 100644
index 00000000000..40770acb3c0
--- /dev/null
+++ b/doc/usage/cmd/qfw.rst
@@ -0,0 +1,95 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: qfw (command)
+
+qfw command
+===========
+
+Synopsis
+--------
+
+::
+
+    qfw list
+    qfw cpus
+    qfw load [kernel_addr [initrd_addr]]
+
+Description
+-----------
+
+The *qfw* command is used to retrieve information from the QEMU firmware.
+
+The *qfw list* sub-command displays the QEMU firmware files.
+
+The *qfw cpus* sub-command displays the available CPUs.
+
+The *qfw load* command is used to load a kernel and an initial RAM disk.
+
+kernel_addr
+    address to which the file specified by the -kernel parameter of QEMU shall
+    be loaded. Defaults to environment variable *loadaddr* and further to
+    the value of *CONFIG_SYS_LOAD_ADDR*.
+
+initrd_addr
+    address to which the file specified by the -initrd parameter of QEMU shall
+    be loaded. Defaults to environment variable *ramdiskaddr* and further to
+    the value of *CFG_RAMDISK_ADDR*.
+
+Examples
+--------
+
+QEMU firmware files are listed via the *qfw list* command:
+
+::
+
+    => qfw list
+    00000000 bios-geometry
+    00000000 bootorder
+    000f0060 etc/acpi/rsdp
+    bed14040 etc/acpi/tables
+    00000000 etc/boot-fail-wait
+    00000000 etc/e820
+    00000000 etc/smbios/smbios-anchor
+    00000000 etc/smbios/smbios-tables
+    00000000 etc/system-states
+    00000000 etc/table-loader
+    00000000 etc/tpm/log
+    00000000 genroms/kvmvapic.bin
+
+Where an address is shown, it indicates where the data is available for
+inspection, e.g. using the :doc:`md`.
+
+The available CPUs can be shown via the *qfw cpus* command:
+
+::
+
+    => qfw cpu
+    2 cpu(s) online
+
+The *-kernel* and *-initrd* parameters allow to specify a kernel and an
+initial RAM disk for QEMU:
+
+.. code-block:: bash
+
+   $ qemu-system-x86_64 -machine pc-i440fx-2.5 -bios u-boot.rom -m 1G \
+       -nographic -kernel vmlinuz -initrd initrd
+
+Now the kernel and the initial RAM disk can be loaded to the U-Boot memory via
+the *qfw load* command and booted thereafter.
+
+::
+
+    => qfw load ${kernel_addr_r} ${ramdisk_addr_r}
+    loading kernel to address 0000000001000000 size 5048f0 initrd 0000000004000000 size 3c94891
+    => zboot 1000000 5048f0 4000000 3c94891
+    Valid Boot Flag
+    Magic signature found
+    Linux kernel version 4.19.0-14-amd64 (debian-kernel@lists.debian.org) #1 SMP Debian 4.19.171-2 (2021-01-30)
+    Building boot_params at 0x00090000
+    Loading bzImage at address 100000 (5260160 bytes)
+
+Configuration
+-------------
+
+The qfw command is only available if CONFIG_CMD_QFW=y.
diff --git a/doc/usage/cmd/read.rst b/doc/usage/cmd/read.rst
new file mode 100644
index 00000000000..840846728fc
--- /dev/null
+++ b/doc/usage/cmd/read.rst
@@ -0,0 +1,44 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later:
+
+read and write commands
+=======================
+
+Synopsis
+--------
+
+::
+
+    read <interface> <dev[:part|#partname]> <addr> <blk#> <cnt>
+    write <interface> <dev[:part|#partname]> <addr> <blk#> <cnt>
+
+The read and write commands can be used for raw access to data in
+block devices (or partitions therein), i.e. without going through a
+file system.
+
+read
+----
+
+The block device is specified using the <interface> (e.g. "mmc") and
+<dev> parameters. If the block device has a partition table, one can
+optionally specify a partition number (using the :part syntax) or
+partition name (using the #partname syntax). The command then reads
+the <cnt> blocks of data starting at block number <blk#> of the given
+device/partition to the memory address <addr>.
+
+write
+-----
+
+The write command is completely equivalent to the read command, except
+of course that the transfer direction is reversed.
+
+Examples
+--------
+
+    # Read 2 MiB from partition 3 of mmc device 2 to $loadaddr
+    read mmc 2.3 $loadaddr 0 0x1000
+
+    # Read 16 MiB from the partition named 'kernel' of mmc device 1 to $loadaddr
+    read mmc 1#kernel $loadaddr 0 0x8000
+
+    # Write to the third sector of the partition named 'bootdata' of mmc device 0
+    write mmc 0#bootdata $loadaddr 2 1
diff --git a/doc/usage/cmd/reset.rst b/doc/usage/cmd/reset.rst
new file mode 100644
index 00000000000..126db21cdb8
--- /dev/null
+++ b/doc/usage/cmd/reset.rst
@@ -0,0 +1,29 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: reset (command)
+
+reset command
+=============
+
+Synopsis
+--------
+
+::
+
+    reset [-w]
+
+Description
+-----------
+
+Perform reset of the CPU. By default does COLD reset, which resets CPU,
+DDR and peripherals, on some boards also resets external PMIC.
+
+-w
+    Do warm WARM, reset CPU but keep peripheral/DDR/PMIC active.
+
+
+Return value
+------------
+
+The return value $? is always set to 0 (true).
diff --git a/doc/usage/cmd/rng.rst b/doc/usage/cmd/rng.rst
new file mode 100644
index 00000000000..4a61e33d272
--- /dev/null
+++ b/doc/usage/cmd/rng.rst
@@ -0,0 +1,35 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: rng (command)
+
+rng command
+===========
+
+Synopsis
+--------
+
+::
+
+    rng list
+    rng [dev] [n]
+
+rng list
+--------
+
+List all the probed rng devices.
+
+rng [dev] [n]
+-------------
+
+The *rng* command reads the random number generator(RNG) device and
+prints the random bytes read on the console. A maximum of 64 bytes can
+be read in one invocation of the command.
+
+dev
+    The RNG device from which the random bytes are to be
+    read. Defaults to 0.
+
+n
+    Number of random bytes to be read and displayed on the
+    console. Default value is 0x40. Max value is 0x40.
diff --git a/doc/usage/cmd/saves.rst b/doc/usage/cmd/saves.rst
new file mode 100644
index 00000000000..b380a4feb6f
--- /dev/null
+++ b/doc/usage/cmd/saves.rst
@@ -0,0 +1,91 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: saves (command)
+
+saves command
+=============
+
+Synopsis
+--------
+
+::
+
+    saves [offset [size [baud]]]
+
+Description
+-----------
+
+The *saves* command is used to transfer a file from the device via the serial
+line using the Motorola S-record file format.
+
+offset
+    start address of memory area to save, defaults to 0x0
+
+size
+    size of memory area to save, defaults to 0x0
+
+baud
+    baud rate to use for upload. This parameter is only available if
+    CONFIG_SYS_LOADS_BAUD_CHANGE=y
+
+Example
+-------
+
+In the example the *screen* command is used to connect to the U-Boot serial
+console.
+
+In a first screen session a file is loaded from the SD-card and the *saves*
+command is invoked. <CTRL+A><k> is used to kill the screen session.
+
+A new screen session is started which logs the output to a file and the
+<ENTER> key is hit to start the file output. <CTRL+A><k> is issued to kill the
+screen session.
+
+The log file is converted to a binary file using the *srec_cat* command.
+A negative offset of -1337982976 (= -0x4c000000) is applied to compensate for
+the offset used in the *saves* command.
+
+.. code-block::
+
+    $ screen /dev/ttyUSB0 115200
+    => echo $scriptaddr
+    0x4FC00000
+    => load mmc 0:1 $scriptaddr boot.txt
+    124 bytes read in 1 ms (121.1 KiB/s)
+    => saves $scriptaddr $filesize
+    ## Ready for S-Record upload, press ENTER to proceed ...
+    Really kill this window [y/n]
+    $ screen -Logfile out.srec -L /dev/ttyUSB0 115200
+    S0030000FC
+    S3154FC00000736574656E76206175746F6C6F616420AD
+    S3154FC000106E6F0A646863700A6C6F6164206D6D633E
+    S3154FC0002020303A3120246664745F616464725F72B3
+    S3154FC00030206474620A6C6F6164206D6D6320303AC0
+    S3154FC000403120246B65726E656C5F616464725F72DA
+    S3154FC0005020736E702E6566690A626F6F74656669C6
+    S3154FC0006020246B65726E656C5F616464725F7220CB
+    S3114FC00070246664745F616464725F720A38
+    S70500000000FA
+    ## S-Record upload complete
+    =>
+    Really kill this window [y/n]
+    $ srec_cat out.srec -offset -1337982976 -Output out.txt -binary 2>/dev/null
+    $ cat out.txt
+    setenv autoload no
+    dhcp
+    load mmc 0:1 $fdt_addr_r dtb
+    load mmc 0:1 $kernel_addr_r snp.efi
+    bootefi $kernel_addr_r $fdt_addr_r
+    $
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_SAVES=y. The parameter to set the
+baud rate is only available if CONFIG_SYS_LOADS_BAUD_CHANGE=y
+
+Return value
+------------
+
+The return value $? is 0 (true) on success, 1 (false) otherwise.
diff --git a/doc/usage/cmd/sbi.rst b/doc/usage/cmd/sbi.rst
new file mode 100644
index 00000000000..5492925a8bc
--- /dev/null
+++ b/doc/usage/cmd/sbi.rst
@@ -0,0 +1,59 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: sbi (command)
+
+sbi command
+===========
+
+Synopsis
+--------
+
+::
+
+    sbi
+
+Description
+-----------
+
+The sbi command is used to display information about the SBI (Supervisor Binary
+Interface) implementation on RISC-V systems.
+
+The output may look like:
+
+::
+
+    => sbi
+    SBI 1.0
+    OpenSBI 1.1
+    Machine:
+      Vendor ID 0
+      Architecture ID 0
+      Implementation ID 0
+    Extensions:
+      Set Timer
+      Console Putchar
+      Console Getchar
+      Clear IPI
+      Send IPI
+      Remote FENCE.I
+      Remote SFENCE.VMA
+      Remote SFENCE.VMA with ASID
+      System Shutdown
+      SBI Base Functionality
+      Timer Extension
+      IPI Extension
+      RFENCE Extension
+      Hart State Management Extension
+      System Reset Extension
+      Performance Monitoring Unit Extension
+
+The first line indicates the version of the RISC-V SBI specification.
+The second line indicates the implementation.
+The Machine section shows the values of the machine information registers.
+The Extensions section enumerates the implemented SBI extensions.
+
+Configuration
+-------------
+
+To use the sbi command you must specify CONFIG_CMD_SBI=y.
diff --git a/doc/usage/cmd/scmi.rst b/doc/usage/cmd/scmi.rst
new file mode 100644
index 00000000000..9591cdc07a5
--- /dev/null
+++ b/doc/usage/cmd/scmi.rst
@@ -0,0 +1,129 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: scmi (command)
+
+scmi command
+============
+
+Synopsis
+--------
+
+::
+
+    scmi info
+    scmi perm_dev <agent id> <device id> <flags>
+    scmi perm_proto <agent id> <device id> <protocol id> <flags>
+    scmi reset <agent id> <flags>
+
+Description
+-----------
+
+Arm System Control and Management Interface (SCMI hereafter) is a set of
+standardised interfaces to manage system resources, like clocks, power
+domains, pin controls, reset and so on, in a system-wide manner.
+
+An entity which provides those services is called a SCMI firmware (or
+SCMI server if you like) may be placed/implemented by EL3 software or
+by a dedicated system control processor (SCP) or else.
+
+A user of SCMI interfaces, including U-Boot, is called a SCMI agent and
+may issues commands, which are defined in each protocol for specific system
+resources, to SCMI server via a communication channel, called a transport.
+Those interfaces are independent from the server's implementation thanks to
+a transport layer.
+
+For more details, see the `SCMI specification`_.
+
+While most of system resources managed under SCMI protocols are implemented
+and handled as standard U-Boot devices, for example clk_scmi, scmi command
+provides additional management functionality against SCMI server.
+
+scmi info
+~~~~~~~~~
+    Show base information about SCMI server and supported protocols
+
+scmi perm_dev
+~~~~~~~~~~~~~
+    Allow or deny access permission to the device
+
+scmi perm_proto
+~~~~~~~~~~~~~~~
+    Allow or deny access to the protocol on the device
+
+scmi reset
+~~~~~~~~~~
+    Reset the already-configured permissions against the device
+
+Parameters are used as follows:
+
+<agent id>
+    SCMI Agent ID, hex value
+
+<device id>
+    SCMI Device ID, hex value
+
+    Please note that what a device means is not defined
+    in the specification.
+
+<protocol id>
+    SCMI Protocol ID, hex value
+
+    It must not be 0x10 (base protocol)
+
+<flags>
+    Flags to control the action, hex value
+
+    0 to deny, 1 to allow. The other values are reserved and allowed
+    values may depend on the implemented version of SCMI server in
+    the future. See SCMI specification for more details.
+
+Example
+-------
+
+Obtain basic information about SCMI server:
+
+::
+
+    => scmi info
+    SCMI device: scmi
+      protocol version: 0x20000
+      # of agents: 3
+          0: platform
+        > 1: OSPM
+          2: PSCI
+      # of protocols: 4
+          Power domain management
+          Performance domain management
+          Clock management
+          Sensor management
+      vendor: Linaro
+      sub vendor: PMWG
+      impl version: 0x20b0000
+
+Ask for access permission to device#0:
+
+::
+
+    => scmi perm_dev 1 0 1
+
+Reset configurations with all access permission settings retained:
+
+::
+
+    => scmi reset 1 0
+
+Configuration
+-------------
+
+The scmi command is only available if CONFIG_CMD_SCMI=y.
+Default n because this command is mainly for debug purpose.
+
+Return value
+------------
+
+The return value ($?) is set to 0 if the operation succeeded,
+1 if the operation failed or -1 if the operation failed due to
+a syntax error.
+
+.. _`SCMI specification`: https://developer.arm.com/documentation/den0056/e/?lang=en
diff --git a/doc/usage/cmd/scp03.rst b/doc/usage/cmd/scp03.rst
new file mode 100644
index 00000000000..5fdddb3e813
--- /dev/null
+++ b/doc/usage/cmd/scp03.rst
@@ -0,0 +1,36 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: scp03 (command)
+
+scp03 command
+=============
+
+Synopsis
+--------
+
+::
+
+    scp03 enable
+    scp03 provision
+
+Description
+-----------
+
+The *scp03* command calls into a Trusted Application executing in a
+Trusted Execution Environment to enable (if present) the Secure
+Channel Protocol 03 stablished between the processor and the secure
+element.
+
+This protocol encrypts all the communication between the processor and
+the secure element using a set of pre-defined keys. These keys can be
+rotated (provisioned) using the *provision* request.
+
+See also
+--------
+
+For some information on the internals implemented in the TEE, please
+check the GlobalPlatform documentation on `Secure Channel Protocol '03'`_
+
+.. _Secure Channel Protocol '03':
+   https://globalplatform.org/wp-content/uploads/2014/07/GPC_2.3_D_SCP03_v1.1.2_PublicRelease.pdf
diff --git a/doc/usage/cmd/seama.rst b/doc/usage/cmd/seama.rst
new file mode 100644
index 00000000000..17fd559f485
--- /dev/null
+++ b/doc/usage/cmd/seama.rst
@@ -0,0 +1,63 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: seama (command)
+
+seama command
+=============
+
+Synopsis
+--------
+
+::
+
+    seama <dst_addr> <index>
+
+Description
+-----------
+
+The seama command is used to load and decode SEAttle iMAges from NAND
+flash to memory.
+
+This type of flash image is found in some D-Link routers such as
+DIR-645, DIR-842, DIR-859, DIR-860L, DIR-885L, DIR890L and DCH-M225,
+as well as in WD and NEC routers on the ath79 (MIPS), Broadcom
+BCM53xx, and RAMIPS platforms.
+
+This U-Boot command will read and decode a SEAMA image from raw NAND
+flash on any platform. As it is always using big endian format for
+the data decoding is always necessary on platforms  such as ARM.
+
+dst_addr
+    destination address of the byte stream to be loaded
+
+index
+    the image index (0, 1, 2..) can be omitted
+
+Example
+-------
+
+::
+
+    => seama 0x01000000
+    Loading SEAMA image 0 from nand0
+    SEMA IMAGE:
+      metadata size 36
+      image size 8781764
+      checksum 054859cfb1487b59befda98824e09dd6
+    Decoding SEAMA image 0x01000040..0x01860004 to 0x01000000
+
+
+Configuration
+-------------
+
+The command is available if CONFIG_CMD_SEAMA=y.
+
+Return value
+------------
+
+The return value $? is set 0 (true) if the loading is succefull, and
+is set to 1 (false) in case of error.
+
+The environment variable $seama_image_size is set to the size of the
+loaded SEAMA image.
diff --git a/doc/usage/cmd/setexpr.rst b/doc/usage/cmd/setexpr.rst
new file mode 100644
index 00000000000..593a0ea91e1
--- /dev/null
+++ b/doc/usage/cmd/setexpr.rst
@@ -0,0 +1,155 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: setexpr (command)
+
+setexpr command
+===============
+
+Synopsis
+--------
+
+::
+
+    setexpr[.b, .w, .l .s] <name> [*]<value> <op> [*]<value2>
+    setexpr[.b, .w, .l] <name> [*]<value>
+    setexpr <name> fmt <format> [value]...
+    setexpr <name> gsub r s [t]
+    setexpr <name> sub r s [t]
+
+Description
+-----------
+
+The setexpr command is used to set an environment variable to the result
+of an evaluation.
+
+setexpr[.b, .w, .l .s] <name> [*]<value> <op> [*]<value2>
+     Set environment variable <name> to the result of the evaluated
+     expression specified by <op>.
+
+setexpr[.b, .w, .l] name [*]value
+     Load <value> into environment variable <name>
+
+setexpr name fmt <format> value
+     Set environment variable <name> to the result of the C like
+     format string <format> evaluation of <value>.
+
+setexpr name gsub <r> <s> [<t>]
+     For each substring matching the regular expression <r> in the
+     string <t>, substitute the string <s>.
+     The result is assigned to <name>.
+     If <t> is not supplied, use the old value of <name>.
+     If no substring matching <r> is found in <t>, assign <t> to <name>.
+
+setexpr name sub <r> <s> [<t>]
+     Just like gsub(), but replace only the first matching substring
+
+The setexpr command takes the following arguments:
+
+format
+    This parameter contains a C or Bash like format string.
+    The number of arguments is limited to 4.
+    The following format types are supported:
+
+    c
+        single character
+    d, i
+        decimal value
+    o
+        octal value
+    s
+        string
+    u
+        unsigned decimal value
+    x, X
+        hexadecimal value
+    '%'
+        no conversion, instead a % character will be written
+
+    Backslash escapes:
+
+    \" = double quote
+    \\ = backslash
+    \a = alert (bell)
+    \b = backspace
+    \c = produce no further output
+    \f = form feed
+    \n = new line
+    \r = carriage return
+    \t = horizontal tab
+    \v = vertical tab
+    \NNN = octal number (NNN is 0 to 3 digits)
+
+name
+    The name of the environment variable to be set
+
+op
+    '|'
+        name = value | value2
+    '&'
+        name = value & value2
+    '+'
+        name = value + value2
+        (This is the only operator supported for strings.
+	It acts as concatenation operator on strings)
+    '^'
+        name = value ^ value2
+    '-'
+        name = value - value2
+    '*'
+        name = value * value2
+    '/'
+        name = value / value2
+    '%'
+        name = value % value2
+
+r
+    Regular expression
+
+s
+    Substitution string
+
+t
+    string
+
+value
+    Can either be an integer value, a string.
+    If the pointer prefix '*' is given value is treated as memory address.
+
+value2
+    See value
+
+Example
+-------
+
+::
+
+    => setexpr foo fmt %d 0x100
+    => echo $foo
+    256
+    =>
+
+    => setexpr foo fmt 0x%08x 63
+    => echo $foo
+    0x00000063
+    =>
+
+    => setexpr foo fmt %%%o 8
+    => echo $foo
+    %10
+    =>
+
+Configuration
+-------------
+
+* The *setexpr* command is only available if CMD_SETEXPR=y.
+* The *setexpr fmt* sub-command is only available if CMD_SETEXPR_FMT=y.
+* The *setexpr gsub* and *setexpr sub* sub-commands are only available if
+  CONFIG_REGEX=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the operation was successful.
+
+If an error occurs, the return value $? is set to 1 (false).
diff --git a/doc/usage/cmd/sf.rst b/doc/usage/cmd/sf.rst
new file mode 100644
index 00000000000..dfdca46e66c
--- /dev/null
+++ b/doc/usage/cmd/sf.rst
@@ -0,0 +1,248 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: sf (command)
+
+sf command
+==========
+
+Synopsis
+--------
+
+::
+
+    sf probe [[[<bus>:]<cs>] [<hz> [<mode>]]]
+    sf read <addr> <offset>|<partition> <len>
+    sf write <addr> <offset>|<partition> <len>
+    sf erase <offset>|<partition> <len>
+    sf update <addr> <offset>|<partition> <len>
+    sf protect lock|unlock <sector> <len>
+    sf test <offset>|<partition> <len>
+
+Description
+-----------
+
+The *sf* command is used to access SPI flash, supporting read/write/erase and
+a few other functions.
+
+Probe
+-----
+
+The flash must first be probed with *sf probe* before any of the other
+subcommands can be used. All of the parameters are optional:
+
+bus
+	SPI bus number containing the SPI-flash chip, e.g. 0. If you don't know
+	the number, you can use 'dm uclass' to see all the spi devices,
+	and check the value for 'seq' for each one (here 0 and 2)::
+
+	   uclass 89: spi
+	   0     spi@0 @ 05484960, seq 0
+	   1     spi@1 @ 05484b40, seq 2
+
+cs
+	SPI chip-select to use for the chip. This is often 0 and can be omitted,
+	but in some cases multiple slaves are attached to a SPI controller,
+	selected by a chip-select line for each one.
+
+hz
+	Speed of the SPI bus in hertz. This normally defaults to 100000, i.e.
+	100KHz, which is very slow. Note that if the device exists in the
+	device tree, there might be a speed provided there, in which case this
+	setting is ignored.
+
+mode
+	SPI mode to use:
+
+	=====  ================
+	Mode   Meaning
+	=====  ================
+	0      CPOL=0, CPHA=0
+	1      CPOL=0, CPHA=1
+	2      CPOL=1, CPHA=0
+	3      CPOL=1, CPHA=1
+	=====  ================
+
+	Clock phase (CPHA) 0 means that data is transferred (sampled) on the
+	first clock edge; 1 means the second.
+
+	Clock polarity (CPOL) controls the idle state of the clock, 0 for low,
+	1 for high.
+	The active state is the opposite of idle.
+
+	You may find this `SPI documentation`_ useful.
+
+Parameters for other subcommands (described below) are as follows:
+
+addr
+	Memory address to start transfer
+
+offset
+	Flash offset to start transfer
+
+partition
+	If the parameter is not numeric, it is assumed to be a partition
+	description in the format <dev_type><dev_num>,<part_num> which is not
+	covered here. This requires CONFIG_CMD_MTDPARTS.
+
+len
+	Number of bytes to transfer
+
+Read
+~~~~
+
+Use *sf read* to read from SPI flash to memory. The read will fail if an
+attempt is made to read past the end of the flash.
+
+
+Write
+~~~~~
+
+Use *sf write* to write from memory to SPI flash. The SPI flash should be
+erased first, since otherwise the result is undefined.
+
+The write will fail if an attempt is made to read past the end of the flash.
+
+
+Erase
+~~~~~
+
+Use *sf erase* to erase a region of SPI flash. The erase will fail if any part
+of the region to be erased is protected or lies past the end of the flash. It
+may also fail if the start offset or length are not aligned to an erase region
+(e.g. 256 bytes).
+
+
+Update
+~~~~~~
+
+Use *sf update* to automatically erase and update a region of SPI flash from
+memory. This works a sector at a time (typical 4KB or 64KB). For each
+sector it first checks if the sector already has the right data. If so it is
+skipped. If not, the sector is erased and the new data written. Note that if
+the length is not a multiple of the erase size, the space after the data in
+the last sector will be erased. If the offset does not start at the beginning
+of an erase block, the operation will fail.
+
+Speed statistics are shown including the number of bytes that were already
+correct.
+
+
+Protect
+~~~~~~~
+
+SPI-flash chips often have a protection feature where the chip is split up into
+regions which can be locked or unlocked. With *sf protect* it is possible to
+change these settings, if supported by the driver.
+
+lock|unlock
+	Selects whether to lock or unlock the sectors
+
+<sector>
+	Start sector number to lock/unlock. This may be the byte offset or some
+	other value, depending on the chip.
+
+<len>
+	Number of bytes to lock/unlock
+
+
+Test
+~~~~
+
+A convenient and fast *sf test* subcommand provides a way to check that SPI
+flash is working as expected. This works in four stages:
+
+   * erase - erases the entire region
+   * check - checks that the region is erased
+   * write - writes a test pattern to the region, consisting of the U-Boot code
+   * read - reads back the test pattern to check that it was written correctly
+
+Memory is allocated for two buffers, each <len> bytes in size. At typical
+size is 64KB to 1MB. The offset and size must be aligned to an erase boundary.
+
+Note that this test will fail if any part of the SPI flash is write-protected.
+
+
+Examples
+--------
+
+This first example uses sandbox::
+
+   => sf probe
+   SF: Detected m25p16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB
+   => sf read 1000 1100 80000
+   device 0 offset 0x1100, size 0x80000
+   SF: 524288 bytes @ 0x1100 Read: OK
+   => md 1000
+   00001000: edfe0dd0 f33a0000 78000000 84250000    ......:....x..%.
+   00001010: 28000000 11000000 10000000 00000000    ...(............
+   00001020: 6f050000 0c250000 00000000 00000000    ...o..%.........
+   00001030: 00000000 00000000 00000000 00000000    ................
+   00001040: 00000000 00000000 00000000 00000000    ................
+   00001050: 00000000 00000000 00000000 00000000    ................
+   00001060: 00000000 00000000 00000000 00000000    ................
+   00001070: 00000000 00000000 01000000 00000000    ................
+   00001080: 03000000 04000000 00000000 01000000    ................
+   00001090: 03000000 04000000 0f000000 01000000    ................
+   000010a0: 03000000 08000000 1b000000 646e6173    ............sand
+   000010b0: 00786f62 03000000 08000000 21000000    box............!
+   000010c0: 646e6173 00786f62 01000000 61696c61    sandbox.....alia
+   000010d0: 00736573 03000000 07000000 2c000000    ses............,
+   000010e0: 6332692f 00003040 03000000 07000000    /i2c@0..........
+   000010f0: 31000000 6963702f 00003040 03000000    ...1/pci@0......
+   => sf erase 0 80000
+   SF: 524288 bytes @ 0x0 Erased: OK
+   => sf read 1000 1100 80000
+   device 0 offset 0x1100, size 0x80000
+   SF: 524288 bytes @ 0x1100 Read: OK
+   => md 1000
+   00001000: ffffffff ffffffff ffffffff ffffffff    ................
+   00001010: ffffffff ffffffff ffffffff ffffffff    ................
+   00001020: ffffffff ffffffff ffffffff ffffffff    ................
+   00001030: ffffffff ffffffff ffffffff ffffffff    ................
+   00001040: ffffffff ffffffff ffffffff ffffffff    ................
+   00001050: ffffffff ffffffff ffffffff ffffffff    ................
+   00001060: ffffffff ffffffff ffffffff ffffffff    ................
+   00001070: ffffffff ffffffff ffffffff ffffffff    ................
+   00001080: ffffffff ffffffff ffffffff ffffffff    ................
+   00001090: ffffffff ffffffff ffffffff ffffffff    ................
+   000010a0: ffffffff ffffffff ffffffff ffffffff    ................
+   000010b0: ffffffff ffffffff ffffffff ffffffff    ................
+   000010c0: ffffffff ffffffff ffffffff ffffffff    ................
+   000010d0: ffffffff ffffffff ffffffff ffffffff    ................
+   000010e0: ffffffff ffffffff ffffffff ffffffff    ................
+   000010f0: ffffffff ffffffff ffffffff ffffffff    ................
+
+This second example is running on coral, an x86 Chromebook::
+
+   => sf probe
+   SF: Detected w25q128fw with page size 256 Bytes, erase size 4 KiB, total 16 MiB
+   => sf erase 300000 80000
+   SF: 524288 bytes @ 0x300000 Erased: OK
+   => sf update 1110000 300000 80000
+   device 0 offset 0x300000, size 0x80000
+   524288 bytes written, 0 bytes skipped in 0.457s, speed 1164578 B/s
+
+   # This does nothing as the flash is already updated
+   => sf update 1110000 300000 80000
+   device 0 offset 0x300000, size 0x80000
+   0 bytes written, 524288 bytes skipped in 0.196s, speed 2684354 B/s
+   => sf test 00000 80000   # try a protected region
+   SPI flash test:
+   Erase failed (err = -5)
+   Test failed
+   => sf test 800000 80000
+   SPI flash test:
+   0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps
+   1 check: 192 ticks, 2666 KiB/s 21.328 Mbps
+   2 write: 227 ticks, 2255 KiB/s 18.040 Mbps
+   3 read: 189 ticks, 2708 KiB/s 21.664 Mbps
+   Test passed
+   0 erase: 18 ticks, 28444 KiB/s 227.552 Mbps
+   1 check: 192 ticks, 2666 KiB/s 21.328 Mbps
+   2 write: 227 ticks, 2255 KiB/s 18.040 Mbps
+   3 read: 189 ticks, 2708 KiB/s 21.664 Mbps
+
+
+.. _SPI documentation:
+   https://en.wikipedia.org/wiki/Serial_Peripheral_Interface
diff --git a/doc/usage/cmd/size.rst b/doc/usage/cmd/size.rst
new file mode 100644
index 00000000000..306fcba0ba4
--- /dev/null
+++ b/doc/usage/cmd/size.rst
@@ -0,0 +1,43 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: size (command)
+
+size command
+============
+
+Synopsis
+--------
+
+::
+
+    size <interface> <dev[:part]> <filename>
+
+Description
+-----------
+
+The size command determines the size of a file and sets the environment variable
+filesize to this value. If filename points to a directory, the value is set to
+zero.
+
+If the command fails, the filesize environment variable is not changed.
+
+dev
+    device number
+
+part
+    partition number, defaults to 1
+
+filename
+    path to file
+
+Configuration
+-------------
+
+The size command is only available if CONFIG_CMD_FS_GENERIC=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the command succeded and to 1 (false)
+otherwise.
diff --git a/doc/usage/cmd/sleep.rst b/doc/usage/cmd/sleep.rst
new file mode 100644
index 00000000000..a372e4da0e1
--- /dev/null
+++ b/doc/usage/cmd/sleep.rst
@@ -0,0 +1,48 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2023, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+
+.. index::
+   single: sleep (command)
+
+sleep command
+=============
+
+Synopsis
+--------
+
+::
+
+    sleep <delay>
+
+Description
+-----------
+
+The *sleep* command waits for *delay* seconds. It can be interrupted by
+CTRL+C.
+
+delay
+   delay in seconds. The value is decimal and can be fractional.
+
+Example
+-------
+
+The current data and time is display before and after sleeping for 3.2
+seconds:
+
+::
+
+    => date; sleep 3.2; date
+    Date: 2023-01-21 (Saturday)    Time: 16:02:41
+    Date: 2023-01-21 (Saturday)    Time: 16:02:44
+    =>
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_SLEEP=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) if the command completes.
+The return value is 1 (false) if the command is interrupted by CTRL+C.
diff --git a/doc/usage/cmd/sm.rst b/doc/usage/cmd/sm.rst
new file mode 100644
index 00000000000..e828fddc519
--- /dev/null
+++ b/doc/usage/cmd/sm.rst
@@ -0,0 +1,51 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: sm (command)
+
+sm command
+==========
+
+Synopsis
+--------
+
+::
+
+    sm serial <address>
+    sm reboot_reason [name]
+    sm efuseread <offset> <size> <address>
+    sm efusewrite <offset> <size> <address>
+    sm efusedump <offset> <size>
+
+Description
+-----------
+
+The sm command is used to request services from the secure monitor. User
+can call secure monitor to request special TEE function, for example chip
+serial number info, reboot reason, etc.
+
+sm serial
+  Retrieve chip unique serial number from sm and write it to memory on
+  appropriate address.
+
+sm reboot_reason
+  Print reboot reason to the console, if parameter [name] isn't specified.
+  If parameter specified, set reboot reason string to environment variable
+  with this name.
+
+sm efuseread
+  Read <size> bytes starting from <offset> from efuse memory bank and write
+  result to the address <address>.
+
+sm efusewrite
+  Write into efuse memory bank, starting from <offset>, the <size> bytes
+  of data, located at address <address>.
+
+sm efusedump
+  Read <size> bytes starting from <offset> from efuse memory bank and print
+  them to the console.
+
+Configuration
+-------------
+
+To use the sm command you must specify CONFIG_CMD_MESON=y
diff --git a/doc/usage/cmd/smbios.rst b/doc/usage/cmd/smbios.rst
new file mode 100644
index 00000000000..1ffd706d7de
--- /dev/null
+++ b/doc/usage/cmd/smbios.rst
@@ -0,0 +1,93 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later:
+
+smbios command
+==============
+
+Synopsis
+--------
+
+::
+
+        smbios
+
+Description
+-----------
+
+The smbios command displays information from the SMBIOS tables.
+
+Examples
+--------
+
+The example below shows an example output of the smbios command.
+
+::
+
+    => smbios
+    SMBIOS 2.8.0 present.
+    8 structures occupying 81 bytes
+    Table at 0x6d35018
+
+    Handle 0x0100, DMI type 1, 27 bytes at 0x6d35018
+    System Information
+        Manufacturer: QEMU
+        Product Name: Standard PC (i440FX + PIIX, 1996)
+        Version: pc-i440fx-2.5
+        Serial Number:
+        UUID 00000000-0000-0000-0000-000000000000
+        Wake Up Type:
+        Serial Number:
+        SKU Number:
+
+    Handle 0x0300, DMI type 3, 22 bytes at 0x6d35069
+    Header and Data:
+        00000000: 03 16 00 03 01 01 02 00 00 03 03 03 02 00 00 00
+        00000010: 00 00 00 00 00 00
+    Strings:
+        String 1: QEMU
+        String 2: pc-i440fx-2.5
+
+    Handle 0x0400, DMI type 4, 42 bytes at 0x6d35093
+    Header and Data:
+        00000000: 04 2a 00 04 01 03 01 02 63 06 00 00 fd ab 81 07
+        00000010: 03 00 00 00 d0 07 d0 07 41 01 ff ff ff ff ff ff
+        00000020: 00 00 00 01 01 01 02 00 01 00
+    Strings:
+        String 1: CPU 0
+        String 2: QEMU
+        String 3: pc-i440fx-2.5
+
+    Handle 0x1000, DMI type 16, 23 bytes at 0x6d350d7
+    Header and Data:
+        00000000: 10 17 00 10 01 03 06 00 00 02 00 fe ff 01 00 00
+        00000010: 00 00 00 00 00 00 00
+
+    Handle 0x1100, DMI type 17, 40 bytes at 0x6d350f0
+    Header and Data:
+        00000000: 11 28 00 11 00 10 fe ff ff ff ff ff 80 00 09 00
+        00000010: 01 00 07 02 00 00 00 02 00 00 00 00 00 00 00 00
+        00000020: 00 00 00 00 00 00 00 00
+    Strings:
+        String 1: DIMM 0
+        String 2: QEMU
+
+    Handle 0x1300, DMI type 19, 31 bytes at 0x6d35125
+    Header and Data:
+        00000000: 13 1f 00 13 00 00 00 00 ff ff 01 00 00 10 01 00
+        00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+
+    Handle 0x2000, DMI type 32, 11 bytes at 0x6d35146
+    Header and Data:
+        00000000: 20 0b 00 20 00 00 00 00 00 00 00
+
+    Handle 0x7f00, DMI type 127, 4 bytes at 0x6d35153
+    End Of Table
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_SMBIOS=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) on success, 1 (false) otherwise.
diff --git a/doc/usage/cmd/sound.rst b/doc/usage/cmd/sound.rst
new file mode 100644
index 00000000000..97d610f3745
--- /dev/null
+++ b/doc/usage/cmd/sound.rst
@@ -0,0 +1,63 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2022, Heinrich Schuchardt <xypron.glpk@gmx.de>
+
+.. index::
+   single: sound (command)
+
+sound command
+=============
+
+Synopsis
+--------
+
+::
+
+    sound init
+    sound play [[len freq] ...] [len [freq]]
+
+Description
+-----------
+
+The *sound* command is used to play one or multiple beep sounds.
+
+sound init
+    initializes the sound driver.
+
+sound play
+    plays a square wave sound. It does not depend on previously calling
+    *sound init*.
+
+len
+    duration of the sound in ms, defaults to 1000 ms
+
+freq
+    frequency of the sound in Hz, defaults to 400 Hz
+
+Examples
+--------
+
+Beep at 400 Hz for 1000 ms::
+
+    sound play
+
+Beep at 400 Hz for 600 ms::
+
+    sound play 600
+
+Beep at 500 Hz for 600 ms::
+
+    sound play 600 500
+
+Play melody::
+
+    sound play 500 1047 500 880 500 0 500 1047 500 880 500 0 500 784 500 698 500 784 1000 698
+
+Configuration
+-------------
+
+The sound command is enabled by CONFIG_CMD_SOUND=y.
+
+Return value
+------------
+
+The return value $? is 0 (true) if the command succeeds, 1 (false) otherwise.
diff --git a/doc/usage/cmd/source.rst b/doc/usage/cmd/source.rst
new file mode 100644
index 00000000000..0de5f33390e
--- /dev/null
+++ b/doc/usage/cmd/source.rst
@@ -0,0 +1,196 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2022, Heinrich Schuchardt <xypron.glpk@gmx.de>
+
+.. index::
+   single: source (command)
+
+source command
+==============
+
+Synopsis
+--------
+
+::
+
+    source [<addr>][:[<image>]|#[<config>]]
+
+Description
+-----------
+
+The *source* command is used to execute a script file from memory.
+
+Two formats for script files exist:
+
+* legacy U-Boot image format
+* Flat Image Tree (FIT)
+
+The benefit of the FIT images is that they can be signed and verifed as
+described in :doc:`../fit/signature`.
+
+Both formats can be created with the mkimage tool.
+
+addr
+    location of the script file in memory, defaults to CONFIG_SYS_LOAD_ADDR.
+
+image
+    name of an image in a FIT file
+
+config
+    name of a configuration in a FIT file. A hash sign following white space
+    starts a comment. Hence, if no *addr* is specified, the hash sign has to be
+    escaped with a backslash or the argument must be quoted.
+
+If both *image* and *config* are omitted, the default configuration is used, or
+if no configuration is defined, the default image.
+
+Examples
+--------
+
+FIT image
+'''''''''
+
+For creating a FIT image an image tree source file (\*.its) is needed. Here is
+an example (source.its).
+
+.. code-block::
+
+    /dts-v1/;
+
+    / {
+        description = "FIT image to test the source command";
+        #address-cells = <1>;
+
+        images {
+            default = "script-1";
+
+            script-1 {
+                data = "echo 1";
+                type = "script";
+                compression = "none";
+            };
+
+            script-2 {
+                data = "echo 2";
+                type = "script";
+                compression = "none";
+            };
+        };
+
+        configurations {
+            default = "conf-2";
+
+            conf-1 {
+                script = "script-1";
+            };
+
+            conf-2 {
+                script = "script-2";
+            };
+        };
+    };
+
+The FIT image file (boot.itb) is created with:
+
+.. code-block:: bash
+
+    mkimage -f source.its boot.itb
+
+In U-Boot the script can be loaded and execute like this
+
+.. code-block::
+
+    => load host 0:1 $loadaddr boot.itb
+    1552 bytes read in 0 ms
+    => source $loadaddr#conf-1
+    ## Executing script at 00000000
+    1
+    => source $loadaddr#conf-2
+    ## Executing script at 00000000
+    2
+    => source $loadaddr:script-1
+    ## Executing script at 00000000
+    1
+    => source $loadaddr:script-2
+    ## Executing script at 00000000
+    2
+    => source $loadaddr
+    ## Executing script at 00000000
+    2
+    => source \#conf-1
+    ## Executing script at 00000000
+    1
+    => source '#conf-1'
+    ## Executing script at 00000000
+    1
+    => source ':script-1'
+    ## Executing script at 00000000
+    1
+    => source
+    ## Executing script at 00000000
+    2
+    =>
+
+Instead of specifying command line instructions directly in the *data* property
+of the image tree source file another file can be included. Here is a minimal
+example which encapsulates the file boot.txt:
+
+.. code-block::
+
+    /dts-v1/;
+    / {
+        description = "";
+        images {
+            script {
+                data = /incbin/("./boot.txt");
+                type = "script";
+            };
+        };
+    };
+
+Legacy U-Boot image
+'''''''''''''''''''
+
+A script file using the legacy U-Boot image file format can be created based on
+a text file. Let's use this example text file (boot.txt):
+
+.. code-block:: bash
+
+    echo Hello from a script
+    echo -------------------
+
+The boot scripts (boot.scr) is created with:
+
+.. code-block:: bash
+
+    mkimage -T script -n 'Test script' -d boot.txt boot.scr
+
+The script can be execute in U-Boot like this:
+
+.. code-block::
+
+    => load host 0:1 $loadaddr boot.scr
+    122 bytes read in 0 ms
+    => source $loadaddr
+    ## Executing script at 00000000
+    Hello from a script
+    -------------------
+    => source
+    ## Executing script at 00000000
+    Hello from a script
+    -------------------
+    =>
+
+Configuration
+-------------
+
+The source command is only available if CONFIG_CMD_SOURCE=y.
+The FIT image file format requires CONFIG_FIT=y.#
+The legacy U-Boot image file format requires CONFIG_LEGACY_IMAGE_FORMAT=y.
+On hardened systems support for the legacy U-Boot image format should be
+disabled as these images cannot be signed and verified.
+
+Return value
+------------
+
+If the scripts is executed successfully, the return value $? is 0 (true).
+Otherwise it is 1 (false).
diff --git a/doc/usage/cmd/temperature.rst b/doc/usage/cmd/temperature.rst
new file mode 100644
index 00000000000..945bc8204ac
--- /dev/null
+++ b/doc/usage/cmd/temperature.rst
@@ -0,0 +1,53 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+.. index::
+   single: temperature (command)
+
+temperature command
+===================
+
+Synopsis
+--------
+
+::
+
+    temperature list
+    temperature get [thermal device name]
+
+Description
+-----------
+
+The *temperature* command is used to list thermal sensors and get their
+readings.
+
+The 'temperature list' command diplays the available thermal devices.
+
+The 'temperature get' command is used to get the reading in degrees C from
+the desired device which is selected by passing its device name.
+
+    thermal device name
+        device name of thermal sensor to select
+
+Example
+-------
+
+::
+
+
+    => temperature list
+    | Device                        | Driver                        | Parent
+    | tmon@610508110                | sparx5-temp                   | axi@600000000
+    =>
+    => temperature get tmon@610508110
+    tmon@610508110: 42 C
+
+Configuration
+-------------
+
+The *temperature* command is only available if CONFIG_CMD_TEMPERATURE=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the command succeeded and to 1 (false)
+otherwise.
diff --git a/doc/usage/cmd/tftpput.rst b/doc/usage/cmd/tftpput.rst
new file mode 100644
index 00000000000..351c9faa38b
--- /dev/null
+++ b/doc/usage/cmd/tftpput.rst
@@ -0,0 +1,90 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: tftpput (command)
+
+tftpput command
+===============
+
+Synopsis
+--------
+
+::
+
+    tftpput address size [[hostIPaddr:]filename]
+
+Description
+-----------
+
+The tftpput command is used to transfer a file to a TFTP server.
+
+By default the destination port is 69 and the source port is pseudo-random.
+If CONFIG_TFTP_PORT=y, the environment variable *tftpsrcp* can be used to set
+the source port and the environment variable *tftpdstp* can be used to set
+the destination port.
+
+address
+    memory address where the data starts
+
+size
+    number of bytes to be transferred
+
+hostIPaddr
+    IP address of the TFTP server, defaults to the value of environment
+    variable *serverip*
+
+filename
+    path of the file to be written. If not provided, the client's IP address is
+    used to construct a default file name, e.g. C0.A8.00.28.img for IP address
+    192.168.0.40.
+
+Example
+-------
+
+In the example the following steps are executed:
+
+* setup client network address
+* load a file from the SD-card
+* send the file via TFTP to a server
+
+::
+
+    => setenv autoload no
+    => dhcp
+    BOOTP broadcast 1
+    DHCP client bound to address 192.168.1.40 (7 ms)
+    => load mmc 0:1 $loadaddr test.txt
+    260096 bytes read in 13 ms (19.1 MiB/s)
+    => tftpput $loadaddr $filesize 192.168.1.3:upload/test.txt
+    Using ethernet@1c30000 device
+    TFTP to server 192.168.1.3; our IP address is 192.168.1.40
+    Filename 'upload/test.txt'.
+    Save address: 0x42000000
+    Save size:    0x3f800
+    Saving: #################
+         4.4 MiB/s
+    done
+    Bytes transferred = 260096 (3f800 hex)
+    =>
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_TFTPPUT=y.
+
+CONFIG_TFTP_BLOCKSIZE defines the size of the TFTP blocks sent. It defaults
+to 1468 matching an ethernet MTU of 1500.
+
+If CONFIG_TFTP_PORT=y, the environment variables *tftpsrcp* and *tftpdstp* can
+be used to set the source and the destination ports.
+
+CONFIG_TFTP_WINDOWSIZE can be used to set the TFTP window size of transmits
+after which an ACK response is required. The window size defaults to 1.
+
+If CONFIG_TFTP_TSIZE=y, the progress bar is limited to 50 '#' characters.
+Otherwise an '#' is written per UDP package which may decrease performance.
+
+Return value
+------------
+
+The return value $? is 0 (true) on success and 1 (false) otherwise.
diff --git a/doc/usage/cmd/trace.rst b/doc/usage/cmd/trace.rst
new file mode 100644
index 00000000000..e798b2bbc6b
--- /dev/null
+++ b/doc/usage/cmd/trace.rst
@@ -0,0 +1,166 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: trace (command)
+
+trace command
+=============
+
+Synopsis
+--------
+
+::
+
+    trace stats
+    trace pause
+    trace resume
+    trace funclist [<addr> <size>]
+    trace calls [<addr> <size>]
+
+Description
+-----------
+
+The *trace* command is used to control the U-Boot tracing system. It allows
+tracing to be paused and resumed, shows statistics for traces and provides a
+way to dump out the trace information.
+
+
+trace stats
+~~~~~~~~~~~
+
+This display tracing statistics, as follows:
+
+function sites
+    Functions are binned as a way of reducing the amount of space needed to
+    hold all the function information. This is controlled by FUNC_SITE_SIZE in
+    the trace.h header file. The usual value is 4, which provides the finest
+    granularity (assuming a minimum instruction size of 4 bytes) which means
+    that every function can be resolved individually.
+
+function calls
+    Total number of function calls, including those which were not traced due
+    to buffer space. This count does not include functions which exceeded the
+    depth limit.
+
+untracked function calls
+    Total number of function calls which did not appear in the U-Boot image.
+    This can happen if a function is called outside the normal code area.
+
+traced function calls
+    Total number of function calls which were actually traced, i.e. are included
+    in the recorded trace data.
+
+dropped due to overflow
+    If the trace buffer was exhausted then this shows the number of records that
+    were dropped. Try reducing the depth limit or expanding the buffer size.
+
+maximum observed call depth
+    Maximum observed call depth while tracing.
+
+calls not traced due to depth
+    Counts the number of function calls that were not recorded because they
+    exceeded the maximum call depth.
+
+max function calls
+    Maximum number of function calls which can be recorded in the trace buffer,
+    given its size. Once `function calls` hits this value, recording stops.
+
+trace buffer
+    Address of trace buffer
+
+call records
+    Address of first trace record. This is near the start of the trace buffer,
+    after the function-call counts.
+
+
+trace pause
+~~~~~~~~~~~
+
+Pauses tracing, so that no more data is added to the trace buffer.
+
+
+trace resume
+~~~~~~~~~~~~
+
+Resumes tracing, so that new function calls are added to the trace buffer if
+there is sufficient space.
+
+
+trace funclist [<addr> <size>]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Dumps a list of functions into the provided buffer. The file uses a format
+specific to U-Boot: a header, following by the function offset and call count.
+
+If the address and size are not given, these are obtained from
+:ref:`develop/trace:environment variables`. In any case the environment
+variables are updated after the command runs.
+
+The resulting data should be written out to the host, e.g. using Ethernet or
+a filesystem. There are no tools provided to read this sdata.
+
+
+trace calls [<addr> <size>]
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Dumps a list of function calls into the provided buffer. The file uses a format
+specific to U-Boot: a header, following by the list of calls. The proftool
+tool can be used to convert this information ready for further analysis.
+
+
+Example
+-------
+
+::
+
+    => trace stats
+            269,252 function sites
+         38,025,059 function calls
+                  3 untracked function calls
+          7,382,690 traced function calls
+                 17 maximum observed call depth
+                 15 call depth limit
+         68,667,432 calls not traced due to depth
+         22,190,112 max function calls
+
+    trace buffer 6c000000 call records 6c20de78
+    => trace resume
+    => trace pause
+
+This shows that resuming the trace causes the buffer to overflow::
+
+    => trace stats
+            269,252 function sites
+         49,573,694 function calls
+                  3 untracked function calls
+         22,190,112 traced function calls (8289848 dropped due to overflow)
+                 17 maximum observed call depth
+                 15 call depth limit
+         68,667,432 calls not traced due to depth
+         22,190,112 max function calls
+
+    trace buffer 6c000000 call records 6c20de78
+    => trace funcs 30000000 0x100000
+    Function trace dumped to 30000000, size 0x1e70
+
+This shows collecting and writing out the result trace data:
+
+::
+    => trace calls 20000000 0x10000000
+    Call list dumped to 20000000, size 0xfdf21a0
+    => save mmc 1:1 20000000 /trace ${profoffset}
+    File System is consistent
+    file found, deleting
+    update journal finished
+    File System is consistent
+    update journal finished
+    266281376 bytes written in 18584 ms (13.7 MiB/s)
+
+From here you can use proftool to convert it:
+
+.. code-block:: bash
+
+    tools/proftool -m System.map -t trace -o asc.fg dump-ftrace
+
+
+.. _`ACPI specification`: https://uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf
diff --git a/doc/usage/cmd/true.rst b/doc/usage/cmd/true.rst
new file mode 100644
index 00000000000..adf641386b5
--- /dev/null
+++ b/doc/usage/cmd/true.rst
@@ -0,0 +1,31 @@
+.. index::
+   single: true (command)
+
+true command
+============
+
+Synopsis
+--------
+
+::
+
+    true
+
+Description
+-----------
+
+The true command sets the return value $? to 0 (true).
+
+Example
+-------
+
+::
+
+    => true; echo $?
+    0
+    =>
+
+Configuration
+-------------
+
+The true command is only available if CONFIG_HUSH_PARSER=y.
diff --git a/doc/usage/cmd/ums.rst b/doc/usage/cmd/ums.rst
new file mode 100644
index 00000000000..9d379e3c829
--- /dev/null
+++ b/doc/usage/cmd/ums.rst
@@ -0,0 +1,60 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+.. index::
+   single: ums (command)
+
+ums command
+===========
+
+Synopsis
+--------
+
+::
+
+    ums <dev> [<interface>] <devnum[:partnum]>
+
+Description
+-----------
+
+Use the USB Mass Storage class (also known as UMS) to make accessible an U-Boot
+block device (fully or with :ref:`U-Boot's partition syntax <partitions>`)
+to a USB host and to enable file transfers. U-Boot, the USB device, acts as a
+simple external hard drive plugged on the host USB port.
+
+This command "ums" stays in the USB's treatment loop until user enters Ctrl-C.
+
+dev
+    USB gadget device number
+
+interface
+    interface for accessing the block device (mmc, sata, scsi, usb, ....)
+    defaults is "mmc"
+
+devnum
+    device number for selected interface
+
+partnum
+    partition number or 0 to expose all partitions, defaults to 0
+
+Example
+-------
+
+::
+
+    => ums 0 mmc 0
+    => ums 0 usb 1:2
+
+Configuration
+-------------
+
+The ums command is only available if CONFIG_CMD_USB_MASS_STORAGE=y
+and depends on CONFIG_USB_USB_GADGET and CONFIG_BLK.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) when the USB stack was successfully
+started and interrupted, with Ctrl-C or after USB cable issue (detection
+timeout or cable removal).
+
+If an error occurs, the return value $? is set to 1 (false).
diff --git a/doc/usage/cmd/unbind.rst b/doc/usage/cmd/unbind.rst
new file mode 100644
index 00000000000..0309e90f6ea
--- /dev/null
+++ b/doc/usage/cmd/unbind.rst
@@ -0,0 +1,98 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: unbind (command)
+
+unbind command
+==============
+
+Synopsis
+--------
+
+::
+
+    unbind <node path>
+    unbind <class> <index>
+    unbind <class> <index> <driver>
+
+Description
+-----------
+
+The unbind command is used to unbind a device from a driver. This makes the
+device unavailable in U-Boot.
+
+node path
+    path of the device's device-tree node
+
+class
+    device class name
+
+index
+    index of the device in the device class
+
+driver
+    device driver name
+
+Example
+-------
+
+Given a system with a real time clock device with device path */pl031@9010000*
+and using driver rtc-pl031 unbinding and binding of the device is demonstrated
+using the three alternative unbind syntaxes.
+
+.. code-block::
+
+    => dm tree
+     Class     Index  Probed  Driver                Name
+    -----------------------------------------------------------
+     root          0  [ + ]   root_driver           root_driver
+    ...
+     rtc           0  [   ]   rtc-pl031             |-- pl031@9010000
+    ...
+    => fdt addr $fdtcontroladdr
+    Working FDT set to 7ed7fdb0
+    => fdt print
+    / {
+            interrupt-parent = <0x00008003>;
+            model = "linux,dummy-virt";
+            #size-cells = <0x00000002>;
+            #address-cells = <0x00000002>;
+            compatible = "linux,dummy-virt";
+    ...
+            pl031@9010000 {
+                    clock-names = "apb_pclk";
+                    clocks = <0x00008000>;
+                    interrupts = <0x00000000 0x00000002 0x00000004>;
+                    reg = <0x00000000 0x09010000 0x00000000 0x00001000>;
+                    compatible = "arm,pl031", "arm,primecell";
+            };
+    ...
+    }
+    => unbind /pl031@9010000
+    => dm tree
+     Class     Index  Probed  Driver                Name
+    -----------------------------------------------------------
+     root          0  [ + ]   root_driver           root_driver
+    ...
+    => unbind /pl031@9010000
+    Cannot find a device with path /pl031@9010000
+    => bind /pl031@9010000 rtc-pl031
+    => dm tree
+     Class     Index  Probed  Driver                Name
+    -----------------------------------------------------------
+     root          0  [ + ]   root_driver           root_driver
+    ...
+     rtc           0  [   ]   rtc-pl031             |-- pl031@9010000
+    => unbind rtc 0
+    => bind /pl031@9010000 rtc-pl031
+    => unbind rtc 0 rtc-pl031
+
+Configuration
+-------------
+
+The unbind command is only available if CONFIG_CMD_BIND=y.
+
+Return code
+-----------
+
+The return code $? is 0 (true) on success and 1 (false) on failure.
diff --git a/doc/usage/cmd/ut.rst b/doc/usage/cmd/ut.rst
new file mode 100644
index 00000000000..45bc9ffbdc5
--- /dev/null
+++ b/doc/usage/cmd/ut.rst
@@ -0,0 +1,120 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: ut (command)
+
+ut command
+==========
+
+Synopsis
+--------
+
+::
+
+    ut [-r<runs>] [-f] [-I<n>:<one_test>] [<suite> [<test>]]
+
+       <runs>      Number of times to run each test
+       -f          Force 'manual' tests to run as well
+       <n>         Run <one test> after <n> other tests have run
+       <one_test>  Name of the 'one' test to run
+       <suite>     Test suite to run, or `all`
+       <test>      Name of single test to run
+
+Description
+-----------
+
+The ut command runs unit tests written in C.
+
+Typically the command is run on :ref:`arch/sandbox/sandbox:sandbox` since it
+includes a near-complete set of emulators, no code-size limits, many CONFIG
+options enabled and runs easily in CI without needing QEMU. It is also possible
+to run some tests on real boards.
+
+For a list of available test suites, type `ut` by itself.
+
+Each test is normally run once, although those marked with `UT_TESTF_DM` are
+run with livetree and flattree where possible. To run a test more than once,
+use the `-r` flag.
+
+Manual tests are normally skipped by this command. Use `-f` to run them. See
+See :ref:`develop/tests_writing:mixing python and c` for more information on
+manual test.
+
+When running unit tests, some may have side effects which cause a subsequent
+test to break. This can sometimes be seen when using 'ut dm' or similar. To
+fix this, select the 'one' test which breaks. Then tell the 'ut' command to
+run this one test after a certain number of other tests have run. Using a
+binary search method with `-I` you can quickly figure one which test is causing
+the problem.
+
+Generally all tests in the suite are run. To run just a single test from the
+suite, provide the <test> argument.
+
+See :ref:`develop/tests_writing:writing c tests` for more information on how to
+write unit tests.
+
+Example
+-------
+
+List available unit-test suites::
+
+    => ut
+    ut - unit tests
+
+    Usage:
+    ut [-r] [-f] [<suite>] - run unit tests
+    -r<runs>   Number of times to run each test
+    -f         Force 'manual' tests to run as well
+    <suite>    Test suite to run, or all
+
+    Suites:
+    all - execute all enabled tests
+    addrmap - very basic test of addrmap command
+    bloblist - bloblist implementation
+    bootstd - standard boot implementation
+    compression - compressors and bootm decompression
+    dm - driver model
+    env - environment
+    fdt - fdt command
+    loadm - loadm command parameters and loading memory blob
+    lib - library functions
+    log - logging functions
+    mem - memory-related commands
+    overlay - device tree overlays
+    print  - printing things to the console
+    setexpr - setexpr command
+    str - basic test of string functions
+    time - very basic test of time functions
+    unicode - Unicode functions
+
+Run one of the suites::
+
+    => ut bloblist
+    Running 14 bloblist tests
+    Test: bloblist_test_align: bloblist.c
+    Test: bloblist_test_bad_blob: bloblist.c
+    Test: bloblist_test_blob: bloblist.c
+    Test: bloblist_test_blob_ensure: bloblist.c
+    Test: bloblist_test_blob_maxsize: bloblist.c
+    Test: bloblist_test_checksum: bloblist.c
+    Test: bloblist_test_cmd_info: bloblist.c
+    Test: bloblist_test_cmd_list: bloblist.c
+    Test: bloblist_test_grow: bloblist.c
+    Test: bloblist_test_init: bloblist.c
+    Test: bloblist_test_reloc: bloblist.c
+    Test: bloblist_test_resize_fail: bloblist.c
+    Test: bloblist_test_resize_last: bloblist.c
+    Test: bloblist_test_shrink: bloblist.c
+    Failures: 0
+
+Run just a single test in a suite::
+
+    => ut bloblist bloblist_test_grow
+    Test: bloblist_test_grow: bloblist.c
+    Failures: 0
+
+Show information about tests::
+
+    => ut info
+    Test suites: 21
+    Total tests: 642
diff --git a/doc/usage/cmd/wdt.rst b/doc/usage/cmd/wdt.rst
new file mode 100644
index 00000000000..f48b8840907
--- /dev/null
+++ b/doc/usage/cmd/wdt.rst
@@ -0,0 +1,80 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: wdt (command)
+
+wdt command
+===========
+
+Synopsis
+--------
+
+::
+
+    wdt list
+    wdt dev [<name>]
+    wdt start <timeout_ms> [flags]
+    wdt stop
+    wdt reset
+    wdt expirer [flags]
+
+Description
+-----------
+
+The wdt command is used to control watchdog timers.
+
+The 'wdt list' command shows a list of all watchdog devices.
+
+The 'wdt dev' command called without argument shows the current watchdog device.
+The current device is set when passing the name of the device as argument.
+
+The 'wdt start' command starts the current watchdog timer.
+
+The 'wdt stop' command stops the current watchdog timer.
+
+The 'wdt reset' command resets the current watchdog timer without stopping it.
+
+The 'wdt expire' command let's the current watchdog timer expire immediately.
+This will lead to a reset.
+
+name
+    name of the watchdog device
+
+timeout_ms
+    timeout interval in milliseconds
+
+flags
+    unsigned long value passed to the driver. The usage is driver specific.
+    The value is ignored by most drivers.
+
+Example
+-------
+
+::
+
+    => wdt dev
+    No watchdog timer device set!
+    => wdt list
+    watchdog@1c20ca0 (sunxi_wdt)
+    => wdt dev watchdog@1c20ca0
+    => wdt dev
+    dev: watchdog@1c20ca0
+    => wdt start 3000
+    => wdt reset
+    => wdt stop
+    => wdt expire
+
+    U-Boot SPL 2022.04-rc3 (Mar 25 2022 - 13:48:33 +0000)
+
+ In the example above '(sunxi_wdt)' refers to the driver for the watchdog
+ device.
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_WDT=y.
+
+Return value
+------------
+
+The return value $? is 0 if the command succeeds, 1 upon failure.
diff --git a/doc/usage/cmd/wget.rst b/doc/usage/cmd/wget.rst
new file mode 100644
index 00000000000..b8ca35bb140
--- /dev/null
+++ b/doc/usage/cmd/wget.rst
@@ -0,0 +1,66 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: wget (command)
+
+wget command
+============
+
+Synopsis
+--------
+
+::
+
+    wget address [[hostIPaddr:]path]
+
+Description
+-----------
+
+The wget command is used to download a file from an HTTP server.
+
+wget command will use HTTP over TCP to download files from an HTTP server.
+By default the destination port is 80 and the source port is pseudo-random.
+The environment variable *httpdstp* can be used to set the destination port.
+
+address
+    memory address for the data downloaded
+
+hostIPaddr
+    IP address of the HTTP server, defaults to the value of environment
+    variable *serverip*
+
+path
+    path of the file to be downloaded.
+
+Example
+-------
+
+In the example the following steps are executed:
+
+* setup client network address
+* download a file from the HTTP server
+
+::
+
+    => setenv autoload no
+    => dhcp
+    BOOTP broadcast 1
+    *** Unhandled DHCP Option in OFFER/ACK: 23
+    *** Unhandled DHCP Option in OFFER/ACK: 23
+    DHCP client bound to address 192.168.1.105 (210 ms)
+    => wget ${loadaddr} 192.168.1.254:/index.html
+    HTTP/1.0 302 Found
+    Packets received 4, Transfer Successful
+
+Configuration
+-------------
+
+The command is only available if CONFIG_CMD_WGET=y.
+
+TCP Selective Acknowledgments can be enabled via CONFIG_PROT_TCP_SACK=y.
+This will improve the download speed.
+
+Return value
+------------
+
+The return value $? is 0 (true) on success and 1 (false) otherwise.
diff --git a/doc/usage/cmd/write.rst b/doc/usage/cmd/write.rst
new file mode 100644
index 00000000000..f42dc003dd4
--- /dev/null
+++ b/doc/usage/cmd/write.rst
@@ -0,0 +1,9 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later:
+
+.. index::
+   single: write (command)
+
+write command
+=============
+
+See :doc:`read`.
diff --git a/doc/usage/cmd/xxd.rst b/doc/usage/cmd/xxd.rst
new file mode 100644
index 00000000000..f010a9dbb4d
--- /dev/null
+++ b/doc/usage/cmd/xxd.rst
@@ -0,0 +1,53 @@
+.. SPDX-License-Identifier: GPL-2.0+:
+
+.. index::
+   single: xxd (command)
+
+xxd command
+===========
+
+Synopsis
+--------
+
+::
+
+    xxd <interface> <dev[:part]> <file>
+
+Description
+-----------
+
+The xxd command prints the file content as hexdump to standard out.
+
+interface
+    interface for accessing the block device (mmc, sata, scsi, usb, ....)
+
+dev
+    device number
+
+part
+    partition number, defaults to 1
+
+file
+    path to file
+
+Example
+-------
+
+Here is the output for a example text file:
+
+::
+
+    => xxd mmc 0:1 hello
+    00000000: 68 65 6c 6c 6f 20 77 6f 72 6c 64 0a 00 01 02 03  hello world.....
+    00000010: 04 05                                            ..
+    =>
+
+Configuration
+-------------
+
+The xxd command is only available if CONFIG_CMD_XXD=y.
+
+Return value
+------------
+
+The return value $? is set to 0 (true) if the file is readable, otherwise it returns a non-zero error code.
diff --git a/doc/usage/cmdline.rst b/doc/usage/cmdline.rst
new file mode 100644
index 00000000000..58240c5279c
--- /dev/null
+++ b/doc/usage/cmdline.rst
@@ -0,0 +1,93 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Command-line Parsing
+====================
+
+The command line is available in U-Boot proper, enabled by CONFIG_CMDLINE which
+is on by default. It is not enabled in SPL.
+
+There are two different command-line parsers available with U-Boot:
+the old "simple" one, and the much more powerful "hush" shell:
+
+Simple command-line parser
+--------------------------
+
+This takes very little code space and offers only basic features:
+
+- supports environment variables (through :doc:`cmd/env`)
+- several commands on one line, separated by ';'
+- variable substitution using "... ${name} ..." syntax
+- special characters ('$', ';') can be escaped by prefixing with '\',
+  for example::
+
+    setenv bootcmd bootm \${address}
+
+- You can also escape text by enclosing in single apostrophes, for example::
+
+    setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
+
+Hush shell
+----------
+
+This is similar to Bourne shell, with control structures like:
+
+- `if`... `then` ... `else`... `fi`
+- `for`... `do` ... `done`
+- `while` ... `do` ... `done`
+- `until` ... `do` ... `done`
+
+Hush supports environment ("global") variables (through setenv / saveenv
+commands) and local shell variables (through standard shell syntax
+`name=value`); only environment variables can be used with the "run" command
+
+The Hush shell is enabled with `CONFIG_HUSH_PARSER`.
+
+General rules
+-------------
+
+#. If a command line (or an environment variable executed by a "run"
+   command) contains several commands separated by semicolon, and
+   one of these commands fails, then the remaining commands will be
+   executed anyway.
+
+#. If you execute several variables with one call to run (i. e.
+   calling run with a list of variables as arguments), any failing
+   command will cause "run" to terminate, i. e. the remaining
+   variables are not executed.
+
+Representing numbers
+--------------------
+
+Most U-Boot commands use hexadecimal (hex) as the default base, for convenient
+use of addresses, for example::
+
+  => md 1000 6
+  00001000: 2c786f62 00697073 03000000 0c000000  box,spi.........
+  00001010: 67020000 00000000                    ...g....
+
+There is no need to add a `0x` prefix to the arguments and the output is shown
+in hex also, without any prefixes. This helps to avoid clutter.
+
+Some commands use decimal where it is more natural::
+
+  => i2c dev 0
+  Setting bus to 0
+  => i2c speed
+  Current bus speed=400000
+  => i2c speed 100000
+  Setting bus speed to 100000 Hz
+
+In some cases the default is decimal but it is possible to use octal if that is
+useful::
+
+  pmic dev pmic@41
+  dev: 1 @ pmic@41
+  => pmic write 2 0177
+  => pmic read 2
+  0x02: 0x00007f
+
+It is possible to use a `0x` prefix to use a hex value if that is more
+convenient::
+
+  => i2c speed 0x30000
+  Setting bus speed to 196608 Hz
diff --git a/doc/usage/dfu.rst b/doc/usage/dfu.rst
new file mode 100644
index 00000000000..8cc09c308d8
--- /dev/null
+++ b/doc/usage/dfu.rst
@@ -0,0 +1,432 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Device Firmware Upgrade (DFU)
+=============================
+
+Overview
+--------
+
+Device Firmware Upgrade (DFU) enables the download and upload of firmware
+to/from U-Boot while connected over USB.
+
+U-Boot follows the Universal Serial Bus Device Class Specification for
+Device Firmware Upgrade Version 1.1 from the USB forum (DFU v1.1 in www.usb.org).
+
+U-Boot implements this DFU capability (CONFIG_DFU) with the command dfu
+(cmd/dfu.c / CONFIG_CMD_DFU) based on:
+
+- the DFU stack (common/dfu.c and common/spl/spl_dfu.c), based on the
+  USB DFU download gadget (drivers/usb/gadget/f_dfu.c)
+- The access to mediums is done in DFU backends (driver/dfu)
+
+Today the supported DFU backends are:
+
+- MMC (RAW or FAT / EXT2 / EXT3 / EXT4 file system / SKIP / SCRIPT)
+- NAND
+- RAM
+- SF (serial flash)
+- MTD (all MTD device: NAND, SPI-NOR, SPI-NAND,...)
+- virtual
+
+These DFU backends are also used by
+
+- the dfutftp (see README.dfutftp)
+- the thordown command (cmd/thordown.c and gadget/f_thor.c)
+
+The "virtual" backend is a generic DFU backend to support a board specific
+target (for example OTP), only based on the weak functions:
+
+- dfu_write_medium_virt
+- dfu_get_medium_size_virt
+- dfu_read_medium_virt
+
+Configuration Options
+---------------------
+
+The following configuration options are relevant to device firmware upgrade:
+
+* CONFIG_DFU
+* CONFIG_DFU_OVER_USB
+* CONFIG_DFU_MMC
+* CONFIG_DFU_MTD
+* CONFIG_DFU_NAND
+* CONFIG_DFU_RAM
+* CONFIG_DFU_SF
+* CONFIG_DFU_SF_PART
+* CONFIG_DFU_TIMEOUT
+* CONFIG_DFU_VIRTUAL
+* CONFIG_CMD_DFU
+
+Environment variables
+---------------------
+
+The dfu command uses 3 environment variables:
+
+dfu_alt_info
+    The DFU setting for the USB download gadget with a semicolon separated
+    string of information on each alternate::
+
+        dfu_alt_info="<alt1>;<alt2>;....;<altN>"
+
+    When several devices are used, the format is:
+
+    - <interface> <dev>'='alternate list (';' separated)
+    - each interface is separated by '&'::
+
+        dfu_alt_info=\
+            "<interface1> <dev1>=<alt1>;....;<altN>&"\
+            "<interface2> <dev2>=<altN+1>;....;<altM>&"\
+            ...\
+            "<interfaceI> <devI>=<altY+1>;....;<altZ>&"
+
+dfu_bufsiz
+    size of the DFU buffer, when absent, defaults to
+    CONFIG_SYS_DFU_DATA_BUF_SIZE (8 MiB by default)
+
+dfu_hash_algo
+    name of the hash algorithm to use
+
+Commands
+--------
+
+dfu <USB_controller> [<interface> <dev>] list
+    List the alternate device defined in *dfu_alt_info*.
+
+dfu <USB_controller> [<interface> <dev>] [<timeout>]
+    Start the dfu stack on the USB instance with the selected medium
+    backend and use the *dfu_alt_info* variable to configure the
+    alternate setting and link each one with the medium.
+    The dfu command continues until it receives a ^C in the console or
+    a DFU detach transaction from the HOST. If the CONFIG_DFU_TIMEOUT option
+    is enabled and a <timeout> parameter is present in the command line,
+    the DFU operation will be aborted automatically after <timeout>
+    seconds of waiting for the remote to initiate a DFU session.
+
+The possible values of <interface> are (with <USB controller> = 0 in the dfu
+command example)
+
+mmc
+    for eMMC and SD card::
+
+        dfu 0 mmc <dev>
+
+    each element in *dfu_alt_info* being
+
+    * <name> raw <offset> <size> [mmcpart <num>]   raw access to mmc device
+    * <name> part <dev> <part_id> [offset <byte>]  raw access to partition
+    * <name> fat <dev> <part_id>                   file in FAT partition
+    * <name> ext4 <dev> <part_id>                  file in EXT4 partition
+    * <name> skip 0 0                              ignore flashed data
+    * <name> script 0 0                            execute commands in shell
+
+    with
+
+    offset
+        is the offset in the device (hexadecimal without "0x")
+    size
+        is the size of the access area (hexadecimal without "0x")
+        or 0 which means whole device
+    partid
+        being the GPT or DOS partition index,
+    num
+         being the eMMC hardware partition number.
+
+    A value of environment variable *dfu_alt_info* for eMMC could be::
+
+        u-boot raw 0x3e 0x800 mmcpart 1;bl2 raw 0x1e 0x1d mmcpart 1
+
+    A value of environment variable *dfu_alt_info* for SD card could be::
+
+        u-boot raw 0x80 0x800;uImage ext4 0 2
+
+    If you don't want to flash the given image file to storage, use the "skip"
+    type entity.
+
+    - It can be used to protect from flashing the wrong image for the specific board.
+    - Especially, this layout will be useful when the thor protocol is used,
+      which performs flashing in batch mode, where more than one file is
+      processed.
+
+    For example, if one makes a single tar file with support for the two
+    boards with u-boot-<board1>.bin and u-boot-<board2>.bin files, one
+    can use it to flash a proper u-boot image on both without a failure::
+
+        u-boot-<board1>.bin raw 0x80 0x800; u-boot-<board2>.bin skip 0 0
+
+    When flashing a new system image requires you to do some more complex
+    things than just writing data to the storage medium, one can use 'script'
+    type. Data written to such an entity will be executed as a command list
+    in the u-boot's shell. This for example allows you to re-create a partition
+    layout and even set a new *dfu_alt_info* for the newly created partitions.
+    Such a script would look like::
+
+        setenv dfu_alt_info ...
+        setenv mbr_parts ...
+        mbr write ...
+
+    Please note that this means the user will be able to execute any
+    arbitrary commands just like in the u-boot's shell.
+
+nand
+    raw slc nand device::
+
+         dfu 0 nand <dev>
+
+    each element in *dfu_alt_info* being either of
+
+    * <name> raw <offset> <size>        raw access to nand device
+    * <name> part <dev_id> <part_id>     raw access to partition
+    * <name> partubi <dev_id> <part_id>  raw access to ubi partition
+
+    with
+
+    offset
+        is the offset in the nand device (hexadecimal without "0x")
+    size
+        is the size of the access area (hexadecimal without "0x")
+    dev_id
+        is the NAND device index (decimal only)
+    part_id
+        is the NAND partition index (decimal only)
+
+ram
+    raw access to ram::
+
+         dfu 0 ram <dev>
+
+    dev
+        is not used for RAM target
+
+    each element in *dfu_alt_info* being::
+
+      <name> ram <offset> <size>  raw access to ram
+
+    with
+
+    offset
+        is the offset in the ram device (hexadecimal without "0x")
+    size
+        is the size of the access area (hexadecimal without "0x")
+
+sf
+    serial flash : NOR::
+
+        cmd: dfu 0 sf <dev>
+
+    each element in *dfu_alt_info* being either of:
+
+    * <name> raw <offset> <size>  raw access to sf device
+    * <name> part <dev_id> <part_id>  raw access to partition
+    * <name> partubi <dev_id> <part_id>  raw access to ubi partition
+
+    with
+
+    offset
+        is the offset in the sf device (hexadecimal without "0x")
+    size
+        is the size of the access area (hexadecimal without "0x")
+    dev_id
+        is the sf device index (the device is "nor<dev_id>") (deximal only)
+    part_id
+        is the MTD partition index (decimal only)
+
+mtd
+    all MTD device: NAND, SPI-NOR, SPI-NAND,...::
+
+        cmd: dfu 0 mtd <dev>
+
+    with
+
+    dev
+        the mtd identifier as defined in mtd command
+        (nand0, nor0, spi-nand0,...)
+
+    each element in *dfu_alt_info* being either of:
+
+    * <name> raw <offset> <size>  for raw access to mtd device
+    * <name> part <part_id>       for raw access to partition
+    * <name> partubi <part_id>    for raw access to ubi partition
+
+    with
+
+    offset
+        is the offset in the mtd device (hexadecimal without "0x")
+    size
+        is the size of the access area (hexadecimal without "0x")
+    part_id
+        is the MTD partition index (decimal only)
+
+virt
+    virtual flash back end for DFU
+
+    ::
+
+        cmd: dfu 0 virt <dev>
+
+    each element in *dfu_alt_info* being:
+
+    * <name>
+
+<interface> and <dev> are absent, the dfu command to use multiple devices::
+
+    cmd: dfu 0 list
+    cmd: dfu 0
+
+*dfu_alt_info* variable provides the list of <interface> <dev> with
+alternate list separated by '&' with the same format for each <alt>::
+
+    mmc <dev>=<alt1>;....;<altN>
+    nand <dev>=<alt1>;....;<altN>
+    ram <dev>=<alt1>;....;<altN>
+    sf <dev>=<alt1>;....;<altN>
+    mtd <dev>=<alt1>;....;<altN>
+    virt <dev>=<alt1>;....;<altN>
+
+Callbacks
+---------
+
+The weak callback functions can be implemented to manage specific behavior
+
+dfu_initiated_callback
+   called when the DFU transaction is started, used to initialize the device
+
+dfu_flush_callback
+    called at the end of the DFU write after DFU manifestation, used to manage
+    the device when the DFU transaction is closed
+
+Host tools
+----------
+
+When U-Boot runs the dfu stack, the DFU host tools can be used
+to send/receive firmware images on each configured alternate.
+
+For example dfu-util is a host side implementation of the DFU 1.1
+specifications(http://dfu-util.sourceforge.net/) which works with U-Boot.
+
+Usage
+-----
+
+Example 1: firmware located in eMMC or SD card, with:
+
+- alternate 1 (alt=1) for SPL partition (GPT partition 1)
+- alternate 2 (alt=2) for U-Boot partition (GPT partition 2)
+
+The U-Boot configuration is::
+
+  U-Boot> env set dfu_alt_info "spl part 0 1;u-boot part 0 2"
+
+  U-Boot> dfu 0 mmc 0 list
+  DFU alt settings list:
+  dev: eMMC alt: 0 name: spl layout: RAW_ADDR
+  dev: eMMC alt: 1 name: u-boot layout: RAW_ADDR
+
+  Boot> dfu 0 mmc 0
+
+On the Host side:
+
+list the available alternate setting::
+
+  $> dfu-util -l
+  dfu-util 0.9
+
+  Copyright 2005-2009 Weston Schmidt, Harald Welte and OpenMoko Inc.
+  Copyright 2010-2016 Tormod Volden and Stefan Schmidt
+  This program is Free Software and has ABSOLUTELY NO WARRANTY
+  Please report bugs to http://sourceforge.net/p/dfu-util/tickets/
+
+  Found DFU: [0483:5720] ver=0200, devnum=45, cfg=1, intf=0, path="3-1.3.1", \
+     alt=1, name="u-boot", serial="003A00203438510D36383238"
+  Found DFU: [0483:5720] ver=0200, devnum=45, cfg=1, intf=0, path="3-1.3.1", \
+     alt=0, name="spl", serial="003A00203438510D36383238"
+
+  To download to U-Boot, use -D option
+
+  $> dfu-util -a 0 -D u-boot-spl.bin
+  $> dfu-util -a 1 -D u-boot.bin
+
+  To upload from U-Boot, use -U option
+
+  $> dfu-util -a 0 -U u-boot-spl.bin
+  $> dfu-util -a 1 -U u-boot.bin
+
+  To request a DFU detach and reset the USB connection:
+  $> dfu-util -a 0 -e  -R
+
+
+Example 2: firmware located in NOR (sf) and NAND, with:
+
+- alternate 1 (alt=1) for SPL partition (NOR GPT partition 1)
+- alternate 2 (alt=2) for U-Boot partition (NOR GPT partition 2)
+- alternate 3 (alt=3) for U-Boot-env partition (NOR GPT partition 3)
+- alternate 4 (alt=4) for UBI partition (NAND GPT partition 1)
+
+::
+
+  U-Boot> env set dfu_alt_info \
+  "sf 0:0:10000000:0=spl part 0 1;u-boot part 0 2; \
+  u-boot-env part 0 3&nand 0=UBI partubi 0,1"
+
+  U-Boot> dfu 0 list
+
+  DFU alt settings list:
+  dev: SF alt: 0 name: spl layout: RAW_ADDR
+  dev: SF alt: 1 name: ssbl layout: RAW_ADDR
+  dev: SF alt: 2 name: u-boot-env layout: RAW_ADDR
+  dev: NAND alt: 3 name: UBI layout: RAW_ADDR
+
+  U-Boot> dfu 0
+
+::
+
+  $> dfu-util -l
+  Found DFU: [0483:5720] ver=9999, devnum=96, cfg=1,\
+     intf=0, alt=3, name="UBI", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=96, cfg=1,\
+     intf=0, alt=2, name="u-boot-env", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=96, cfg=1,\
+     intf=0, alt=1, name="u-boot", serial="002700333338511934383330"
+  Found DFU: [0483:5720] ver=9999, devnum=96, cfg=1,\
+     intf=0, alt=0, name="spl", serial="002700333338511934383330"
+
+Same example with MTD backend
+
+::
+
+  U-Boot> env set dfu_alt_info \
+     "mtd nor0=spl part 1;u-boot part 2;u-boot-env part 3&"\
+     "mtd nand0=UBI partubi 1"
+
+  U-Boot> dfu 0 list
+  using id 'nor0,0'
+  using id 'nor0,1'
+  using id 'nor0,2'
+  using id 'nand0,0'
+  DFU alt settings list:
+  dev: MTD alt: 0 name: spl layout: RAW_ADDR
+  dev: MTD alt: 1 name: u-boot layout: RAW_ADDR
+  dev: MTD alt: 2 name: u-boot-env layout: RAW_ADDR
+  dev: MTD alt: 3 name: UBI layout: RAW_ADDR
+
+Example 3
+
+firmware located in SD Card (mmc) and virtual partition on OTP and PMIC
+non-volatile memory
+
+- alternate 1 (alt=1) for scard
+- alternate 2 (alt=2) for OTP (virtual)
+- alternate 3 (alt=3) for PMIC NVM (virtual)
+
+::
+
+   U-Boot> env set dfu_alt_info \
+      "mmc 0=sdcard raw 0 0x100000&"\
+      "virt 0=otp" \
+      "virt 1=pmic"
+
+::
+
+   U-Boot> dfu 0 list
+   DFU alt settings list:
+   dev: eMMC alt: 0 name: sdcard layout: RAW_ADDR
+   dev: VIRT alt: 1 name: otp layout: RAW_ADDR
+   dev: VIRT alt: 2 name: pmic layout: RAW_ADDR
diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst
new file mode 100644
index 00000000000..cc33d3ec0f2
--- /dev/null
+++ b/doc/usage/environment.rst
@@ -0,0 +1,562 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Environment Variables
+=====================
+
+U-Boot supports user configuration using environment variables which
+can be made persistent by saving to persistent storage, for example flash
+memory.
+
+Environment variables are set using "env set" (alias "setenv"), printed using
+"env print" (alias "printenv"), and saved to persistent storage using
+"env save" (alias "saveenv"). Using "env set"
+without a value can be used to delete a variable from the
+environment. As long as you don't save the environment, you are
+working with an in-memory copy. In case the Flash area containing the
+environment is erased by accident, a default environment is provided.
+
+See :doc:`cmd/env` for details.
+
+Some configuration is controlled by Environment Variables, so that setting the
+variable can adjust the behaviour of U-Boot (e.g. autoboot delay, autoloading
+from tftp).
+
+Text-based Environment
+----------------------
+
+The default environment for a board is created using a `.env` environment file
+using a simple text format. The base filename for this is defined by
+`CONFIG_ENV_SOURCE_FILE`, or `CONFIG_SYS_BOARD` if that is empty.
+
+The file must be in the board directory and have a .env extension, so
+assuming that there is a board vendor, the resulting filename is therefore::
+
+   board/<vendor>/<board>/<CONFIG_ENV_SOURCE_FILE>.env
+
+or::
+
+   board/<vendor>/<board>/<CONFIG_SYS_BOARD>.env
+
+This is a plain text file where you can type your environment variables in
+the form `var=value`. Blank lines and multi-line variables are supported.
+The conversion script looks for a line that starts in column 1 with a string
+and has an equals sign immediately afterwards. Spaces before the = are not
+permitted. It is a good idea to indent your scripts so that only the 'var='
+appears at the start of a line.
+
+To add additional text to a variable you can use `var+=value`. This text is
+merged into the variable during the make process and made available as a
+single value to U-Boot. Variables can contain `+` characters but in the unlikely
+event that you want to have a variable name ending in plus, put a backslash
+before the `+` so that the script knows you are not adding to an existing
+variable but assigning to a new one::
+
+    maximum\+=value
+
+This file can include C-style comments. Blank lines and multi-line
+variables are supported, and you can use normal C preprocessor directives
+and CONFIG defines from your board config also.
+
+For example, for snapper9260 you would create a text file called
+`board/bluewater/snapper9260.env` containing the environment text.
+
+Example::
+
+    stdout=serial
+    #ifdef CONFIG_VIDEO
+    stdout+=,vidconsole
+    #endif
+    bootcmd=
+        /* U-Boot script for booting */
+
+        if [ -z ${tftpserverip} ]; then
+            echo "Use 'setenv tftpserverip a.b.c.d' to set IP address."
+        fi
+
+        usb start; setenv autoload n; bootp;
+        tftpboot ${tftpserverip}:
+        bootm
+    failed=
+        /* Print a message when boot fails */
+        echo CONFIG_SYS_BOARD boot failed - please check your image
+        echo Load address is CONFIG_SYS_LOAD_ADDR
+
+Settings which are common to a group of boards can use #include to bring in
+a common file in the `include/env` directory, containing environment
+settings. For example::
+
+   #include <env/ti/mmc.env>
+
+If CONFIG_ENV_SOURCE_FILE is empty and the default filename is not present, then
+the old-style C environment is used instead. See below.
+
+Old-style C environment
+-----------------------
+
+Traditionally, the default environment is created in `include/env_default.h`,
+and can be augmented by various `CONFIG` defines. See that file for details. In
+particular you can define `CFG_EXTRA_ENV_SETTINGS` in your board file
+to add environment variables.
+
+Board maintainers are encouraged to migrate to the text-based environment as it
+is easier to maintain. The distro-board script still requires the old-style
+environments, so use :doc:`/develop/bootstd/index` instead.
+
+
+List of environment variables
+-----------------------------
+
+Some device configuration options can be set using environment variables. In
+many cases the value in the default environment comes from a CONFIG option - see
+`include/env_default.h`) for this.
+
+This is most-likely not complete:
+
+autostart
+    If set to "yes" (actually any string starting with 1, y, Y, t, or T) an
+    image loaded with one of the commands listed below will be automatically
+    started by internally invoking the bootm command.
+
+    * bootelf - Boot from an ELF image in memory
+    * bootp - boot image via network using BOOTP/TFTP protocol
+    * dhcp - boot image via network using DHCP/TFTP protocol
+    * diskboot - boot from ide device
+    * nboot - boot from NAND device
+    * nfs - boot image via network using NFS protocol
+    * rarpboot - boot image via network using RARP/TFTP protocol
+    * scsiboot - boot from SCSI device
+    * tftpboot - boot image via network using TFTP protocol
+    * usbboot - boot from USB device
+
+    If the environment variable autostart is not set to a value starting with
+    1, y, Y, t, or T, an image passed to the "bootm" command will be copied to
+    the load address (and eventually uncompressed), but NOT be started.
+    This can be used to load and uncompress arbitrary data.
+
+baudrate
+    Used to set the baudrate of the UART - it defaults to CONFIG_BAUDRATE (which
+    defaults to 115200).
+
+bootdelay
+    Delay before automatically running bootcmd. During this time the user
+    can choose to enter the shell (or the boot menu if
+    CONFIG_AUTOBOOT_MENU_SHOW=y):
+
+    - 0 to autoboot with no delay, but you can stop it by key input.
+    - -1 to disable autoboot.
+    - -2 to autoboot with no delay and not check for abort
+
+    The default value is defined by CONFIG_BOOTDELAY.
+    The value of 'bootdelay' is overridden by the /config/bootdelay value in
+    the device-tree if CONFIG_OF_CONTROL=y.
+
+bootcmd
+    The command that is run if the user does not enter the shell during the
+    boot delay.
+
+bootargs
+    Command line arguments passed when booting an operating system or binary
+    image
+
+bootfile
+    Name of the image to load with TFTP
+
+bootm_low
+    Memory range available for image processing in the bootm
+    command can be restricted. This variable is given as
+    a hexadecimal number and defines lowest address allowed
+    for use by the bootm command. See also "bootm_size"
+    environment variable. Address defined by "bootm_low" is
+    also the base of the initial memory mapping for the Linux
+    kernel -- see the description of CFG_SYS_BOOTMAPSZ and
+    bootm_mapsize.
+
+bootm_mapsize
+    Size of the initial memory mapping for the Linux kernel.
+    This variable is given as a hexadecimal number and it
+    defines the size of the memory region starting at base
+    address bootm_low that is accessible by the Linux kernel
+    during early boot.  If unset, CFG_SYS_BOOTMAPSZ is used
+    as the default value if it is defined, and bootm_size is
+    used otherwise.
+
+bootm_size
+    Memory range available for image processing in the bootm
+    command can be restricted. This variable is given as
+    a hexadecimal number and defines the size of the region
+    allowed for use by the bootm command. See also "bootm_low"
+    environment variable.
+
+bootstopkeysha256, bootdelaykey, bootstopkey
+    See README.autoboot
+
+button_cmd_0, button_cmd_0_name ... button_cmd_N, button_cmd_N_name
+    Used to map commands to run when a button is held during boot.
+    See CONFIG_BUTTON_CMD.
+
+updatefile
+    Location of the software update file on a TFTP server, used
+    by the automatic software update feature. Please refer to
+    documentation in doc/README.update for more details.
+
+autoload
+    if set to "no" (any string beginning with 'n'),
+    "bootp" and "dhcp" will just load perform a lookup of the
+    configuration from the BOOTP server, but not try to
+    load any image.
+
+fdt_high
+    if set this restricts the maximum address that the
+    flattened device tree will be copied into upon boot.
+    For example, if you have a system with 1 GB memory
+    at physical address 0x10000000, while Linux kernel
+    only recognizes the first 704 MB as low memory, you
+    may need to set fdt_high as 0x3C000000 to have the
+    device tree blob be copied to the maximum address
+    of the 704 MB low memory, so that Linux kernel can
+    access it during the boot procedure.
+
+    If this is set to the special value 0xffffffff (32-bit machines) or
+    0xffffffffffffffff (64-bit machines) then
+    the fdt will not be copied at all on boot.  For this
+    to work it must reside in writable memory, have
+    sufficient padding on the end of it for U-Boot to
+    add the information it needs into it, and the memory
+    must be accessible by the kernel. This usage is strongly discouraged
+    however as it also stops U-Boot from ensuring the device tree starting
+    address is properly aligned and a misaligned tree will cause OS failures.
+
+fdtcontroladdr
+    if set this is the address of the control flattened
+    device tree used by U-Boot when CONFIG_OF_CONTROL is
+    defined.
+
+initrd_high
+    restrict positioning of initrd images:
+    If this variable is not set, initrd images will be
+    copied to the highest possible address in RAM; this
+    is usually what you want since it allows for
+    maximum initrd size. If for some reason you want to
+    make sure that the initrd image is loaded below the
+    CFG_SYS_BOOTMAPSZ limit, you can set this environment
+    variable to a value of "no" or "off" or "0".
+    Alternatively, you can set it to a maximum upper
+    address to use (U-Boot will still check that it
+    does not overwrite the U-Boot stack and data).
+
+    For instance, when you have a system with 16 MB
+    RAM, and want to reserve 4 MB from use by Linux,
+    you can do this by adding "mem=12M" to the value of
+    the "bootargs" variable. However, now you must make
+    sure that the initrd image is placed in the first
+    12 MB as well - this can be done with::
+
+        setenv initrd_high 00c00000
+
+    If you set initrd_high to 0xffffffff (32-bit machines) or
+    0xffffffffffffffff (64-bit machines), this is an
+    indication to U-Boot that all addresses are legal
+    for the Linux kernel, including addresses in flash
+    memory. In this case U-Boot will NOT COPY the
+    ramdisk at all. This may be useful to reduce the
+    boot time on your system, but requires that this
+    feature is supported by your Linux kernel. This usage however requires
+    that the user ensure that there will be no overlap with other parts of the
+    image such as the Linux kernel BSS. It should not be enabled by default
+    and only done as part of optimizing a deployment.
+
+ipaddr
+    IP address; needed for tftpboot command
+
+loadaddr
+    Default load address for commands like "bootp",
+    "rarpboot", "tftpboot", "loadb" or "diskboot".  Note that the optimal
+    default values here will vary between architectures.  On 32bit ARM for
+    example, some offset from start of memory is used as the Linux kernel
+    zImage has a self decompressor and it's best if we stay out of where that
+    will be working.
+
+loads_echo
+    see CONFIG_LOADS_ECHO
+
+serverip
+    TFTP server IP address; needed for tftpboot command
+
+bootretry
+    see CONFIG_BOOT_RETRY_TIME
+
+bootdelaykey
+    see CONFIG_AUTOBOOT_DELAY_STR
+
+bootstopkey
+    see CONFIG_AUTOBOOT_STOP_STR
+
+ethprime
+    controls which network interface is used first.
+
+ethact
+    controls which interface is currently active.
+    For example you can do the following::
+
+    => setenv ethact FEC
+    => ping 192.168.0.1 # traffic sent on FEC
+    => setenv ethact SCC
+    => ping 10.0.0.1 # traffic sent on SCC
+
+ethrotate
+    When set to "no" U-Boot does not go through all
+    available network interfaces.
+    It just stays at the currently selected interface. When unset or set to
+    anything other than "no", U-Boot does go through all
+    available network interfaces.
+
+httpdstp
+    If this is set, the value is used for HTTP's TCP
+    destination port instead of the default port 80.
+
+netretry
+    When set to "no" each network operation will
+    either succeed or fail without retrying.
+    When set to "once" the network operation will
+    fail when all the available network interfaces
+    are tried once without success.
+    Useful on scripts which control the retry operation
+    themselves.
+
+silent_linux
+    If set then Linux will be told to boot silently, by
+    adding 'console=' to its command line. If "yes" it will be
+    made silent. If "no" it will not be made silent. If
+    unset, then it will be made silent if the U-Boot console
+    is silent.
+
+tftpsrcp
+    If this is set, the value is used for TFTP's
+    UDP source port.
+
+tftpdstp
+    If this is set, the value is used for TFTP's UDP
+    destination port instead of the default port 69.
+
+tftpblocksize
+    Block size to use for TFTP transfers; if not set,
+    we use the TFTP server's default block size
+
+tftptimeout
+    Retransmission timeout for TFTP packets (in milli-
+    seconds, minimum value is 1000 = 1 second). Defines
+    when a packet is considered to be lost so it has to
+    be retransmitted. The default is 5000 = 5 seconds.
+    Lowering this value may make downloads succeed
+    faster in networks with high packet loss rates or
+    with unreliable TFTP servers.
+
+tftptimeoutcountmax
+    maximum count of TFTP timeouts (no
+    unit, minimum value = 0). Defines how many timeouts
+    can happen during a single file transfer before that
+    transfer is aborted. The default is 10, and 0 means
+    'no timeouts allowed'. Increasing this value may help
+    downloads succeed with high packet loss rates, or with
+    unreliable TFTP servers or client hardware.
+
+tftpwindowsize
+    if this is set, the value is used for TFTP's
+    window size as described by RFC 7440.
+    This means the count of blocks we can receive before
+    sending ack to server.
+
+usb_ignorelist
+    Ignore USB devices to prevent binding them to an USB device driver. This can
+    be used to ignore devices are for some reason undesirable or causes crashes
+    u-boot's USB stack.
+    An example for undesired behavior is the keyboard emulation of security keys
+    like Yubikeys. U-boot currently supports only a single USB keyboard device
+    so try to probe an useful keyboard device. The default environment blocks
+    Yubico devices as common devices emulating keyboards.
+    Devices are matched by idVendor and idProduct. The variable contains a comma
+    separated list of idVendor:idProduct pairs as hexadecimal numbers joined
+    by a colon. '*' functions as a wildcard for idProduct to block all devices
+    with the specified idVendor.
+
+vlan
+    When set to a value < 4095 the traffic over
+    Ethernet is encapsulated/received over 802.1q
+    VLAN tagged frames.
+
+    Note: This appears not to be used in U-Boot. See `README.VLAN`.
+
+bootpretryperiod
+    Period during which BOOTP/DHCP sends retries.
+    Unsigned value, in milliseconds. If not set, the period will
+    be either the default (28000), or a value based on
+    CONFIG_NET_RETRY_COUNT, if defined. This value has
+    precedence over the value based on CONFIG_NET_RETRY_COUNT.
+
+memmatches
+    Number of matches found by the last 'ms' command, in hex
+
+memaddr
+    Address of the last match found by the 'ms' command, in hex,
+    or 0 if none
+
+mempos
+    Index position of the last match found by the 'ms' command,
+    in units of the size (.b, .w, .l) of the search
+
+zbootbase
+    (x86 only) Base address of the bzImage 'setup' block
+
+zbootaddr
+    (x86 only) Address of the loaded bzImage, typically
+    BZIMAGE_LOAD_ADDR which is 0x100000
+
+
+Image locations
+---------------
+
+The following image location variables contain the location of images
+used in booting. The "Image" column gives the role of the image and is
+not an environment variable name. The other columns are environment
+variable names. "File Name" gives the name of the file on a TFTP
+server, "RAM Address" gives the location in RAM the image will be
+loaded to, and "Flash Location" gives the image's address in NOR
+flash or offset in NAND flash.
+
+*Note* - these variables don't have to be defined for all boards, some
+boards currently use other variables for these purposes, and some
+boards use these variables for other purposes.
+
+Also note that most of these variables are just a commonly used set of variable
+names, used in some other variable definitions, but are not hard-coded anywhere
+in U-Boot code.
+
+================= ============== ================ ==============
+Image             File Name      RAM Address      Flash Location
+================= ============== ================ ==============
+Linux kernel      bootfile       kernel_addr_r    kernel_addr
+device tree blob  fdtfile        fdt_addr_r       fdt_addr
+ramdisk           ramdiskfile    ramdisk_addr_r   ramdisk_addr
+================= ============== ================ ==============
+
+When setting the RAM addresses for `kernel_addr_r`, `fdt_addr_r` and
+`ramdisk_addr_r` there are several types of constraints to keep in mind. The
+one type of constraint is payload requirement. For example, a device tree MUST
+be loaded at an 8-byte aligned address as that is what the specification
+requires. In a similar manner, the operating system may define restrictions on
+where in memory space payloads can be. This is documented for example in Linux,
+with both the `Booting ARM Linux`_ and `Booting AArch64 Linux`_ documents.
+Finally, there are practical constraints. We do not know the size of a given
+payload a user will use but each payload must not overlap or it will corrupt
+the other payload. A similar problem can happen when a payload ends up being in
+the OS BSS area. For these reasons we need to ensure our default values here
+are both unlikely to lead to failure to boot and sufficiently explained so that
+they can be optimized for boot time or adjusted for smaller memory
+configurations.
+
+On different architectures we will have different constraints. It is important
+that we follow whatever documented requirements are available to best ensure
+forward compatibility. What follows are examples to highlight how to provide
+reasonable default values in different cases.
+
+Texas Instruments OMAP2PLUS (ARMv7) example
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+On these families of processors we are on a 32bit ARMv7 core.  As booting some
+form of Linux is our most common payload we will also keep in mind the
+documented requirements for booting that Linux provides.  These values are also
+known to be fine for booting a number of other operating systems (or their
+loaders).  In this example we define the following variables and values::
+
+    loadaddr=0x82000000
+    kernel_addr_r=${loadaddr}
+    fdt_addr_r=0x88000000
+    ramdisk_addr_r=0x88080000
+    bootm_size=0x10000000
+
+The first thing to keep in mind is that DRAM starts at 0x80000000. We set a
+32MiB buffer from the start of memory as our default load address and set
+``kernel_addr_r`` to that. This is because the Linux ``zImage`` decompressor
+will typically then be able to avoid doing a relocation itself. It also MUST be
+within the first 128MiB of memory. The next value is we set ``fdt_addr_r`` to
+be at 128MiB offset from the start of memory. This location is suggested by the
+kernel documentation and is exceedingly unlikely to be overwritten by the
+kernel itself given other architectural constraints.  We then allow for the
+device tree to be up to 512KiB in size before placing the ramdisk in memory. We
+then say that everything should be within the first 256MiB of memory so that
+U-Boot can relocate things as needed to ensure proper alignment. We pick 256MiB
+as our value here because we know there are very few platforms on in this
+family with less memory. It could be as high as 768MiB and still ensure that
+everything would be visible to the kernel, but again we go with what we assume
+is the safest assumption.
+
+Automatically updated variables
+-------------------------------
+
+The following environment variables may be used and automatically
+updated by the network boot commands ("bootp" and "rarpboot"),
+depending the information provided by your boot server:
+
+=========  ===================================================
+Variable   Notes
+=========  ===================================================
+bootfile   see above
+dnsip      IP address of your Domain Name Server
+dnsip2     IP address of your secondary Domain Name Server
+gatewayip  IP address of the Gateway (Router) to use
+hostname   Target hostname
+ipaddr     See above
+netmask    Subnet Mask
+rootpath   Pathname of the root filesystem on the NFS server
+serverip   see above
+=========  ===================================================
+
+
+Special environment variables
+-----------------------------
+
+There are two special Environment Variables:
+
+serial#
+    contains hardware identification information such as type string and/or
+    serial number
+ethaddr
+    Ethernet address. If CONFIG_REGEX=y, also eth*addr (where * is an integer).
+
+These variables can be set only once (usually during manufacturing of
+the board). U-Boot refuses to delete or overwrite these variables
+once they have been set, unless CONFIG_ENV_OVERWRITE is enabled in the board
+configuration.
+
+Also:
+
+ver
+    Contains the U-Boot version string as printed
+    with the "version" command. This variable is
+    readonly (see CONFIG_VERSION_VARIABLE).
+
+Please note that changes to some configuration parameters may take
+only effect after the next boot (yes, that's just like Windows).
+
+
+External environment file
+-------------------------
+
+The `CONFIG_USE_DEFAULT_ENV_FILE` option provides a way to bypass the
+environment generation in U-Boot. If enabled, then `CONFIG_DEFAULT_ENV_FILE`
+provides the name of a file which is converted into the environment,
+completely bypassing the standard environment variables in `env_default.h`.
+
+The format is the same as accepted by the mkenvimage tool, with lines containing
+key=value pairs. Blank lines and lines beginning with # are ignored.
+
+Future work may unify this feature with the text-based environment, perhaps
+moving the contents of `env_default.h` to a text file.
+
+Implementation
+--------------
+
+See :doc:`../develop/environment` for internal development details.
+
+.. _`Booting ARM Linux`: https://www.kernel.org/doc/html/latest/arm/booting.html
+.. _`Booting AArch64 Linux`: https://www.kernel.org/doc/html/latest/arm64/booting.html
diff --git a/doc/usage/fdt_overlays.rst b/doc/usage/fdt_overlays.rst
new file mode 100644
index 00000000000..81d0d37f3f1
--- /dev/null
+++ b/doc/usage/fdt_overlays.rst
@@ -0,0 +1,134 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2017, Pantelis Antoniou <pantelis.antoniou@konsulko.com>
+
+Device Tree Overlays
+====================
+
+Overlay Syntax
+--------------
+
+Device-tree overlays require a slightly different syntax compared to traditional
+device-trees. Please refer to dt-object-internal.txt in the device-tree compiler
+sources for information regarding the internal format of overlays:
+https://git.kernel.org/pub/scm/utils/dtc/dtc.git/tree/Documentation/dt-object-internal.txt
+
+Building Overlays
+-----------------
+
+In a nutshell overlays provides a means to manipulate a symbol a previous
+device-tree or device-tree overlay has defined. It requires both the base
+device-tree and all the overlays to be compiled with the *-@* command line
+switch of the device-tree compiler so that symbol information is included.
+
+Note
+    Support for *-@* option can only be found in dtc version 1.4.4 or newer.
+    Only version 4.14 or higher of the Linux kernel includes a built in version
+    of dtc that meets this requirement.
+
+Building a binary device-tree overlay follows the same process as building a
+traditional binary device-tree. For example:
+
+**base.dts**
+
+::
+
+	/dts-v1/;
+	/ {
+		foo: foonode {
+			foo-property;
+		};
+	};
+
+.. code-block:: console
+
+	$ dtc -@ -I dts -O dtb -o base.dtb base.dts
+
+**overlay.dtso**
+
+::
+
+	/dts-v1/;
+	/plugin/;
+	/ {
+		fragment@1 {
+			target = <&foo>;
+			__overlay__ {
+				overlay-1-property;
+				bar: barnode {
+					bar-property;
+				};
+			};
+		};
+	};
+
+.. code-block:: console
+
+	$ dtc -@ -I dts -O dtb -o overlay.dtbo overlay.dtso
+
+Ways to Utilize Overlays in U-Boot
+----------------------------------
+
+There are two ways to apply overlays in U-Boot.
+
+* Include and define overlays within a FIT image and have overlays
+  automatically applied.
+
+* Manually load and apply overlays
+
+The remainder of this document will discuss using overlays via the manual
+approach. For information on using overlays as part of a FIT image please see:
+doc/uImage.FIT/overlay-fdt-boot.txt
+
+Manually Loading and Applying Overlays
+--------------------------------------
+
+1. Figure out where to place both the base device tree blob and the
+   overlay. Make sure you have enough space to grow the base tree without
+   overlapping anything.
+
+::
+
+    => setenv fdtaddr 0x87f00000
+    => setenv fdtovaddr 0x87fc0000
+
+2. Load the base binary device-tree and the binary device-tree overlay.
+
+::
+
+    => load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/base.dtb
+    => load ${devtype} ${bootpart} ${fdtovaddr} ${bootdir}/overlay.dtbo
+
+3. Set the base binary device-tree as the working fdt tree.
+
+::
+
+    => fdt addr $fdtaddr
+
+4. Grow it enough so it can encompass all applied overlays
+
+::
+
+    => fdt resize 8192
+
+5. You are now ready to apply the overlay.
+
+::
+
+    => fdt apply $fdtovaddr
+
+6. Boot system like you would do with a traditional dtb.
+
+For bootm:
+
+::
+
+    => bootm ${kerneladdr} - ${fdtaddr}
+
+For bootz:
+
+::
+
+    => bootz ${kerneladdr} - ${fdtaddr}
+
+Please note that in case of an error, both the base and overlays are going
+to be invalidated, so keep copies to avoid reloading.
diff --git a/doc/usage/fit/beaglebone_vboot.rst b/doc/usage/fit/beaglebone_vboot.rst
new file mode 100644
index 00000000000..1298ba1ae08
--- /dev/null
+++ b/doc/usage/fit/beaglebone_vboot.rst
@@ -0,0 +1,611 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Verified Boot on the Beaglebone Black
+=====================================
+
+Introduction
+------------
+
+Before reading this, please read :doc:`verified-boot` and :doc:`signature`.
+These instructions are for mainline U-Boot from v2014.07 onwards.
+
+There is quite a bit of documentation in this directory describing how
+verified boot works in U-Boot. There is also a test which runs through the
+entire process of signing an image and running U-Boot (sandbox) to check it.
+However, it might be useful to also have an example on a real board.
+
+Beaglebone Black is a fairly common board so seems to be a reasonable choice
+for an example of how to enable verified boot using U-Boot.
+
+First a note that may to help avoid confusion. U-Boot and Linux both use
+device tree. They may use the same device tree source, but it is seldom useful
+for them to use the exact same binary from the same place. More typically,
+U-Boot has its device tree packaged with it, and the kernel's device tree is
+packaged with the kernel. In particular this is important with verified boot,
+since U-Boot's device tree must be immutable. If it can be changed then the
+public keys can be changed and verified boot is useless. An attacker can
+simply generate a new key and put his public key into U-Boot so that
+everything verifies. On the other hand the kernel's device tree typically
+changes when the kernel changes, so it is useful to package an updated device
+tree with the kernel binary. U-Boot supports the latter with its flexible FIT
+format (Flat Image Tree).
+
+
+Overview
+--------
+
+The steps are roughly as follows:
+
+#. Build U-Boot for the board, with the verified boot options enabled.
+
+#. Obtain a suitable Linux kernel
+
+#. Create a Image Tree Source file (ITS) file describing how you want the
+   kernel to be packaged, compressed and signed.
+
+#. Create a key pair
+
+#. Sign the kernel
+
+#. Put the public key into U-Boot's image
+
+#. Put U-Boot and the kernel onto the board
+
+#. Try it
+
+
+Step 1: Build U-Boot
+--------------------
+
+a. Set up the environment variable to point to your toolchain. You will need
+   this for U-Boot and also for the kernel if you build it. For example if you
+   installed a Linaro version manually it might be something like::
+
+       export CROSS_COMPILE=/opt/linaro/gcc-linaro-arm-linux-gnueabihf-4.8-2013.08_linux/bin/arm-linux-gnueabihf-
+
+   or if you just installed gcc-arm-linux-gnueabi then it might be::
+
+       export CROSS_COMPILE=arm-linux-gnueabi-
+
+b. Configure and build U-Boot with verified boot enabled. Note that we use the
+am335x_evm target since it covers all boards based on the AM335x evaluation
+board::
+
+    export UBOOT=/path/to/u-boot
+    cd $UBOOT
+    # You can add -j10 if you have 10 CPUs to make it faster
+    make O=b/am335x_evm am335x_evm_config all
+    export UOUT=$UBOOT/b/am335x_evm
+
+c. You will now have a U-Boot image::
+
+    file b/am335x_evm/u-boot-dtb.img
+    b/am335x_evm/u-boot-dtb.img: u-boot legacy uImage,
+      U-Boot 2014.07-rc2-00065-g2f69f8, Firmware/ARM, Firmware Image
+      (Not compressed), 395375 bytes, Sat May 31 16:19:04 2014,
+      Load Address: 0x80800000, Entry Point: 0x00000000,
+      Header CRC: 0x0ABD6ACA, Data CRC: 0x36DEF7E4
+
+
+Step 2: Build Linux
+-------------------
+
+a. Find the kernel image ('Image') and device tree (.dtb) file you plan to
+   use. In our case it is am335x-boneblack.dtb and it is built with the kernel.
+   At the time of writing an SD Boot image can be obtained from here::
+
+       http://www.elinux.org/Beagleboard:Updating_The_Software#Image_For_Booting_From_microSD
+
+   You can write this to an SD card and then mount it to extract the kernel and
+   device tree files.
+
+   You can also build a kernel. Instructions for this are are here::
+
+       http://elinux.org/Building_BBB_Kernel
+
+   or you can use your favourite search engine. Following these instructions
+   produces a kernel Image and device tree files. For the record the steps
+   were::
+
+        export KERNEL=/path/to/kernel
+        cd $KERNEL
+        git clone git://github.com/beagleboard/kernel.git .
+        git checkout v3.14
+        ./patch.sh
+        cp configs/beaglebone kernel/arch/arm/configs/beaglebone_defconfig
+        cd kernel
+        make beaglebone_defconfig
+        make uImage dtbs   # -j10 if you have 10 CPUs
+        export OKERNEL=$KERNEL/kernel/arch/arm/boot
+
+b. You now have the 'Image' and 'am335x-boneblack.dtb' files needed to boot.
+
+
+Step 3: Create the ITS
+----------------------
+
+Set up a directory for your work::
+
+   export WORK=/path/to/dir
+   cd $WORK
+
+Put this into a file in that directory called sign.its::
+
+    /dts-v1/;
+
+    / {
+        description = "Beaglebone black";
+        #address-cells = <1>;
+
+        images {
+            kernel {
+                data = /incbin/("Image.lzo");
+                type = "kernel";
+                arch = "arm";
+                os = "linux";
+                compression = "lzo";
+                load = <0x80008000>;
+                entry = <0x80008000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+            fdt-1 {
+                description = "beaglebone-black";
+                data = /incbin/("am335x-boneblack.dtb");
+                type = "flat_dt";
+                arch = "arm";
+                compression = "none";
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+        };
+        configurations {
+            default = "conf-1";
+            conf-1 {
+                kernel = "kernel";
+                fdt = "fdt-1";
+                signature-1 {
+                    algo = "sha256,rsa2048";
+                    key-name-hint = "dev";
+                    sign-images = "fdt", "kernel";
+                };
+            };
+        };
+    };
+
+
+The explanation for this is all in the documentation you have already read.
+But briefly it packages a kernel and device tree, and provides a single
+configuration to be signed with a key named 'dev'. The kernel is compressed
+with LZO to make it smaller.
+
+
+Step 4: Create a key pair
+-------------------------
+
+See :doc:`signature` for details on this step::
+
+   cd $WORK
+   mkdir keys
+   openssl genrsa -F4 -out keys/dev.key 2048
+   openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
+
+Note: keys/dev.key contains your private key and is very secret. If anyone
+gets access to that file they can sign kernels with it. Keep it secure.
+
+
+Step 5: Sign the kernel
+-----------------------
+
+We need to use mkimage (which was built when you built U-Boot) to package the
+Linux kernel into a FIT (Flat Image Tree, a flexible file format that U-Boot
+can load) using the ITS file you just created.
+
+At the same time we must put the public key into U-Boot device tree, with the
+'required' property, which tells U-Boot that this key must be verified for the
+image to be valid. You will make this key available to U-Boot for booting in
+step 6::
+
+   ln -s $OKERNEL/dts/am335x-boneblack.dtb
+   ln -s $OKERNEL/Image
+   ln -s $UOUT/u-boot-dtb.img
+   cp $UOUT/arch/arm/dts/am335x-boneblack.dtb am335x-boneblack-pubkey.dtb
+   lzop Image
+   $UOUT/tools/mkimage -f sign.its -K am335x-boneblack-pubkey.dtb -k keys -r image.fit
+
+You should see something like this::
+
+    FIT description: Beaglebone black
+    Created:         Sun Jun  1 12:50:30 2014
+     Image 0 (kernel)
+      Description:  unavailable
+      Created:      Sun Jun  1 12:50:30 2014
+      Type:         Kernel Image
+      Compression:  lzo compressed
+      Data Size:    7790938 Bytes = 7608.34 kB = 7.43 MB
+      Architecture: ARM
+      OS:           Linux
+      Load Address: 0x80008000
+      Entry Point:  0x80008000
+      Hash algo:    sha256
+      Hash value:   51b2adf9c1016ed46f424d85dcc6c34c46a20b9bee7227e06a6b6320ca5d35c1
+     Image 1 (fdt-1)
+      Description:  beaglebone-black
+      Created:      Sun Jun  1 12:50:30 2014
+      Type:         Flat Device Tree
+      Compression:  uncompressed
+      Data Size:    31547 Bytes = 30.81 kB = 0.03 MB
+      Architecture: ARM
+      Hash algo:    sha256
+      Hash value:   807d5842a04132261ba092373bd40c78991bc7ce173d1175cd976ec37858e7cd
+     Default Configuration: 'conf-1'
+     Configuration 0 (conf-1)
+      Description:  unavailable
+      Kernel:       kernel
+      FDT:          fdt-1
+
+
+Now am335x-boneblack-pubkey.dtb contains the public key and image.fit contains
+the signed kernel. Jump to step 6 if you like, or continue reading to increase
+your understanding.
+
+You can also run fit_check_sign to check it::
+
+   $UOUT/tools/fit_check_sign -f image.fit -k am335x-boneblack-pubkey.dtb
+
+which results in::
+
+    Verifying Hash Integrity ... sha256,rsa2048:dev+
+    ## Loading kernel from FIT Image at 7fc6ee469000 ...
+       Using 'conf-1' configuration
+       Verifying Hash Integrity ...
+    sha256,rsa2048:dev+
+    OK
+
+       Trying 'kernel' kernel subimage
+         Description:  unavailable
+         Created:      Sun Jun  1 12:50:30 2014
+         Type:         Kernel Image
+         Compression:  lzo compressed
+         Data Size:    7790938 Bytes = 7608.34 kB = 7.43 MB
+         Architecture: ARM
+         OS:           Linux
+         Load Address: 0x80008000
+         Entry Point:  0x80008000
+         Hash algo:    sha256
+         Hash value:   51b2adf9c1016ed46f424d85dcc6c34c46a20b9bee7227e06a6b6320ca5d35c1
+       Verifying Hash Integrity ...
+    sha256+
+    OK
+
+    Unimplemented compression type 4
+    ## Loading fdt from FIT Image at 7fc6ee469000 ...
+       Using 'conf-1' configuration
+       Trying 'fdt-1' fdt subimage
+         Description:  beaglebone-black
+         Created:      Sun Jun  1 12:50:30 2014
+         Type:         Flat Device Tree
+         Compression:  uncompressed
+         Data Size:    31547 Bytes = 30.81 kB = 0.03 MB
+         Architecture: ARM
+         Hash algo:    sha256
+         Hash value:   807d5842a04132261ba092373bd40c78991bc7ce173d1175cd976ec37858e7cd
+       Verifying Hash Integrity ...
+    sha256+
+    OK
+
+       Loading Flat Device Tree ... OK
+
+    ## Loading ramdisk from FIT Image at 7fc6ee469000 ...
+       Using 'conf-1' configuration
+    Could not find subimage node
+
+    Signature check OK
+
+
+At the top, you see "sha256,rsa2048:dev+". This means that it checked an RSA key
+of size 2048 bits using SHA256 as the hash algorithm. The key name checked was
+'dev' and the '+' means that it verified. If it showed '-' that would be bad.
+
+Once the configuration is verified it is then possible to rely on the hashes
+in each image referenced by that configuration. So fit_check_sign goes on to
+load each of the images. We have a kernel and an FDT but no ramkdisk. In each
+case fit_check_sign checks the hash and prints sha256+ meaning that the SHA256
+hash verified. This means that none of the images has been tampered with.
+
+There is a test in test/vboot which uses U-Boot's sandbox build to verify that
+the above flow works.
+
+But it is fun to do this by hand, so you can load image.fit into a hex editor
+like ghex, and change a byte in the kernel::
+
+    $UOUT/tools/fit_info -f image.fit -n /images/kernel -p data
+    NAME: kernel
+    LEN: 7790938
+    OFF: 168
+
+This tells us that the kernel starts at byte offset 168 (decimal) in image.fit
+and extends for about 7MB. Try changing a byte at 0x2000 (say) and run
+fit_check_sign again. You should see something like::
+
+    Verifying Hash Integrity ... sha256,rsa2048:dev+
+    ## Loading kernel from FIT Image at 7f5a39571000 ...
+       Using 'conf-1' configuration
+       Verifying Hash Integrity ...
+    sha256,rsa2048:dev+
+    OK
+
+       Trying 'kernel' kernel subimage
+         Description:  unavailable
+         Created:      Sun Jun  1 13:09:21 2014
+         Type:         Kernel Image
+         Compression:  lzo compressed
+         Data Size:    7790938 Bytes = 7608.34 kB = 7.43 MB
+         Architecture: ARM
+         OS:           Linux
+         Load Address: 0x80008000
+         Entry Point:  0x80008000
+         Hash algo:    sha256
+         Hash value:   51b2adf9c1016ed46f424d85dcc6c34c46a20b9bee7227e06a6b6320ca5d35c1
+       Verifying Hash Integrity ...
+    sha256 error
+    Bad hash value for 'hash-1' hash node in 'kernel' image node
+    Bad Data Hash
+
+    ## Loading fdt from FIT Image at 7f5a39571000 ...
+       Using 'conf-1' configuration
+       Trying 'fdt-1' fdt subimage
+         Description:  beaglebone-black
+         Created:      Sun Jun  1 13:09:21 2014
+         Type:         Flat Device Tree
+         Compression:  uncompressed
+         Data Size:    31547 Bytes = 30.81 kB = 0.03 MB
+         Architecture: ARM
+         Hash algo:    sha256
+         Hash value:   807d5842a04132261ba092373bd40c78991bc7ce173d1175cd976ec37858e7cd
+       Verifying Hash Integrity ...
+    sha256+
+    OK
+
+       Loading Flat Device Tree ... OK
+
+    ## Loading ramdisk from FIT Image at 7f5a39571000 ...
+       Using 'conf-1' configuration
+    Could not find subimage node
+
+    Signature check Bad (error 1)
+
+
+It has detected the change in the kernel.
+
+You can also be sneaky and try to switch images, using the libfdt utilities
+that come with dtc (package name is device-tree-compiler but you will need a
+recent version like 1.4::
+
+    dtc -v
+    Version: DTC 1.4.0
+
+First we can check which nodes are actually hashed by the configuration::
+
+    $ fdtget -l image.fit /
+    images
+    configurations
+
+    $ fdtget -l image.fit /configurations
+    conf-1
+    fdtget -l image.fit /configurations/conf-1
+    signature-1
+
+    $ fdtget -p image.fit /configurations/conf-1/signature-1
+    hashed-strings
+    hashed-nodes
+    timestamp
+    signer-version
+    signer-name
+    value
+    algo
+    key-name-hint
+    sign-images
+
+    $ fdtget image.fit /configurations/conf-1/signature-1 hashed-nodes
+    / /configurations/conf-1 /images/fdt-1 /images/fdt-1/hash /images/kernel /images/kernel/hash-1
+
+This gives us a bit of a look into the signature that mkimage added. Note you
+can also use fdtdump to list the entire device tree.
+
+Say we want to change the kernel that this configuration uses
+(/images/kernel). We could just put a new kernel in the image, but we will
+need to change the hash to match. Let's simulate that by changing a byte of
+the hash::
+
+    fdtget -tx image.fit /images/kernel/hash-1 value
+    51b2adf9 c1016ed4 6f424d85 dcc6c34c 46a20b9b ee7227e0 6a6b6320 ca5d35c1
+    fdtput -tx image.fit /images/kernel/hash-1 value 51b2adf9 c1016ed4 6f424d85 dcc6c34c 46a20b9b ee7227e0 6a6b6320 ca5d35c8
+
+Now check it again::
+
+    $UOUT/tools/fit_check_sign -f image.fit -k am335x-boneblack-pubkey.dtb
+    Verifying Hash Integrity ... sha256,rsa2048:devrsa_verify_with_keynode: RSA failed to verify: -13
+    rsa_verify_with_keynode: RSA failed to verify: -13
+    -
+    Failed to verify required signature 'key-dev'
+    Signature check Bad (error 1)
+
+This time we don't even get as far as checking the images, since the
+configuration signature doesn't match. We can't change any hashes without the
+signature check noticing. The configuration is essentially locked. U-Boot has
+a public key for which it requires a match, and will not permit the use of any
+configuration that does not match that public key. The only way the
+configuration will match is if it was signed by the matching private key.
+
+It would also be possible to add a new signature node that does match your new
+configuration. But that won't work since you are not allowed to change the
+configuration in any way. Try it with a fresh (valid) image if you like by
+running the mkimage link again. Then::
+
+    fdtput -p image.fit /configurations/conf-1/signature-1 value fred
+    $UOUT/tools/fit_check_sign -f image.fit -k am335x-boneblack-pubkey.dtb
+    Verifying Hash Integrity ... -
+    sha256,rsa2048:devrsa_verify_with_keynode: RSA failed to verify: -13
+    rsa_verify_with_keynode: RSA failed to verify: -13
+    -
+    Failed to verify required signature 'key-dev'
+    Signature check Bad (error 1)
+
+
+Of course it would be possible to add an entirely new configuration and boot
+with that, but it still needs to be signed, so it won't help.
+
+
+6. Put the public key into U-Boot's image
+-----------------------------------------
+
+Having confirmed that the signature is doing its job, let's try it out in
+U-Boot on the board. U-Boot needs access to the public key corresponding to
+the private key that you signed with so that it can verify any kernels that
+you sign::
+
+    cd $UBOOT
+    make O=b/am335x_evm EXT_DTB=${WORK}/am335x-boneblack-pubkey.dtb
+
+Here we are overriding the normal device tree file with our one, which
+contains the public key.
+
+Now you have a special U-Boot image with the public key. It can verify can
+kernel that you sign with the private key as in step 5.
+
+If you like you can take a look at the public key information that mkimage
+added to U-Boot's device tree::
+
+    fdtget -p am335x-boneblack-pubkey.dtb /signature/key-dev
+    required
+    algo
+    rsa,r-squared
+    rsa,modulus
+    rsa,n0-inverse
+    rsa,num-bits
+    key-name-hint
+
+This has information about the key and some pre-processed values which U-Boot
+can use to verify against it. These values are obtained from the public key
+certificate by mkimage, but require quite a bit of code to generate. To save
+code space in U-Boot, the information is extracted and written in raw form for
+U-Boot to easily use. The same mechanism is used in Google's Chrome OS.
+
+Notice the 'required' property. This marks the key as required - U-Boot will
+not boot any image that does not verify against this key.
+
+
+7. Put U-Boot and the kernel onto the board
+-------------------------------------------
+
+The method here varies depending on how you are booting. For this example we
+are booting from an micro-SD card with two partitions, one for U-Boot and one
+for Linux. Put it into your machine and write U-Boot and the kernel to it.
+Here the card is /dev/sde::
+
+    cd $WORK
+    export UDEV=/dev/sde1   # Change thes two lines to the correct device
+    export KDEV=/dev/sde2
+    sudo mount $UDEV /mnt/tmp && sudo cp $UOUT/u-boot-dtb.img /mnt/tmp/u-boot.img  && sleep 1 && sudo umount $UDEV
+    sudo mount $KDEV /mnt/tmp && sudo cp $WORK/image.fit /mnt/tmp/boot/image.fit && sleep 1 && sudo umount $KDEV
+
+
+8. Try it
+---------
+
+Boot the board using the commands below::
+
+    setenv bootargs console=ttyO0,115200n8 quiet root=/dev/mmcblk0p2 ro rootfstype=ext4 rootwait
+    ext2load mmc 0:2 82000000 /boot/image.fit
+    bootm 82000000
+
+You should then see something like this::
+
+    U-Boot# setenv bootargs console=ttyO0,115200n8 quiet root=/dev/mmcblk0p2 ro rootfstype=ext4 rootwait
+    U-Boot# ext2load mmc 0:2 82000000 /boot/image.fit
+    7824930 bytes read in 589 ms (12.7 MiB/s)
+    U-Boot# bootm 82000000
+    ## Loading kernel from FIT Image at 82000000 ...
+       Using 'conf-1' configuration
+       Verifying Hash Integrity ... sha256,rsa2048:dev+ OK
+       Trying 'kernel' kernel subimage
+         Description:  unavailable
+         Created:      2014-06-01  19:32:54 UTC
+         Type:         Kernel Image
+         Compression:  lzo compressed
+         Data Start:   0x820000a8
+         Data Size:    7790938 Bytes = 7.4 MiB
+         Architecture: ARM
+         OS:           Linux
+         Load Address: 0x80008000
+         Entry Point:  0x80008000
+         Hash algo:    sha256
+         Hash value:   51b2adf9c1016ed46f424d85dcc6c34c46a20b9bee7227e06a6b6320ca5d35c1
+       Verifying Hash Integrity ... sha256+ OK
+    ## Loading fdt from FIT Image at 82000000 ...
+       Using 'conf-1' configuration
+       Trying 'fdt-1' fdt subimage
+         Description:  beaglebone-black
+         Created:      2014-06-01  19:32:54 UTC
+         Type:         Flat Device Tree
+         Compression:  uncompressed
+         Data Start:   0x8276e2ec
+         Data Size:    31547 Bytes = 30.8 KiB
+         Architecture: ARM
+         Hash algo:    sha256
+         Hash value:   807d5842a04132261ba092373bd40c78991bc7ce173d1175cd976ec37858e7cd
+       Verifying Hash Integrity ... sha256+ OK
+       Booting using the fdt blob at 0x8276e2ec
+       Uncompressing Kernel Image ... OK
+       Loading Device Tree to 8fff5000, end 8ffffb3a ... OK
+
+    Starting kernel ...
+
+    [    0.582377] omap_init_mbox: hwmod doesn't have valid attrs
+    [    2.589651] musb-hdrc musb-hdrc.0.auto: Failed to request rx1.
+    [    2.595830] musb-hdrc musb-hdrc.0.auto: musb_init_controller failed with status -517
+    [    2.606470] musb-hdrc musb-hdrc.1.auto: Failed to request rx1.
+    [    2.612723] musb-hdrc musb-hdrc.1.auto: musb_init_controller failed with status -517
+    [    2.940808] drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
+    [    7.248889] libphy: PHY 4a101000.mdio:01 not found
+    [    7.253995] net eth0: phy 4a101000.mdio:01 not found on slave 1
+    systemd-fsck[83]: Angstrom: clean, 50607/218160 files, 306348/872448 blocks
+
+    .---O---.
+    |       |                  .-.           o o
+    |   |   |-----.-----.-----.| |   .----..-----.-----.
+    |       |     | __  |  ---'| '--.|  .-'|     |     |
+    |   |   |  |  |     |---  ||  --'|  |  |  '  | | | |
+    '---'---'--'--'--.  |-----''----''--'  '-----'-'-'-'
+                    -'  |
+                    '---'
+
+    The Angstrom Distribution beaglebone ttyO0
+
+    Angstrom v2012.12 - Kernel 3.14.1+
+
+    beaglebone login:
+
+At this point your kernel has been verified and you can be sure that it is one
+that you signed. As an exercise, try changing image.fit as in step 5 and see
+what happens.
+
+
+Further Improvements
+--------------------
+
+Several of the steps here can be easily automated. In particular it would be
+capital if signing and packaging a kernel were easy, perhaps a simple make
+target in the kernel. A starting point for this is the 'make image.fit' target
+for ARM64 in Linux from v6.9 onwards.
+
+Some mention of how to use multiple .dtb files in a FIT might be useful.
+
+Perhaps the verified boot feature could be integrated into the Amstrom
+distribution.
+
+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>, 2-June-14
diff --git a/doc/usage/fit/howto.rst b/doc/usage/fit/howto.rst
new file mode 100644
index 00000000000..b5097d4460b
--- /dev/null
+++ b/doc/usage/fit/howto.rst
@@ -0,0 +1,419 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+How to use images in the new image format
+=========================================
+
+Overview
+--------
+
+The new uImage format allows more flexibility in handling images of various
+types (kernel, ramdisk, etc.), it also enhances integrity protection of images
+with cryptographic checksums.
+
+Two auxiliary tools are needed on the development host system in order to
+create an uImage in the new format: mkimage and dtc, although only one
+(mkimage) is invoked directly. dtc is called from within mkimage and operates
+behind the scenes, but needs to be present in the $PATH nevertheless. It is
+important that the dtc used has support for binary includes -- refer to::
+
+    git://git.kernel.org/pub/scm/utils/dtc/dtc.git
+
+for its latest version. mkimage (together with dtc) takes as input
+an image source file, which describes the contents of the image and defines
+its various properties used during booting. By convention, image source file
+has the ".its" extension, also, the details of its format are provided in
+:doc:`source_file_format`. The actual data that is to be included in
+the uImage (kernel, ramdisk, etc.) is specified in the image source file in the
+form of paths to appropriate data files. The outcome of the image creation
+process is a binary file (by convention with the ".itb" extension) that
+contains all the referenced data (kernel, ramdisk, etc.) and other information
+needed by U-Boot to handle the uImage properly. The uImage file is then
+transferred to the target (e.g., via tftp) and booted using the bootm command.
+
+To summarize the prerequisites needed for new uImage creation:
+
+- mkimage
+- dtc (with support for binary includes)
+- image source file (`*.its`)
+- image data file(s)
+
+
+Here's a graphical overview of the image creation and booting process::
+
+    image source file     mkimage + dtc          transfer to target
+        +          ---------------> image file --------------------> bootm
+    image data file(s)
+
+SPL usage
+---------
+
+The SPL can make use of the new image format as well, this traditionally
+is used to ship multiple device tree files within one image. Code in the SPL
+will choose the one matching the current board and append this to the
+U-Boot proper binary to be automatically used up by it.
+Aside from U-Boot proper and one device tree blob the SPL can load multiple,
+arbitrary image files as well. These binaries should be specified in their
+own subnode under the /images node, which should then be referenced from one or
+multiple /configurations subnodes. The required images must be enumerated in
+the "loadables" property as a list of strings.
+
+If a platform specific image source file (.its) is shipped with the U-Boot
+source, it can be specified using the CONFIG_SPL_FIT_SOURCE Kconfig symbol.
+In this case it will be automatically used by U-Boot's Makefile to generate
+the image.
+If a static source file is not flexible enough, CONFIG_SPL_FIT_GENERATOR
+can point to a script which generates this image source file during
+the build process. It gets passed a list of device tree files (taken from the
+CONFIG_OF_LIST symbol).
+
+The SPL also records to a DT all additional images (called loadables) which are
+loaded. The information about loadables locations is passed via the DT node with
+fit-images name.
+
+Finally, if there are multiple xPL phases (e.g. SPL, VPL), images can be marked
+as intended for a particular phase using the 'phase' property. For example, if
+fit_image_load() is called with image_ph(IH_PHASE_SPL, IH_TYPE_FIRMWARE), then
+only the image listed into the "firmware" property where phase is set to "spl"
+will be loaded.
+
+Loadables Example
+-----------------
+Consider the following case for an ARM64 platform where U-Boot runs in EL2
+started by ATF where SPL is loading U-Boot (as loadables) and ATF (as firmware).
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "Configuration to load ATF before U-Boot";
+
+        images {
+            uboot {
+                description = "U-Boot (64-bit)";
+                data = /incbin/("u-boot-nodtb.bin");
+                type = "firmware";
+                os = "u-boot";
+                arch = "arm64";
+                compression = "none";
+                load = <0x8 0x8000000>;
+                entry = <0x8 0x8000000>;
+                hash {
+                    algo = "sha256";
+                };
+            };
+            atf {
+                description = "ARM Trusted Firmware";
+                data = /incbin/("bl31.bin");
+                type = "firmware";
+                os = "arm-trusted-firmware";
+                arch = "arm64";
+                compression = "none";
+                load = <0xfffea000>;
+                entry = <0xfffea000>;
+                hash {
+                    algo = "sha256";
+                };
+            };
+            fdt_1 {
+                description = "zynqmp-zcu102-revA";
+                data = /incbin/("arch/arm/dts/zynqmp-zcu102-revA.dtb");
+                type = "flat_dt";
+                arch = "arm64";
+                compression = "none";
+                load = <0x100000>;
+                hash {
+                    algo = "sha256";
+                };
+            };
+        };
+        configurations {
+            default = "config_1";
+
+            config_1 {
+                description = "zynqmp-zcu102-revA";
+                firmware = "atf";
+                loadables = "uboot";
+                fdt = "fdt_1";
+            };
+        };
+    };
+
+In this case the SPL records via fit-images DT node the information about
+loadables U-Boot image::
+
+    ZynqMP> fdt addr $fdtcontroladdr
+    ZynqMP> fdt print /fit-images
+    fit-images {
+        uboot {
+            os = "u-boot";
+            type = "firmware";
+            size = <0x001017c8>;
+            entry = <0x00000008 0x08000000>;
+            load = <0x00000008 0x08000000>;
+        };
+    };
+
+As you can see entry and load properties are 64bit wide to support loading
+images above 4GB (in past entry and load properties where just 32bit).
+
+
+Example 1 -- old-style (non-FDT) kernel booting
+-----------------------------------------------
+
+Consider a simple scenario, where a PPC Linux kernel built from sources on the
+development host is to be booted old-style (non-FDT) by U-Boot on an embedded
+target. Assume that the outcome of the build is vmlinux.bin.gz, a file which
+contains a gzip-compressed PPC Linux kernel (the only data file in this case).
+The uImage can be produced using the image source file
+doc/uImage.FIT/kernel.its (note that kernel.its assumes that vmlinux.bin.gz is
+in the current working directory; if desired, an alternative path can be
+specified in the kernel.its file). Here's how to create the image and inspect
+its contents:
+
+[on the host system]::
+
+    $ mkimage -f kernel.its kernel.itb
+    DTC: dts->dtb  on file "kernel.its"
+    $
+    $ mkimage -l kernel.itb
+    FIT description: Simple image with single Linux kernel
+    Created:     Tue Mar 11 17:26:15 2008
+     Image 0 (kernel)
+      Description:    Vanilla Linux kernel
+      Type:        Kernel Image
+      Compression:    gzip compressed
+      Data Size:    943347 Bytes = 921.24 kB = 0.90 MB
+      Architecture: PowerPC
+      OS:        Linux
+      Load Address: 0x00000000
+      Entry Point:    0x00000000
+      Hash algo:    crc32
+      Hash value:    2ae2bb40
+      Hash algo:    sha256
+      Hash value:    c22f6bb5a3f96942507a37e7d6a9333ebdc7da57971bc4c082113fe082fdc40f
+     Default Configuration: 'config-1'
+     Configuration 0 (config-1)
+      Description:    Boot Linux kernel
+      Kernel:    kernel
+
+
+The resulting image file kernel.itb can be now transferred to the target,
+inspected and booted (note that first three U-Boot commands below are shown
+for completeness -- they are part of the standard booting procedure and not
+specific to the new image format).
+
+[on the target system]::
+
+    => print nfsargs
+    nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath}
+    => print addip
+    addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off panic=1
+    => run nfsargs addip
+    => tftp 900000 /path/to/tftp/location/kernel.itb
+    Using FEC device
+    TFTP from server 192.168.1.1; our IP address is 192.168.160.5
+    Filename '/path/to/tftp/location/kernel.itb'.
+    Load address: 0x900000
+    Loading: #################################################################
+    done
+    Bytes transferred = 944464 (e6950 hex)
+    => iminfo
+
+    ## Checking Image at 00900000 ...
+       FIT image found
+       FIT description: Simple image with single Linux kernel
+       Created:        2008-03-11    16:26:15 UTC
+        Image 0 (kernel)
+         Description:  Vanilla Linux kernel
+         Type:       Kernel Image
+         Compression:  gzip compressed
+         Data Start:   0x009000e0
+         Data Size:    943347 Bytes = 921.2 kB
+         Architecture: PowerPC
+         OS:       Linux
+         Load Address: 0x00000000
+         Entry Point:  0x00000000
+         Hash algo:    crc32
+         Hash value:   2ae2bb40
+         Hash algo:    sha256
+         Hash value:   c22f6bb5a3f96942507a37e7d6a9333ebdc7da57971bc4c082113fe082fdc40f
+        Default Configuration: 'config-1'
+        Configuration 0 (config-1)
+         Description:  Boot Linux kernel
+         Kernel:       kernel
+
+    => bootm
+    ## Booting kernel from FIT Image at 00900000 ...
+       Using 'config-1' configuration
+       Trying 'kernel' kernel subimage
+         Description:  Vanilla Linux kernel
+         Type:       Kernel Image
+         Compression:  gzip compressed
+         Data Start:   0x009000e0
+         Data Size:    943347 Bytes = 921.2 kB
+         Architecture: PowerPC
+         OS:       Linux
+         Load Address: 0x00000000
+         Entry Point:  0x00000000
+         Hash algo:    crc32
+         Hash value:   2ae2bb40
+         Hash algo:    sha256
+         Hash value:   c22f6bb5a3f96942507a37e7d6a9333ebdc7da57971bc4c082113fe082fdc40f
+       Verifying Hash Integrity ... crc32+ sha1+ OK
+       Uncompressing Kernel Image ... OK
+    Memory BAT mapping: BAT2=256Mb, BAT3=0Mb, residual: 0Mb
+    Linux version 2.4.25 (m8@hekate) (gcc version 4.0.0 (DENX ELDK 4.0 4.0.0)) #2 czw lip 5 17:56:18 CEST 2007
+    On node 0 totalpages: 65536
+    zone(0): 65536 pages.
+    zone(1): 0 pages.
+    zone(2): 0 pages.
+    Kernel command line: root=/dev/nfs rw nfsroot=192.168.1.1:/opt/eldk-4.1/ppc_6xx ip=192.168.160.5:192.168.1.1::255.255.0.0:lite5200b:eth0:off panic=1
+    Calibrating delay loop... 307.20 BogoMIPS
+
+
+Example 2 -- new-style (FDT) kernel booting
+-------------------------------------------
+
+Consider another simple scenario, where a PPC Linux kernel is to be booted
+new-style, i.e., with a FDT blob. In this case there are two prerequisite data
+files: vmlinux.bin.gz (Linux kernel) and target.dtb (FDT blob). The uImage can
+be produced using image source file doc/uImage.FIT/kernel_fdt.its like this
+(note again, that both prerequisite data files are assumed to be present in
+the current working directory -- image source file kernel_fdt.its can be
+modified to take the files from some other location if needed):
+
+[on the host system]::
+
+    $ mkimage -f kernel_fdt.its kernel_fdt.itb
+    DTC: dts->dtb  on file "kernel_fdt.its"
+    $
+    $ mkimage -l kernel_fdt.itb
+    FIT description: Simple image with single Linux kernel and FDT blob
+    Created:     Tue Mar 11 16:29:22 2008
+     Image 0 (kernel)
+      Description:    Vanilla Linux kernel
+      Type:        Kernel Image
+      Compression:    gzip compressed
+      Data Size:    1092037 Bytes = 1066.44 kB = 1.04 MB
+      Architecture: PowerPC
+      OS:        Linux
+      Load Address: 0x00000000
+      Entry Point:    0x00000000
+      Hash algo:    crc32
+      Hash value:    2c0cc807
+      Hash algo:    sha256
+      Hash value:    a3e9e18b793873827d27c97edfbca67c404a1972d9f36cf48e73ff85d69a422c
+     Image 1 (fdt-1)
+      Description:    Flattened Device Tree blob
+      Type:        Flat Device Tree
+      Compression:    uncompressed
+      Data Size:    16384 Bytes = 16.00 kB = 0.02 MB
+      Architecture: PowerPC
+      Hash algo:    crc32
+      Hash value:    0d655d71
+      Hash algo:    sha256
+      Hash value:    e9b9a40c5e2e12213ac819e7ccad7271ef43eb5edf9b421f0fa0b4b51bfdb214
+     Default Configuration: 'conf-1'
+     Configuration 0 (conf-1)
+      Description:    Boot Linux kernel with FDT blob
+      Kernel:    kernel
+      FDT:        fdt-1
+
+
+The resulting image file kernel_fdt.itb can be now transferred to the target,
+inspected and booted:
+
+[on the target system]::
+
+    => tftp 900000 /path/to/tftp/location/kernel_fdt.itb
+    Using FEC device
+    TFTP from server 192.168.1.1; our IP address is 192.168.160.5
+    Filename '/path/to/tftp/location/kernel_fdt.itb'.
+    Load address: 0x900000
+    Loading: #################################################################
+         ###########
+    done
+    Bytes transferred = 1109776 (10ef10 hex)
+    => iminfo
+
+    ## Checking Image at 00900000 ...
+       FIT image found
+       FIT description: Simple image with single Linux kernel and FDT blob
+       Created:        2008-03-11    15:29:22 UTC
+        Image 0 (kernel)
+         Description:  Vanilla Linux kernel
+         Type:       Kernel Image
+         Compression:  gzip compressed
+         Data Start:   0x009000ec
+         Data Size:    1092037 Bytes =  1 MB
+         Architecture: PowerPC
+         OS:       Linux
+         Load Address: 0x00000000
+         Entry Point:  0x00000000
+         Hash algo:    crc32
+         Hash value:   2c0cc807
+         Hash algo:    sha256
+         Hash value:   a3e9e18b793873827d27c97edfbca67c404a1972d9f36cf48e73ff85d69a422c
+        Image 1 (fdt-1)
+         Description:  Flattened Device Tree blob
+         Type:       Flat Device Tree
+         Compression:  uncompressed
+         Data Start:   0x00a0abdc
+         Data Size:    16384 Bytes = 16 kB
+         Architecture: PowerPC
+         Hash algo:    crc32
+         Hash value:   0d655d71
+         Hash algo:    sha256
+         Hash value:   e9b9a40c5e2e12213ac819e7ccad7271ef43eb5edf9b421f0fa0b4b51bfdb214
+        Default Configuration: 'conf-1'
+        Configuration 0 (conf-1)
+         Description:  Boot Linux kernel with FDT blob
+         Kernel:       kernel
+         FDT:       fdt-1
+    => bootm
+    ## Booting kernel from FIT Image at 00900000 ...
+       Using 'conf-1' configuration
+       Trying 'kernel' kernel subimage
+         Description:  Vanilla Linux kernel
+         Type:       Kernel Image
+         Compression:  gzip compressed
+         Data Start:   0x009000ec
+         Data Size:    1092037 Bytes =  1 MB
+         Architecture: PowerPC
+         OS:       Linux
+         Load Address: 0x00000000
+         Entry Point:  0x00000000
+         Hash algo:    crc32
+         Hash value:   2c0cc807
+         Hash algo:    sha1
+         Hash value:   a3e9e18b793873827d27c97edfbca67c404a1972d9f36cf48e73ff85d69a422c
+       Verifying Hash Integrity ... crc32+ sha1+ OK
+       Uncompressing Kernel Image ... OK
+    ## Flattened Device Tree from FIT Image at 00900000
+       Using 'conf-1' configuration
+       Trying 'fdt-1' FDT blob subimage
+         Description:  Flattened Device Tree blob
+         Type:       Flat Device Tree
+         Compression:  uncompressed
+         Data Start:   0x00a0abdc
+         Data Size:    16384 Bytes = 16 kB
+         Architecture: PowerPC
+         Hash algo:    crc32
+         Hash value:   0d655d71
+         Hash algo:    sha1
+         Hash value:   e9b9a40c5e2e12213ac819e7ccad7271ef43eb5edf9b421f0fa0b4b51bfdb214
+       Verifying Hash Integrity ... crc32+ sha1+ OK
+       Booting using the fdt blob at 0xa0abdc
+       Loading Device Tree to 007fc000, end 007fffff ... OK
+    [    0.000000] Using lite5200 machine description
+    [    0.000000] Linux version 2.6.24-rc6-gaebecdfc (m8@hekate) (gcc version 4.0.0 (DENX ELDK 4.1 4.0.0)) #1 Sat Jan 12 15:38:48 CET 2008
+
+
+Example 3 -- advanced booting
+-----------------------------
+
+Refer to :doc:`multi` for an image source file that allows more
+sophisticated booting scenarios (multiple kernels, ramdisks and fdt blobs).
+
+.. sectionauthor:: Bartlomiej Sieka <tur@semihalf.com>
diff --git a/doc/usage/fit/index.rst b/doc/usage/fit/index.rst
new file mode 100644
index 00000000000..a822bf20cb2
--- /dev/null
+++ b/doc/usage/fit/index.rst
@@ -0,0 +1,32 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Flat Image Tree (FIT)
+=====================
+
+U-Boot uses Flat Image Tree (FIT) as a standard file format for packaging
+images that it reads and boots. Documentation about FIT is available in
+`the Flattened Image Tree project <https://fitspec.osfw.foundation/>`_.
+
+.. toctree::
+    :maxdepth: 1
+
+    beaglebone_vboot
+    howto
+    kernel_fdt
+    kernel_fdts_compressed
+    kernel
+    multi
+    multi_spl
+    multi-with-fpga
+    multi-with-loadables
+    overlay-fdt-boot
+    sec_firmware_ppa
+    signature
+    sign-configs
+    sign-images
+    source_file_format
+    uefi
+    update3
+    update_uboot
+    verified-boot
+    x86-fit-boot
\ No newline at end of file
diff --git a/doc/usage/fit/kernel.rst b/doc/usage/fit/kernel.rst
new file mode 100644
index 00000000000..e56017985b2
--- /dev/null
+++ b/doc/usage/fit/kernel.rst
@@ -0,0 +1,93 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Single kernel
+=============
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "Simple image with single Linux kernel";
+        #address-cells = <1>;
+
+        images {
+            kernel {
+                description = "Vanilla Linux kernel";
+                data = /incbin/("./vmlinux.bin.gz");
+                type = "kernel";
+                arch = "ppc";
+                os = "linux";
+                compression = "gzip";
+                load = <00000000>;
+                entry = <00000000>;
+                hash-1 {
+                    algo = "crc32";
+                };
+                hash-2 {
+                    algo = "sha256";
+                };
+            };
+        };
+
+        configurations {
+            default = "config-1";
+            config-1 {
+                description = "Boot Linux kernel";
+                kernel = "kernel";
+            };
+        };
+    };
+
+
+For x86 a setup node is also required: see x86-fit-boot::
+
+    /dts-v1/;
+
+    / {
+        description = "Simple image with single Linux kernel on x86";
+        #address-cells = <1>;
+
+        images {
+            kernel {
+                description = "Vanilla Linux kernel";
+                data = /incbin/("./image.bin.lzo");
+                type = "kernel";
+                arch = "x86";
+                os = "linux";
+                compression = "lzo";
+                load = <0x01000000>;
+                entry = <0x00000000>;
+                hash-2 {
+                    algo = "sha256";
+                };
+            };
+
+            setup {
+                description = "Linux setup.bin";
+                data = /incbin/("./setup.bin");
+                type = "x86_setup";
+                arch = "x86";
+                os = "linux";
+                compression = "none";
+                load = <0x00090000>;
+                entry = <0x00090000>;
+                hash-2 {
+                    algo = "sha256";
+                };
+            };
+        };
+
+        configurations {
+            default = "config-1";
+            config-1 {
+                description = "Boot Linux kernel";
+                kernel = "kernel";
+                setup = "setup";
+            };
+        };
+    };
+
+Note: the above assumes a 32-bit kernel. To directly boot a 64-bit kernel,
+change both arch values to "x86_64". U-Boot will then change to 64-bit mode
+before booting the kernel (see boot_linux_kernel()).
diff --git a/doc/usage/fit/kernel_fdt.rst b/doc/usage/fit/kernel_fdt.rst
new file mode 100644
index 00000000000..9cc26fb7831
--- /dev/null
+++ b/doc/usage/fit/kernel_fdt.rst
@@ -0,0 +1,54 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Single kernel and FDT blob
+==========================
+
+::
+
+	/dts-v1/;
+
+	/ {
+	description = "Simple image with single Linux kernel and FDT blob";
+	#address-cells = <1>;
+
+	images {
+		kernel {
+		description = "Vanilla Linux kernel";
+		data = /incbin/("./vmlinux.bin.gz");
+		type = "kernel";
+		arch = "ppc";
+		os = "linux";
+		compression = "gzip";
+		load = <00000000>;
+		entry = <00000000>;
+		hash-1 {
+			algo = "crc32";
+		};
+		hash-2 {
+			algo = "sha256";
+		};
+		};
+		fdt-1 {
+		description = "Flattened Device Tree blob";
+		data = /incbin/("./target.dtb");
+		type = "flat_dt";
+		arch = "ppc";
+		compression = "none";
+		hash-1 {
+			algo = "crc32";
+		};
+		hash-2 {
+			algo = "sha256";
+		};
+		};
+	};
+
+	configurations {
+		default = "conf-1";
+		conf-1 {
+		description = "Boot Linux kernel with FDT blob";
+		kernel = "kernel";
+		fdt = "fdt-1";
+		};
+	};
+	};
diff --git a/doc/usage/fit/kernel_fdts_compressed.rst b/doc/usage/fit/kernel_fdts_compressed.rst
new file mode 100644
index 00000000000..b57871da58b
--- /dev/null
+++ b/doc/usage/fit/kernel_fdts_compressed.rst
@@ -0,0 +1,77 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Kernel and multiple compressed FDT blobs
+========================================
+
+Since the FDTs are compressed, configurations must provide a compatible
+string to match directly.
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "Image with single Linux kernel and compressed FDT blobs";
+        #address-cells = <1>;
+
+        images {
+            kernel {
+                description = "Vanilla Linux kernel";
+                data = /incbin/("./vmlinux.bin.gz");
+                type = "kernel";
+                arch = "ppc";
+                os = "linux";
+                compression = "gzip";
+                load = <00000000>;
+                entry = <00000000>;
+                hash-1 {
+                    algo = "crc32";
+                };
+                hash-2 {
+                    algo = "sha256";
+                };
+            };
+            fdt@1 {
+                description = "Flattened Device Tree blob 1";
+                data = /incbin/("./myboard-var1.dtb");
+                type = "flat_dt";
+                arch = "ppc";
+                compression = "gzip";
+                hash-1 {
+                    algo = "crc32";
+                };
+                hash-2 {
+                    algo = "sha256";
+                };
+            };
+            fdt@2 {
+                description = "Flattened Device Tree blob 2";
+                data = /incbin/("./myboard-var2.dtb");
+                type = "flat_dt";
+                arch = "ppc";
+                compression = "lzma";
+                hash-1 {
+                    algo = "crc32";
+                };
+                hash-2 {
+                    algo = "sha256";
+                };
+            };
+        };
+
+        configurations {
+            default = "conf@1";
+            conf@1 {
+                description = "Boot Linux kernel with FDT blob 1";
+                kernel = "kernel";
+                fdt = "fdt@1";
+                compatible = "myvendor,myboard-variant1";
+            };
+            conf@2 {
+                description = "Boot Linux kernel with FDT blob 2";
+                kernel = "kernel";
+                fdt = "fdt@2";
+                compatible = "myvendor,myboard-variant2";
+            };
+        };
+    };
diff --git a/doc/usage/fit/multi-with-fpga.rst b/doc/usage/fit/multi-with-fpga.rst
new file mode 100644
index 00000000000..4c7f1bebd5a
--- /dev/null
+++ b/doc/usage/fit/multi-with-fpga.rst
@@ -0,0 +1,70 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Multiple kernels, ramdisks and FDT blobs with FPGA
+==================================================
+
+This example makes use of the 'loadables' field::
+
+    /dts-v1/;
+
+    / {
+        description = "Configuration to load fpga before Kernel";
+        #address-cells = <1>;
+
+        images {
+            fdt-1 {
+                description = "zc706";
+                data = /incbin/("/tftpboot/devicetree.dtb");
+                type = "flat_dt";
+                arch = "arm";
+                compression = "none";
+                load = <0x10000000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            fpga {
+                description = "FPGA";
+                data = /incbin/("/tftpboot/download.bit");
+                type = "fpga";
+                arch = "arm";
+                compression = "none";
+                load = <0x30000000>;
+                compatible = "u-boot,fpga-legacy"
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            linux_kernel {
+                description = "Linux";
+                data = /incbin/("/tftpboot/zImage");
+                type = "kernel";
+                arch = "arm";
+                os = "linux";
+                compression = "none";
+                load = <0x8000>;
+                entry = <0x8000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+        };
+
+        configurations {
+            default = "config-2";
+            config-1 {
+                description = "Linux";
+                kernel = "linux_kernel";
+                fdt = "fdt-1";
+            };
+
+            config-2 {
+                description = "Linux with fpga";
+                kernel = "linux_kernel";
+                fdt = "fdt-1";
+                loadables = "fpga";
+            };
+        };
+    };
diff --git a/doc/usage/fit/multi-with-loadables.rst b/doc/usage/fit/multi-with-loadables.rst
new file mode 100644
index 00000000000..7849cb544f1
--- /dev/null
+++ b/doc/usage/fit/multi-with-loadables.rst
@@ -0,0 +1,91 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Multiple kernels, ramdisks and FDT blobs with Xen
+=================================================
+
+This example makes use of the 'loadables' field::
+
+    /dts-v1/;
+
+    / {
+        description = "Configuration to load a Xen Kernel";
+        #address-cells = <1>;
+
+        images {
+            xen_kernel {
+                description = "xen binary";
+                data = /incbin/("./xen");
+                type = "kernel";
+                arch = "arm";
+                os = "linux";
+                compression = "none";
+                load = <0xa0000000>;
+                entry = <0xa0000000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            fdt-1 {
+                description = "xexpress-ca15 tree blob";
+                data = /incbin/("./vexpress-v2p-ca15-tc1.dtb");
+                type = "flat_dt";
+                arch = "arm";
+                compression = "none";
+                load = <0xb0000000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            fdt-2 {
+                description = "xexpress-ca15 tree blob";
+                data = /incbin/("./vexpress-v2p-ca15-tc1.dtb");
+                type = "flat_dt";
+                arch = "arm";
+                compression = "none";
+                load = <0xb0400000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            linux_kernel {
+                description = "Linux Image";
+                data = /incbin/("./Image");
+                type = "kernel";
+                arch = "arm";
+                os = "linux";
+                compression = "none";
+                load = <0xa0000000>;
+                entry = <0xa0000000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+        };
+
+        configurations {
+            default = "config-2";
+
+            config-1 {
+                description = "Just plain Linux";
+                kernel = "linux_kernel";
+                fdt = "fdt-1";
+            };
+
+            config-2 {
+                description = "Xen one loadable";
+                kernel = "xen_kernel";
+                fdt = "fdt-1";
+                loadables = "linux_kernel";
+            };
+
+            config-3 {
+                description = "Xen two loadables";
+                kernel = "xen_kernel";
+                fdt = "fdt-1";
+                loadables = "linux_kernel", "fdt-2";
+            };
+        };
+    };
diff --git a/doc/usage/fit/multi.rst b/doc/usage/fit/multi.rst
new file mode 100644
index 00000000000..e68752b2ad0
--- /dev/null
+++ b/doc/usage/fit/multi.rst
@@ -0,0 +1,136 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Multiple kernels, ramdisks and FDT blobs
+========================================
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "Various kernels, ramdisks and FDT blobs";
+        #address-cells = <1>;
+
+        images {
+            kernel-1 {
+                description = "vanilla-2.6.23";
+                data = /incbin/("./vmlinux.bin.gz");
+                type = "kernel";
+                arch = "ppc";
+                os = "linux";
+                compression = "gzip";
+                load = <00000000>;
+                entry = <00000000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+                hash-2 {
+                    algo = "sha512";
+                };
+            };
+
+            kernel-2 {
+                description = "2.6.23-denx";
+                data = /incbin/("./2.6.23-denx.bin.gz");
+                type = "kernel";
+                arch = "ppc";
+                os = "linux";
+                compression = "gzip";
+                load = <00000000>;
+                entry = <00000000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            kernel-3 {
+                description = "2.4.25-denx";
+                data = /incbin/("./2.4.25-denx.bin.gz");
+                type = "kernel";
+                arch = "ppc";
+                os = "linux";
+                compression = "gzip";
+                load = <00000000>;
+                entry = <00000000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            ramdisk-1 {
+                description = "eldk-4.2-ramdisk";
+                data = /incbin/("./eldk-4.2-ramdisk");
+                type = "ramdisk";
+                arch = "ppc";
+                os = "linux";
+                compression = "gzip";
+                load = <00000000>;
+                entry = <00000000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            ramdisk-2 {
+                description = "eldk-3.1-ramdisk";
+                data = /incbin/("./eldk-3.1-ramdisk");
+                type = "ramdisk";
+                arch = "ppc";
+                os = "linux";
+                compression = "gzip";
+                load = <00000000>;
+                entry = <00000000>;
+                hash-1 {
+                    algo = "crc32";
+                };
+            };
+
+            fdt-1 {
+                description = "tqm5200-fdt";
+                data = /incbin/("./tqm5200.dtb");
+                type = "flat_dt";
+                arch = "ppc";
+                compression = "none";
+                hash-1 {
+                    algo = "crc32";
+                };
+            };
+
+            fdt-2 {
+                description = "tqm5200s-fdt";
+                data = /incbin/("./tqm5200s.dtb");
+                type = "flat_dt";
+                arch = "ppc";
+                compression = "none";
+                load = <00700000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+        };
+
+        configurations {
+            default = "config-1";
+
+            config-1 {
+                description = "tqm5200 vanilla-2.6.23 configuration";
+                kernel = "kernel-1";
+                ramdisk = "ramdisk-1";
+                fdt = "fdt-1";
+            };
+
+            config-2 {
+                description = "tqm5200s denx-2.6.23 configuration";
+                kernel = "kernel-2";
+                ramdisk = "ramdisk-1";
+                fdt = "fdt-2";
+            };
+
+            config-3 {
+                description = "tqm5200s denx-2.4.25 configuration";
+                kernel = "kernel-3";
+                ramdisk = "ramdisk-2";
+            };
+        };
+    };
diff --git a/doc/usage/fit/multi_spl.rst b/doc/usage/fit/multi_spl.rst
new file mode 100644
index 00000000000..74b6f865abd
--- /dev/null
+++ b/doc/usage/fit/multi_spl.rst
@@ -0,0 +1,101 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Multiple images for SPL
+=======================
+
+(Bogus) example FIT image description file demonstrating the usage
+of multiple images loaded by the SPL.
+Several binaries will be loaded at their respective load addresses.
+
+For booting U-Boot, "firmware" is searched first. If not found, "loadables"
+is used to identify images to be loaded into memory. If falcon boot is
+enabled, "kernel" is searched first. If not found, it falls back to the
+same flow as booting U-Boot. Changing image type will result skipping
+specific image.
+
+Finally the one image specifying an entry point will be entered by the SPL.
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "multiple firmware blobs and U-Boot, loaded by SPL";
+        #address-cells = <0x1>;
+
+        images {
+
+            uboot {
+                description = "U-Boot (64-bit)";
+                type = "standalone";
+                arch = "arm64";
+                compression = "none";
+                load = <0x4a000000>;
+            };
+
+            atf {
+                description = "ARM Trusted Firmware";
+                type = "firmware";
+                arch = "arm64";
+                compression = "none";
+                load = <0x18000>;
+                entry = <0x18000>;
+            };
+
+            mgmt-firmware {
+                description = "arisc management processor firmware";
+                type = "firmware";
+                arch = "or1k";
+                compression = "none";
+                load = <0x40000>;
+            };
+
+            fdt-1 {
+                description = "Pine64+ DT";
+                type = "flat_dt";
+                compression = "none";
+                load = <0x4fa00000>;
+                arch = "arm64";
+            };
+
+            fdt-2 {
+                description = "Pine64 DT";
+                type = "flat_dt";
+                compression = "none";
+                load = <0x4fa00000>;
+                arch = "arm64";
+            };
+
+            kernel {
+                description = "4.7-rc5 kernel";
+                type = "kernel";
+                compression = "none";
+                load = <0x40080000>;
+                arch = "arm64";
+            };
+
+            initrd {
+                description = "Debian installer initrd";
+                type = "ramdisk";
+                compression = "none";
+                load = <0x4fe00000>;
+                arch = "arm64";
+            };
+        };
+
+        configurations {
+            default = "config-1";
+
+            config-1 {
+                description = "sun50i-a64-pine64-plus";
+                loadables = "uboot", "atf", "kernel", "initrd";
+                fdt = "fdt-1";
+            };
+
+            config-2 {
+                description = "sun50i-a64-pine64";
+                loadables = "uboot", "atf", "mgmt-firmware";
+                fdt = "fdt-2";
+            };
+        };
+    };
diff --git a/doc/usage/fit/overlay-fdt-boot.rst b/doc/usage/fit/overlay-fdt-boot.rst
new file mode 100644
index 00000000000..a7db1a37f7a
--- /dev/null
+++ b/doc/usage/fit/overlay-fdt-boot.rst
@@ -0,0 +1,227 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot FDT Overlay FIT usage
+============================
+
+Introduction
+------------
+
+In many cases it is desirable to have a single FIT image support a multitude
+of similar boards and their expansion options. The same kernel on DT enabled
+platforms can support this easily enough by providing a DT blob upon boot
+that matches the desired configuration.
+
+This document focuses on specifically using overlays as part of a FIT image.
+General information regarding overlays including its syntax and building it
+can be found in doc/README.fdt-overlays
+
+Configuration without overlays
+------------------------------
+
+Take a hypothetical board named 'foo' where there are different supported
+revisions, reva and revb. Assume that both board revisions can use add a bar
+add-on board, while only the revb board can use a baz add-on board.
+
+Without using overlays the configuration would be as follows for every case::
+
+	/dts-v1/;
+	/ {
+	    images {
+	    kernel {
+		data = /incbin/("./zImage");
+		type = "kernel";
+		arch = "arm";
+		os = "linux";
+		load = <0x82000000>;
+		entry = <0x82000000>;
+	    };
+	    fdt-1 {
+		data = /incbin/("./foo-reva.dtb");
+		type = "flat_dt";
+		arch = "arm";
+	    };
+	    fdt-2 {
+		data = /incbin/("./foo-revb.dtb");
+		type = "flat_dt";
+		arch = "arm";
+	    };
+	    fdt-3 {
+		data = /incbin/("./foo-reva-bar.dtb");
+		type = "flat_dt";
+		arch = "arm";
+	    };
+	    fdt-4 {
+		data = /incbin/("./foo-revb-bar.dtb");
+		type = "flat_dt";
+		arch = "arm";
+	    };
+	    fdt-5 {
+		data = /incbin/("./foo-revb-baz.dtb");
+		type = "flat_dt";
+		arch = "arm";
+	    };
+	    fdt-6 {
+		data = /incbin/("./foo-revb-bar-baz.dtb");
+		type = "flat_dt";
+		arch = "arm";
+	    };
+	    };
+
+	    configurations {
+	    default = "foo-reva.dtb;
+	    foo-reva.dtb {
+		kernel = "kernel";
+		fdt = "fdt-1";
+	    };
+	    foo-revb.dtb {
+		kernel = "kernel";
+		fdt = "fdt-2";
+	    };
+	    foo-reva-bar.dtb {
+		kernel = "kernel";
+		fdt = "fdt-3";
+	    };
+	    foo-revb-bar.dtb {
+		kernel = "kernel";
+		fdt = "fdt-4";
+	    };
+	    foo-revb-baz.dtb {
+		kernel = "kernel";
+		fdt = "fdt-5";
+	    };
+	    foo-revb-bar-baz.dtb {
+		kernel = "kernel";
+		fdt = "fdt-6";
+	    };
+	    };
+	};
+
+Note the blob needs to be compiled for each case and the combinatorial explosion of
+configurations. A typical device tree blob is in the low hunderds of kbytes so a
+multitude of configuration grows the image quite a bit.
+
+Booting this image is done by using::
+
+    # bootm <addr>#<config>
+
+Where config is one of::
+
+    foo-reva.dtb, foo-revb.dtb, foo-reva-bar.dtb, foo-revb-bar.dtb,
+    foo-revb-baz.dtb, foo-revb-bar-baz.dtb
+
+This selects the DTB to use when booting.
+
+Configuration using overlays
+----------------------------
+
+Device tree overlays can be applied to a base DT and result in the same blob
+being passed to the booting kernel. This saves on space and avoid the combinatorial
+explosion problem::
+
+    /dts-v1/;
+    / {
+        images {
+            kernel {
+                data = /incbin/("./zImage");
+                type = "kernel";
+                arch = "arm";
+                os = "linux";
+                load = <0x82000000>;
+                entry = <0x82000000>;
+            };
+            fdt-1 {
+                data = /incbin/("./foo.dtb");
+                type = "flat_dt";
+                arch = "arm";
+                load = <0x87f00000>;
+            };
+            fdt-2 {
+                data = /incbin/("./reva.dtbo");
+                type = "flat_dt";
+                arch = "arm";
+                load = <0x87fc0000>;
+            };
+            fdt-3 {
+                data = /incbin/("./revb.dtbo");
+                type = "flat_dt";
+                arch = "arm";
+                load = <0x87fc0000>;
+            };
+            fdt-4 {
+                data = /incbin/("./bar.dtbo");
+                type = "flat_dt";
+                arch = "arm";
+                load = <0x87fc0000>;
+            };
+            fdt-5 {
+                data = /incbin/("./baz.dtbo");
+                type = "flat_dt";
+                arch = "arm";
+                load = <0x87fc0000>;
+            };
+        };
+
+        configurations {
+            default = "foo-reva.dtb;
+            foo-reva.dtb {
+                kernel = "kernel";
+                fdt = "fdt-1", "fdt-2";
+            };
+            foo-revb.dtb {
+                kernel = "kernel";
+                fdt = "fdt-1", "fdt-3";
+            };
+            foo-reva-bar.dtb {
+                kernel = "kernel";
+                fdt = "fdt-1", "fdt-2", "fdt-4";
+            };
+            foo-revb-bar.dtb {
+                kernel = "kernel";
+                fdt = "fdt-1", "fdt-3", "fdt-4";
+            };
+            foo-revb-baz.dtb {
+                kernel = "kernel";
+                fdt = "fdt-1", "fdt-3", "fdt-5";
+            };
+            foo-revb-bar-baz.dtb {
+                kernel = "kernel";
+                fdt = "fdt-1", "fdt-3", "fdt-4", "fdt-5";
+            };
+            bar {
+                fdt = "fdt-4";
+            };
+            baz {
+                fdt = "fdt-5";
+            };
+        };
+    };
+
+Booting this image is exactly the same as the non-overlay example.
+u-boot will retrieve the base blob and apply the overlays in sequence as
+they are declared in the configuration.
+
+Note the minimum amount of different DT blobs, as well as the requirement for
+the DT blobs to have a load address; the overlay application requires the blobs
+to be writeable.
+
+Configuration using overlays and feature selection
+--------------------------------------------------
+
+Although the configuration in the previous section works is a bit inflexible
+since it requires all possible configuration options to be laid out before
+hand in the FIT image. For the add-on boards the extra config selection method
+might make sense.
+
+Note the two bar & baz configuration nodes. To boot a reva board with
+the bar add-on board enabled simply use::
+
+    => bootm <addr>#foo-reva.dtb#bar
+
+While booting a revb with bar and baz is as follows::
+
+    => bootm <addr>#foo-revb.dtb#bar#baz
+
+The limitation for a feature selection configuration node is that a single
+fdt option is currently supported.
+
+.. sectionauthor:: Pantelis Antoniou <pantelis.antoniou@konsulko.com>, 12/6/2017
diff --git a/doc/usage/fit/sec_firmware_ppa.rst b/doc/usage/fit/sec_firmware_ppa.rst
new file mode 100644
index 00000000000..4cb292cb4ee
--- /dev/null
+++ b/doc/usage/fit/sec_firmware_ppa.rst
@@ -0,0 +1,54 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+SEC Firmware and multiple loadable images
+=========================================
+
+Example FIT image description file demonstrating the usage
+of SEC Firmware and multiple loadable images loaded by U-Boot.
+For booting PPA (SEC Firmware), "firmware" is searched and loaded.
+
+Multiple binaries will be loaded as "loadables" (if present) at their
+respective load offsets from firmware image address.
+
+::
+
+    /dts-v1/;
+
+    /{
+        description = "PPA Firmware";
+        #address-cells = <1>;
+        images {
+            firmware@1 {
+                description = "PPA Firmware: <version>";
+                data = /incbin/("../obj/monitor.bin");
+                type = "firmware";
+                arch = "arm64";
+                compression = "none";
+            };
+            trustedOS@1 {
+                description = "Trusted OS";
+                data = /incbin/("../../tee.bin");
+                type = "OS";
+                arch = "arm64";
+                compression = "none";
+                load = <0x00200000>;
+            };
+            fuse_scr {
+                description = "Fuse Script";
+                data = /incbin/("../../fuse_scr.bin");
+                type = "firmware";
+                arch = "arm64";
+                compression = "none";
+                load = <0x00180000>;
+            };
+        };
+
+        configurations {
+            default = "config-1";
+            config-1 {
+                description = "PPA Secure firmware";
+                firmware = "firmware@1";
+                loadables = "trustedOS@1", "fuse_scr";
+            };
+        };
+    };
diff --git a/doc/usage/fit/sign-configs.rst b/doc/usage/fit/sign-configs.rst
new file mode 100644
index 00000000000..6d98d44430c
--- /dev/null
+++ b/doc/usage/fit/sign-configs.rst
@@ -0,0 +1,52 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Signed configurations
+=====================
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "Chrome OS kernel image with one or more FDT blobs";
+        #address-cells = <1>;
+
+        images {
+            kernel {
+                data = /incbin/("test-kernel.bin");
+                type = "kernel_noload";
+                arch = "sandbox";
+                os = "linux";
+                compression = "lzo";
+                load = <0x4>;
+                entry = <0x8>;
+                kernel-version = <1>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+            fdt-1 {
+                description = "snow";
+                data = /incbin/("sandbox-kernel.dtb");
+                type = "flat_dt";
+                arch = "sandbox";
+                compression = "none";
+                fdt-version = <1>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+        };
+        configurations {
+            default = "conf-1";
+            conf-1 {
+                kernel = "kernel";
+                fdt = "fdt-1";
+                signature {
+                    algo = "sha256,rsa2048";
+                    key-name-hint = "dev";
+                    sign-images = "fdt", "kernel";
+                };
+            };
+        };
+    };
diff --git a/doc/usage/fit/sign-images.rst b/doc/usage/fit/sign-images.rst
new file mode 100644
index 00000000000..ca7d10fab83
--- /dev/null
+++ b/doc/usage/fit/sign-images.rst
@@ -0,0 +1,49 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Signed Images
+=============
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "Chrome OS kernel image with one or more FDT blobs";
+        #address-cells = <1>;
+
+        images {
+            kernel {
+                data = /incbin/("test-kernel.bin");
+                type = "kernel_noload";
+                arch = "sandbox";
+                os = "linux";
+                compression = "none";
+                load = <0x4>;
+                entry = <0x8>;
+                kernel-version = <1>;
+                signature {
+                    algo = "sha256,rsa2048";
+                    key-name-hint = "dev";
+                };
+            };
+            fdt-1 {
+                description = "snow";
+                data = /incbin/("sandbox-kernel.dtb");
+                type = "flat_dt";
+                arch = "sandbox";
+                compression = "none";
+                fdt-version = <1>;
+                signature {
+                    algo = "sha256,rsa2048";
+                    key-name-hint = "dev";
+                };
+            };
+        };
+        configurations {
+            default = "conf-1";
+            conf-1 {
+                kernel = "kernel";
+                fdt = "fdt-1";
+            };
+        };
+    };
diff --git a/doc/usage/fit/signature.rst b/doc/usage/fit/signature.rst
new file mode 100644
index 00000000000..b868dcbf9fd
--- /dev/null
+++ b/doc/usage/fit/signature.rst
@@ -0,0 +1,696 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot FIT Signature Verification
+=================================
+
+Introduction
+------------
+
+FIT supports hashing of images so that these hashes can be checked on
+loading. This protects against corruption of the image. However it does not
+prevent the substitution of one image for another.
+
+The signature feature allows the hash to be signed with a private key such
+that it can be verified using a public key later. Provided that the private
+key is kept secret and the public key is stored in a non-volatile place,
+any image can be verified in this way.
+
+See :doc:`verified-boot` for more general information on verified boot.
+
+
+Concepts
+--------
+
+Some familiarity with public key cryptography is assumed in this section.
+
+The procedure for signing is as follows:
+
+   - hash an image in the FIT
+   - sign the hash with a private key to produce a signature
+   - store the resulting signature in the FIT
+
+The procedure for verification is:
+
+   - read the FIT
+   - obtain the public key
+   - extract the signature from the FIT
+   - hash the image from the FIT
+   - verify (with the public key) that the extracted signature matches the
+     hash
+
+The signing is generally performed by mkimage, as part of making a firmware
+image for the device. The verification is normally done in U-Boot on the
+device.
+
+
+Algorithms
+----------
+In principle any suitable algorithm can be used to sign and verify a hash.
+U-Boot supports a few hashing and verification algorithms. See below for
+details.
+
+While it is acceptable to bring in large cryptographic libraries such as
+openssl on the host side (e.g. mkimage), it is not desirable for U-Boot.
+For the run-time verification side, it is important to keep code and data
+size as small as possible.
+
+For this reason the RSA image verification uses pre-processed public keys
+which can be used with a very small amount of code - just some extraction
+of data from the FDT and exponentiation mod n. Code size impact is a little
+under 5KB on Tegra Seaboard, for example.
+
+It is relatively straightforward to add new algorithms if required. If
+another RSA variant is needed, then it can be added with the
+U_BOOT_CRYPTO_ALGO() macro. If another algorithm is needed (such as DSA) then
+it can be placed in a directory alongside lib/rsa/, and its functions added
+using U_BOOT_CRYPTO_ALGO().
+
+
+Creating an RSA key pair and certificate
+----------------------------------------
+To create a new public/private key pair, size 2048 bits::
+
+    $ openssl genpkey -algorithm RSA -out keys/dev.key \
+        -pkeyopt rsa_keygen_bits:2048 -pkeyopt rsa_keygen_pubexp:65537
+
+To create a certificate for this containing the public key::
+
+    $ openssl req -batch -new -x509 -key keys/dev.key -out keys/dev.crt
+
+If you like you can look at the public key also::
+
+    $ openssl rsa -in keys/dev.key -pubout
+
+
+Public Key Storage
+------------------
+In order to verify an image that has been signed with a public key we need to
+have a trusted public key. This cannot be stored in the signed image, since
+it would be easy to alter. For this implementation we choose to store the
+public key in U-Boot's control FDT (using CONFIG_OF_CONTROL).
+
+Public keys should be stored as sub-nodes in a /signature node. Required
+properties are:
+
+algo
+    Algorithm name (e.g. "sha256,rsa2048" or "sha512,ecdsa256")
+
+Optional properties are:
+
+key-name-hint
+    Name of key used for signing. This is only a hint since it
+    is possible for the name to be changed. Verification can proceed by checking
+    all available signing keys until one matches.
+
+required
+    If present this indicates that the key must be verified for the
+    image / configuration to be considered valid. Only required keys are
+    normally verified by the FIT image booting algorithm. Valid values are
+    "image" to force verification of all images, and "conf" to force verification
+    of the selected configuration (which then relies on hashes in the images to
+    verify those).
+
+Each signing algorithm has its own additional properties.
+
+For RSA the following are mandatory:
+
+rsa,num-bits
+    Number of key bits (e.g. 2048)
+
+rsa,modulus
+    Modulus (N) as a big-endian multi-word integer
+
+rsa,exponent
+    Public exponent (E) as a 64 bit unsigned integer
+
+rsa,r-squared
+    (2^num-bits)^2 as a big-endian multi-word integer
+
+rsa,n0-inverse
+    -1 / modulus[0] mod 2^32
+
+For ECDSA the following are mandatory:
+
+ecdsa,curve
+    Name of ECDSA curve (e.g. "prime256v1")
+
+ecdsa,x-point
+    Public key X coordinate as a big-endian multi-word integer
+
+ecdsa,y-point
+    Public key Y coordinate as a big-endian multi-word integer
+
+These parameters can be added to a binary device tree using parameter -K of the
+mkimage command::
+
+    tools/mkimage -f fit.its -K control.dtb -k keys -r image.fit
+
+Here is an example of a generated device tree node::
+
+    signature {
+        key-dev {
+            required = "conf";
+            algo = "sha256,rsa2048";
+            rsa,r-squared = <0xb76d1acf 0xa1763ca5 0xeb2f126
+                    0x742edc80 0xd3f42177 0x9741d9d9
+                    0x35bb476e 0xff41c718 0xd3801430
+                    0xf22537cb 0xa7e79960 0xae32a043
+                    0x7da1427a 0x341d6492 0x3c2762f5
+                    0xaac04726 0x5b262d96 0xf984e86d
+                    0xb99443c7 0x17080c33 0x940f6892
+                    0xd57a95d1 0x6ea7b691 0xc5038fa8
+                    0x6bb48a6e 0x73f1b1ea 0x37160841
+                    0xe05715ce 0xa7c45bbd 0x690d82d5
+                    0x99c2454c 0x6ff117b3 0xd830683b
+                    0x3f81c9cf 0x1ca38a91 0x0c3392e4
+                    0xd817c625 0x7b8e9a24 0x175b89ea
+                    0xad79f3dc 0x4d50d7b4 0x9d4e90f8
+                    0xad9e2939 0xc165d6a4 0x0ada7e1b
+                    0xfb1bf495 0xfc3131c2 0xb8c6e604
+                    0xc2761124 0xf63de4a6 0x0e9565f9
+                    0xc8e53761 0x7e7a37a5 0xe99dcdae
+                    0x9aff7e1e 0xbd44b13d 0x6b0e6aa4
+                    0x038907e4 0x8e0d6850 0xef51bc20
+                    0xf73c94af 0x88bea7b1 0xcbbb1b30
+                    0xd024b7f3>;
+            rsa,modulus = <0xc0711d6cb 0x9e86db7f 0x45986dbe
+                       0x023f1e8c9 0xe1a4c4d0 0x8a0dfdc9
+                       0x023ba0c48 0x06815f6a 0x5caa0654
+                       0x07078c4b7 0x3d154853 0x40729023
+                       0x0b007c8fe 0x5a3647e5 0x23b41e20
+                       0x024720591 0x66915305 0x0e0b29b0
+                       0x0de2ad30d 0x8589430f 0xb1590325
+                       0x0fb9f5d5e 0x9eba752a 0xd88e6de9
+                       0x056b3dcc6 0x9a6b8e61 0x6784f61f
+                       0x000f39c21 0x5eec6b33 0xd78e4f78
+                       0x0921a305f 0xaa2cc27e 0x1ca917af
+                       0x06e1134f4 0xd48cac77 0x4e914d07
+                       0x0f707aa5a 0x0d141f41 0x84677f1d
+                       0x0ad47a049 0x028aedb6 0xd5536fcf
+                       0x03fef1e4f 0x133a03d2 0xfd7a750a
+                       0x0f9159732 0xd207812e 0x6a807375
+                       0x06434230d 0xc8e22dad 0x9f29b3d6
+                       0x07c44ac2b 0xfa2aad88 0xe2429504
+                       0x041febd41 0x85d0d142 0x7b194d65
+                       0x06e5d55ea 0x41116961 0xf3181dde
+                       0x068bf5fbc 0x3dd82047 0x00ee647e
+                       0x0d7a44ab3>;
+            rsa,exponent = <0x00 0x10001>;
+            rsa,n0-inverse = <0xb3928b85>;
+            rsa,num-bits = <0x800>;
+            key-name-hint = "dev";
+        };
+    };
+
+
+Signed Configurations
+---------------------
+While signing images is useful, it does not provide complete protection
+against several types of attack. For example, it is possible to create a
+FIT with the same signed images, but with the configuration changed such
+that a different one is selected (mix and match attack). It is also possible
+to substitute a signed image from an older FIT version into a newer FIT
+(roll-back attack).
+
+As an example, consider this FIT::
+
+    / {
+        images {
+            kernel-1 {
+                data = <data for kernel1>
+                signature-1 {
+                    algo = "sha256,rsa2048";
+                    value = <...kernel signature 1...>
+                };
+            };
+            kernel-2 {
+                data = <data for kernel2>
+                signature-1 {
+                    algo = "sha256,rsa2048";
+                    value = <...kernel signature 2...>
+                };
+            };
+            fdt-1 {
+                data = <data for fdt1>;
+                signature-1 {
+                    algo = "sha256,rsa2048";
+                    value = <...fdt signature 1...>
+                };
+            };
+            fdt-2 {
+                data = <data for fdt2>;
+                signature-1 {
+                    algo = "sha256,rsa2048";
+                    value = <...fdt signature 2...>
+                };
+            };
+        };
+        configurations {
+            default = "conf-1";
+            conf-1 {
+                kernel = "kernel-1";
+                fdt = "fdt-1";
+            };
+            conf-2 {
+                kernel = "kernel-2";
+                fdt = "fdt-2";
+            };
+        };
+    };
+
+Since both kernels are signed it is easy for an attacker to add a new
+configuration 3 with kernel 1 and fdt 2::
+
+    configurations {
+        default = "conf-1";
+        conf-1 {
+            kernel = "kernel-1";
+            fdt = "fdt-1";
+        };
+        conf-2 {
+            kernel = "kernel-2";
+            fdt = "fdt-2";
+        };
+        conf-3 {
+            kernel = "kernel-1";
+            fdt = "fdt-2";
+        };
+    };
+
+With signed images, nothing protects against this. Whether it gains an
+advantage for the attacker is debatable, but it is not secure.
+
+To solve this problem, we support signed configurations. In this case it
+is the configurations that are signed, not the image. Each image has its
+own hash, and we include the hash in the configuration signature.
+
+So the above example is adjusted to look like this::
+
+    / {
+        images {
+            kernel-1 {
+                data = <data for kernel1>
+                hash-1 {
+                    algo = "sha256";
+                    value = <...kernel hash 1...>
+                };
+            };
+            kernel-2 {
+                data = <data for kernel2>
+                hash-1 {
+                    algo = "sha256";
+                    value = <...kernel hash 2...>
+                };
+            };
+            fdt-1 {
+                data = <data for fdt1>;
+                hash-1 {
+                    algo = "sha256";
+                    value = <...fdt hash 1...>
+                };
+            };
+            fdt-2 {
+                data = <data for fdt2>;
+                hash-1 {
+                    algo = "sha256";
+                    value = <...fdt hash 2...>
+                };
+            };
+        };
+        configurations {
+            default = "conf-1";
+            conf-1 {
+                kernel = "kernel-1";
+                fdt = "fdt-1";
+                signature-1 {
+                    algo = "sha256,rsa2048";
+                    value = <...conf 1 signature...>;
+                };
+            };
+            conf-2 {
+                kernel = "kernel-2";
+                fdt = "fdt-2";
+                signature-1 {
+                    algo = "sha256,rsa2048";
+                    value = <...conf 1 signature...>;
+                };
+            };
+        };
+    };
+
+
+You can see that we have added hashes for all images (since they are no
+longer signed), and a signature to each configuration. In the above example,
+mkimage will sign configurations/conf-1, the kernel and fdt that are
+pointed to by the configuration (/images/kernel-1, /images/kernel-1/hash-1,
+/images/fdt-1, /images/fdt-1/hash-1) and the root structure of the image
+(so that it isn't possible to add or remove root nodes). The signature is
+written into /configurations/conf-1/signature-1/value. It can easily be
+verified later even if the FIT has been signed with other keys in the
+meantime.
+
+
+Details
+-------
+The signature node contains a property ('hashed-nodes') which lists all the
+nodes that the signature was made over.  The image is walked in order and each
+tag processed as follows:
+
+DTB_BEGIN_NODE
+    The tag and the following name are included in the signature
+    if the node or its parent are present in 'hashed-nodes'
+
+DTB_END_NODE
+    The tag is included in the signature if the node or its parent
+    are present in 'hashed-nodes'
+
+DTB_PROPERTY
+    The tag, the length word, the offset in the string table, and
+    the data are all included if the current node is present in 'hashed-nodes'
+    and the property name is not 'data'.
+
+DTB_END
+    The tag is always included in the signature.
+
+DTB_NOP
+    The tag is included in the signature if the current node is present
+    in 'hashed-nodes'
+
+In addition, the signature contains a property 'hashed-strings' which contains
+the offset and length in the string table of the strings that are to be
+included in the signature (this is done last).
+
+IMPORTANT:  To verify the signature outside u-boot, it is vital to not only
+calculate the hash of the image and verify the signature with that, but also to
+calculate the hashes of the kernel, fdt, and ramdisk images and check those
+match the hash values in the corresponding 'hash*' subnodes.
+
+
+Verification
+------------
+FITs are verified when loaded. After the configuration is selected a list
+of required images is produced. If there are 'required' public keys, then
+each image must be verified against those keys. This means that every image
+that might be used by the target needs to be signed with 'required' keys.
+
+This happens automatically as part of a bootm command when FITs are used.
+
+For Signed Configurations, the default verification behavior can be changed by
+the following optional property in /signature node in U-Boot's control FDT.
+
+required-mode
+    Valid values are "any" to allow verified boot to succeed if
+    the selected configuration is signed by any of the 'required' keys, and "all"
+    to allow verified boot to succeed if the selected configuration is signed by
+    all of the 'required' keys.
+
+This property can be added to a binary device tree using fdtput as shown in
+below examples::
+
+    fdtput -t s control.dtb /signature required-mode any
+    fdtput -t s control.dtb /signature required-mode all
+
+
+Enabling FIT Verification
+-------------------------
+In addition to the options to enable FIT itself, the following CONFIGs must
+be enabled:
+
+CONFIG_FIT_SIGNATURE
+    enable signing and verification in FITs
+
+CONFIG_RSA
+    enable RSA algorithm for signing
+
+CONFIG_ECDSA
+    enable ECDSA algorithm for signing
+
+WARNING: When relying on signed FIT images with required signature check
+the legacy image format is default disabled by not defining
+CONFIG_LEGACY_IMAGE_FORMAT
+
+
+Testing
+-------
+
+An easy way to test signing and verification is to use the test script
+provided in test/vboot/vboot_test.sh. This uses sandbox (a special version
+of U-Boot which runs under Linux) to show the operation of a 'bootm'
+command loading and verifying images.
+
+A sample run is show below::
+
+    $ make O=sandbox sandbox_config
+    $ make O=sandbox
+    $ O=sandbox ./test/vboot/vboot_test.sh
+
+
+Simple Verified Boot Test
+-------------------------
+
+Please see :doc:`verified-boot` for more information::
+
+    /home/hs/ids/u-boot/sandbox/tools/mkimage -D -I dts -O dtb -p 2000
+    Build keys
+    do sha1 test
+    Build FIT with signed images
+    Test Verified Boot Run: unsigned signatures:: OK
+    Sign images
+    Test Verified Boot Run: signed images: OK
+    Build FIT with signed configuration
+    Test Verified Boot Run: unsigned config: OK
+    Sign images
+    Test Verified Boot Run: signed config: OK
+    check signed config on the host
+    Signature check OK
+    OK
+    Test Verified Boot Run: signed config: OK
+    Test Verified Boot Run: signed config with bad hash: OK
+    do sha256 test
+    Build FIT with signed images
+    Test Verified Boot Run: unsigned signatures:: OK
+    Sign images
+    Test Verified Boot Run: signed images: OK
+    Build FIT with signed configuration
+    Test Verified Boot Run: unsigned config: OK
+    Sign images
+    Test Verified Boot Run: signed config: OK
+    check signed config on the host
+    Signature check OK
+    OK
+    Test Verified Boot Run: signed config: OK
+    Test Verified Boot Run: signed config with bad hash: OK
+
+    Test passed
+
+
+Software signing: keydir vs keyfile
+-----------------------------------
+
+In the simplest case, signing is done by giving mkimage the 'keyfile'. This is
+the path to a file containing the signing key.
+
+The alternative is to pass the 'keydir' argument. In this case the filename of
+the key is derived from the 'keydir' and the "key-name-hint" property in the
+FIT. In this case the "key-name-hint" property is mandatory, and the key must
+exist in "<keydir>/<key-name-hint>.<ext>" Here the extension "ext" is
+specific to the signing algorithm.
+
+
+Hardware Signing with PKCS#11 or with HSM
+-----------------------------------------
+
+Securely managing private signing keys can challenging, especially when the
+keys are stored on the file system of a computer that is connected to the
+Internet. If an attacker is able to steal the key, they can sign malicious FIT
+images which will appear genuine to your devices.
+
+An alternative solution is to keep your signing key securely stored on hardware
+device like a smartcard, USB token or Hardware Security Module (HSM) and have
+them perform the signing. PKCS#11 is standard for interfacing with these crypto
+device.
+
+Requirements:
+    - Smartcard/USB token/HSM which can work with some openssl engine
+    - openssl
+
+For pkcs11 engine usage:
+    - libp11 (provides pkcs11 engine)
+    - p11-kit (recommended to simplify setup)
+    - opensc (for smartcards and smartcard like USB devices)
+    - gnutls (recommended for key generation, p11tool)
+
+For generic HSMs respective openssl engine must be installed and locateable by
+openssl. This may require setting up LD_LIBRARY_PATH if engine is not installed
+to openssl's default search paths.
+
+PKCS11 engine support forms "key id" based on "keydir" and with
+"key-name-hint". "key-name-hint" is used as "object" name (if not defined in
+keydir). "keydir" (if defined) is used to define (prefix for) which PKCS11 source
+is being used for lookup up for the key.
+
+PKCS11 engine key ids
+    "pkcs11:<keydir>;object=<key-name-hint>;type=<public|private>"
+
+or, if keydir contains "object="
+    "pkcs11:<keydir>;type=<public|private>"
+
+or
+    "pkcs11:object=<key-name-hint>;type=<public|private>",
+
+Generic HSM engine support forms "key id" based on "keydir" and with
+"key-name-hint". If "keydir" is specified for mkimage it is used as a prefix in
+"key id" and is appended with "key-name-hint".
+
+Generic engine key ids:
+    "<keydir><key-name-hint>"
+
+or
+    "<  key-name-hint>"
+
+In order to set the pin in the HSM, an environment variable "MKIMAGE_SIGN_PIN"
+can be specified.
+
+The following examples use the Nitrokey Pro using pkcs11 engine. Instructions
+for other devices may vary.
+
+Notes on pkcs11 engine setup:
+
+Make sure p11-kit, opensc are installed and that p11-kit is setup to use opensc.
+/usr/share/p11-kit/modules/opensc.module should be present on your system.
+
+
+Generating Keys On the Nitrokey::
+
+    $ gpg --card-edit
+
+    Reader ...........: Nitrokey Nitrokey Pro (xxxxxxxx0000000000000000) 00 00
+    Application ID ...: xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+    Version ..........: 2.1
+    Manufacturer .....: ZeitControl
+    Serial number ....: xxxxxxxx
+    Name of cardholder: [not set]
+    Language prefs ...: de
+    Sex ..............: unspecified
+    URL of public key : [not set]
+    Login data .......: [not set]
+    Signature PIN ....: forced
+    Key attributes ...: rsa2048 rsa2048 rsa2048
+    Max. PIN lengths .: 32 32 32
+    PIN retry counter : 3 0 3
+    Signature counter : 0
+    Signature key ....: [none]
+    Encryption key....: [none]
+    Authentication key: [none]
+    General key info..: [none]
+
+    gpg/card> generate
+    Make off-card backup of encryption key? (Y/n) n
+
+    Please note that the factory settings of the PINs are
+    PIN = '123456' Admin PIN = '12345678'
+    You should change them using the command --change-pin
+
+    What keysize do you want for the Signature key? (2048) 4096
+    The card will now be re-configured to generate a key of 4096 bits
+    Note: There is no guarantee that the card supports the requested size.
+    If the key generation does not succeed, please check the
+    documentation of your card to see what sizes are allowed.
+    What keysize do you want for the Encryption key? (2048) 4096
+    The card will now be re-configured to generate a key of 4096 bits
+    What keysize do you want for the Authentication key? (2048) 4096
+    The card will now be re-configured to generate a key of 4096 bits
+    Please specify how long the key should be valid.
+    0 = key does not expire
+    <n> = key expires in n days
+    <n>w = key expires in n weeks
+    <n>m = key expires in n months
+    <n>y = key expires in n years
+    Key is valid for? (0)
+    Key does not expire at all
+    Is this correct? (y/N) y
+
+    GnuPG needs to construct a user ID to identify your key.
+
+    Real name: John Doe
+    Email address: john.doe@email.com
+    Comment:
+    You selected this USER-ID:
+    "John Doe <john.doe@email.com>"
+
+    Change (N)ame, (C)omment, (E)mail or (O)kay/(Q)uit? o
+
+
+Using p11tool to get the token URL:
+
+Depending on system configuration, gpg-agent may need to be killed first::
+
+    $ p11tool --provider /usr/lib/opensc-pkcs11.so --list-tokens
+    Token 0:
+    URL: pkcs11:model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29
+    Label: OpenPGP card (User PIN (sig))
+    Type: Hardware token
+    Manufacturer: ZeitControl
+    Model: PKCS#15 emulated
+    Serial: 000xxxxxxxxx
+    Module: (null)
+
+
+    Token 1:
+    URL: pkcs11:model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%29
+    Label: OpenPGP card (User PIN)
+    Type: Hardware token
+    Manufacturer: ZeitControl
+    Model: PKCS#15 emulated
+    Serial: 000xxxxxxxxx
+    Module: (null)
+
+Use the portion of the signature token URL after "pkcs11:" as the keydir argument (-k) to mkimage below.
+
+
+Use the URL of the token to list the private keys::
+
+    $ p11tool --login --provider /usr/lib/opensc-pkcs11.so --list-privkeys \
+    "pkcs11:model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29"
+    Token 'OpenPGP card (User PIN (sig))' with URL 'pkcs11:model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29' requires user PIN
+    Enter PIN:
+    Object 0:
+    URL: pkcs11:model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29;id=%01;object=Signature%20key;type=private
+    Type: Private key
+    Label: Signature key
+    Flags: CKA_PRIVATE; CKA_NEVER_EXTRACTABLE; CKA_SENSITIVE;
+    ID: 01
+
+Use the label, in this case "Signature key" as the key-name-hint in your FIT.
+
+Create the fitImage::
+
+    $ ./tools/mkimage -f fit-image.its fitImage
+
+
+Sign the fitImage with the hardware key::
+
+    $ ./tools/mkimage -F -k \
+    "pkcs11:model=PKCS%2315%20emulated;manufacturer=ZeitControl;serial=000xxxxxxxxx;token=OpenPGP%20card%20%28User%20PIN%20%28sig%29%29" \
+    -K u-boot.dtb -N pkcs11 -r fitImage
+
+
+Future Work
+-----------
+
+- Roll-back protection using a TPM is done using the tpm command. This can
+  be scripted, but we might consider a default way of doing this, built into
+  bootm.
+
+
+Possible Future Work
+--------------------
+
+- More sandbox tests for failure modes
+- Passwords for keys/certificates
+- Perhaps implement OAEP
+- Enhance bootm to permit scripted signature verification (so that a script
+  can verify an image but not actually boot it)
+
+
+.. sectionauthor:: Simon Glass <sjg@chromium.org>, 1-1-13
diff --git a/doc/usage/fit/source_file_format.rst b/doc/usage/fit/source_file_format.rst
new file mode 100644
index 00000000000..2bd8e792350
--- /dev/null
+++ b/doc/usage/fit/source_file_format.rst
@@ -0,0 +1,8 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Flattened Image Tree (FIT) Format
+=================================
+
+FIT format documentation has been moved to
+`a separate project <https://fitspec.osfw.foundation/>`_. Updates to the
+format/specification should be submitted there.
diff --git a/doc/usage/fit/uefi.rst b/doc/usage/fit/uefi.rst
new file mode 100644
index 00000000000..3bbacb5cad0
--- /dev/null
+++ b/doc/usage/fit/uefi.rst
@@ -0,0 +1,72 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+UEFI
+====
+
+Example FIT image description file demonstrating the usage of the
+bootm command to launch UEFI binaries.
+
+Two boot configurations are available to enable booting GRUB2 on QEMU,
+the former uses a FDT blob contained in the FIT image, while the later
+relies on the FDT provided by the board emulator.
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "GRUB2 EFI and QEMU FDT blob";
+        #address-cells = <1>;
+
+        images {
+            efi-grub {
+                description = "GRUB EFI Firmware";
+                data = /incbin/("bootarm.efi");
+                type = "kernel_noload";
+                arch = "arm";
+                os = "efi";
+                compression = "none";
+                load = <0x0>;
+                entry = <0x0>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            fdt-qemu {
+                description = "QEMU DTB";
+                data = /incbin/("qemu-arm.dtb");
+                type = "flat_dt";
+                arch = "arm";
+                compression = "none";
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+        };
+
+        configurations {
+            default = "config-grub-fdt";
+
+            config-grub-fdt {
+                description = "GRUB EFI Boot w/ FDT";
+                kernel = "efi-grub";
+                fdt = "fdt-qemu";
+                signature-1 {
+                    algo = "sha256,rsa2048";
+                    key-name-hint = "dev";
+                    sign-images = "kernel", "fdt";
+                };
+            };
+
+            config-grub-nofdt {
+                description = "GRUB EFI Boot w/o FDT";
+                kernel = "efi-grub";
+                signature-1 {
+                    algo = "sha256,rsa2048";
+                    key-name-hint = "dev";
+                    sign-images = "kernel";
+                };
+            };
+        };
+    };
diff --git a/doc/usage/fit/update3.rst b/doc/usage/fit/update3.rst
new file mode 100644
index 00000000000..24235801470
--- /dev/null
+++ b/doc/usage/fit/update3.rst
@@ -0,0 +1,47 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Automatic software update: multiple files
+=========================================
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "Automatic software updates: kernel, ramdisk, FDT";
+        #address-cells = <1>;
+
+        images {
+            update-1 {
+                description = "Linux kernel binary";
+                data = /incbin/("./vmlinux.bin.gz");
+                compression = "none";
+                type = "firmware";
+                load = <FF700000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+            update-2 {
+                description = "Ramdisk image";
+                data = /incbin/("./ramdisk_image.gz");
+                compression = "none";
+                type = "firmware";
+                load = <FF8E0000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+
+            update-3 {
+                description = "FDT blob";
+                data = /incbin/("./blob.fdt");
+                compression = "none";
+                type = "firmware";
+                load = <FFAC0000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+        };
+    };
diff --git a/doc/usage/fit/update_uboot.rst b/doc/usage/fit/update_uboot.rst
new file mode 100644
index 00000000000..811d008d13d
--- /dev/null
+++ b/doc/usage/fit/update_uboot.rst
@@ -0,0 +1,28 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Automatic software update
+=========================
+
+Make sure the flashing addresses ('load' prop) is correct for your board!
+
+::
+
+    /dts-v1/;
+
+    / {
+        description = "Automatic U-Boot update";
+        #address-cells = <1>;
+
+        images {
+            update-1 {
+                description = "U-Boot binary";
+                data = /incbin/("./u-boot.bin");
+                compression = "none";
+                type = "firmware";
+                load = <0xFFFC0000>;
+                hash-1 {
+                    algo = "sha256";
+                };
+            };
+        };
+    };
diff --git a/doc/usage/fit/verified-boot.rst b/doc/usage/fit/verified-boot.rst
new file mode 100644
index 00000000000..301207711db
--- /dev/null
+++ b/doc/usage/fit/verified-boot.rst
@@ -0,0 +1,107 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+U-Boot Verified Boot
+====================
+
+Introduction
+------------
+
+Verified boot here means the verification of all software loaded into a
+machine during the boot process to ensure that it is authorised and correct
+for that machine.
+
+Verified boot extends from the moment of system reset to as far as you wish
+into the boot process. An example might be loading U-Boot from read-only
+memory, then loading a signed kernel, then using the kernel's dm-verity
+driver to mount a signed root filesystem.
+
+A key point is that it is possible to field-upgrade the software on machines
+which use verified boot. Since the machine will only run software that has
+been correctly signed, it is safe to read software from an updatable medium.
+It is also possible to add a secondary signed firmware image, in read-write
+memory, so that firmware can easily be upgraded in a secure manner.
+
+
+Signing
+-------
+
+Verified boot uses cryptographic algorithms to 'sign' software images.
+Images are signed using a private key known only to the signer, but can
+be verified using a public key. As its name suggests the public key can be
+made available without risk to the verification process. The private and
+public keys are mathematically related. For more information on how this
+works look up "public key cryptography" and "RSA" (a particular algorithm).
+
+The signing and verification process looks something like this::
+
+
+          Signing                                      Verification
+          =======                                      ============
+
+      +--------------+                 *
+      | RSA key pair |                 *             +---------------+
+      | .key  .crt   |                 *             | Public key in |
+      +--------------+     +------> public key ----->| trusted place |
+            |              |           *             +---------------+
+            |              |           *                    |
+            v              |           *                    v
+       +---------+         |           *             +--------------+
+       |         |---------+           *             |              |
+       | signer  |                     *             |    U-Boot    |
+       |         |---------+           *             |  signature   |--> yes/no
+       +---------+         |           *             | verification |
+            ^              |           *             |              |
+            |              |           *             +--------------+
+            |              |           *                    ^
+       +----------+        |           *                    |
+       | Software |        +----> signed image -------------+
+       |  image   |                    *
+       +----------+                    *
+
+
+The signature algorithm relies only on the public key to do its work. Using
+this key it checks the signature that it finds in the image. If it verifies
+then we know that the image is OK.
+
+The public key from the signer allows us to verify and therefore trust
+software from updatable memory.
+
+It is critical that the public key be secure and cannot be tampered with.
+It can be stored in read-only memory, or perhaps protected by other on-chip
+crypto provided by some modern SOCs. If the public key can be changed, then
+the verification is worthless.
+
+
+Chaining Images
+---------------
+
+The above method works for a signer providing images to a run-time U-Boot.
+It is also possible to extend this scheme to a second level, like this:
+
+#. Master private key is used by the signer to sign a first-stage image.
+#. Master public key is placed in read-only memory.
+#. Secondary private key is created and used to sign second-stage images.
+#. Secondary public key is placed in first stage images
+#. We use the master public key to verify the first-stage image. We then
+   use the secondary public key in the first-stage image to verify the second-
+   state image.
+#. This chaining process can go on indefinitely. It is recommended to use a
+   different key at each stage, so that a compromise in one place will not
+   affect the whole change.
+
+
+Flattened Image Tree (FIT)
+--------------------------
+
+The FIT format is already widely used in U-Boot. It is a flattened device
+tree (FDT) in a particular format, with images contained within. FITs
+include hashes to verify images, so it is relatively straightforward to
+add signatures as well.
+
+The public key can be stored in U-Boot's CONFIG_OF_CONTROL device tree in
+a standard place. Then when a FIT is loaded it can be verified using that
+public key. Multiple keys and multiple signatures are supported.
+
+See :doc:`signature` for more information.
+
+.. sectionauthor:: Simon Glass <sjg@chromium.org> 1-1-13
diff --git a/doc/usage/fit/x86-fit-boot.rst b/doc/usage/fit/x86-fit-boot.rst
new file mode 100644
index 00000000000..9e3e32204d5
--- /dev/null
+++ b/doc/usage/fit/x86-fit-boot.rst
@@ -0,0 +1,269 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Booting Linux on x86 with FIT
+=============================
+
+Background
+----------
+
+Generally Linux x86 uses its own very complex booting method. There is a setup
+binary which contains all sorts of parameters and a compressed self-extracting
+binary for the kernel itself, often with a small built-in serial driver to
+display decompression progress.
+
+The x86 CPU has various processor modes. I am no expert on these, but my
+understanding is that an x86 CPU (even a really new one) starts up in a 16-bit
+'real' mode where only 1MB of memory is visible, moves to 32-bit 'protected'
+mode where 4GB is visible (or more with special memory access techniques) and
+then to 64-bit 'long' mode if 64-bit execution is required.
+
+Partly the self-extracting nature of Linux was introduced to cope with boot
+loaders that were barely capable of loading anything. Even changing to 32-bit
+mode was something of a challenge, so putting this logic in the kernel seemed
+to make sense.
+
+Bit by bit more and more logic has been added to this post-boot pre-Linux
+wrapper:
+
+- Changing to 32-bit mode
+- Decompression
+- Serial output (with drivers for various chips)
+- Load address randomisation
+- Elf loader complete with relocation (for the above)
+- Random number generator via 3 methods (again for the above)
+- Some sort of EFI mini-loader (1000+ glorious lines of code)
+- Locating and tacking on a device tree and ramdisk
+
+To my mind, if you sit back and look at things from first principles, this
+doesn't make a huge amount of sense. Any boot loader worth its salts already
+has most of the above features and more besides. The boot loader already knows
+the layout of memory, has a serial driver, can decompress things, includes an
+ELF loader and supports device tree and ramdisks. The decision to duplicate
+all these features in a Linux wrapper caters for the lowest common
+denominator: a boot loader which consists of a BIOS call to load something off
+disk, followed by a jmp instruction.
+
+(Aside: On ARM systems, we worry that the boot loader won't know where to load
+the kernel. It might be easier to just provide that information in the image,
+or in the boot loader rather than adding a self-relocator to put it in the
+right place. Or just use ELF?
+
+As a result, the x86 kernel boot process is needlessly complex. The file
+format is also complex, and obfuscates the contents to a degree that it is
+quite a challenge to extract anything from it. This bzImage format has become
+so prevalent that is actually isn't possible to produce the 'raw' kernel build
+outputs with the standard Makefile (as it is on ARM for example, at least at
+the time of writing).
+
+This document describes an alternative boot process which uses simple raw
+images which are loaded into the right place by the boot loader and then
+executed.
+
+
+Build the kernel
+----------------
+
+Note: these instructions assume a 32-bit kernel. U-Boot also supports directly
+booting a 64-bit kernel by jumping into 64-bit mode first (see below).
+
+You can build the kernel as normal with 'make'. This will create a file called
+'vmlinux'. This is a standard ELF file and you can look at it if you like::
+
+    $ objdump -h vmlinux
+
+    vmlinux:     file format elf32-i386
+
+    Sections:
+    Idx Name          Size      VMA       LMA       File off  Algn
+      0 .text         00416850  81000000  01000000  00001000  2**5
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+      1 .notes        00000024  81416850  01416850  00417850  2**2
+                      CONTENTS, ALLOC, LOAD, READONLY, CODE
+      2 __ex_table    00000c50  81416880  01416880  00417880  2**3
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+      3 .rodata       00154b9e  81418000  01418000  00419000  2**5
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+      4 __bug_table   0000597c  8156cba0  0156cba0  0056dba0  2**0
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+      5 .pci_fixup    00001b80  8157251c  0157251c  0057351c  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+      6 .tracedata    00000024  8157409c  0157409c  0057509c  2**0
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+      7 __ksymtab     00007ec0  815740c0  015740c0  005750c0  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+      8 __ksymtab_gpl 00004a28  8157bf80  0157bf80  0057cf80  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+      9 __ksymtab_strings 0001d6fc  815809a8  015809a8  005819a8  2**0
+                      CONTENTS, ALLOC, LOAD, READONLY, DATA
+     10 __init_rodata 00001c3c  8159e0a4  0159e0a4  0059f0a4  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+     11 __param       00000ff0  8159fce0  0159fce0  005a0ce0  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+     12 __modver      00000330  815a0cd0  015a0cd0  005a1cd0  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+     13 .data         00063000  815a1000  015a1000  005a2000  2**12
+                      CONTENTS, ALLOC, LOAD, RELOC, DATA
+     14 .init.text    0002f104  81604000  01604000  00605000  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+     15 .init.data    00040cdc  81634000  01634000  00635000  2**12
+                      CONTENTS, ALLOC, LOAD, RELOC, DATA
+     16 .x86_cpu_dev.init 0000001c  81674cdc  01674cdc  00675cdc  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+     17 .altinstructions 0000267c  81674cf8  01674cf8  00675cf8  2**0
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+     18 .altinstr_replacement 00000942  81677374  01677374  00678374  2**0
+                      CONTENTS, ALLOC, LOAD, READONLY, CODE
+     19 .iommu_table  00000014  81677cb8  01677cb8  00678cb8  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+     20 .apicdrivers  00000004  81677cd0  01677cd0  00678cd0  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, DATA
+     21 .exit.text    00001a80  81677cd8  01677cd8  00678cd8  2**0
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+     22 .data..percpu 00007880  8167a000  0167a000  0067b000  2**12
+                      CONTENTS, ALLOC, LOAD, RELOC, DATA
+     23 .smp_locks    00003000  81682000  01682000  00683000  2**2
+                      CONTENTS, ALLOC, LOAD, RELOC, READONLY, DATA
+     24 .bss          000a1000  81685000  01685000  00686000  2**12
+                      ALLOC
+     25 .brk          00424000  81726000  01726000  00686000  2**0
+                      ALLOC
+     26 .comment      00000049  00000000  00000000  00686000  2**0
+                      CONTENTS, READONLY
+     27 .GCC.command.line 0003e055  00000000  00000000  00686049  2**0
+                      CONTENTS, READONLY
+     28 .debug_aranges 0000f4c8  00000000  00000000  006c40a0  2**3
+                      CONTENTS, RELOC, READONLY, DEBUGGING
+     29 .debug_info   0440b0df  00000000  00000000  006d3568  2**0
+                      CONTENTS, RELOC, READONLY, DEBUGGING
+     30 .debug_abbrev 0022a83b  00000000  00000000  04ade647  2**0
+                      CONTENTS, READONLY, DEBUGGING
+     31 .debug_line   004ead0d  00000000  00000000  04d08e82  2**0
+                      CONTENTS, RELOC, READONLY, DEBUGGING
+     32 .debug_frame  0010a960  00000000  00000000  051f3b90  2**2
+                      CONTENTS, RELOC, READONLY, DEBUGGING
+     33 .debug_str    001b442d  00000000  00000000  052fe4f0  2**0
+                      CONTENTS, READONLY, DEBUGGING
+     34 .debug_loc    007c7fa9  00000000  00000000  054b291d  2**0
+                      CONTENTS, RELOC, READONLY, DEBUGGING
+     35 .debug_ranges 00098828  00000000  00000000  05c7a8c8  2**3
+                      CONTENTS, RELOC, READONLY, DEBUGGING
+
+There is also the setup binary mentioned earlier. This is at
+arch/x86/boot/setup.bin and is about 12KB in size. It includes the command
+line and various settings need by the kernel. Arguably the boot loader should
+provide all of this also, but setting it up is some complex that the kernel
+helps by providing a head start.
+
+As you can see the code loads to address 0x01000000 and everything else
+follows after that. We could load this image using the 'bootelf' command but
+we would still need to provide the setup binary. This is not supported by
+U-Boot although I suppose you could mostly script it. This would permit the
+use of a relocatable kernel.
+
+All we need to boot is the vmlinux file and the setup.bin file.
+
+
+Create a FIT
+------------
+
+To create a FIT you will need a source file describing what should go in the
+FIT. See kernel.its for an example for x86 and also instructions on setting
+the 'arch' value for booting 64-bit kernels if desired. Put this into a file
+called image.its.
+
+Note that setup is loaded to the special address of 0x90000 (a special address
+you just have to know) and the kernel is loaded to 0x01000000 (the address you
+saw above). This means that you will need to load your FIT to a different
+address so that U-Boot doesn't overwrite it when decompressing. Something like
+0x02000000 will do so you can set CONFIG_SYS_LOAD_ADDR to that.
+
+In that example the kernel is compressed with lzo. Also we need to provide a
+flat binary, not an ELF. So the steps needed to set things are are::
+
+    # Create a flat binary
+    objcopy -O binary vmlinux vmlinux.bin
+
+    # Compress it into LZO format
+    lzop vmlinux.bin
+
+    # Build a FIT image
+    mkimage -f image.its image.fit
+
+(be careful to run the mkimage from your U-Boot tools directory since it
+will have x86_setup support.)
+
+You can take a look at the resulting fit file if you like::
+
+    $ dumpimage -l image.fit
+    FIT description: Simple image with single Linux kernel on x86
+    Created:         Tue Oct  7 10:57:24 2014
+     Image 0 (kernel)
+      Description:  Vanilla Linux kernel
+      Created:      Tue Oct  7 10:57:24 2014
+      Type:         Kernel Image
+      Compression:  lzo compressed
+      Data Size:    4591767 Bytes = 4484.15 kB = 4.38 MB
+      Architecture: Intel x86
+      OS:           Linux
+      Load Address: 0x01000000
+      Entry Point:  0x00000000
+      Hash algo:    sha256
+      Hash value:   4bbf49981ade163ed089f8525236fedfe44508e9b02a21a48294a96a1518107b
+     Image 1 (setup)
+      Description:  Linux setup.bin
+      Created:      Tue Oct  7 10:57:24 2014
+      Type:         x86 setup.bin
+      Compression:  uncompressed
+      Data Size:    12912 Bytes = 12.61 kB = 0.01 MB
+      Hash algo:    sha256
+      Hash value:   6aa50c2e0392cb119cdf0971dce8339f100608ed3757c8200b0e39e889e432d2
+     Default Configuration: 'config-1'
+     Configuration 0 (config-1)
+      Description:  Boot Linux kernel
+      Kernel:       kernel
+
+
+Booting the FIT
+---------------
+
+To make it boot you need to load it and then use 'bootm' to boot it. A
+suitable script to do this from a network server is::
+
+    bootp
+    tftp image.fit
+    bootm
+
+This will load the image from the network and boot it. The command line (from
+the 'bootargs' environment variable) will be passed to the kernel.
+
+If you want a ramdisk you can add it as normal with FIT. If you want a device
+tree then x86 doesn't normally use those - it has ACPI instead.
+
+
+Why Bother?
+-----------
+
+#. It demystifies the process of booting an x86 kernel
+#. It allows use of the standard U-Boot boot file format
+#. It allows U-Boot to perform decompression - problems will provide an error
+   message and you are still in the boot loader. It is possible to investigate.
+#. It avoids all the pre-loader code in the kernel which is quite complex to
+   follow
+#. You can use verified/secure boot and other features which haven't yet been
+   added to the pre-Linux
+#. It makes x86 more like other architectures in the way it boots a kernel.
+   You can potentially use the same file format for the kernel, and the same
+   procedure for building and packaging it.
+
+
+References
+----------
+
+In the Linux kernel, Documentation/x86/boot.txt defines the boot protocol for
+the kernel including the setup.bin format. This is handled in U-Boot in
+arch/x86/lib/zimage.c and arch/x86/lib/bootm.c.
+
+Various files in the same directory as this file describe the FIT format.
+
+
+.. sectionauthor:: Simon Glass <sjg@chromium.org> 7-Oct-2014
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
new file mode 100644
index 00000000000..49b354e6ffd
--- /dev/null
+++ b/doc/usage/index.rst
@@ -0,0 +1,131 @@
+Use U-Boot
+==========
+
+.. toctree::
+   :maxdepth: 1
+
+   spl_boot
+   blkmap
+   dfu
+   environment
+   fdt_overlays
+   fit/index
+   netconsole
+   partitions
+   cmdline
+   semihosting
+   measured_boot
+
+Shell commands
+--------------
+
+.. toctree::
+   :maxdepth: 1
+
+   cmd/acpi
+   cmd/addrmap
+   cmd/armffa
+   cmd/askenv
+   cmd/base
+   cmd/bdinfo
+   cmd/bind
+   cmd/blkcache
+   cmd/bootd
+   cmd/bootdev
+   cmd/bootefi
+   cmd/bootelf
+   cmd/bootflow
+   cmd/booti
+   cmd/bootm
+   cmd/bootmenu
+   cmd/bootmeth
+   cmd/bootz
+   cmd/button
+   cmd/cat
+   cmd/cbsysinfo
+   cmd/cedit
+   cmd/cli
+   cmd/cls
+   cmd/cmp
+   cmd/coninfo
+   cmd/conitrace
+   cmd/cp
+   cmd/cyclic
+   cmd/dm
+   cmd/ebtupdate
+   cmd/echo
+   cmd/efi
+   cmd/eficonfig
+   cmd/env
+   cmd/event
+   cmd/exception
+   cmd/exit
+   cmd/extension
+   cmd/false
+   cmd/fatinfo
+   cmd/fatload
+   cmd/fdt
+   cmd/font
+   cmd/for
+   cmd/fwu_mdata
+   cmd/gpio
+   cmd/gpt
+   cmd/history
+   cmd/host
+   cmd/if
+   cmd/itest
+   cmd/imxtract
+   cmd/load
+   cmd/loadb
+   cmd/loadm
+   cmd/loads
+   cmd/loadx
+   cmd/loady
+   cmd/mbr
+   cmd/md
+   cmd/mmc
+   cmd/mtest
+   cmd/mtrr
+   cmd/panic
+   cmd/part
+   cmd/pause
+   cmd/pinmux
+   cmd/printenv
+   cmd/pstore
+   cmd/qfw
+   cmd/read
+   cmd/reset
+   cmd/rng
+   cmd/saves
+   cmd/sbi
+   cmd/scmi
+   cmd/scp03
+   cmd/seama
+   cmd/setexpr
+   cmd/sf
+   cmd/size
+   cmd/sleep
+   cmd/sm
+   cmd/smbios
+   cmd/sound
+   cmd/source
+   cmd/temperature
+   cmd/tftpput
+   cmd/trace
+   cmd/true
+   cmd/ums
+   cmd/unbind
+   cmd/ut
+   cmd/wdt
+   cmd/wget
+   cmd/write
+   cmd/xxd
+
+Booting OS
+----------
+
+.. toctree::
+   :maxdepth: 1
+
+   os/plan9
+   os/vxworks
diff --git a/doc/usage/measured_boot.rst b/doc/usage/measured_boot.rst
new file mode 100644
index 00000000000..05c439e9ac6
--- /dev/null
+++ b/doc/usage/measured_boot.rst
@@ -0,0 +1,58 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Measured Boot
+=============
+
+U-Boot can perform a measured boot, the process of hashing various components
+of the boot process, extending the results in the TPM and logging the
+component's measurement in memory for the operating system to consume.
+
+The functionality is available when booting via the EFI subsystem or 'bootm'
+command.
+
+UEFI measured boot
+------------------
+
+The EFI subsystem implements the `EFI TCG protocol
+<https://trustedcomputinggroup.org/resource/tcg-efi-protocol-specification/>`_
+and the `TCG PC Client Specific Platform Firmware Profile Specification
+<https://trustedcomputinggroup.org/resource/pc-client-specific-platform-firmware-profile-specification/>`_
+which defines the binaries to be measured and the corresponding PCRs to be used.
+
+Requirements
+~~~~~~~~~~~~
+
+* A hardware TPM 2.0 supported by an enabled U-Boot driver
+* CONFIG_EFI_TCG2_PROTOCOL=y
+* CONFIG_EFI_TCG2_PROTOCOL_EVENTLOG_SIZE=y
+* optional CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB=y will measure the loaded DTB
+  in PCR 1
+
+Legacy measured boot
+--------------------
+
+The commands booti, bootm, and bootz can be used for measured boot
+using the legacy entry point of the Linux kernel.
+
+By default, U-Boot will measure the operating system (linux) image, the
+initrd image, and the "bootargs" environment variable. By enabling
+CONFIG_MEASURE_DEVICETREE, U-Boot will also measure the devicetree image in PCR1.
+
+The operating system typically would verify that the hashes found in the
+TPM PCRs match the contents of the event log. This can further be checked
+against the hash results of previous boots.
+
+Requirements
+~~~~~~~~~~~~
+
+* A hardware TPM 2.0 supported by an enabled U-Boot driver
+* CONFIG_TPMv2=y
+* CONFIG_MEASURED_BOOT=y
+* Device-tree configuration of the TPM device to specify the memory area
+  for event logging. The TPM device node must either contain a phandle to
+  a reserved memory region or "linux,sml-base" and "linux,sml-size"
+  indicating the address and size of the memory region. An example can be
+  found in arch/sandbox/dts/test.dts
+* The operating system must also be configured to use the memory regions
+  specified in the U-Boot device-tree in order to make use of the event
+  log.
diff --git a/doc/usage/netconsole.rst b/doc/usage/netconsole.rst
new file mode 100644
index 00000000000..df27b78342f
--- /dev/null
+++ b/doc/usage/netconsole.rst
@@ -0,0 +1,144 @@
+Network console
+===============
+
+In U-Boot, we implemented the networked console via the standard
+"devices" mechanism, which means that you can switch between the
+serial and network input/output devices by adjusting the 'stdin',
+'stdout', and 'stderr' environment variables. To switch to the
+networked console, set either of these variables to "nc". Input and
+output can be switched independently.
+
+The default buffer size can be overridden by setting
+CFG_NETCONSOLE_BUFFER_SIZE.
+
+We use an environment variable 'ncip' to set the IP address and the
+port of the destination. The format is <ip_addr>:<port>. If <port> is
+omitted, the value of 6666 is used. If the env var doesn't exist, the
+broadcast address and port 6666 are used. If it is set to an IP
+address of 0 (or 0.0.0.0) then no messages are sent to the network.
+The source / listening port can be configured separately by setting
+the 'ncinport' environment variable and the destination port can be
+configured by setting the 'ncoutport' environment variable. Note that
+you need to set up the network interface (e.g. using DHCP) before it
+can be used for network console.
+
+For example, if your server IP is 192.168.1.1, you could use:
+
+.. prompt:: bash =>
+
+    env set nc 'env set stdout nc; env set stderr nc; env set stdin nc'
+    env set ncip '192.168.1.1'
+    env save
+    run nc
+
+On the host side, please use this script to access the console
+
+.. code-block:: bash
+
+	tools/netconsole <ip> [port]
+
+The script uses netcat to talk to the board over UDP.  It requires you to
+specify the target IP address (or host name, assuming DNS is working). The
+script can be interrupted by pressing ^T (CTRL-T).
+
+Be aware that in some distributives (Fedora Core 5 at least)
+usage of nc has been changed and -l and -p options are considered
+as mutually exclusive. If nc complains about options provided,
+you can just remove the -p option from the script.
+
+It turns out that 'netcat' cannot be used to listen to broadcast
+packets. We developed our own tool 'ncb' (see tools directory) that
+listens to broadcast packets on a given port and dumps them to the
+standard output.  It will be built when compiling for a board which
+has CONFIG_NETCONSOLE defined.  If the netconsole script can find it
+in PATH or in the same directory, it will be used instead.
+
+For Linux, the network-based console needs special configuration.
+Minimally, the host IP address needs to be specified. This can be
+done either via the kernel command line, or by passing parameters
+while loading the netconsole.o module (when used in a loadable module
+configuration). Please refer to Documentation/networking/logging.txt
+file for the original Ingo Molnar's documentation on how to pass
+parameters to the loadable module.
+
+The format of the kernel command line parameter (for the static
+configuration) is as follows
+
+.. code-block:: bash
+
+    netconsole=[src-port]@[src-ip]/[<dev>],[tgt-port]@<tgt-ip>/[tgt-macaddr]
+
+where
+
+src-port
+    source for UDP packets (defaults to 6665)
+
+src-ip
+    source IP to use (defaults to the interface's address)
+
+dev
+    network interface (defaults to eth0)
+
+tgt-port
+  port for logging agent (defaults to 6666)
+
+tgt-ip
+  IP address for logging agent (this is the required parameter)
+
+tgt-macaddr
+    ethernet MAC address for logging agent (defaults to broadcast)
+
+Examples
+
+.. code-block:: bash
+
+  netconsole=4444@10.0.0.1/eth1,9353@10.0.0.2/12:34:56:78:9a:bc
+  netconsole=@/,@192.168.3.1/
+
+Please note that for the Linux networked console to work, the
+ethernet interface has to be up by the time the netconsole driver is
+initialized. This means that in case of static kernel configuration,
+the respective Ethernet interface has to be brought up using the "IP
+Autoconfiguration" kernel feature, which is usually done by defaults
+in the ELDK-NFS-based environment.
+
+To browse the Linux network console output, use the 'netcat' tool invoked
+as follows:
+
+.. code-block:: bash
+
+	nc -u -l -p 6666
+
+Note that unlike the U-Boot implementation the Linux netconsole is
+unidirectional, i. e. you have console output only in Linux.
+
+Setup via environment
+---------------------
+
+If persistent environment is enabled in your U-Boot configuration, you
+can configure the network console using the environment. For example:
+
+.. prompt:: bash =>
+
+    env set autoload no
+    env set hostname "u-boot"
+    env set bootdelay 5
+    env set nc 'dhcp; env set stdout nc; env set stderr nc; env set stdin nc'
+    env set ncip '192.168.1.1'
+    env set preboot "${preboot}; run nc;"
+    env save
+    reset
+
+``autoload no`` tells the ``dhcp`` command to configure the network
+interface without trying to load an image. ``hostname "u-boot"`` sets
+the hostname to be sent in DHCP requests, so they are easy to
+recognize in the DHCP server log. The command in ``nc`` calls ``dhcp``
+to make sure the network interface is set up before enabling
+netconsole.
+
+Adding ``nc`` to ``preboot`` tells U-Boot to activate netconsole
+before trying to find any boot options, so you can interact with it if
+desired.
+
+``env save`` stores the settings persistently, and ``reset`` then
+triggers a fresh start that will use the changed settings.
diff --git a/doc/usage/os/plan9.rst b/doc/usage/os/plan9.rst
new file mode 100644
index 00000000000..f91712c0094
--- /dev/null
+++ b/doc/usage/os/plan9.rst
@@ -0,0 +1,22 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Steven Stallion
+.. June 2013
+
+Plan 9
+======
+
+Plan 9 from Bell Labs kernel images require additional setup to pass
+configuration information to the kernel.  An environment variable named
+confaddr must be defined with the same value as CONFADDR (see mem.h).
+Use of this facility is optional, but should be preferable to manual
+configuration.
+
+When booting an image, arguments supplied to the bootm command will be
+copied to CONFADDR.  If no arguments are specified, the contents of the
+bootargs environment variable will be copied.
+
+If no command line arguments or bootargs are defined, CONFADDR is left
+uninitialized to permit manual configuration.  For example, PC-style
+configuration could be simulated by issuing a fatload in bootcmd::
+
+  # setenv bootcmd fatload mmc 0 $confaddr plan9.ini; ...; bootm
diff --git a/doc/usage/os/vxworks.rst b/doc/usage/os/vxworks.rst
new file mode 100644
index 00000000000..0fe33d2d34c
--- /dev/null
+++ b/doc/usage/os/vxworks.rst
@@ -0,0 +1,124 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (C) 2013, Miao Yan <miao.yan@windriver.com>
+.. Copyright (C) 2015-2018, Bin Meng <bmeng.cn@gmail.com>
+.. Copyright (C) 2019, Lihua Zhao <lihua.zhao@windriver.com>
+
+VxWorks
+=======
+
+This document describes the information about U-Boot loading VxWorks kernel.
+
+Status
+------
+U-Boot supports loading VxWorks kernels via 'bootvx' and 'bootm' commands.
+For booting old kernels (6.9.x) on PowerPC and ARM, and all kernel versions
+on other architectures, 'bootvx' shall be used. For booting VxWorks 7 kernels
+on PowerPC/ARM/RISC-V, 'bootm' shall be used.
+
+With CONFIG_EFI_LOADER option, it's possible to chain load a VxWorks x86 kernel
+via the UEFI boot loader application for VxWorks loaded by 'bootefi' command.
+
+VxWorks 7 on PowerPC/ARM/RISC-V
+-------------------------------
+From VxWorks 7, VxWorks starts adopting device tree as its hardware description
+mechanism (for PowerPC and ARM), thus requiring boot interface changes.
+This section will describe the new interface.
+
+Since VxWorks 7 SR0640 release, VxWorks starts using Linux compatible standard
+DTB for some boards. With that, the exact same bootm flow as used by Linux is
+used, which includes board-specific DTB fix up. To keep backward compatibility,
+only when the least significant bit of flags in bootargs is set, the standard
+DTB will be used. Otherwise it falls back to the legacy bootm flow.
+
+For legacy bootm flow, make sure the least significant bit of flags in bootargs
+is cleared. The calling convention is described below:
+
+For PowerPC, the calling convention of the new VxWorks entry point conforms to
+the ePAPR standard, which is shown below (see ePAPR for more details):
+
+.. code-block:: c
+
+    void (*kernel_entry)(fdt_addr, 0, 0, EPAPR_MAGIC, boot_IMA, 0, 0)
+
+For ARM, the calling convention is shown below:
+
+.. code-block:: c
+
+    void (*kernel_entry)(void *fdt_addr)
+
+When using the Linux compatible standard DTB, the calling convention of VxWorks
+entry point is exactly the same as the Linux kernel.
+
+For RISC-V, there is no legacy bootm flow as VxWorks always uses the same boot
+interface as the Linux kernel, with the calling convention below::
+
+    void (*kernel_entry)(unsigned long hartid, void *fdt_addr)
+
+When booting a VxWorks 7 kernel (uImage format), the parameters passed to bootm
+is like below::
+
+    bootm <kernel image address> - <device tree address>
+
+VxWorks bootline
+----------------
+When using 'bootvx', the kernel bootline must be prepared by U-Boot at a
+board-specific address before loading VxWorks. U-Boot supplies its address
+via "bootaddr" environment variable. To check where the bootline should be
+for a specific board, go to the VxWorks BSP for that board, and look for a
+parameter called BOOT_LINE_ADRS. Assign its value to "bootaddr". A typical
+value for "bootaddr" on an x86 board is 0x101200.
+
+If a "bootargs" variable is defined, its content will be copied to the memory
+location pointed by "bootaddr" as the kernel bootline. If "bootargs" is not
+there, command 'bootvx' can construct a valid bootline using the following
+environments variables: bootdev, bootfile, ipaddr, netmask, serverip,
+gatewayip, hostname, othbootargs.
+
+When using 'bootm', just define "bootargs" in the environment and U-Boot will
+handle bootline fix up for the kernel dtb automatically.
+
+When using 'bootefi' to chain load an x86 kernel, the UEFI boot loader
+application for VxWorks takes care of the kernel bootline preparation.
+
+Serial console
+--------------
+It's very common that VxWorks BSPs configure a different baud rate for the
+serial console from what is being used by U-Boot. For example, VxWorks tends
+to use 9600 as the default baud rate on all x86 BSPs while U-Boot uses 115200.
+Please configure both U-Boot and VxWorks to use the same baud rate, or it may
+look like VxWorks hangs somewhere as nothing outputs on the serial console.
+
+x86-specific information
+------------------------
+Before direct loading an x86 kernel via 'bootvx', one additional environment
+variable need to be provided. This is "vx_phys_mem_base", which represent the
+physical memory base address of VxWorks.
+
+Check VxWorks kernel configuration to look for LOCAL_MEM_LOCAL_ADRS. For
+VxWorks 7, this is normally a virtual address and you need find out its
+corresponding physical address and assign its value to "vx_phys_mem_base".
+
+For boards on which ACPI is not supported by U-Boot yet, VxWorks kernel must
+be configured to use MP table and virtual wire interrupt mode. This requires
+INCLUDE_MPTABLE_BOOT_OP and INCLUDE_VIRTUAL_WIRE_MODE to be included in a
+VxWorks kernel configuration.
+
+Both 32-bit x86 and 64-bit x64 kernels can be loaded.
+
+There are two types of graphics console drivers in VxWorks. One is the 80x25
+VGA text mode driver. The other one is the EFI console bitmapped graphics mode
+driver. To make these drivers function, U-Boot needs to load and run the VGA
+BIOS of the graphics card first.
+
+    - If the kernel is configured with 80x25 VGA text mode driver,
+      CONFIG_FRAMEBUFFER_SET_VESA_MODE must be unset in U-Boot.
+    - If the kernel is configured with bitmapped graphics mode driver,
+      CONFIG_FRAMEBUFFER_SET_VESA_MODE need remain set but care must be taken
+      at which VESA mode is to be set. The supported pixel format is 32-bit
+      RGBA, hence the available VESA mode can only be one of the following:
+
+        * FRAMEBUFFER_VESA_MODE_10F
+        * FRAMEBUFFER_VESA_MODE_112
+        * FRAMEBUFFER_VESA_MODE_115
+        * FRAMEBUFFER_VESA_MODE_118
+        * FRAMEBUFFER_VESA_MODE_11B
diff --git a/doc/usage/partitions.rst b/doc/usage/partitions.rst
new file mode 100644
index 00000000000..acf4573097d
--- /dev/null
+++ b/doc/usage/partitions.rst
@@ -0,0 +1,91 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. _partitions:
+
+Partitions
+==========
+
+Synopsis
+--------
+
+::
+
+    <command> <interface> [devnum][.hwpartnum][:partnum|#partname]
+
+Description
+-----------
+
+Many U-Boot commands allow specifying partitions (or whole disks) using a
+generic syntax.
+
+interface
+        The interface used to access the partition's device, like ``mmc`` or
+        ``scsi``. For a full list of supported interfaces, consult the
+        ``uclass_idname_str`` array in ``drivers/block/blk-uclass.c``
+
+devnum
+        The device number. This defaults to 0.
+
+hwpartnum
+        The hardware partition number. All devices have at least one hardware
+        partition. On most devices, hardware partition 0 specifies the whole
+        device. On eMMC devices, hardware partition 0 is the user partition,
+        hardware partitions 1 and 2 are the boot partitions, hardware partition
+        3 is the RPMB partition, and further partitions are general-purpose
+        user-created partitions. The default hardware partition number is 0.
+
+partnum
+        The partition number, starting from 1. The partition number 0 specifies
+        that the whole device is to be used as one "partition."
+
+partname
+        The partition name. This is the partition label for GPT partitions. For
+        MBR partitions, the following syntax is used::
+
+                <devtype><devletter><partnum>
+
+        devtype
+                The devtype field is set in dependence of the device class:
+
+                ======= ===============
+                devtype device class
+                ======= ===============
+                hd      IDE or SATA
+                sd      SCSI
+                usbd    USB
+                mmcsd   eMMC or SD-card
+                xx      others
+                ======= ===============
+
+                See the ``part_set_generic_name`` function in ``disk/part.c``
+                for the complete list.
+
+        devletter
+                The device number as an offset from ``a``. For example, device
+                number 2 would have a device letter of ``c``.
+
+        partnum
+                The partition number. This is the same as above.
+
+If neither ``partname`` nor ``partnum`` is specified and there is a partition
+table, then partition 1 is used. If there is no partition table, then the whole
+device is used as one "partition." If none of ``devnum``, ``hwpartnum``,
+``partnum``, or ``partname`` is specified, or only ``-`` is specified, then
+``devnum`` defaults to the value of the ``bootdevice`` environmental variable.
+
+Examples
+--------
+
+List the root directory contents on MMC device 2, hardware partition 1,
+and partition number 3::
+
+        ls mmc 2.1:3 /
+
+Load ``/kernel.itb`` to address ``0x80000000`` from SCSI device 0, hardware partition
+0, and the partition labeled ``boot``::
+
+        load scsi #boot 0x80000000 /kernel.itb
+
+Print the partition UUID of the SATA device ``$bootdevice``, hardware partition
+0, and partition number 0::
+
+        part uuid sata -
diff --git a/doc/usage/semihosting.rst b/doc/usage/semihosting.rst
new file mode 100644
index 00000000000..9303a6364d5
--- /dev/null
+++ b/doc/usage/semihosting.rst
@@ -0,0 +1,107 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2014 Broadcom Corporation.
+
+Semihosting
+===========
+
+Semihosting is ARM's way of having a real or virtual target communicate
+with a host or host debugger for basic operations such as file I/O,
+console I/O, etc. Please see `Arm's semihosting documentation
+<https://developer.arm.com/documentation/100863/latest/>`_ for more
+information.
+
+Platform Support
+----------------
+
+Versatile Express
+^^^^^^^^^^^^^^^^^
+
+For developing on armv8 virtual fastmodel platforms, semihosting is a
+valuable tool since it allows access to image/configuration files before
+eMMC or other NV media are available.
+
+There are two main ARM virtual Fixed Virtual Platform (FVP) models,
+`Versatile Express (VE) FVP and BASE FVP
+<http://www.arm.com/products/tools/models/fast-models/foundation-model.php>`_.
+The initial vexpress64 U-Boot board created here runs on the VE virtual
+platform using the license-free Foundation_v8 simulator. Fortunately,
+the Foundation_v8 simulator also supports the BASE_FVP model which
+companies can purchase licenses for and contain much more functionality.
+So we can, in U-Boot, run either model by either using the VE FVP (default),
+or turning on ``CONFIG_BASE_FVP`` for the more full featured model.
+
+Rather than create a new armv8 board similar to ``armltd/vexpress64``, add
+semihosting calls to the existing one, enabled with ``CONFIG_SEMIHOSTING``
+and ``CONFIG_BASE_FVP`` both set. Also reuse the existing board config file
+vexpress_aemv8.h but differentiate the two models by the presence or
+absence of ``CONFIG_BASE_FVP``. This change is tested and works on both the
+Foundation and Base fastmodel simulators.
+
+QEMU
+^^^^
+
+Another ARM emulator which supports semihosting is `QEMU
+<https://www.qemu.org/>`_. To enable semihosting, enable
+``CONFIG_SERIAL_PROBE_ALL`` when configuring U-Boot, and use
+``-semihosting`` when invoking QEMU. Adding ``-nographic`` can also be
+helpful. When using a semihosted serial console, QEMU will block waiting
+for input. This will cause the GUI to become unresponsive. To mitigate
+this, try adding ``-nographic``. For more information about building and
+running QEMU, refer to the :doc:`board documentation
+<../board/emulation/qemu-arm>`.
+
+OpenOCD
+^^^^^^^
+
+Any ARM platform can use semihosting with an attached debugger. One such
+debugger with good support for a variety of boards and JTAG adapters is
+`OpenOCD <https://openocd.org/>`_. Semihosting is not enabled by default,
+so you will need to enable it::
+
+    $ openocd -f <your board config> -c init -c halt -c \
+          'arm semihosting enable' -c resume
+
+Note that enabling semihosting can only be done after attaching to the
+board with ``init``, and must be done while the CPU is halted. For a more
+extended example, refer to the :ref:`LS1046ARDB docs <ls1046ardb_jtag>`.
+
+Loading files
+-------------
+
+The semihosting code adds a "semihosting filesystem"::
+
+  load hostfs - <address> <image>
+
+That will load an image from the host filesystem into RAM at the specified
+address. If you are using U-Boot SPL, you can also use ``BOOT_DEVICE_SMH``
+which will load ``CONFIG_SPL_FS_LOAD_PAYLOAD_NAME``.
+
+Host console
+------------
+
+U-Boot can use the host's console instead of a physical serial device by
+enabling ``CONFIG_SERIAL_SEMIHOSTING``. If you don't have
+``CONFIG_DM_SERIAL`` enabled, make sure you disable any other serial
+drivers.
+
+Migrating from ``smhload``
+--------------------------
+
+If you were using the ``smhload`` command, you can migrate commands like::
+
+    smhload <file> <address> [<end var>]
+
+to a generic load command like::
+
+    load hostfs - <address> <file>
+
+The ``load`` command will set the ``filesize`` variable with the size of
+the file. The ``fdt chosen`` command has been updated to take a size
+instead of an end address. If you were adding the initramfs to your device
+tree like::
+
+    fdt chosen <address> <end var>
+
+you can now run::
+
+    fdt chosen <address> $filesize
diff --git a/doc/usage/spl_boot.rst b/doc/usage/spl_boot.rst
new file mode 100644
index 00000000000..93419f158af
--- /dev/null
+++ b/doc/usage/spl_boot.rst
@@ -0,0 +1,321 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Booting from TPL/SPL
+====================
+
+The main U-Boot binary may be too large to be loaded directly by the Boot ROM.
+This was the original driver for splitting up U-Boot into multiple boot stages.
+
+U-Boot typically goes through the following boot phases where TPL, VPL, and SPL
+are optional. While many boards use SPL only few use TPL.
+
+TPL
+   Tertiary Program Loader. Very early init, as tiny as possible. This loads SPL
+   (or VPL if enabled).
+
+VPL
+   Verifying Program Loader. Optional verification step, which can select one of
+   several SPL binaries, if A/B verified boot is enabled. Implementation of the
+   VPL logic is work-in-progress. For now it just boots into SPL.
+
+SPL
+   Secondary Program Loader. Sets up SDRAM and loads U-Boot proper. It may also
+   load other firmware components.
+
+U-Boot
+   U-Boot proper. This is the only stage containing command. It also implements
+   logic to load an operating system, e.g. via UEFI.
+
+.. note::
+
+   The naming convention on the PowerPC architecture deviates from the other
+   archtitectures. Here the boot sequence is SPL->TPL->U-Boot.
+
+Further usages for U-Boot SPL comprise:
+
+* launching BL31 of ARM Trusted Firmware which invokes U-Boot as BL33
+* launching EDK II
+* launching Linux, e.g. :doc:`Falcon Mode <../develop/falcon>`
+* launching RISC-V OpenSBI which invokes main U-Boot
+
+Target binaries
+---------------
+
+Binaries loaded by SPL/TPL can be:
+
+* raw binaries where the entry address equals the start address. This is the
+  only binary format supported by TPL.
+* :doc:`FIT <fit/index>` images
+* legacy U-Boot images
+
+Configuration
+~~~~~~~~~~~~~
+
+Raw images are only supported in SPL if CONFIG_SPL_RAW_IMAGE_SUPPORT=y.
+
+CONFIG_SPL_FIT=y and CONFIG_SPL_LOAD_FIT=y are needed to load FIT images.
+
+CONFIG_SPL_LEGACY_IMAGE_FORMAT=y is needed to load legacy U-Boot images.
+CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y enables checking the CRC32 of legacy U-Boot
+images.
+
+Image load methods
+------------------
+
+The image boot methods available for a board must be defined in two places:
+
+The board code implements a function board_boot_order() enumerating up to
+five boot methods and the sequence in which they are tried. (The maximum
+number of boot methods is currently hard coded as variable spl_boot_list[]).
+If there is only one boot method function, spl_boot_device() may be implemented
+instead.
+
+The configuration controls which of these boot methods are actually available.
+
+Loading from block devices
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+MMC1, MMC2, MMC2_2
+    These methods read an image from SD card or eMMC. The first digit after
+    'MMC' indicates the device number. Required configuration settings include:
+
+    * CONFIG_SPL_MMC=y or CONFIG_TPL_MMC=y
+
+    To use a PCI connected MMC controller you need to additionally specify:
+
+    * CONFIG_SPL_PCI=y
+
+    * CONFIG_SPL_PCI_PNP=y
+
+    * CONFIG_MMC=y
+
+    * CONFIG_MMC_PCI=y
+
+    * CONFIG_MMC_SDHCI=y
+
+    To load from a file system use:
+
+    * CONFIG_SPL_FS_FAT=y or CONFIG_SPL_FS_EXT=y
+
+    * CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="<filepath>"
+
+NVMe
+    This methods load the image from an NVMe drive.
+    Required configuration settings include:
+
+    * CONFIG_SPL_PCI=y
+
+    * CONFIG_SPL_PCI_PNP=y
+
+    * CONFIG_SPL_NVME=y
+
+    * CONFIG_SPL_NVME_PCI=y
+
+    * CONFIG_SPL_NVME_BOOT_DEVICE (number of the NVMe device)
+
+    * CONFIG_SYS_NVME_BOOT_PARTITION (partition to read from)
+
+    To load from a file system use:
+
+    * CONFIG_SPL_FS_FAT=y or CONFIG_SPL_FS_EXT=y
+
+    * CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="<filepath>"
+
+SATA
+    This method reads an image from a SATA drive.
+    Required configuration settings include:
+
+    * CONFIG_SPL_SATA=y or CONFIG_TPL_SATA=y
+
+    To use a PCIe connecte SATA controller you additionally need:
+
+    * CONFIG_SPL_PCI=y
+
+    * CONFIG_SPL_SATA=y
+
+    * CONFIG_SPL_AHCI_PCI=y
+
+    * CONFIG_SPL_PCI_PNP=y
+
+    To load from a file system use:
+
+    * CONFIG_SPL_FS_FAT=y
+
+    * CONFIG_SYS_SATA_FAT_BOOT_PARTITION=<partition number>
+
+    * CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="<filepath>"
+
+USB
+    The USB method loads an image from a USB block device.
+    Required configuration settings include:
+
+    * CONFIG_SPL_USB_HOST=y
+
+    * CONFIG_SPL_USB_STORAGE=y
+
+    To use a PCI connected USB 3.0 controller you additionally need:
+
+    * CONFIG_SPL_FS_FAT=y
+
+    * CONFIG_SPL_PCI=y
+
+    * CONFIG_SPL_PCI_PNP=y
+
+    * CONFIG_USB=y
+
+    * CONFIG_USB_XHCI_HCD=y
+
+    * CONFIG_USB_XHCI_PCI=y
+
+    To load from a file system use:
+
+    * CONFIG_SPL_FS_FAT=y or CONFIG_SPL_FS_EXT=y
+
+    * CONFIG_SYS_USB_FAT_BOOT_PARTITION=<partition number>
+
+    * CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="<filepath>"
+
+Loading from raw flash devices
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+NAND
+    This method loads the image from NAND flash. To read from raw NAND the
+    following configuration settings are required:
+
+    * CONFIG_SPL_NAND_SUPPORT=y or CONFIG_TPL_NAND_SUPPORT=y
+
+    If CONFIG_SPL_NAND_RAW_ONLY=y only raw images can be loaded.
+
+    For using UBI (Unsorted Block Images) volumes to read from NAND the
+    following configuration settings are required:
+
+    * CONFIG_SPL_UBI=y or CONFIG_TPL_UBI=y
+
+    The UBI volume to read can either be specified
+
+    * by name using CONFIG_SPL_UBI_LOAD_BY_VOLNAME or
+
+    * by number using CONFIG_SPL_UBI_LOAD_MONITOR_ID.
+
+NOR
+    This method loads the image from NOR flash.
+    Required configuration settings include:
+
+    * CONFIG_SPL_NOR_SUPPORT=y or CONFIG_TPL_NOR_SUPPORT=y
+
+OneNAND
+    This methods loads the image from a OneNAND device. To read from raw OneNAND
+    the following configuration settings are required:
+
+    * CONFIG_SPL_ONENAND_SUPPORT=y or CONFIG_TPL_ONENAND_SUPPORT=y
+
+    For using the Ubi file system to read from NAND the following configuration
+    settings are required:
+
+    * CONFIG_SPL_UBI=y or CONFIG_TPL_UBI=y
+
+SPI
+    This method loads an image form SPI NOR flash.
+    Required configuration settings include:
+
+    * CONFIG_SPL_DM_SPI=y
+
+    * CONFIG_SPL_SPI_FLASH=y
+
+    * CONFIG_SPI_LOAD=y or CONFIG_TPL_SPI_LOAD=y
+
+
+Sunxi SPI
+    This method which is specific to Allwinner SoCs loads an image form SPI NOR
+    flash. Required configuration settings include:
+
+    * CONFIG_SPL_SPI_SUNXI=y
+
+Loading from other devices
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+BOOTROM
+    The binary is loaded by the boot ROM.
+    Required configuration settings include:
+
+    * CONFIG_SPL_BOOTROM_SUPPORT=y or CONFIG_TPL_BOOTROM_SUPPORT=y
+
+DFU
+    :doc:`Device Firmware Upgrade <dfu>` is used to load the binary into RAM.
+    Required configuration settings include:
+
+    * CONFIG_DFU=y
+
+    * CONFIG_SPL_RAM_SUPPORT=y or CONFIG TPL_RAM_SUPPORT=y
+
+Ethernet
+    This method loads an image over Ethernet. The BOOTP protocol is used to find
+    a TFTP server and binary name. The binary is downloaded via the TFTP
+    protocol. Required configuration settings include:
+
+    * CONFIG_SPL_NET=y or CONFIG_TPL_NET=y
+
+    * CONFIG_SPL_ETH_DEVICE=y or CONFIG_DM_USB_GADGET=y
+
+FEL
+    This method does not actually load an image for U-Boot.
+    FEL is a routine contained in the boot ROM of Allwinner SoCs which serves
+    for the initial programming or recovery via USB
+
+RAM
+    This method uses an image preloaded into RAM.
+    Required configuration settings include:
+
+    * CONFIG_SPL_RAM_SUPPORT=y or CONFIG_TPL_RAM_SUPPORT=y
+
+    * CONFIG_RAM_DEVICE=y
+
+Sandbox file
+    On the sandbox this method loads an image from the host file system.
+
+Sandbox image
+    On the sandbox this method loads an image from the host file system.
+
+Semihosting
+    When running in an ARM or RISC-V virtual machine the semihosting method can
+    be used to load an image from the host file system.
+    Required configuration settings include:
+
+    * CONFIG_SPL_SEMIHOSTING=y
+
+    * CONFIG_SPL_SEMIHOSTING_FALLBACK=y
+
+    * CONFIG_SPL_FS_LOAD_PAYLOAD_NAME=<path to file>
+
+UART
+    This method loads an image via the Y-Modem protocol from the UART.
+    Required configuration settings include:
+
+    * CONFIG_SPL_YMODEM_SUPPORT=y or CONFIG_TPL_YMODEM_SUPPORT=y
+
+USB SDP
+    This method loads the image using the Serial Download Protocol as
+    implemented by the boot ROM of the i.MX family of SoCs.
+
+    Required configuration settings include:
+
+    * CONFIG_SPL_SERIAL=y
+
+    * CONFIG_SPL_USB_SDP_SUPPORT=y or CONFIG_TPL_USB_SDP_SUPPORT
+
+VBE Simple
+    This method is used by the VPL stage to extract the next stage image from
+    the loaded image.
+
+    Required configuration settings include:
+
+    * CONFIG_VPL=y
+
+    * CONFIG_SPL_BOOTMETH_VBE_SIMPLE_FW=y or CONFIG_TPL_BOOTMETH_VBE_SIMPLE_FW=y
+
+XIP
+    This method executes an image in place.
+
+    Required configuration settings include:
+
+    * CONFIG_SPL_XIP_SUPPORT